LINEAR TECHNOLOGY LT1737, lt1737fa Technical data

FEATURES

LT1737

High Power

Isolated Flyback Controller

U

DESCRIPTIO

■

Drives External Power MOSFET

■

Supply Voltage Range: 4.5V to 20V

■

Flyback Voltage Limited Only by
External Components

■

Senses Output Voltage Directly from Primary Side
Winding—No Optoisolator Required

■

Switching Frequency from 50kHz to 250kHz
with External Capacitor

■

Moderate Accuracy Regulation Without User Trims

■

Regulation Maintained Well into Discontinuous Mode

■

External I

■

Optional Load Compensation

■

Optional Undervoltage Lockout

■

Shutdown Feature Reduces IQ to 50µA Typ

■

Available in 16-Pin GN and SO Packages

SENSE

Resistor

U

APPLICATIO S

■

Isolated Flyback Switching Regulators

■

Medical Instruments

■

Instrumentation Power Supplies

The LT®1737 is a monolithic switching regulator control­ler specifically designed for the isolated flyback topology.
It drives the gate of an external MOSFET and is generally
powered from a DC supply voltage. Output voltage feed­back information may be supplied by a variety of methods
including a third transformer winding, the primary wind­ing or even direct DC feedback (see Applications Informa­tion). Its gate drive capability, coupled with a suitable
external MOSFET and other power path components, can
deliver load power up to tens of Watts.

The LT1737 has a number of features not found on other
isolated flyback controller ICs. By utilizing current mode
switching techniques, it provides excellent AC and DC line
regulation. Its unique control circuitry can maintain regu­lation well into discontinuous mode in most applications.
Optional load compensation circuitry allows for improved
load regulation. An optional undervoltage lockout pin
halts operation when the application input voltage is too
low. An optional external capacitor implements a soft­start function.

, LTC and LT are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

TYPICAL APPLICATIO

R2

35.7k
1%

D2

R3

3.01k
1%

BAS16

FB

V

1nF

UVLO

C

ON

47pF

Q1

2N3906

U

12V-18V to Isolated 15V Converter

240k

V

CC

OCMP

R

C3

0.1µF

CMPC

33k

LT1737

R

MINENAB

ENDLYOSCAP t

75k 150k 100k 4.7k 0.1µF

22µF

SGND

V

IN

+

C1

GATE

I

SENSE

PGND

T1

COILTRONICS

CTX150-4

•

150µH 150µH

•

M1
IRFL014

R1

0.27Ω

D1

MBRS1100

+

C2
33µF

NOTE: SEE APPLICATIONS
INFORMATION FOR ADDITIONAL
COMPONENT SPECIFICATIONS

R4

7.5k

V
I

OUT

OUT

= 15V

= 300mA

1737 TA01

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LT1737

PACKAGE/ORDER I FOR ATIO

UU

W

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

VCC Supply Voltage................................................. 22V

UVLO Pin Voltage .................................................... V

I

Pin Voltage .................................................... 2V

SENSE

FB Pin Current ..................................................... ± 2mA

Operating Junction
Temperature Range

LT1737C ............................................... 0°C to 100°C

LT1737I ............................................ –40°C to 125°C

Storage Temperature Range ................ – 65°C to 150°C

Lead Temperature (Soldering, 10 sec)................ 300°C

CC

TOP VIEW

1

PGND

2

I

SENSE

3

SFST

4

R

OCMP

5

R

CMPC

6

OSCAP

7

V

C

8

FB

GN PACKAGE

16-LEAD PLASTIC SSOP

T

= 125°C, θJA = 110°C/W (GN)

JMAX

= 125°C, θJA = 110°C/W (SO)

T

JMAX

16

GATE

15

V

CC

14

t

ON

13

ENDLY

12

MINENAB

11

SGND

10

UVLO

9

3V

OUT

S PACKAGE

16-LEAD PLASTIC SO

ORDER PART

NUMBER

LT1737CGN
LT1737CS
LT1737IGN
LT1737IS

GN PART MARKING

1737
1737I

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VCC = 14V, GATE open, VC = 1.4V unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Power Supply

V

CC(MIN)

I

CC

Feedback Amplifier

V

FB

I

FB

g

m

I

, I

SRC

V

CL

Gate Output

V

GATE

I

GATE

t

r

t

f

Minimum Input Voltage ● 4.1 4.5 V

Supply Current VC = Open ● 10 15 mA
Shutdown Current V

= 0V, VC = Open ● 50 150 µA

UVLO

Feedback Voltage 1.230 1.245 1.260 V

● 1.220 1.270 V

Feedback Pin Input Current 500 nA
Feedback Amplifier Transconductance ∆lC = ±10µA ● 400 1000 1800 µmho

Feedback Amplifier Source or Sink Current ● 30 50 80 µA

SNK

Feedback Amplifier Clamp Voltage 2.5 V
Reference Voltage/Current Line Regulation 4.75V ≤ VIN ≤ 18V ● 0.01 0.05 %/V

Voltage Gain VC = 1V to 2V 2000 V/V

Soft-Start Charging Current V

Soft-Start Discharge Current V

Output High Level I

Output Low Level I

Output Sink Current in Shutdown, V

UVLO

= 0V V

= 0V 25 40 50 µA

SFST

= 1.5V, V

SFST

= 100mA ● 11.5 12.1 V

GATE

= 500mA ● 11.0 11.8 V

I

GATE

= 100mA ● 0.3 0.45 V

GATE

I

= 500mA ● 0.6 1.0 V

GATE

= 2V ● 1.2 2.5 mA

GATE

= 0V 0.8 1.5 mA

UVLO

Rise Time CL = 1000pF 30 ns

Fall Time CL = 1000pF 30 ns

2

1737fa

LT1737

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at T

The ● denotes specifications which apply over the full operating

= 25°C. VCC = 14V, GATE open, VC = 1.4V unless otherwise noted.

A

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Current Amplifier

V

C

V

ISENSE

Control Pin Threshold Duty Cycle = Min 0.90 1.12 1.25 V

● 0.80 1.35 V

Switch Current Limit Duty Cycle ≤ 30% 220 250 270 mV

Duty Cycle ≤ 30%

● 200 280 mV

Duty Cycle = 80% 220 mV

∆V

ISENSE

/∆V

C

0.30 mV

Timing

f Switching Frequency C

C

OSCAP

t

ON

t

ED

t

EN

R

t

Oscillator Capacitor Value (Note 2) 33 200 pF

Minimum Switch On Time R

Flyback Enable Delay Time R

Minimum Flyback Enable Time R
Timing Resistor Value (Note 2) 24 240 kΩ

= 100pF 90 100 115 kHz

OSCAP

= 50k 200 ns

tON

= 50k 200 ns

ENDLY

= 50k 200 ns

MENAB

● 80 125 kHz

Maximum Switch Duty Cycle ● 85 90 %

Load Compensation

Sense Offset Voltage 25mV

Current Gain Factor 0.80 0.95 1.05 mV

UVLO Function

V

UVLO

UVLO Pin Lockout Threshold ● 1.21 1.25 1.29 V

UVLO Pin Shutdown Threshold 0.75 V

● 0.4 0.95 V

I

UVLO

UVLO Pin Bias Current V

= 1.2V –0.25 + 0.1 +0.25 µA

UVLO

= 1.3V –4.50 – 3.5 –2.50 µA

V

UVLO

3V Output Function

V

REF

Reference Output Voltage I

= 1mA ● 2.8 3.0 3.2 V

LOAD

Output Impedance 10 Ω

Current Limit ● 815 mA

Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.

Note 2: Component value range guaranteed by design.

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LT1737

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TYPICAL PERFOR A CE CHARACTERISTICS

Minimum Input Voltage vs
Temperature Shutdown I

4.3

4.2

4.1

4.0

3.9

MINIMUM INPUT VOLTAGE (V)

3.8
–50

–25

25

0

TEMPERATURE (°C)

50

75

100

125

1737 G01

125

100

(µA)

75

CC

50

SHUTDOWN I

25

0

–50

UVLO Pin Input Current vs

Supply Current vs Temperature

13

12

11

10

SUPPLY CURRENT (mA)

9

Temperature

1

0

–1

–2

–3

–4

UVLO PIN INPUT CURRENT (µA)

–5

0

–25

TEMPERATURE (°C)

vs Temperature

CC

50

V

UVLO

V

25

UVLO

75

= 1.2V

= 1.3V

100

1737 G02

125

Shutdown Voltage (V
Temperature

1.0

0.9

(V)

UVLO

0.8

0.7

0.6

SHUTDOWN VOLTAGE V

0.5

0.4
–50

–25 0

25 75

TEMPERATURE (°C)

Oscillator Frequency vs
Temperature

115

110

105

100

95

OSCILLATOR FREQUENCY (kHz)

90

) vs

UVLO

50 100 125

1737 G03

(V)

GATE

V

4

1.0

0.8

0.6

0.4

0.2

8

0

–50

V

1

–25

GATE

0

TEMPERATURE (°C)

vs I

SINK

10 100 1000

I

SINK

75

TA = 125°C

TA = 25°C

(mA)

50

25

100

1737 G04

TA = –55°C

1737 G07

125

–0.5

–1.0

(V)

GATE

–1.5

-V
CC

V

–2.0

–2.5

–3.0

–6

–50

0

1

–25 0

VCC-V

TA = –55°C

50 100 125

25 75

TEMPERATURE (°C)

vs I

GATE

SOURCE

TA = 125°C

TA = 25°C

10 100 1000

I

(mA)

SOURCE

1737 G05

1737 G08

85

–50

–25 0

TEMPERATURE (°C)

50 100 125

25 75

VC Clamp Voltage, Switching
Threshold vs Temperature

3.0

2.5

2.0

1.5

1.0
SWITCHING THRESHOLD

0.5

CLAMP VOLTAGE, SWITCHING THRESHOLD (V)

C

0

V

–50

–25 0

TEMPERATURE (°C)

CLAMP VOLTAGE

50 100 125

25 75

1737 G06

1737 G09

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TYPICAL PERFOR A CE CHARACTERISTICS

LT1737

Minimum Switch On Time vs
Temperature

275

R

= 50k

TON

250

225

200

175

MINIMUM SWITCH ON TIME (ns)

150

125

–50

–25 0

25 75

TEMPERATURE (°C)

Feedback Amplifier Output Current
vs FB Pin Voltage

80

60

40

20

0

–20

–40

–60

FEEDBACK AMPLIFIER OUTPUT CURRENT (µA)

–80

1.05

Minimum Enable Time vs
Temperature

275

250

225

200

175

MINIMUM ENABLE TIME (ns)

150

50 100 125

1737 G10

TA = 25°C

1.15 1.25

1.10 1.20 1.30 1.40

TA = –55°C

FB PIN VOLTAGE (V)

125

–50

TA = 125°C

1.35

R

MINENAB

–25 0

1737 G13

= 50k

25 75

TEMPERATURE (°C)

50 100 125

1737 G11

Feedback Amplifier
Transconductance vs Temperature

1600

1400

1200

1000

800

600

400

200

–50

FEEDBACK AMPLIFIER TRANSCONDUCTANCE (µmho)

–25 0

Enable Delay Time vs
Temperature

275

250

225

200

175

ENABLE DELAY TIME (ns)

150

125

–50

–25 0

50 100 125

25 75

TEMPERATURE (°C)

50 100 125

25 75

TEMPERATURE (°C)

1737 G14

1737 G12

Soft-Start Charging Current vs
Temperature

60

50

40

30

20

10

SOFT-START CHARGING CURRENT (µA)

0

–50

–25 0

TEMPERATURE (°C)

50 100 125

25 75

V(SFST) = 0V

1737 G15

Soft-Start Sink Current vs
Temperature

2.5

2.0

1.5

1.0

0.5

SOFT-START SINK CURRENT (mA)

0

–50

0

–25

TEMPERATURE (°C)

50

25

V(SFST) = 1.5V

75

100

125

1737 G16

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LT1737

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PI FU CTIO S

PGND (Pin 1): The power ground pin carries the GATE
node discharge current. This is typically a current spike of
several hundred mA with a duration of tens of nanosec­onds. It should be connected directly to a good quality
ground plane.

(Pin 2): Pin to measure switch current with external

I

SENSE

sense resistor. The sense resistor should be of a nonin­ductive construction as high speed performance is essen­tial. Proper grounding technique is also required to avoid
distortion of the high speed current waveform. A preset
internal limit of nominally 250mV at this pin effects a
switch current limit.

SFST (Pin 3): Pin for optional external capacitor to effect
soft-start function. See Applications Information for
details.

R

(Pin 4): Input pin for optional external load com-

OCMP

pensation resistor. Use of this pin allows nominal com­pensation for nonzero output impedance in the power
transformer secondary circuit, including secondary wind­ing impedance, output Schottky diode impedance and
output capacitor ESR. In less demanding applications, this
resistor is not needed. See Applications Information for
more details.

R

(Pin 5): Pin for external filter capacitor for optional

CMPC

load compensation function. A common 0.1µF ceramic
capacitor will suffice for most applications. See Applica­tions Information for further details.

OSCAP (Pin 6): Pin for external timing capacitor to set
oscillator switching frequency. See Applications Informa­tion for details.

VC (pin 7):
output of the feedback amplifier and the input of the
current comparator. Frequency compensation of the
overall loop is effected in most cases by placing a
capacitor between this node and ground.

This is the control voltage pin which is the

3V

(Pin 9): Output pin for nominal 3V reference. This

OUT

facilitates various user applications. This node is internally
current limited for protection and is intended to drive
either moderate capacitive loads of several hundred pF or
less, or, very large capacitive loads of 0.1µF or more. See
Applications Information for more details.

UVLO (Pin 10): This is a dual function pin that implements
both undervoltage lockout and shutdown functions. Pull­ing this pin to near ground effects shutdown and reduces
quiescent current to tens of microamperes.

Additionally, an external resistor divider between VIN and
ground may be connected to this pin to implement an
undervoltage lockout function. The bias current on this pin
is a function of the state of the UVLO comparator; as the
threshold is exceeded, the bias current increases. This
creates a hysteresis band equal to the change in bias
current times the Thevenin impedance of the user’s resis­tive divider. The user may thereby adjust the impedance of
the UVLO divider to achieve a desired degree of hysteresis.
A 100pF capacitor to ground is recommended on this pin.
See Application Information for details.

SGND (Pin 11): The signal ground pin is a clean ground.
The internal reference, oscillator and feedback amplifier
are referred to it. Keep the ground path connection to the
FB pin, OSCAP capacitor and the VC compensation capaci­tor free of large ground currents.

MINENAB (Pin 12): Pin for external programming resistor
to set minimum enable time. See Applications Information
for details.

ENDLY (Pin 13): Pin for external programming resistor to
set enable delay time. See Applications Information for
details.

tON (Pin 14): Pin for external programming resistor to set
switch minimum on time. See Applications Information
for details.

FB (Pin 8): Input pin for external “feedback” resistor
divider. The ratio of this divider, times the internal band­gap (VBG) reference, times the effective transformer turns
ratio is the primary determinant of the output voltage. The
Thevenin equivalent resistance of the feedback divider
should be roughly 3k. See Applications Information for
more details.

6

VCC (Pin 15): Supply voltage for the LT1737. Bypass this
pin to ground with 1µF or more.

GATE (Pin 16): This is the gate drive to the external power
MOSFET switch and has large dynamic currents flowing
through it. Keep the trace to the MOSFET as short as
possible to minimize electromagnetic radiation and volt­age spikes. A series resistance of 5Ω or more may help to
dampen ringing in less than ideal layouts.

1737fa

BLOCK DIAGRA

UVLO

BIAS

V

W

CC

3V

OUT

3V REG
(INTERNAL)

LT1737

OSCAP

FB

OSC

FDBK

MINENABt

ON

LOGIC

V

C

ENDLY

MOSFET

DRIVER

PGND

COMP

SOFT-START

SFST R

COMPENSATION

R

OCMP

LOAD

I

AMP

CMPC

1737 BD

GATE

I

SENSE

SGND

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LT1737

UWW

TI I G DIAGRA

V

SW

VOLTAGE

V

IN

GND

SWITCH

STATE

OFF ON

MINIMUM t

ON

FLYBACK AMP

STATE

ENABLE DELAY

MINIMUM ENABLE TIME

V

FLBK

OFF ON

ENABLEDDISABLED DISABLED

0.80×
V

FLBK

COLLAPSE
DETECT

1737 TD

W

FLYBACK ERROR A PLIFIER

V

IN

M1

R1

FB

Q1 Q2

R2

I

T1

•

D1

•

+

C1

+

ISOLATED

V

OUT

–

•

I

M

V

BG

I

FXD

V

C

ENAB

C2

I

M

1737 EA

8

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OPERATIO

LT1737

U

The LT1737 is a current mode switcher controller IC
designed specifically for the isolated flyback topology. The
Block Diagram shows an overall view of the system. Many
of the blocks are similar to those found in traditional
designs, including: Internal Bias Regulator, Oscillator,
Logic, Current Amplifier and Comparator, Driver and Out­put Switch. The novel sections include a special Flyback
Error Amplifier and a Load Compensation mechanism.
Also, due to the special dynamic requirements of flyback
control, the Logic system contains additional functionality
not found in conventional designs.

The LT1737 operates much the same as traditional current
mode switchers, the major difference being a different
type of error amplifier that derives its feedback informa­tion from the flyback pulse. Due to space constraints, this
discussion will not reiterate the basics of current mode
switcher/controllers and isolated flyback converters. A
good source of information on these topics is Application
Note AN19.

ERROR AMPLIFIER—PSEUDO DC THEORY

Please refer to the simplified diagram of the Flyback Error
Amplifier. Operation is as follows: when MOSFET output
switch M1 turns off, its drain voltage rises above the V

IN

rail. The amplitude of this flyback pulse as seen on the third
winding is given as:

V V I ESR

V

FLBK

=

N

++

()

OUT F SEC

•

ST

The relatively high gain in the overall loop will then cause
the voltage at the FB pin to be nearly equal to the bandgap
reference V

. The relationship between V

BG

FLBK

and V

BG

may then be expressed as:

RR

+

12

V

FLBK BG

()

=

Combination with the previous V
expression for V

V

R

2

expression yields an

FLBK

in terms of the internal reference,

OUT

programming resistors, transformer turns ratio and diode
forward voltage drop:

VV

=

OUT BG

12

()

RN

⎛

⎞

1

V I ESR

–– •

⎟
⎠

F SEC

⎜

2

⎝

ST

RR

+

Additionally, it includes the effect of nonzero secondary
output impedance, which is discussed in further detail, see
Load Compensation Theory. The practical aspects of
applying this equation for V

are found in the Applica-

OUT

tions Information section.

So far, this has been a pseudo-DC treatment of flyback
error amplifier operation. But the flyback signal is a pulse,
not a DC level. Provision must be made to enable the
flyback amplifier only when the flyback pulse is present.
This is accomplished by the dotted line connections to the
block labeled “ENAB”. Timing signals are then required to
enable and disable the flyback amplifier.

ERROR AMPLIFIER—DYNAMIC THEORY

VF = D1 forward voltage
I

= transformer secondary current

SEC

ESR = total impedance of secondary circuit
NST = transformer effective secondary-to-third

winding turns ratio

The flyback voltage is then scaled by external resistor
divider R1/R2 and presented at the FB pin. This is then
compared to the internal bandgap reference by the differ­ential transistor pair Q1/Q2. The collector current from Q1
is mirrored around and subtracted from fixed current
source I

at the VC pin. An external capacitor integrates

FXD

this net current to provide the control voltage to set the
current mode trip point.

There are several timing signals that are required for
proper LT1737 operation. Please refer to the Timing
Diagram.

Minimum Output Switch On Time

The LT1737 effects output voltage regulation via flyback
pulse action. If the output switch is not turned on at all,
there will be no flyback pulse and output voltage informa­tion is no longer available. This would cause irregular loop
response and start-up/latchup problems. The solution cho­sen is to require the output switch to be on for an absolute
minimum time per each oscillator cycle. This in turn estab­lishes a minimum load requirement to maintain regula­tion. See Applications Information for further details.

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