The use of switching regulators increased dramatically in
the 1980’s and this trend remains strong going into the
90s. The reasons for this are simple; heat and efficiency.
Today’s systems are shrinking continuously, while simultaneously offering greater electronic “horsepower.” This
combination would result in unacceptably high internal
temperatures if low efficiency linear supplies were used.
Heat sinks do not solve the problem in general because
most systems are closed, with low thermal transfer from
“inside” to “outside.”
Battery-powered systems need high efficiency supplies for
long battery life. Topological considerations also require
switching technology. For instance, a battery cannot
generate an output higher than itself with linear supplies.
The availability of low cost rechargeable batteries has created a spectacular rise in the number of battery-powered
systems, and consequently a matching rise in the use of
switching regulators.
®
The LT
1074 and LT1076 switching regulators are designed
specifically for ease of use. They are close to the ultimate
“three terminal box” concept which simply requires an
input, output and ground connection to deliver power to
the load. Unfortunately, switching regulators are not horseshoes, and “close” still leaves room for egregious errors
in the final execution. This application note is intended to
eliminate the most common errors that customers make
with switching regulators as well as offering some insight
into the inner workings of switching designs. There is also
an entirely new treatment of inductor design based on the
mathematical models of core loss and peak current. This
allows the customer to quickly see the allowable limits for
inductor value and make an intelligent decision based on
the need for cost, size, etc. The procedure differs greatly
from previous design techniques and many experienced
designers at first think it can’t work. They quickly become
silent after standard laborious trial-and-error techniques
yield identical results.
There is an old adage in woodworking — “Measure twice,
cut once.” This advice holds for switching regulators, also.
Read AN44 through quickly to familiarize yourself with the
contents. Then reread the pertinent sections carefully to
avoid “cutting” the design two, three, or four times. Some
switching regulator errors, such as excessive ripple current in capacitors, are time bombs best fixed before they
are expensive field failures.
Since this paper was originally written, Linear Technology
has produced a CAD program for switching regulators
®
called LTspice.
A spice simulator, LTspice, has been
developed and optimized for switching regulator simulation. IC models for switching regulators with fast transient
simulation allow regulator circuits to be simulated for
transient response without resorting to linearized models.
Once the basic design concepts are understood, trial designs can be quickly checked and modified on the simulator.
Start-up, dropout, regulation, ripple and transient response
are available from the simulator. The output correlates well
with the actual circuit on a well laid-out board.
LTspice can be downloaded free from www.linear.com.
L, LT, LTC, LTM, SwitcherCAD, LTspice, Linear Technology and the Linear logo are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
Status WindowAs a Percent of Feedback Voltage4±56%
Status High LevelI
Status Low LevelI
= 10µA Sourcing
STATUS
= 1.6mA Sinking
STATUS
l
3.54.55.0V
l
0.250.4V
Status Delay Time9µs
Status Minimum Width30µs
Thermal Resistance Junction to CaseLT1074
LT1076
2.5
4.0
°C/W
°C/W
l denotes the specifications which apply over the full operating
The
temperature range.
Note 1: To calculate maximum switch on voltage at currents between low
and high conditions, a linear interpolation may be used.
Note 2: A feedback pin voltage (V
) of 2.5V forces the VC pin to its low
FB
clamp level and the switch duty cycle to zero. This approximates the zero
load condition where duty cycle approaches zero.
Note 3: Total voltage from V
pin to ground pin must be ≥ 8V after start-
IN
up for proper regulation.
AN44-4
Note 4: Switch frequency is internally scaled down when the feedback pin
voltage is less than 1.3V to avoid extremely short switch on times. During
testing, V
Note 5:
is adjusted to give a minimum switch on time of 1µs.
FB
I
LIM
R
–1k
LIM
≈
LT1047
()
2k
R
–1k
LIM
LIM
≈
LT1076
()
5.5k
,I
Note 6: Switch to input voltage limitation must also be observed.
Note 7: V
= 40V for the LT1074/76 and 60V for the LT1074HV/76HV.
MAX
Note 8: Does not include switch leakage.
an44fa
BLOCK DIAGRAM
Application Note 44
INPUT SUPPLY
10µA
SHUTDOWN*
OUTPUT
VOLTAGE
MONITOR
STATUS**
2.21V
0.3V
+
µPOWER
SHUTDOWN
–
2.35V
+
–
+
–
FBV
CURRENT
SHUTDOWN
A1
ERROR
AMP
LIMIT
6V
REGULATOR
AND BIAS
I *
LIM
MULTIPLIER
X
24V (EQUIVALENT)
C
FREQ SHIFT
SYNC
V
IN
Z
ANALOG
XY
Z
Y
320µA
6V TO ALL
CIRCUITRY
100kHz
OSCILLATOR
3V(
P-P
)
+
C1
–
4.5V
PULSE WIDTH
COMPARATOR
10k
S
R
R/S
LATCH
R
CURRENT
LIMIT
COMP
Q
LT1076
LT1074
500
+
C2
250
0.04
–
G1
400
15
SWITCH
OUTPUT
(V )
SW
AVAILABLE ONLY ON PACKAGES WITH PIN COUNTS GREATER THAN 5.
*
AVAILABLE ONLY ON LT1176 FAMILY.
**
0.1
100
SWITCH
OUTPUT (V )
SW
-5t#%
an44fa
AN44-5
Application Note 44
BLOCK DIAGRAM DESCRIPTION
A switch cycle in the LT1074 is initiated by the oscillator
setting the R/S latch. The pulse that sets the latch also
locks out the switch via gate G1. The effective width of this
pulse is approximately 700ns, which sets the maximum
switch duty cycle to approximately 93% at 100kHz switching frequency. The switch is turned off by comparator C1,
which resets the latch. C1 has a sawtooth waveform as one
input and the output of an analog multiplier as the other
input. The multiplier output is the product of an internal
reference voltage, and the output of the error amplifier,
A1, divided by the regulator input voltage. In standard
buck regulators, this means that the output voltage of A1
required to keep a constant regulated output is independent of regulator input voltage. This greatly improves line
transient response, and makes loop gain independent of
input voltage. The error amplifier is a transconductance
type with a G
at null of approximately 5000µmho. Slew
M
current going positive is 140µA, while negative slew current
is about 1.1mA. This asymmetry helps prevent overshoot
on startup. Overall loop frequency compensation is accomplished with a series RC network from V
to ground.
C
Switch current is continuously monitored by C2, which
resets the R/S latch to turn the switch off if an overcurrent condition occurs. The time required for detection
and switch turn-off is approximately 600ns. So minimum
switch on time in current limit is 600ns. Under dead
shorted output conditions, switch duty cycle may have
to be as low as 2% to maintain control of output current.
This would require switch on time of 200ns at 100kHz
switching frequency, so frequency is reduced at very
low output voltages by feeding the FB signal into the
oscillator and creating a linear frequency downshift when
the FB signal drops below 1.3V. Current trip level is set by
the voltage on the I
pin which is driven by an internal
LIM
320µA current source. When this pin is left open, it selfclamps at about 4.5V and sets current limit at 6.5A for
the LT1074 and 2.6A for the LT1076. In the 7-pin package
an external resistor can be connected from the I
LIM
pin to
ground to set a lower current limit. A capacitor in parallel
with this resistor will soft-start the current limit. A slight
offset in C2 guarantees that when the I
pin is pulled
LIM
to within 200mV of ground, C2 output will stay high and
force switch duty cycle to zero.
The shutdown pin is used to force switch duty cycle to zero
by pulling the I
pin low, or to completely shut down
LIM
the regulator. Threshold for the former is approximately
2.35V, and for complete shutdown, approximately 0.3V.
Total supply current in shutdown is about 150µA. A 10µA
pull-up current forces the shutdown pin high when left
open. A capacitor can be used to generate delayed startup. A resistor divider will program “undervoltage lockout”
if the divider voltage is set at 2.35V when the input is at
the desired trip point.
The switch used in the LT1074 is a Darlington NPN (single
NPN for LT1076) driven by a saturated PNP. Special patented circuitry is used to drive the PNP on and off very
quickly even from the saturation state. This particular
switch arrangement has no “isolation tubs” connected
to the switch output, which can therefore swing to 40V
below ground.
pin is both the supply voltage for internal control
IN
circuitry and one end of the high current switch. It is important, especially at low input voltages, that this pin be
bypassed with a low ESR, and low inductance capacitor
to prevent transient steps or spikes from causing erratic
operation. At full switch current of 5A, the switching transients at the regulator input can get very large as shown
in Figure 1. Place the input capacitor very close to the
regulator and connect it with wide traces to avoid extra
inductance. Use radial lead capacitors.
dI
L
( )
( )
P
dt
STEP =
I
( )( )
ESR
SW
Figure 1. Input Capacitor Ripple
RAMP =
TI
( )( )
ON
SW
C
"/t'
LP = Total inductance in input bypass connections
and capacitor.
“Spike” height is
⎛
dI
⎜
⎝
dt
⎞
• L
⎟
approximately 2V per
P
⎠
inch of lead length.
Step = 0.25V for ESR = 0.05Ω and I
Ramp = 125mV for C = 200µF, t
and I
Input current on the V
= 5A is 125mV.
SW
Pin in shutdown mode is the
IN
ON
= 5A is 0.25V.
SW
= 5µs,
sum of actual supply current (≈140µA, with a maximum
of 300µA) and switch leakage current. Consult factory for
special testing if shutdown mode input current is critical.
GROUND PIN
It might seem unusual to describe a ground pin, but in
the case of regulators, the ground pin must be connected
properly to ensure good load regulation. The internal
reference voltage is referenced to the ground pin; so any
error in ground pin voltage will be multiplied at the output;
∆V
()
∆V
OUT
GND
=
V
()
OUT
2.21
To ensure good load regulation, the ground pin must be
connected directly to the proper output node, so that no
high currents flow in this path. The output divider resistor
should also be connected to this low current connection
line as shown in Figure 2.
-5
'#
GND
R2
HIGH CURRENT
RETURN PATH
Figure 2. Proper Ground Pin Connection
NEGATIVE OUTPUT NODE
WHERE LOAD REGULATION
WILL BE MEASURED
"/t'
FEEDBACK PIN
The feedback pin is the inverting input of an error amplifier which controls the regulator output by adjusting duty
cycle. The noninverting input is internally connected to a
trimmed 2.21V reference. Input bias current is typically
0.5µA when the error amplifier is balanced (I
error amplifier has asymmetrical G
for large input signals
M
= 0). The
OUT
to reduce start-up overshoot. This makes the amplifier
more sensitive to large ripple voltages at the feedback pin.
100mV
ripple at the feedback pin will create a 14mV
P-P
offset in the amplifier, equivalent to a 0.7% output voltage
shift. To avoid output errors, output ripple (
) should be
P-P
less than 4% of DC output voltage at the point where the
output divider is connected.
See the Error Amplifier section for more details.
Frequency Shifting at the Feedback Pin
The error amplifier feedback pin (FB) is used to downshift
the oscillator frequency when the regulator output voltage
is low. This is done to guarantee that output short-circuit
AN44-10
an44fa
PIN DESCRIPTIONS
Application Note 44
current is well controlled even when switch duty cycle
must be extremely low. Theoretical switch on time for a
buck converter in continuous mode is;
+ V
tON=
V
OUT
VIN• f
D
VD = Catch diode forward voltage ( ≈0.5V)
f = Switching frequency
At f = 100kHz, t
and the output is shorted (V
the LT1074 can reduce t
much too long to control current correctly for V
must drop to 0.2µs when VIN = 25V
ON
= 0V). In current limit,
OUT
to a minimum value of ≈0.6µs,
ON
= 0. To
OUT
correct this problem, switching frequency is lowered from
100kHz to 20kHz as the FB pin drops from 1.3V to 0.5V.
This is accomplished by the circuitry shown in Figure 3.
Q1 is off when the output is regulating (V
the output is pulled down by an overload, V
= 2.21V). As
FB
will eventu-
FB
ally reach 1.3V, turning on Q1. As the output continues
to drop, Q1 current increases proportionately and lowers
the frequency of the oscillator. Frequency shifting starts
when the output is ≈60% of normal value, and is down to
its minimum value of ≅20kHz when the output is ≅20%
of normal value. The rate at which frequency is shifted is
determined by both the internal 3k resistor R3 and the
external divider resistors. For this reason, R2 should not be
increased to more than 4k, if the LT1074 will be subjected
to the simultaneous conditions of high input voltage and
output short circuit.
SHUTDOWN PIN
The shutdown pin is used for undervoltage lockout,
micropower shutdown, soft-start, delayed start, or as a
general purpose on/off control of the regulator output.
It controls switching action by pulling the I
pin low,
LIM
which forces the switch to a continuous off state. Full
micropower shutdown is initiated when the shutdown pin
drops below 0.3V.
The V/I characteristics of the shutdown pin are shown in
Figure 4. For voltages between 2.5V and ≈V
, a current of
IN
10µA flows out of the shutdown pin. This current increases
to ≈25µA as the shutdown pin moves through the 2.35V
threshold. The current increases further to ≈30µA at the
0.3V threshold, then drops to ≈15µA as the shutdown voltage falls below 0.3V. The 10µA current source is included
to pull the shutdown pin to its high or default state when
left open. It also provides a convenient pull-up for delayed
start applications with a capacitor on the shutdown pin.
When activated, the typical collector current of Q1 in
Figure 5, is ≈2mA. A soft-start capacitor on the I
LIM
pin
will delay regulator shutdown in response to C1, by ≈(5V)
)/2mA. Soft-start after full micropower shutdown is
(C
LIM
ensured by coupling C2 to Q1.
TO
OSCILLATOR
V
OUT
2.21V
Q1
R3
3k
R1
EXTERNAL
DIVIDER
FB
R2
2.21k
"/t'
an44fa
2V
+
ERROR
V
AMPLIFIER
C
–
Figure 3. Frequency Shifting
AN44-11
Application Note 44
PIN DESCRIPTIONS
0
TJ¡$
o
CURRENT FLOWS OUT
–10
o
–20
o
CURRENT (µA)
–30
o
–40
Undervoltage Lockout
0'4)65%08/1*/
SHUTDOWN
THRESHOLD
1.02.0
0
VOLTAGE (V)
3.0 4.0
Figure 4. Shutdown Pin Characteristics
-5t51$
SHUTDOWN
PIN
10μA
300μA
–
C1
2.3V
+
–
C2
0.3V
+
Figure 5. Shutdown Circuitry
Q1
TO TOTAL
REGULATOR
SHUTDOWN
V
IN
I
LIM
PIN
6V
$1)
EXTERNAL
C
LIM
Undervoltage lockout point is set by R1 and R2 in Figure6.
To avoid errors due to the 10µA shutdown pin current, R2
is usually set at 5k, and R1 is found from:
–V
V
()
TP
R1= R2
SH
V
SH
VTP = Desired undervoltage lockout voltage.
= Threshold for lockout on the shutdown pin = 2.45V.
V
SH
If quiescent supply current is critical, R2 may be increased
up to 15k, but the denominator in the formula for R2 should
replace V
with VSH – (10µA)(R2).
SH
Hysteresis in undervoltage lockout may be accomplished
by connecting a resistor (R3) from the I
pin to the shut-
LIM
down pin as shown in Figure 7. D1 prevents the shutdown
divider from altering current limit.
R1
R2
5k
SHUT
V
IN
LT1074
GND
Figure 6. Undervoltage Lockout
V
R1
R2
*1N4148
D1*
R3
IN
SHUT
-5
I
LIM
OPTIONAL CURRENT
LIMIT RESISTOR
Figure 7. Adding Hysteresis
$1)
"/t'
AN44-12
an44fa
PIN DESCRIPTIONS
Application Note 44
Trip Point = VTP= 2.35V 1+
⎛
⎜
⎝
R2
⎞
⎟
⎠
R1
If R3 is added, the lower trip point (VIN descending) will
be the same. The upper trip point (V
R1
R2
R1
⎞
+
R3
–0.8V
⎟
⎠
V
UTP
⎛
= VSH1+
⎜
⎝
) will be:
UTP
⎛
⎜
⎝
R1
R3
⎞
⎟
⎠
If R1 and R2 are chosen, R3 is given by:
V
R3=
–0.8V
()
SH
V
–VSH1+
UTP
()
⎛
⎜
⎝
R1
R1
R2
⎞
⎟
⎠
Example: An undervoltage lockout is required such that
the output will not start until V
to operate until V
R1= 2.32k
()
drops to 15V. Let R2 = 2.32k.
IN
15V – 2.35V
()
= 20V, but will continue
IN
= 12.5k
2.35V
The status pin is modeled in Figure 8 with a 130µA pullup to a 4.5V clamp level. The sinking drive is a saturated
NPN with ≈100Ω resistance and a maximum sink current
of approximately 5mA. An external pull-up resistor can be
added to increase output swing up to a maximum of 20V.
When the status pin is used to indicate “output OK,” it
becomes important to test for conditions which might
create unwanted status states. These include output
overshoot, large-signal transient conditions, and excessive
output ripple. “False” tripping of the status pin can usually be controlled by a pulse stretcher network as shown
in Figure 8. A single capacitor (C1) will suffice to delay
an output “OK” (status high) signal to avoid false “true”
signals during start-up, etc. Delay time for status high will
4
be approximately (2.3 × 10
) (C1), or 23ms/µF. Status low
delay will be much shorter, ≈600µs/µF.
LT1074
130µA
R3=
20–2.35 1+
2.35 – 0.8
()
12.5
()
⎛
12.5
⎜
⎝
2.32
= 3.9k
⎞
⎟
⎠
STATUS PIN (AVAILABLE ONLY ON LT1176 PARTS)
The status pin is the output of a voltage monitor “looking”
at the feedback pin. It is low for a feedback voltage which
is more than 5% above or below nominal. “Nominal” in
this case means the internal reference voltage, so that the
±5% window tracks the reference voltage. A time delay
of ≈10µs prevents short spikes from tripping the status
low. Once it does go low, a second timer forces it to stay
low for a minimum of ≈30µs.
STATUS
4.5V
100
Figure 8. Adding Time Delays to Status Output
PIN
D1
R1
R2
D2
2k
R3
5V
C1
C2
C3
CMOS
SCHMIDT
TRIGGER
"/t'
an44fa
AN44-13
Application Note 44
PIN DESCRIPTIONS
If false tripping of status low could be a problem, R1
can be added. Delay of status high remains the same if
R1 ≤ 10k. Status low delay is extended by R1 to approximately R1 • C2 seconds. Select C2 for high delay and R1
for low delay.
Example: Delay status high for 10ms, and status low for
3ms:
C2 =
10ms
= 0.47μF Use 0.47µF
()
23ms /µF
3ms
R1=
C2
=
0.47µF
3ms
= 6.4kΩ
In this example D1 is not needed because R1 is small
enough to not limit the charging of C2.
If very fast low tripping combined with long high delays
is desired, use the D2, R2, R3, C3 configuration. C3 is
chosen first to set low delay:
t
LOW
C3 ≈
2kΩ
R3 is then selected for high delay:
t
HIGH
R3≈
For t
C3
= 100µs and t
LOW
= 10ms, C3 = 0.05µF and
HIGH
R3 = 200k.
= I
R
LIM
R
LIM
(2kΩ) + 1kΩ (LT1074)
LIM
= I
(5.5kΩ) + 1kΩ (LT1076)
LIM
As an example, a 3A current limit would require 3A (2k)
+ 1k = 7k for the LT1074. The accuracy of these formulas
is ±25% for 2A ≤ I
1.8A (LT1076), so I
≤ 5A (LT1074) and 0.7A ≤ I
LIM
should be set at least 25% above
LIM
LIM
≤
the peak switch current required.
TO LIMIT
CIRCUIT
R1
8k
V
IN
Q1
I
LIM
Figure 9. I
320µA
D2
D1
Pin Current
LIM
4.3V
D3
6V
"/t'
Foldback current limiting can be easily implemented by
adding a resistor from the output to the I
pin as shown
LIM
in Figure 10. This allows full desired current limit (with or
without R
) when the output is regulating, but reduces
LIM
current limit under short-circuit conditions. A typical value
for R
is 5k, but this may be adjusted up or down to set
FB
the amount of foldback. D2 prevents the output voltage
V
OUT
PIN
I
LIM
The I
pin is used to reduce current limit below the
LIM
preset value of 6.5A. The equivalent circuit for this pin is
shown in Figure 9.
When I
is left open, the voltage at Q1 base clamps at
LIM
5V through D2. Internal current limit is determined by the
current through Q1. If an external resistor is connected
between I
and ground, the voltage at Q1 base can be
LIM
reduced for lower current limit. The resistor will have a
voltage across it equal to (320µA) (R), limited to ≈5V
when clamped by D2. Resistance required for a given
current limit is:
AN44-14
-5
I
LIM
R
LIM
Figure 10. Foldback Current Limit
FB
R
D2
FB
1N4148
"/t'
an44fa
PIN DESCRIPTIONS
Application Note 44
from forcing current back into the I
value for R
RFB=
, first calculate R
FB
0.44*
I
()
−
SC
0.5* RL− 1k Ω
()
LIM
R
()
L
−I
SC
pin. To calculate a
LIM
, then RFB:
= RL inkΩ
*Change 0.44 to 0.16, and 0.5 to 0.18 for LT1076.
Example: I
RFB=
= 4A, ISC = 1.5A, R
LIM
()
1.5−0.44
0.5 9k − 1k
()
9kΩ
()
−1.5
= (4)(2k) + 1k = 9k:
LIM
= 3.8kΩ
ERROR AMPLIFIER
The error amplifier in Figure 11 is a single stage design
with added inverters to allow the output to swing above
and below the common mode input voltage. One side
of the amplifier is tied to a trimmed internal reference
voltage of 2.21V. The other input is brought out as the
FB (feedback) pin. This amplifier has a G
(voltage in to
M
current out) transfer function of ≈5000µmho. Voltage gain
is determined by multiplying G
times the total equivalent
M
output loading, consisting of the output resistance of Q4
and Q6 in parallel with the series RC external frequency
compensation network. At DC, the external RC is ignored,
and with a parallel output impedance for Q4 and Q6 of
400kΩ, voltage gain is ≈2000. At frequencies above a
few hertz, voltage gain is determined by the external
compensation, R
and CC.
C
Although f
mid-frequency gain is dependent only on G
varies as much as 3:1 due to rO variations,
POLE
, which is
M
specified much tighter on the data sheet. The higher frequency “zero” is determined solely by R
f
=
ZERO
2π•R
1
• C
C
C
and CC:
C
The error amplifier has asymmetrical peak output current. Q3 and Q4 current mirrors are unity gain, but the
Q6 mirror has a gain of 1.8 at output null and a gain of 8
when the FB pin is high (Q1 current = 0). This results in a
maximum positive output current of 140µA and a maximum
negative (sink) output current of ≅1.1mA. The asymmetry
is deliberate — it results in much less regulator output
overshoot during rapid start-up or following the release
of an output overload. Amplifier offset is kept low by area
scaling Q1 and Q2 at 1.8:1.
Amplifier swing is limited by the internal 5.8V supply for
positive outputs and by D1 and D2 when the output goes
low. Low clamp voltage is approximately one diode drop
(≈0.7V – 2mV/°C).
Note that both the FB pin and the V
pin have other in-
C
ternal connections. Refer to the frequency shifting and
synchronizing discussions.
5.8V
Q4
G
m
2π• f• C
at mid-frequencies
C
AV=
= Gm• RCat high frequencies
A
V
Phase shift from the FB pin to the VC pin is 90° at midfrequencies where the external C
is controlling gain, then
C
drops back to 0° (actually 180° since FB is an inverting
input) when the reactance of C
. The low frequency “pole” where the reactance of CC
R
C
is equal to the output impedance of Q4 and Q6 (r
f
=
POLE
2π • r
1
•C
0
r0≈ 400kΩ
is small compared to
C
), is:
O
90µA
Q3
50µA
Q2
Q1
X1.8
2.21V
140µA
"--$633&/544)08/"3&"5/6--$0/%*5*0/
'#
300
Figure 11. Error Amplifier
50µA
D2
90µA
EXTERNAL
D1
V
C
'3&26&/$:
COMPENSATION
90µA
R
Q6
C
C
C
"/t'
an44fa
AN44-15
Application Note 44
DEFINITION OF TERMS
: DC input voltage.
V
IN
': DC input voltage minus switch voltage loss. VIN' is
V
IN
1.5V to 2.3V less than V
: DC output voltage.
V
OUT
': DC output voltage plus catch diode forward voltage.
V
OUT
' is typically 0.4V to 0.6V more than V
V
OUT
, depending on switch current.
IN
.
OUT
f: Switching frequency.
: Maximum specified switch current IM = 5.5A for the
I
M
LT1074 and 2A for the LT1076.
: Switch current during switch on time. The current
I
SW
typically jumps to a starting value, then ramps higher. I
SW
is the average value during this period unless otherwise
stated. It is not averaged over the whole switching period,
which includes switch off time.
: DC output current.
I
OUT
: DC output current limit.
I
LIM
: Catch diode forward current. This is the peak current
I
DP
for discontinuous operation and the average value of the
current pulse during switch off time for continuous mode.
: Catch diode forward current averaged over one com-
I
DA
plete switching cycle. I
is used to calculate diode heating.
DA
∆I: Peak-to-peak ripple current in the inductor, also equal
to peak current in the discontinuous mode. ∆I is used to
calculate output ripple voltage and inductor core losses.
: Peak-to-peak output voltage ripple. This does not
V
P-P
include “spikes” created by fast rising currents and capacitor parasitic inductance.
: This is not really an actual rise or fall time. Instead,
t
SW
it represents the effective overlap time of voltage and current in the switch. t
is used to calculate switch power
SW
dissipation.
L: Inductance, usually measured with low AC flux density,
and zero DC current. Note that large AC flux density can
increase L by up to 30%, and large DC currents can decrease L dramatically (core saturation).
: Peak AC flux density in the inductor core, equal to
B
AC
one-half peak-to-peak AC flux density. Peak value is used
because nearly all core loss curves are plotted with peak
flux density.
N: Tapped-inductor or transformer turns ratio. Note the
exact definition of N for each application.
μ: Effective permeability of core material used in the
inductor. µ is typically 25-150. Ferrite material is much
higher, but is usually gapped to reduce the effective value
to this range.
: Effective core material volume (cm3).
V
e
: Effective core magnetic path length (cm).
L
e
: Effective core cross sectional area (cm2).
A
e
: Effective core or bobbin winding area.
A
w
: Average length of one turn on winding.
L
t
: Power dissipation caused by winding resistance. It
P
CU
does not include skin effect.
: Power loss in the magnetic core. PC depends only on
P
C
ripple current in the inductor not DC current.
E: Overall regulator efficiency. It is simply output power
divided by input power.
AN44-16
an44fa
Application Note 44
POSITIVE STEP-DOWN (BUCK) CONVERTER
The circuit in Figure 12 is used to convert a larger positive
input voltage to a lower positive output. Typical waveforms
are shown in Figure 13, with V
= 20V, V
IN
= 5V, L =
OUT
50µH, for both continuous mode (inductor current never
drops to zero) with I
= 3A and discontinuous mode,
OUT
where inductor current drops to zero during a portion
of the switching cycle (I
= 0.17A). Continuous mode
OUT
maximizes output power but requires larger inductors.
Maximum output current in true discontinuous mode is
only one-half of switch current rating. Note that when
load current is reduced in a continuous mode design,
eventually the circuit will enter discontinuous mode. The
LT1074 operates equally well in either mode and there is
no significant change in performance when load current
reduction causes a shift to discontinuous mode.
L1**
50µH (LT1074)
10V TO 40V
C3
200µF
100µH (LT1076)
LT1074
V
SW
MBR745*
FB
V
C
R3
2.7k
C2
0.01µF
R1
2.8k
1%
R2
2.21k
1%
V
IN
GND
5V
5A
++
C1
500µF
25V
I
OUT(CRIT)
()
OUT
=
VIN'–V
()
2 • VIN'• f • L
OUT
'
(2)
V
'
With the possible exception of load transient response,
there is no reason to increase L to ensure continuous
mode operation at light load.
Using the values from Figure 12, with V
0.5V, V
DC =
I
= 2V
SW
5 + 0.5
25 – 2
OUT(CRIT)
= 24%
=
223
23 – 5.5
5.5
()
()
5
10
()
()
50 • 10
()
= 25V, Vf =
IN
= 0.42A
–6
(3)
The “ringing” which occurs at some point in the switch off
cycle in discontinuous mode is simply the resonance created by the catch diode capacitance plus switch capacitance
in parallel with the inductor. This ringing does no harm
and any attempt to dampen it simply wastes efficiency.
Ringing frequency is given by:
f
RING
C
SW
=
2π
≈ 80pF
L • C
1
(4)
+ C
()
SW
DIODE
*USE MBR340 FOR LT1076
**COILTRONICS #50-2-52 (LT1074)
#100-1-52 (LT1076)
Figure 12. Basic Positive Buck Converter
PULSE ENGINEERING, INC.
#PE-92114 (LT1074)
#PE-92102 (LT1076)
Duty cycle of a buck converter in continuous mode is:
+ V
V
DC =
V
V
OUT
VIN–V
= Forward voltage of catch diode
f
= Voltage loss across on switch
SW
SW
f
=
V
OUT
V
IN
'
'
(1)
Note that duty cycle does not vary with load current except
to the extent that V
and VSW change slightly.
f
A buck converter will change from continuous to discontinuous mode (and duty cycle will begin to drop) at a load
current equal to:
C
= 200pF to 1000pF
DIODE
No off-state ringing occurs in continuous mode because
the diode is always conducting during switch off time and
effectively shorts the resonance.
A detailed look at the leading edge of the switch waveform
may reveal a second “ringing” tendency, usually at frequencies around 20MHz to 50MHz. This is the result of the
inductance in the loop which includes the input capacitor,
the LT1074 leads, and the diode leads, combined with
the capacitance of the catch diode. A total lead length of
4 inches will create ≈0.1µH. This coupled with 500pF of
diode capacitance will create a damped 25MHz oscillation
superimposed on the fast rising switch voltage waveform.
Again, no harm is created by this ringing and no attempt
should be made to dampen it other than minimizing lead
length. Certain board layouts combined with very short
interconnects and high diode capacitance may create a
tuned circuit which resonates with the switch output to
an44fa
AN44-17
Application Note 44
Continuous (I
0
–0.5V
0
≈13V
0
I = 3.4A
P
I = I = 3A
AVG
= 3A)Discontinuous (I
OUT
V
D
I = 3.4A
P
I
SW
V
L
≈5.5V
I
L
OUT
OUT
I ≈ 0.5A
P
= 0.16A)
V VOLTAGE (TO GND)
SW
(ALSO DIODE VOLTAGE)
5V/DIV
SWITCH CURRENT
1A/DIV
INDUCTOR VOLTAGE
5V/DIV
INDUCTOR CURRENT
1A/DIV
0
I = 3.4A
P
I
D
0
I
≈ 2.1A
AVG
0
2µs/DIV
Figure 13. Buck Converter Waveforms with VIN = 20V, L = 50μH
cause a low amplitude oscillation at the switch output
during on time. This can be eliminated with a ferrite bead
slipped over either diode lead during board assembly.
It is interesting to note that standard silicon fast recovery
diodes create almost no ringing because of their lower
capacitance and because they are effectively damped by
their slower turn-off characteristics. This slower turn-off
and the larger forward voltage represent additional power
loss, so Schottky diodes are normally recommended.
DIODE CURRENT
1A/DIV
OUTPUT CAPACITOR
CURRENT
1A/DIV
"/t'
Maximum output current of a buck converter is given by:
Continuous Mode
I
OUT M AX
= Maximum switch current (5.5A for LT1074)
I
M
= DC input voltage (maximum)
V
IN
V
OUT
= IM–
()
= Output voltage
V
VIN–V
()
OUT
2f • VIN• L
OUT
(5)
f = Switching frequency
an44fa
AN44-18
Application Note 44
For the example shown, with L = 50µH, and VIN = 25V,
525–5
I
OUT MAX
()
= 5.5 –
210
()
()
5
25
50 × 10
()
()
–6
= 5.1A
(6)
Note that increasing inductor size to 100µH would only
increase maximum output current by 4%, but decreasing
it to 20µH would drop maximum current to 4.5A. Low
inductance can be used for lower output currents, but
core loss will increase.
Inductor
The inductor used in a buck converter acts as both an
energy storage element and a smoothing filter. There is
a basic trade-off between good filtering versus size and
cost. Typical inductor values used with the LT1074 range
from 5µH to 200µH, with the small values used for lower
power, minimum size applications and the larger values
used to maximize output power or minimize output ripple
voltage. The inductor must be rated for currents at least
equal to output current and there are restrictions on
ripple current (expressed as volt • microsecond product
at various frequencies) to avoid core heating. For details
on selecting an inductor and calculating losses, see the
Inductor Selection section.
Output Catch Diode
D1 is used to generate a current path for L1 current when
the LT1074 switch turns off. The current through D1 in
continuous mode is equal to output current with a duty
cycle of (V
IN
– V
)/VIN. For low input voltages, D1 may
OUT
operate at duty cycles of 50% or less, but one must be very
careful of utilizing this fact to minimize diode heat sinking.
First, an unexpected high input voltage will cause duty
cycle to increase. More important however, is a shorted
output condition. When V
= 0, diode duty cycle is ≈1
OUT
for any input voltage. Also, in current limit, diode current
is not load current, but is determined by LT1074 switch
current limit. If continuous output shorts must be tolerated,
D1 must be adequately rated and heat sunk. 7 and 11-pin
versions of the LT1074 allow current limit to be reduced
to limit diode dissipation. 5-pin versions can be accurately
current limited using the technique shown in Figure 20.
Under normal conditions, D1 dissipation is given by:
VIN–V
PDI= I
is the forward voltage of D1 at I
V
f
OUT
()
OUT
• V
V
IN
f
current. Schottky
OUT
(7)
diode forward voltage is typically 0.6V at the diode’s full
rated current, so it is normal design practice to use a
diode rated at 1.5 to 2 times output current to maintain
efficiency and allow margin for short-circuit conditions.
This derating allows V
Example: V
= 0.5V:
V
f
IN(MAX)
to drop to approximately 0.5V.
f
= 25V, I
OUT
= 3A, V
= 5V, assume
OUT
Full Load
PDI=
25– 5
3
()
()
0.5V
()
25
= 1.2W
Shorted Output
PDI = (≈6A)(DC = 1)(0.6V) = 3.6W
The high diode dissipation under shorted output conditions
may necessitate current limit adjustment if adequate heat
sinking cannot be provided.
Diode switching losses have been neglected because the
reverse recovery time is assumed to be short enough
to ignore. If a standard silicon diode is used, switching
losses cannot be ignored. They can be approximated by:
≈(VIN)(f)(trr)(I
Pt
rr
= Diode reverse recovery time
t
rr
Example: Same circuit with t
= (25)(105)(10–7)(3) = 0.75W (10)
Pt
rr
) (9)
OUT
= 100ns:
rr
Diodes with abrupt turn-off characteristics will transfer
most of this power to the LT1074 switch. Soft recovery
diodes will dissipate much of the power within the diode
itself.
an44fa
AN44-19
Application Note 44
LT1074 Power Dissipation
The LT1074 draws about 7.5mA quiescent current, independent of input voltage or load. It draws an additional
5mA during switch on time. The switch itself dissipates
a power approximately proportional to load current. This
power is due to pure conduction losses (switch on voltage
times switch current) and dynamic switching losses due
to finite switch current rise and fall times. Total LT1074
power dissipation can by calculated from:
P = VIN7mA + 5mA • DC + 2I
DC = Duty Cycle ≈
t
SW
≈50ns + (3ns/A)(I
≈60ns + (10ns/A)(I
Example: V
DC =
⎡
⎣
⎡
DC I
⎢
⎣
1.8V
()
OUT
*+ 0.1Ω*I
+ 0.5V
V
OUT
V
–2V
IN
= Effective overlap time of switch voltage and current
) (LT1074)
OUT
) (LT1076)
OUT
= 25V, V
IN
5 + 0.5
= 0.196
= 5V, f = 100kHz, I
OUT
• tSW• f
OUT
2
()
OUT
⎤
⎦
⎤
⎥
⎦
OUT
+
(11)
= 3A:
(12)
25 – 2
t
= 50ns + 3ns/A
SW
()
P =
7mA + 5mA (0.196) +
25+ 0.196 3 (1.8) + 0.1 (3)
(2) (3) (59ms) (10
3A
()
5
)
= 59ns
(13)
2
= 0.21W + 0.89W + 1.24W = 2.34W
Supply
Current
Loss
Dynamic
Switching
Loss
Switch
Conduction
Loss
*LT1076 = 1V, 0.3Ω
Input Capacitor (Buck Converter)
A local input bypass capacitor is normally required for
buck converters because the input current is a square wave
with fast rise and fall times. This capacitor is chosen by
ripple current rating—the capacitor must be large enough
to avoid overheating created by its ESR and the AC RMS
value of converter input current. For continuous mode:
I
AC,RMS
= I
OUT
Worst case is at V
IN
V
= 2V
VIN–V
()
OUT
V
()
.
OUT
IN
OUT
2
(14)
Power loss in the input capacitor is not insignificant in
high efficiency applications. It is simply RMS capacitor
current squared times ESR:
= (I
P
C3
Example: V
Worst case is at V
value of 20V:
V
IN
I
AC,RMS
)2 (ESR) (15)
AC,RMS
= 20V to 30V, I
IN
= 2 • V
IN
520–5
= 3A
()
20
()
2
= 3A, V
OUT
= 10V, so use the closest
OUT
= 1.3ARMS
OUT
= 5V.
(16)
The input capacitor must be rated at a working voltage
of 30V minimum and 1.3A ripple current. Ripple current
ratings vary with maximum ambient temperature, so check
data sheets carefully.
It is important to locate the input capacitor very close to
the LT1074 and to use short leads (radial) when the DC
input voltage is less than 12V. Spikes as high as 2V/inch
of lead length will appear at the regulator input. If these
spikes drop below ≈7V, the regulator will exhibit anomalous behavior. See V
Pin in the Pin Descriptions section.
IN
You may be wondering why no mention has been made
of capacitor value. That’s because it doesn’t really matter. Larger electrolytic capacitors are purely resistive (or
inductive) at frequencies above 10kHz, so their bypassing
impedance is resistive, and ESR is the controlling factor.
For input capacitors used with the LT1074, a unit which
meets ripple current ratings will provide adequate “bypassing” regardless of its capacitance value. Units with higher
voltage rating will have lower capacitance for the same
ripple current rating, but as a general rule, the volume
required to meet a given ripple current/ESR is fixed over
a wide range of capacitance/voltage rating. If the capacitor
chosen for this application has 0.1Ω ESR, it will have a
2
power loss of (1.3A)
(0.1Ω) = 0.17W.
AN44-20
an44fa
Application Note 44
Output Capacitor
In a buck converter, output ripple voltage is determined
by both the inductor value and the output capacitor:
Continuous Mode
ESR
()
()
V
=
P-P
Discontinuous Mode
V
= ESR
P-P
Note that only the ESR of the output capacitor is used
in the formula. It is assumed that the capacitor is purely
resistive at frequencies above 10kHz. If an inductor value
has been chosen, the formula can be rearranged to solve
for ESR to aid in selecting a capacitor.
Continuous Mode (18)
ESR MAX
()
Discontinuous Mode
()
=
V
⎛
V
2I
()
OUT
1–
OUT
⎜
⎝
L1
()f()
V
()
OUT
V
P-P
⎛
1–
⎜
⎝
OUT
L•f•V
L1
()f()
V
⎞
V
OUT
⎟
V
⎠
IN
VIN–V
()
OUT
V
IN
IN
⎞
⎟
⎠
OUT
(17)
A 10V capacitor with this ESR would have to be several
thousand microfarads, and therefore fairly large. Trade-offs
which could be made include:
A. Paralleling several capacitors if component height is
more critical than board area.
B. Increasing inductance. This can be done at no increase
in size if a more expensive core (molypermalloy, etc.)
is used.
C. Adding an output filter. This is often the best solution
because the additional components are fairly low cost
and their additional space is minimized by being able
to “size down” the main L and C. See the Output Filter
section.
Although ripple current is not usually a problem with
buck converter output capacitors because the current
is pre-filtered by the inductor, a quick check should be
done before a final capacitor is chosen—especially if the
capacitor has been “downsized” to take advantage of an
additional output filter. RMS ripple current into the output
capacitor is:
Continuous Mode (20)
0.29 V
()
I
=
RMS
OUT
⎛
⎜
⎝
L1• f
1–
V
V
OUT
IN
⎞
⎟
⎠
L•f•V
ESR MAX
()
Worst-case output ripple is at highest input voltage.
Ripple is independent of load for continuous mode and
proportional to the square root of load current for discontinuous mode.
Example: Continuous mode with V
5V, I
OUT
peak-to-peak output ripple is 25mV.
ESR =
= V
P-P
2I
()
OUTVOUT
= 3A, L1 = 50µH, f = 100kHz. Required maximum
0.025
()
50 • 10
()
5
()
–6
10
()
5
⎛
⎜
⎝
1–
25
⎞
⎟
⎠
IN
VIN–V
()
IN(MAX)
5
= 0.03Ω
OUT
= 25V, V
OUT
(19)
=
From the previous example:
5
0.29 5
I
=
RMS
This ripple current is low enough to not be a problem, but
that could change if the inductor was reduced by two or
three to one and the output capacitor was minimized by
adding an output filter.
The calculations for discontinuous mode RMS ripple current were considered too complicated for this discussion,
but a conservative value would be 1.5 to 2 times output
current.
50 • 10
()
⎛
()
⎜
⎝
–6
⎞
1–
⎟
⎠
25
= 0.23ARMS
5
10
()
(21)
an44fa
AN44-21
Application Note 44
To minimize output ripple, the output terminals of the
regulator should be connected directly to the capacitor
leads so that the diode (D1) and inductor currents do not
circulate in output leads.
Efficiency
All the losses except those created by the inductor and the
output filter are covered in this buck regulator section. The
example used was a 5V, 3A output with 25V input. Calculated losses were: switch, 1.24W; diode, 1.2W; switching
times, 0.89W; supply current, 0.21W; and input capacitor,
0.17W. Output capacitor losses were negligible . The sum
of all these losses is 3.71W. Inductor loss is covered in a
special section of this Application Note. Assume for this
application that inductor copper loss is 0.3W and core
loss is 0.15W. Total regulator loss is 4.16W. Efficiency is:
3A
E =
I
OUT
I
OUT
• V
• V
OUT
OUT
+ ΣP
=
L
3A
()
5V
()
()
5V
+ 4.16
()
= 78%
(22)
When considering improvements or trade-offs of particular
loss terms, keep in mind that a change in any one term
will be attenuated by efficiency squared. For instance, if
switch loss were reduced by 0.3W, this is 2% of the 15W
2
output power, but only a 2(0.8)
= 1.28% improvement
in efficiency.
Output Divider
R1 and R2 set DC output voltage. R2 is normally set at
2.21kΩ (a standard 1% value) to match the LT1074 reference voltage of 2.21V, giving a divider current of 1mA. R1
is then calculated from:
R2 V
()
R1 =
If R2 = 2.21kΩ, R1 = (V
OUT
V
REF
–V
REF
OUT
– V
REF
(23)
) kΩ
R2 may be scaled in either direction to suit other needs,
but an upper limit of 4kΩ is suggested to ensure that the
frequency shifting action created by the FB pin voltage is
maintained under shorted output conditions.
Output Overshoot
Switching regulators often exhibit start-up overshoot
because the 2-pole LC network requires a fairly low
unity-gain frequency for the feedback loop. The LT1074
has asymmetrical error amplifier slew rate to help reduce
overshoot, but it can still be a problem with certain combinations of L1C1 and C2R3. Overshoot should be checked
on all designs by allowing the output to slew from zero in
a no-load condition with maximum input voltage. This can
be done by stepping the input or by pulling the V
pin low
C
through a diode connected to a 0V to 10V square wave.
Worst-case overshoot can occur on recovery from an
output short because the V
pin must slew from its high
C
clamp state down to ≈1.3V. This condition is best checked
with the brute force method of shorting and releasing the
output.
If excessive output overshoot is found, the procedure for
reducing it to a tolerable level is to first try increasing the
compensation resistor. The error amplifier output must
slew negative rapidly to control overshoot and its slew
rate is limited by the compensation capacitor. The compensation resistor, however, allows the amplifier output to
“step” downward very rapidly before slewing limitations
begin. The size of this step is ≈(1.1mA)(R
increased to 3kΩ, the V
pin can respond very quickly to
C
). If RC can be
C
control output overshoot.
If loop stability cannot be maintained with R
= 3kΩ,
C
there are several other solutions. Increasing the size of
the output capacitor will reduce short-circuit-recovery
overshoot by limiting output rise time. Reducing current
limit will also help for the same reason. Reducing the
compensation capacitor below 0.05µF helps because the
pin can then slew an appreciable amount during the
V
C
allowable overshoot time.
The “final solution” to output overshoot is to clamp the
pin so that it does not have to slew as far to shut off
V
C
the output. The V
pin voltage in normal operation is
C
known fairly precisely because it is made independent of
everything except output voltage by the internal multiplier:
AN44-22
an44fa
Application Note 44
V
VCVoltage ≈ 2φ +
φ = V
of internal transistor = 0.65V – 2mV/°C
BE
OUT
24
(24)
To allow for transient conditions and circuit tolerances,
a slightly different expression is used to calculate clamp
level for the V
V
CCLAMP
()
For a 5V output with V
V
CCLAMP
()
There are several ways to clamp the V
pin:
C
V
= 2φ +
20
IN(MAX)
= 2 0 .65
()
OUT
+
V
+
= 30V:
5
+
20
IN MAX
()
+ 0.2V
50
30
+ 0.2 = 2.35V (26)
50
pin as shown in
C
(25)
Figure 14. The simplest way is to just add a clamp Zener
(D3). The problem is finding a low voltage Zener which
does not leak badly below the knee. Maximum Zener
leakage over temperature should be 40µA at V
/20V. One solution is to use an LM385-2.5V micro-
V
OUT
= 2φ +
C
power reference diode where the calculated clamp level
does not exceed 2.5V.
V
OUT
V
X
D4
LT1074
FB
V
C
R
D3
Figure 14. Clamping the VC Pin
C
D1D2
C
C
1N458
R1
R2
"/t'
A second clamp scheme is to use a voltage divider and
diode (D4). V
must be some quasi-regulated source which
X
does not collapse with regulator output voltage. A third
technique can be used for outputs up to 20V. It clamps
pin to the feedback pin with two diodes, D1 and
the V
C
D2. These are small signal non-gold doped-diodes with
a forward voltage that matches φ. The reason for this is
start-up. V
is essentially clamped to ground through the
C
output divider when V
= 0. It must be allowed to rise
OUT
sufficiently to ensure start-up. The feedback pin will sit
at about 0.5V with V
current from the feedback pin and V
will be 2φ + 0.5V + (0.14mA) (R
= 0, because of the combined
OUT
pin. The VC voltage
C
). With RC = 1kΩ, VC =
C
1.94. This is plenty to ensure start-up.
Overshoot Fixes That Don’t Work
I know that these things don’t work because I tried them.
The first is soft-start, created by allowing the output current
or the V
that a slowly rising output allows more time for the V
voltage to ramp up slowly. The first problem is
C
pin
C
to ramp up well beyond its nominal control point so that
it has to slew farther down to stop overshoot. If the V
C
pin itself is ramped slowly, this can control input start-up
overshoot, but it becomes very difficult to guarantee reset
of the soft-start for all conditions of input sequencing. In
any case, these techniques do not address the problem of
overshoot following overload of the output, because they
do not get “reset” by the output.
Another common practice is to parallel the upper resistor
in the output divider with a capacitor. This again works
fine under limited conditions, but it is easily defeated by
overload conditions which pull the output slightly below
its regulated point long enough for the V
pin to hit the
C
positive limit (≈6V). The added capacitor remains charged
and the V
pin must slew almost 5V to control overshoot
C
when the overload is released. The resulting overshoot is
impressive—and often deadly.
TAPPED-INDUCTOR BUCK CONVERTER
Output current of a buck converter is normally limited
to maximum switch current, but this restriction can be
altered by tapping the inductor as shown in Figure 15. The
ratio of “input” turns to“output” turns is “N” as shown in
the schematic. The effect of the tap is to lengthen switch
on time and therefore draw more power from the input
without raising switch current. During switch on time,
current delivered to the output through L1 is equal to
switch current—5.5A maximum for the LT1074. When
the switch turns off, inductor current flows only in the
output section of L1, labeled “1,” through D1 to the output.
Energy conservation in the inductor requires that current
increase by the ratio (N + 1):1. If N = 3, then maximum
an44fa
AN44-23
Application Note 44
)
V
IN
V
IN
LT1074
GND
C3
+
200µF
50V
*PULSE ENGINEERING #PE-65282
D1 MOTOROLA MBR1635
D2 MOTOROLA P6KE30A
D3 1N5819
V
SW
FB
V
C
R3
1k
C2
0.2
Figure 15. Tapped-Inductor Buck Converter
N1
D2
30V
D3
L1*
D1
current delivered to the output during switch off time is
(3 + 1)(5.5A) = 22A. Average load current is increased to
the weighted average of the 5A and 22A currents. Maximum
output current is given by:
I
OUT MAX
=(27
()
R1
2.8k
R2
0.01µF
I
OUT(MAX)
2.21k
⎡
⎢
0.95 5.5 –
⎢
⎢
⎢
⎣
L2
5µH
C1
4400µF
+
2 EA
2200µF, 16V
V
OUT
5V
C4
+
390µF
16V
"/t'
=(28)
18− 5.55
()
–4
210
()
()
1+3
()
⎛
5
10
3+
⎜
⎝
18
5.5
⎤
⎡
⎥
⎢
3+ 1
⎥
⎢
3 5.55
⎞
⎥
⎟
⎠
⎥
⎦
()
⎢
1+
⎣
18
⎤
⎥
⎥
⎥
⎦
⎡
⎢
⎢
0.95 ISW–
⎢
⎢
⎢
⎣
V
'–V
()
IN
⎛
2Lf N +
⎜
⎝
'
()
OUT
V
IN
V
OUT
1+ N
⎞
'
⎟
'
⎠
⎤
⎡
⎥
⎢
⎥
⎥
⎥
⎥
⎦
N + 1
⎢
N•V
⎢
1+
⎢
⎣
V
IN
OUT
'
⎤
⎥
⎥
'
⎥
⎥
⎦
L = Total Inductance
The last term, (N + 1)/(1 + N • V
OUT/VIN
) is the basic
switch current multiplier term. At high input voltages it approaches N + 1, and theoretical output current approaches
18A for N = 3. For lower input voltages the multiplier term
approaches unity and no benefit is gained by tapping the
inductor. Therefore, when calculating maximum load
current capability, always use the worst-case low input
voltage. The 0.95 multiplier is thrown-in to account for
second order effects of leakage inductance, etc.
Example: V
= 0.55V, f =100kHz. Let ISW = Maximum for LT1074 =
V
f
5.5A, V
' = 5V + 0.55V = 5.55V, VIN' = 20V – 2V = 18V:
OUT
= 20V, N = 3, L =100µH, V
IN(MIN)
= 5V, Diode
OUT
= 0.95 5.5 – 0.4
[]
2.08
[]
= 10.08A
Duty cycle of the tapped-inductor converter is equal to:
N +
1+ N
V
V
IN
OUT
'
'
(29)
DC =
Average and peak diode currents are:
I
VIN'–V
()
I
DAVG
()
Use Maximum VIN'
()
I
DPEAK
()
Use Minimum VIN'
()
OUT
=
VIN'
I
OUT
=
V
N
()
OUT
VIN'
OUT
'+V
'
IN
(30)
'
AN44-24
an44fa
Application Note 44
Average switch current during switch on time is:
I
I
SW AVG
()
Use Minimum VIN'
()
Diode peak reverse voltage is:
V
DI PEAK
()
Use Maximum V
()
Switch reverse voltage is:
V
(Use Maximum VIN)
Using parameters from the maximum output current
example, with V
Note that this is the average switch current during on time.
It must be multiplied by duty cycle and switch voltage
drop to obtain switch power loss. Total loss also includes
switch fall time (rise time losses are minimal due to leakage inductance in L1).
= VIN + VZ + V
SW
= Reverse breakdown of D2 (30V)
V
Z
V
SPIKE
turn-off and the stray wiring inductance of C3, D2, D3,
and the LT1074 V
is approximately I
DC at VIN= 20V =
I
DAVG
()
I
DPEAK
()
I
SW AVG
()
OUT
=
V
IN
=
= Narrow (<100ns) spike created by rapid switch
IN(MAX)
8
()
()
=
at VIN= 20V =
at VIN= 20V =
V
N •
()
VIN'1+ N
N •
+
1+ N
IN
SPIKE
and switch pins. This voltage spike
IN
/2 volts per inch of total lead length.
SW
= 30V, I
3 +
28–5.55
28
'+VIN'
OUT
(31)
()
V
OUT
= 8A:
OUT
1+ 3
= 64%(34)
18
5.55
= 6.7A
8
3 • 5.55 + 18
()
()
18
8
3 • 5.55+ 18
()
()
18 1+ 3
()
(32)
(33)
= 15.4A
= 3.85A
P
SWITCH
tSW= 50ns + 3ns • I
V
DI PEAK
*This assumes 2" of lead length.
Snubber
The tapped-inductor converter requires a snubber (D2 and
D3) to clip off negative switching spikes created by the
leakage inductance of L1. This inductance (L
measured between the tap and the switch (N) terminal with
the tap shorted to the output terminal. Theoretically, the
measured inductance will be zero because the shorted turns
reflect “0” ohms back to any other terminals. In practice,
even with bifilar winding techniques, there is ≥1% leakage
inductance compared to total inductance. This is ≈1.2µH
for the PE-65282. L
in series with the “N” section input, which does not couple
to the rest of the inductor. This gives rise to a negative
spike at the switch pin at switch turn-off. D2 and D3 clip
this spike to prevent switch damage, but D2 dissipates a
significant amount of power. This power is equal to the
energy stored in L
multiplied by switching frequency and a multiplier term
which is dependent on the difference between D2 voltage
and the normal reverse voltage swing at the inductor input:
PD2=
= I
()
SW
' + V
V
()
IN
= 3.85
()
20 + 30
()
= 5.3W + 1 .19W = 6.5W
()
V
SW
I
()
0.64
()
30 + 3.5
=
1+ 3
= 30 + 30 +
L
2
• L
SW
2
⎡
DC
1.8V + 0.1
()
⎣
I
()
Z
SW
1.8+ 0.1
⎡
⎣
3.85
()
is modeled as a separate inductance
L
at switch turnoff, (E = (ISW)2 • LL/2)
L
()
= 11.25V
3.85
⎛
f
()
⎜
VZ–V
⎝
()
f
()
SW
10
2
()
()
()
5
62ns
()
2"
* = 64V
()
V
Z
OUT
t
SW
3.85
'• N
⎤
+
I
()
SW
+
⎤
⎦
) is the value
L
⎞
⎟
⎠
(35)
⎦
(36)
(37)
an44fa
AN44-25
Application Note 44
For this example:
PD2=(38)
2
3.85
()
1.2• 10
()
–6
2
5
10
()
⎛
⎜
⎝
30
30 – 5.55 • 3
⎞
= 2W
⎟
⎠
Output Ripple Voltage
Output ripple on a tapped-inductor converter is higher
than a simple buck converter because a square wave of
current is superimposed on the normal triangular current
fed to the output. Peak-to-peak ripple current delivered
to the output is:
I
=
P-P
I
N • V
()
OUT
VIN1+ N
Use Minimum V
()
OUT
+ V
IN
()
()
IN
1+ N
N
()
+
f • LN+
VIN–V
()
⎛
⎜
⎝
V
V
OUT
IN
OUT
⎞
⎟
⎠
(39)
Input Capacitor
The input bypass capacitor is selected by ripple current
rating. It is assumed that all the converter input ripple current is supplied by the input capacitor. RMS input ripple
current is approximately:
I
I
IN RMS
()
Use Minimum V
()
()
=
18
()
()
≈
()
5.5
8
()
1+ 3
()
V
'
()
OUT
VIN'
OUT
1+ N
()
IN
18
⎛
1+ 3
()
⎜
⎝
5.5
⎛
1+ N
()
–1
VIN'
⎜
V
⎝
OUT
⎞
= 1.84A RMS
⎟
⎠
'
–1
⎞
⎟
⎠
(41)
The input capacitor value in microfarads is not particularly
important since it is purely resistive at 100kHz; but it must
be rated at the required ripple current and maximum input
voltage. Radial lead types should be used to minimize
lead inductance.
A conservative approximation of RMS ripple current is
one-half of peak-to-peak current.
Output ripple voltage is simply the ESR of the output
capacitor multiplied times I
. In this example, with
P-P
ESR = 0.03Ω
I
=(40)
P-P
8
3•5 + 20
()
()
20 1+ 3
()
I
= 5.7A
RMS
V
= 0.03
()
P-P
3
()
+
11.4
()
1+ 3
()
5
10
()
= 340mV
20–5
()
⎛
–4
10
()
3 +
⎜
⎝
20
5
= 11.4A
⎞
⎟
⎠
This high value of ripple current and voltage requires some
thought about the output capacitor. To avoid an excessively
large capacitor, several smaller units are paralleled to
achieve a combined 5.7A ripple current rating. The ripple
voltage is still a problem for many applications. However,
to reduce ripple voltage to 50mV would require an ESR of
less than 0.005W—an impractical value. Instead, an output
filter is added which attenuates ripple by more than 20:1.
POSITIVE-TO-NEGATIVE CONVERTER
The LT1074 can be used to convert positive voltages to
negative if the sum of input and output voltage is greater
than the 8V minimum supply voltage specification, and
the minimum positive supply is 4.75V. Figure 16 shows
the LT1074 used to generate negative 5V. The ground pin
of the device is connected to the negative output. This allows the feedback divider, R3 and R4, to be connected in
the normal fashion. If the ground pin were tied to ground,
some sort of level shift and inversion would be required
to generate the proper feedback signal.
Positive to negative converters have a “right half plane zero”
in the transfer function which makes them particularly hard
to frequency stabilize, especially with low input voltage.
R1, R2, and C4 have been added to the basic design solely
to guarantee loop stability at low input voltage. They may
be omitted for V
> 10V, or VIN/V
IN
> 2. R1 plus R2 is
OUT
in parallel with R3 for DC output voltage calculations. Use
the following guidelines for these resistors:
LOWER REVERSE VOLTAGE RATING MAY BE USED FOR LOWER INPUT VOLTAGES.
LOWER CURRENT RATING IS ALLOWED FOR LOWER OUTPUT CURRENT.
††
LOWER CURRENT RATING MAY BE USED FOR LOWER OUTPUT CURRENT.
*
R1, R2, AND C4 ARE USED FOR LOOP FREQUENCY COMPENSATION, BUT R1 AND R2
MUST BE INCLUDED IN THE CALCULATION FOR OUTPUT VOLTAGE DIVIDER VALUES.
FOR HIGHER OUTPUT VOLTAGES, INCREASE R1, R2 AND R3 PROPORTIONATELY;
R3 = –2.37 (k)
V
OUT
R1 = (R3) (1.86)
R2 = (R3) (3.65)
**
MAXIMUM OUTPUT CURRENT OF 1A IS DETERMINED BY MINIMUM INPUT
VOLTAGE OF 4.5V. HIGHER MINIMUM INPUT VOLTAGE WILL ALLOW MUCH HIGHER
OUTPUT CURRENTS.
V
V
SW
FB
C3
0.1µF
C1
+
220µF
50V
L1
25µH
††
5A
R1**
5.1k
R3*
2.74k
+
R2**
10k
†
D1
MBR745
C4**
0.01µF
R4
1.82k*
Figure 16. Positive-to-Negative Converter
C2
1000µF
10V
"/t'
OPTIONAL FILTER
5µH
–
+
–5V,1A***
200µF
10V
R4 = 1.82k
R3 = |V
| – 2.37 (In kΩ)
OUT
R1 = R3 (1.86)
R2 = R3 (3.65)
If R1 and R2 are omitted:
R4 = 2.21k
R3 = |V
| – 2.21 (In kΩ)
OUT
A +12V to –5V converter would have R4 = 2.21k and R3
= 2.74k.
Recommended compensation components would be C3
= 0.005µF in parallel with a series RC of 0.1µF and 1kΩ.
The converter works by charging L1 through the input
voltage when the LT1074 switch is on. During switch off
time, the inductor current is diverted through D1 to the
negative output. For continuous mode operation, duty
cycle of the switch is:
V
'
DC =
Use absolute value for V
()
OUT
V
' + V
IN
OUT
OUT
(42)
Peak switch current for continuous mode is:
I
SW PEAK
I
OUT
()
=
VIN' + V
()
VIN'
OUT
'
+
2f • LVIN' + V
VIN'
V
()
()
'
()
OUT
'
OUT
(43)
To calculate maximum output current for a given maximum
switch current (I
I
OUT M AX
()
'– I
V
IN
()
M
VIN' + V
Use MinimumV
()
) this can be rearranged as;
M
=
V
⎡
R
()
L
⎢
'
OUT
⎣
IN
IM–
2f • LVIN' + V
'
'
()
IN
()
(44)
V
'
()
OUT
⎤
⎥
'
OUT
⎦
an44fa
AN44-27
Application Note 44
Note that an extra term (IM • RL) has been added. This is
to account for the series resistance (R
) of the inductor,
L
which may become a significant loss at low input voltages.
Maximum output current is dependent upon input and
output voltage, unlike the buck converter which will supply
essentially a constant output current. The circuit shown
will supply over 4A at V
5V. The I
OUT(MAX)
equation does not include second order
= 30V, but only 1.3A at VIN =
IN
loss terms such as capacitor ripple current, switch rise
and fall time, core loss, and output filter. These factors
may reduce maximum output current by up to 10% at low
input and/or output voltages. Figure 17 shows I
OUT(MAX)
versus input voltage for various output voltages. It assumes a 25µH inductor for V
–12V, and 100µH for V
4
3
2
1
MAXIMUM OUTPUT CURRENT (A)
0
0
Figure 17. Maximum Output Current of Positive-to-Negative
Converter
OUT
V
= –5V
OUT
L = 25µH
10203040
INPUT VOLTAGE (V)
= –5V, 50µH for V
OUT
= –25V.
V
= –12V
OUT
L = 50µH
= –25V
V
OUT
L = 100µH
"/t'
OUT
=
Discontinuous Mode
⎛
I
OUT M AX
()
Use Minimum V
()
Example: V
=
= 5V, IM = 5A, f = 100kHz, Load Current =
OUT
⎜
VIN' + V
⎝
IN
VIN'
0.5A. Diode Forward Voltage = 0.5V, giving V
= 4.7V to 5.3V. Assume VIN'
V
IN
⎛
I
OUT MAX
()
=
2.4
⎜
⎝
2.4+ 5.5
OUT
⎞
⎟
⎠
⎞
I
⎛
⎞
M
⎜
⎟
⎟
⎝
'
⎠
2
⎠
= 4.7V – 2.3V = 2.4V.
(MIN)
5
⎛
⎞
= 0.76A
⎜
⎟
⎝
⎠
2
OUT
(46)
' = 5.5V.
(47)
The required load current of 0.5A is less than the maximum
of 0.76A, so discontinuous can be used:
L
=
MIN
()
2 0.5
5.5
()
()
5
= 2.2µH
2
5
10
()
(48)
To ensure full load current with production variations of
frequency and inductance, 3µH should be used.
The formula for minimum inductance assumes a high peak
current in the inductor (≈5A). If the minimum inductance
is used, the inductor must be specified to handle the high
peak current without saturating. The high ripple current
will also cause relatively high core loss and output ripple
voltage, so some judgment must be used in minimizing
the inductor size. See the Inductor Selection section for
more details.
To calculate peak inductor and switch current in discontinuous mode, use:
If absolute minimum circuit size is required and load currents are not too high, discontinuous mode can be used.
Minimum inductance required for a specified load is:
2I
L
MIN
OUTVOUT
=
I
()
M
'
()
2
• f
(45)
There is a maximum load current that can be supplied in
discontinuous mode. Above this current, the formula for
L
is invalid. Maximum load current in discontinuous
MIN
mode is:
AN44-28
OUT
• V
L • f
I
2 • I
=
PEAK
OUT
'
(49)
Input Capacitor
C3 is used to absorb the large square wave switching
currents drawn by positive to negative converters. It must
have low ESR to handle the RMS ripple current and to avoid
input voltage “dips” during switch on time, especially with
5V inputs. Capacitance value is not particularly important
if ripple current and operating voltage requirements are
met. RMS ripple current in the capacitor is:
an44fa
Application Note 44
Continuous Mode
V
'
I
= I
RMS
(Use Minimum VIN)
Discontinuous Mode*
I
RM S
I
()
OUT
m =
*This formula is a test for calculator students
Examples: A continuous mode design with V
= –5V, I
I
RMS
Now change to a discontinuous design with the same
conditions and L = 5µH, f = 100kHz:
m =
I
RMS
Notice that discontinuous mode saves on inductor size,
but may require a a larger input capacitor to handle the
ripple current increase. The 30% increases in ripple current generates 70% more heating in the capacitor ESR.
Output Capacitor
The inductor on a positive to negative converter does
not operate as a filter. It simply acts as an energy storage device so that energy can be transferred from input
to output. Therefore, all filtering is done by the output
OUT
=(51)
V
()
OUT
VIN'
1
V
'
IN
= 1A, V
OUT
= 1
()
1
2
()
10
1
5.5
()
()
=
10
= 0.96A RMS
OUT
'
V
IN
3
m
⎛
1.35 1–
⎜
'
2L f I
OUT
5.5
10
10 • 10
()
⎝
OUTVOUT
' = 5.5V, and VIN' = 10V.
= 0.74ARMS
–6
()
1.35 1– 0.165
()
0.33
0.17 0.33
()
m
105
⎞
⎟
⎠
2
'
1
()
2
+ 1– 0.33
+ 0.17m2+ 1– m
= 12V, V
IN
5.5
= 0.33
()
3
+
(50)
OUT
(52)
(53)
capacitor, and it must have adequate ripple current rating
and low ESR. Output ripple voltage for continuous mode
will contain three distinct components; a “spike” on switch
transitions which is equal to the rate of rise/fall of switch
current multiplied by the effective series inductance (ESL)
of the output capacitor, a square wave proportional to load
current and capacitor ESR, and a triangular component
dependent on inductor value and ESR. The spikes are very
narrow, typically less than 100ns, and often “disappear” in
the parasitic filter created by the inductance of PC board
traces between the converter and load combined with the
load bypass capacitors. One must be extremely careful
when looking at these spikes with an oscilloscope. The
magnetic fields created by currents transitions in converter
wiring will generate “spikes” on the screen even when they
do not exist at the converter output. See the Oscilloscope
Techniques section for details.
The peak-to-peak sum of square wave and triangular
output ripple voltage is:
V
=(54)
P-P
⎡
ESR
⎢
⎣
Use Minimum V
()
Example: VIN = 5V, V
1A, f = 100kHz. Assume V
ESR = 0.05Ω.
V
=(55)
P-P
⎡
⎢
0.05
⎢
⎣
= 172mV
For some applications this rather high ripple voltage may
be acceptable, but more commonly it will be necessary
to reduce ripple voltage to 50mV or less. This may be
impractical to achieve simply by reducing ESR, so an
output filter (L2, C4) is shown, The filter components are
relatively small and low cost, both of which are additionally
offset by possible reduction in the size of the main output
capacitor C1. See the Output Filters section for details.
VIN' + V
I
()
OUT
VIN'
IN
1
2.8+ 5. 5
()
()
2.8
'
OUT
+
'
= –5V, L = 25µH, I
OUT
IN
+
25.5+ 2.8
()
V
'
VIN'
()
2V
()
OUT
' = 2.8V, V
()
()
OUT
+ V
5. 5
10
()
()L()
IN
' = 5.5V, and
OUT
2.8
()
5
25 • 10
()
⎤
⎥
f
⎦
OUT(MAX)
–6
=
⎤
⎥
⎥
⎦
an44fa
AN44-29
Application Note 44
C1 must be chosen for ripple current as well as ESR. Ripple
current into the output capacitor is given by:
Continuous Mode
V
'
I
= I
RMS
OUT
OUT
V
IN
'
(56)
Discontinuous Mode
I
=(57)
RMS
I
OUT
P
I
OUT
3
0.67 I
+
2
0.67 I
–
()
P
I
I
()
OUT
I
()
2
()
OUT
2
P
2I
+ 1–
OUT
I
P
where IP = Peak Inductor Current:
2I
OUTVOUT
=
L•f
'
()
For the Continuous Mode example:
I
= 1A
RMS
()
5.5
= 1.4 A RMS
2.8
(58)
with Discontinuous Mode using a 3µA inductor, with
= 0.5A:
I
OUT
0.5
2
IP=
I
RMS
0. 5
()
= 1. 0 9 A R M S
()
3•10
()
=
0.67
()
5.5
()
()
–6
4.28–0.5
()
0. 5
()
()
= 4. 28(59)
5
10
()
3
0. 67
()
+
2
4. 28
4. 28
()
2
0. 5
()
+ 1–
2
20.5
()
4.28
Notice that output capacitor ripple current is over twice
the DC output current in this discontinuous example. The
smaller inductor size obtained by discontinuous mode may
be somewhat offset by the larger capacitors required on
input and output to meet ripple current conditions.
Efficiency
Efficiency for this positive to negative converter can be
quite high for larger input and output voltages (>90%),
but can be much lower for low input voltages. Losses
are summarized below for a continuous mode design.
Discontinuous losses are much more difficult to express
analytically, but will typically be 1.2 to 1.3 times higher
than in continuous mode.
Conduction loss in switch = P
PSWDC
I
()
OUT
=(60)
()
OUT
'
⎡
⎢
1. 8 V +
⎢
⎣
V
()
VIN'
()
(DC):
SW
0.1
I
()
OUT
V
' + VIN'
()
OUT
VIN'
⎤
⎥
⎥
⎦
Transient switch loss = PSW (AC):
' + VIN'
()
OUT
P
SW
where t
I
AC
()
SW
OUTVOUT
=
= 50ns + 3ns (V
quiescent current generates a loss called P
⎡
OUT
DI
'
= (I
⎢
⎢
⎣
OUT
P
SUPPLY
= VIN' + V
()
Catch diode loss = P
where V
I
= Forward Voltage of D1 at a current equal to:
f
(V
OUT
' + VIN')/VIN'
OUT
2
2t
()
SW
f
()
(61)
VIN'
' + VIN')/VIN'. The LT1074
:
SUPPLY
7mA + 5mA V
V
()
OUT
()
' + VIN'
OUT
⎤
'
⎥
(62)
⎥
⎦
)(Vf)
Capacitor losses can be found by calculating RMS ripple
current and multiplying by capacitor ESR. Inductor losses
are the sum of copper (wire) loss and core loss:
2
⎡
I
()
PL1= R
R
= Inductor Copper Resistance
L
can be calculated if the inductor core material is
P
CORE
⎢
L
⎢
⎣
V
' + VIN'
()
OUT
OUT
VIN'
⎤
⎥
+ P
CORE
⎥
⎦
(63)
known. See the Inductor Selection section.
Example: V
= 12V, V
IN
Let L1= 50µH, with R
output capacitor is 0.05Ω. V
= –12V, I
OUT
= 0.04Ω. Assume ESR of input and
L
' = 12V – 2V = 10V, V
IN
= 1.5A, f = 100kHz.
OUT
OUT
'
= 12V + 0.5V = 12.5V.
AN44-30
an44fa
P
DC
=(64)
()
SW
12.5
1. 5
()
()
10
AC
P
()
SW
1. 5
()
()
= 0.86W
⎡
⎢
⎣
=
12.5 + 10.5
10
1. 8 +
0.1
()
()
2
⎡
250ns+ 3ns
()
⎢
⎣
1. 5
12.5 + 10
()
10
⎤
= 4W
⎥
⎦
12.5 + 10
()
10
R1=
Boost converters have a “right-half plane zero” in the
forward part of the signal path and for this reason, L1
is kept to a low value to maximize the “zero” frequency.
⎤
5
10
()
⎥
⎦
With larger values for L1, it becomes difficult to stabilize
the regulator, especially at low input voltages. If V
L1 can be increased to 50µH.
V
OUT
V
Application Note 44
• R2
–R2
REF
>10V,
IN
(65)
12.5
10
10
()
+ ΣP
LOSS
+ 6.78
5mA 12 .5
()
12.5 + 10
= 1. 68 A R MS
= 1. 6 8 A R M S
2
⎤
= 0.46W
⎥
⎦
= 73%
⎤
= 0.23W
⎥
⎦
P
SUPPLY
P
DI
I
RMS INPUT CAP
P
C3
I
RMS OUTPUT CAP
I
OUT
P
C1
P
L1
Assume P
Efficiency =
ΣP
Efficiency =
= 12 + 12
()
= 1. 5
()
= 1. 6 8
()
= 1.68
= 0.04
LOSS
0.2 = 6.78W
0.5
()
()
2
()
2
12.5
()
10
()
2
()
()
1. 5
()
⎡
⎢
⎣
CORE
I
OUTVOUT
= 4 + 0.86 + 0.23+ 0.75+ 0.14+ 0.14+ 0.46 +
1. 5
()
⎡
7mA +
⎢
⎣
= 0.75W
= 1. 5
0.05
()
= 0.14W
=
+ 12.5
()
12.5 + 10
()
0.05
= 0.14W
12.5 + 10
()
10
= 0.2W
I
OUTVOUT
12
1. 5
()
()
12
()
NEGATIVE BOOST CONVERTER
Note: All equations in this section use the absolute value
of V
and V
IN
OUT
.
The LT1074 can be configured as a negative boost converter (Figure 18) by tying the ground pin to the negative
output. This allows the regulator to operate from input
voltages as low as 4.75V if the regulated output is at least
8V. R1 and R2 set the output voltage as in a conventional
connection, with R1 selected from:
There are two important characteristics of boost converters
to keep in mind. First, the input voltage cannot exceed the
output voltage, or D1 will simply pull the output unregulated
high. Second, the output cannot be pulled below the input,
or D1 will drag down the input supply. For this reason,
boost converters are not normally considered short-circuit
protected unless some form of fusing is provided. Even
with fuses, there is the possibility of damage to D1 if the
input supply can deliver very large surge currents.
Boost converters require switch currents which can be
much greater than output load current. Peak switch current is given by:
V
I
SW PEAK
I
OUT
()
=
• V
V
IN
OUT
'
'
+
IN
2L • f • V
For the circuit in Figure 18, with V
' ≈ 15.5V, with an output load of 0.5A:
V
OUT
I
SW PEAK
0.5A
()
=
()
15.5
()
+
3
315.5–3
()
225μH
()
5
10
()
'V
IN
'–VIN'
()
OUT
(66)
'
OUT
= 5V, (VIN' ≈ 3V),
(67)
= 3.07A
15.5
()
This formula can be rearranged to yield maximum load
current for a given maximum switch current (IM):
2
V
'
• VIN'
I
I
OUT MAX
()
= 5.5A, this equation yields 0.82A with VIN = 4.5V,
For I
M
1.8A with V
M
=
V
OUT
= 8V, and 3.1A for VIN = 12V.
IN
–
'
'
V
⎛
⎜
⎝
V
IN
OUT
⎞
⎟
'
⎠
OUT
2L • f
–V
IN
'
(68)
The explanation for switch current which is much higher
than output current is that current is delivered to the output
only during switch off time. With low input voltages, the
switch is on a high percentage of the total switching cycle
an44fa
AN44-31
Application Note 44
V
IN
FB
LT1074
V
SW
GND
C3
100µF
–V
–5V TO –15V
** I (MAX) = 1A-3A DEPENDING ON INPUT VOLTAGE.
SEE AN44
+
25V
IN
*MBR735
OUT
V
C
0.01µF
Figure 18. Negative Boost Converter
and current is delivered to the output only a small percent
of the time. Switch duty cycle is given by:
V
'
'
V
–
DC =
OUT
V
OUT
IN
'
(69)
R1
12.7k
R2
2.21k
D1*
+
5µH
OPTIONAL OUTPUT FILTER
+
100µF
C1
1000µF
25V
V **
OUT
–15V
"/t'
+
C2
1µF
R3
750
1000pF
L1
25µH
This formula does not take into account secondary loss
terms such as the inductor, output capacitor, etc., so it is
somewhat optimistic. Actual input current may be closer
to 3A. Be sure the input supply is capable of providing the
required boost converter input current.
For V
IN
DC =
= 5V, V
15.5 – 3
15.5
= 15V, VIN' ≈ 3V, V
OUT
= 81%
' = 15.5V and:
OUT
(70)
Peak inductor current is equal to peak switch current.
Average inductor current in continuous mode is equal to:
• V
I
I
L AVG
()
OUT
=
V
A 0.5A load requires 2.6A inductor current for V
IN
OUT
'
'
(71)
= 5V.
IN
Along with high switch currents, keep in mind that boost
converters draw DC input currents higher than the output
load current. Average input current to the converter is:
IINDC
with I
IINDC
I
()
≈
()
= 0.5A, and VIN = 5V (VIN' ≈ 3V):
OUT
()
0.5
=
()
V
'
()
OUT
OUT
VIN'
()
15.5
= 2.6A
3
(72)
(73)
Output Diode
The average current through D1 is equal to output current,
but the peak pulse current is equal to peak switch current,
which can be many times output current. D1 should be
conservatively rated at 2 to 3 times output current.
Output Capacitor
The output capacitor of a boost converter has high RMS
ripple current so this is often the deciding factor in the
selection of C1. RMS ripple current is approximately:
V
'
'
–V
for I
I
RMS C1
≈
()
I
= 0.5A, VIN = 5V:
OUT
I
≈ 0.5
RMS
OUT
OUT
15.5 – 3
3
IN
V
'
IN
= 1A RMS
(74)
(75)
C1 must have a ripple current rating of 1A RMS. Its actual
capacitance value is not critical. ESR of the capacitor will
determine output ripple voltage.
an44fa
AN44-32
Application Note 44
Output Ripple
Boost converters tend to have high output ripple because
of the high pulse currents delivered to the output capacitor:
⎡
I
V
•
= ESR
⎢
⎢
⎣
V
P-P
OUT
OUT
V
'
IN
V
'
IN
+
2L • f •
'
V
OUT
V
–V
OUT
'
()
IN
⎤
'
⎥
'
(76)
⎥
⎦
This formula assumes continuous mode operation, and
it ignores the inductance of C1. In actual operation, C1
inductance will allow output “spikes” which should be
removed with an output filter. The filter can be as simple
as several inches of output wire or trace and a small solid
tantalum capacitor if only the spikes need to be removed.
A filter inductor is required if significant reduction of the
fundamental is needed. See the Output Filter section.
For the circuit in Figure 18, with I
= 0.5A, VIN = 5V;
OUT
and an output capacitor ESR of 0.05Ω:
V
=(77)
P-P
⎤
⎥
= 153mV
⎥
15.5
()
⎦
0.05
⎡
0.5
15.5
()
()
⎢
⎢
3
⎣
315.5–3
+
225•10
()
()
–6
5
10
()
Input Capacitor
Boost converters are more benign with respect to input
current pulsing than buck or inverting converters. The input
current is a DC level with a triangular ripple superimposed.
RMS value of input current ripple is:
I
RMS C3
≈
()
'V
V
IN
3L • f • V
'– VIN'
()
OUT
OUT
'
(78)
Notice that ripple current is independent of load current
assuming that load current is high enough to keep the
converter in continuous mode. For the converter in Figure18, with V
I
=
RMS
= 5V:
IN
315.5–3
()
325•10
()
–6
5
10
()
()
= 0.32ARMS
15.5
(79)
C3 may be chosen on a ripple current basis to minimize
size. Larger values will allow less conducted EMI back
into the input supply.
INDUCTOR SELECTION
There are five main criteria in selecting an inductor for
switching regulators. First, and most important, is the
actual inductance value. If inductance is too low, output
power will be restricted. Too much inductance results in
large physical size and poor transient response. Second,
the inductor must be capable of handling both RMS and
peak currents which may be significantly higher than load
current. Peak currents are limited by core saturation, with
resultant loss of inductance. RMS currents are limited by
heating effects in the winding. Also important is peak-topeak current which determines heating effects in the core
itself. Third, the physical size or weight of the inductor may
be important in many applications. Fourth, power losses
in the inductor can significantly affect regulator efficiency,
especially at higher switching frequencies. Last, the price
of inductors is very dependent on particular construction
techniques and core materials, which impact overall size,
efficiency, mountability, EMI, and form factor. There may
be a significant cost penalty, for instance, if more expensive
core materials are needed in “minimum size” applications.
The issues of price and size become particularly complicated at higher frequencies. High frequencies are used to
reduce component size, and indeed, the inductance values
required scale inversely with frequency. The problem with
a scaled-down high frequency inductor is that total core
loss increases slightly with frequency for constant ripple
current, and this power is now dissipated in a smaller
core, so temperature rise and efficiency can limit size
reductions. Also, the smaller core has less room for wire,
so wire losses may increase. The only solution to this
problem is to find a better core material. Common low
cost inductors use powdered iron cores, which are very
low cost. These cores exhibit modest losses at 40kHz with
a typical flux density of 300 gauss. At 100kHz, core losses
can become unacceptably high at these flux densities.
Reducing flux density requires a larger core, canceling
part of the advantage gained in reducing inductance at
the higher frequency.
Molypermalloy, “high flux,” Kool Mµ (Magnetics, Inc.), and
ferrite cores have considerably lower core loss, and can
be used at 100kHz and above with higher flux density, but
these cores are expensive. The basic lesson here is that
attention to inductor selection is very important to minimize
costs and achieve desired goals of size and efficiency.
an44fa
AN44-33
Application Note 44
A special equation has been developed in the following
section which shows that for a given core material, total
core loss is dependent almost totally on frequency and
inductance value, not physical size or shape. The formula
is arranged to solve for the inductance required to achieve
a given core loss. It shows that, in a typical 100kHz buck
converter, inductance has to be increased by a factor of
three over the minimum required, if a low cost powdered
iron core is used.
“Standard” switching regulator inductors are toroids.
Although this shape is hardest to wind, it offers excellent
utilization of the core, and more importantly, has low EMI
fringing fields. Rod or drum shaped inductors have very
high fringing fields and are not recommended except
possibly for secondary output filters. Inductors made
with “E-E” or “E-C” split cores are easy to wind on the
separate bobbin, but tend to be much taller than toroids
and more expensive. “Pot” cores reverse the position of
winding and core—the core surrounds the winding. These
cores offer the best EMI shielding, but tend to be bulky
and more expensive. Also, temperature rise is higher
because of the enclosed winding. Special low profile split
cores (TDK “EPC,” etc.) are now offered in a wide range
of sizes. Although not as efficient as EC cores in terms
of watts/volume, these cores are attractive for restricted
height applications.
The best way to select an inductor is to first calculate the
limitations on its minimum value. These limitations are
imposed by a maximum allowed switch current, maximum
allowable efficiency loss, and the necessity to operate in
continuous versus discontinuous mode. (See discussion elsewhere of the consequences related to these two
modes.) After the minimum value has been established,
calculations are done to establish the operating conditions
of the inductor; i.e., RMS current, peak-to-peak ripple current, and peak current. With this information, next select
an “off-the-shelf” inductor which meets all the calculated
requirements, or is reasonably close, Then ascertain the
physical size and price of the selected inductor. If it fits in
the allowed “budget” of space, height, and cost, you can
then give some consideration to increasing the inductance
to gain better efficiency, lower output ripple, lower input
ripple, more output power, or some combination of these.
If the selected inductor is physically too large, there are
several possibilities; select a different core shape, a different core material, (which will require recalculating the
minimum inductance based on efficiency loss), a higher
operating frequency, or consider a custom wound inductor which is optimized for the application. Keep in mind
when attempting to shoehorn an inductor into the smallest
possible space that output overload conditions may cause
currents to increase to the point of inductor failure. The
major failure mode to consider is winding insulation failure
due to high winding temperature. IC failure caused by loss
of inductance due to core saturation or core temperature
is not usually a problem because the LT1074 has pulseby-pulse current limiting which is effective even with
drastically lowered inductance.
The following equations solve for minimum inductance
based on the assumption of limited peak switch current (I
).
M
Minimum Inductance to Achieve
a Required Output Power
I
Buck Mode Discontinuous , I
MIN
MIN
MIN
MIN
MIN
=
=
=
=
=
2 • I
2 • f •
2 •
2 • f
2 • I
L
Buck Mode Continuous , I
L
Inverting Mode Discontinuous ,
L
Inverting Mode Continuous ,
L
Boost Mode Discontinuous ,
L
• V
OUT
f
()
V
VIN'–V
()
OUT
V
IN
I
• V
OUT
2
I
()
M
V
OUT
()
()
OUT
I
()
M
VIN'– V
()
OUT
2
I
VIN'
()
M
OUT
OUT
I
–
I
'
()
OUT
M
'
OUT
• f
'
()
V
IN
+ V
'
'
IN
'–
V
OUT
2
V
• f
M
≤
OUT
I
2
2
IN
,UseMaximum V
2
OUT
≤ IM,Use Maximum V
I
M
≤
2V
()
IN
•
I
V
M
'+V
V
()
IN
'
–
V
'
OUT
•
I
V
M
IN
2 • V
OUT
OUT
•
⎛
⎜
⎝
I
OUT
'
I
V
OUT
≤
V
OUT
I
M
IN
• VIN'
' +
≤
•
V
'+V
'
IN
OUT
I
OUT
'
'
IN
IN
'
OUT
'
⎞
⎟
⎠
IN
(80)
(81)
(82)
'
(83)
(84)
an44fa
AN44-34
Application Note 44
•
Boost Mode Continuous,
V
()
L
=
MIN
2 • fV
Tapped Inductor Continuous, I
L
=
MIN
IM• 2f•
IN
()
OUT
V
IN
N + 1
V
()
IN
I
OUT
2
'
V
'–
()
OUT
• VIN'
⎛
2IM
'
⎜
V
⎝
OUT
•
V
V
()
OUT
V
+ N
V
()
IN
IN
≤
V
'
OUT
I
IN
–I
OUT
–V
V
M
IN
V
OUT
'
⎞
⎟
OUT
⎠
I
M
≤
VIN' + N
OUT
–
I
OUT
'
'
(85)
N + 1
()
N + 1
()
V
()
'
V
()
IN
'
V
OUT
2
2
V
+ N
IN
OUT
(86)
2f
()
Minimum Inductance Required to Achieve
a Desired Core Loss
Power loss in inductor core material is not intuitive at all.
It is, to a first approximation, independent of the size of
the core for a given inductance and operating frequency.
Second, power loss drops as inductance increases, for
constant frequency. Last, raising frequency with a given
inductor will decrease core loss, even though manufacturer’s curves show that core loss increases with frequency.
These curves assume constant flux density, which is not
true for a fixed inductance.
a, d, p = Core Material Constants (see Table 1)
b, e = Constants Determined by Input and Output
Voltages and Currents
L = Inductance
These formulas show that core material, inductance, and
frequency are the only degrees of freedom to alter core
loss in the continuous mode case. For discontinuous
mode, even inductance disappears as a variable, leaving
frequency and core material. Further, the constant “d” is
close to unity for many core materials, yielding a discontinuous mode core loss independent of all user variables
except core material!
The following specific formulas will allow calculation of
the inductance to achieve a given core loss in continuous
mode and will indicate actual core loss for the discontinuous mode.
When using these formulas, assume initially that the term
p–2/p
V
can be ignored. It is close to unity for a relatively
e
wide range of core volumes because the exponent (p–2)/2
is less than 0.1 for commonly used powdered iron and
molypermalloy cores. After an inductor is chosen and Ve is
p–2/p
known, the term V
its effect on the value for L
can be calculated to double check
e
, usually less than 20%:
MIN
Continuous Mode
The general formula for core loss can be expressed as:
PC= C • B
p
AC
• fd• V
C
(87)
C, d, p = Constants (see Table 1)
BAC = Peak AC Flux Density (1/2 peak-to-peak) (gauss)
f = Frequency
= Core Volume (cm3)
V
C
The exponent “p” falls in the range of 1.8-2.4 for powdered
iron cores, ≈2.1 for molypermalloy, and 2.3-2.8 for ferrites. “d” is ≈1 for powdered iron and ≈1.3 for ferrite. A
closed form expression can be generated which relates
core loss to the basic requirements of a switching regulator; inductance, frequency, and input/output voltages.
The general form is:
p
= a • f
C
p–d
f
a • b
p/2
• L
d–1
• e (89)
(88)
Continuous Mode PC=
Discontinuous Mode P
2
⎛
⎜
⎝
µ
2–
• V
L
e
⎛
⎞
• V
p
–
2
⎜
⎟
⎝
⎠
p
e
2d
⎞
⎟
⎠
p
a •
L
* =
MIN
2/p
P
()
• f
C
Buck Mode Discontinuous
–8
d–1
f
VL• I
()
OUT
a •
PC=
0.4π
()
µ
e
10
*A strict derivation
a, d, p = Core loss constants. Use Table 1.
µe = Effective core permeability. For ungapped cores,
use Table 1. For gapped cores, use manufacturer’s
specification, or calculate.
= An equivalent “voltage,” dependent on input volt-
Example: Buck converter with VIN = 20V to 30V, V
5V, I
3A is more than I
Maximum input voltage is used to calculate L
= 3A, f = 100kHz, maximum inductor loss = 0.8W.
OUT
/2, so continuous mode must be used.
M
MIN
=
OUT
from
Equation 81:
'
L
=
MIN
)
OUT
5 30–5
()
5
210
()
30
5–3
()
()
= 10.4µH
(92)
an44fa
Application Note 44
Now calculate minimum inductance to achieve desired
core loss. Assume 1/2 total inductor loss in winding and
1/2 loss in the core (P
material. V
L
MIN
(from Table 2) = 5(30 – 5)/(2 • 30) = 2.08
L
.3 • 10
1
()
=
0.4
()
= 0.4W). Try Micrometals #26 core
C
2
2.08
()
2–1.34
= 52µH
0.985
–4
75
()
5
• 10
()
(93)
The inductance must be five times the minimum to achieve
desired core loss. Let’s assume that 52µH is too large for
our space requirements and try a better core material, #52,
which is only slightly more expensive.
Table 3. Inductor Operating Conditions
Buck Converter
(Continious)
Positive to Negative
(Continuous)
Negative Boost
(Continuous)
Tapped-Inductor*
Buck Converter
(Discontinuous)
Positive to Negative
(Discontinuous)
Negative Boost
(Discontinuous)
I
AVG
I
O
IOVI+ V
()
O
V
I
IO• V
O
V
I
ION• VO+ V
()
VI1+N
()
()
1/ 4
1/ 4
I
O
1/ 4
N• VO+ V
I
()
I
O
,
3
• VOVI–V
I
()
O
f• L• V
3
VI+ V
I
()
O
VI• f• L
3
2
•V
VO+ V
()
O
2
V
•L•f
I
I
V
I
O
∗
I
O
2
I
IOVO+ V
()
ION• VO+ V
()
I
PEAK
VI–V
V
()
O
IO+
2•L • f • V
I
+
V
IO• V
V
2•L • fVI+ V
I
VO–V
V
()
I
O
+
V
2L • f• V
I
()
VI1+N
–V
I
2L • fN• VO+ V
2IO• VOVI–V
I
()
1+N
()
O
()
()
L• f• V
2IO• V
f• L
2IOVO–V
()
L• f
–
4
•10
4.9
L
MIN
()
=
()
0.4
2
2.11
75
()
2 – 2(1.26)
5
• 10
()
2
2.08
()
= 35µH
2.11
(94)
To see if an off-the-shelf inductor is suitable, calculate
inductor currents and V • t product using Table 3.
I
= I
RMS
IP= 3 +
V • t =
O
I
• V
V
I
O
()
O
I
O
+
V
()
O
∗
I
O
I
O
I
= 3A
OUT
530–5
()
235•10
()
530–5
()
5
10
()
VOVI–V
L• fVI+ V
VI–V
()
L• fN• VO+ V
–6
= 42V • µs
30
()
I
P-P
()
O
L• f• V
I
VI• V
O
()
O
VIVO–V
()
I
L• f• V
O
1+N
()
O
()
()
5
10
()
V
O
∗
I
= 3.6A
30
()
V•μs
VOVI–V
()
f• V
VI• VO•10
fVI+ V
()
VIVO–V
()
f• V
106VI–V
()
O
fN•VO+ V
()
2•L • IO• VOVI–V
6
10
2IO• VO•L
6
10
2IO•LVO–V
6
10
O
I
I
O
()
f• V
()
L• f
(95)
6
•10
6
O
6
•10
1+N
V
()
O
I
()
O
I
f
I
*Values given for tapped-inductor I
inductor during switch on time (fi rst term), and average current through
output section during switch off time (second term). To calculate
heating, these currents must be multiplied by the appropriate winding
resistance and factored by duty cycle.
are average current through entire
AVG
I
is used to ensure the core does not saturate and should be used
PEAK
with the entire inductance.
Peak-to-peak current is used with the entire inductance to calculate core
heating losses. It is the equivalent value if the inductor is not tapped.
an44fa
AN44-37
Application Note 44
This inductor must be at least 35µH, rated at 3A and
≥42V • µs at 100kHz. It must not saturate at a peak current of 3.6A.
Example: Inverting mode with V
–5V, I
0.3W. Let V
= 1A, f = 100kHz, maximum inductor loss =
OUT
' = 2.7V, V
IN
' = 5.5V. Maximum output
OUT
= 4.7-5.3V, V
IN
OUT
=
current for discontinuous mode (Equation 82) is 0.82A,
so use continuous mode:
L
=
MIN
2•1055.5 + 2.7
()
2
2.7
()
5.5
()
⎛
2
⎜
⎝
5 • 2.7
5.5 + 2.7
–1
= 4.6µH
⎞
⎟
⎠
(96)
Now calculate minimum inductance from core loss. Assume core loss is 1/2 of total inductor loss, (P
2.7
5.5
()
VLFrom Table 2
()
=
()
22.7+ 5.5
()
= 0.905
= 0.15W):
C
(97)
Assuming Micrometals type #26 material:
2–
2.72
2.03
2
= 26µH
(98)
–4
75
1. 3 • 1 0
L
()
=
MIN
()
0.15
2
2.03
• 10
0.905
()
()
5
()
This value is over five times the minimum of 4.6µH
Perhaps a higher core loss is acceptable. Here’s how to
do a quick check. If we assume total efficiency is ≈60%
(+ to – conversion with a 5V input is inefficient due to
switch loss), then input power is equal to output power
divided by 0.6 = 8.33W. If we double core loss from
0.15W to 0.3W, efficiency will be 5W/(8.33 + 0.15) =
59%. This is only a 1% drop in efficiency. A core loss of
0.3W allows inductance to drop to 12µH, assuming that
the 12µH inductor will tolerate the core loss plus winding
loss without overheating. Inductor currents are:
()
()
2.7+5.5
I
From Table 3
()
RMS
IP=
2.7 + 5.5
1A
()
()
2.7
2.7
V • t =
()
5
10
2.7 + 5.5
()
()
1A
=
+
212•10
()
5.5
()
2.7
2.7
()
–6
= 18 V • µs at 100kHz
= 3A
5.5
()
5
10
2.7 + 5.5
()
()
= 3.8A
(99)
MICROPOWER SHUTDOWN
The LT1074 will go into a micropower shutdown mode,
with I
≈ 150µA, when the shutdown pin is held below
SUPPLY
0.3V. This can be accomplished with an open-collector TTL
gate, a CMOS gate, or a discrete NPN or NMOS device,
as shown in Figure 19.
V
OPEN COLLECTOR
OPEN DRAIN
2N3904
ETC
VN2222
ETC
Figure 19. Shutdown
IN
R1
SHUT
LT1074
GND
R2
"/t'
The basic requirement is that the pull down-device can sink
50µA of current at a worst-case threshold of 0.1V. This
requirement is easily met with any open-collector TTL gate
(not Schottky clamped), a CMOS gate, or discrete device.
The sink requirements are more stringent if R1 and R2
are added for undervoltage lockout. Sink capability must
be 50µA + V
/R1 at the worst-case threshold of 0.1V.
IN
The suggested value for R2 is 5k to minimize the effect of
shutdown pin bias current. This sets the current through
R1 and R2 at ≈500µA at the undervoltage lockout point.
At an input voltage of twice the lockout point, R1 current
will be slightly over 1mA, so the pull-down device must
sink this current down to 0.1V. A VN2222 or equivalent
is suggested for these conditions.
Start-Up Time Delay
Adding a capacitor to the shutdown pin will generate a
delayed start-up. The internal current averages to about
25µA during the delay period, so delay time will be
= (2.45V)/(C • 25µA), ±50%. If more accurate time out
is required, R1 can be added to swamp out the effects of
the internal current, but a larger capacitor is needed, and
time out is dependent on input voltage.
Some thought must be given to reset of the timing capacitor. If a resistor to ground is used, it must be large enough
to not drastically affect timing, so reset time is typically
ten times longer than time delay. A diode to V
resets
IN
an44fa
AN44-38
Application Note 44
L1
D1
L2*
50µH
R5
56k
D2
1N4148
R3
3k
R4
470
R
47
S
Q1
2N3904
R1
2.80k
R2
2.21k
V
IN
+
C2
200µF
V
IN
LT1074
GND
V
SW
FB
V
C
D1
1N4148
C
C
0.01µF
R
C
2.7k
Figure 20. Low Loss External Current Limit
C3
2.2µF
TANT
+
*COILTRONICS
"/t'
5V
3A
C1
1000µF
quickly, but if VIN does not drop to near zero, time delay
will be shortened when power is recycled immediately.
5-PIN CURRENT LIMIT
Sometimes it may be desirable to current limit the 5-pin
version of the LT1074. This is particularly helpful where
maximum load current is significantly less than the 6.5A
internal current limit, and the inductor and/or catch diode
are minimum size to save space. Short-circuit conditions
put maximum stress on these components.
The circuit in Figure 20 uses a small toroidal inductor
slipped over one lead of the catch diode to sense diode
current. Diode current during switch off time is almost
directly proportional to output current, and L2 can generate an accurate limit signal without affecting regulator
efficiency. Total power lost in the limit circuitry is less
than 0.1W.
L2 has 100 turns. It therefore delivers 1/100 times diode
current to RS when D1 conducts. The voltage across R
S
required to current limit the LT1074 is equal to the voltage
across R4 plus the forward biased emitter base voltage Q1
(≈600mV at 25°C). The voltage across R4 is set at 1.1V
by R3, which is connected to the output. Current limit is
R
–I
+ V
3
:
S
BE
X
BE
+ 0.4mA
(100)
set by selecting R
R4IX+ V
RS=
IX=
V
I
100
OUT
LIM
= Forward biased emitter base voltage of Q1 at
V
BE
= 500µA (≈600mV).
I
C
N = Turns on L2.
= Desired output current limit. I
I
LIM
should be set
LIM
≈1.25 times maximum load current to allow for
variations in V
and component tolerances.
BE
The circuit in Figure 20 is intended to supply 3A maximum
load current, so I
was set at 3.75A. Nominal VIN is
LIM
25V, giving:
–3
= 47Ω
(101)
I
X =
RS=
5+ 0.6
3000
+ 0.4•10–3= 2.27•10
2.27 •10
470
()
()
3.75 / 100 – 2.27•10
–3
+ 0.6
–3
This circuit has “foldback” current limit, meaning that
short-circuit current is lower than the current limit at full
output voltage. This is the result of using the output voltage
to generate part of the current limit trip level. Short-circuit
current will be approximately 45% of peak current limit,
minimizing temperature rise in D1.
R5, C3, and D3 allow separate frequency compensation of
the current limit loop. D3 is reversed biased during normal
operation. For higher output voltages, scale R3 and R5 to
provide approximately the same currents.
SOFT-START
Soft-start is a means for ramping switch currents during the turn on of a switching regulator. The reasons for
doing this include surge protection for the input supply,
an44fa
AN44-39
Application Note 44
protection of switching elements, and prevention of output
overshoot. Linear Technology switching regulators have
built-in switch protection that eliminates concern over
device failure, but some input supplies may not tolerate
the inrush current of a switching regulator. The problem
occurs with current limited input supplies or those with
relatively high source resistance. These supplies can
“latch” in a low voltage state where the current drawn by
the switching regulator in much higher than the normal
input current. This is shown by the general formula for
switching regulator input current and input resistance:
V
()
I
=
IN
=
R
IN
()
E = Efficiency (≈0.7-0.9)
These formulas show that input current is proportional
to the reciprocal of input voltage, so that if input voltage
drops by 3:1, input current increases by 3:1. An input
supply which rises slowly will “see” a much heavier current load during its low voltage state. This can activate
current limit in the input supply and “latch” it permanently
in a low voltage condition. By instituting a soft-start in the
switching regulator which is slower than the input supply
rise time, regulator input current is held low until the input
supply has a chance to reach full voltage.
The formula for regulator input resistance shows that it
is negative and decreases as the square of input voltage.
The maximum allowed positive source resistance to avoid
latch-up is given by:
R
SOURCE MAX
The formula shows that a +12V to –12V converter with 80%
efficiency and 1A load must have a source resistance less
than 2.4Ω. This may sound like much ado about nothing,
because an input supply designed to deliver 1A would not
normally have such a high source resistance, but a sudden output load surge or a dip in the source voltage might
trigger a permanent overload condition. Low V
output load require lower source resistance.
I
()
OUT
–
V
OUT
V
E
()
()
IN
2
V
()
OUT
E
()
IN
I
()
OUT
=
()
P
OUT
=
V
E
()
()
IN
2
V
–
()
=
V
()
IN
4V
()
OUT
E
()
P
IN
OUT
2
note negative sign
()
E
()
I
()
OUT
(102)
(103)
and high
IN
-5
1*/
I
LIM
R3
Figure 21. Soft-Start Using I
GND
$
"/t'
Pin
LIM
In Figure 21, C2 generates a soft-start of switching current by forcing the I
of the I
pin is ≈300µA, so the time for the LT1074 to
LIM
reach full switch current (V
To ensure low switch current until V
pin to ramp up slowly. Current out
LIM
≈ 5V) is ≈(1.6 • 104)(C).
LIM
has reached full
IN
value, an approximate value for C2 is:
–4
C2 ≈ (10
)(t)
t = Time for input voltage to rise to within 10% of final
value.
C2 must be reset to zero volts whenever the input voltage
goes low. An internal reset is provided when the shutdown
pin is used to generate undervoltage lockout. The undervoltage state resets C2. If lockout is not used, R3 should
be added to reset C2. For full current limit, R3 should be
30k. If reduced current limit is desired, R3’s value is set
by desired current limit. See the Current Limit section.
If the only reason for adding soft-start is to prevent input
supply latchup, a better alternative may be undervoltage
lockout (UVLO). This prevents the regulator from drawing
input current until the input voltage reaches a preset voltage. The advantage of UVLO is that it is a true DC function
and cannot be defeated by a slow rising input, short reset
times, momentary output shorts, etc.
OUTPUT FILTERS
When converter output ripple voltage must be less than
≈2% of output voltage, it is usually better to add an output
filter (Figure 22) than to simply “brute force” the ripple
by using very large output capacitors. The output filter
consists of a small inductor (≈2µH to 10µH) and a second
output capacitor, usually 50µF to 200µF. The inductor
must be rated at full load current. Its core material is not
important (core loss is negligible) except that core material
an44fa
AN44-40
Application Note 44
will determine the size and shape of the inductor. Series
resistance should be low enough to avoid unwanted efficiency loss. This can be estimated from:
V
∆E
()
()
RL=
()
CAPACITOR
I
OUT
OUTPUT
OUT
2
E
()
-
'
MAIN
Figure 22. Output Filter
&430'
CAPACITOR
'*-5&3
'*-5&3
(105)
50-0"%
C
'
"/t'
“E” is overall efficiency and ∆E is the loss in efficiency
allocated to the filter. Both are expressed as a ratio, i.e.,
2% ∆E = 0.02, and 80% E = 0.8.
To obtain the required component values for the filter, one
must assume a value for inductance or capacitor ESR,
then calculate the remaining value. Actual capacitance in
microfarads is of secondary importance because it is assumed that the capacitor will be basically resistive at ripple
frequencies. One consideration on filter capacitor value
is the load transient response of the converter. A small
output filter capacitor (high ESR) will allow the output to
“bounce” excessively if large amplitude load transients
occur. When these load transients are expected, the size
of the output filter capacitor must be increased to meet
transient requirements rather than just ripple limits. In
this situation, the main output capacitor can be reduced
to simply meet ripple current requirements. The complete
design should be checked for transient response with full
expected load change.
If the capacitor is selected first, the inductor value can be
found from ripple attenuation requirements.
Buck converter with triangular ripple into filter:
ESR
ATTN
()
()
Lf=
8f
(106)
All other converters with essentially rectangular ripple
into filter:
ESR
()
Lf=
ATTN
()
DC
1–DC
()
()
f
(107)
ESR = Filter capacitor series resistance.
ATTN = Ripple attenuation required, as a ratio of peak-
to-peak ripple IN to peak-to-peak ripple OUT.
DC = Duty cycle of converter. (If unknown, use worst-
case of 0.5).
Example: A 100kHz buck converter with 150mV
P-P
ripple
which must be reduced to 20mV. ATTN = 150/20 = 7.5.
Assume a filter capacitor with ESR = 0.3Ω
0.3
()
L =
7.5
()
= 2.8µH
5
810
()
(108)
Example: A 100kHz positive to negative converter with
output ripple of 250mV
which must be reduced to
P-P
30mV. Assume duty cycle has been calculated at 30% =
0.3, and ESR of filter capacitor is 0.2Ω:
0.2
()
250/30
()
L =
0.3
()
5
10
1– 0.3
()
= 3.
5
H
µ
(109)
If the inductor is known, the equations can be rearranged
to solve for capacitor ESR:
Buck Converter:
8f L
ESR =
Square Wave Ripple In:
ESR =
()
ATTN
ATTN
()
f•L
DC
1–DC
()
()
(110)
The output filter will affect load regulation if it is “outside”
the regulator feedback loop. Series resistance of the
filter inductor will add directly to the closed-loop output
resistance of the converter. This closed-loop resistance
is typically in the range of 0.002Ω to 0.01Ω, so a filter
inductor resistance of 0.02Ω may represent a significant
loss in load regulation. One solution is to move the filter
an44fa
AN44-41
Application Note 44
“inside” the feedback loop by moving the sense points to
the output of the filter. This should be avoided if possible
because the added phase shift of the filter can cause difficulties in stabilizing the converter. Buck converters will
tolerate an output filter inside the feedback loop by simply
reducing the loop unity gain frequency. Positive-to-negative
converters and boost converters have a “right-half plane
zero” which makes them very sensitive to additional
phase shift. To avoid stability problems, one should first
determine if the load regulation degradation caused by a
filter is really a problem. Most digital and analog “chips”
in use today tolerate modest changes in supply voltage
with little or no effect on performance.
When the sense resistor is tied to the output of the filter, a
“fix” for stability problems is to connect a capacitor from the
input of the filter to a tap on the feedback divider as shown
in Figure 23. This acts as a “feedforward” path around the
filter. The minimum size of C
will be determined by the
X
filter response, but should be in the range of 0.1µF to1µF.
could theoretically be connected directly to the FB pin,
C
X
but this should be done only if the peak-to-peak ripple on
the main output capacitor is less than 75mV
P-P
.
A word about “measured” filter output ripple. The true
ripple voltage should contain only the fundamental of
the switching frequency because higher harmonics and
“spikes” are very heavily attenuated. If the ripple as measured on an oscilloscope is abnormally high or contains
high frequencies, the measurement technique is probably
at fault. See the Oscilloscope Techniques section.
C
."*/
OUTPUT
$"1"$*503
'#
-5
GND
Figure 23. Feedforward when Output Filter is Inside
Feedback Loop
X
3"
3
L
3#
L
OUTPUT
'*-5&3
"/t'
INPUT FILTERS
Most switching regulators draw power from the input
supply with rectangular or triangular current pulses. (The
exception is a boost converter where the inductor acts as a
filter for input current). These current pulses are absorbed
primarily by the input bypass capacitor which is located
right at the regulator input. Significant ripple current can
still flow in the input lines, however, if the impedance of
the source, including the inductance of supply lines, is low.
This ripple current may cause unwanted ripple voltage on
the input supply or may cause EMI in the form of magnetic
radiation from supply lines. In these cases, an input filter
may be required. The filter consists of an inductor in series
with the input supply combined with the input capacitor
of the converter, as shown in Figure 24.
R
F
OUTPUTCONVERTER
"/t'
INPUT
SUPPLY
L
C
IN
Figure 24. Input Filter
To calculate a value for L requires knowledge of what ripple
current is allowed in the supply line. This is normally an
unknown parameter, so much hand waving may go on in
search of a value. Assuming that a value has been arrived
at, L is found from:
ESR DC
L =
I
⎛
SUP
f
⎜
I
⎝
CON
1–DC
()
()
⎞
ESR
–
Rf
⎟
⎠
(111)
ESR = Effective series resistance of input capacitor.
DC = Converter duty cycle. If unknown, use 0.5 as
worst case.
= Peak-to-peak ripple current drawn by the con-
I
CON
verter, assuming continuous mode. For buck
converters, I
converters have I
Tapped-inductor I
'(1+N)].
[V
IN
I
= Peak-to-peak ripple allowed in supply lines.
SUP
= “Damping” resistor which may be required to
R
f
CON
≈ I
CON
CON
. Positive-to-negative
OUT
= I
(V
' + VIN')/VIN'.
OUT
(N • V
OUT
' + VIN')/
= I
OUT
OUT
prevent instabilities in the converter.
an44fa
AN44-42
Application Note 44
Example: A 100kHz buck converter with V
= 4A, V
= 20V, (DC = 0.25). Input capacitor ESR is
IN
0.05Ω. It is desired to reduce supply line ripple current
to 100mA(
L =
). Assume Rf is not needed (= ∞).
P-P
0.05
()
0.25
()
1– 0.25
()
= 3.75µH
0.1
10
⎛
5
⎜
⎝
⎞
–0
⎟
⎠
4
For further details on input filters, including the possible
need for a damping resistor (R
), see the Input Filters
f
section in Application Note 19.
The current rating of the input inductor must be a minimum of:
OUT
= 5V, I
(112)
OUT
OSCILLOSCOPE TECHNIQUES
Switching regulators are a perfect test bed for poor oscilloscope techniques. A “scope” can lie in many ways and
they all show up in a switching regulator because of the
combination of fast and slow signals, coupled with both
large and very small amplitudes. The following Rogue’s
Gallery will hopefully help the reader avoid many hours
of frustration (and eliminate some embarrassing phone
calls to the author).
Ground Loops
Good safety practice requires most instruments to have
their “ground” system tied to a “third” (green) wire in
the power cord. This unfortunately results in current flow
V
()
IL=
Use Minimum V
()
I
()
OUT
OUT
Amps
V
E
()
()
IN
IN
(113)
For this example;
=
I
L
20
E ≈ 0.8
()
()
= 1.25A
5
()4()
Efficiency or overload considerations may dictate an inductor with higher current rating to minimize copper losses.
Core losses will usually be negligible.
through oscilloscope probe ground leads (shield) when
other instruments source or sink current to the device
under test. Figure 25 details this effect.
A generator is driving a 5V signal into 50Ω on the breadboard, resulting in a 100mA current. The return path for
this current divides between the ground from the signal
generator (typically the shield on a BNC cable) and the
secondary ground “loop” created by the oscilloscope probe
ground clip (shield), and the two “third wire” connections
on the signal generator and oscilloscope. In this case, it
was assumed that 20mA flows in the parasitic ground
loop. If the oscilloscope ground lead has a resistance of
SIGNAL
GENERATOR
POWER
100mA
80mA
PLUG
Figure 25. Ground Loop Errors
REGULATOR
UNDER TEST
*
PROBE SHIELD PROVIDES
*
PATH FOR GENERATOR
RETURN CURRENT
20mA
POWER
PLUG
AC MAINS
OSCILLOSCOPE
EARTH
GROUND
"/t'
an44fa
AN44-43
Application Note 44
0.2Ω, the screen will show a 4mV “bogus” signal. The
problem gets much worse for higher currents, and fast
signal edges where the inductance of the scope probe
shield is important.
DC ground loops can be eliminated by disconnecting the
third wire on the oscilloscope (its called a cheater plug,
and my lawyers will not let me recommend it!) or by the
use of an isolation transformer in the oscilloscope power
connection.
Another source of circulating current in the probe shield
wire is a second connection between a signal source and
the scope. A typical example is a trigger signal connection between the generator trigger output and the scope
external trigger input. This is most often a BNC cable with its own grounded shield connection. This forms a second
path for signal ground return current, with the scope probe
shield completing the path. My solution is to use a BNC
cable which has had its shield intentionally broken. The
trigger signal may be less than perfect, but the scope will
not care. Mark the cable to prevent normal use!
Rule #1: Before making any low level measurements,
touch the scope probe “tip” to the probe ground clip with
the clip connected to the desired breadboard ground. The
“scope” should indicate flatline. Any signal displayed is
a ground loop lie.
Rule #2: Check 10X scope probe compensation before
being embarrassed by a savvy tech.
Ground “Clip” Pickup
Oscilloscope probes are most often used with a short
ground “lead” with an alligator clip on the end. This
ground wire is a remarkably good antenna. It picks up
local magnetic fields and displays them in full color on the
oscilloscope screen. Switching regulators generate lots of
magnetic fields. Switch wires, diodes, capacitor and inductor leads, even “DC” supply lines can radiate significant
magnetic fields because of the high currents and fast rise/
fall times encountered. The test for ground clip problems
is to touch the probe tip to the alligator clip, with the clip
connected to the regulator ground point. Any trace seen
on the screen is caused either by circulating currents in
a ground loop, or by antenna action of the ground clip.
The fix for ground clip “pickup” is to throw the clip wire
away and replace it with a special soldered-in probe
terminator which can be obtained from the probe manufacturer. The plastic probe tip cover is pulled off to reveal
the naked coaxial metal tube shield which extends to the
small needle tip. This tube slips into the terminator to
complete the ground connection. This technique will allow
you to measure millivolts of output ripple on a switching
regulator even in the presence of high magnetic fields.
Miscompensated Scope Probe
10X scope probes must be “compensated” to adjust AC
attenuation so it precisely matches the 10:1 DC attenuation
of the probe. If this is not done correctly, low frequency
signals will be distorted and high frequency signals will
have the wrong amplitude. In switching regulator applications, a “miscompensated” probe may show “impossible”
waveforms. A typical example is the switching node of an
LT1074 buck converter. This node swings positive to a
level 1.5V to 2V below the input voltage, and negative to
one diode drop below ground. A 10X probe with too little
AC attenuation could show the node swinging above the
supply, and so far negative that the diode forward voltage
appears to be many volts instead of the expected 0.5V.
Remember that at these frequencies (100kHz), the wave
shape looks right because the probe acts purely capacitive,
so the wrong amplitude may not be immediately obvious.
Rule #3: Don’t make any low level measurements on a
switching regulator using a standard ground clip lead. If
an official terminator is not available, solder a solid bare
hookup wire to the desired ground point and wrap it around
the exposed probe coaxial tube with absolute minimum
distance between the ground point and the tube. Position
the ground point so that the probe needle tip can touch
the desired test point.
Wires Are Not Shorts
A common error in probing switching regulators is to
assume that the voltage anywhere on a wire path is the
same. A typical example is the ripple voltage measured
at the output of a switching regulator. If the regulator
delivers square waves of current to the output capacitor,
a positive to negative converter for instance, the current
rise/fall time will be approximately 10
8
A/sec. This dI/dt will
an44fa
AN44-44
Application Note 44
generate≈2V per inch “spikes” in the lead inductance of the
output capacitor. The output (load) traces of the regulator
should connect directly to the through-hole points where
the radial-lead output capacitor leads are soldered in. The
oscilloscope probe tip terminator (no ground clips, please)
must be tied in directly at the base of the capacitor also.
The 2V/in. number can cause significant measurement
errors even at high level points. When the input voltage
to a switching regulator is measured across the input bypass capacitor, the spikes seen may be only a few tenths
of a volt. If that capacitor is several inches away from the
LT1074 though, the spikes “seen” by the regulator may
be many volts. This can cause problems, especially at a
low input voltage. Probing the “wrong” point on the input
wire might mask these spikes.
Rule #4: If you want to know what the voltage is on a high
AC current signal path, define exactly which component
voltage you are measuring and connect the probe termi-
nator directly across that component. As an example, if
your circuit has a snubber to protect against switch overvoltage, connect the probe terminator directly to the IC
switch terminals. Inductance in the leads connecting the
switch to the snubber may cause the switch voltage to be
many volts higher than the snubber voltage.
EMI SUPPRESSION
Electromagnetic interference (EMI) is a fact of life with
switching regulators. Consideration of its effects should
occur early in the design so that the electrical, physical,
and monetary implications of any required filtering or
shielding are understood and accounted for. EMI takes
two basic forms; “conducted,” which travels down input
and output wiring, and “radiated,” which takes the form
of electric and magnetic fields.
Conducted EMI occurs on input lines because switching
regulators draw current from their input supply in pulses,
either square wave, or triangular, or a combination of
these. This pulsating current can create bothersome ripple
voltage on the input supply and it can radiate from input
lines to surrounding lines or circuitry.
Conducted EMI on the output of a switching regulator is
usually limited to the voltage ripple on the output nodes.
Ripple frequencies from buck regulators consist almost
entirely of the fundamental switching frequency, whereas
boost and inverting regulator outputs contain much higher
frequency harmonics if no additional filtering is used.
Electric fields are generated by the fast rise and fall times
of the switch node in the regulator. EMI from this source
is usually of secondary concern and can be minimized by
keeping all connections to this node as short as possible and
by keeping this node “internal” to the switching regulator
circuitry so that surrounding components act as shields.
The primary source of electric field problems within the
regulator itself is coupling between the switching node and
the feedback pin. The switching node has a typical slew rate
of 0.8 • 10
is typically 1.2kΩ. Just 1PF coupling between these pins
will generate 1V spikes at the feedback pin, creating erratic
switching waveforms. Avoid long traces on the feedback
pin by locating the feedback resistors immediately adjacent
to the pin. When coupling to switching node cannot be
avoided, a 1000pF capacitor from the LT1074 ground pin
to the feedback pin will prevent most pickup problems.
Magnetic fields are more troublesome because they are
generated by a variety of components, including the input
and output capacitors, catch diode, snubber networks,
the inductor, the LT1074 itself, and many of the wires
connecting these components. While these fields do not
usually cause regulator problems, they can create problems
for surrounding circuitry, especially with low level signals
such as disc drives, data acquisition, communication, or
video processing. The following guidelines will be helpful
in minimizing magnetic field problems.
1. Use inductors or transformers with good EMI character-
istics such as toroids or pot cores. The worst offenders
from an EMI standpoint are “rod” inductors. Think of
them as cannon barrels firing magnetic flux lines in every
direction. Their only application in switchers should be
in the output filter where ripple current is very low.
9
V/sec., and the impedance at the feedback pin
an44fa
AN44-45
Application Note 44
2. Route all traces carrying high ripple current over a
ground plane to minimize radiated fields. This includes
the catch diode leads, input and output capacitor leads,
snubber leads, inductor leads, LT1074 input and switch
pin leads, and input power leads. Keep these leads short
and the components close to the ground plane.
3. Keep sensitive low level circuitry as far away as possible, and use field-cancelling tricks such as twisted-pair
differential lines.
4. In critical applications, add a “spike killer” bead on the
catch diode to suppress high harmonics. These beads
will prevent very high dI/dt signals, but will also make
the diode appear to turn on slowly. This can create
higher transient switch voltages at switch turn-off, so
switch waveforms should be checked carefully.
5. Add an input filter if radiation from input lines could
be a problem. Just a few µH in the input line will allow
the regulator input capacitor to swallow nearly all the
ripple current created at the regulator input.
Alternating Switch Timing
Switch on time may alternate from cycle to cycle if excess
switching frequency ripple appears on the V
pin. This
C
can occur naturally because of high ESR in the output
capacitor or because of pickup on the FB pin or the V
A simple check is to put a 3000pF capacitor from V
pin.
C
pin
C
to the ground pin close to the IC. If the erratic switching
improves or is cured, excess V
pin ripple is the problem.
C
Isolate it by connecting the capacitor from FB to ground
pin. If this also makes the problem disappear, V
pin
C
pickup is eliminated, and FB pickup is the likely culprit.
The feedback resistors should be located close to the IC
so that connections to the FB pin are short and routed
away from switching nodes. A 500pF capacitor from FB
to ground pin will usually be sufficient if pickup cannot
be eliminated. Occasionally, excess output ripple is the
problem. This can be checked by paralleling the output
capacitor with a second unit. A 1000pF to 3000pF capacitor
can often be used to stop erratic switching caused
on V
C
by high output ripple, but be sure the ripple current rating
of the output capacitor is adequate!
TROUBLESHOOTING HINTS
Low Efficiency
The major contributors here are switch and diode loss.
These are readily calculable. If efficiency is abnormally
low after factoring in these effects, zero in on the inductor. Core or copper loss may be the problem. Remember
that inductor current may be much higher than output
current in some topologies. A very handy substitution
tool is a 500µH inductor wound with heavy wire on a large
molypermalloy core. 100µH and 200µH taps are helpful.
This inductor can be substituted for suspect units when
inductor losses are suspected. If you read this Application
Note, you will know that a large core is used not to reduce
core loss, but to allow enough room for large wire that
eliminates copper loss.
If inductor losses are not the problem, check all the nickel
and dime effects such as quiescent current and capacitor
loss to see if the sum is no longer negligible.
Input Supply Won’t Come Up
Switching regulators have negative input resistance at DC.
Therefore, they draw high current at low V
. This can latch
IN
input supplies low. See the Soft-Start section for details.
Switching Frequency is Low in Current Limit
This is normal. See the Frequency Shifting at the Feedback
Pin in the Pin Description section.
IC Blows Up!
Like the LT1070 before it, the only thing that can destroy
the LT1074 or LT1076 is excess switch voltage. (I am ignoring obvious stuff like voltage reversal or wiring errors).
Start-up surges can sometimes cause momentary large
switch voltages, so check voltages carefully with an oscilloscope. Read the section on oscilloscope techniques.
AN44-46
an44fa
Application Note 44
IC Runs Hot
A common mistake is to assume that heat sinks are no
longer needed with a switching design. This is often true
for small load currents, but as load current climbs above
1A, switch loss may increase to the point where a heat
sink is needed. A TO-220 package has a thermal resistance
of 50°C/W with no heat sink. A 5V, 3A output (15W) with
10% switch loss, will dissipate over 1.5W in the IC. This
means a 75°C temperature rise, or 100°C case temperature
at room ambient. This is normally referred to as hot! A
small heat sink solves the problem. Simply soldering the
TO-220 tab to an enlarged copper pad on the PC board
will reduce thermal resistance to ≈25°C/W.
High Output Ripple or Noise Spikes
First read the Oscilloscope Techniques section to avoid
possible embarrassment, then check ESR of the output
capacitor. Remember that fast (<100ns) spikes will be
greatly attenuated by parasitic supply line inductance
and load capacitance even if supply lines are only a few
inches long.
Poor Load or Line Regulation
Check in this order:
1. Secondary output filter DC resistance if it is outside the
loop.
2. Ground loop error in oscilloscope.
3. Improper connection of output divider resistors to current carrying lines.
4. Excess output ripple. The LT1074 can peak detect ripple
voltages on the FB pin if they exceed 50mV
P-P
.
See the Reference Shift with Ripple Voltage graph in the
Typical Performance Characteristics section.
500kHz-5MHz Oscillations, Especially at Light Load
This is discontinuous mode ringing and is quite normal
and harmless. See buck converter waveform description
for more details.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.