FEATURES
LT1024
Dual, Matched
Picoampere, Microvolt Input,
Low Noise Op Amp
U
DESCRIPTIO
■
Guaranteed
■
Guaranteed
Offset Voltage: 50µV Max
Bias Current:
25°C: 120pA Max
–55°C to 125°C: 700pA Max
■
Guaranteed
■
Low Noise, 0.1Hz to 10Hz: 0.5µV
■
Guaranteed
■
Guaranteed
■
Guaranteed
■
Guaranteed
■
Guaranteed
Drift: 1.5µV/°C Max
P-P
Supply Current: 600µA Max
CMRR: 112dB Min
PSRR: 112dB Min
Voltage Gain with 5mA Load Current
Matching Characteristics
U
APPLICATIO S
■
Strain Gauge Signal Conditioner
■
Dual Limit Precision Threshold Detection
■
Charge Integrators
■
Wide Dynamic Range Logarithmic Amplifiers
■
Light Meters
■
Low Frequency Active Filters
■
Standard Cell Buffers
■
Thermocouple Amplifiers
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LT®1024 dual, matched internally compensated
universal precision operational amplifier can be used in
practically all precision applications requiring multiple op
amps. The LT1024 combines picoampere bias currents
(which are maintained over the full –55°C to 125°C
temperature range), microvolt offset voltage (and low drift
with time and temperature), low voltage and current
noise and low power dissipation. Extremely high
common mode and power supply rejection ratios,
practically immeasurable warm-up drift, and the ability to
deliver 5mA load current with a voltage gain of a million,
round out the LT1024’s superb precision specifications.
Tight matching is guaranteed on offset voltage,
noninverting bias currents and common mode and power
supply rejections.
The all-around excellence of the LT1024 eliminates the
necessity of the time-consuming error analysis procedure
of precision system design in many dual applications; the
LT1024 can be stocked as the universal dual op amp in the
14-pin DIP configuration.
For a single op amp with similar specifications, see the
LT1012 data sheet; for a single supply dual precision op
amp in the 8-pin configuration, see the LT1013 data sheet.
TYPICAL APPLICATIO
Two Op Amp Instrumentation Amplifier
R5
†
2.2k
R1*
100k
–
INPUTS
+
R4
GAIN = ~ 1001 +
R3
*
TRIM FOR COMMON-MODE REJECTION
†
TRIM FOR GAIN
R2
10k
3
–
1/2 LT1024
4
+
R2R1R3
1
++
()
R4
2
13
R2 + R3
R5
10k
~
R3
U
R4
100k
10
–
1/2 LT1024
11
+
TYPICAL PERFORMANCE:
OFFSET VOLTAGE = 20µV
BIAS CURRENT = ±30pA
OFFSET CURRENT = 30pA
Input Bias Current vs Temperature
100
50
6
OUTPUT
LT1024 • TA01
–50
INPUT BIAS CURRENT (pA)
–100
–150
0
–50
–25
UNDERCANCELLED UNIT
OVERCANCELLED UNIT
50
25
0
TEMPERATURE (°C)
75
100
LTC1024 • TA02
125
1024fa
1
LT1024
WWWU
ABSOLUTE AXI U RATI GS
(Note 1)
Supply Voltage ...................................................... ±20V
Differential Input Current (Note 2) ...................... ±10mA
Input Voltage ......................................................... ±20V
Output Short Circuit Duration .......................... Indefinite
Operating Temperature Range
LT1024AM/LT1024M (OBSOLETE).....–55°C to 125°C
LT1024AC/LT1024C ................................ 0°C to 70°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
UU
W
PACKAGE/ORDER I FOR ATIO
TOP VIEW
NULL (A)
NULL (A)
OUT (B)
T
JMAX
NOTE: DEVICE MAY BE OPERATED EVEN IF
INSERTION IS REVERSED; THIS IS DUE
TO INHERENT SYMMETRY OF PIN LOCATIONS
OF AMPLIFIERS A AND B (NOTE 3)
T
JMAX
1
2
–
3
–IN (A)
+IN (A)
–
V
(B)
+
V
(B)
= 100°C, θJA = 100°C/W, θJC = 60°C/W (N)
14-PIN SIDE BRAZED (HERMETIC)
= 150°C, θJA = 100°C/W, θJC = 60°C/W (D)
4
5
6
7
A
+
B
N PACKAGE
14-PIN PDIP
D PACKAGE
+
V
(A)
14
OUT (A)
13
–
V
(A)
12
+
+IN (B)
11
–
–IN (B)
10
NULL (B)
9
NULL (B)
8
OBSOLETE PACKAGE
Consider the N14 Package as an Alternate Source
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ORDER
PART NUMBER
LT1024ACN
LT1024CN
ORDER
PART NUMBER
LT1024AMD
LT1024MD
ELECTRICAL CHARACTERISTICS
Individual Amplifiers. VS = ±15V, V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
I
OS
I
B
e
n
e
n
i
n
A
VOL
CMRR Common Mode Rejection Ratio VCM = ±13.5V 112 132 108 132 dB
PSRR Power Supply Rejection Ratio VS = ±2V to ±20V 112 132 108 132 dB
V
OUT
I
S
Input Offset Voltage 15 50 20 100 µV
Long Term Input Offset Voltage Stability 0.3 0.3 µV/month
Input Offset Current 20 100 25 180 pA
Input Bias Current ±25 ±120 ±30 ±200 pA
Input Noise Voltage 0.1Hz to 10Hz 0.5 0.5 µV
Input Noise Voltage Density fO = 10Hz (Note 4) 17 33 17 33 nV/√Hz
Input Noise Current Density fO = 10Hz 20 20 fA/√Hz
Large-Signal Voltage Gain V
Input Voltage Range ±13.5 ±14.0 ±13.5 ±14.0 V
Output Voltage Swing RL = 10kΩ ±13 ±14 ±13 ±14 V
Slew Rate 0.1 0.2 0.1 0.2 V/µs
Supply Current per Amplifier 380 600 380 700 µA
= 0V, TA = 25°C unless otherwise noted.
CM
LT1O24AM/LT1O24AC LT1024M/LT1O24C
= 1000Hz (Note 4) 14 24 14 24 nV/√Hz
f
O
= ±12V, RL ≥ 10kΩ 250 2000 180 2000 V/mV
OUT
= ±10V, RL ≥ 2kΩ 150 1000 100 1000 V/mV
V
OUT
P-P
1024fa
2
LT1024
ELECTRICAL CHARACTERISTICS
Matching Specifications. VS = ±15V, V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage Match 20 75 25 150 µV
+
I
B
+
I
OS
∆CMRR Common Mode Rejection Ratio VCM = ±13.5V 110 132 106 132 dB
∆PSRR Power Supply Rejection Ratio VS = ±2V to 20V 110 132 106 132 dB
Average Noninverting Bias ±30 ±150 ±40 ±250 pA
Current
Noninverting Offset Current 30 150 30 300 pA
Match
Match
Channel Separation f ≤ 10Hz (Note 4) 134 150 134 150 dB
Individual Amplifiers. The ● denotes the specifications which apply over the full operating temperature range of 0°C ≤ TA = 70°C for
the LT1024AC and LT1024C; –55°C ≤ TA ≤ 125°C for the LT1024AM and LT1024M. VS = ±15V, VCM = 0V, unless otherwise noted.
= 0V, TA = 25°C unless otherwise noted.
CM
LT1024AM/LT1024AC LT1O24M /LT1O24C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
I
OS
I
B
A
VOL
CMRR Common Mode Rejection Ratio VCM = ±13.5V ● 108 128 106 128 dB
PSRR Power Supply Rejection Ratio VS = ±2.5V to ±18V ● 108 128 106 128 dB
V
OUT
I
S
Input Offset Voltage 0°C to 70°C ● 30 120 35 200 µV
–55°C to 125°C
Average Temperature Coefficient of ● 0.25 1.5 0.3 2.0 µV/°C
Input Offset Voltage
Input Offset Current 0°C to 70°C ● 40 250 50 300 pA
–55°C to 125°C
Average Temperature Coefficient of ● 0.5 2.5 0.7 3 pA/°C
Input Offset Current
Input Bias Current 0°C to 70°C ● ±40 ±250 ±50 ±400 pA
–55°C to 125°C
Average Temperature Coefficient of 0°C to 70°C ● 0.4 3 0.5 4 pA/°C
Input Bias Current –55°C to 125°C
Large-Signal Voltage Gain V
Input Voltage Range ● ±13.5 ±13.5 V
Output Voltage Swing RL = 10kΩ ● ±13 ±14 ±13 ±14 V
Supply Current ● 400 800 400 900 µA
= ±12V, RL ≥ 10kΩ ● 150 1000 150 1000 V/mV
OUT
= ±10V, RL ≥ 2kΩ ● 100 600 100 600 V/mV
V
OUT
LT1024AM/LT1024AC LT1024M/LT1024C
● 40 200 50 300 µV
● 80 350 100 500 pA
● ±100 ±700 ±200 ±1300 pA
● 16 212pA/°C
1024fa
3
LT1024
ELECTRICAL CHARACTERISTICS
the temperature range of 0°C ≤ T
= 70°C for the LT1024AC and LT1024C; –55°C ≤ TA ≤ 125°C for the LT1024AM and LT1024M,
A
Matching Specifications. The ● denotes the specifications which apply over
VS = ±15V, VCM = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage Match 0°C to 70°C ● 35 170 45 300 µV
–55°C to 125°C
Input Offset Voltage Tracking ● 0.3 2 0.4 3.5 µV/°C
+
I
B
Average Noninverting Bias Current 0°C to 70°C ● ±40 ±300 ±50 ± 500 pA
–55°C to 125°C
+
I
OS
Noninverting Offset Current 0°C to 70°C ● 40 300 50 500 pA
–55°C to 125°C
∆CMRR Common Mode Rejection Ratio Match VCM = ±13.5V ● 106 128 104 128 dB
∆PSRR Power Supply Rejection Ratio Match VS = ±2.5V to ±18V ● 106 128 104 128 dB
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Differential input voltages greater than 1V will cause excessive
current to flow through the input protection diodes unless limiting
resistance is used.
Note 3: The V+ supply terminals are completely independent and may be
powered by separate supplies if desired (this approach, however, would
sacrifice the advantages of the power supply rejection ratio matching). The
–
supply terminals are both connected to the common substrate and
V
must be tied to the same voltage. Both V
–
pins should be used.
Note 4: This parameter is tested on a sample basis only.
LT1024AM/LT1024AC LT1024M/LT1024C
● 50 280 70 500 µV
● ±100 ±800 ±200 ±1400 pA
● 80 800 150 1500 pA
Optional Offset Nulling Circuit
+
V
5k TO 100k
POT
2(9)
14 (7)
13
OUTPUT
(6)
INPUT OFFSET VOLTAGE CAN BE ADJUSTED
–
V
OVER A ±800µV RANGE WITH A 5k TO
100k POTENTIOMETER
LT1024 • EC01
(10)
(11)
3
4
1(8)
–
1/2
LT1024
+
12 (5)
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Offset Voltage vs Source
Resistance (Balanced or Unbalanced)
1000
V
= ±15V
S
100
–55°C TO 125°C
25°C
10
INPUT OFFSET VOLTAGE (µV)
1
1k
SOURCE RESISTANCE (Ω)
100k10k 300k 1M 3M 10M30k3k
LT1024 • TPC01
Input Offset Current vs
Temperature
60
VS = ±15V
= 0V
V
CM
50
40
30
20
INPUT OFFSET CURRENT (pA)
10
0
–50
–25 0
25 75
TEMPERATURE (°C)
50 100 125
LT1024 • TPC02
1024fa
4
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias Current Over
Common Mode Range
60
V
= ±15V
S
= 25°C
T
A
40
20
0
–20
INPUT BIAS CURRENT (pA)
–40
–60
–15
–5 0 5
–10
COMMON MODE INPUT VOLTAGE (V)
Supply Current vs Supply
Voltage per Amplifier
500
DEVICE WITH POSITIVE
INPUT CURRENT
= 2 x 10
–
+
LT1024 • TPC03
12
10 15
R
IN CM
DEVICE WITH NEGATIVE
INPUT CURRENT
I
B
V
CM
Ω
Warm-Up Drift
5
VS = ±15V
= 25°C
T
A
4
3
2
1
CHANGE IN OFFSET VOLTAGE (µV)
0
1
0
TIME AFTER POWER ON (MINUTES)
2
3
4
LT1024 • TPC04
0.1Hz to 10Hz Noise Noise Spectrum
TA = 25°C
±2V TO ± 20V
V
S
LT1024
Offset Voltage Drift and
Tracking with Temperatures of
Representative Units
60
VS = ±15V
40
20
0
–20
OFFSET VOLTAGE (µV)
–40
–60
5
–50
1000
1
2
–25 0
TA = 25°C
±2 TO ± 20V
V
S
2
INDIVIDUAL AMPLIFIERS
TRACKING (MATCH DRIFT)
25 75
TEMPERATURE (°C)
2
1
1
2
50 100 125
LT1024 • TPC05
400
SUPPLY CURRENT (µA)
300
0
25°C
125°C
–55°C
± 5
±10
SUPPLY VOLTAGE (V)
Total Noise vs Source
Resistance
10.0
T
= 25°C
A
= ±2V TO ±20V
V
S
1.0
R
–
R
+
= 2R
R
0.1
TOTAL NOISE DENSITY (µV/√Hz)
AT 1kHz
0.01
2103104105106107
10
S
AT 10Hz
SOURCE RESISTANCE (Ω)
±15
LT1024 • TPC06
AT 10Hz
AT 1kHz
RESISTOR NOISE
ONLY
LT1024 • TPC09
± 20
10
NOISE VOLTAGE 400nV/DIVISION
2
0
TIME (SECONDS)
Common Mode Rejection and
CMRR Match vs Frequency
140
120
100
80
60
40
20
V
= ±15V
S
COMMON MODE REJECTION RATIO (dB)
= 25°C
T
A
8
0
1
10 100
6
4
CMRR
1k 100k
FREQUENCY (Hz)
8
10
LT1024 • TPC07
MATCH
(∆CMRR)
10k 1M
LT1024 • TPC10
VOLTAGE NOISE DENSITY (nV/√Hz)
100
CURRENT NOISE DENSITY (fA/√Hz)
10
1
1
CURRENT NOISE
VOLTAGE NOISE
1/f CORNER
2.5Hz
10 100 1000
FREQUENCY (Hz)
Power Supply Rejection vs
Frequency
140
120
100
80
60
40
POWER SUPPLY REJECTION RATIO (dB)
20
0.1
POSITIVE
SUPPLY
110
FREQUENCY (Hz)
1k 100k 1M
100 10k
1/f CORNER
120Hz
LT1024 • TPC08
VS = ±15V
= 25°C
T
A
NEGATIVE
SUPPLY
LT1024 • TPC11
1024fa
5
LT1024
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Channel Separation vs
Frequency
160
150
140
130
120
110
100
CHANNEL SEPARATION (dB)
90
80
100 1M
R
= 10Ω
S
1k 100k10k
FREQUENCY (Hz)
RS = 1k
R
S
V
= ±15V
S
= 25°C
T
A
= 100Ω
LT1024 • TPC12
Voltage Gain vs Frequency
140
120
100
80
60
40
VOLTAGE GAIN (dB)
20
0
–20
0.01
0.1
1
100 1k 10k 100k 1M 10M
10
FREQUENCY (Hz)
VS = ±15V
= 25°C
T
A
LT1024 • TPC13
Gain, Phase Shift vs Frequency
40
30
20
GAIN (dB)
10
0
–10
0.01
Small-Signal Transient
Response
20mV/DIVISION
GAIN
PHASE MARGIN
= 70°C
0.1 1 10
FREQUENCY (MHz)
= 25°C
T
A
= ±15V
V
S
PHASE
LT1024 • TPC14
100
120
PHASE SHIFT (DEGREES)
140
160
180
200
Small-Signal Transient
Response
20mV/DIVISION
Voltage Gain vs Load Resistance
10M
V
= ±15V
S
= ±10V
V
0
3M
1M
VOLTAGE GAIN
300k
100k
1
LOAD RESISTANCE (kΩ)
521020
Large-Signal Transient
Response
2V/DIVISION
–55°C
25°C
125°C
LT1024 • TPC15
6
A
C
= +1
V
LOAD
= 100pF
5µs/DIV
A
C
V
LOAD
= +1
= 1000pF
5µs/DIV
= +1
A
V
20µs/DIV
1024fa
WUUU
APPLICATIO S I FOR ATIO
LT1024
The LT1024 may be inserted directly into OP-10, OP-207
or 0P227 sockets with or without removal of external
nulling components.
The LT1024 is specified over a wide range of power supply
voltages from ±2V to ±18V. Operation with lower supplies
is possible down to ±1.2V (two NiCad batteries).
Advantages of Matched Dual Op Amps
In many applications, the performance of a system
depends on the matching between two operational
amplifiers rather than the individual characteristics of the
two op amps. Two or three op amp instrumentation
amplifiers, tracking voltage references, and low drift active
filters are some of the circuits requiring matching between
two op amps.
The well-known triple op amp configuration illustrates
these concepts. Output offset is a function of the difference between the offsets of the two halves of the
LT1024. This error cancellation principle holds for a
considerable number of input-referred parameters in
addition to offset voltage and its drift with temperature.
Input bias current will be the average of the two
noninverting input currents (I
+
). The difference between
B
these two currents (I
+
) is the offset current of the
OS
instrumentation amplifier. Common mode and power
supply rejections will be dependent only on the match
between the two amplifiers (assuming perfect resistor
matching).
The concepts of common mode and power supply rejection ratio match (∆CMRR and ∆PSRR) are best demonstrated with a numerical example:
Assume CMRRA = +1.0µV/V or 120dB
and CMRRB = +0.5µV/V or 126dB,
then ∆CMRR = 0.5µV/V or 126dB
if CMRRB = –0.5µV/V, which is still 126dB,
then ∆CMRR = 1.5µV/V or 116.5dB.
Typical performance of the instrumentation amplifier:
Input offset voltage = 25µV.
Input bias current = 30pA.
Input resistance = 1012Ω.
Input offset current = 30pA.
Input noise = 0.7µV
P-P
.
Power bandwidth (VO = ±10V) = 80kHz.
Clearly, the LT1024, by specifying and guaranteeing all of
these matching parameters, can significantly improve the
performance of matching dependent circuits.
Three Op Amp Instrumentation Amplifier
15V
+
A
1/2 LT1024
–
–15V
15V
7
–
B
1/2 LT1024
+
5
–15V
14
13
R1
12
10k
1%
R3
2.1k
1%
R8
200Ω
R2
10k
1%
6
–INPUT
+INPUT
4
3
10
11
TRIM R8 FOR GAIN
TRIM R9 FOR DC COMMON MODE REJECTION
TRIM R10 FOR AC COMMON MODE REJECTION
R4
100Ω
1%
R5
100Ω
1%
C1
100pF
R10
100k
R7
9.76k
1%
R9
500Ω
2
–
LT1037
3
+
GAIN = 1000
R6
10k
1%
15V
–15V
7
4
6
LT1024 • AI01
OUTPUT
1024fa
7
LT1024
WUUU
APPLICATIO S I FOR ATIO
Achieving Picoampere/Microvolt Performance
In order to realize the picoampere/microvolt level
accuracy of the LT1024, proper care must be exercised.
For example, leakage currents in circuitry external to the
op amp can significantly degrade performance. High qual-
ity insulation should be used (e.g., PTFE, Kel-F); clean-
ing of all insulating surfaces to remove fluxes and other
residues will probably be required. Surface coating may be
necessary to provide a moisture barrier in high humidity
environments.
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close to
that of the inputs: in inverting configurations, the guard
ring should be tied to ground; in noninverting connections, to the inverting input. Guarding both sides of the
printed circuit board is required. Bulk leakage reduction
depends on the guard ring width. Nanoampere level leakage into the offset trim terminals can affect offset voltage
and drift with temperature.
Microvolt level error voltages can also be generated in the
external circuitry. Thermocouple effects, caused by temperature gradients across dissimilar metals at the contacts to the input terminals, can exceed the inherent drift
of the amplifier. Air currents over device leads should be
minimized, package leads should be short, and the two
input leads should be as close together as possible and
maintained at the same temperature.
Test Circuit for Offset Voltage and its Drift with Temperature
R1
50k*
15V
(7)14
3
–
R2
100Ω*
50k*
(10)
LT1024
4
+
(11)
R3
12 (5)
–15V
13
(6)
RESISTORS MUST HAVE LOW
*
THERMOELECTRIC POTENTIAL
P
THIS CIRCUIT IS ALSO USED AS THE BURN-IN
**
CONFIGURATION FOR THE LT1024. WITH SUPPLY
VOLTAGES INCREASED TO ±20V, R1 = R3 = 20k,
R2 = 200Ω, AV = 100
V
= 1000V
O
V
0
0S
LT1024 • AI02
1024fa
8
WUUU
APPLICATIO S I FOR ATIO
Direct Pressure Transducer to Digital Output Signal Conditioner
15V
TRANSDUCER
ZERO
10µF
–5V
10k
–5V
120k*
50k
GAIN TRIM
+
–15V
330Ω
15V
13
LT1024
–15V
2k 620Ω
IN
14
+
–
12
ADJ
LT137A
2N3904
4
3
OUTV
28k 14k
226k*
10k*
LT1024
~
~ 10kHz
f
CLK
0.0047µF
1N4148
0.01µF
15V
–
LT1 024
+
–15V
7
10k
6
5
10
11
OUT B
10k
CLK Q
74C74
PRE CLR
15V
QD
OUTPUT = f
10k
OUT A
OUT
A/f
B
OUT
1% METAL FILM RESISTOR
*
GATES = 74C00
TRANSDUCER = BLH # DHF-100 PSI
**
PRESSURE TRANSDUCER
0 – 100 PSI = 0 – 1000
COUNTS FULL-SCALE AT CIRCUIT OUTPUT
–5V
2N2979
2N3904
100k100k
10k
–15V
LT1024 • AI03
1024fa
9
LT1024
W
W
SCHE ATIC DIAGRA
TRIM
(8)
1
800Ω 800Ω
22k 22k
Q8
Q7
Q6
Q13
s
Q2
Q17
4.3k
–INPUT
3
(10)
+INPUT
4
(11)
–
V
12
(5)
Q5
s
Q1
Q9
Q10
TRIM
(9)
2
4k
30pF
Q16
s
Q15
Q39
3.3k 3.3k
4.8k
1.3k 4.2k
Q14
s
Q4
Q3
50k 1.5k
Q19Q18
Q11
Q12
1/2 LT1024
Q22
Q21
Q24
3k
Q23
Q31
Q34
J1
Q32
3.3k
Q35
Q33
16k
20k
Q20
Q29
Q25
Q36
320Ω
Q30
Q27
Q28
1.5k
Q40
1.5k
40Ω
Q26
Q37
Q38
330Ω
Q41
Q43
40Ω
100Ω
40Ω
Q42
LT1024 * SD01
+
V
14
(7)
OUTPUT
13
(6)
10
1024fa
PACKAGE DESCRIPTIO
U
D Package
14-Lead Side Brazed (Hermetic)
(Reference LTC DWG # 05-08-1210)
.005
(0.127)
MIN
PIN NO. 1
IDENT
LT1024
.760
(19.304)
MAX
8
121314
11
364
2
1
910
.290
(7.366)
TYP
5
7
.008 – .015
(0.203 – 0.381)
.300
(7.620)
REF
.485
.020 – .060
(0.508 – 1.524)
.125
(3.175)
MIN
(12.319)
MAX
.100
(2.54)
BSC
(0.381 – 0.584)
OBSOLETE PACKAGE
.015 – .023
.165
(4.191)
MAX
.054
(1.372)
TYP
D14 0801
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1024fa
11
LT1024
PACKAGE DESCRIPTIO
U
N Package
14-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
14
.255 ± .015*
(6.477 ± 0.381)
1213
.770*
(19.558)
MAX
11
8910
.300 – .325
(7.620 – 8.255)
(0.508)
.008 – .015
(0.203 – 0.381)
+.035
.325
–.015
+0.889
8.255
()
–0.381
NOTE:
1. DIMENSIONS ARE
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
INCHES
MILLIMETERS
.020
MIN
.130 ± .005
(3.302 ± 0.127)
.120
(3.048)
MIN
.005
(0.125)
MIN
2
31
.045 – .065
(1.143 – 1.651)
.100
(2.54)
BSC
5
4
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1884 Picoamp Input, Precision Op Amp Rail-to-Rail Output
6
7
.065
(1.651)
TYP
.018 ± .003
(0.457 ± 0.076)
N14 1002
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
1024fa
LW/TP 1002 1K REV A • PRINTED IN USA
LINE AR TE CHNO LOGY CORPO R ATION 1988
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