Description
DEMO MANUAL DC2151A
LTC3331EUH
Nanopower Buck-Boost DC/DC with
Energy Harvesting Battery Charger
Demonstration Circuit DC2151A is a nanopower buckboost DC/DC with energy harvesting battery charger
®
featuring the LT C
3331. The LTC3331 integrates a high
voltage energy harvesting power supply plus a DC/DC
converter powered by a rechargeable cell battery to create
a single output supply for alternative energy applications.
The energy harvesting power supply, consisting of an
integrated low-loss full-wave bridge with a high voltage
buck converter, harvests energy from piezoelectric, solar
or magnetic sources. The rechargeable cell input powers a
buck-boost converter capable of operating down to 1.8V
at its input. Either DC/DC converter can deliver energy to
a single output. The buck operates when harvested energy
is available, reducing the quiescent current drawn on the
battery to essentially zero. The buck-boost takes over
when harvested energy goes away.
BoarD photo
A 10mA shunt allows simple battery charging with harvest
energy while a low battery disconnect function protects the
battery from deep discharge. A supercapacitor balancer
is also integrated, allowing for increased output storage.
Voltage and current settings for input and output as well
as the battery float voltage are programmable via pinstrapped logic inputs.
The LTC3331
QFN sur
L, L, LTC, LTM, LT, Burst Mode, OPTI-LOOP, Over-The-Top and PolyPhase are registered
trademarks of Linear Technology Corporation. Adaptive Power, C-Load, DirectSense, Easy Drive,
FilterCAD, Hot Swap, LinearView, µModule, Micropower SwitcherCAD, Multimode Dimming, No
Latency Δ∑, No Latency Delta-Sigma, No RSENSE, Operational Filter, PanelProtect, PowerPath,
PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT, UltraFast and VLDO
are trademarks of Linear Technology Corporation. Other product names may be trademarks of
the companies that manufacture the products.
100
EUH is available in a 5mm × 5mm 32-lead
face mount package with exposed pad.
Buck Efficiency vs I
LOAD
Figure1. DC2151A Demoboard
90
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
1µ 10µ 10m 100m1m100µ
Figure2. Typical Efficiency of DC2151A
V
= 1.8V
OUT
= 2.5V
V
OUT
= 3.3V
V
OUT
= 5V
V
OUT
VIN = 6V, L = 22µH, DCR = 0.19Ω
I
(A)
LOAD
3331 G34
dc2151af
1
DEMO MANUAL DC2151A
performance summary
SYMBOL PARAMETER CONDITIONS MIN MAX UNITS
V
IN
1.8V Output Voltage Range OUT0=0, OUT1=0, OUT2=0 1.728 to 1.872 V
V
OUT
2.5V Output Voltage Range OUT0=1, OUT1=0, OUT2=0 2.425 to 2.575 V
V
OUT
2.8V Output Voltage Range OUT0=0, OUT1=1, OUT2=0 2.716 to 2.884 V
V
OUT
3.0V Output Voltage Range OUT0=1, OUT1=0, OUT2=0 2.910 to 3.090 V
V
OUT
3.3V Output Voltage Range OUT0=0, OUT1=0, OUT2=1 3.200 to 3.400 V
V
OUT
3.6V Output Voltage Range OUT0=1, OUT1=0, OUT2=1 3.492 to 3.708 V
V
OUT
4.5V Output Voltage Range OUT0=0, OUT1=1, OUT2=1 4.365 to 4.635 V
V
OUT
5.0V Output Voltage Range OUT0=1, OUT1=1, OUT2=1 4.850 to 5.150 V
V
OUT
3.45V Float Voltage Range FLOAT1=0, FLOAT=0 3.381 to 3.519 V
V
BAT
4.00V Float Voltage Range FLOAT1=0, FLOAT=1 3.920 to 4.080 V
V
BAT
4.1V Float Voltage Range FLOAT1=1, FLOAT=0 4.018 to 4.182 V
V
BAT
4.2V Float Voltage Range FLOAT1=1, FLOAT=1 4.116 to 4.284 V
V
BAT
Input Voltage Range 3.0 to 18.0 V
Specifications are at TA = 25°C
operating principle
Refer to the block diagram within the LTC3331 data sheet
for its operating principle.
a total drop of about 800mV at typical piezo-generated
currents, but is capable of carrying up to 50mA.
The LTC3331 combines a buck switching regulator and
a buck-boost switching regulator to produce an energy
harvesting solution with battery backup. The converters are
controlled by a prioritizer that selects which converter to
use based on the availability of a battery and/or harvestable
energy. If harvested energy is available, the buck regulator
is active and the buck-boost is off. With a battery charger
and a supercapacitor balancer and an array of different
configurations, the LTC3331 suits many applications.
The synchronous buck converter is an ultralow quiescent
current power supply tailored to energy harvesting applica
-
tions. It is designed to interface directly to a piezoelectric
alternative A/C energy source, rectify and store the har-
or
vested energy
on an external capacitor while maintaining a
regulated output voltage. It can also bleed off any excess
input power via an internal protective shunt regulator.
An internal full-wave bridge rectifier, accessible via AC1
and AC2 inputs, rectifies AC sources such as those from
a piezoelectric element. The rectified output is stored on
a capacitor at the V
pin and can be used as an energy
IN
reservoir for the buck converter. The bridge rectifier has
When the voltage on V
rises above the UVLO rising
IN
threshold the buck converter is enabled and charge is
transferred from the input capacitor to the output capaci
tor. When the input capacitor voltage is depleted below
the UVLO falling threshold the buck converter is disabled.
These thresholds can be set according to Table 4 of the
data sheet which offers UVLO rising thresholds from 4V
to 18V with large or small hysteresis windows.
Tw o internal rails, CAP and V
, are generated from VIN and
IN2
are used to drive the high side PMOS and low side NMOS
of the buck converter, respectively. Additionally the V
IN2
rail serves as logic high for output voltage select bits UV
[3:0]. The V
the CAP rail is regulated at 4.8V below V
rail is regulated at 4.8V above GND while
IN2
. These are not
IN
intended to be used as external rails. Bypass capacitors
should be connected to the CAP and V
pins to serve
IN2
as energy reservoirs for driving the buck switches. When
is below 4.8V, V
V
IN
at GND. V
is an internal rail used by the buck and the
IN3
buck-boost. When the LTC3331 runs the buck, V
be a Schottky diode drop below V
buck-boost V
is equal to BAT.
IN3
is equal to VIN and CAP is held
IN2
IN3
. When it runs as a
IN2
will
2
dc2151af
operating principle
DEMO MANUAL DC2151A
The buck regulator uses a hysteretic voltage algorithm
to control the output through internal feedback from the
sense pin. The buck converter charges an output
V
OUT
capacitor through an inductor to a value slightly higher
than the regulation point. It does this by ramping the
inductor current up to 250mA through an internal PMOS
switch and then ramping it down to 0mA through an
internal NMOS switch. When the buck brings the output
voltage into regulation, the converter enters a low quies
cent current sleep
state that monitors the output voltage
-
with a sleep comparator. During this operating mode,
load current is provided by the buck output capacitor.
When the output voltage falls below the regulation point,
the buck regulator wakes up and the cycle repeats. This
hysteretic method of providing a regulated output reduces
losses associated with FET switching and maintains an
output at light loads. The buck delivers a minimum of
50mA average load current when it is switching. V
OUT
can be set from 1.8V to 5.0V via the output voltage select
bits OUT [2:0] according to Table 1 of the data sheet.
The buck-boost uses the same hysteretic algorithm as
the buck to control the output, V
, with the same sleep
OUT
comparator. The buck-boost has three modes of operation:
buck, buck-boost and boost. An internal mode compara
-
tor determines the mode of operation based on BAT and
. In each mode, the inductor current ramps up to
V
OUT
which is programmable via IPK [2:0]. See Table 3
I
PEAK
of the data sheet.
An integrated battery charger operating from the V
IN2
rail
charges the battery through the BB_IN pin. Connecting
BB_IN to the BAT_OUT pin, an internal MOSFET Switch will
then connect the battery charger to BAT_IN. The battery
charger is a shunt regulator which can sink up to 10mA.
The battery float voltage is programmable with two bits
and a third bit is used to program the battery connect and
disconnect voltage levels. This disconnect feature protects
the battery from permanent damage by deep discharge.
Disconnecting the battery from the BAT_OUT=BB_IN node
prevents the load as well as the LTC3331 quiescent current
from further discharging the battery.
OUTPUT VOLTAGE
50mV/DIV
AC-COUPLED
EH_ON
4V/DIV
0V
I
BB_IN
200mA/DIV
0A
0A
I
CHARGE
1mA/DIV
ACTIVE ENERGY HARVESTER ENABLES
CHARGING OF THE BATTERY IN SLEEP
BAT = 3.6V
= 1.8V
V
OUT
= 50mA
I
LOAD
Figure3. Charging Battery with Harvested Energy
A SHIP mode is provided which manually disconnects the
battery. This may be helpful to prevent the battery from
100µs/DIV
discharging when no harvestable energy is available for
long periods of time, such as during shipping. Bring the
SHIP pin high to engage the SHIP mode. To disengage
the SHIP mode, bring the SHIP pin low. The BB_IN pin
needs to be brought above the low battery connect (LBC)
threshold to reconnect the battery.
Power good comparator, PGVOUT, produces a logic high
referenced to the highest of V
, BAT and V
IN2
OUT
Schottky diode drop. PGVOUT will transition high the first
time the respective converter reaches the programmed
SLEEP threshold, signaling that the output is in regulation.
The pin will remain high until the voltage falls to 92% of
the desired regulated voltage.
An integrated supercapacitor balancer with 150nA of
quiescent current is available to balance a stack of two
supercapacitors. Typically the input, SCAP, will be tied to
to allow for increased energy storage at V
V
OUT
OUT
supercapacitors. The BAL pin is tied to the middle of the
stack and can source or sink 10mA to regulate the BAL
voltage to half that of the SCAP voltage. To disable
pin’s
the balancer and its associated quiescent current, the
SCAP and BAL pins can be tied to ground.
3331 TA01b
less a
with
dc2151af
3
DEMO MANUAL DC2151A
Quick start proceDure
Using short twisted pair leads for any power connections,
with all loads and power supplies off, refer to Figure4 for
the proper measurement and equipment setup.
Follow the procedure below:
1. Before connecting PS1 to the DC2151A, PS1 must have
its current limit set to 300mA and PS2 must have its
current limit set to 100mA. For most power supplies
with a current limit adjustment feature the procedure
to set the current limit is as follows. Turn the voltage
and current adjustment to minimum. Short the output
terminals and turn the voltage adjustment to maximum.
Adjust the current limit to 300mA for PS1 and 100mA
for PS2. Turn the voltage adjustment to minimum and
remove the short between the output terminals. The
power supply is now current-limited to 300mA and
100mA respectively.
2. Initial Jumper, PS and LOAD settings:
JP1 = 0 JP2 = 0 JP3 = 0 JP4 = 0
JP5 = 0 JP6 = 0 JP7 = 0 JP8 = 0
JP9 = 0 JP10 = 0
JP11 = RUN JP12 = OFF
PS1 = OFF PS2 = OFF LOAD1 = OFF
Remove battery from battery holder
6. Decrease PS1 to 0V and disconnect PS1 from V
IN
. Set
the current limit of PS1 to 25mA as described above.
7. Move the connection for PS1 from V
to AC1. Slowly
IN
increase PS1 voltage to 2.0V while monitoring the
input current. If the current remains less than 5mA,
increase PS1 to 19V. Verify voltage on V
the V
mary. Decrease
1.8V range listed in the Performance Sum-
OUT
PS1 to 0V, swap the AC1 connection
is within
OUT
to AC2 and repeat the test. Decrease PS1 to 0V and
move the connection for PS1 from AC2 to V
IN
.
8. Set JP5 to 1, JP6 to 1, and JP7 to 1. Increase PS1 to
19V and set LOAD1 to 50mA. Verify voltage on V
within the V
5.0V range listed in the Performance
OUT
OUT
is
Summary. Verify that the output ripple voltage is between 40mV and 90mV. Set PS1 to 0V.
Set the current limit of PS2 to 60mA as described
9.
above. Set JP1 to 0, JP2, JP3 and JP4 to 1, JP5–JP7
to 1 and JP8–JP10 to 0. Set JP12 to CHARGE. Increase
PS1 to 12V and set LOAD1 to 0mA. Connect PS2 to
the BAT_IN Terminals, then turn on PS2 and slowly
increase voltage to 1.0V while monitoring the input
current. If the current remains less than 15mA, increase
PS2 until V
reads 2.7V. Verify that the current in
M4
AM2 is approximately 660µA. Increase PS2 to 3.5V
and verify that V
is approximately 3.45V.
M4
3. Connect PS1 to the V
Terminals, then turn on PS1
IN
and slowly increase voltage to 2.0V while monitoring
the input current. If the current remains less than 5mA,
increase PS1 to 5.0V.
4. Set LOAD1 to 50mA. Verify voltage on V
1.8V range listed in the Performance Summary.
V
OUT
Verify that the output ripple voltage is between 10mV
and 50mV. Verify that PGV
OUT
LOAD1 to 5mA. Verify that PGV
high. Decrease PS1 to 2.0V. Verify that V
5. Set JP1, JP2, JP3, JP4 to 1. Slowly increase PS1 to
16V and verify that V
and verify that V
OUT
is off. Increase PS1 to 19V
OUT
is within the V
in the Performance Summary. Decrease PS1 to 4.0V.
Verify that V
OUT
is 0V.
4
is within the
OUT
is high. Decrease
and EH_ON are
OUT
is 0V.
OUT
1.8V range listed
OUT
10. Set JP8–JP10 to 1. Increase PS1 to 12V and set LOAD1
to 0mA. Set PS2 to 3.7V. Verify that the current in
AM2 is approximately 330µA. Increase PS2 to 4.3V
and verify that V
is approximately 4.2V.
M4
11. Set JP12 to FAST_CHRG. Set PS2 to 3.7V. Verify that
current in AM2 is approximately 10mA. Set JP12
the
to CHARGE
12. Set the current limit of PS2 to 100mA as described
above. Set PS1 to 14V. Set JP1 to 1, JP2, JP3 and
JP4 to 0, JP5 to 0, JP6 and JP7 to 1. Set JP8 to 0. Set
PS2 to 3.2V. Set LOAD1 to 5mA. Remove PS1 lead
from the V
the V
OUT
Verify that PGV
PS2 to 2.6V and verify that V
turret. Verify voltage on V
IN
3.0V range listed in Performance Summary.
is high and EH_ON is low. Decrease
OUT
is 0V. Increase PS2 to
OUT
3.8V. Press and release PB1. Verify the V
is within
OUT
is 3.0V.
OUT
dc2151af
Quick start proceDure
DEMO MANUAL DC2151A
13. Reconnect PS1 to VIN turret. Set PS1 to 14V. Set JP8
to 1. Set PS2 to 3.8V. Set LOAD1 to 5mA. Remove
PS1 lead from the V
is within the V
OUT
Summary. Verify that PGV
low. Decrease PS2 to 3.1V and verify that V
turret. Verify voltage on V
IN
OUT
3.0V range listed in Performance
is high and EH_ON is
OUT
is 0V.
OUT
Increase PS2 to 4.3V. Press and release PB1. Verify
OUT
is 3.0V.
is approximately 0V.
OUT
the V
14. Set JP11 to SHIP and verify that V
15. Decrease PS2 to 0V and disconnect PS2.
16. Set the current limit of PS1 to 300mA as described
above. Connect PS1 to the V
1, JP6 to 1 and JP7 to 1. Set PS1 to 14V. Set LOAD1
to 50mA. Add a jumper lead from V
that BAL is approximately half of V
17. Quickly remove PS1+ lead from V
remains above 1.2V for approximately 5 seconds.
V
OUT
Terminals. Set JP5 to
IN
to SCAP. Verify
OUT
.
OUT
and verify that
IN
18. Turn off PS1, PS2 and LOAD1. Reinstall battery in
battery holder.
Figure4. Proper Measurement Equipment Setup
dc2151af
5
Loading...