Linear Technology DC2151A, LTC3331EUH Demo Manual

Description

DEMO MANUAL DC2151A

LTC3331EUH

Nanopower Buck-Boost DC/DC with

Energy Harvesting Battery Charger

Demonstration Circuit DC2151A is a nanopower buckboost DC/DC with energy harvesting battery charger

®

featuring the LT C

3331. The LTC3331 integrates a high

voltage energy harvesting power supply plus a DC/DC converter powered by a rechargeable cell battery to create a single output supply for alternative energy applications. The energy harvesting power supply, consisting of an integrated low-loss full-wave bridge with a high voltage buck converter, harvests energy from piezoelectric, solar or magnetic sources. The rechargeable cell input powers a buck-boost converter capable of operating down to 1.8V at its input. Either DC/DC converter can deliver energy to a single output. The buck operates when harvested energy is available, reducing the quiescent current drawn on the battery to essentially zero. The buck-boost takes over when harvested energy goes away.

BoarD photo

A 10mA shunt allows simple battery charging with harvest energy while a low battery disconnect function protects the battery from deep discharge. A supercapacitor balancer is also integrated, allowing for increased output storage.

Voltage and current settings for input and output as well as the battery float voltage are programmable via pinstrapped logic inputs.

The LTC3331 QFN sur

L, L, LTC, LTM, LT, Burst Mode, OPTI-LOOP, Over-The-Top and PolyPhase are registered trademarks of Linear Technology Corporation. Adaptive Power, C-Load, DirectSense, Easy Drive, FilterCAD, Hot Swap, LinearView, µModule, Micropower SwitcherCAD, Multimode Dimming, No Latency Δ∑, No Latency Delta-Sigma, No RSENSE, Operational Filter, PanelProtect, PowerPath, PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT, UltraFast and VLDO are trademarks of Linear Technology Corporation. Other product names may be trademarks of the companies that manufacture the products.

100

EUH is available in a 5mm × 5mm 32-lead

face mount package with exposed pad.

Buck Efficiency vs I

LOAD

Figure1. DC2151A Demoboard

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

1µ 10µ 10m 100m1m100µ

Figure2. Typical Efficiency of DC2151A

V

= 1.8V

OUT

= 2.5V

V

OUT

= 3.3V

V

OUT

= 5V

V

OUT

VIN = 6V, L = 22µH, DCR = 0.19Ω

I

(A)

LOAD

3331 G34

dc2151af

1

DEMO MANUAL DC2151A

performance summary

SYMBOL PARAMETER CONDITIONS MIN MAX UNITS

V

IN

1.8V Output Voltage Range OUT0=0, OUT1=0, OUT2=0 1.728 to 1.872 V

V

OUT

2.5V Output Voltage Range OUT0=1, OUT1=0, OUT2=0 2.425 to 2.575 V

V

OUT

2.8V Output Voltage Range OUT0=0, OUT1=1, OUT2=0 2.716 to 2.884 V

V

OUT

3.0V Output Voltage Range OUT0=1, OUT1=0, OUT2=0 2.910 to 3.090 V

V

OUT

3.3V Output Voltage Range OUT0=0, OUT1=0, OUT2=1 3.200 to 3.400 V

V

OUT

3.6V Output Voltage Range OUT0=1, OUT1=0, OUT2=1 3.492 to 3.708 V

V

OUT

4.5V Output Voltage Range OUT0=0, OUT1=1, OUT2=1 4.365 to 4.635 V

V

OUT

5.0V Output Voltage Range OUT0=1, OUT1=1, OUT2=1 4.850 to 5.150 V

V

OUT

3.45V Float Voltage Range FLOAT1=0, FLOAT=0 3.381 to 3.519 V

V

BAT

4.00V Float Voltage Range FLOAT1=0, FLOAT=1 3.920 to 4.080 V

V

BAT

4.1V Float Voltage Range FLOAT1=1, FLOAT=0 4.018 to 4.182 V

V

BAT

4.2V Float Voltage Range FLOAT1=1, FLOAT=1 4.116 to 4.284 V

V

BAT

Input Voltage Range 3.0 to 18.0 V

Specifications are at TA = 25°C

operating principle

Refer to the block diagram within the LTC3331 data sheet for its operating principle.

a total drop of about 800mV at typical piezo-generated currents, but is capable of carrying up to 50mA.

The LTC3331 combines a buck switching regulator and a buck-boost switching regulator to produce an energy harvesting solution with battery backup. The converters are controlled by a prioritizer that selects which converter to use based on the availability of a battery and/or harvestable energy. If harvested energy is available, the buck regulator is active and the buck-boost is off. With a battery charger and a supercapacitor balancer and an array of different configurations, the LTC3331 suits many applications.

The synchronous buck converter is an ultralow quiescent current power supply tailored to energy harvesting applica

-

tions. It is designed to interface directly to a piezoelectric

alternative A/C energy source, rectify and store the har-

or vested energy

on an external capacitor while maintaining a regulated output voltage. It can also bleed off any excess input power via an internal protective shunt regulator.

An internal full-wave bridge rectifier, accessible via AC1 and AC2 inputs, rectifies AC sources such as those from a piezoelectric element. The rectified output is stored on a capacitor at the V

pin and can be used as an energy

IN

reservoir for the buck converter. The bridge rectifier has

When the voltage on V

rises above the UVLO rising

IN

threshold the buck converter is enabled and charge is transferred from the input capacitor to the output capaci

tor. When the input capacitor voltage is depleted below the UVLO falling threshold the buck converter is disabled.

These thresholds can be set according to Table 4 of the data sheet which offers UVLO rising thresholds from 4V to 18V with large or small hysteresis windows.

Tw o internal rails, CAP and V

, are generated from VIN and

IN2

are used to drive the high side PMOS and low side NMOS of the buck converter, respectively. Additionally the V

IN2

rail serves as logic high for output voltage select bits UV [3:0]. The V the CAP rail is regulated at 4.8V below V

rail is regulated at 4.8V above GND while

IN2

. These are not

IN

intended to be used as external rails. Bypass capacitors should be connected to the CAP and V

pins to serve

IN2

as energy reservoirs for driving the buck switches. When

is below 4.8V, V

V

IN

at GND. V

is an internal rail used by the buck and the

IN3

buck-boost. When the LTC3331 runs the buck, V be a Schottky diode drop below V buck-boost V

is equal to BAT.

IN3

is equal to VIN and CAP is held

IN2

IN3

. When it runs as a

IN2

will

2

dc2151af

operating principle

DEMO MANUAL DC2151A

The buck regulator uses a hysteretic voltage algorithm to control the output through internal feedback from the

sense pin. The buck converter charges an output

V

OUT

capacitor through an inductor to a value slightly higher than the regulation point. It does this by ramping the inductor current up to 250mA through an internal PMOS switch and then ramping it down to 0mA through an internal NMOS switch. When the buck brings the output voltage into regulation, the converter enters a low quies cent current sleep

state that monitors the output voltage

-

with a sleep comparator. During this operating mode, load current is provided by the buck output capacitor. When the output voltage falls below the regulation point, the buck regulator wakes up and the cycle repeats. This hysteretic method of providing a regulated output reduces losses associated with FET switching and maintains an output at light loads. The buck delivers a minimum of 50mA average load current when it is switching. V

OUT

can be set from 1.8V to 5.0V via the output voltage select bits OUT [2:0] according to Table 1 of the data sheet.

The buck-boost uses the same hysteretic algorithm as the buck to control the output, V

, with the same sleep

OUT

comparator. The buck-boost has three modes of operation: buck, buck-boost and boost. An internal mode compara

-

tor determines the mode of operation based on BAT and

. In each mode, the inductor current ramps up to

V

OUT

which is programmable via IPK [2:0]. See Table 3

I

PEAK

of the data sheet.

An integrated battery charger operating from the V

IN2

rail charges the battery through the BB_IN pin. Connecting BB_IN to the BAT_OUT pin, an internal MOSFET Switch will then connect the battery charger to BAT_IN. The battery charger is a shunt regulator which can sink up to 10mA. The battery float voltage is programmable with two bits and a third bit is used to program the battery connect and disconnect voltage levels. This disconnect feature protects the battery from permanent damage by deep discharge. Disconnecting the battery from the BAT_OUT=BB_IN node prevents the load as well as the LTC3331 quiescent current from further discharging the battery.

OUTPUT VOLTAGE

50mV/DIV

AC-COUPLED

EH_ON 4V/DIV

0V

I

BB_IN

200mA/DIV

0A

I

CHARGE

1mA/DIV

ACTIVE ENERGY HARVESTER ENABLES

CHARGING OF THE BATTERY IN SLEEP

BAT = 3.6V

= 1.8V

V

OUT

= 50mA

I

LOAD

Figure3. Charging Battery with Harvested Energy

A SHIP mode is provided which manually disconnects the battery. This may be helpful to prevent the battery from

100µs/DIV

discharging when no harvestable energy is available for long periods of time, such as during shipping. Bring the

SHIP pin high to engage the SHIP mode. To disengage the SHIP mode, bring the SHIP pin low. The BB_IN pin needs to be brought above the low battery connect (LBC) threshold to reconnect the battery.

Power good comparator, PGVOUT, produces a logic high referenced to the highest of V

, BAT and V

IN2

OUT

Schottky diode drop. PGVOUT will transition high the first time the respective converter reaches the programmed SLEEP threshold, signaling that the output is in regulation. The pin will remain high until the voltage falls to 92% of the desired regulated voltage.

An integrated supercapacitor balancer with 150nA of quiescent current is available to balance a stack of two supercapacitors. Typically the input, SCAP, will be tied to

to allow for increased energy storage at V

V

OUT

supercapacitors. The BAL pin is tied to the middle of the stack and can source or sink 10mA to regulate the BAL

voltage to half that of the SCAP voltage. To disable

pin’s the balancer and its associated quiescent current, the SCAP and BAL pins can be tied to ground.

3331 TA01b

less a

with

dc2151af

3

DEMO MANUAL DC2151A

Quick start proceDure

Using short twisted pair leads for any power connections, with all loads and power supplies off, refer to Figure4 for the proper measurement and equipment setup.

Follow the procedure below:

1. Before connecting PS1 to the DC2151A, PS1 must have its current limit set to 300mA and PS2 must have its current limit set to 100mA. For most power supplies with a current limit adjustment feature the procedure to set the current limit is as follows. Turn the voltage and current adjustment to minimum. Short the output terminals and turn the voltage adjustment to maximum. Adjust the current limit to 300mA for PS1 and 100mA for PS2. Turn the voltage adjustment to minimum and remove the short between the output terminals. The power supply is now current-limited to 300mA and 100mA respectively.

2. Initial Jumper, PS and LOAD settings:

JP1 = 0 JP2 = 0 JP3 = 0 JP4 = 0

JP5 = 0 JP6 = 0 JP7 = 0 JP8 = 0

JP9 = 0 JP10 = 0

JP11 = RUN JP12 = OFF

PS1 = OFF PS2 = OFF LOAD1 = OFF

Remove battery from battery holder

6. Decrease PS1 to 0V and disconnect PS1 from V

IN

. Set

the current limit of PS1 to 25mA as described above.

7. Move the connection for PS1 from V

to AC1. Slowly

IN

increase PS1 voltage to 2.0V while monitoring the input current. If the current remains less than 5mA, increase PS1 to 19V. Verify voltage on V the V mary. Decrease

1.8V range listed in the Performance Sum-

OUT

PS1 to 0V, swap the AC1 connection

is within

OUT

to AC2 and repeat the test. Decrease PS1 to 0V and move the connection for PS1 from AC2 to V

IN

.

8. Set JP5 to 1, JP6 to 1, and JP7 to 1. Increase PS1 to 19V and set LOAD1 to 50mA. Verify voltage on V within the V

5.0V range listed in the Performance

OUT

is

Summary. Verify that the output ripple voltage is between 40mV and 90mV. Set PS1 to 0V.

Set the current limit of PS2 to 60mA as described

9. above. Set JP1 to 0, JP2, JP3 and JP4 to 1, JP5–JP7 to 1 and JP8–JP10 to 0. Set JP12 to CHARGE. Increase PS1 to 12V and set LOAD1 to 0mA. Connect PS2 to the BAT_IN Terminals, then turn on PS2 and slowly increase voltage to 1.0V while monitoring the input current. If the current remains less than 15mA, increase PS2 until V

reads 2.7V. Verify that the current in

M4

AM2 is approximately 660µA. Increase PS2 to 3.5V and verify that V

is approximately 3.45V.

M4

3. Connect PS1 to the V

Terminals, then turn on PS1

IN

and slowly increase voltage to 2.0V while monitoring the input current. If the current remains less than 5mA, increase PS1 to 5.0V.

4. Set LOAD1 to 50mA. Verify voltage on V

1.8V range listed in the Performance Summary.

V

OUT

Verify that the output ripple voltage is between 10mV and 50mV. Verify that PGV

OUT

LOAD1 to 5mA. Verify that PGV high. Decrease PS1 to 2.0V. Verify that V

5. Set JP1, JP2, JP3, JP4 to 1. Slowly increase PS1 to 16V and verify that V and verify that V

OUT

is off. Increase PS1 to 19V

OUT

is within the V in the Performance Summary. Decrease PS1 to 4.0V. Verify that V

OUT

is 0V.

4

is within the

OUT

is high. Decrease

and EH_ON are

OUT

is 0V.

OUT

1.8V range listed

OUT

10. Set JP8–JP10 to 1. Increase PS1 to 12V and set LOAD1 to 0mA. Set PS2 to 3.7V. Verify that the current in AM2 is approximately 330µA. Increase PS2 to 4.3V and verify that V

is approximately 4.2V.

M4

11. Set JP12 to FAST_CHRG. Set PS2 to 3.7V. Verify that

current in AM2 is approximately 10mA. Set JP12

the to CHARGE

12. Set the current limit of PS2 to 100mA as described above. Set PS1 to 14V. Set JP1 to 1, JP2, JP3 and JP4 to 0, JP5 to 0, JP6 and JP7 to 1. Set JP8 to 0. Set PS2 to 3.2V. Set LOAD1 to 5mA. Remove PS1 lead from the V the V

OUT

Verify that PGV PS2 to 2.6V and verify that V

turret. Verify voltage on V

IN

3.0V range listed in Performance Summary. is high and EH_ON is low. Decrease

OUT

is 0V. Increase PS2 to

OUT

3.8V. Press and release PB1. Verify the V

is within

OUT

is 3.0V.

OUT

dc2151af

Quick start proceDure

DEMO MANUAL DC2151A

13. Reconnect PS1 to VIN turret. Set PS1 to 14V. Set JP8 to 1. Set PS2 to 3.8V. Set LOAD1 to 5mA. Remove PS1 lead from the V is within the V

OUT

Summary. Verify that PGV low. Decrease PS2 to 3.1V and verify that V

turret. Verify voltage on V

IN

OUT

3.0V range listed in Performance is high and EH_ON is

OUT

is 0V.

OUT

Increase PS2 to 4.3V. Press and release PB1. Verify

OUT

is 3.0V.

is approximately 0V.

OUT

the V

14. Set JP11 to SHIP and verify that V

15. Decrease PS2 to 0V and disconnect PS2.

16. Set the current limit of PS1 to 300mA as described above. Connect PS1 to the V 1, JP6 to 1 and JP7 to 1. Set PS1 to 14V. Set LOAD1 to 50mA. Add a jumper lead from V that BAL is approximately half of V

17. Quickly remove PS1+ lead from V

remains above 1.2V for approximately 5 seconds.

V

OUT

Terminals. Set JP5 to

IN

to SCAP. Verify

OUT

.

OUT

and verify that

IN

18. Turn off PS1, PS2 and LOAD1. Reinstall battery in battery holder.

Figure4. Proper Measurement Equipment Setup

dc2151af

5

DEMO MANUAL DC2151A

connection to a Dust mote (Dc9003a-B)

Attach a Dust® Mote to J1 of the DC2151A, refer to Figure5 for the proper setup. J1 is a keyed connector and is connected to the left side of the P1 connector on the DUST Mote. Figure13 is a schematic of the Dust Mote and the DC2151A interconnections plus three extra connections which 1) connect the SCAP to V the middle of the supercapacitors and 3) connect EH_ON to OUT2. The DC2151A contains NC7SZ58P6X Universal Configurable 2-Input logic gates that are input voltage tolerant and allow level shifting between the LTC3331 and the Dust Mote.

Remove the battery from the BH1 holder on the bottom side of the DC2151A. On the DC2151A, set JP1 to 1, JP2 to 0, JP3 to 1, JP4 to 0, JP5 to1, JP6 to 0, JP7 to 0, JP8, JP9 and JP10 to 0, JP11 to RUN.

, 2) connect BAL to

OUT

Piezoelectric Transducer Evaluation

Mount a series connected MIDE V25W to a vibration source and connect the electrical connections to the AC1 and AC2 turrets. Activate the vibration source to an acceleration of 1g and a frequency of 60Hz. Figure6 shows an open-circuit voltage of 10.6V for the piezoelectric set the VIN_UVLO_RISING and VIN_UVLO_FALLING thresholds, the open-circuit voltage of the piezoelectric device must be measured. The internal bridge network of the LTC3331 will have approximately 800mV drop at an

input current of 300µA.

device that was tuned to 60Hz. In order to

MIDE V25W

6

Figure5. DC2151A with Dust Mote

dc2151af

DEMO MANUAL DC2151A

5ms/DIV

2 • ∆t

2 • 208ms

P

CIN

= 648µW

connection to a Dust mote (Dc9003a-B)

VAC_OC 1G

5.00V/DIV

DC2051A FIG06

Figure6. MIDE V25W Open-Circuit AC Voltage with 1grms, 60Hz

Acceleration Applied

The peak-power-load voltage of a purely resistive source is at one-half of the rectified no-load voltage. In this case, the optimal average input-voltage regulation level would be 4.9V. Using a VIN_UVLO_RISING threshold of 6V and a VIN_UVLO_FALLING threshold of 5V (UV3=0, UV2=0, UV1=1, UV0=0) yields an average input voltage close to the theoretical optimal voltage.

Figure7 is a plot of the output power and load voltage of the V25W piezoelectric transducer into a 42.2kΩ load for various rms acceleration levels. The output power

DC2051A G01

6.000

5.000 LOAD VOLTAGE (V

4.000

3.000

RMS

2.000 )

1.000

0.000

700

600

500

LOAD VOLTAGE (V

400

300

POWER (µW)

200

100

0

0.250

0.375 0.500

)

RMS

POWER (µW)

0.750 1.000

0.625 0.875

FORCE (g)

Figure7. MIDE V25W Output Power into a 42.2kΩ Load with

1grms, 60Hz Acceleration Applied the MIDE V25W Piezoelectric

Transducer, [√2 • sin(2� • 60Hz • t)]

compares well with the input power that is charging C

IN

during the sleep cycle between VIN_UVLO_FALLING and VIN_UVLO_RISING thresholds at an acceleration force of

, shown in Figure8 below.

1g

rms

EH_ON

5.00V/DIV

V

OUT

1.00V/DIV

V

IN

2.00V/DIV

50.0ms/DIV

DC2051A F08

Figure8. MIDE V25W Charging the 18µF input capacitance from

4.48V to 5.92V in 208ms

In Figure8, the input capacitor is being recharged from the V25W piezoelectric transducer. The input capacitor is charging from 4.48V to 5.92V in 208 milliseconds. The power delivered from the V25W is 648µW.

P

CIN

2

•(V

C

IN

=

IN1

− V

IN2

2

)

2

P

CIN

=

18µF • (5.92

− 4.482)

Assuming that the circuit is configured as shown in Figure9, it will take a significant amount of time for the piezo transducer to charge the 0.09F supercapacitor on the output of the LTC3331. As used above, the 22µF input capacitor is only 18µF at an applied voltage of 5V, so every VIN_UVLO_RISING and FALLING event produces 26 micro-coulombs [(5.92V – 4.48V) • 18µF)] that may be transferred from the input capacitor to the output capacitor,

dc2151af

7

DEMO MANUAL DC2151A

connection to a Dust mote (Dc9003a-B)

PIEZO

MIDE V25W

AC2

V

IN

CAP

V

IN2

UV3

UV2

UV1 UV0

BAT_IN

2µF

6.3V

CHARGE

BAT_OUT BB_IN

FLOAT1 FLOAT0 LBSEL SHIP GND

LTC3331

22µF 25V

4.7µF

6.3V

1µF

6.3V

22µF

6.3V

Figure9. LTC3331 Circuit Charging Supercapacitor at No Load without a battery (Vout=3.6V)

minus the losses of the buck regulator in the LTC3331. The buck regulator efficiency is approximately 90% at V equal to 5V and V

between 2.5V and 3.6V. Thus, for

OUT

IN

every UVLO event, 23.3 micro-coulombs are added to the output supercapacitor. Given a 0.09F output supercapacitor charging to 3.6V, 324 milli-coulombs are required to fully charge the supercapacitor. Assuming no additional load on

–6

the output, it takes 13,906 (.324/23.3e

) UVLO events to

charge the output supercapacitor to 3.6V. From Figure8, it

AC1

SCAP

PGVOUT

EH_ON

OUT2 OUT1 OUT0

SWA

SWB

SW

V

OUT

BAL

V

IPK2

IPK1

IPK0

IN3

100µH

22µH

DC2051A F09

0.1µF

6.3V

180mF

2.7V

180mF

2.7V HZ202F

2.5V

100µF

6.3V

can be observed that each VIN_UVLO event takes 208ms, so the total time to charge the output capacitor from 0V to

3.6V will be greater than 2900 seconds. Figure10 shows the no-load charging of the output supercapacitor, which takes approximately 3300 seconds. The above calculation neglects the lower efficiency at low output voltages and the time it takes to transfer the energy from the input capacitor to the output supercapacitor, so predicting the actual value within –12% is to be expected.

EH_ON

5.00V/DIV

V

OUT

2.00V/DIV

V

IN

2.00V/DIV

Figure10. Scope Shots of LTC3331 Charging Supercapacitor at

8

500s/DIV

No Load without a Battery (V

= 3.6V)

out

DC2051A F10

dc2151af

DEMO MANUAL DC2151A

connection to a Dust mote (Dc9003a-B)

PIEZO

MIDE V25W

AC1

22µF 25V

4.7µF

6.3V

Li-ION BATTERY

22µF

6.3V

1µF

6.3V

2µF

6.3V

AC2

V

IN

CAP

V

IN2

UV3

UV2

UV1 UV0

BAT_IN

CHARGE

BAT_OUT BB_IN

FLOAT1 FLOAT0 LBSEL SHIP GND

LTC3331

Figure11. LTC3331 Circuit with a Supercapacitor, a Battery installed and a pulsed load applied (Vout=3.6V)

Figure11 shows the LTC3331 with a supercapacitor on the output, a battery installed and the output voltage set to 3.6V. The scope shots in Figure12 were taken after applying a pulsed load of 15mA for 10ms. With the battery attached and a pulsed load applied, the EH_ON signal will switch back and forth from high to low every time the V

voltage transitions from the VIN_UVLO_RISING

IN

to the VIN_UVLO_FALLING threshold. When the pulsed load is applied, the output capacitor is depleted slightly

100µH

SWA

SWB

V

SCAP

PGVOUT

EH_ON

IPK2

IPK1

IPK0

OUT2 OUT1 OUT0

SW

OUT

BAL

V

IN3

22µH

DC2051A F

0.1µF

6.3V

180mF

2.7V

180mF

2.7V HZ202F

2.5V

100µF

6.3V

PULSE 15mA 10ms

and the input capacitor must recharge the output cap.

Because the input capacitance is much less then the output capacitance, the input capacitor will go through many UVLO transitions to charge the output capacitor back up to the sleep threshold. Once the output is charged to the

output sleep threshold, the EH_ON signal will again be

consistently high indicating that the energy harvesting source is powering the output.

50.0mV/DIV

LOAD CURRENT

20.0mA/DIV

Figure12. Charging a Supercapacitor with a battery installed

EH_ON

5.00V/DIV V

2.00V/DIV

V

OUT

IN

1.00s/DIV

and a pulsed load (Vout=3.6V)

DC2051A F12

dc2151af

9

DEMO MANUAL DC2151A

connection to a Dust mote (Dc9003a-B)

Figure13 shows the LTC3331 with an output supercapacitor, a Dust Mote attached, a battery installed and EH_ON connected to OUT2. In this configuration, when EH_ON is low, V

will be set to 3.6V.

V

OUT

will be set to 2.5V and when EH_ON is high,

OUT

The first marker in Figure14 is where the vibration source was activated; V threshold. EH_ON will then go high causing V towards 3.6V (V

then rises above the VIN_UVLO_RISING

IN

to rise

OUT

started at 2.5V because the battery

OUT

had charged it up initially). At the same time EH_ON goes high, PGVOUT will go low, since the new V of 3.6V has not been reached. As the charge on V being transferred to V

reaches its UVLO_FALLING threshold, EH_ON will go

V

IN

22µF 25V

4.7µF

6.3V

UVLO RISING = 12V* UVLO FALLING = 11V IPEAK_BB = 100mA

3.45V

+

LiFePO

4

, VIN is discharging and when

OUT

MIDE V25W

AC2

V

1µF

6.3V

130k

IN

CAP

V

IN2

UV3

UV2

UV1

UV0

BAT_IN

1µF

6.3V

CHARGE

BAT_OUT

BB_IN

22µF

FLOAT1 FLOAT0 LBSEL SHIP GND

6.3V

LTC3331

OUT

AC1

SCAP

PGVOUT

EH_ON

OUT2

OUT1

OUT0

level

is

IN

SWA

SWB

SW

V

OUT

BAL

V

IN3

IPK2

IPK1

IPK0

PGV

OUT

5.00V/DIV

EH_ON

5.00V/DIV

V

OUT

1.00V/DIV

V

IN

2.00V/DIV

200s/DIV

Figure14. MIDE 25W Charging Output Supercapacitor from 2.5V

to 3.6 V with DUST Mote Attached

22µH

V

= 3.6V FOR EH_ON = 1

OUT

= 2.5V FOR EH_ON = 0

V

22µH

NC7SZ58P6

×2

0.1µF

6.3V

DC2051A F13

OUT

1F

2.7V

1F

2.7V

DUST MOTE FOR WIRELESS MESH NETWORKS

*FOR PEAK POWER TRANSFER, CENTER THE UVLO WINDOW AT HALF THE RECTIFIED OPEN CIRCUIT VOLTAGE OF THE PIEZO

22µF

6.3V

V

PGOOD

EHORBAT

LINEAR TECHNOLOGY DC9003A-AB

SUPPLY

GND

T

X

DC2051A F14

Figure13. Dust Mote Setup with a Supercapacitor, a battery and EH_ON connected to OUT2

10

dc2151af

DEMO MANUAL DC2151A

connection to a Dust mote (Dc9003a-B)

low, causing the targeted V

to again be 2.5V. Given

OUT

that the output capacitor is very large and the average load is less than the input power supplied by the MIDE piezoelectric transducer, the output voltage will increase to the higher setpoint of 3.6V over many cycles. During the transition from the BAT setpoint of 2.5V to the energy harvester setpoint of 3.6V, V

is above the 2.5V PGVOUT

OUT

threshold, hence, PGVOUT will go high every time EH_ON goes low. This cycle will be repeated until V the PGVOUT threshold for the V

setting of 3.6V. When

OUT

reaches

OUT

a pulse load is applied that is greater than the energy supplied by the input capacitor, V

will drop below the

IN

VIN_UVLO_FALLING threshold, EH_ON will go low and the buck-boost regulator will be ready to support the load requirement from the battery, but will not start to switch until the supercapacitor is discharged to 2.5V. In this way, the circuit can store a lot of harvested energy and use it for an extended period of time before switching over to the battery energy. The supercapacitor could be sized to accommodate known repeated periods of time that the energy harvester source will not be available, such as overnight when a vibrating machine is turned off or, in the case of a solar application, when the lights are turned off or the sun goes down.

While the EH_ON signal is low, the buck-boost circuit will consume 750nA from the battery in the sleeping state. The effects of a pulsed load are shown in Figure 14 at approximately 1850 seconds, where V

is discharged and

IN

the EH_ON signal pulses low to high for a brief period of time, which occurred as a result of the Dust Mote radio making a data transmission.

PGV

OUT

5.00V/DIV EH_ON

5.00V/DIV

V

OUT

1.00V/DIV

V

IN

2.00V/DIV

200s/DIV

Figure15. Output Supercapacitor Discharging when the vibration

source is switched off

Figure 15 shows the discharging of V vibration source is removed and V

OUT

drops below the

IN

DC2051A F15

when the

UVLO_FALLING threshold, causing EH_ON to go low. The supercapacitor on V

will discharge down to the

OUT

new target voltage of 2.5V, at which point the buck-boost regulator will turn on, supplying power to the Dust Mote. The discharging of the supercapacitor on V

provides

OUT

an energy source for short term loss of the vibration source and extends the life of the battery.

Figure16 is the same Dust mote configuration as Figure 13 but without the output supercapacitor. Figure17 shows the charging of the output without the supercapacitor attached.

dc2151af

11

DEMO MANUAL DC2151A

connection to a Dust mote (Dc9003a-B)

MIDE V25W

22µF 25V

4.7µF

6.3V

UVLO RISING = 12V* UVLO FALLING = 11V IPEAK_BB = 100mA

3.45V

+

LiFePO

4

AC2

V

IN

1µF

6.3V

CAP

V

IN2

UV3

UV2

UV1

UV0

BAT_IN

1µF

6.3V

CHARGE

130k

BAT_OUT

BB_IN

22µF

FLOAT1 FLOAT0 LBSEL SHIP GND

6.3V

LTC3331

Figure16. Dust Mote Setup without a Supercapacitor and with

AC1

SWA

SWB

V

SCAP

PGVOUT

EH_ON

IPK2

IPK1

IPK0

OUT2

OUT1

OUT0

SW

OUT

BAL

V

IN3

22µH

NC7SZ58P6

×2

0.1µF

6.3V

DC2051A F16

EH_ON Connected to OUT2

V

= 3.6V FOR EH_ON = 1

OUT

= 2.5V FOR EH_ON = 0

V

OUT

100µF

6.3V

V

PGOOD

EHORBAT

LINEAR TECHNOLOGY DC9003A-AB

DUST MOTE FOR WIRELESS MESH NETWORKS

*FOR PEAK POWER TRANSFER, CENTER THE UVLO WINDOW AT HALF THE RECTIFIED OPEN CIRCUIT VOLTAGE OF THE PIEZO

SUPPLY

GND

T

X

PGV

OUT

5.00V/DIV

EH_ON

5.00V/DIV

V

OUT

1.00V/DIV

V

IN

2.00V/DIV

Figure17. Output Voltage Charging with Dust Mote Attached

12

100ms/DIV

without Supercapacitor

DC2051A F17

dc2151af

DEMO MANUAL DC2151A

parts list

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

Required Circuit Components

1 1 BAT1 CR2032 COIN LI-ION BATTERY POWERSTREAM, Lir2032

2 1 BTH1 BATTERY HOLDER COIN CELL 2032 SMD MPD INC, BU2032SM-HD-G

3 1 C1 SUPERCAP, 90mF, 5.5V, 20mm x 15mm CAP-XX, HZ202F-1

4 1 C2 CAP, CHIP, X5R, 150µF, 20%, 6.3V, 1210 SAMSUNG, CL32A157MQVNNNE

5 1 C3 CAP, CHIP, X5R, 1µF, 10%, 6.3V, 0402 SAMSUNG, CL05A105KQ5NNNC

6 1 C4 CAP, CHIP, X5R, 22µF, 10%, 25V, 1210 SAMSUNG, CL32A226KAJNNNE

7 1 C5 CAP, CHIP, X5R, 4.7µF, 10%, 6.3V, 0603 SAMSUNG, CL10A475KQ8NNNC

8 1 C6 CAP, CHIP, X5R, 0.1µF, 10%, 10V, 0402 TDK, C1005X5R1A104K

9 1 C7 CAP, CHIP, X5R, 22µF, 20%, 6.3V, 1206 SAMSUNG, CL31A226MQHNNNE

10 1 L1 INDUCTOR, 22µH, 0.800A, 0.36Ω, 3.9mm x 3.9mm COILCRAFT, LPS4018-223MLB

11 1 L2 INDUCTOR, 22µH, 0.75A, 0.19Ω, 4.8mm x 4.8mm COILCRAFT, LPS5030-223MLB

12 3 R2, R4, R6 RES, CHIP, 0Ω, 0603 VISHAY, CRCW06030000Z0EA

13 1 R10 RES, CHIP, 3.01K, 1/16W, 1%, 0402 VISHAY, CRCW04023K01FKED

14 1 U1 NANOPOWER BUCK-BOOST DC/DC WITH EH BATTERY CHARGER LINEAR TECHNOLOGY, LTC3331EUH#TRPBF

Additional Demo Board Circuit Components

1 0 C8, C9 CAP, CHIP, X5R, 0.1µF, 10%, 10V, 0402 (OPT) TDK, C1005X5R1A104K

2 0 C10 SUPERCAP/ULTRACAPACITOR, 330mF, 5.5V, 60mΩ DOUBLE CELL MURATA, DMF3R5R5L

3 1 D1 DIODE, SCHOT

4 0 BTH2 SMT, CR2477 BATTERY HOLDER RENATA, SMTU2477-1

5 1 R1 RES, CHIP, 100Ω, 1/16W, 1%, 0402 VISHAY, CRCW0402100RFKED

6 0 R3, R5, R7 RES, CHIP, 0Ω, 0603 (DNP) VISHAY, CRCW06030000Z0EA

7 0 R8, R9 RES, CHIP, 7.5K, 1/16W, 1%, 0402 VISHAY, CRCW04027K50FKED

8 1 R11 RES, CHIP, 56.2Ω, 1/16W, 1%, 0402 VISHAY, CRCW040256R2FKED

9 2 R12, R14 RES, CHIP, 1.00M, 1/16W, 1%, 0402 VISHAY, CRCW04021M00FKED

10 1 R13 RES, CHIP, 100K, 1/16W, 1%, 0402 VISHAY, CRCW0402100KFKED

11 1 Q1 SMT, DUAL MOSFET, NCHANNET/PCHANNET, 60V, SuperSOT-6 FAIRCHILD, NDC7001C

12 1 Q2 SMT, BIPOLAR, PNP, 60V, SOT-23 CENTRAL, CMPT3906E

13 2 U2, U3 IC, UHS UNIV. CONFIG. TWO-INPUT GATES, SC70-6 FAIRCHILD, NC7SZ58P6X

TKY, 30V, 0.1A, SOD-523 CENTRAL, CMOSH-3

334M3DTA0

1 13 E1-E6, E10-E17 TURRET, 0.09 DIA MILL-MAX, 2501-2-00-80-00-00-07-0

2 3 E7-E9 TURRET, 0.061 DIA MILL MAX, 2308-2-00-80-00-00-07-0

3 1 J1 HEADER, 12 PIN, DUST HEADER 2X6 SAMTEC, SMH-106-02-L-D-05

4 10 JP1-JP10 HEADER, 3 PIN 0.079 SINGLE ROW WURTH, 62000311121

5 2 JP11, JP12 HEADER, 4 PIN 0.079 SINGLE ROW WURTH, 62000411121

6 12 JP1-JP12 SHUNT, 2mm WURTH, 60800213421

dc2151af

13

DEMO MANUAL DC2151A

5

4

3

2

1

12

schematic Diagram

2

1.8V

2.5V

2.8V

3.0V

3.3V

3.6V

4.5V

2 - 21 - 14

JDPRODUCTION FAB-

REVISION HISTORY

DESCRIPTION DATEAPPROVEDECO REV

REVISION HISTORY

DESCRIPTION DATEAPPROVEDECO REV

REVISION HISTORY

DESCRIPTION DATEAPPROVEDECO REV

2

2.04V

2.70V

2.37V

3.05V

CONNECT DISCONNECT

3.45V

4.0V

2.70V

2.51V

3.20V

3.05V

2.86V

3.55V

4.1V

4.2V

4.0V

3.45V

0

1

11

00

0

3.20V

3.55V

OUTPUT VOLTAGE SELECTION

4.1V

4.2V

0

1

1111

FLOAT1LBSEL FLOAT0 FLOAT

000

001

0

1

FLOAT SELECTION AND BATTERY DISCONNECT THRESHOLDS

VIN3BB_INVIN3

R60R6

0

R40R4

0

R20R2

0

FLOAT0

1

FLOAT101

LBSEL

1

R7R7

R5R5

DNP DNP

R3R3

DNP

JP10

0

JP9

JP8

0

11

VIN2

JP4

UV0

0

1

0

1

UV1

JP3

0

1

0

1

UV2

JP2

0

1

0

1

JP1

UV3

0

1

0

1

17

IPK1

18

19

24

23

22

30

31

32

UV34UV25UV16UV0

IPK0

IPK2

FLOAT0

FLOAT1

LBSEL

OUT0

OUT1

OUT2

AC18AC29VIN10CAP

11

JP7

OUT0

0

1

0

OUT1

OUT2

1

JP6

0

1

0

1

JP5

0

1

0

1

GND

E1

E10

D D

E2

AC1E1AC1

CAUTION: 50mA MAX

AC2E2AC2

VIN2

6.3V

1uF

C3

VIN

C4

22uF

C4

22uF

E3

VINE3VIN

3V - 19V

OUT1OUT2 OUT0 VOUT

0 00

UVLO SELECTION

VOUT

E17

L1

7

15

VIN2

VIN3

3

26

0.1uF

C6

6.3V

4.7uF

C5

0603

1210

25V

1210

25V

E4

0

01111

0

3V4V5V6V7V5V9V

UVLO

FALLING

UVLO

RISING

UV1UV2 UV0

000

UV3

50mA

GND

1.8V - 5.0V

E16

C2

6.3V

1210

150uF

L2

22uHL122uH

12

SW

SWB14SWA

16

VIN3

10V

BB_IN

GNDE4GND

C C

5.0V

0

11

00

0

ILM SELECTION

1

11

INSTALL

1 11

4V5V6V7V8V8V10V

00

1

000

001

SCAP

E14

20%

VOUT

22uHL222uH

R8

2

13

SCAP

VOUT

11

00

0

1

1111111

000

0

OPT

C10

5.5V

330mF

13

+

BAL

2

C1

90mF

5.5V

+

2

BAL

3

OPT

10V

C9

0.1uF

7.5kR87.5k

OPT

0

21mm x 14mm

-

20mm x 15mm

R9

BAL

PGVOUT EH_ON

SHIP GND

BAT_IN

BB_IN

BAT_OUT

CHARGE

20

27

C7

20%

22uF

6.3V

22uF

6.3V

1206

R10

3.01k

BB_IN

CHARGE

2.0V - 4.2V

125mA

* 10mA,

(IF VBB_IN > VFLOAT)

CHARGE

E5

BB_INE5BB_IN

IPK0 ILIM

IPK1

IPK2

5V

10V

0

DMF3R5R5L334M3DTA0

HZ202F

1

OPT

C8

7.5kR97.5k

1

28 29

25 33

21

U1

OFF

CHARGE

5mA

10mA

15mA

R6

R7

R4

R5

R3

11V5V13V

12V

14V

00

1

000

001

111

1

BAL

PGVOUTE9PGVOUT

E13

E9

0.1uF 10VC80.1uF 10V

OPT

PGVOUT

R1

START

LTC3331EUH

0

PB1

BB_IN

CHARGE

FAST_CHRG

JP12

E8

FAST CHARGE

CHARGEE8CHARGE

25mA

50mA

150mA

250mA

100mA

R6

R7

R6

16V

R2

15V

R4

R5

R4

R2

5V

17V

16V

18V

R4

R3

5V

14V

0

11

00

0

1

1111111

111

1

GND

EH_ONE7EH_ON

GND

E7

E12

E11

SHIP

EXT

SHIP

EXT

SHIP

EH_ON

100R1100

BTH2

SMTU2477N-LF

BTH2

SMTU2477N-LF

OPT

WURTH- 434 111 025 826

12

+

I

12

I

+

BTH1

BAT_IN

B B

SMTU2032-LF

2.0V - 4.2V

E6

E15

RUN

GNDE6GND

www.linear.com

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

JP11

*

PLACE JP11 IN SHIP POSITION WHEN BOARD IS NOT IN USE.

*

NANOPOWER BUCK - BOOST DC / DC

TECHNOLOGY

SCHEMATIC

TITLE:

JD

NC

APPROVALS

PCB DES.

APP ENG.

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

NOTES: UNLESS OTHERWISE SPECIFIED

A A

SHEET OF

1

DEMO CIRCUIT 2151A

LTC3331EUH

DEMO CIRCUIT 2151A

LTC3331EUH

DEMO CIRCUIT 2151A

LTC3331EUH

WITH ENERGY HARVESTING BATTERY CHARGER

2 - 21 - 14

IC NO. REV.

N/A

SIZE

DATE:

SIZE

DATE:

SIZE

DATE:

2

SCALE = NONE

3

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

Figure18. DC2151A Demo Circuit Schematic, Page 1

4

3. INSTALL SHUNTS ON JUMPERS AS SHOWN.

2. ALL CAPACITORS ARE IN MICROFARADS, 0402, 10%, 10V.

1. ALL RESISTORS ARE IN OHMS, 0402, 1%, 1/16W.

5

14

dc2151af

DEMO MANUAL DC2151A

5

4

3

2

1

22

schematic Diagram

2

www.linear.com

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

FAST_CHRG

R14

1.00Meg

R14

1.00Meg

1

Q2

CMPT3906E

*

R11

VIN

3 2

1

R12

1.00Meg

3

56.2

2

Q1B

NDC7001C

6

Q1A

4

21

D1

5

NDC7001C

CMOSH-3D1CMOSH-3

R13

100k

R13

100k

5mA113

10mA

7.5mA

75.0

56.2

R11 I_CHRG

BATTERY CHARGE

CURRENT *

BB_IN

LTC Confidential-For Customer Use Only

NANOPOWER BUCK - BOOST DC / DC

TECHNOLOGY

SCHEMATIC

TITLE:

JD

NC

APPROVALS

PCB DES.

APP ENG.

SHEET OF

1

DEMO CIRCUIT 2151A

LTC3331EUH

DEMO CIRCUIT 2151A

LTC3331EUH

DEMO CIRCUIT 2151A

LTC3331EUH

WITH ENERGY HARVESTING BATTERY CHARGER

2 - 21 - 14

IC NO. REV.

N/A

SIZE

DATE:

SIZE

DATE:

SIZE

DATE:

2

SCALE = NONE

CUSTOMER NOTICE

VOUT

1

3

KEY

GND

RSVD

I/O 2

11

+5V

9

5

7

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

3

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

VSUPPLY

SMH-106-02-L-D-05

DUST HEADER 2X6

10

I2

I/O 1

GND

V+

12

2

DUST HEADER 2X6

OVERVOLTAGE TOLERANT BUFFERS

TRANSLATE THE HIGH PULL-UP

VOLTAGES FROM THE LTC3330 TO THE

VOUT VOLTAGE DRIVING THE

PROCESSOR I/O BUS, WHICH IS VOUT.

.

12

LL

HHLL

L

.

L

02

Y= ( I ) ( I ) + ( I ) ( I )

210

III Y

U2, U3, U4 FUNCTION TABLE

Figure19. DC2151A Demo Circuit Schematic, Page 2

4

5

NC

PGOOD

VBAT

4

6

NC7SZ58P6X

VOUT VOUT

5

VCC

I0

3

EH_ON

EHORBAT

8

4

Y

I1

1

6

J1

NC7SZ58P6X

5

3

PGVOUT

4

VCC

I0

1

PGVOUT

Y

I1

U2

VOUT

2

U3

GND

2

I2

6

D D

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

C C

B B

A A

dc2151af

15

DEMO MANUAL DC2151A

DEMONSTRATION BOARD IMPORTANT NOTICE

Linear Technology Corporation (LT C ) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT

OR EVALUATION PURPOSES ONLY and is not provided by LT C for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.

If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.).

No License is granted under any patent right or other intellectual property whatsoever. LT C assumes no liability for applications assistance,

customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LT C currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and

observe good laboratory practice standards. Common sense is encouraged.

This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer.

Mailing Address:

Linear Technology

1630 McCarthy Blvd.

Milpitas, CA 95035

Linear Technology Corporation

16

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

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LT 0614 • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 2014