Linear Technology Analog Devices LT8607B, Analog Devices LT8607 Datasheet

Page 1
42V, 750mA Synchronous
0.1µF
4.7µF
F
22µF X7R 1206
10pF
4.7µH
18.2k
1M
187k
100k
10nF
V
IN
EN/UV
SYNC
LT8607
INTV
CC
TR/SS
RT
GND
FB
PG
SW
BST
VIN5.7V to 42V
V
OUT
5V
750mA
POWER
GOOD
fSW = 2MHz
8607 TA01a
fSW = 2MHz
L = 4.7µH
I
OUT
(mA)0125
250
375
500
625
7505055
6065707580859095100
8607 TA01b
Step-Down Regulator with

FEATURES DESCRIPTION

LT8607/LT8607B
Wide Input Voltage Range: 3.0V to 42V
®
Ultralow Quiescent Current Burst Mode
n
<3µA IQ Regulating 12VIN to 3.3V
n
Output Ripple <10mV
P-P
Operation:
OUT
High Efficiency 2MHz Synchronous Operation:
n
>93% Efficiency at 0.5A, 12VIN to 5V
OUT
750mA Maximum Continuous Output Fast Minimum Switch-On Time: 35ns Adjustable and Synchronizable: 200kHz to 2.2MHz Spread Spectrum Frequency Modulation for Low EMI
Allows Use of Small Inductors Low Dropout Peak Current Mode Operation Accurate 1V Enable Pin Threshold Internal Compensation Output Soft-Start and Tracking Small Thermally Enhanced 10-Lead MSOP Package or
8-Lead 2mm × 2mm DFN Package

APPLICATIONS

General Purpose Step-Down Converter Low EMI Step
Down
The LT®8607 is a compact, high efficiency, high speed syn- chronous monolithic step-down switching regulator that consumes only 1.7µA of non-switching quiescent current. The LT8607 can deliver 750mA of continuous current. Low ripple Burst Mode operation enables high efficiency down to very low output currents while keeping the output ripple below 10mV
. Internal compensation with peak
P-P
current mode topology allows the use of small inductors and results in fast transient response and good loop sta­bility. The EN/UV pin has an accurate 1V threshold and can be used to program VIN undervoltage lockout or to shut down the LT8607 reducing the input supply current to 1µA. The PG pin signals when V
is within ±8.5% of
OUT
the programmed output voltage as well as fault conditions.
The MSOP package includes a SYNC pin to synchronize to an external clock, or to select Burst Mode operation or pulse-skipping with or without spread spectrum; the TR/SS pin programs soft-start or tracking. The DFN pack­age omits these pins and can be purchased in pulse-skip­ping or Burst Mode operation.
PACKAGE SYNC FUNCTIONALITY
LT8607MSE MSE Programmable LT8607DFN DFN Burst Mode Operation LT8607BDFN DFN Pulse-Skipping Mode
All registered trademarks and trademarks are the property of their respective owners.

TYPICAL APPLICATION

5V, 2MHz Step-Down
12VIN to 5V
For more information www.analog.comDocument Feedback
Efficiency
OUT
Rev. C
1
Page 2
LT8607/LT8607B
TOP VIEW
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB

ABSOLUTE MAXIMUM RATINGS

(Note 1)
VIN, EN/UV, PG ..........................................................42V
FB, TR/SS . SYNC Voltage .
.................................................................4V
............................................................6V
PIN CONFIGURATION
Operating Junction Temperature Range (Note 2)
LT8607E ............................................ –40°C to 125°C
LT8607I ............................................. –40°C to 125°C
LT8607H ............................................ –40°C to 150°C
Storage Temperature Range
.................. –65°C to 150°C
TOP VIEW
10
1
BST
2
SW
INTV
CC
RT
SYNC
10-LEAD PLASTIC MSOP
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
3 4 5
MSE PACKAGE
θ
JA
11
GND
= 40°C/W
EN/UV
9
V
IN
PG
8
TR/SS
7
FB
6
1
BST
2
SW
3
INTV
CC
RT
4
8-LEAD (2mm × 2mm) PLASTIC DFN
DC PACKAGE
= 102°C/W
θ
JA
9
GND
8
7
6
5
EN/UV
V
IN
PG
FB

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT8607EMSE#PBF LT8607EMSE#TRPBF LTGXJ 10-Lead Plastic MSOP –40°C to 125°C
LT8607IMSE#PBF LT8607IMSE#TRPBF LTGXJ 10-Lead Plastic MSOP –40°C to 125°C
LT8607HMSE#PBF LT8607HMSE#TRPBF LTGXJ 10-Lead Plastic MSOP –40°C to 150°C
LT8607EDC#PBF LT8607EDC#TRPBF LGXK 8-Lead Plastic (2mm × 2mm) Plastic DFN –40°C to 125°C
LT8607IDC#PBF LT8607IDC#TRPBF LGXK 8-Lead Plastic (2mm × 2mm) Plastic DFN –40°C to 125°C
LT8607HDC#PBF LT8607HDC#TRPBF LGXK 8-Lead Plastic (2mm × 2mm) Plastic DFN –40°C to 150°C
LT8607BEDC#PBF LT8607BEDC#TRPBF LGXM 8-Lead Plastic (2mm × 2mm) DFN –40°C to 125°C
LT8607BIDC#PBF LT8607BIDC#TRPBF LGXM 8-Lead Plastic (2mm × 2mm) DFN –40°C to 125°C
LT8607BHDC#PBF LT8607BHDC#TRPBF LGXM 8-Lead Plastic (2mm × 2mm) DFN –40°C to 150°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.

ELECTRICAL CHARACTERISTICS

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage
Quiescent Current V
V
IN
Current in Regulation V
V
IN
2
= 0V
EN/UV
V
= 2V, Not Switching, V
EN/UV
= 6V, V
IN
V
IN
= 6V, V
OUT OUT
= 0V or LT8607 DFN, VIN ≤ 36V
SYNC
= 2.7V, Output Load = 100µA = 2.7V, Output Load = 1mA
For more information www.analog.com
l
l
l l
2.5 3.0
3.2
1
1.7
56
500
12
90
700
V
5
µA µA
µA µA
Rev. C
Page 3
LT8607/LT8607B
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Feedback Reference Voltage MSOP Package
VIN = 6V, I V
IN
= 6V, I
LOAD LOAD
DFN Package V
= 6V, I
Feedback Voltage Line Regulation V
Feedback Pin Input Current V
Minimum On-Time I
Minimum Off Time I
IN
V
IN
IN
FB
LOAD
I
LOAD
LOAD
LOAD
= 6V, I
LOAD
= 4.0V to 40V
= 1V ±20 nA
= 750mA, SYNC = 0V or LT8607 DFN
= 750mA, SYNC = 1.9V or LT8607B DFN
= 300mA
Oscillator Frequency MSOP Package
= 221k, I
R
T
R
= 60.4k, I
T
R
= 18.2k, I
T
LOAD
LOAD LOAD
DFN Package R
= 221k, I
Top Power NMOS On-Resistance I
T
R
= 60.4k, I
T
R
= 18.2k, I
T
LOAD
LOAD
LOAD LOAD
= 500mA 375
Top Power NMOS Current Limit MSOP Package
DFN Package
= 100mA = 100mA
= 100mA = 100mA
= 350mA
= 350mA = 350mA
= 350mA
= 350mA = 350mA
0.774
l
0.762
0.771
l
0.753
l
l l
l
l
155
l
640
l
1.90
l
140
l
610
l
1.85
l
1.2 1.6 2.0 A
l
1.2 1.7 2.2 A
Bottom Power NMOS On-Resistance 240
SW Leakage Current V
EN/UV Pin Threshold EN/UV Rising
= 36V 5 µA
IN
l
0.99 1.05 1.11 V
EN/UV Pin Hysteresis 50 mV
EN/UV Pin Current V
PG Upper Threshold Offset from V
PG Lower Threshold Offset from V
FB
FB
= 2V ±20 nA
EN/UV
VFB Rising
VFB Falling
l
5.0 8.5 13.0 %
l
5.0 8.5 13.0 %
PG Hysteresis 0.5 %
PG Leakage V
PG Pull-Down Resistance V
Sync Low Input Voltage MSOP Only
Sync High Input Voltage INTV
TR/SS Source Current MSOP Only
= 42V ±200 nA
PG
= 0.1V 550 1200 Ω
PG
l
0.4 0.9 V
= 3.5V, MSOP Only
CC
l
l
1 2 3 µA
TR/SS Pull-Down Resistance Fault Condition, TR/SS = 0.1V, MSOP Only 300 900 Ω
Spread Spectrum Modulation Frequency V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: The LT8607E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. The
= 3.3V, MSOP Only 0.5 3 6 kHz
SYNC
temperature range. The LT8607H is guaranteed over the full –40°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C.
Note 3: This IC includes overtemperature protection that is intended to protect the device during overload conditions. Junction temperature will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature will reduce lifetime.
LT8607I is guaranteed over the full –40°C to 125°C operating junction
0.778
0.778
0.778
0.778
0.782
0.798
0.785
0.803
±0.02 ±0.06 %/V
35 35
65 60
ns ns
93 130 ns
200 700
2.00
200 700
2.00
245 760
2.10
260 790
2.15
kHz kHz
MHz
kHz kHz
MHz
2.7 3.2 V
Rev. C
V V
V V
For more information www.analog.com
3
Page 4
LT8607/LT8607B
INPUT VOLTAGE (V)
210182634
42
–0.20
–0.15
–0.10
–0.05
0.00
0.05
0.10
0.15
0.20
CHANGE IN V
8607 G07
TEMPERATURE (°C)
–50
–103070
110
150
775
776
777
778
779
780
FB REGULATION VOLTAGE (mV)
8607 G05
OUTPUT CURRENT (mA)
0
125
250
375
500
625
750
–0.25
–0.20
–0.15
–0.10
–0.05
0.00
0.05
0.10
0.15
0.20
0.25
CHANGE IN V
(%)
8607 G06
fSW = 2MHz
VIN = 12V
VIN = 24V
L = 4.7µH
SYNC = 0V OR LT8607 DFN
I
OUT
(mA)
0
125
250
375
500
625
7505055
6065707580859095100
EFFICIENCY (%)
8607 G01
fSW = 2MHz
VIN = 12V
VIN = 24V
L = 4.7µH
I
OUT
(mA)
0.001
0.01
0.1110
100
900010
2030405060708090100
EFFICIENCY (%)
8607 G02
SYNC = 0V OR LT8607 DFN
fSW = 2MHz
VIN = 12V
VIN = 24V
L = 2.2µH
I
OUT
(mA)
0
125
250
375
500
625
7505055
6065707580859095100
EFFICIENCY (%)
8607 G03
SYNC = 0V OR LT8607 DFN
fSW = 2MHz
VIN = 12V
VIN = 24V
L = 2.2µH
I
OUT
(mA)
0.001
0.01
0.1110
100
900
0102030405060708090100
EFFICIENCY (%)
8607 G04
SYNC = 0V OR LT8607 DFN
L = 2.2µH
INPUT VOLTAGE (V)
210182634
42
2.00
2.25
2.50
2.75
3.00
3.25
3.50
3.75
4.00
4.25
4.50
I
8607 G08
SYNC = 0V OR LT8607 DFN
TEMPERATURE (°C)
–50
–103070
110
150
1.3
1.5
1.7
1.9
2.1
2.3
2.5
2.7
2.9
3.1
3.3
8607 G09
SYNC = 0V OR LT8607 DFN

TYPICAL PERFORMANCE CHARACTERISTICS

Efficiency (5V Output, Burst Mode Operation)
Efficiency (5V Output, Burst Mode Operation)
TA = 25°C, unless otherwise noted.
Efficiency (3.3V Output, Burst Mode Operation)
Efficiency (3.3V Output, Burst Mode Operation) FB Voltage Load Regulation
4
Line Regulation
No-Load Supply Current (3.3V Output Switching)
For more information www.analog.com
No Load Supply Current vs Temperature (Not Switching)
Rev. C
Page 5
LT8607/LT8607B
DUTY CYCLE (%)
020406080
100
1.20
1.30
1.40
1.50
1.60
1.70
TOP FET CURRENT LIMIT (A)
8607 G10
SWITCH CURRENT (mA)
0
125
250
375
500
625
750050
100
150
200
250
300
SWITCH DROP (mV)
8607 G13
TOP SW BOT SW
DUTY CYCLE = 0
TEMPERATURE (°C)
–50
–103070
110
150
1.50
1.55
1.60
1.65
1.70
TOP FET CURRENT LIMIT (A)
8607 G11
I
OUT
= 750mA
TEMPERATURE (°C)
–50
–30
–101030507090110
130
15032333435
363738
8607 G14
SWITCH CURRENT = 750mA
TOP SW BOT SW
TEMPERATURE (°C)
–50
–30
–101030507090110
130
15050100
150
200
250
300
350
400
450
SWITCH DROP (mV)
8607 G12
I
OUT
= 350mA
TEMPERATURE (°C)
–50
–30
–101030507090110
130
15080859095
100
105
110
MINIMUM OFF-TIME (ns)
8607 G15
L: XFL4020-472ME
OUTPUT CURRENT (A)
0
125
250
375
500
625
750
0
50
100
150
200
250
300
350
DROPOUT VOLTAGE (mV)
8607 G16
RT = 18.2kΩ
TEMPERATURE (°C)
–50
–103070
110
150
1975
1980
1985
1990
1995
2000
2005
2010
2015
2020
2025
8607 G17
SYNC = 0V OR LT8607 DFN
OUTPUT CURRENT (mA)
0255075100
125
0
250
500
750
1000
1250
1500
1750
2000
2250
2500
8607 G18
VIN = 12V
L = 2.2µH
V
OUT
= 3.3V
TYPICAL PERFORMANCE CHARACTERISTICS
Top FET Current Limit vs Duty Cycle
Switch Drop vs Switch Current
Top FET Current Limit vs Temperature Switch Drop vs Temperature
Minimum On-Time vs Temperature
TA = 25°C, unless otherwise noted.
Minimum Off-Time vs Temperature
Dropout Voltage vs Output Current
Switching Frequency vs Temperature
For more information www.analog.com
Burst Frequency vs Output Current
Rev. C
5
Page 6
LT8607/LT8607B
INPUT VOLTAGE (V)
0510152025303540
45
0
25
5075100
125
150
OUTPUT CURRENT (mA)
8607 G19
VIN = 12V
L = 2.2µH
V
OUT
= 3.3V
RT = 18.2kΩ
SS VOLTAGE (V)
0
0.1
0.2
0.4
0.5
0.6
0.7
0.8
1.0
1.1
1.200.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
FB VOLTAGE (V)
8607 G21
TEMPERATURE (°C)
–50
–30
–101030507090110
130
150
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
8607 G22
V
IN
V
OUT
R
LOAD
= 50Ω
INPUT VOLTAGE (V)
0123456
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
8607 G24
TEMPERATURE (°C)
–50
–30
–101030507090110
130
150
2.00
2.25
2.50
2.75
3.00
3.25
8607 G23
V
IN
V
OUTRLOAD
= 6.66Ω
INPUT VOLTAGE (V)
0123456
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
8607 G25
FB VOLTAGE (V)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.00250
500
750
1000
1250
1500
1750
2000
2250
2500
8607 G20
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Load to Full Frequency (SYNC Float to 1.9V) (MSOP Package) or LT8607B DFN
Soft-Start Current vs Temperature (MSOP Package)
Frequency Foldback
SYNC = 0V OR LT8607 DFN
V
TA = 25°C, unless otherwise noted.
Soft-Start Tracking (MSOP Package)
UVLO vs Temperature
IN
6
Start-Up Dropout
Start-Up Dropout
Rev. C
For more information www.analog.com
Page 7
LT8607/LT8607B
200mA/DIV
8607 G26
2MHz
8607 G29
SW
200mA/DIV
8607 G30
SW
200mA/DIV
8607 G27
2MHz
200mA/DIV
8607 G28
OUT
AMPLITUDE (dBµV/m)
50
1000
SW
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Waveforms Switching Waveforms
I
LOAD
V
SW
5V/DIV
12VIN TO 5V
200mA/DIV
200ns/DIV
AT 500mA
OUT
Transient Response
I
LOAD
I
LOAD
V
SW
10V/DIV
36VIN TO 5V
OUT
200ns/DIV
AT 500mA
I
LOAD
TA = 25°C, unless otherwise noted.
Switching Waveforms (Burst Mode)
V
OUT
20mV/DIV
I
LOAD
V
SW
10V/DIV
2µs/DIV
12VIN TO 5V 22µF C
OUT
AT 7.5mA
Transient Response
V
OUT
100mV/DIV
VIN =12V
= 5V
V
OUT
50mA TO 550mA
= 22µF
C
OUT
= 2MHz
f
45 40 35 30 25 20 15 10
5 0
–5
–10
V
OUT
100mV/DIV
200µs/DIV
VIN =12V
= 5V
V
OUT
250mA TO 750mA
= 22µF
C
OUT
= 2MHz
f
Radiated EMI Performance
(CISPR 25 Radiated Emission Test with Class 5 Peak Limits)
VERTICAL POLARIZATION PEAK DETECTOR
CLASS 5 PEAK LIMIT SPREAD SPECTRUM MODE FIXED FREQUENCY
0 500 900300 700
DC2565A DEMO BOARD WITH EMI FILTER INSTALLED 14V INPUT TO 5V OUTPUT AT 500mA, f
400 800200 600100
FREQUENCY (MHz)
= 2MHz
For more information www.analog.com
100µs/DIV
8607 G31
Rev. C
7
Page 8
LT8607/LT8607B

PIN FUNCTIONS

BST: This pin is used to provide a drive voltage, higher than the input voltage, to the topside power switch. Place a 0.1µF boost capacitor as close as possible to the IC. Do not place a resistor in series with this pin.
SW: The SW pin is the output of the internal power switches. Connect this pin to the inductor and boost capacitor. This node should be kept small on the PCB for good performance.
INTV
: Internal 3.5V Regulator Bypass Pin. The internal
CC
power drivers and control circuits are powered from this voltage. INTV
max output current is 20mA. Voltage on
CC
INTVCC will vary between 2.8V and 3.5V. Decouple this pin to power ground with at least a 1µF low ESR ceramic capacitor. Do not load the INTVCC pin with external circuitry.
RT: A resistor is tied between RT and ground to set the switching frequency. When synchronizing, the RT resistor should be chosen to set the LT8607 switching frequency to equal or below the lowest synchronization input.
SYNC (MSOP Only): External Clock Synchronization Input. Ground this pin for low ripple Burst Mode operation at low output loads. Tie to a clock source for synchroni­zation to an external frequency. Leave floating for pulse­skipping mode with no spread spectrum modulation. Tie to INTV
or tie to a voltage between 3.2V and 5.0V for
CC
pulse-skipping mode with spread spectrum modulation. When in pulse-skipping mode, the I
regulating no load
Q
will increase to several mA. There is no SYNC pin on the LT8607 DFN package. The LT8607 DFN internally ties SYNC to ground. The LT8607B package internally floatsSYNC.
FB: The LT8607 regulates the FB pin to 0.778V. Connect the feedback resistor divider tap to this pin.
TR/SS (MSOP Only): Output Tracking and Soft-Start Pin. This pin allows user control of output voltage ramp rate during start-up. A TR/SS voltage below 0.778V forces the LT8607 to regulate the FB pin to equal the TR/SS pin volt­age. When TR/SS is above 0.778V, the tracking function is disabled and the internal reference resumes control of the error amplifier. An internal 2µA pull-up current from INTVCC on this pin allows a capacitor to program out­put voltage slew rate. This pin is pulled to ground with a 300Ω MOSFET during shutdown and fault conditions; use a series resistor if driving from a low impedance output. There is no TR/SS pin on the LT8607 or LT8607B DFN and the node is internally floated.
PG: The PG pin is the open-drain output of an internal comparator. PG remains low until the FB pin is within ±8.5% of the final regulation voltage, and there are no fault conditions. PG is valid when VIN is above 3.2V and when EN/UV is high. PG is pulled low when V
3.2V and EN/UV is low. If V
is near zero, PG will be high
IN
is above
IN
impedance.
: The VIN pin supplies current to the LT8607 internal
V
IN
circuitry and to the internal topside power switch. This pin must be locally bypassed. Be sure to place the positive terminal of the input capacitor as close as possible to the
pins, and the negative capacitor terminal as close as
V
IN
possible to the GND pins.
EN/UV: The LT8607 is shut down when this pin is low and active when this pin is high. The hysteretic threshold volt­age is 1.05V going up and 1.00V going down. Tie to VIN if the shutdown feature is not used. An external resistor divider from V
can be used to program a VIN threshold
IN
below which the LT8607 will shut down.
GND: Exposed Pad Pin. The exposed pad must be con­nected to the negative terminal of the input capaci­tor and soldered to the PCB in order to lower the thermalresistance.
8
Rev. C
For more information www.analog.com
Page 9

BLOCK DIAGRAM

V
V
IN
R3 OPT
R4 OPT
V
OUT
C
FF
R2
C
SS
R
T
C
IN
EN/UV
PG
R
PG
R1
FB
TR/SS (MSOP ONLY)
RT
SYNC (MSOP ONLY)
IN
1V
INTERNAL 0.778V REF
+
SHDN
±8.5%
SHDN TSD INTVCC UVLO VIN UVLO
2µA
ERROR
AMP
+ + –
– +
SLOPE COMP
OSCILLATOR
200kHz TO 2.2MHz
V
C
SHDN TSD V
UVLO
IN
BURST
DETECT
SWITCH
LOGIC
AND
ANTI-
SHOOT
THROUGH
3.5V REG
LT8607/LT8607B
INTV
CC
C
8607 BD
VCC
C
BST
L
V
C
OUT
OUT
BST
M1
SW
M2
GND

OPERATION

The LT8607 is a monolithic constant frequency current mode step-down DC/DC converter. An oscillator with frequency set using a resistor on the RT pin turns on the internal top power switch at the beginning of each clock cycle. Current in the inductor then increases until the top switch current comparator trips and turns off the top power switch. The peak inductor current at which the top switch turns off is controlled by the voltage on the internal VC node. The error amplifier servos the VC node by comparing the voltage on the VFB pin with an inter­nal 0.778V reference. When the load current increases it causes a reduction in the feedback voltage relative to the reference leading the error amplifier to raise the VC volt­age until the average inductor current matches the new load current. When the top power switch turns off the synchronous power switch turns on until the next clock cycle begins or inductor current falls to zero. If overload conditions result in excess current flowing through the bottom switch, the next clock cycle will be delayed until switch current returns to a safe level.
If the EN/UV pin is low, the LT8607 is shut down and draws 1µA from the input. When the EN/UV pin is above
1.05V, the switching regulator becomes active.
To optimize efficiency at light loads, the LT8607 enters Burst Mode operation during light load situations. Between bursts, all circuitry associated with controlling the output
switch is shut down, reducing the input supply current to
1.7µA. In a typical application, 3.0µA will be consumed from the input supply when regulating with no load. The SYNC pin is tied low to use Burst Mode operation and can be floated to use pulse-skipping mode. If a clock is applied to the SYNC pin the part will synchronize to an external clock frequency and operate in pulse-skipping mode. While in pulse-skipping mode the oscillator operates continu­ously and positive SW transitions are aligned to the clock. During light loads, switch pulses are skipped to regulate the output and the quiescent current will be several mA. The SYNC pin may be tied high for spread spectrum modu­lation mode, and the LT8607 will operate similar to pulse­skipping mode but vary the clock frequency to reduce EMI. The LT8607 DFN has no SYNC pin and will always operate in Burst Mode operation. The LT8607B has no SYNC pin and will operate in pulse-skipping mode.
Comparators monitoring the FB pin voltage will pull the PG pin low if the output voltage varies more than ±8.5% (typi
-
cal) from the set point, or if a fault condition is present.
The oscillator reduces the LT8607’s operating frequency when the voltage at the FB pin is low and the part is in Burst Mode operation. This frequency foldback helps to control the inductor current when the output voltage is lower than the programmed value which occurs duringstart-up.
Rev. C
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9
Page 10
LT8607/LT8607B
RT = 18.2kΩ
VIN = 12V
L = 2.2µH
V
OUT
= 3.3V
INPUT VOLTAGE (V)
0510152025303540
45025
5075100
125
150
8607 F02
200mA/DIV
8607 F03
OUTPUT CURRENT (mA)
0255075100
125
0
250
500
750
1000
1250
1500
1750
2000
2250
2500
8607 F01
VIN = 12V
L = 2.2µH
V
OUT
= 3.3V

APPLICATIONS INFORMATION

Achieving Ultralow Quiescent Current
To enhance efficiency at light loads, the LT8607 enters into low ripple Burst Mode operation, which keeps the output capacitor charged to the desired output voltage while minimizing the input quiescent current and mini­mizing output voltage ripple. In Burst Mode operation the LT8607 delivers single small pulses of current to the out­put capacitor followed by sleep periods where the output power is supplied by the output capacitor. While in sleep mode the LT8607 consumes 1.7µA.
As the output load decreases, the frequency of single cur­rent pulses decreases (see Figure1) and the percentage of time the LT8607 is in sleep mode increases, result­ing in much higher light load efficiency than for typical converters. By maximizing the time between pulses, the converter quiescent current approaches 3.0µA for a typi­cal application when there is no output load. Therefore, to optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as load current.
programmed for Burst Mode operation and cannot enter pulse-skipping mode. The LT8607B DFN is programmed for pulse-skipping mode and cannot enter Burst Mode operation.
SYNC = 0V OR LT8607 DFN
Figure1. Burst Frequency vs Output Current
While in Burst Mode operation the current limit of the top switch is approximately 250mA resulting in output voltage ripple shown in Figure3. Increasing the output capacitance will decrease the output ripple proportionally. As load ramps upward from zero the switching frequency will increase but only up to the switching frequency programmed by the resistor at the RT pin as shown in Table1. The output load at which the LT8607 reaches the programmed frequency varies based on input voltage, output voltage, and inductor choice.
For some applications it is desirable for the LT8607 to operate in pulse-skipping mode, offering two major differ­ences from Burst Mode operation. First is the clock stays awake at all times and all switching cycles are aligned to the clock. In this mode much of the internal circuitry is awake at all times, increasing quiescent current to several hundred µA. Second is that full switching frequency is reached at lower output load than in Burst Mode operation as shown in Figure2. To enable pulse-skipping mode the SYNC pin is floated. To achieve spread spectrum modula­tion with pulse-skipping mode, the SYNC pin is tied high. While a clock is applied to the SYNC pin the LT8607 will also operate in pulse-skipping mode. The LT8607 DFN is
Figure2. Minimum Load to Full Frequency
(SYNC Float to 1.9V) (MSOP or LT8607B DFN)
V
OUT
20mV/DIV
I
LOAD
V
SW
10V/DIV
2µs/DIV
Figure3. Burst Mode Operation
Rev. C
10
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Page 11
APPLICATIONS INFORMATION
V
V
V
( )
V
V
LT8607/LT8607B
FB Resistor Network
The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the resistor values according to:
R1= R2
⎛ ⎜
0.778V
OUT
–1
⎞ ⎟
1% resistors are recommended to maintain output volt­age accuracy.
The total resistance of the FB resistor divider should be selected to be as large as possible when good low load efficiency is desired: The resistor divider generates a small load on the output, which should be minimized to optimize the quiescent current at low loads.
When using large FB resistors, a 10pF phase lead capaci­tor should be connected from V
OUT
to FB.
Setting the Switching Frequency
The LT8607 uses a constant frequency PWM architec­ture that can be programmed to switch from 200kHz to 2.2MHz by using a resistor tied from the RT pin to ground. A table showing the necessary RT value for a desired switching frequency is in Table1. When in spread spectrum modulation mode, the frequency is modulated upwards of the frequency set by R
Table1. SW Frequency vs RT Value
fSW (MHz) RT (kΩ)
0.2 221
0.300 143
0.400 110
0.500 86.6
0.600 71.5
0.700 60.4
0.800 52.3
0.900 46.4
1.000 40.2
1.200 33.2
1.400 27.4
1.600 23.7
1.800 20.5
2.000 18.2
2.200 16.2
.
T
Operating Frequency Selection and Trade-Offs
Selection of the operating frequency is a trade-off between efficiency, component size, and input voltage range. The advantage of high frequency operation is that smaller inductor and capacitor values may be used. The disadvan­tages are lower efficiency and a smaller input voltagerange.
The highest switching frequency (f
SW(MAX)
) for a given
application can be calculated as follows:
+
OUT
VIN– V
f
SW(MAX)
=
t
ON(MIN)
where VIN is the typical input voltage, V voltage, V
SW(TOP)
and V
SW(BOT)
SW(BOT)
SW( TOP)
+ V
SW(BOT)
is the output
OUT
are the internal switch drops (~0.25V, ~0.125V, respectively at max load) and t
ON(MIN)
is the minimum top switch on-time (see Electrical Characteristics). This equation shows that slower switch­ing frequency is necessary to accommodate a high VIN/
ratio.
V
OUT
For transient operation VIN may go as high as the Abs Max rating regardless of the RT value, however the LT8607 will reduce switching frequency as necessary to maintain control of inductor current to assure safe operation.
The LT8607 is capable of maximum duty cycle approach­ing 100%, and the VIN to V R
of the top switch. In this mode the LT8607 skips
DS(ON)
dropout is limited by the
OUT
switch cycles, resulting in a lower switching frequency than programmed by RT.
For applications that cannot allow deviation from the pro­grammed switching frequency at low VIN/V
ratios use
OUT
the following formula to set switching frequency:
+
V
IN(MIN)
where V
OUT
=
1– fSW• t
is the minimum input voltage without
IN(MIN)
skipped cycles, V V
SW(BOT)
are the internal switch drops (~0.25V, ~0.125V, respectively at max load), f (set by RT), and t
SW(BOT)
OFF(MIN)
is the output voltage, V
OUT
OFF(MIN)
– V
SW(BOT)
is the switching frequency
SW
is the minimum switch off-
+ V
SW( TOP)
SW(TOP)
and
time. Note that higher switching frequency will increase the minimum input voltage below which cycles will be dropped to achieve higher duty cycle.
Rev. C
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11
Page 12
LT8607/LT8607B
V
V
SW
1
2
ΔI
2
APPLICATIONS INFORMATION
Inductor Selection and Maximum Output Current
The LT8607 is designed to minimize solution size by allowing the inductor to be chosen based on the output load requirements of the application. During overload or short circuit conditions the LT8607 safely tolerates opera
­tion with a saturated inductor through the use of a high speed peak-current mode architecture.
A good first choice for the inductor value is:
+
OUT
L =
where fSW is the switching frequency in MHz, V the output voltage, V
SW(BOT)
f
• 2
SW(BOT)
is
OUT
is the bottom switch drop
(~0.125V) and L is the inductor value in µH.
To avoid overheating and poor efficiency, an inductor must be chosen with an RMS current rating that is greater than the maximum expected output load of the applica­tion. In addition, the saturation current (typically labeled
) rating of the inductor must be higher than the load
I
SAT
current plus 1/2 of in inductor ripple current:
I
L(PEAK)
= I
LOAD(MAX)
+
Δ
L
where ∆IL is the inductor ripple current as calculated sev­eral paragraphs below and I
LOAD(MAX)
is the maximum
output load for a given application.
As a quick example, an application requiring 0.25A output should use an inductor with an RMS rating of greater than 0.5A and an I
of greater than 0.7A. To keep the
SAT
efficiency high, the series resistance (DCR) should be less than 0.04Ω, and the core material should be intended for high frequency applications.
The LT8607 limits the peak switch current in order to protect the switches and the system from overload faults. The top switch current limit (I
) is at least 1.2A at low
LIM
duty cycles and decreases linearly to at least 0.9A at D =
0.8. The inductor value must then be sufficient to supply the desired maximum output current (I
OUT(MAX)
is a function of the switch current limit (I
), which
) and the
LIM
ripple current:
I
OUT(MAX)
= I
LIM
L
The peak-to-peak ripple current in the inductor can be calculated as follows:
V
ΔI
OUT
=
L
L • f
SW
V
1–
V
IN(MAX)
OUT
⎞ ⎟
where fSW is the switching frequency of the LT8607, and L is the value of the inductor. Therefore, the maximum output current that the LT8607 will deliver depends on the switch current limit, the inductor value, and the input and output voltages. The inductor value may have to be increased if the inductor ripple current does not allow sufficient maximum output current (I
OUT(MAX)
) given the switching frequency, and maximum input voltage used in the desired application.
The optimum inductor for a given application may differ from the one indicated by this design guide. A larger value inductor provides a higher maximum load current and reduces the output voltage ripple. For applications requir­ing smaller load currents, the value of the inductor may be lower and the LT8607 may operate with higher ripple current. This allows use of a physically smaller inductor, or one with a lower DCR resulting in higher efficiency. Be aware that low inductance may result in discontinuous mode operation, which further reduces maximum load current.
For more information about maximum output current and discontinuous operation, see Analog Devices Application Note 44.
Finally, for duty cycles greater than 50% (V
OUT/VIN
> 0.5), a minimum inductance is required to avoid sub-harmonic oscillation. See Application Note 19.
Input Capacitor
Bypass the input of the LT8607 circuit with a ceramic capacitor of X7R or X5R type. Y5V types have poor per­formance over temperature and applied voltage, and should not be used. A 4.7µF to 10µF ceramic capacitor is adequate to bypass the LT8607 and will easily handle the ripple current. Note that larger input capacitance is required when a lower switching frequency is used. If the input power source has high impedance, or there is
Rev. C
12
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Page 13
APPLICATIONS INFORMATION
100
OUT
SW
LT8607/LT8607B
significant inductance due to long wires or cables, addi­tional bulk capacitance may be necessary. This can be provided with a low performance electrolytic capacitor.
Step-down regulators draw current from the input sup­ply in pulses with very fast rise and fall times. The input capacitor is required to reduce the resulting voltage rip­ple at the LT8607 and to force this very high frequency switching current into a tight local loop, minimizing EMI. A 4.7µF capacitor is capable of this task, but only if it is placed close to the LT8607 (see the PCB Layout section). A second precaution regarding the ceramic input capaci­tor concerns the maximum input voltage rating of the LT8607. A ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. If the LT8607 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8607’s voltage rating. This situation is easily avoided (see Analog Devices Application Note 88).
Output Capacitor and Output Ripple
The output capacitor has two essential functions. Along with the inductor, it filters the square wave generated by the LT8607 to produce the DC output. In this role it determines the output ripple, thus low impedance at the switching frequency is important. The second function is to store energy in order to satisfy transient loads and sta­bilize the LT8607’s control loop. Ceramic capacitors have very low equivalent series resistance (ESR) and provide the best ripple performance. A good starting value is:
cause loop instability. See the Typical Applications in this data sheet for suggested capacitor values.
When choosing a capacitor, special attention should be given to the data sheet to calculate the effective capaci­tance under the relevant operating conditions of voltage bias and temperature. A physically larger capacitor or one with a higher voltage rating may be required.
Ceramic Capacitors
Ceramic capacitors are small, robust and have very low ESR. However, ceramic capacitors can cause problems when used with the LT8607 due to their piezoelectric nature. When in Burst Mode operation, the LT8607’s switching frequency depends on the load current, and at very light loads the LT8607 can excite the ceramic capacitor at audio frequencies, generating audible noise. Since the LT8607 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear. If this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output.
A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LT8607. As pre­viously mentioned, a ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. If the LT8607 circuit is plugged into a live supply, the input voltage can ring to twice its nomi­nal value, possibly exceeding the LT8607’s rating. This situation is easily avoided (see Analog Devices Application Note 88).
C
=
OUT
V
where fSW is in MHz, and C
• f
is the recommended output
OUT
capacitance in µF. Use X5R or X7R types. This choice will provide low output ripple and good transient response. Transient performance can be improved with a higher value output capacitor and the addition of a feedforward capaci­tor placed between V
and FB. Increasing the output
OUT
capacitance will also decrease the output voltage ripple. A lower value of output capacitor can be used to save space and cost but transient performance will suffer and may
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Enable Pin
The LT8607 is in shutdown when the EN pin is low and active when the pin is high. The rising threshold of the EN comparator is 1.05V, with 50mV of hysteresis. The EN pin can be tied to VIN if the shutdown feature is not used, or tied to a logic level if shutdown control is required.
Adding a resistor divider from VIN to EN programs the LT8607 to regulate the output only when VIN is above a desired voltage (see Block Diagram). Typically, this threshold, V
, is used in situations where the input
IN(EN)
Rev. C
13
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LT8607/LT8607B
R3
APPLICATIONS INFORMATION
supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. The V
IN(EN)
threshold prevents the regulator from operating at source voltages where the problems might occur. This threshold can be adjusted by setting the values R3 and R4 such that they satisfy the following equation:
V
IN(EN)
=
where the LT8607 will remain off until VIN is above V
R4
+ 1
⎞ ⎟
•1V
IN(EN)
. Due to the comparator’s hysteresis, switching will not stop until the input falls slightly below V
IN(EN)
.
When in Burst Mode operation for light-load currents, the current through the V
resistor network can eas-
IN(EN)
ily be greater than the supply current consumed by the LT8607. Therefore, the V
resistors should be large
IN(EN)
to minimize their effect on efficiency at low loads.
INTV
Regulator
CC
can be externally driven by another voltage source. From 0V to 0.778V, the TR/SS voltage will override the internal
0.778V reference input to the error amplifier, thus regulat
­ing the FB pin voltage to that of TR/SS pin. When TR/SS is above 0.778V, tracking is disabled and the feedback voltage will regulate to the internal reference voltage.
An active pull-down circuit is connected to the TR/SS pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. Fault conditions that clear the soft-start capacitor are the EN/UV pin transitioning low, VIN volt­age falling too low, or thermal shutdown. The LT8607 and LT8607B DFN does not have the TR/SS pin or functionality.
Output Power Good
When the LT8607’s output voltage is within the ±8.5% window of the regulation point, which is a VFB voltage in the range of 0.716V to 0.849V (typical), the output voltage is considered good and the open-drain PG pin goes high impedance and is typically pulled high with an external resistor. Otherwise, the internal drain pull-down device will pull the PG pin low. To prevent glitching both the upper and lower thresholds include 0.5% of hysteresis.
An internal low dropout (LDO) regulator produces the
3.5V supply from VIN that powers the drivers and the internal bias circuitry. The INTVCC can supply enough cur­rent for the LT8607’s circuitry and must be bypassed to ground with a minimum of 1µF ceramic capacitor. Good bypassing is necessary to supply the high transient currents required by the power MOSFET gate drivers. Applications with high input voltage and high switching frequency will increase die temperature because of the higher power dissipation across the LDO. Do not connect an external load to the INTVCC pin.
Output Voltage Tracking and Soft-Start (MSOP Only)
The LT8607 allows the user to program its output voltage ramp rate by means of the TR/SS pin. An internal 2µA pulls up the TR/SS pin to INTVCC. Putting an external capacitor on TR/SS enables soft-starting the output to prevent current surge on the input supply. During the soft­start ramp the output voltage will proportionally track the TR/SS pin voltage. For output tracking applications, TR/SS
The PG pin is also actively pulled low during several fault conditions: EN/UV pin is below 1V, INTV low, V
is too low, or thermal shutdown.
IN
has fallen too
CC
Synchronization (MSOP Only)
To select low ripple Burst Mode operation, tie the SYNC pin below 0.4V (this can be ground or a logic low out­put). To synchronize the LT8607 oscillator to an external frequency connect a square wave (with 20% to 80% duty cycle) to the SYNC pin. The square wave amplitude should have valleys that are below 0.9V and peaks above 2.7V (up to 5V).
The LT8607 will not enter Burst Mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. The LT8607 may be synchronized over a 200kHz to 2.2MHz range. The RT resistor should be chosen to set the LT8607 switch­ing frequency equal to or below the lowest synchroni­zation input. For example, if the synchronization signal will be 500kHz and higher, the RT should be selected for
Rev. C
14
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Page 15
APPLICATIONS INFORMATION
LT8607/LT8607B
500kHz. The slope compensation is set by the RT value, while the minimum slope compensation required to avoid subharmonic oscillations is established by the inductor size, input voltage, and output voltage. Since the syn­chronization frequency will not change the slopes of the inductor current waveform, if the inductor is large enough to avoid subharmonic oscillations at the frequency set by
, then the slope compensation will be sufficient for all
R
T
synchronization frequencies.
For some applications it is desirable for the LT8607 to operate in pulse-skipping mode, offering two major differ­ences from Burst Mode operation. First is the clock stays awake at all times and all switching cycles are aligned to the clock. Second is that full switching frequency is reached at lower output load than in Burst Mode opera­tion as shown in Figure2 in an earlier section. These two differences come at the expense of increased quiescent current. To enable pulse-skipping mode the SYNC pin is floated.
For some applications, reduced EMI operation may be desirable, which can be achieved through spread spec­trum modulation. This mode operates similar to pulse skipping mode operation, with the key difference that the switching frequency is modulated up and down by a 3kHz triangle wave. The modulation has the frequency set by RT as the low frequency, and modulates up to approximately 20% higher than the frequency set by RT. To enable spread spectrum mode, tie SYNC to INTVCC or drive to a voltage between 3.2V and 5V.
The LT8607 does not operate in forced continuous mode regardless of SYNC signal. The LT8607 DFN is always programmed for Burst Mode operation and cannot enter pulse-skipping mode. The LT8607B DFN is programmed for pulse-skipping mode and cannot enter Burst Mode operation.
Shorted and Reversed Input Protection
bottom switch current is monitored such that if inductor current is beyond safe levels switching of the top switch will be delayed until such time as the inductor current falls to safe levels. This allows for tailoring the LT8607 to individual applications and limiting thermal dissipation during short circuit conditions.
Frequency foldback behavior depends on the state of the SYNC pin: If the SYNC pin is low the switching frequency will slow while the output voltage is lower than the pro­grammed level. If the SYNC pin is connected to a clock source, tied high or floated, the LT8607 will stay at the programmed frequency without foldback and only slow switching if the inductor current exceeds safe levels.
There is another situation to consider in systems where the output will be held high when the input to the LT8607 is absent. This may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ORed with the LT8607’s output. If the VIN pin is allowed to float and the EN pin is held high (either by a logic signal or because it is tied to VIN), then the LT8607’s internal circuitry will pull its quiescent current through its SW pin. This is acceptable if the sys­tem can tolerate several µA in this state. If the EN pin is grounded the SW pin current will drop to near 0.7µA. However, if the VIN pin is grounded while the output is held high, regardless of EN, parasitic body diodes inside the LT8607 can pull current from the output through the SW pin and the V the V
and EN/UV pins that will allow the LT8607 to run
IN
pin. Figure4 shows a connection of
IN
only when the input voltage is present and that protects against a shorted or reversed input.
D1
V
IN
V
IN
LT8607
EN/UV
GND
8607 F04
The LT8607 will tolerate a shorted output. Several features are used for protection during output short-circuit and brownout conditions. The first is the switching frequency will be folded back while the output is lower than the set point to maintain inductor current control. Second, the
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Figure4. Reverse VIN Protection
Rev. C
15
Page 16
LT8607/LT8607B
8607 F05
OUT
APPLICATIONS INFORMATION
PCB Layout
For proper operation and minimum EMI, care must be taken during printed circuit board layout. Note that large, switched currents flow in the LT8607’s VIN pins, GND pins, and the input capacitor (C
). The loop formed by
IN
the input capacitor should be as small as possible by placing the capacitor adjacent to the VIN and GND pins. When using a physically large input capacitor the result­ing loop may become too large in which case using a small case/value capacitor placed close to the V
IN
and GND pins plus a larger capacitor further away is pre­ferred. These components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. Place a local, unbroken ground plane under the application circuit on the layer closest to the surface layer. The SW and BOOST nodes should be as small as possible. Finally, keep the FB and RT nodes small so that the ground traces will shield them from the SW and BOOST nodes. The exposed pad on the bottom of the package must be soldered to ground so that the pad is connected to ground electrically and also acts as a heat sink thermally. To keep thermal resistance low, extend
the ground plane as much as possible, and add thermal vias under and near the LT8607 to additional ground planes within the circuit board and on the bottom side.
Thermal Considerations
For higher ambient temperatures, care should be taken in the layout of the PCB to ensure good heat sinking of the LT8607. Figure5 shows the recommended component placement with trace, ground plane and via locations. The exposed pad on the bottom of the package must be soldered to a ground plane. This ground should be tied to large copper layers below with thermal vias; these lay­ers will spread heat dissipated by the LT8607. Placing additional vias can reduce thermal resistance further. The maximum load current should be derated as the ambient temperature approaches the maximum junction rating. Power dissipation within the LT8607 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. The die temperature is calculated by multiplying the LT8607 power dissipation by the thermal resistance from junction to ambient. The LT8607 will stop switching and indicate a fault condition if safe junction temperature is exceeded.
16
C
OUT
GND VIA VIN VIA V
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GROUND PLANE ON LAYER 2
L
C
BST
1
CIN(OPT)
R1
C
FF
C
VCC
R
T
VIA EN/UV VIA OTHER SIGNAL VIA
Figure5. PCB Layout
C
IN
R
PG
R3
R2
C
SS
R4
Rev. C
Page 17

TYPICAL APPLICATIONS

C1
0.1µF
C2
4.7µF X7R 1206
C3 F
C4 22µF X7R 1206
8607 TA02
C5
10pF
L1
4.7µH
R1
18.2k
R2 1M
R3 187k
L1: XFL4020-472ME
R4 100k
C6
10nF
V
IN
EN/UV
SYNC
LT8607
INTV
CC
TR/SS
RT
GND
FB
PG
SW
BST
VIN5.6V to 42V
V
OUT
5V
750mA
POWER
GOOD
fSW = 2MHz
C1
0.1µF
C2
4.7µF X7R 1206
C3 F
C4 22µF X7R 1206
8607 TA03
C5
10pF
L1
2.2µH
R1
18.2k
R2 1M
R3 309k
L1: XFL3012-222ME
R4 100k
C6
10nF
V
IN
EN/UV
SYNC
LT8607
INTV
CC
TR/SS
RT
GND
FB
PG
SW
BST
VIN3.9V to 42V
V
OUT
3.3V
750mA
POWER
GOOD
fSW = 2MHz
C1
0.1µF
C2
4.7µF X7R 1206
C3 F
C4 22µF X7R 1206
8607 TA04
C5
10pF
L1
22µH
R1
40.2k
R2 1M
R3
69.8k
L1: MSS6132-223ML
R4 100k
C6
10nF
V
IN
EN/UV
SYNC
LT8607
INTV
CC
TR/SS
RT
GND
FB
PG
SW
BST
VIN12.7V to 42V
V
OUT
12V
750mA
POWER
GOOD
fSW = 1MHz
LT8607/LT8607B
5V, 2MHz Step-Down
3.3V, 2MHz Step-Down
12V, 1MHz Step-Down
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Rev. C
17
Page 18
LT8607/LT8607B
C1
0.1µF
C2
4.7µF
C3 F
C4 22µF X7R 1206
8607 TA05
C5
10pF
L1
2.2µH
R1
18.2k
R2 1M
R3 768k
L1: XFL3012-222ME
R4 100k
C6
10nF
V
IN
EN/UV
SYNC
LT8607
INTV
CC
TR/SS
RT
GND
FB
PG
SW
BST
V
IN
3.2V to 20V
(42V TRANSIENT)
V
OUT
1.8V
750mA
POWER
GOOD
fSW = 2MHz
C1
0.1µF
C2
4.7µFC933µFC74.7µFC84.7µF
C3 F
C4 22µF X7R 1206
8607 TA06
C5
10pF
L1
22µHL34.7µHL2BEAD
R1 110k
R2 1M
R3 187k
C2, C7, C8: X7R 1206 C9: 63SXV33M L1: MSS6132-223 L2: BKP2125HS101-T
R4 100k
C6
10nF
V
IN
EN/UV
SYNC
LT8607
(MSOP)
INTV
CC
TR/SS
RT
GND
FB
PG
SW
BST
V
OUT
5V
750mA
POWER
GOOD
fSW = 400kHz
VIN5.8V to 40V
+
TYPICAL APPLICATIONS
1.8V, 2MHz Step-Down
Ultralow EMI, 5V, 1.5A Step-Down
18
Rev. C
For more information www.analog.com
Page 19

PACKAGE DESCRIPTION

GAUGE PLANE
(.0120
NO MEASUREMENT PURPOSE
MSE Package
1.88 ±0.102
(.074 ±.004)
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev I)
BOTTOM VIEW OF
EXPOSED PAD OPTION
0.889 ±0.127 (.035 ±.005)
1
1.88
(.074)
LT8607/LT8607B
0.29
1.68
(.066)
REF
5.10
(.201)
MIN
0.305 ± 0.038 ±.0015)
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.18
(.007)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
0.254
(.010)
1.68 ±0.102
(.066 ±.004)
0.50
(.0197)
BSC
DETAIL “A”
DETAIL “A”
0° – 6° TYP
0.53 ±0.152
(.021 ±.006)
3.20 – 3.45
(.126 – .136)
SEATING
PLANE
10
3.00 ±0.102 (.118 ±.004)
(NOTE 3)
4.90 ±0.152
(.193 ±.006)
1 2
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
8910
7
6
4 5
3
DETAIL “B”
0.497 ±0.076 (.0196 ±.003)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.86
(.034)
REF
0.1016 ±0.0508 (.004 ±.002)
MSOP (MSE) 0213 REV I
0.05 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
REF
For more information www.analog.com
Rev. C
19
Page 20
LT8607/LT8607B
2.60
PIN 1 NOTCH
DC8 Package
PACKAGE DESCRIPTION
0.23
0.90 REF
REF
±0.05
0.335 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
8-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1939 Rev Ø)
Exposed Pad Variation AA
1.8 REF
0.85 ±0.05
PACKAGE OUTLINE
0.25 ±0.05
0.45 BSC
0.23 REF
0.335
2.00 ±0.05 (4 SIDES)
0.75 ±0.05
REF
BOTTOM VIEW—EXPOSED PAD
2.00 SQ ±0.05
1.8 REF
4
85
(DC8MA) DFN 0113 REV Ø
1
0.45 BSC
0.55 ±0.05
R = 0.15
0.23 ±0.05
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
20
Rev. C
For more information www.analog.com
Page 21
LT8607/LT8607B

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER
A 06/17 Added DFN package option.
Clarified electrical parameters for DFN package option. Clarified graphs for MSOP package option. Clarified Pins Functions for DFN package option. Clarified Operation to include DFN option. Clarified Applications last paragraph and Figure2 to include DFN option. Clarified Applications section to include DFN operation. Added DFN Package Description.
B 11/17 Added H-grade option
Clarified Oscillator Frequency R Clarified efficiency graph Clarified Block Diagram Added Figure5 Clarified Typical Applications for MSOP package option
C 11/18 Added B version
Added table to clarify versions Modified text in Description to add DFN functionality Added B version to Order Information Clarified Minimum On-Time Conditions Clarified efficiency graphs Clarified Burst Frequency vs Output Current graph Clarified Minimum Load to Full Frequency and Frequency Foldback graphs Clarified Pin Functions on SYNC and TR/SS Clarified Operation third paragraph Clarified last paragraph to include DFN B version and Figures 1, 3 Clarified Applications to include DFN B version Clarified PCB Layout
conditions
T
1, 2 2, 3
6 8 9
10
14, 15
20
2, 3
3 4 9
16
18, 22
All
1 1 2 3 4 5 6 8
9 10 15 16
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
For more information www.analog.com
Rev. C
21
Page 22
LT8607/LT8607B
C7
0.1µF
C8
4.7µF
C10 22µF
8607 TA07
C11
10pF
L2
2.2µH
R5
18.2k
R10 22k
R6 1M
R7 309k
L2: XFL3012-222ME C2, C4, C8, C10: X7R 1206
R8 100k
C12
F
V
IN
EN/UV
SYNC
LT8607
(MSOP)
INTVCCTR/SS
RT
GND
FB
PGSWBST
V
OUT
3.3V
750mA
POWER
GOOD
fSW = 2MHz
C1
0.1µF
C2
4.7µF
C3 F
C4 22µF
C5
10pF
L1
4.7µHR118.2k
R2 1M
R3 187k
L1: XFL4020-472ME
R4 100k
C6
10nF
V
IN
EN/UV
SYNC
LT8607
(MSOP)
INTV
CC
TR/SSRTGND
FB
PG
SW
BST
VIN5.7V to 42V
V
OUT
5.0V
750mA
POWER
GOOD
fSW = 2MHz
R9
80.6k

TYPICAL APPLICATION

5V and 3.3V with Ratio Tracking

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Step-Down DC/DC Converter with I
Step-Down DC/DC Converter with I
DC/DC Converter with I
DC/DC Converter with I
DC Converter with I
= 2.5µA
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Q
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Q
Step-Down DC/DC Converter with I
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Synchronous MicroPower Step-Down DC/DC Converter with I
= 5µA
Q
= 2.5µA
Q
= 2.5µA
Q
= 2.5µA
Q
= 25µA
Q
For more information www.analog.com
: 3V to 42V, V
V
IN
= 0.778V, IQ = 3µA, ISD = <1µA,
OUT
MSOP-10E Package
: 3V to 42V, V
V
IN
= 0.778V, IQ = 2.5µA, ISD = <1µA,
OUT
MSOP-10E Package
: 3V to 42V, V
V
IN
= 0.782V, IQ = 2.5µA, ISD = <1µA,
OUT
MSOP-10E Package
: 3V to 42V, V
V
IN
= 0.774V, IQ = 2.5µA, ISD = <1µA,
OUT
3mm × 3mm LQFN-16 Package
: 3.4V to 42V, V
V
IN
= 0.97V, IQ = 2.5µA, ISD = <1µA,
OUT
MSOP-16E Package
: 3.4V to 42V, V
V
IN
= 0.8V, IQ = 5µA, ISD = <1µA,
OUT
TSSOP-28E, 3mm × 6mm QFN-28 Packages
: 3.4V to 65V, V
V
IN
= 0.97V, IQ = 2.5µA, ISD = <1µA,
OUT
MSOP-16E 3mm × 5mm QFN-24 Packages
: 3.4V to 42V, V
V
IN
= 0.97V, IQ = 2.5µA, ISD = <1µA,
OUT
3mm × 4mm QFN-18 Package
: 3.4V to 42V, V
V
IN
= 0.97V, IQ = 3µA, ISD = <1µA,
OUT
3mm × 6mm QFN-28 Package
: 3.4V to 42V, V
V
IN
= 0.97V, IQ = 2.5µA, ISD = <1µA,
OUT
3mm × 4mm QFN-18 Package
: 3.4V to 42V, V
V
IN
= 0.97V, IQ = 2.5µA, ISD = <1µA,
OUT
4mm × 4mm LQFN-24 Package
: 3.4V to 65V, V
V
IN
= 0.97V, IQ = 2.5µA, ISD = <1µA,
OUT
4mm × 6mm LQFN-32 Package
: 3V to 42V, V
V
IN
= 0.8V, IQ = 25µA, ISD = <1µA,
OUT
6mm × 6mm QFN-40 Package
www.analog.com
ANALOG DEVICES, INC. 2018
Rev. C
11/18
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