Linear LTC3300-1, LTC6803-2 User Manual

Description

DEMO MANUAL DC2064A

LTC3300-1/LTC6803-2

Bidirectional Cell Balancer

Demonstration Circuit DC2064A is a bidirectional cell

®

balancer using two LT C

3300-1 ICs to achieve active cell

balancing of up to 12 Li-Ion batteries. The board uses the

LTC6803-2 multi-cell addressable battery stack monitor to

measure cell voltages and two LTC3300-1 ICs to provide active cell balancing. The demonstration circuit uses a two window GUI developed for the DC2064A. One window is a modified version of the GUI for the LTC6803-2 and also contains a tab to control the LTC3300-1 ICs through the DC590B USB Serial controller and the second window

performance summary

Battery Voltage Range 3.2V to 4.5V (2.5V to 4.5V)*

Stack Voltage 60V Max

Average Battery Balancing Charge Current (12 Cell) 2.6A (Typ) (4A)*

Average Battery Balancing Discharge Current (12 Cell) 2.4A (Typ) (3.6A)*

Average Battery Balancing Charge Current (6 Cell) 2.2A (Typ) (3.3A)*

Average Battery Balancing Discharge Current (6 Cell) 2.4A (Typ) (3.6A)*

Balancing Efficiency 92% (Typ)

*The battery voltage range may be expanded to 2.5V-4.5V by changing resistor R The demo board’s average balancing current is adjustable up to 4A by scaling and installing new values of RS1A and RS1B through RS12A and RS12B.

Specifications are at TA = 25°C

reports the status of the LTC3300-1 devices. All the functions of the LTC6803-2 GUI are supported except that cell balancing is achieved through the LTC3300-1 ICs by transferring charge from one to six batteries per LTC3300-1 to the stack or from the stack to one to six batteries per LTC3300-1.

Design files for this circuit board are available at

http://www.linear.com/demo/DC2064A

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.

to 19.1k and resistor R

TONS

TONP

to 29.4k.

BoarD photo

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DEMO MANUAL DC2064A

Description

Power Stage Discharge Efficiency Power Stage Charge Efficiency

100

95

90

85

EFFICIENCY (%)

80

75

2.6 2.8

6-CELL

12-CELL

3.4

3.2

3.0 CELL VOLTAGE (V)

3.6

3.8

4.0

95

90

85

EFFICIENCY (%)

80

75

2.6 2.8

6-CELL

12-CELL

3.4

3.2

3.0 CELL VOLTAGE (V)

3.6

3.8

4.0

2

Figure 1. DC2064A Size 5.5" × 12.2"

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operating principle

DEMO MANUAL DC2064A

Operation of the LTC6803-2 is detailed in the LTC6803-2 data sheet and the operation of the DC2064A GUI is similar to the DC1652A GUI except additional functionality was added to control the LTC3300-1 balancing devices. Refer to the Quick Start Guide for the DC1652B for operation of the LTC6803-2 GUI. The DC2064A has a two window GUI, one window based on the DC1652A GUI to control the LTC6803-2 with a tab to control the LTC3300-1 for battery balancing and the second window to display the status of the LTC3300-1 based on the command and status registers read from the LTC3300-1.

The LTC3300-1 active balancer is a power stage control IC. The LTC3300-1 does not have a balancer algorithm built into it. The determination of the balancing times and directions are performed at a system level and conveyed to the LTC3300-1 through its SPI interface. The LTC3300-1 only accepts battery charge or discharge commands.

Quick start proceDure

Charge is transferred to/from a cell (battery) from/to the stack, a series connection of adjacent cells, through a flyback converter that is operating in boundary mode.

During discharge of a cell, the current in the primary of a coupled inductor transformer with a turns ratio of 1:2, ramps up to 6.25A at which point the primary switch turns off. The charge in the primary inductor is transferred to the secondary inductor which is connected across the 12-cell pack. This pack current then passes through the series connected cells thus distributing the charge equally across each cell. When charging a cell, the current, in the secondary of the coupled inductor transformer, ramps up to 3.125A at which point the secondary switch turns off. The charge in the secondary inductor is transferred to the primary inductor which is connected across the cell. The secondary current is drawn from the series connected cells thus removing charge equally across each cell. The efficiency through the flyback converter is ≈92%.

The demonstration circuit is set up per Figure 29 to evaluate the performance of the DC2064A bidirectional cell balancer using the LTC3300-1.

Caution: BOT6_TS and TOP6_TS turrets must not be allowed to float and must be connected to their respective top of stack-battery terminal.

Using short twisted-pair leads for any power connections, refer to Figure 29 for the proper measurement and equipment setup. The DC2064A will support a system of 4 to 12 batteries.

Recommended Cell Connection Sequence

The recommended cell connection sequence is to connect the V– connection first followed by connecting cells 1 through cell 12. Disconnection of the cells should follow this sequence in the reverse order with the V– connection being removed last. Connecting the V– connection first and removing last is recommended because the V is the ground reference for the circuitry within the demo board. After connecting the V sequence is less critical as long as the cell circuit capacitances are matched as they are in the demo board.

–

, all other cell connection

–

connection

Following the recommended cell connection removes the possibility of excessive voltage on any of the lower cells due to an imbalance in cell circuit capacitance.

Follow the procedure outlined in the DC1835A Quick Start Guide for general use of the modified LTC6803-2 GUI window. The 4-bit board ID code that is set by the A0 through A3 jumpers on the DC2064A must match the board Address box in the LTC6803-2 GUI window shown in Figure 2 for each board in the system.

Figure 2. Board Address Box

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DEMO MANUAL DC2064A

Quick start proceDure

The Voltage Comparator box must be turned off and the VREF must remain on during balancing. Set window by using the Up/Down arrows to the right of the box. See Figure 3.

Figure 3. Voltage Comparator Box

The DC2064A GUI periodically checks for OV and UV measured on the cells when balancing. To avoid the program from suspending balancing from an OV or UV measurement during normal operation, the OV and UV values must be entered in the VOV and VUV text boxes on the LTC6803-2 tab shown in Figure 4.

Click the START CELL VOLT button followed by the READ CELL VOLT to verify that the batteries are connected and that the LTC6803-2 can read the battery voltages.

Figure 6. Start Cell Voltage Read Box

To access the LTC3300-1 screen, click on the LTC3300-1 tab in the upper left of the LTC6803-2 GUI window.

Figure 7. LTC3300-1 Screen Select Box

Figure 4. VOV and VUV text boxes

Once this is done, Click the WRITE CONFIG button and verify that the configuration was set correctly by clicking the READ CONFIG.

Figure 5. Write Configuration Box

Within this window you can manually select which cells are to be discharged by clicking the cell’s DISCHARGE button and which cells are to be charged by clicking the cell’s CHARGE button.

Figure 8. Balance Mode Select Boxes

To write this configuration, the WRITE button followed by the SEND button must be clicked. To enable the balancers, the EXECUTE button followed by the SEND button must be clicked. To pause the cell balancers, the SUSPEND button is clicked followed by clicking the SEND button. This will turn off all balancers until the EXECUTE button is clicked followed by clicking the SEND button. This will resume the previous settings of the cell charge/discharge settings.

4

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Quick start proceDure

Figure 9. Write/Execute Command Box

To change any of the settings “on the fly”, a new charge/ discharge setting is entered using the respective CHARGE and DISCHARGE buttons followed by clicking the WRITE button followed by the SEND button and then the EXECUTE button followed by the SEND button. To disable any cell from operating, the cell’s NONE button must be clicked in the balance mode box followed by clicking the WRITE button followed by the SEND button and then the EXECUTE button followed by the SEND button.

The LTC3300-1 GUI allows the user to program the balancer to charge or discharge each cell for a specific amount of time. The LTC3300-1 is a power stage control IC. The determination of the balancing times and directions are done at the System level and conveyed to the LTC3300-1 through its SPI communications port. In order to perform a timed balance, the TIMED BALANCE check shown in Figure 10 must be selected to have access to the timed balance controls as shown in Figure 27.

DEMO MANUAL DC2064A

To do this, select the DISCHARGE or CHARGE button for the desired cell, then enter the time in seconds into the cells “BALANCE TIME” text box. Press the enter key on the key board or select another button in the GUI to load the time. When all the desired balance actions and times have been entered, select the “Balance Cells” START but ton to start the balancing sequence.

Figure 11. Balance Cells Start Box

The START button will display PAUSE. The balancing algorithm will first turn off all cells, then set all cells to be balanced. The cells will run until the first cell(s) have elapsed their balance time. At this time all cell balancing is suspended, the completed cell’s balancing action is set to “None”, the remaining times to balance are recalculated, then the remaining cells continue to balance until the next cell(s) have completed. This sequence continues until all of the balance times have elapsed.

Selecting the PAUSE button while the balancer is running, will shut off the active cell and pause the timer. The START button now displays CONTINUE. Selecting the CONTINUE button again will start the active cell balancing and continue the timer. After the last cell has completed balancing, all the cells are turned off. The START button will again display START. Selecting the RESET button will reset all the cell actions and times to the previous entered settings.

-

Figure 10. TIMED BALANCE Check Box

The LTC3300 STATUS window displays the status of all LTC3300-1 ICs in the system. This GUI is updated every time the LTC3300-1 status or command registers are read. When the balancer is read after each execute command is sent.

timer is running, the command register

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DEMO MANUAL DC2064A

Vm1• Vm2• 10

Vm3• Vm

Vm5• Vm6• 10

Vm7• Vm

Quick start proceDure

Cell Balancer Efficiency Measurements:

Figure 30 shows the proper connections for measuring the efficiency of a cell balancer. The secondary of the cell balancer connects to the top of stack. This connection

needs to be to an isolated power source through a current sensing resistor (0.10Ω). Cells 1 through 6 are connected to the BOT6_TS turret with its return path the V– turret while Cells 7 through 12 are connected to the TOP6_TS turret with its return path the C6 turret. The primary side connections of the cell balancers are connected to a string of batteries that simulate the battery stack. Cell 1 is a 2-wire connection that connects the positive node, through a current sensing resistor (0.01Ω), to the C1 turret, and the negative node to the V– turret. Remote sense connections for power sources with remote sensing capabilities should be connected to the C1 and V– respectively. All other connections of the simulated string of batteries connect their positive node, through a current sensing resistor (0.01Ω), to respective turrets. Cell voltage measurements should be made across the C(x) and C(x – 1) turrets of the respective cells. Stack voltage measurements should be made at the BOT6_TS and TOP6_TS turrets and

return path turret.

their

Cells 7-12

Charge Mode

Efficiency11=

Discharge Mode

Efficiency11=

Cell Balancer Performance Measurements:

Table 2 through Table 5 present the typical operational data for a 12-cell and 6-cell balancer in both Discharge and Charge modes. The cell voltages were 3.6V and measure ments of Cell Current, Stack Current, Operating Frequency were taken and the data. Figure 12 through Figure 15 are actual in circuit waveforms taken on Cell 1 and Cell 7 while operating in both modes. The waveforms present voltage on the pri mary side voltage and the sense inputs to the LTC3300-1.

and secondary side MOSFET’s drain to source

Vm7• Vm

Vm5• Vm6• 10

transfer Efficiency was calculated from

primary side and secondary side current

8

• 100%

-

To calculate cell balancer efficiency use the expressions below:

Cells 1-6

Charge Mode

Efficiency1=

Discharge Mode

Efficiency1=

Vm3• Vm

Vm1• Vm2• 10

4

• 100%

Figures 16 through 19 are cell and stack currents taken over a range of cell voltages from 2.6V to 4.0V. The RTONP and RTONS resistors for these graphs were set for 2.6V cell voltage operation. All cells were set to the cell voltage under test. The slight negative slope in current at higher voltages is due to the increased operating frequency and the circuit delays and dead time becoming a higher percent-age of the operating period.

6

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Quick start proceDure

DEMO MANUAL DC2064A

12 Cell Discharge

Table 2. Typical 12 Cell Discharge Data

Cell I (A) Stack I (A) Frequency (kHz) Efficiency

2.444 0.188 127.7 92.21%

Figure 12. 12 Cell Discharge Waveforms

12 Cell Charge

6 Cell Discharge

Table 4. Typical 6 Cell Discharge Data

Cell I (A) Stack I (A) Frequency (kHz) Efficiency

2.448 0.277 126.1 92.33%

Figure 14. 6 Cell Discharge Waveforms

6 Cell Charge

Table 3. Typical 12 Cell Charge Data

Cell I (A) Stack I (A) Frequency (kHz) Efficiency

2.601 0.237 149.1 91.71%

Figure 13. 12 Cell Charge Waveforms

Table 5. Typical 6 Cell Charge Data

Cell I (A) Stack I (A) Frequency (KHz) Efficiency

2.219 0.399 133.1 92.72%

Figure 15. 6 Cell Charge Waveforms

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DEMO MANUAL DC2064A

Quick start proceDure

4.0

3.5

3.0

2.5

2.0

CELL DISCHARGE CURRENT (A)

1.5

1.0

2.6

2.8 3.0

12-CELL

6-CELL

3.4 3.8 4.0

3.2 3.6

CELL VOLTAGE (V)

Figure 16. Cell Discharge Current

0.50

0.45

0.40

0.35

0.30

0.25

0.20

STACK DISCHARGE CURRENT (A)

0.15

6-CELL

12-CELL

4.0

3.5

3.0

2.5

2.0

CELL CHARGE CURRENT (A)

1.5

1.0

2.6

2.8 3.0 CELL VOLTAGE (V)

Figure 18. Cell Charge Current

0.50

0.45

0.40

0.35

0.30

0.25

0.20

STACK CHARGE CURRENT (A)

0.15

12-CELL

6-CELL

3.4 3.8 4.0

3.2 3.6

6-CELL

12-CELL

0.10

2.8 3.0 3.4

2.6

3.2

CELL VOLTAGE (V)

3.6 3.8 4.0

Figure 17. Stack Discharge Current

0.10

2.8 3.0 3.4

2.6

3.2

CELL VOLTAGE (V)

Figure 19. Stack Charge Current

3.6 3.8 4.0

8

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Quick start proceDure

DEMO MANUAL DC2064A

Tw o Board Setup and Operation:

As a result of communication latency to the PC, the system only supports two series DC2064A boards

When connecting two DC2064A boards together, the in terface cables must be in Figure 20 to avoid large inrush currents. The DC590B

DC2064A DC2064A

connected in sequence as shown

Figure 20. Tw o DC2064A SPI Connection Sequence

-

must be connected to the PC USB port and the bottom DC2064A board first and then the top DC2064A board may be connected.

The 24 cells should be interconnected to allow balancing between the two 12-cell stacks, as shown in Figure 21.

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DEMO MANUAL DC2064A

Quick start proceDure

10

Figure 21. 24 Cell Interconnected Stacks

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Quick start proceDure

DEMO MANUAL DC2064A

On the LTC6803-2 tab on the DC2064A GUI, the Number of Boards in the System drop down box will need to be changed to 2. Make sure the address for each board in the Hex Address box matches the address set by the A0 to A3 jumpers on the respective DC2064A board. The board selection buttons on the bottom left side of the GUI highlight which board is selected in maroon, as shown and the set hexadecimal address is displayed under each board. To change the hexadecimal address on the GUI, select the board to change by clicking on the appropriate board selection number and then select the correct ad dress in the Hex Address Box.

Figure 22. DC2064A GUI Board Selection Controls

To set up the charge and discharge actions for each LTC3300, the appropriate board must be selected first and then the commands for each LTC3300-1 can be selected and written to the LTC3300-1 tab. When all the desired actions are selected and written to the four LTC3300-1 ICs, then a single execute command will send an execute command to both boards simultaneously provided the Broadcast Execute/Suspend button is selected as shown in Figure 23.

-

Additional Circuitry

Additional circuitry has been added to increase the robustness of the design for fault insertions.

6 Wire Disconnection

Cell

A 10A

200V Schottky diode has been added for a high current path when the connection between battery cells is broken when a battery stack load is present. The 200V reverse voltage rating of the diode was selected to mini-mize the reverse leakage current at a battery voltage of 4.2V. The 10A current rating was selected for its low forward voltage drop which will minimize the current in the parallel diode within the LTC3300-1 as well as surviving the fusing current of the 7A fuses on the DC2064A.

Tw o overvoltage detection circuits have been added to the design that will sense an overvoltage condition on Cell 6 and Cell 7 when a disconnection of the Cell 6 wire con nection between battery stack occurs. When Cell 6 is being discharged and other cells controlled by the U1, the lower LTC3300-1, and U2, the upper LTC3300-1 are operational, an overvoltage can occur on Cell 7. The overvoltage on Cell 7 will shut down the operation of Cell 7-Cell 12 but Cell 1-Cell 6 will continue to operate. The overvoltage sensing circuit Q15, D21, D23 and R51 will turn off the operations of Cell 1-Cell6 through the internal overvoltage protection circuit within the LTC3300-1 of U1.

A similar event occurs when Cell 6 is operating in the Charge Mode and the Cell 6 connection from the board to the battery is lost. The overvoltage on Cell 6 will shut down the operation of Cell 1-Cell 6 but Cell7- Cell 12 will continue to operate. The overvoltage sensing circuit Q16, D22, D24 and R52 will turn off the operations of Cell 7-Cell 12 through the internal overvoltage protection circuit within the LTC3300-1 of U2.

battery

Cell 6+ and battery Cell 7– of the

-

Figure 23. Broadcast Execute/Suspend Tab

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DEMO MANUAL DC2064A

Quick start proceDure

Cell Bypass Capacitors

The DC2064A contains bypass capacitors from the cell connections and the stack connections. These capacitors have a dual function of smoothing the high triangular current wave before the current travels down the inter connecting wires the voltage between cells when hot-plugging cells in a random order. The RMS current rating of these capaci tors is a critical parameter for these bypass capacitors as well as their physical size. These high triangular current waveforms produce an RMS current that passes through the capacitors which result in an internal heat rise. Larger physical size MLCC capacitors have higher RMS current rating due to their greater surface area to dissipate the heat rise. The capacitance of MLCC capacitors decreases with applied voltage and this must be taken into account when selecting the capacitance value. If a connection is lost during balancing, the differential voltage seen by the LTC3300-1 power circuit on each side of the break may increase or decrease in depending on whether the power stage is charging or discharging and where the break occurred. The worst-case scenario is when the balanc

each side of the break are active and balancing

ers on in opposite directions. increase rapidly on one side and decrease rapidly on the

to the

cells and they also help balance

Here the differential voltage will

-

other. The LTC3300-1 contains an overvoltage protection comparator which monitors the cell voltage and will shut down all balancers before the differential voltage on any cell input reaches the maximum absolute voltage rating.

Each cell node must have an equivalent capacitance across it to prevent an overvoltage condition when randomly con necting cells to the LTC3300-1 battery balancer circuit. In addition to the power circuit, there are capacitors across the Cx pins of the LTC3300-1 to reduce high frequency noise on these pins and capacitors across adjacent cells to act as a reservoir of charge for the cell’s MOSFET gate driver circuits. These reservoir capacitors must also be of equal value to maintain the balancing of voltage and a capacitor of 2x the value of the reservoir capacitor must be connected between C1

–

of the lowest LTC3300-1 and from the top cell to

and V the cell below it to insure an equal voltage across all cells when the battery stack is initially connected. Figures 25 and 26 The reservoir capacitors must be large compared to the capacitors across the Cx pins to force the MOSFET gate charging current to flow through the reservoir capacitors. An effective 10:1 ratio between these cell capacitors was selected when considering that a capacitor across two cells would result in a 5:1 ratio.

detail these capacitor connections and their values.

smoothing capacitors across each balancer

-

12

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Quick start proceDure

DEMO MANUAL DC2064A

Figure 24. DC2064A LTC6803-2 Setup Screen

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DEMO MANUAL DC2064A

G1PI1PWDTA

CMMSH2-40

DC2064a F26

C5

Quick start proceDure

D1

1

C4

CMMSH2-40

0.22µF

BOOST

16V

G6P

I6P

36

35

34

33

32

31

30

29

28

27

26

25

C1K 1µF 16V 0603

G5P

I5P

G4P

I4P

G3P

I3P

G2P

I2P

0603

C23 10µF 10V 0805

C3

0.1µF 16V 0402

42

BOOST

SDO

+

–

V

2019 21 22 23 24

3738394041

C6 G6P I6PBOOST

C5

G5P

I5P

C4

G4P

I4P

C3

G3P

I3P

C2

G2P

I2P

C1G1PI1PWDT

C6K 1µF 16V 0603

C5K 1µF 16V 0603

C4K 1µF 16V 0603

C3K 1µF 16V 0603

C2K 1µF 16V 0603

R5

0 OPT

Figure 25. Bypass Capacitors on Lowest LTC3300-1

2

C9

4.7µF 16V 0805

C11

4.7µF 16V 0805

C14

4.7µF 16V 0805

1

2

R6

6.81

C10

4.7µF 16V 0805

C12

4.7µF 16V 0805

DC2064a F25

D2

C6

C5

C4

C3

C2

C1

BOOST

42

BOOST

SDO

C7

0.1µF 16V 0402

+

–

C6 G6P I6PBOOST

–

V

2019 21 22 23 24

WDTC

C6

G7PI7P

G12P

I12P

3738394041

36

C5

35

G5P

34

I5P

33

C4

32

G4P

31

I4P

30

C3

29

G3P

28

I3P

27

C2

26

G2P

25

I2P

C1G1PI1PWDT

G11P

I11P

G10P

I10P

G9P

I9P

G8P

I8P

C7K 1µF 16V 0603

C8

0.22µF 16V 0603

D3

1

CMMSH2-40

R9

0 OPT

C12K 1µF 16V 0603

C11K 1µF 16V 0603

C10K 1µF 16V 0603

C9K 1µF 16V 0603

C8K 1µF 16V 0603

1

D4

2

CMMSH2-40

2

R10

6.81

C12

C24 10µF 10V 0805

C13

4.7µF 16V 0805

C11

C10

C9

C8

C7

C15

4.7µF 16V 0805

C17

4.7µF 16V 0805

C18

4.7µF 16V 0805

C16

4.7µF 16V 0805

C20

4.7µF 16V 0805

14

Figure 26. Bypass Capacitors on the Top LTC3300-1

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Quick start proceDure

DEMO MANUAL DC2064A

Figure 27. DC2064A LTC3300-1 Setup Screen with Timed Balance Controls

Figure 28. DC2064A LTC3300-1 Status GUI Screen

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DEMO MANUAL DC2064A

Quick start proceDure

Figure 29. Proper Measurement Equipment Setup for Bidirectional Cell Balancer

Note: All connections from equipment should be Kelvin connected directly to the Board Pins which they are connected to on this diagram and any input, or output, leads should be twisted pair, where possible.

16

System Setup Requirements: LFP or Li-Ion Battery ≥ 10AHr Internal Resistance < 30mΩ

Recommended Battery Simulator: Power Supply 2V to 5.0 V ±10A Interconnect Resistance < 25mΩ

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Quick start proceDure

DEMO MANUAL DC2064A

Figure 30. Proper Equipment Setup for Cell Balancer Efficiency Measurements

System Setup Requirements: LFP or Li-Ion Battery ≥ 10AHr Internal Resistance < 30mΩ

Recommended Battery Simulator: Power Supply 2V to 5.0 V ±10A Interconnect Resistance < 25mΩ

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DEMO MANUAL DC2064A

Quick start proceDure

Figure 31. Proper Equipment Setup for Minimum Number of Cell Efficiency Measurements

18

System Setup Requirements: LFP or Li-Ion Battery ≥ 10AHr Internal Resistance < 30mΩ

Recommended Battery Simulator: Power Supply 2V to 5.0 V ±10A Interconnect Resistance < 25mΩ

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Quick start proceDure

DEMO MANUAL DC2064A

Figure 32. Configuring the Board for Six Batteries

System Setup Requirements: LFP or Li-Ion Battery ≥ 10AHr Internal Resistance < 30mΩ

Recommended Battery Simulator: Power Supply 2V to 5.0 V ±10A Interconnect Resistance < 25mΩ

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DEMO MANUAL DC2064A

Quick start proceDure

Figure 33. Configuring the Board for Seven Batteries

System Setup Requirements: LFP or Li-Ion Battery ≥ 10AHr Internal Resistance < 30mΩ

Recommended Battery Simulator: Power Supply 2V to 5.0 V ±10A Interconnect Resistance < 25mΩ

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Quick start proceDure

DEMO MANUAL DC2064A

Figure 34. Configuring the Board for Eight Batteries

System Setup Requirements: LFP or Li-Ion Battery ≥ 10AHr Internal Resistance < 30mΩ

Recommended Battery Simulator: Power Supply 2V to 5.0 V ±10A Interconnect Resistance < 25mΩ

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DEMO MANUAL DC2064A

Quick start proceDure

22

System Setup Requirements: LFP or Li-Ion Battery ≥ 10AHr Internal Resistance < 30mΩ

Recommended Battery Simulator: Power Supply 2V to 5.0 V ±10A Interconnect Resistance < 25mΩ

Figure 35. Configuring the Board for Nine Batteries

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Quick start proceDure

DEMO MANUAL DC2064A

System Setup Requirements: LFP or Li-Ion Battery ≥ 10AHr Internal Resistance < 30mΩ

Recommended Battery Simulator: Power Supply 2V to 5.0 V ±10A Interconnect Resistance < 25mΩ

Figure 36. Configuring the Board for Ten Batteries

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DEMO MANUAL DC2064A

Quick start proceDure

Figure 37. Configuring the Board for Eleven Batteries

24

System Setup Requirements: LFP or Li-Ion Battery ≥ 10AHr Internal Resistance < 30mΩ

Recommended Battery Simulator: Power Supply 2V to 5.0 V ±10A Interconnect Resistance < 25mΩ

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A

REVISION HISTORY

15

schematic Diagrams

1 - 11 - 13

J.DREWPRODUCTION FAB

DESCRIPTION DATEAPPROVEDECO REV

1

-

BOT6_TS

OPT

T6

OPT

F13

7A

F13

7A

2.2uF

1210

2.2uF

1210

C6R

C6S

1210

2.2uF

1210

C6T

2.2uF

C6T

2.2uF

C6F

470pF

R6B181206

674

129

C6E

R6A201206

C6C

100uF

1210

C6B

1210

100uF

1210

C6A

100uF

1210

470pF

6.3V

100V

0603

100V

6.3V

E8

Q6B

SiS892DN

8 7 642 5

5

WURTH-750312504

10

0603

5 642 7 8

D6F

BOT6_TSE8BOT6_TS

G6S

R6F

5.1

R6F

5.1

1

3

2 1

D6B

OPT

DFLS1100

OPT

D6A

DFLS260

2 1

3

1

Q6A

SiR882DP

R6C

5.1

G6P

SBR10U200P5

3 2 1

J2

OPT

BOT6_TS1BOT6_TS

2

R6H20R6H

3

R6G20R6G

CMOSH-4E

2 1

D6C

179313000_SC

I6S

RS6A

I6P

V-

C6H

470pF

20

PLACE RC CLOSE TO LTC3300

4

2 1

BOT6_TS

RS6B

0.016

RS6B

0.016

0.008

2 1

4

20

C6G

2.2nF

PLACE RC CLOSE TO LTC3300

C5R

OPT

C5S

OPT

C5T

C5F

OPT

674

T5

129

OPT

C5C

C5B

C5A

100V

1210

2.2uF

1210

2.2uF

1210

2.2uF

470pF

R5B181206

C5E

20

R5A

1210

100uF

1210

100uF

1210

100uF

100V

470pF

6.3V

0603

100V

0603

100V

0603

1206

R5F

Q5B

SiS892DN

Q5B

SiS892DN

8 7 642 5

OPT

5

WURTH-750312504

10

OPT

5 642 7 8

R5C

D5F

SBR10U200P5

G5S

D5A

G5P

3 2 1

D5B

Q5A

5.1

DEMO MANUAL DC2064A

www.linear.com

V-

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

470pF

2 1

LTC Confidential-For Customer Use Only

TECHNOLOGY

PLACE RC CLOSE TO LTC3300

SCHEMATIC

TITLE:

NC

J. DREW

APPROVALS

PCB DES.

APP ENG.

CUSTOMER NOTICE

PLACE RC CLOSE TO LTC3300

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

HIGH EFFICIENCY BIDIRECTIONAL

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

5.1

1

3

2 1

DFLS1100

DFLS260

2 1

3

1

SiR882DP

OPT

D5C

R5H20R5H

3

R5G20R5G

CMOSH-4E

2 1

V-

I5S

C5H

470pF

20

4

2 1

0.016

RS5B

RS5A

0.008

2 1

4

20

C5G

2.2nF

I5P

C4R

2.2uF

C4R

2.2uF

1210

100V

1210

C4S

2.2uF

C4S

2.2uF

OPTOPT

100V

1210

C4T

2.2uF

C4T

2.2uF

PLACE RC CLOSE TO LTC3300

OPT

C4F

0603

470pF

100V

470pF

100V

OPT

R4B181206

BOT6_TS

674

5

T4

129

10

C4E

470pF

0603

C4E

470pF

0603

100V

20

R4A

1206

6.3V

1210

OPT

C4C

100uF

6.3V

1210

C4B

100uF

PLACE RC CLOSE TO LTC3300

C4A

100uF

6.3V

100uF

6.3V

1210

G4S

5.1

R4F

4

Q4B

SiS892DN

Q4B

SiS892DN

8 7 6 5

D4B

OPT

WURTH-750312504

D4A

OPT

5 642 7 8

Q4A

R4C

5.1

G4P

D4F

SBR10U200P5

3 2 1

1 2 3

2 1

DFLS1100

DFLS260

2 1

3

1

SiR882DP

CMOSH-4E

D4C

OPT

I4S

C4H

20

R4H20R4H

4

3

0.016

RS4B

0.008

RS4A

4

3

20

R4G20R4G

2 1

2.2nF

C4G

I4P

1

SHEET OF

MULTICELL BATTERY BALANCER

DEMO CIRCUIT 2064A

LTC3300ILXE-1 / LTC6803IG-2

DEMO CIRCUIT 2064A

LTC3300ILXE-1 / LTC6803IG-2

DEMO CIRCUIT 2064A

LTC3300ILXE-1 / LTC6803IG-2

1 - 11 - 13

IC NO. REV.

N/A

SIZE

DATE:

SIZE

DATE:

SIZE

DATE:

SCALE = NONE

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

C6

C5

C4

C3

N-1

-

N

C - C

2.5A

2.5V - 4.5V

1

BATTERY CELL VOLTAGES

2.2uF

C3R

1210

100V

C3R

1210

100V

1210

OPTOPT

C3S

100V

C3S

100V

2.2uF

BOT6_TS

C3T

C3F

OPT

T3

C3E

OPT

C3C

C3B

C3A

2.2uF

18

R3B

674

129

470pF

R3A

1210

100uF

1210

100uF

1210

100V

470pF

20

1210

100V

1206

100V

1206

6.3V

Q3B

8

0603

7 642 5

5

10

0603

5 642 7 8

D3F

G3S

R3F

5.1

R3F

5.1

SiS892DN

1

3

2 1

D3B

OPT

DFLS1100

WURTH-750312504

OPT

D3A

DFLS260

D3A

DFLS260

2 1

3

1

Q3A

SiR882DP

R3C

5.1

R3C

5.1

G3P

SBR10U200P5

3 2 1

C3

OPT

R3H20R3H

3

R3G20R3G

CMOSH-4E

2 1

D3C

I3S

RS3A

I3P

RS3B

V-

C3H

470pF

C3H

470pF

20

4

2 1

0.016

0.008

2 1

4

20

2.2nF

C3G

C2

C2R

2.2uF

C2R

2.2uF

1210

OPT

C2S

2.2uF

1210

C2S

2.2uF

1210

OPT

C2T

1210

2.2uF

C2F

OPT

470pF

BOT6_TS

OPT

R2B

674

T2

129

C2E

470pF

OPT

C2C

C2B

C2A

R2A

100uF

470pF

18

1210

PLACE RC CLOSE TO LTC3300PLACE RC CLOSE TO LTC3300

C2

100V

1206

100V

20

6.3V

0603

5

10

0603

1206

D2F

8 7 6 5

5 6 7 8

SBR10U200P5

G2S

5.1

R2F

4

Q2B

SiS892DN

D2B

DFLS1100

D2B

DFLS1100

WURTH-750312504

OPT OPT

D2A

DFLS260

Q2A

4

5.1

R2C

G2P

3 2 1

1 2 3

2 1

3 2 1

SiR882DP

CMOSH-4E

D2C

OPT

I2S

20

R2H20R2H

4

3

RS2B

0.008

RS2A

4

3

20

R2G20R2G

2 1

C2G

I2P

V-

C2H

470pF

PLACE RC CLOSE TO LTC3300PLACE RC CLOSE TO LTC3300

2 1

0.016

2 1

2.2nF

C1

BOT6_TS

C1

OPT

C1T

OPT

T1

OPT

C1R

2.2uF

C1S

2.2uF

C1F

R1B

674

129

C1E

R1A

C1C

100uF

C1B

100uF

C1A

100uF

1210

18

470pF

1210

100V

1206

470pF

20

6.3V

0603

5

10

0603

100V

1206

6.3V

G1S

R1F

5.1

R1F

5.1

4

Q1B

SiS892DN

8 7 6 5

OPT

D1B

WURTH-750312504

OPT

D1A

DFLS260

5 6 7 8

Q1A

4

5.1

R1C

G1P

D1F

SBR10U200P5

3 2 1

1 2 3

2 1

DFLS1100

2 1

3 2 1

SiR882DP

OPT

R1H20R1H

R1G20R1G

CMOSH-4E

2 1

D1C

I1S

C1H

470pF

20

4

3

RS1B

0.016

RS1B

0.016

RS1A

0.008

RS1A

0.008

4

3

20

C1G

2.2nF

I1P

PLACE RC CLOSE TO LTC3300

2 1

V-

2 1

PLACE RC CLOSE TO LTC3300

Figure 38. Schematic Diagram Page 1

dc2064afa

25

DEMO MANUAL DC2064A

1

A

OPT

25

schematic Diagrams

1

E15

TOP6_TS

TOP6_TS1TOP6_TS

J3

Q12B

SiS892DN

8 7 6 5

5

WURTH-750312504

10

0603

5 6 7 8

D12F

Q9B

SiS892DN

8

0603

7 6 5

5

10

WURTH-750312504

0603

5 6 7 8

G12S

5.1

R12F

4

1 2 3

2 1

OPT

D12B

DFLS1100

OPT

D12A

DFLS260

2 1

3 2 1

4

Q12A

SiR882DP

5.1

R12C

OPT

G12P

SBR10U200P5

3 2 1

G9S

5.1

R9F

4

D9B

OPT

D9A

4

Q9A

5.1

R9C

G9P

D9F

SBR10U200P5

3 2 1

J3

2 1

D12C CMOSH-4ED12C CMOSH-4E

1 2 3

2 1

DFLS1100

DFLS260

2 1

3 2 1

SiR882DP

CMOSH-4E

D9C

OPT

2

R12H20R12H

3

R12G20R12G

R9H20R9H

R9G20R9G

2 1

179313000_SC

I12S

C12H

20

4

RS12B

RS12A

0.008

RS12A

0.008

4

20

C12G

I12P

I9S

20

3

RS9B

RS9A

3

20

I9P

C6

C11R

C6

OPT

C11S

470pF

OPT

C11T

OPT

PLACE RC CLOSE TO LTC3300

2 1

OPT

TOP6_TS

0.016

T11

2 1

OPT

C11C

2.2nF

2.2nF C11B

C11B

PLACE RC CLOSE TO LTC3300

C11

C6

C9H

470pF

C9H

470pF

4

2 1

0.016

0.008

2 1

4

C9G

2.2nF

PLACE RC CLOSE TO LTC3300 PLACE RC CLOSE TO LTC3300

C8

1210

2.2uF

1210

2.2uF

1210

2.2uF

C11F

470pF

18

R11B

674

129

C11E

R11A

1210

100uF

1210

100uF

1210

C11A

100uF

OPT

TOP6_TS

T8

OPT

C8

100V

0603

100V

1206

5

10

0603

470pF

100V

470pF

100V

20

1206

6.3V

C8R

2.2uF

C8R

2.2uF

C8S

2.2uF

C8S

2.2uF

C8T

2.2uF

C8F

R8B

674

129

C8E

470pF

R8A201206

C8C

100uF

C8B

100uF

C8A

100uF

G11S

R11F

4

Q11B

SiS892DN

Q11B

SiS892DN

8 7 6 5

OPT

D11B

WURTH-750312504

D11A

OPT

5 6 7 8

Q11A

4

5.1

R11C

G11P

D11F

SBR10U200P5

3 2 1

100V

1210

100V

1210

100V

Q8B

8

0603

100V

470pF

7 6 5

18

1206

5

10

0603

100V

5 6 7 8

6.3V

1210

6.3V

1210

6.3V

1210

D8F

5.1

R11H20R11H

3 1 2 3

2 1

DFLS1100

DFLS260

2 1

3 2 1

3

SiR882DP

R11G20R11G

CMOSH-4E

2 1

D11C

OPT

G8S

5.1

R8F

4

SiS892DN

1 2 3

2 1

D8B

OPT

DFLS1100

WURTH-750312504

OPT

D8A

DFLS260

D8A

DFLS260

2 1

3 2 1

4

Q8A

SiR882DP

5.1

R8C

OPT

G8P

SBR10U200P5

3 2 1

C6

I11S

C11H

470pF

20

PLACE RC CLOSE TO LTC3300

4

2 1

0.016

RS11B

RS11A

0.008

2 1

4

20

C11G

2.2nF

I11P

PLACE RC CLOSE TO LTC3300

C10

I8S

20

R8H20R8H

3

RS8B

RS8A

3

20

R8G20R8G

CMOSH-4E

2 1

D8C

C8G

I8P

C10R

2.2uF

C10R

2.2uF

1210

C10S

2.2uF

C10S

2.2uF

1210

OPTOPT OPT

C10T

2.2uF

C10T

2.2uF

C10F

470pF

R10B181206

OPT

TOP6_TS

674

T10

129

C10E

R10A

OPT

C10C

100uF

C10B

100uF

1210

C10A

100uF

C10

C6

C8H

470pF

4

2 1

0.016

0.008

2 1

4

2.2nF

PLACE RC CLOSE TO LTC3300 PLACE RC CLOSE TO LTC3300

C7

470pF

20

1210

6.3V

100V

6.3V

0603

100V

1206

TOP6_TS

C7

R10F

Q10B

SiS892DN

Q10B

SiS892DN

8 7 642 5

5

WURTH-750312504

10

5 642 7 8

R10C

D10F

SBR10U200P5

C7R

2.2uF

C7S

OPT

2.2uF

C7T

OPT

2.2uF

C7F

OPT

R7B

OPT

674

T7

129

C7E

C7C

OPT

C7B

C7A

G10S

5.1

OPT

D10B

DFLS1100

OPT

D10A

DFLS260

D10A

DFLS260

Q10A

5.1

G10P

3 2 1

1210

470pF

18

20

R7A

1210

100uF

1210

100uF

1210

100uF

1

3

2 1

3

1

SiR882DP

CMOSH-4E

OPT

D10C

100V

0603

100V

1206

5

10

470pF

100V

0603

470pF

100V

0603

1206

6.3V

I10S

C10H

20

R10H20R10H

4

3

RS10B

0.008

RS10A

4

3

20

R10G20R10G

2 1

C10G

I10P

R7F

Q7B

SiS892DN

8 7 642 5

OPT

WURTH-750312504

OPT

5 642 7 8

R7C

D7F

SBR10U200P5

3 2 1

C6

Milpitas, CA 95035

1630 McCarthy Blvd.

Milpitas, CA 95035

1630 McCarthy Blvd.

Milpitas, CA 95035

1630 McCarthy Blvd.

470pF

PLACE RC CLOSE TO LTC3300

2 1

0.016

APPROVALS

2 1

2.2nF

CUSTOMER NOTICE

PLACE RC CLOSE TO LTC3300

C9

G7S

I7S

5.1

5.1 20

R7H20R7H

3

1

3

RS7B

2 1

D7B

DFLS1100

D7A

DFLS260

D7A

DFLS260

2 1

RS7A

3

1

3

Q7A

20

R7G20R7G

SiR882DP

5.1

CMOSH-4E

2 1

D7C

OPT

I7P

G7P

www.linear.com

Fax: (408)434-0507

Phone: (408)432-1900

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Phone: (408)432-1900

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Phone: (408)432-1900

LTC Confidential-For Customer Use Only

TECHNOLOGY

NC

PCB DES.

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

C - C

SHEET OF

DEMO CIRCUIT 2064A

LTC3300ILXE-1 / LTC6803IG-2

HIGH EFFICIENCY BIDIRECTIONAL

MULTICELL BATTERY BALANCER

1 - 11 - 13

IC NO. REV.

SCHEMATIC

N/A

SIZE

DATE:

SIZE

DATE:

SIZE

DATE:

TITLE:

J. DREW

SCALE = NONE

APP ENG.

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

N-1

-

N

2.5A

2.5V - 4.5V

1

BATTERY CELL VOLTAGES

C7H

470pF

C7H

470pF

4

2 1

PLACE RC CLOSE TO LTC3300

0.016

C6

0.008

2 1

4

C7G

2.2nF

PLACE RC CLOSE TO LTC3300

Figure 39. Schematic Diagram Page 2

F147A1210

100V

2.2uF

1210

2.2uF

1210

C12R

OPT

2.2uF

100V

C12S

1210

C12S

1210

OPTOPT

100V

1210

C12T

2.2uF

C12F

0603

100V

470pF

OPT

R12B181206

TOP6_TS

674

T12

129

TOP6_TS

470pF

100V

470pF

100V

C12E

20

1206

R12A

OPT

6.3V

C12C

100uF

C12C

100uF

1210

6.3V

C12B

100uF

C12B

100uF

1210

C12A

1210

6.3V

1210

6.3V

100uF

C12

C9R

2.2uF

1210

2.2uF

1210

100V

1210

100V

C9S

2.2uF

C9S

2.2uF

OPT

C9T

1210

C9T

1210

OPT

2.2uF

100V

C9F

OPT

674

T9

129

C9E

OPT

C9C

C9B

C9A

470pF

R9B181206

470pF

20

R9A

1210

100uF

1210

100uF

1210

100uF

100V

1206

6.3V

TOP6_TS

C9

26

dc2064afa

schematic Diagrams

1

A

35

D5

CMMSH2-40

R6

6.8

2 1

21

OPT

0

R42

D20

CMMSH2-40

C18

10V

0603

0.22uF

C4

0402

0.1uF

10V

TOP6_TS

R13

845k

0805

1

R5

BSS123W

1M

2

WDTC

E20

WDTC

3

Q14

D24

CMOSH-4E

2 1

VREG2

C6

C3

4.7uF

16V

1210

0603

C21

16V

1.0uF

C11

C12

*

C34

10uF

10V

0805

0

R46

C27

2512

4.7uF

16V

0603

C12K

1.0uF C11K

1.0uF

G11P

G12P

I12P

36

35

C5

I6P

G5P

37

G6P

38

C6

39

BOOST+

40

BOOST-

41

BOOST

42

SDOI

43

SCKO

44

CSBO

45

VMODE

46

TOS

47

VREG

48

G6S1I6S2G5S3I5S4G4S5I4S6G3S7I3S8G2S9I2S10G1S11I1S

GND

49

C6

G12S

I12S

DEMO MANUAL DC2064A

1

C8

C9

C10

C28

16V

1210

4.7uF

0

2512

I5P

G11S

R44

1210

0

R50

C29

4.7uF

1210

2512

16V

0603

I11P

33

C4

I11S

C10K

16V

C9K

0603

1.0uF

16V

0603

1.0uF

I9P

I10P

G10P

G9P

27

30

29

32

28

31

C3

I3P

I4P

G3P

G4P

G8S

I9S

G10S

I10S

G9S

16V

34

C7

*

www.linear.com

C5

1210

4.7uF

16V

4.7uF

C31

1210

C7K

1.0uF

24

23

22

C6

21

WDTC

20

19

18

17

16

15

14

13

LTC3300ILXE-1

C32

1210

16V

0603

G7P

I7P

D16

R10

20.5k R11

15.4k

R9

15.4k

Note: These capacitors are not installed on demo board *

OPT

RS07J

1 2

12

R12

D8

RS07J

D7

RS07J

12

D6

RS07J

0

OPT

C6

0

R43

2512

C30

16V

4.7uF

16V

C8K

0603

1.0uF

G8P

I8P

26

25

C2

I2P

C1

G2P

G1P

I1P

V-

WDT

SDO

SDI

SCKI

CSBI

CTRL

RTONP

RTONS

12

U2

G7S

I8S

I7S

www.linear.com

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

APPROVALS

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

C6

1

SHEET OF

LTC Confidential-For Customer Use Only

DEMO CIRCUIT 2064A

LTC3300ILXE-1 / LTC6803IG-2

HIGH EFFICIENCY BIDIRECTIONAL

MULTICELL BATTERY BALANCER

TECHNOLOGY

1 - 11 - 13

IC NO. REV.

SCHEMATIC

N/A

SIZE

DATE:

SIZE

DATE:

SIZE

DATE:

TITLE:

NC

J. DREW

SCALE = NONE

PCB DES.

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

SCALE = NONE

APP ENG.

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

Q17

CMPDM8002A

2

3

1

R53

100k

C7

R54

R51

D22

CMHZ4689

Q16

CMPT3904E

2 3

2 1

R52

20

D25

0603

PDZ5.6B

2 1

C6

1

Q15

2.0k

D26

PDZ5.6B

2 1

3 2

CMPT3906E

C5

21

D23

R14

CMOSH-4E

845k

BOT6_TS

0805

3

Q13

1

BSS123W

C2

D1

C6

CMMSH2-40

2 1

R4

6.8

0

R45

21

R41

D19

CMMSH2-40

C19

10V

0.22uF

C2

10V

0.1uF

1M

R1

R3

WDTA

VREG1

0

C1

4.7uF

C20

1.0uF

2

E19

2512

OPT

0

C6K

16V

1.0uF

0603

G6P

I6P

37

38

39

40

41

42

0402

43

44

45

46

47

48

OPT

R2

0

V-

16V

1210

16V

0603

C4

C5

C22

4.7uF

0603

C5K

1.0uF

G5P

36

35

C5

I6P

G5P

G6P

C6

BOOST+

BOOST-

BOOST

SDOI

SCKO

CSBO

VMODE

TOS

VREG

G6S1I6S2G5S3I5S4G4S5I4S6G3S7I3S8G2S9I2S10G1S11I1S

GND

49

G6S

I6S

C3

0

R48

C23

16V

1210

4.7uF

0

1210

16V

R47

2512

C24

16V

4.7uF

16V

C4K

0603

1.0uF

16V

0603

I5P

33

34

I5P

G5S

16V

C3K

1.0uF

G3P

I4P

G4P

30

29

32

28

31

C3

C4

I4P

G3P

G4P

I5S

I3S

G4S

I4S

G3S

2512

1210

0603

I3P

27

I3P

G2S

C1

C25

16V

1210

4.7uF

0

R49

2512

C26

16V

1210

4.7uF

*

C2K

16V

0603

1.0uF

I2P

G2P

26

25

C2

I2P

G2P

12

I1S

G1S

I2S

C1

24

G1P

23

I1P

22

V-

21

WDT

20

SDO

19

SDI

18

SCKI

17

CSBI

16

CTRL

15

RTONP

14

RTONS

13

U1

LTC3300ILXE-1

0805

10uF

10V

C33

C1K

16V

0603

1.0uF

G1P

V-

WDTA

SDII

CSBI

R8

20.5k

R7

15.4k

V-

1

R55

C6

20

0603

D21

CMHZ4689

2.0k

1

Figure 40. Schematic Diagram Page 3

I1P

SDO

SCKI

dc2064afa

27

DEMO MANUAL DC2064A

1

A

45

schematic Diagrams

C4S+1C4+2C5S-

J8

179314000_SC

3

C4

E5C4E5

J12

C8S+1C8+2C9S-

3

E10C8E10

179314000_SC

1

www.linear.com

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

TECHNOLOGY

NC

APPROVALS

PCB DES.

C12

179313000_SC

C12

E14

C12_CLAMPED

C8

C12S+1C12+

J16

2

SHEET OF

DEMO CIRCUIT 2064A

LTC3300ILXE-1 / LTC6803IG-2

HIGH EFFICIENCY BIDIRECTIONAL

MULTICELL BATTERY BALANCER

1 - 11 - 13

IC NO. REV.

SCHEMATIC

N/A

SIZE

DATE:

SIZE

DATE:

SIZE

DATE:

TITLE:

J. DREW

SCALE = NONE

APP ENG.

1210

J11

1210

F5

C7S+1C7+2C8S-

C6S+1C6+2C7S-

3

C5S+1C5+2C6S-

3

C5

D6E

3

179314000_SC

7A

PDZ7.5B

2 1

1210

F8

179314000_SC

1210

F7

1210

F6

C5_FILTER

D5E

C7 C8

C6

PDZ7.5B

2 1

7A

C4_Filter

E13

E12

E11C9E11

D4E

C11

C10

C9

PDZ7.5B

2 1

C3_FILTER

D3E

J15

J14

J13

PDZ7.5B

C11S+1C11+2C12S-

3

C10S+1C10+2C11S-

3

C9S+1C9+2C10S-

3

1210

F9

C9

C2_FILTER

2 1

179314000_SC

7A

C1_FILTER

D2E

PDZ7.5B

D2E

PDZ7.5B

2 1

1210

7A

F4

C3S+1C3+2C4S-

J7

3

C2S+1C2+2C3S-

J6

3

C1S+1C1+2C2S-

3

F1

1210

C1

C10_FILTER

D10E

179314000_SC

7A

C9_FILTER

PDZ7.5B

2 1

F4

E9C7E9

C7

1210

7A

F3

E18C6E18

E7C6E7

C6

1210

7A

F2

C2 C3 C4

C8_FILTER

PDZ7.5B

D8E

D9E

PDZ7.5B

D9E

PDZ7.5B

2 1

E6C5E6

C7_FILTER

2 1

J10

C6

C5

J9

C6_FILTER

D7E

PDZ7.5B

D7E

PDZ7.5B

2 1

E4C3E4

C3

E3C2E3

C2

E2C1E2

C1S-1C1-

J4

2

E1V-E1

V-

C12_FILTER

D12E

179313000_SC

1210

F15

V-

C11_FILTER

PDZ7.5B

2 1

C1

J5

7A

D11E

PDZ7.5B

D11E

PDZ7.5B

2 1

C12_CLAMPED

1210

L1

F12

1210

F11

C11

1210

F10

C10 C12

1206L11206

7A

C12

7A

C3

D4D

LED-LN

R4J

2.00k

GRN

C2

D3D

LED-LN

R3J

2.00k

GRN

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

D8D

LED-LN

R8J

GRN

D7D

LED-LN

R7J

GRN

LED-LN

D12D

2.00k

GRN

C6

D11D

2.00k

GRN LED-LN

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

C11

1

R12J

2.00k

R12J

2.00k

C10

R11J

2.00k

R11J

2.00k

Figure 41. Schematic Diagram Page 4

C1

D2D

LED-LN

R2J

2.00k

GRN

V-

G1P G2P G3P G4P

D1D

LED-LN

R1J

2.00k

GRN

D1E

PDZ7.5B

D1E

PDZ7.5B

2 1

C5

D6D

LED-LN

GRN

G5P G6P G7P G8P

D5D

LED-LN

GRN

D10D

LED-LN

R6J

R5J

LED-LN

2.00k

C4 C7

2.00k

G9P G10P G11P G12P

R10J

2.00k

GRN

C8 C9

LED-LN

D9D

R9J

2.00k

GRN

C12_FILTER

C12L

0.1uF

0603

100

R12K

C12_CLAMPED

1206

100V

V-

R11K

C11_FILTER

C11L

0.1uF

C11L

0.1uF

0603

100

C11

100V

C10_FILTER

1206

V-

R10K

C10

C10L

C9_FILTER

C8L

0.1uF

C9L

0.1uF

100V

0.1uF

100V

1206

100V

V-

0603

R9K

100

0603

100

R8K

C9

C8

C9

C8

C8_FILTER

28

0.1uF

C6_FILTER

C7_FILTERC7

C7L

0.1uF

C7L

0.1uF

100V

1206

100V

1206

V-

0603

100

R7K

C7

C5_FILTER

C5L

0.1uF

C5L

0.1uF

C6L

0.1uF

100V

C6L

0.1uF

100V

1206

100V

1206

V-

0603

R6K

0603

100

R5K

C5

C6

C5

100V

V-

C4_Filter

1206

R4K

C4

C3_FILTERC1C2_FILTER

C4L

0.1uF

100V

C4L

0.1uF

100V

1206

V-

0603

100

R3K

C3

C3L

0.1uF

C3L

0.1uF

100 0603

C3

C1_FILTER

100V

C2L

1206

0.1uF

C1L

0.1uF

C1L

0.1uF

100V

1206

100V

1206

100V

1206

100V

1206

V-

0603

100

R1K

R2K

C2

V-

0603

100

C1

dc2064afa

schematic Diagrams

1

A

55

TO

DC 590B

INPUT

ABOVE

N/C

J17

1

SDI_590

VCCA2SCK_590

CS_590

5

7

4

6

C15

1uF

0603

1uF

0603

E17

ISOLATED GND

C17

10uf

C17

10uf

+

E16

ISOLATED +5V

SDO_590

25V

10V

OPT

ISOLATION BOUNDARY

N/C

14

PC INPUT

U7

LTM2883CY - 5S

U7

LTM2883CY - 5S

BATTERY STACK

OPT

C16

10uF

+

C14

R24

3.3k

R22

3.3k

GND_DC590

EESDA9EESCLK

GND_DC590

GND_DC5908EEVCC10EEVSS

3

11

13

GND_DC590

B7

B8

A8

VL

VCC

AV+K8V+

L8

10V

V-

0.1uF

R25

3.3k

R23

3.3K

CSBI

12

D15

CMSH3-20MA

AV-K7V-L7AVCC2K6VCC2

L6

HD2X7

2 1

A7

ON

DO2A2DO1

U6

N/C

VCCA2SCK_590

J18

1

6

R35

GND_DC590

B1

A6

A5

SDOE

L5

1

1A

74LVC3G07U674LVC3G07

VCC

8

1Y

7

CS_590

7

R36

100

A4

CS

CS2

L4

3

2A

2Y

5

SDI_590

4

100

R37

A3

SDI

SDI2

L3

6

2

FROM

SCK

SCK2

3A

3Y

SDO_590

5

R38

100

A1

SDO

SDO2

L1

DC 590BORBOARD

N/C

14

100

GND

4

BELOW

GND_DC590

GND_DC5908EEVCC10EEVSS

3

13

GND_DC590

ISOLATED GND PLANE

GND

B2

GND

B3

GND

B4

GND

B5

GND

B6

C13

C5

GND2

K2

GND2

K3

GND2

K4

GND2

K5

I2L2I1

K1

V-

SDO

DEMO MANUAL DC2064A

1

www.linear.com

470pF

R40

5.1k

HD2X7

EESDA9EESCLK

11

12

OPT

2010

2010R33

2010

1808

R34

R31

R33

R32

5.1k

R39

6

5

7

WP

Vcc

SDA

8

SCLK

A0

A23Vss

A1

U3

C7

0.1uF

25V

SERIAL EEPROM

1

4

2

0603C70.1uF

0603

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

TECHNOLOGY

NC

APPROVALS

PCB DES.

V-

IF U7 IS NOT INSTALLED: DO NOT

INSTALL U6, R22 -R25. INSTALL R31 -

R34. REPLACE C5 AND C13 WITH ZERO

OHM RESISTOR.

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

www.linear.com

SHEET OF

DEMO CIRCUIT 2064A

LTC3300ILXE-1 / LTC6803IG-2

DEMO CIRCUIT 2064A

LTC3300ILXE-1 / LTC6803IG-2

DEMO CIRCUIT 2064A

LTC3300ILXE-1 / LTC6803IG-2

HIGH EFFICIENCY BIDIRECTIONAL

MULTICELL BATTERY BALANCER

1 - 11 - 13

IC NO. REV.

SCHEMATIC

N/A

SIZE

DATE:

SIZE

DATE:

SIZE

DATE:

TITLE:

J. DREW

SCALE = NONE

APP ENG.

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

U5C

MM74HC00

1M

JP2JP2

MM74HC00

14

7

0

1M

R171MR17

E23

MM74HC00

8

VREG

7

U5A

MM74HC00

9

10

0

R200R20

R210R21

E22

GPIO2

V-

3

V-

14

7

2

U5B

14

4

43

SDO

C12_FILTER

6

5

42

SDI

MM74HC00

7

41

40

SCKI

C11_FILTER

SDII

C10_FILTER

1

0

0.1uFC80.1uF

C8

V-

GPIO1

44

CSBI

V+1C122S123C114S115C106S107C98S99C810S811C712S713C614S615C516S517C418S419C320S321C2

U8

LTC6803IG-2

36

A037A138A239A3

C9_FILTER

GPIO1

34

GPI0135GPI02

C8_FILTER

WDTB

SCKI

32

33

NC

C7_FILTER

TOS

VREG

31

30

VREG

C6_FILTER

VREF

R27

28

29

VTEMP1

VTEMP2

C5_FILTER

TEMP11PIN2TEMP2

J1

TEMP1

100

R28

10k

R28

10k

2

-IN A

+IN A

LT6004CMS8

3

U4

C9

25V

OPT

0603

V-

26

25

27

V-

S1

NC

C3_FILTER

C4_FILTER

1

7

OUT A

V-

C1_FILTER

24

23

C1

22

3

V-

TEMP2

R29

10k

R29

10k

6

-IN B

OUT B

+IN B

5

S2

C2_FILTER

DF3-3P-2DSA

VREG

C11

1uF

8

V+

GND

25V

C12

1uF

C12

1uF

1

100

R30

25V

0603

V-

4

0603

R26

V-

C10

OPT

0603

25V

C10

OPT

0603

25V

C6

1206

C6

1206

0.1uF

100V

0.1uF

100V

100

D14

CMHZ5265B

2 1

V-

2 1

V-

D13

BAT46W

2 1

D12

BAT46W

C12_CLAMPED

Figure 42. Schematic Diagram Page 5

11

U5D

14

12

13

0

R180R18

R190R19

VREG

E21

WDTB

R161MR16

1M

R151MR15

JP4JP4JP3JP3

A0

0

11

A1

1

0

A2

0

JP1JP1

A3

1

0

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29

DEMO MANUAL DC2064A

pcB layout

30

Figure 43. Top Silk Screen

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pcB layout

DEMO MANUAL DC2064A

Figure 44. Bottom Silk Screen

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31

DEMO MANUAL DC2064A

pcB layout

32

Figure 45. Layer 1

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pcB layout

DEMO MANUAL DC2064A

Figure 46. Layer 2

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33

DEMO MANUAL DC2064A

pcB layout

34

Figure 47. Layer 3

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pcB layout

DEMO MANUAL DC2064A

Figure 48. Layer 4

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35

DEMO MANUAL DC2064A

parts list

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

Required Circuit Components

1 24 C1A-C12A, C1B-C12B CAP.,X5R, 100µF, 6.3V,10%, 1210 MURATA, GRM32ER60J107ME20L 2 12 C1G-C12G CAP.,X7R, 2200pF, 50V, 10% 0402 MURATA, GRM155R71H222KA01D 3 12 C1H-C12H CAP.,X7R, 470pF, 50V, 10% 0402 MURATA, GRM155R71H471KA01D 4 12 C1R-C12R CAP.,X7R, 2.2µF, 100V,10%, 1210 TDK, C3225X7R2A225K 5 14 C1K-C12K, C20,C21 CAP.,X7R, 1.0µF, 16V,10%, 0603 MURATA, GRM188R71C105KA12D 6 4 C2, C4, C8, C14 CAP, X7R, 0.1µF, 16V, 10% 0402 MURATA, GRM155R71C104KA88D 7 1 C7 CAP.,X7R, 0.1µF, 25V,10%, 0603 AVX, 06033C104K AT2A 8 3 C11, C12, C15 CAP.,X5R, 1µF, 25V,10%, 0603 TDK, C1608X5R1E105K

9 2 C18, C19 CAP.,X7R, 0.22µF, 10V,10%, 0603 MURATA, GRM188R71A224KA01 10 2 D23, D24 SMD, SCHOTTKY, SOD523 CENTRAL SEMI, CMOSH-4E 11 4 D1, D5, D19.D20 SMD, SCHOTTKY, SOD-123F CENTRAL SEMI, CMMSH2-40 12 3 D6, D7, D8 SMD, SILICON SWITCHING DIODE VISHAY, RS07J 13 12 D1E-D12E DIODE, ZENER, 7.5V, 400MW, SOD323 NXP, PDZ7.5B.115 14 2 D12, D13 SMD, SCHOTTKY, 200MW, 100V, SOD-12 DIODES INC, BAT46W 15 1 16 17 2 D21, D22 DIODE, ZENER, 5.1V,SOD-123 CENTRAL SEMI, CMHZ4689 18 2 D25, D26 DIODE, ZENER, 5.6V, 400MW, SOD323 NXP, PDZ5.6B.115 19 12 D1F-D12F DIODE, SUPER BARRIER RECTIFIER, 10A, POWERDI5 DIODES INC, SBR10U200P5 20 24 R1C-R12C, R1F-R12F RES,CHIP, 5.1Ω, 1/16W, 5%, 0402 VISHAY, CRCW04025R10JNED 21 2 R4, R6 RES,CHIP, 6.8Ω, 1/16W, 5%, 0402 VISHAY, CRCW04026R80JNED 22 24 R1G-R12G, R1H-R12H RES,CHIP,20Ω,1/16W,5%,0402 VISHAY, CRCW040220R0JNED 23 7 R26, R27, R30, R35-R38 RES,CHIP,100Ω,1/16W,5%,0402 VISHAY, CRCW0402100RJNED 24 5 R1, R5, R15-R17 RES,CHIP, 1.00M, 1/16W, 5%, 0402 VISHAY, CRCW04021M00JNED 25 2 R13, R14 RES, CHIP, 845k, 1/8W, 1%, 0805 VISHAY, CRCW0805845KFKEA 26 3 R7, R9, R11 RES, CHIP, 15.4k, 1/16W, 1%, 0402 VISHAY, CRCW040215K4FKED 27 2 R8, R10 RES, CHIP, 20.5k, 1/16W, 1%, 0402 VISHAY, CRCW040220K5FKED 28 2 R51, R52 RES,CHIP,2.0k,1/16W,5%,0402 VISHAY, CRCW04022K00JNED 29 2 R39, R40 RES, CHIP, 5.1k, 1/16W, 5%, 0402 VISHAY, CRCW04025K10JNED 30 2 R28, R29 RES, CHIP, 10.0k, 1/16W, 5%, 0402 VISHAY, CRCW040210K0JNED 31 1 R53 RES, CHIP, 100k, 1/16W, 5%, 0402 VISHAY, CRCW0402100KJNED 32 2 R54, R55 RES, CHIP, 20Ω, 1/16W, 5%, 0603 VISHAY, CRCW060320R0JNED 33 12 RS1A-RS12 34 12 RS1B-RS12B RES, CHIP, 16mΩ, 1W, 1%, 1206 SUSUMU, PRL1632-R016-F-T1 35 36 12 Q1B-Q12B MOSFET, 100V, 0.058Ω, 25A, POWERPAK-1212-8 VISHAY, SiS892DN-T1-GE3 37 2 Q13,Q14 MOSFET, 100V, 10Ω, SOT-323 DIODES INC, BSS123W-7-F 38 1 Q15 TRANSISTOR,PNP, 60V SOT-23 CENTRAL SEMI, CMPT3906E 39 1 Q16 TRANSISTOR, NPN, 60V SOT-23 CENTRAL SEMI, CMPT3904E 40 1 Q17 MOSFET, P-CHAN, 50V, 4Ω,SOT-23 CENTRAL SEMI, CMPDM8002A 41 12 T1-T12 TRANSFORMER, 1:1, 3.0µH, 10.8A WURTH, 750312504 42 2 U1,U2 IC, SMT, BIDIRECTIONAL BATTERY BALANCER LINEAR, LTC3300ILXE-1#PBF 43 1 U3 IC, EEPROM 2KBIT, 400KHZ, 8TSSOP MICROCHIP TECH. 24LC025-I/ST 44 1 U4 IC, SMT, OP AMP LINEAR, LT6004IMS8#PBT 45 1 U5 IC, GATE NAND QUAD 2-PIN 14-SO FAIRCHILD, MM74HC00M 46 1 U8 IC, SMT, BATTERY MONITOR LINEAR, LTC6803IG-2#PBF

D14 SMD D15 SMD, SCHOT

1

A RES, CHIP, 8mΩ, 1W, 1%, 1206 SUSUMU, PRL1632-R008-F-T1

12 Q1A-Q12A MOSFET, 100V, 0.0087Ω, 60A, POWERPAK-SO8 VISHAY, SiR882DP-T1-GE3

, SILICON ZENER, 62V CENTRAL SEMI, CMHZ5265B

TKY CENTRAL SEMI, CMSH3-20MA

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36

DEMO MANUAL DC2064A

parts list

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

Components and Hardware for Demo Board Only

1 12 C1E-C12E CAP.,X7R, 470pF, 100V,10%, 0603 AVX, 06031C471KAT2A

2 12 C1, C3, C22-C31 CAP.,X7R, 4.7µF, 16V,20%, 1210 TDK, C3225X7R1C475M

3 13 C1L-C12L, C6 CAP., X7R, 0.1µF, 100V, 10%, 1206 AVX, 12061C104KAT2A

4 2 C5, C13 CAP., X7R, 470pF, 250VAC, 10%, 1808 MURATA, GA342QR7GF471KW01L

5 12 D1D-D12D LED,GREEN CLEAR 0603 SMD LITE-ON, LTST-C190KGKT

6 15 F1-F15 FUSE, 7A, FAST, SMD, 1206 COOPER BUSSMANN, 3216FF7-R

7 1 L1 IND, FERRITE CHIP 33Ω, 6A, 1206 MURATA, BLM31PG330SN1L

8 12 R1A-R12A RES, CHIP, 20Ω, 1/4W, 5%, 1206 VISHAY, CRCW120620R0JNEA

9 12 R1K-R12K RES, CHIP, 100Ω, 1/16W, 5%, 0603 VISHAY, CRCW0603100RJNED 10 4 R22-R25 RES, CHIP, 3.3k, 1/16W, 5%, 0402 VISHAY, CRCW04023K30JNED 11 8 R43-R50 RES, CHIP, 0Ω, 2512 VISHAY, CRCW25120000Z0EG 12 12 R1J-R12J RES, CHIP, 2.0k, 1/16W, 5%, 0402 VISHAY, CRCW04022K00JNED 13 18 E1-E18 TP, TURRET, 0.094", PBF MILL-MAX, 2501-2-00-80-00-00-07-0 14 5 E19-E23 TURRET, 0.061 DIA MILL-MAX, 2308-2-00-80-00-00-07-0 15 2 J17,J18 CONN, HEADER, 14POS 2mm VERT GOLD MOLEX 87831-1420 16 1 J1 CONN, HEADER, 3POS, 2.5mm STR TIN HIROSE, DF1EC-3P-2.5DSA(05) 17 1 J1 (MATE) CONN, RECEPT HOUSING, 3POS 2.5mm HIROSE, 18 3 J1 (MATE CONTACT) CONT 19 4 JP1-JP4 HEADER, 3PINS, 2mm SAMTEC, TMM-103-02-L-S 20 4 JP1-JP4 SHUNT 2mm SAMTEC, 2SN-BK-G 21 1 U6 IC,SMT, TRIPLE BUFFER TI, SN74LV C 3G07DCTR 22 1 U7 IC,SMT,5V, SPI ISOLATER _ODULE LINEAR, LTM2883CY-5S#PBF 23 5 MH1-MH5 STAND-OFF, NYLON, 0.500" TALL (SNAP ON) KEYSTONE, 8833 (SNAP ON)

Optional Components

1 0 C1C-C12C CAP., X5R, 100µF, 6.3V,10%, 1210 MURATA, GRM32ER60J107ME20

2 0 C1F(OPT)-C12F(OPT) CAP., X7R, 470pF, 100V,10%, 0603 AVX, 06031C471KAT2A

3 0 C1S-C12S, C1T-C12T CAP., X7R, 2.2µF, 100V,10%, 1210 TDK, C3225X7R2A225K

4 0 C5, C13 RES, CHIP, 0Ω, 2010 VISHAY, CRCW20100000Z0EF

5 0 C9(OPT), C10(OPT) CAP, OPT, 25V, 0603

6 0 C16, C17 CAP., TANT, 10µF, 10V, 20%. 1206 AVX, TAJA106M010RNJ

7 0 D1A-D12A SMD, SCHOTTKY BARRIER RECTIFIER 2A, 60V, PWRD123 DIODES INC, DFLS260

8 0 D1B-D12B (OPT) SMD, SCHOTTKY BARRIER RECTIFIER, 1A, 100V, PWRD123 DIODES INC, DFLS1100-7

9 0 D1C-D12C (OPT) SMD, SCHOTTKY, SOD-523 CENTRAL SEMI, CMOSH-4E 10 0 D16(OPT) SMD, SILICON SWITCHING DIODE VISHAY, RS07J 11 0 R1B 12 0 13 0 R31-R34 (OPT) RES, CHIP, 0Ω, 2010 VISHAY, CRCW20100000Z0EF 14 0 J2-J4,J16 (OPT) HEADER, 1x2, 2-PIN, 3.81mm, 90 DEG WEIDMULLER, 1793130000 15 0 J2(OPT) (MATE) SOCKET, 1x2, 2-PIN, 3.81mm, 180 DEG WEIDMULLER, 1792770000 16 0 J5-J15 (OPT) HEADER, 1x3, 3-PIN, 3.81mm, 90 DEG WEIDMULLER, 1793140000 17 0 J5-J15 (OPT) SOCKET, 1x3, 3-PIN, 3.81mm, 180 DEG WEIDMULLER, 1792780000

-R12B (OPT) RES, CHIP, 18Ω, 1/4W, 5%, 1206 VISHAY, CRCW120618R0JNEA

R3, R12, R41, R42 (OPT) RES, CHIP, 0Ω, 0402 VISHAY, CRCW04020000Z0ED

ACT, SOCKET, CRIMP 20-22AWG, TIN HIROSE, DF1E-2022SCF

DF1E-3S-2.5C

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

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37

DEMO MANUAL DC2064A

DEMONSTRATION BOARD IMPORTANT NOTICE

Linear Technology Corporation (LT C ) provides the enclosed product(s) under the following AS IS conditions:

This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LT C for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.

If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LT C from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.).

No License is granted under any patent right or other intellectual property whatsoever. LT C assumes no liability for applications assistance,

customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.

LT C currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.

Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and

observe good laboratory practice standards. Common sense is encouraged.

This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer.

Mailing Address:

Linear Technology

1630 McCarthy Blvd.

Milpitas, CA 95035

Linear Technology Corporation

38

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

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LT 0315 REV A • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 2013