Linear LTC4316 Demo Manual
Description
Demonstration circuit 2217A features the LTC®4316 single
2
C/SMBus address translator. The LTC4316 enables one
I
or more I
hardwired address to a different address. This allows
slaves with the same address to coexist on the same
bus. Only discrete resistors are needed to select the new
address and no software programming is required. Up to
127 different translations are available.
The LTC4316 has a rich set of features including:
n
Allowing Multiple Slaves with the Same Address to
Coexist on the Same Bus.
n
Resistor Configurable Address Translating
n
Compatibility with SMBus, I2C and I2C Fast Mode
n
Pass-Through Mode for General Call Addressing
n
Level Translation for 2.5V, 3.3V, and 5V Buses
n
Stuck Bus Timeout
n
Prevention of SDA and SCL Corruption During Live
Board Insertion and Removal
2
C or SMBus slave devices to translate their
DEMO MANUAL DC2217A
LTC4316
Single I
2
C/SMBus
Address Translator
n
Support for Bus Hot Swap™
n
10-Lead MSOP or DFN 3mm × 3mm Package
The LTC4316 incorporates a pass-through mode which
disables the address translating and allows general call
addressing by the master. The LTC4316 is designed to
automatically recover from abnormal bus conditions like
bus stuck low or premature stop bits. There are three LT C
parts in this family with different numbers of inputs and
outputs. The part numbers are as follows:
PART NUMBER NUMBER OF INPUT
CHANNELS
LTC4316 1 1
LTC4317 1 2
LTC4318 2 2
DC2217A demonstrates only the LTC4316. The other parts
provide similar functions with differences listed in their
respective data sheets.
Design files for this circuit board are available at
http://www.linear.com/demo/DC2217A
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot
Swap and QuikEval are trademarks of Linear Technology Corporation. All other trademarks are
the property of their respective owners.
NUMBER OF OUTPUT
CHANNELS
dc2217af
1
DEMO MANUAL DC2217A
Quick start proceDure
2
dc2217af
Quick start proceDure
DEMO MANUAL DC2217A
OVERVIEW
The DC2217A is designed to demonstrate the ability of
2
the LTC4316 to offset an incoming I
2
the SDAIN pin to any other I
2
pin. The I
C data input to the card is generated from the
C address on the SDAOUT
C address field on
DC590 in conjunction with a PC.
This is implemented by EXCLUSIVE ORing the input address
with a fixed offset that is determined by resistors R8, R9,
R12, and R13, located on the OFFSET RESISTORS section
on the top center of the board. These resistor values are
selected by using values shown in Table 3 and Table 4 of
the LTC4316 data sheet.
2
Input I
C serial data (SDAIN) and serial clock (SCLIN) are
applied to the DC2217A via a connecting cable between a
DC590 USB SERIAL CONTROLLER and IN jack J1 of the
DC2217A. These incoming signals are connected to SCLIN
and SDAIN of the LTC4316 (U1), as well as to the SCL
and SDA pins of U2, an LTC2631 DAC. Another LTC2631
DAC, U3, has its SCL and SDA connected to SDAOUT
and SCLOUT of the LTC4316 TRANSLATOR. Both DACs
can be programmed to one of
three addresses
by use of
their CA0 inputs. These addresses are selected by jumper
pins ADDRESS (THRU) and ADDRESS (TRANSLATED).
For the purposes of testing the board, both are selected
to respond to address 0x12h.
If both DACs were connected to SDAIN and SCLIN, they
would both respond at the same time when address 0x12h
is received. However, since DAC U3 is connected to SD
AOUT and
by
the OFFSET RESISTORS, it will respond to the address
SCLOUT of U1, and U1 is set for a 0x78h offset
-
0x6Ah. The data bits are set to full-scale for the DACs.
The net result is that when address field 0x12h is sent
from the DC590 with data bits set to full-scale, the LED
designated THRU will be illuminated. When address field
0x6Ah is sent, the LED designated TRANSLATED will be
illuminated. This shows that an address translation has
occurred because of the offset programmed into address
translator U1, the LTC4316.
Jumper options VBUS_OUT and DEVICE POWER allow
operation of the LTC4316 at different V
and I2C bus levels
CC
than the 5V supplied from the DC590. With VBUS_OUT
the VBUS_IN position, and DEVICE PWR in the VCC/
in
VBUS_IN
position, all power for V
of U1 and SCLIN,
CC
SDAIN, SCLOUT, and SDAOUT bus pull-up voltages will
be sourced by the DC590. With EXT BUS selected by the
VBUS_OUT jumper and VCC/VBUS_IN selected by the
DEVICE PWR jumper, V
of U1 will be sourced by the
CC
5V from the DC590 along with SCLIN, SDAIN bus pull up
resistors while SCLOUT and SDAOUT will be sourced from
the EXTVBUS turret. With VBUS_OUT jumper in the EXT
BUS position and DEVICE PWR in the VBUS_OUT posi
tion, V
for U1 as well as SCLOUT and SDAOUT will be
CC
-
sourced from the EXTVBUS turret. This gives maximum
2
flexibility of input and output I
C bus levels for use with
external bus structures.
Optional connections allow selection and control of other
QuikEval™ demonstration circuits using the THRU and
TRANSLATED connectors. The EESCL and EESDA lines
from J1 may be configured to address either the onboard
EEPROM U4, or EEPROMs located on other QuikEval
demonstration circuits by using the QuikEval EEPROM
SCL and SDA jumpers. For normal operation, the SCL and
SDA jumpers should
be in the 2217 position.
dc2217af
3
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