Clock Input and Output for Up to 12-Phase Operation
n
Short-Circuit Soft Recovery
n
Output Overvoltage Protection
n
Power Good Output Voltage Monitor
n
40-Lead QFN Packages
APPLICATIONS
n
Servers and Instruments
n
Telecom Systems
n
DC Power Distribution Systems
The LT C®3875 is a dual output current mode synchronous
step-down DC/DC controller that drives all N-channel
synchronous power MOSFET stages. It employs a unique
architecture which enhances the signal-to-noise ratio of
the current sense signal, allowing the use of very low DC
resistance power inductors to maximize the efficiency in
high current applications. This feature also reduces the
switching jitter commonly found in low DCR applications.
The LTC3875 features two high speed remote sense differential amplifiers, programmable current sense limits from
10mV to 30mV and DCR temperature compensation to limit
the maximum output current precisely over temperature.
A unique thermal balancing function adjusts per phase current in order to minimize the
thermal stress for multichip
single output applications. The LTC3875 also features a
precise 0.6V reference with guaranteed accuracy of ±0.5%
that provides an accurate output voltage from 0.6V to 3.5V.
A 4.5V to 38V input voltage range allows it to support a
wide variety of bus voltages. The LTC3875 is available
in a low profile 40-lead 6mm × 6mm (0.5mm pitch) and
40-lead 5mm × 5mm (0.4mm pitch) QFN packages.
L, LT, LT C , LT M, Linear Technology, the Linear logo OPTI-LOOP, Burst Mode and PolyPhase
are registered trademarks and No R
All other trademarks are the property of their respective owners. Protected by U.S. Patents
including 5481178, 5705919, 5929620, 6100678, 6144194, 6177787, 6304066, 6580258.
is a trademark of Linear Technology Corporation.
SENSE
TYPICAL APPLICATION
High Efficiency Dual Phase 1.2V/60A Step-Down Converter
INTV
CC
4.7µF
(OPTIONAL)(OPTIONAL)
THERMAL
SENSOR
0.3µH
(0.32mΩ DCR)
V
OUT
+
470µF
2.5V ×2
SP
INTV
V
RUN1,2
ILIM
ENTMPB
TG1
BOOST1BOOST2
SW1
EXTV
BG1
TAVG
TRSET1
SNSA1
SNS1
SNSD1
TCOMP1
V
V
I
TH1
IN
OSNS1
OSNS1
LTC3875
CC
+
–
+
+
–
TK/SS2TK/SS1
PHASMD
CC
CLKOUT
PGOOD
IFAST
MODE/PLLIN
TG2
SW2
BG2
PGND
TRSET2
SNSA2
SNS2
SNSD2
TCOMP2
FREQ
V
OSNS2
V
OSNS2
I
0.1µF
+
–
+
+
–
TH2
122k
1500pF
15k
For more information www.linear.com/LTC3875
V
6V TO 14V
22µF
16V ×4
THERMAL
SENSOR
0.3µH
(0.32mΩ DCR)
20k
20k
IN
Efficiency and Power Loss
vs Load Current
5060
14
12
POWER LOSS (W)
10
8
6
4
2
0
3875fb
100
12V
IN
1.8V
O
95
~400kHz
CCM
90
85
EFFICIENCY (%)
80
0.32mΩ
75
V
OUT
1.2V
60A
+
470µF
2.5V ×2
SP
3875 TA01a
70
0
203040
10
LOAD CURRENT (A)
1.5mΩ
0.32mΩ PLOSS
1.5mΩ PLOSS
1
LTC3875
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Input Supply Voltage (VIN) ......................... 40V to –0.3V
Topside Driver Voltages
(BOOST1, BOOST2).................................... 46V to –0.3V
Switch Voltage (SW1, SW2)
INTV
, RUN(s), PGOOD, EXTVCC
CC
.......................... 40V to –5V
(BOOST-SW1), (BOOST2-SW2).................... 6V to –0.3V
+
SNSA
SNS
(s), SNSD+(s),
–
(s) Voltages .................................. INTVCC to –0.3V
PIN CONFIGURATION
TOP VIEW
TK/SS1
V
OSNS1
V
OSNS1
V
OSNS2
V
OSNS2
TK/SS2
SNSA2
SNS2
SNSA1+SNS1–SNSD1+TCOMP1/ITEMP1
394038 37 36 35 34 33 32 31
1
+
2
–
3
I
4
TH1
I
5
TH2
+
6
–
7
8
+
9
–
10
12 13 14 15
1120
+
SNSD2
SGND/PGND
TAVG
TRSET2
TRSET1
ILIM
RUN1
41
16 17 18 19
FREQ
RUN2
IFAST
MODE/PLLIN
PHASMD
CLKOUT
SW2
PGOOD
ENTMPB
30
29
28
27
26
25
24
23
22
21
SW1
TG1
BOOST1
BG1
V
IN
INTV
CC
EXTV
CC
BG2
BOOST2
TG2
MODE/PLLIN, ILIM, FREQ, IFAST, ENTMPB
+
V
OSNS(s)
I
TH1
, V
OSNS(s)
, I
, PHASMD, TRSET1, TRSET2,
TH2
TCOMP1, TCOMP2, TAVG Voltages
INTV
Peak Output Current ................................100mA
CC
–
Voltages ...............INTVCC to –0.3V
.......INTVCC to –0.3V
Operating Junction Temperature Range
(Notes 2, 3)
Storage Temperature Range
............................................ –40°C to 125°C
.................. –65°C to 125°C
TOP VIEW
TK/SS1
V
OSNS1
V
OSNS1
V
OSNS2
V
OSNS2
TK/SS2
SNSA2
SNS2
SNSA1+SNS1–SNSD1+TCOMP1/ITEMP1
394038 37 36 35 34 33 32 31
1
+
2
–
3
I
4
TH1
I
5
TH2
+
6
–
7
8
+
9
–
10
12 13 14 15
1120
+
SNSD2
SGND/PGND
TAVG
TRSET2
TRSET1
ILIM
RUN1
41
16 17 18 19
FREQ
RUN2
IFAST
MODE/PLLIN
PHASMD
CLKOUT
SW2
PGOOD
ENTMPB
30
29
28
27
26
25
24
23
22
21
SW1
TG1
BOOST1
BG1
V
IN
INTV
CC
EXTV
CC
BG2
BOOST2
TG2
2
TCOMP2/ITEMP2
40-LEAD (6mm × 6mm) PLASTIC QFN
T
EXPOSED PAD (PIN 41) IS SGND/PGND, MUST BE SOLDERED TO PCB
JMAX
UJ PACKAGE
= 125°C, θJA = 33°C/W, θJC = 2.0°C/W
For more information www.linear.com/LTC3875
TCOMP2/ITEMP2
EXPOSED PAD (PIN 41) IS SGND/PGND, MUST BE SOLDERED TO PCB
40-LEAD (5mm × 5mm) PLASTIC QFN
T
JMAX
UH PACKAGE
= 125°C, θJA = 44°C/W, θJC = 7.3°C/W
3875fb
LTC3875
ORDER INFORMATION
LEAD FREE FINISHTAPE AND REELPART MARKINGPACKAGE DESCRIPTIONTEMPERATURE RANGE
LTC3875EUH#PBFLTC3875EUH#TRPBF387540-Lead (5mm × 5mm) Plastic QFN–40°C to 125°C
LTC3875IUH#PBFLTC3875IUH#TRPBF387540-Lead (5mm × 5mm) Plastic QFN–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
The l denotes the specifications which apply over the specified operating
ELECTRICAL CHARACTERISTICS
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 15V, V
= 5V unless otherwise noted.
RUN1,2
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
Main Control Loops
V
IN
V
OUT
V
OSNS1,2
I
OSNS1,2
V
REFLNREG
V
LOADREG
g
m1,2
+
+
Input Voltage Range4.538V
Output Voltage RangeSNSD+ Pin to V
Regulated V
Feedback Voltage
OUT
Including Diffamp Error
+
SNSD
Pin to GND
(Note 4); I
(Note 4); I
OUT
Voltage = 1.2V, –40°C to 85°C
TH1,2
Voltage = 1.2V,–40°C to 125°C
TH1,2
l
Feedback Current(Note 4)–30–100nA
Reference Voltage Line RegulationVIN = 4.5V to 38V (Note 4)0.0020.005%/V
Output Voltage Load Regulation(Note 4)
Measured in Servo Loop; ∆I
Measured in Servo Loop; ∆I
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 15V, V
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
Linear Regulator
INTV
CC
V
INTVCC
INTINTVCC Load RegulationICC = 0mA to 20mA0.52.0%
V
LDO
V
EXTVCC
EXTEXTVCC Voltage DropICC = 20mA, V
V
LDO
V
LDOHYS
Oscillator and Phase-Locked Loop
f
NOM
f
LOW
f
HIGH
R
MODE/PLLIN
I
FREQ
CLKOUTPhase (Relative to Controller 1)PHASMD = GND
CLK HighClock Output High VoltageV
CLK LowClock Output Low Voltage0.2V
V
MODE/PLLIN Input Resistance250kΩ
Frequency Setting Current9.51010.5µA
PHASMD = FLOAT
PGOOD Voltage LowI
PGOOD Leakage CurrentV
PGOOD Trip Level, Either Controller V
TG Pull-Up R
TG Pull-Down R
BG Pull-Up R
BG Pull-Down R
DS(ON)
DS(ON)
DS(ON)
DS(ON)
PHASMD = INTV
= 5.5V4.55.5V
INTVCC
= 2mA0.10.3V
PGOOD
= 5.5V±2µA
PGOOD
+
with Respect to Set Output Voltage
OSNS
V
OSNS
V
OSNS
TG High2.6Ω
TG Low1.5Ω
BG High2.4Ω
BG Low1.1Ω
CC
+
Ramping Negative
+
Ramping Positive
= 5V unless otherwise noted.
RUN1,2
l
4.54.7V
60
90
120
–7.5
7.5
Deg
Deg
Deg
%
%
Stresses beyond those listed under Absolute Maximum Ratings
Note 1:
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3875 is tested under pulsed load conditions such that
T
≈ TA. The LTC3875E is guaranteed to meet specifications from
J
0°C to 85°C junction temperature. Specifications over the –40°C to
125°
C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3875I is guaranteed over the full –40° to 125° operating junction
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors.
For more information www.linear.com/LTC3875
Note 3: T
dissipation, P
is calculated from the ambient temperature, TA, and power
J
, according to the formula:
D
TJ = TA + (PD • θJA°C/W)
where θ
= 44°C/W for the 5mm × 5mm QFN and θJA = 33°C/W for
JA
the6mm×6mmQFN.
Note 4: The LTC3875 is tested in a feedback loop that servos V
specified voltage and measures the resultant V
OSNS1,2
+
.
ITH1,2
to a
Note 5: Dynamic supply current is higher due to the gate charge being
delivered
at the switching frequency. See Applications Information.
Note 6: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
Note 7: The minimum on-time condition is specified for an inductor
peak-to-peak ripple current ≥40% of I
(see Minimum On-Time
MAX
Considerations in the Applications Information section).
Note 8: Guaranteed by design.
3875fb
5
LTC3875
3875 G01
3875 G02
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Output Current and
Mode (Figure 16 Application Circuit)
100
Burst Mode
90
OPERATION
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
0.01110100
0.1
LOAD CURRENT (A)
CCM
PULSE-SKIPPING
VIN = 12V
V
OUT
= 1.5V
Efficiency vs Output Current and
Mode (Figure 16 Application Circuit)
Maximum Current Sense Threshold
vs Common Mode Voltage
35
CC
CC
CC
1
1.5
2
3875 G11
30
25
20
15
10
5
CURRENT SENSE THRESHOLD (mV)
0
0
V
ILIM = INTV
ILIM = 3/4 INTV
ILIM = 1/2 INTV
ILIM = 1/4 INTV
124
COMMON MODE VOLTAGE (V)
SENSE
CC
CC
CC
CC
ILIM = GND
3
3875 G12
Shutdown (RUN) Threshold
vs Temperature
1.30
1.25
1.20
1.15
1.10
RUN PIN THRESHLD (V)
1.05
50
110
70
90
3875 G14
1.00
–50
ON
OFF
050
TEMPERATURE (°C)
100150
4320 G01
Regulated Feedback Voltage
vs Temperature
0.6045
0.6035
0.6025
0.6015
0.6005
0.5995
0.5985
FEEDBACK VOLTAGE (V)
0.5975
0.5965
0.5955
–50 –30 –10
10 30 50130
TEMPERATURE (°C)
FREQUENCY (kHz)
70 90 110
3875 G16
For more information www.linear.com/LTC3875
Oscillator Frequency
vs Temperature
900
800
700
600
500
400
300
200
100
0
–50
V
0
TEMPERATURE (°C)
FREQ
V
V
FREQ
FREQ
= INTV
= 1.22V
= GND
50
CC
100
150
3875 G17
3875fb
7
LTC3875
3875 G22
TYPICAL PERFORMANCE CHARACTERISTICS
Undervoltage Lockout Threshold
(INTVCC) vs Temperature
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
UVLO THRESHOLD (V)
3.4
3.2
3.0
–50
RISING
FALLING
0
50
TEMPERATURE (°C)
100
3875 G18
150
Oscillator Frequency
vs Input Voltage
900
V
800
700
600
500
400
300
200
OSCILLATOR FREQUENCY (kHz)
100
0
0
10
= INTV
FREQ
V
FREQ
V
FREQ
INPUT VOLTAGE (V)
= 1.22V
= GND
20
CC
30
40
3875 G19
Shutdown Current
vs Input Voltage
50
45
40
35
30
25
20
15
SHUTDOWN CURRENT (µA)
10
5
0
0
515
10
INPUT VOLTAGE (V)
20
25
Quiescent Current vs Input
Shutdown Current vs TemperatureVery Low Output Voltage Ripple
50
45
40
35
30
25
20
SHUTDOWN CURRENT (µA)
15
10
–30130
–50
–10
30
50
10
TEMPERATURE (°C)
70
110
90
3875 G21
Voltage without EXTV
8
7
6
5
4
3
2
QUIESCENT CURRENT (mA)
1
0
5
0
10
15
INPUT VOLTAGE (V)
CC
V
OUT
TYPICAL
FRONT PAGE
10mV/DIV
AC-COUPLED
V
OUT
LOW RIPPLE
FIGURE 20
10mV/DIV
AC-COUPLED
VIN = 12V
= 2.5V
V
20
25
30
40
35
OUT
2µs/DIV
35
30
40
3875 G20
3875 G23
8
3875fb
For more information www.linear.com/LTC3875
PIN FUNCTIONS
LTC3875
TK/SS1, TK/SS2 (Pin 1, Pin 8): Output Voltage Tracking
and Soft-Start Inputs. When one channel is configured to
be the master, a capacitor to ground at this pin sets the
ramp rate for the master channel’s output voltage. When
the channel is configured to be the slave, the feedback
voltage of the master channel is reproduced by a resistor
divider and applied to
this pin. Internal soft-start currents
of 1.25µA charge these pins.
V
OSNS1
+
, V
OSNS2
+
(Pin 2, Pin 6): Positive Inputs of Remote
Sensing Differential Amplifiers. These pins receive the
remotely sensed feedback voltage from external resistive
divider across the output. The differential amplifier outputs are connected directly to the error amplifiers’ inputs
internally inside the IC.
V
OSNS1
–
, V
OSNS2
–
(Pin 3, Pin 7): Negative Inputs of Remote Sensing Differential Amplifiers. Connect these pins
to the negative terminal of the output capacitors when
remote sensing is desired. Connect these pins to local
signal ground if remote sensing is not used.
, I
I
TH1
(Pin 4, Pin 5): Current Control Threshold and
TH2
Error Amplifier Compensation Points. The current comparators’ tripping thresholds increase with these control
voltages.
TAVG (Pin 13): Average Temperature Summing Point
. Connect a resistor to ground to sum all currents together for
multi-channels or multi-IC operations when temperature
balancing function is enabled. The value of the resistor
should be the TRSET resistor value divided by the number
of channels in the system. Float this pin if thermal balancing is not used.
FREQ (Pin 15): There is a precision 10µA current flowing
out of this
pin. A resistor to ground sets a voltage which
in turn programs the frequency. Alternatively, this pin can
be driven with a DC voltage to vary the frequency of the
internal oscillator.
IFAST (Pin 17): Programmable Pin for Fast Transient Operation for Channel 2 Only. A resistor to ground programs
the threshold of the output load transient excursion. Float
this pin to disable this function. See the Applications
Information section for more details.
ENTMPB (Pin 18): Enable Pin for Temperature Balancing Function. Ground this pin to enable the temperature
balancing function. Float this pin for normal operation.
PGOOD (Pin 19): Power Good Indicator Output. Open-drain
logic that is pulled to ground when either channel’s output
exceeds ±7.5% regulation window, after the internal 20µs
power bad mask timer expires.
EXTV
Connected to INTV
(Pin 24): External Power Input to an Internal Switch
CC
. This switch closes and supplies the
CC
IC power, bypassing the internal low dropout regulator,
whenever EXTV
on this pin and make sure that EXTV
INTV
(Pin 25): Internal 5.5V Regulator Output. The con-
CC
is higher than 4.7V. Do not exceed 6V
CC
< VIN at all times.
CC
trol circuits are powered from this voltage. Decouple this
pin to PGND with
a minimum of 4.7µF low ESR tantalum
or ceramic capacitor.
(Pin 26): Main Input Supply. Decouple this pin to
V
IN
PGND with a capacitor (0.1µF to 1µF).
BG1, BG2 (Pin 27, Pin 23): Bottom Gate Driver Outputs.
These pins drive the gates of the bottom N-channel
MOSFETs between INTV
and PGND.
CC
BOOST1, BOOST2 (Pin 28, Pin 22): Boosted Floating
Driver Supplies. The (+) terminal of the booststrap capaci-
connect to these pins. These pins swing from a diode
tors
voltage drop below INTV
up to VIN + INTVCC.
CC
TG1, TG2 (Pin 29, Pin 21): Top Gate Driver Outputs. These
are the outputs of floating drivers with a voltage swing
equal to INTV
superimposed on the switch node voltage.
CC
SW1, SW2 (Pin 30, Pin 20): Switch Node Connections to
Inductors. Voltage swing at these pins is from a Schottky
diode (external) voltage drop below ground to V
CLKOUT (Pin 31): Clock Output Pin. Clock output with
phase changeable by PHASMD to enable usage of multiple
LTC3875s in multiphase systems signal swing is from
INTV
to ground.
CC
IN
.
For more information www.linear.com/LTC3875
3875fb
9
LTC3875
PIN FUNCTIONS
PHASMD (Pin 32): Phase Programmable Pin. This pin can
be tied to SGND, INTV
or left floating. It determines the
CC
relative phases between the internal controllers as well
as the phasing of the CLKOUT signal. See Table 1 in the
Operation section for details.
MODE/PLLIN (Pin 33): Forced Continuous Mode, Burst
Mode or Pulse-Skipping Mode Selection Pin and External
Synchronization Input to Phase Detector Pin.
Connect
this pin to SGND to force the IC into continuous mode of
operation. Connect to INTV
to enable pulse-skipping
CC
mode of operation. Leave the pin floating to enable Burst
Mode operation. A clock on the pin will force the IC into
continuous mode of operation and synchronize the internal
oscillator with the clock on this pin. The PLL compensation
network is integrated into the IC
.
RUN1, RUN2 (Pin 34, Pin 16): Run Control Inputs. A volt-
age above 1.22V on either pin turns on the IC. However,
forcing both pins below 1.14V causes the IC to shut down.
There is a 1.0µA pull-up current for both pins. Once the
RUN pin rises above 1.22V, an additional 4.5µA pull-up
current is added to the pin.
ILIM (Pin 35): Current Comparators’ Sense Voltage Range
Input. A resistor divider sets the maximum current sense
threshold to five different levels for the current comparators.
TRSET1, TRSET2 (Pin 36, Pin 14): Input of the Temperature Balancing Circuitries. Connect these pins through
resistors to ground to convert the TCOMP pin voltages
to currents. These currents are then mirrored to pin TAVG
and are added together for all channels. Float this pin if
thermal balancing is
not used.
TCOMP1/ITEMP1, TCOMP2/ITEMP2 (Pin 37, Pin 12):
Input of the Temperature Balancing Circuitries. Connect
these pins to external NTC resistors or temperature sensing
ICs placed near inductors. These pins are used to sense
temperature of each channel and balance the temperature
of the whole system accordingly. When thermal balancing
function is disabled, these pins can be programmed to
compensate the temperature coefficient of the DCR. Con
nect to an NTC (negative tempco) resistor placed near the
output inductor to compensate for its DCR change over
temperature. Floating this pin
disables the DCR temperature
compensation function.
+
SNSD1
, SNSD2+ (Pin 38, Pin 11): DC Current Sense Com-
parator Inputs. The (+) input to the DC current comparator
is normally connected to a DC current sensing network.
Ground these pins to disable the novel DCR sensing
enable normal DCR sensing with five times current limit.
–
, SNS2– (Pin 39, Pin 10): AC and DC Current
SNS1
Sense Comparator Inputs. The (–) inputs to the current
comparators are connected to the output.
+
SNSA1
Comparator Inputs. The (+) input to the AC current com-
, SNSA2+ (Pin 40, Pin 9): AC Current Sense
parator is normally connected to a DCR sensing network.
+
When combined with the SNSD
pin, the DCR sensing
network can be skewed to increase the AC ripple voltage
by a factor of 5.
SGND/PGND (Exposed Pad Pin 41): Signal/Power Ground
Pin. Connect this pin closely to the sources of the bottom N-channel MOSFETs, the (–) terminal of C
the (–) terminal of C
. All small-signal components and
IN
compensation components should connect to this ground.
VCC
-
and
and
10
3875fb
For more information www.linear.com/LTC3875
LTC3875
BLOCK DIAGRAM
FREQ
CLKOUT
IFAST
(CHANNEL 2
ONLY)
ILIM
V
IN
0.6V
REF
0.55V
PLL-SYNC
1
50k
I
THB
SLEEP
–
I
MODE/PLLIN
OSC
+
CMP
–
INTV
+
MODE/SYNC
DETECT
5k
CC
PHASMD
–
+
SLOPE
COMPENSATION
ACTIVE CLAMP
EA
++
(Functional diagram shows one channel only)
EXTV
+
1.22V
CC
4.7V
+
–
F
BURST EN
FCNT
ON
SWITCH
LOGIC
AND
ANTISHOOT-
THROUGH
RUN
OV
RUN
–
+
1.25µA
I
REV
UVLO
–
S
R
TCOMP/ITEMP
TEMPSNS
Q
0.5V
0.6V
–
F
SS
–
+
5.5V
REG
V
IN
+
INTV
CC
BOOST
TG
SW
+
SNSA
–
SNS
BG
PGND
PGOOD
+
0.555V
UV
C
C
B
D
B
C
VCC
–
V
IN
IN
M1
V
OUT
M2
+
+
SNSD
R2
C
OUT
R1
SGND
+
AMP
+
OV
0.66V
–
DIFFAMP
–
SNS
–
+
20k
20k
+
+
V
OSNS
–
–
–
V
OSNS
20k
V
FB
1µA/5.5µA
20k
TCOMP/ITEMP
ENTMPB
30µA
C
ITH
C1
R
C
MIRROR
RUNTK/SS
C
SS
+
AMP
–
TRSET
R
TCOMP
For more information www.linear.com/LTC3875
*n EQUALS THE NUMBER
OF CHANNELS IN PARALLEL
TAVG
+
R
TCOMP
n*
–
REPEAT FOR
MULTICHIP OPERATIONS
g
m
3875 BD
3875fb
11
LTC3875
OPERATION
Main Control Loop
The LTC3875 is a constant frequency, current mode step-
down controller with two channels operating 180° or 240°
out of phase. During normal operation, each top MOSFET
is turned on when the clock for that channel sets the R
latch, and turned off when the main current comparator,
, resets the RS latch. The peak inductor current at
I
CMP
which I
on the I
resets the RS latch is controlled by the voltage
CMP
pin, which is the output of each error amplifier
TH
EA. The remote sense amplifier (DIFFAMP) converts the
sensed differential voltage across the output feedback
resistor divider to an internal voltage (V
SGND. The V
signal is then compared to the internal
FB
) referred to
FB
0.6V reference voltage by the EA. When the load current
increases, it causes
the 0.6V reference, which in turn causes the I
a slight decrease in VFB relative to
voltage
TH
to increase until the average inductor current matches the
new load current. After the top MOSFET has turned off,
the bottom MOSFET is turned on until either the inductor
current starts to reverse, as indicated by the reverse cur-
rent comparator, I
INTV
/EXTVCC Power
CC
, or the beginning of the next cycle.
REV
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTV
When the EXTV
pin is left open or tied to a voltage less
CC
than 4.5V, an internal 5.5V linear regulator supplies INTV
power from V
. If EXTVCC is taken above 4.7V, the 5.5V
IN
regulator is turned off and an internal switch is
connecting EXTV
voltage has to be higher than EXTV
has to come before EXTV
current will flow back to V
to INTVCC. When using EXTVCC, the VIN
CC
voltage at all time and
CC
is applied. Otherwise, EXTVCC
CC
through the internal switch’s
IN
pin.
CC
CC
turned on
body diode and potentially damage the device. Using the
EXTV
pin allows the INTVCC power to be derived from
CC
a high efficiency external source.
Each top MOSFET driver is biased from the floating
bootstrap capacitor, C
, which normally recharges dur-
B
ing each off cycle through an external diode when the top
MOSFET turns off. If the input voltage, V
a voltage close to V
, the loop may enter dropout and
OUT
, decreases to
IN
attempt to turn on the top MOSFET continuously. The
dropout detector detects
this and forces the top MOSFET
off for about one-twelfth of the clock period plus 100ns
every third cycle to allow C
to recharge. However, it is
B
recommended that a load be present or the IC operates
at low frequency during the drop-out transition to ensure
that C
S
Shutdown and Start-Up
is recharged.
B
(RUN1, RUN2 and TK/SS1, TK/SS2 Pins)
two channels of the LTC3875 can be independently
The
shut down using the RUN1 and RUN2 pins. Pulling either
of these pins below 1.14V shuts down the main control
loop for that channel. Pulling both pins low disables both
channels and most internal circuits, including the INTV
regulator. Releasing either RUN pin allows an internal
1µA current to pull up the pin and enable the controller.
Alternatively
, the RUN pins may be externally pulled up
or driven directly by logic. Be careful not to exceed the
absolute maximum rating of 6V on these pins.
The start-up of each channel’s output voltage, V
controlled by the voltage on its TK/SS pin. When the
voltage on the TK/SS pin is less than the 0.6V internal
reference, the LTC3875 regulates the
VFB voltage to the
TK/SS pin voltage instead of the 0.6V reference. This allows the TK/SS pin to be used to program the soft-start
period by connecting an external capacitor from the TK/SS
pin to SGND. An internal 1.25µA pull-up current charges
this capacitor, creating a voltage ramp on the TK/SS pin.
As the TK/SS voltage rises linearly
beyond), the output voltage V
from 0V to 0.6V (and
rises smoothly from zero
OUT
to its final value. Alternatively the TK/SS pin can be used
to cause the start-up of V
to “track” that of another
OUT
supply. Typically, this requires connecting to the TK/SS
pin an external resistor divider from the other supply to
ground (see the Applications Information section). When
the corresponding
controller, or when INTV
RUN pin is pulled low to disable a
drops below its undervoltage
CC
lockout threshold of 3.7V, the TK/SS pin is pulled low
by an internal MOSFET. When in undervoltage lockout,
both controllers are disabled and the external MOSFETs
are held off.
Internal Soft-Start
By default, the start-up of the output voltage is normally
controlled by an internal soft-start ramp.
The internal
soft-start ramp represents one of the noninverting inputs
OUT
, is
3875fb
CC
12
For more information www.linear.com/LTC3875
OPERATION
LTC3875
to the error amplifier. The VFB signal is regulated to the
lower of the error amplifier’s three noninverting inputs
(the internal soft-start ramp, the TK/SS pin or the internal
600mV reference). As the ramp voltage rises from 0V to
0.6V, over approximately 600µs, the output voltage rises
smoothly from its pre-biased value to its final set value.
Certain applications can require
the start-up of the converter into a non-zero load voltage, where residual charge
is stored on the output capacitor at the onset of converter
switching. In order to prevent the output from discharging
under these conditions, the top and bottom MOSFETs are
disabled until soft-start is greater than V
FB
.
Light Load Current Operation (Burst Mode Operation,
Pulse-Skipping, or Continuous Conduction)
The LTC
3875 can be enabled to enter high efficiency Burst
Mode operation, constant frequency pulse-skipping mode,
or forced continuous conduction mode. To select forced
continuous operation, tie the MODE/PLLIN pin to a DC
voltage below 0.6V (e.g., SGND). To select pulse-skipping
mode of operation, tie the MODE/PLLIN pin to INTV
CC
. To
select Burst Mode operation, float the MODE/PLLIN pin.
When a controller
is enabled for Burst Mode operation,
the peak current in the inductor is set to approximately
one-third of the maximum sense voltage even though the
voltage on the I
pin indicates a lower value. If the aver-
TH
age inductor current is higher than the load current, the
error amplifier, EA, will decrease the voltage on the I
pin. When the I
voltage drops below 0.5V, the internal
TH
TH
sleep signal goes high (enabling sleep mode) and both
external MOSFETs are turned off.
In forced continuous operation, the inductor current is
allowed to
reverse at light loads or under large transient
conditions. The peak inductor current is determined by
the voltage on the I
pin. In this mode, the efficiency at
TH
light loads is lower than in Burst Mode operation. However,
continuous mode has the advantages of lower output ripple
and less interference with audio circuitry.
When the MODE/PLLIN pin is connected to INTV
LTC3875 operates in
PWM pulse-skipping mode at light
loads. At very light loads, the current comparator, I
may remain tripped for several cycles and force the external
top MOSFET to stay off for the same number of cycles (i.e.,
skipping pulses). The inductor current is not allowed to
reverse (discontinuous operation). This mode, like forced
continuous operation, exhibits low output ripple as well as
low audio noise
and reduced RF interference as compared
to Burst Mode operation. It provides higher low current
efficiency than forced continuous mode, but not nearly as
high as Burst Mode operation.
Multichip Operations (PHASMD and CLKOUT Pins)
The PHASMD pin determines the relative phases between
the internal channels as well as the CLKOUT signal as shown
in Table 1. The phases tabulated are relative to zero phase
being defined as
Table 1
PHASMDGNDFLOATINTV
Phase 10°0°0°
Phase 2180°180°240°
CLKOUT60°90°120°
the rising edge of the clock of phase 1.
CC
CC
, the
CMP
,
In sleep mode, the load current is supplied by the output
capacitor. As the output voltage decreases, the EA’s output
begins to rise. When the output voltage drops enough, the
sleep signal goes low, and the controller resumes normal
operation by turning on the top external MOSFET on the
next cycle of the internal oscillator. When a controller is
enabled for Burst Mode operation, the inductor current is
not allowed to reverse. The reverse current comparator
) turns off the bottom external MOSFET just before
(I
REV
the inductor current reaches zero, preventing it from reversing and going negative. Thus, the controller operates
in discontinuous operation.
For more information www.linear.com/LTC3875
The CLKOUT signal can be used to synchronize additional
power stages in a multiphase power supply solution feeding
a single, high current output or separate outputs. Input
capacitance ESR requirements and efficiency losses are
substantially reduced because the peak current drawn from
the input capacitor is effectively divided by the number of
phases used and power loss
is proportional to the RMS
current squared. A 2-stage, single output voltage implementation can reduce input path power loss by 75% and
radically reduce the required RMS current rating of the
input capacitor(s).
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13
LTC3875
OPERATION
Single Output Multiphase Operation
The LTC3875 can be used for single output multiphase
converters by making these connections
• Tie all of the ITH pins together;
• Tie all of the V
+
pins together;
OSNS
• Tie all of the TK/SS pins together;
• Tie all of the RUN pins together.
Examples of single output multiphase converters are shown
in the Typical Applications section.
Sensing the Output Voltage
The LTC3875 includes two low offset, high input impedance, unity gain, high bandwidth differential amplifier for
applications that require true remote sensing. Differentially
sensing the load greatly improves regulation in high current, low voltage applications, where board interconnection losses can
be a significant portion of the total error
budget. The LTC3875 differential amplifier’s positive
+
terminal V
sistor divider and its negative terminal V
senses the divided output through a re-
OSNS
OSNS
–
senses the
remote ground of the load. The differential amplifier output
is connected to the negative terminal of the internal error
amplifier inside the controller. Therefore, its differential
output signal (V
) is not accessible from outside the IC. In
FB
a typical application where differential sensing is desired,
+
connect the V
divider across the output load, and the V
pin to the center tap of the feedback
OSNS
OSNS
–
pin to the
load ground. When differential sensing is not used, the
–
V
The LTC3875 differential amplifier has a typical output
pin can be connected to local ground. See Figure 1.
OSNS
slew
rate of 2V/µs. The amplifier is configured for unity gain,
meaning that the difference between V
OSNS
+
and V
OSNS
–
is
translated to its output, relative to SGND. Care should be
taken to route the V
OSNS
+
and V
–
PCB traces parallel
OSNS
to each other all the way to the remote sensing points on
the board. In addition, avoid routing these sensitive traces
any high speed switching nodes in the circuit. Ideally,
near
the V
OSNS
+
and V
–
traces should be shielded by a
OSNS
low impedance ground plane to maintain signal integrity.
Current Sensing with Very Low Inductor DCR
For low output voltage, high current applications, it’s
common to use low winding resistance (DCR) inductors
to minimize the winding conduction loss and maximize the
supply efficiency. Inductor DCR current sensing
is also used
to eliminate the current sensing resistor and its conduction
loss. Unfortunately, with a very low inductor DCR value,
1mΩ or less, the AC current sensing signal ripple can be
less than 10mV
. This makes the current loop sensitive
P-P
to PCB switching noise and causes switching jitter.
The LTC3875 employs a unique and proprietary current
sensing architecture to enhance its signal-to-
noise ratio
in these situations. This enables it to operate with a small
sense signal of a very low value inductor DCR, 1mΩ or
less. The result is improved power efficiency, and reduced
jitter due to switching noise which could corrupt the signal.
The LTC3875 can sense a DCR value as low as 0.2mΩ with
careful PCB layout. The LTC3875 uses two positive sense
+
pins, SNSD
and SNSA+ to acquire signals. It processes
them internally to provide the response as with a DCR sense
signal that has a 14dB (5×) signal-to-noise ratio improvement without affecting output voltage feedback loop. In
the meantime, the current limit threshold is still a function
of the inductor peak current times its DCR value and its
accuracy is also improved five times and can
be accurately
set from 10mV to 30mV in a 5mV steps with the ILIM pin
14
V
OUT
C
OUT2
10Ω
C
OUT1
10Ω
FEEDBACK DIVIDER
Figure 1. Differential Amplifier Connection
C
R
R
For more information www.linear.com/LTC3875
FF
D1
D2
V
V
OSNS
OSNS
+
–
+
DIFFAMP
–
0.6V
INTSS
TK/SS
LTC3875
–
+
+
EA
+
I
TH
3875 F01
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