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LP141WP1
Liquid Crystal Display
Product Specification
Contents
COVER
CONTENTS
RECORD OF REVISIONS
GENERAL DESCRIPTION1
ABSOLUTE MAXIMUM RATINGS2
ELECTRICAL SPECIFICATIONS3
ELECTRICAL CHARACTREISTICS3-1
INTERFACE CONNECTIONS3-2
LVDS SIGNAL TIMING SPECIFICATIONS3-3
SIGNAL TIMING SPECIFICATIONS3-4
SIGNAL TIMING WAVEFORMS3-5
COLOR INPUT DATA REFERNECE3-6
POWER SEQUENCE3-7
OPTICAL SFECIFICATIONS4
ITEMNo
Page
1
2
3
4
5
6
8
9
11
11
12
13
14
MECHANICAL CHARACTERISTICS5
RELIABLITY6
INTERNATIONAL STANDARDS7
SAFETY7-1
EMC7-2
PACKING8
DESIGNATION OF LOT MARK8-1
PACKING FORM8-2
PRECAUTIONS9
APPENDIX. Enhanced Extended Display Identification Data A
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LP141WP1
Liquid Crystal Display
Product Specification
RECORD OF REVISIONS
DescriptionPageRevision DateRevision No
First Draft (Preliminary Specification)-Nov. 10. 20070.0
Define Power Consumption4Apr. 14. 20080.1
Define Power Supply Input Current and Power Consumption6Apr. 14. 2008
Revise Lamp Wire Color8Apr. 14. 2008
Change Signal Timing Specifications by WWAN Solution.11Apr. 14. 2008
Correct Mounting hole location.20Apr. 14. 2008
Added 2D Label Informations.20Apr. 14. 2008
Revise EDID Informations.29~31Apr. 14. 2008
EDID
ver
0.0
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ڃڧڪڢںڝٻۏ۔ۋۀڄ
1. General Description
The LP141WP1 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent
Lamp (CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a
transmissive type display operating in the normally white mode. This TFT-LCD has 15.4 inches diagonally
measured active display area with WXGA resolution(900 vertical by 1440 horizontal pixel array). Each pixel
is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or
the brightness of the sub-pixel color is determined with a 6-bit gray scale signal for each dot, thus,
presenting a palette of more than 262,144 colors.
The LP141WP1 has been designed to apply the interface method that enables low power, high speed, low
EMI.
The LP141WP1 is intended to support applications where thin thickness, low power are critical factors and
graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the
LP141WP1 characteristics provide an excellent flat display for office automation products such as Notebook
PC.
Anti-glare treatment of the front polarizerSurface Treatment
YesRoHS Comply
2
(Typ.) , 5 pointLuminance, White
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2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
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LP141WP1
Liquid Crystal Display
Product Specification
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterNotes
Symbol
Values
Units
MaxMin
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
OP
Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39
Wet Bulb
20
]
30
Temperature [
10
0
qC Max, and no condensation of water.
90% 80%
60
50
40
60%
Humidity[(%)RH]
40%
20%
10%
Storage
Operation
at 25 r 5qCVdc4.0-0.3VCC
1qC500TOP
1qC60-20HST
1%RH9010H
1%RH9010HST
-20
10
20304050
6070800
Dry Bulb Temperature []
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3. Electrical Specifications
3-1. Electrical Characteristics
The LP141WP1 requires two power inputs. One is employed to power the LCD electronics and to drive the
TFT array and liquid crystal. The second input which powers the CCFL, is typically generated by an
inverter. The inverter is an external unit to the LCD.
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LP141WP1
Liquid Crystal Display
Product Specification
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
MODULE :
Power Supply Input Current
LAMP :
Operating Voltage
Operating Current
Power Consumption
Operating Frequency
Established Starting Voltage
at 25
at 0
V
I
Vs
CC
BL
BL
BL
BL
640
(7.0mA)
Values
655
(6.3mA)
MaxTypMin
3.63.33.0VCCPower Supply Input Voltage
880
(2.0mA)
7.06.32.0I
4.54.1-P
1180
1415
V
DC
V
RMS
RMS
kHz806550f
V
RMS
V
RMS
Note)
1. The specified current and power consumption are under the Vcc = 3.3V , 25, fv = 60Hz condition
whereas Mosaic pattern is displayed and fv is the frame frequency.
NotesUnit
1mA445385
1Watt1.471.27-PcPower Consumption
2Ohm11010090ZmDifferential Impedance
3mA
4Min3--TsDischarge Stabilization Time
5Hrs--15,000Life Time
2. This impedance value is needed to proper display and measured form LVDS Tx to the mating connector.
3. The typical operating current is for the typical surface luminance (L
) in optical characteristics.
WH
4. Define the brightness of the lamp after being lighted for 5 minutes as 100%, Ts is the time required for
the brightness of the center of the lamp to be not less than 95%.
5. The life time is determined as the time at which brightness of lamp is 50% compare to that of initial value
at the typical lamp current.
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Note)
6. The output of the inverter must have symmetrical(negative and positive) voltage waveform and
symmetrical current waveform.(Asymmetrical ratio is less than 10%) Please do not use the inverter
which has asymmetrical voltage and asymmetrical current and spike wave.
Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may
cause beat on the display. Therefore lamp frequency shall be as away possible from the
horizontal synchronous frequency and from its harmonics in order to prevent interference.
7. It is defined the brightness of the lamp after being lighted for 5 minutes as 100%.
is the time required for the brightness of the center of the lamp to be not less than 95%.
T
S
8. The lamp power consumption shown above does not include loss of external inverter.
The applied lamp current is a typical one.
9. Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp, are following.
It shall help increase the lamp lifetime and reduce leakage current.
a. The asymmetry rate of the inverter waveform should be less than 10%.
b. The distortion rate of the waveform should be within ˲2 ·10%.
* Inverter output waveform had better be more similar to ideal sine wave.
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LP141WP1
Liquid Crystal Display
Product Specification
* Asymmetry rate:
I p
| I
p
–I –p| / I
rms
* 100%
* Distortion rate
I -p
I
(or I –p) / I
p
rms
10. Inverter open voltage must be more than lamp voltage for more than 1 second for start-up.
Otherwise, the lamps may not be turned on.
Do not attach a conducting tape to lamp connecting wire.
If the lamp wire attach to a conducting tape, TFT-LCD Module has a low luminance and the inverter
has abnormal action. Because leakage current is occurred between lamp wire and conducting tape.
Ex of current wave)
Normal current wave - Standard
Abnormal current wave - Bad
Abnormal current wave - Bad
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3-2. Interface Connections
This LCD employs two interface connections, a 30 pin connector is used for the module electronics interface
and the other connector is used for the integral backlight system.
The electronics interface connector is a model FI-XB30SRL-HF11 manufactured by JAE.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1
2
3
4
5
6
7
8
9
RC1+
RA2+Positive LVDS differential data input, R0-R5, G0
RC2+
GroundGND
Power Supply, 3.3V Typ.VCC
Power Supply, 3.3V Typ.VCC
DDC 3.3V powerV EEDID
Requested for LCD supplier test pointBIST
DDC ClockClk EEDID
DDC DataDATA EEDID
Negative LVDS differential data input, R0-R5, G0RA1-
Positive LVDS differential data input, R0-R5, G0RA1+
GroundGND
Negative LVDS differential data input, G1-G5, B0-B1RB1-
Positive LVDS differential data input, G1-G5, B0-B1RB1+
GroundGND
Negative LVDS differential data input, B2-B5, HS/VS/DERC1Positive LVDS differential data input, B2-B5,
HS/VS/DE
GroundGND
Negative LVDS differential clock inputRCLK1-
Positive LVDS differential clock inputRCLK1+
GroundGND
Negative LVDS differential data input, R0-R5, G0RA2-
GroundNC
Negative LVDS differential data input, G1-G5, B0-B1RB2-
Positive LVDS differential data input, G1-G5, B0-B1RB2+
GroundNC
Negative LVDS differential data input, B2-B5, HS/VS/DERC2Positive LVDS differential data input, B2-B5,
HS/VS/DE
GroundNC
Negative LVDS differential clock inputRCLK2-
Positive LVDS differential clock inputRCLK2+
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Product Specification
LP141WP1
Liquid Crystal Display
NotesDescriptionSymbolPin
1, Interface chips
1.1 LCD : TLI, Dual LVDS Rx
1.2 System : it must include international
* Pin to Pin compatible with LVDS
2. Connector
2.1 LCD : ࣲࣩ࣯ࣩ࣭ࣳࣾ࣬ࣨࣜ or
2.2 Mating : FI-X30M or equivalent.
2.3 Connector pin arrangement
standard LVDS Transmitter.
ࣩ࣯ࣩ࣭࣭ࣾ࣬ࣨࣽࣜ or
its compatibles
[LCD Module Rear View]
The backlight interface connector is a model BHSR-02VS-1, manufactured by JST or Compatible.
The mating connector part number is SM02B-BHSS-1 or equivalent.