LG.Philips LCD LP141WP1-TLA3 Specification

Global LCD Panel Exchange Center

www.panelook.com

LP141WP1

Liquid Crystal Display

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(

Preliminary Specification



)

(

Final Specification

MODEL

/

/

14.1” WXGA+ TFT LCDTitle

DellCustomer

*When you obtain standard approval,

please use the above model name without suffix

DATESIGNATURE

S.C. Yoon / G.Manager

REVIEWED BY

G.J. Han / Manager

LG.Philips LCD Co., Ltd.SUPPLIER

LP141WP1*MODEL

TLA3Suffix

DATESIGNATURE

PREPARED BY

/

Please return 1 copy for your confirmation with
your signature and comments.

Ver. 0.0 Nov. 15, 2006

I.Y.Jung / Engineer

H.G.Kim / Engineer

Products Engineering Dept.

LG. Philips LCD Co., Ltd

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

1/ 27

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

LP141WP1

Liquid Crystal Display

Product Specification

Contents

COVER

CONTENTS

RECORD OF REVISIONS

GENERAL DESCRIPTION1

ABSOLUTE MAXIMUM RATINGS2

ELECTRICAL SPECIFICATIONS3

ELECTRICAL CHARACTREISTICS3-1

INTERFACE CONNECTIONS3-2

SIGNAL TIMING SPECIFICATIONS3-3

SIGNAL TIMING WAVEFORMS3-4

COLOR INPUT DATA REFERNECE3-5

POWER SEQUENCE3-6

OPTICAL SFECIFICATIONS4

MECHANICAL CHARACTERISTICS5

ITEMNo

Page

1

2

3

4

5

6

7

9

9

10

11

12

16

RELIABLITY6

INTERNATIONAL STANDARDS7

SAFETY7-1

EMC7-2

PACKING8

DESIGNATION OF LOT MARK8-1

PACKING FORM8-2

PRECAUTIONS9

APPENDIX. Enhanced Extended Display Identification Data (EEDID

Ver. 0.0 Nov. 15, 2006

TM

20

21

21

22

22

23

)A

25

27

2/ 27

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

www.panelook.com

LP141WP1

Liquid Crystal Display

Product Specification

RECORD OF REVISIONS

DescriptionPageRevision DateRevision No

First Draft-Nov. 15, 20060.1

EDID

ver

V0.0

Ver. 0.0 Nov. 15, 2006

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

3/ 27

www.panelook.com

Global LCD Panel Exchange Center

1. General Description

The LP141WP1 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent
Lamp (CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a
transmissive type display operating in the normally white mode. This TFT-LCD has 14.1 inches diagonally
measured active display area with WXGA+ resolution(900 vertical by 1440 horizontal pixel array). Each
pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray
scale or the brightness of the sub-pixel color is determined with a 6-bit gray scale signal for each dot, thus,
presenting a palette of more than 262,144 colors.

The LP141WP1 has been designed to apply the interface method that enables low power, high speed, low
EMI.

The LP141WP1 is intended to support applications where thin thickness, low power are critical factors and
graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the
LP141WP1 characteristics provide an excellent flat display for office automation products such as Notebook
PC.

www.panelook.com

LP141WP1

Liquid Crystal Display

Product Specification

ju

X

General Features

s}kzG

M
{G
j

i

wG

i

ajGMGk awG

14.1 inches diagonal Active Screen Size
320 (H) ϧ 206(V) Ý 5.5(D) mm [Max]Outline Dimension

0.2109 mm Ý 0.2109 mmPixel Pitch

1440 horiz. By 900 vert. Pixels RGB strip arrangementPixel Format

6-bit, 262,144 colorsColor Depth

2

220 cd/m

Total 6.0 Watt(Typ.) @ LCM circuit 1.9Watt(Typ.), B/L input 4.1Watt(Typ.)Power Consumption

435 g (Max.), 425g(Typ.)Weight

Transmissive mode, normally whiteDisplay Operating Mode

Anti-glare treatment of the front polarizerSurface Treatment

YesRoHS Comply

(Typ.5 point)Luminance, White

yGk j

jGkGj

{m{Tsjk

OX[[WGG`WWP

qZ

iGhN

Ver. 0.0 Nov. 15, 2006

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

4/ 27

www.panelook.com

Global LCD Panel Exchange Center

୅

2. Absolute Maximum Ratings

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.

www.panelook.com

LP141WP1

Liquid Crystal Display

Product Specification

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Notes

Symbol

Values

Units

MaxMin

Power Input Voltage

Operating Temperature

Storage Temperature

Operating Ambient Humidity

OP

Storage Humidity

Note : 1. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be 39

Wet Bulb
Temperature [

10

0

20

]

30

qC Max, and no condensation of water.

90% 80%

60

50

40

60%

Humidity[(%)RH]

40%

20%

10%

Storage

Operation

at 25 r 5qCVdc4.0-0.3VCC

1qC500TOP

1qC60-20HST

1%RH9010H

1%RH9010HST

-20

10

20 30 40 50

60 70 800

Dry Bulb Temperature [୅]

Ver. 0.0 Nov. 15, 2006

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

5/ 27

www.panelook.com

Global LCD Panel Exchange Center

3. Electrical Specifications

3-1. Electrical Characteristics

The LP141WP1 requires two power inputs. One is employed to power the LCD electronics and to drive the
TFT array and liquid crystal. The second input which powers the CCFL, is typically generated by an
inverter. The inverter is an external unit to the LCD.

Parameter Symbol

MODULE :

Power Supply Input Current

Differential Impedance

LAMP :

Operating Voltage

Operating Current

Power Consumption

Operating Frequency

www.panelook.com

Product Specification

Table 2. ELECTRICAL CHARACTERISTICS

Values

I

CC

-PcPower Consumption

Zm

BL

BL

BL

BL

-P

LP141WP1

Liquid Crystal Display

DC

RMS

NotesUnit

1Ma

1Watt

2Ohm

3mA

4Min3--TsDischarge Stabilization Time

5Hrs--15,000Life Time

MaxTypMin

3.63.33.0VCCPower Supply Input Voltage

V

ࣰࣱࣱࣲࣲࣩ࣬

࣮࣮࣭࣪࣪ࣵ

࣭࣭࣭࣬࣬࣬ࣵ࣬

880(2.0mA)675(6.0mA)640(7.0mA)V

7.06.02.0I

ࣰࣰࣱ࣭࣪࣪

V

RMS

kHz806550f

Established Starting Voltage

at 25୅
at 0 ୅

Vs

1180
1415

V

RMS

V

RMS

Note)

1. The specified current and power consumption are under the Vcc = 3.3V , 25୅, fv = 60Hz condition

whereas full black pattern is displayed and fv is the frame frequency.

2. This impedance value is needed to proper display and measured form LVDS Tx to the mating connector.

3. The typical operating current is for the typical surface luminance (L

) in optical characteristics.

WH

4. Define the brightness of the lamp after being lighted for 5 minutes as 100%, Ts is the time required for
the brightness of the center of the lamp to be not less than 95%.

5. The life time is determined as the time at which brightness of lamp is 50% compare to that of initial value
at the typical lamp current.

6. The output of the inverter must have symmetrical(negative and positive) voltage waveform and
symmetrical current waveform.(Asymmetrical ratio is less than 10%) Please do not use the inverter
which has asymmetrical voltage and asymmetrical current and spike wave.
Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may
cause beat on the display. Therefore lamp frequency shall be as away possible from the

horizontal synchronous frequency and from its harmonics in order to prevent interference.

7. It is defined the brightness of the lamp after being lighted for 5 minutes as 100%.

is the time required for the brightness of the center of the lamp to be not less than 95%.

T

S

8. The lamp power consumption shown above does not include loss of external inverter.
The applied lamp current is a typical one.

Ver. 0.0 Nov. 15, 2006

6/ 27

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

Note)

9. Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp, are following.
It shall help increase the lamp lifetime and reduce leakage current.

a. The asymmetry rate of the inverter waveform should be less than 10%.
b. The distortion rate of the waveform should be within Ĝ2 f10%.

* Inverter output waveform had better be more similar to ideal sine wave.

I p

www.panelook.com

Product Specification

* Asymmetry rate:

| I

–I –p| / I

p

rms

LP141WP1

Liquid Crystal Display

* 100%

I -p

* Distortion rate

I

(or I –p) / I

p

rms

୔ Do not attach a conducting tape to lamp connecting wire.

If the lamp wire attach to a conducting tape, TFT-LCD Module has a low luminance and the inverter
has abnormal action. Because leakage current is occurred between lamp wire and conducting tape.

Ver. 0.0 Nov. 15, 2006

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

7/ 27

www.panelook.com

Global LCD Panel Exchange Center

3-2. Interface Connections

This LCD employs two interface connections, a 30 pin connector is used for the module electronics interface
and the other connector is used for the integral backlight system.

The electronics interface connector is a model ࣩ࣯ࣾ࣬ࣩ࣭࣭ manufactured by JAE.

Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)

GroundGND1

Power Supply, 3.3V Typ.VCC2

Power Supply, 3.3V Typ.VCC3

DDC 3.3V powerV EEDID4

Requested for LCD supplier test pointBIST5

DDC ClockClk EEDID6

DDC DataDATA EEDID7

Negative LVDS differential data input, R0-R5, G0RA1-8

Positive LVDS differential data input, R0-R5, G0RA1+9

GroundGND10

Negative LVDS differential data input, G1-G5, B0-B1RB1-11

Positive LVDS differential data input, G1-G5, B0-B1RB1+12

GroundGND13

Negative LVDS differential data input, B2-B5, HS/VS/DERC1-14

Positive LVDS differential data input, B2-B5, HS/VS/DERC1+15

GroundGND16

Negative LVDS differential clock inputRCLK1-17

Positive LVDS differential clock inputRCLK1+18

GroundGND19

Negative LVDS differential data input, R0-R5, G0RA2-20

RA2+ Positive LVDS differential data input, R0-R5, G021

GroundNC22

Negative LVDS differential data input, G1-G5, B0-B1RB2-23

Positive LVDS differential data input, G1-G5, B0-B1RB2+24

GroundNC25

Negative LVDS differential data input, B2-B5, HS/VS/DERC2-26

Positive LVDS differential data input, B2-B5, HS/VS/DERC2+27

GroundNC28

Negative LVDS differential clock inputRCLK2-29

Positive LVDS differential clock inputRCLK2+30

www.panelook.com

Product Specification

LP141WP1

Liquid Crystal Display

NotesDescriptionSymbolPin

1, Interface chips

1.1 LCD :

1.2 System : it must include international

2. Connector

2.1 LCD : ࣩ࣯ࣾ࣬ࣩ࣭࣭ࣨࣽࣜ or

2.2 Mating : FI-X30M or equivalent.

2.3 Connector pin arrangement

ࣽࣨࣜ࣭࣮࣬(LCD Controller)

including LVDS Receiver
(DAWIN葅, LVD4107x 2each)

* Pin to Pin compatible with LVDS



standard LVDS Transmitter.

its compatibles



[LCD Module Rear View]

The backlight interface connector is a model BHSR-02VS-1, manufactured by JST or Compatible.
The mating connector part number is SM02B-BHSS-1 or equivalent.

Table 5. BACKLIGHT CONNECTOR PIN CONFIGURATION (J3)

NotesDescriptionSymbolPin

1Power supply for lamp (High voltage side)HV1

1Power supply for lamp (Low voltage side)LV2

Notes : 1. The high voltage side terminal is colored pink and the low voltage side terminal is Green.

Ver. 0.0 Nov. 15, 2006

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

8/ 27

www.panelook.com

Global LCD Panel Exchange Center

3-3. Signal Timing Specifications

This is the signal timing required at the input of the User connector. All of the interface signal timing should be
satisfied with the following specifications and specifications of LVDS Tx/Rx for its proper operation.

www.panelook.com

LP141WP1

Liquid Crystal Display

Product Specification

Table 6. TIMING TABLE

NoteUnitMaxTypMinSymbolITEM

FrequencyDCLK

Width

Width-Active

Vsync

Period

Width

Width-Active

Data

Enable

Horizontal back porch

Horizontal front porch

Vertical back porch

Vertical front porch

3-4. Signal Timing Waveforms

Data Enable, Hsync, Vsync

DCLK

tCLK

0.5 Vcc

CLK

WH

WHA

VP

WV

WVA

HBP

HFP

VBP

VFP

High: 0.7VCC

Low: 0.3VCC

MHz90.888.89687.2f

162416001576ThpPeriodHsync

403224t

tCLK

144014401440t

932926922t

864t

tHP

900900900t

888072t

tCLK

564840t

191715t

tHP

533t

Condition : VCC =3.3V

t

Hsync

t

WH

t

HBP

HP

tWHA

t

HFP

Data Enable

t

VP

t

WV

Vsync

t

VBP

tWVA

t

VFP

Data Enable

Ver. 0.0 Nov. 15, 2006

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

9/ 27

www.panelook.com