LG.Philips LCD LM240WU2-SLB3, LM240WU2-SLB2, LM240WU2-SLB1 Specification

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LM240WU2

Liquid Crystal Display

Product Specification

SPECIFICATION

FOR

APPROVAL

BUYER

MODEL

APPROVED BY

/

/

APPLE

SIGNATURE

DATE

24.0” WUXGA TFT LCDTitle

LG.Philips LCD Co., Ltd.SUPPLIER

LM240WU2*MODEL

SLB1/SLB2/SLB3SUFFIX

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY

Hans Kim / G.Manager

REVIEWED BY

S.Y Park / Manager

SIGNATURE

DATE

PREPARED BY

/

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 1.0 Jan. 01. 17. 2008

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Harry Kim / Engineer

MNT Products Engineering Dept.

LG. Philips LCD Co., Ltd

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LM240WU2

Liquid Crystal Display

Product Specification

Contents

PageITEMNo

COVER

CONTENTS

RECORD OF REVISIONS

GENERAL DESCRIPTION1

ABSOLUTE MAXIMUM RATINGS2

ELECTRICAL SPECIFICATIONS3

ELECTRICAL CHARACTREISTICS3-1

INTERFACE CONNECTIONS3-2

SIGNAL TIMING SPECIFICATIONS3-3

SIGNAL TIMING WAVEFORMS3-4

COLOR INPUT DATA REFERNECE3-5

POWER SEQUENCE3-6

OPTICAL SFECIFICATIONS4

1

2

3

4

5

6

6

8

11

12

13

14

16

MECHANICAL CHARACTERISTICS5

RELIABLITY6

INTERNATIONAL STANDARDS7

SAFETY7-1

EMC7-2

PACKING8

DESIGNATION OF LOT MARK8-1

PACKING FORM8-2

PRECAUTIONS9

EDID DATA FOR LM240WU2-SLA110

22

25

26

26

26

27

27

27

28

30

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LM240WU2

Liquid Crystal Display

Product Specification

RECORD OF REVISIONS

Revision

No

DescriptionPageRevision Date

Final Specification-Jan. 17. 20081.0

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LM240WU2

Liquid Crystal Display

Product Specification

1. General Description

LM240WU2 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent
Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 24inch diagonally measured
active display area with WUXGA resolution (1200 vertical by 1920 horizontal pixel array)
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot,
thus, presenting a palette of more than 16,7M(True) colors.
It has been designed to apply the 8Bit 2 port LVDS interface.
It is intended to support displays where high brightness, super wide viewing angle,
high color saturation, and high color are important.

LVDS

2port

CN1

(30pin)

+12.0V

+12.0V

+24.0V

GND

CN2

(14Pin)

General Features

RGB

Timing

Controller

Power Circuit

Block

Inverter

Block

24.0 inches(60.96cm) diagonalActive Screen Size

546.4(H) x 350.0(V) x 28.9(D) mm(Typ.)Outline Dimension

Gate Driver Circuit

2pin x 7CNs (High)

4pin x 1CNs (Low)

Source Driver Circuit

S1 S1920

G1

TFT - LCD Panel

(1920 Ý RGB Ý 1200 pixels)

G1200

Back light Assembly

(Direct Light Type_14CCFL)

0.270 mm x 0.270 mmPixel Pitch

1920 horiz. By 1200 vert. Pixels RGB stripes arrangementPixel Format

8-bit, 16,777,216 colorsColor Depth

400 cd/m

2

( 5 points Avg.)Luminance, White

View Angle Free (R/L 178(Typ.), U/D 178(Typ.))Viewing Angle(CR>10)

Total 71.95 Watt (Typ.) (5.95 Watt

@VLCD, 66 Watt @400cd) for SLB1/SLB3

Power Consumption

Total 70.92 Watt (Typ.) (4.92 Watt @VLCD, 66 Watt @400cd) for SLB2

2650g (typ.)Weight

Transmissive mode, normally blackDisplay Operating Mode

Hard coating(2H), Glare(Low Reflection treatment of the front polarizer)Surface Treatment

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LM240WU2

Liquid Crystal Display

Product Specification

2. Absolute Maximum Ratings

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Notes

Power Input Voltage

Operating Temperature

Storage Temperature

Operating Ambient Humidity

Storage Humidity

Symbol

Values

MaxMin

500TOP

60-20TST

Units

Vdc21-0.3VLCD

¶C

¶C

%RH9010HOP

%RH9010HST

Note : 1. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be 39 ¶C Max, and no condensation of water.

ڔڋڀ

ڑڋ

ڑڋڀ

ڲۀۏٻڝېۇڽ
گۀۈۋۀۍڼۏېۍۀٻڶڞڸ

ڎڋ

ڍڋ

ڌڋ

ڋ

ڐڋ

ڏڋ

ڏڋڀ

ڣېۈۄڿۄۏ۔ٻڶڃڀڄڭڣڸ

ڌڋڀ

at 25 r 2¶C

1

ڮۏۊۍڼۂۀ

ڪۋۀۍڼۏۄۊۉ

ڌڋ ڍڋ ڎڋ ڏڋ ڐڋ ڑڋ ڒڋ ړڋڋڈڍڋ

ڟۍ۔ٻڝېۇڽٻگۀۈۋۀۍڼۏېۍۀٻڶڞڸ

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LM240WU2

Liquid Crystal Display

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and
liquid crystal. The second input power for the CCFL, is typically generated by an inverter. The inverter is an
external unit to the LCDs.

Table 2-1. ELECTRICAL CHARACTERISTICS

Parameter Symbol

MODULE :

ILCDPower Supply Input Current

Parameter Symbol

MODULE :

ILCDPower Supply Input Current

Values

Values

For SLB1/SLB3

MaxTypMin

Vdc12.612.011.4VLCDPower Supply Input Voltage

mVp-p400VdRFPermissive Power Input Ripple

NotesUnit

1mA570495-

2mA878675-

1Watt6.845.95-PLCDPower Consumption

3A3.0--IRUSHRush current

For SLB2

MaxTypMin

Vdc12.612.011.4VLCDPower Supply Input Voltage

mVp-p400VdRFPermissive Power Input Ripple

NotesUnit

1mA472410-

2mA667580-

1Watt5.664.92-PLCDPower Consumption

3A3.0--IRUSHRush current

Note :

1. The specified current and power consumption are under the V
whereas mosaic pattern(8 x 6) is displayed and f

is the frame frequency.

V

=12.0V, 25 r 2¶C,fV=60Hz condition

LCD

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power Input is 1ms(min.).

White : 255Gray
Black : 0Gray

Mosaic Pattern(8 x 6)

Maximum current pattern

White Pattern

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Product Specification

Table 2-2. INVERTER ELECTRICAL CHARACTERISTICS

LM240WU2

Liquid Crystal Display

Inverter :

Input Voltage

Input Current

Lamp Current

Open Lamp

Voltage

DDB

DDB

BInput Power

ON/OFFB/L on/off control

V

Vopen

ConditionSymbolParameter

No load

Vin=21.6V, Vbr=max

Values

Unit

Notes

Max.Typ.Min.

V26.424.021.6V

A3.022.75-Vin=24V, Vbr = maxI

Watt72.666-Vin=24V, Vbr = maxP

1

2

2

V5.0-2.0Lamp ON = High

V0.8-0.0Lamp OFF =Low

Vrms1150950750Vin=24V, Vbr=maxVoutLamp Voltage

mArms--2.5Vin=24V, Vbr=minIo(Min)

mArms4.74.23.7Vin=24V, Vbr=maxIo(Max)

V3.3-0Vin=24VVBRBrightness Adj

KHz484440Vbr=maxFoFrequency

Hz-180-Vin=24V, Vbr=minFbBurst Frequency

Vrms--1300

3%10.0--Vin=24VAsymmetry Ratio

31.55-1.27Vin=24VDistortion Ratio

Efficiency

TsStriking Time

Vin=21.6V, Vbr=max

Ɂ

No load

max

Sec2.0-1.0

%80Vin=24V Vbr=

LAMP :

4Hrs50,000Life time

Notes :

1. The input voltage ripple is limited below 400mVp-p.

2.The specified current and power consumption are under the typical supply Input voltage, 24V.

3. Voltage and current is measured for Asymmetry ratio and Distortion ratio.
Asymmetry Ratio: | Ipeak – I -peak | / IL Distortion Ratio : | Ipeak |(or I -peak |) / IL

4.The life is determined as the time at which luminance of the lamp is 50% compared to that of initial
value at the typical lamp current on condition of continuous operating at 25 r 2¶C.

5. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately
30min in a dark environment at 25 ¶Cr 2¶C.

6. In case of the difference in measured values due to the difference of measuring device was found,

correlated value will be used after discussions between both parties.

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LM240WU2

Liquid Crystal Display

Product Specification

3-2. Interface Connections

3-2-1. LCD Module

- LCD Connector(CN1). : GT103-30S-H23(LS Cable), ISL100-L30B-C23(UJU), KDF71G-30S-1H(HIROSE) or

equivalent

- Mating Connector: FI-X30C2L (Manufactured by JAE) or equivalent

Table 3 MODULE CONNECTOR(CN1) PIN CONFIGURATION

SymbolNo

FR0M1

FR0P2

FR1M3

FR1P4

FR2M5

FR2P6

GND7

FCLKINM8

FCLKINP9

FR3M10

FR3P11

SR0M12

SR0P13

Minus signal of odd channel 0 (LVDS)

Plus signal of odd channel 0 (LVDS)

Minus signal of odd channel 1 (LVDS)

Plus signal of odd channel 1 (LVDS)

Minus signal of odd channel 2 (LVDS)

Plus signal of odd channel 2 (LVDS)

Ground

Minus signal of odd clock channel
(LVDS)

Plus signal of odd clock channel (LVDS)

Minus signal of odd channel 3 (LVDS)

Plus signal of odd channel 3 (LVDS)

Minus signal of even channel 0 (LVDS)

Plus signal of even channel 0 (LVDS)

Description

No

16

SR1P

17

GND

18

SR2M

19

SR2P

20

SCLKINM

21

SCLKINP

22

SR3M

23

SR3P

24

GND

CLK_EDID

25

DATA_EDID

26

27

V_EDID

28

VLCD

Symbol

Description

Plus signal of even channel 1 (LVDS)

Ground

Minus signal of even channel 2 (LVDS)

Plus signal of even channel 2 (LVDS)

Minus signal of even clock channel (LVDS)

Plus signal of even clock channel (LVDS)

Minus signal of even channel 3 (LVDS)

Plus signal of even channel 3 (LVDS)

Ground

DDC for Clock

DDC for Data

DDC for Power 3.3V

Power Supply +12.0V

GND14

SR1M15

Ground

Minus signal of even channel 1 (LVDS)

29

30

VLCD

VLCD

Power Supply +12.0V

Power Supply +12.0V

Note: 1. All GND(ground) pins should be connected together and to Vss which should also be connected to

the LCD’s metal frame.

2. All V

LCD (power input) pins should be connected together.

3. Input Level of LVDS signal is based on the IEA 664 Standard.

User Connector Diagram

1

30

پڌ پڎڋ

Rear view of LCM

GT103-30S-H23(LS Cable)

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Table 4. REQUIRED SIGNAL ASSIGNMENT FOR Flat Link (TI:SN75LVDS83) Transmitter

Pin # Require SignalPin Name Pin # Require SignalPin Name

1 Power Supply for TTL InputVCC 29 Ground pin for TTLGND

2 TTL Input (R7)D5 30 TTL Input (DE)D26

3 TTL Input (R5)D6 31 TTL Level clock InputTXCLKIN

4 TTL Input (G0)D7 32 Power Down InputPWR DWN

5 Ground pin for TTLGND 33 Ground pin for PLLPLL GND

6 TTL Input (G1)D8 34 Power Supply for PLLPLL VCC

7 TTL Input (G2)D9 35 Ground pin for PLLPLL GND

LM240WU2

8 TTL Input (G6)D10 36 Ground pin for LVDSLVDS GND

9 Power Supply for TTL InputVCC 37 Positive LVDS differential data output 3TxOUT3ు

10 TTL Input (G7)D11 38 Negative LVDS differential data output 3TxOUT3ృ

11 TTL Input (G3)D12 39 Positive LVDS differential clock outputTXCLKOUTు

12 TTL Input (G4)D13 40 Negative LVDS differential clock outputTXCLKOUTృ

13 Ground pin for TTLGND 41 Positive LVDS differential data output 2TXOUT2ు

14 TTL Input (G5)D14 42 Negative LVDS differential data output 2TXOUT2ృ

15 TTL Input (B0)D15 43 Ground pin for LVDSLVDS GND

16 TTL Input (B6)D16 44 Power Supply for LVDSLVDS VCC

17 Power Supply for TTL InputVCC 45 Positive LVDS differential data output 1TXOUT1ు

46 Negative LVDS differential data output 1TXOUT1ృ18 TTL Input (B7)D17

19 TTL Input (B1)D18

20 TTL Input (B2)D19

22 TTL Input (B3)D20

47 Positive LVDS differential data output 0TXOUT0ు

48 Negative LVDS differential data output 0TXOUT0ృ

49 Ground pin for LVDSLVDS GND21 Ground pin for TTL InputGND

50 TTL Input (R6)D27

23 TTL Input (B4)D21

24 TTL Input (B5)D22

25 TTL Input (RSVD)D23

26 Power Supply for TTL InputVCC 54 TTL Input (R2)D2

51 TTL Input (R0)D0

52 TTL Input (R1)D1

53 Ground pin for TTLGND

55 TTL Input (R3)D327 TTL Input (HSYNC)D24

56 TTL Input (R4)D428 TTL Input (VSYNC)D25

Notes : Refer to LVDS Transmitter Data Sheet for detail descriptions.

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Product Specification

3-2-2. Backlight Interface

-Inverter Connector : B14B-PH-SM3 Top entry type (Manufactured by JST) or Equivalent

- Mating Connector : PHR-14(Manufactured by JST) or Equivalent

Table 4. INVERTER CONNECTOR PIN CONFIGULATION

LM240WU2

Liquid Crystal Display

RemarksDescriptionSymbolPin No

BL1

BL2

BL3

BL4

BL5

ON12

BR13

Notes : 1. GND is connected to the LCD’s metal frame.

2. Vbr input is PWM signal and the signal level is within 3.3Vᇹ3%.
PWM Duty : Max 100% / Min 0%

Power Supply +24.0VV

Power Supply +24.0VV

Power Supply +24.0VV

Power Supply +24.0VV

Power Supply +24.0VV

Power GroundGND6

Power GroundGND7

Power GroundGND9

Power GroundGND10

NCOPEN11

Backlight On/off SignalV

NCStatus14

Note 1Power GroundGND8

(On :2.0V~5V/Off :0.0~0.8V)

Note 2Brightness Adjustable VoltageV

Rear view of LCM

PCB

14

…

…

1

B14B-PH-SM3

(JST : Japan Solderless Terminal Co.,Ltd.)

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Liquid Crystal Display

Product Specification

3-3. Signal Timing Specifications

This is signal timing required at the input of the TMDS transmitter. All of the interface signal timing should be
satisfied with the following specifications for it’s proper operation.

Table 5. TIMING TABLE (VESA COORDINATED VIDEO TIMING)

DCLK

Hsync

Vsync

SYMBOL

CLKPeriod

CLKFrequency

WHWidth-Active

VFrequency

WVWidth-Active

HVHorizontal Valid

HBPHorizontal Back Porch

HFPHorizontal Front Porch

NOTEUNITMAXTYPMINITEM

Ns6.336.416.49t

MHz158156152f

208820802072tHPPeriod

CLK

t

323232t

HP124712451243tVPPeriod

t

Hz60.5760.24159.91f

666t

192019201920t

888072t

504840t

tHP

t

CLK

Data

Enable

VVVertical Valid

VBPVertical Back Porch

VFPVertical Front Porch

120012001200t

373635t

432t

Note: Hsync period and Hsync width-active should be even number times of t

times of t

CLK, display control signal can be asynchronous. In order to operate this LCM a Hsync,

Vsyn, and DE(data enable) signals should be used.

1. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rates.

2. Vsync and Hsync should be keep the above specification.

3. Hsync Period, Hsync Width, and Horizontal Back Porch should be any times of of character

number(8).

4. The polarity of Hsync, Vsync is not restricted.

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WH+ tHBP+ tHFP168160152-Horizontal Blank

t

tHP

tWV+ tVBP+ tVFP474543-Vertical Blank

CLK. If the value is odd number

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