LG.Philips LCD LM157E1-A2 Specification

LM157E2-A2

Product Specification

SPECIFICATION

FOR

APPROVAL

(

) Preliminary Specification

(

) Final Specification



Title 15.7” SXGA TFT LCD

BUYER DID(Gateway) SUPPLIER LG.Philips LCD Co., Ltd.
MODEL *MODEL LM157E2

SUFFIX A2

* When you obtain standard

please use the above model name without suffix.

SIGNATURE

/

/

/

DATE APPROVED BY

* When you obtain standard approval ,

* When you obtain standard * When you obtain standard

please use the above model name without suffix.

please use the above model name without suffix.please use the above model name without suffix.

S.H. Kang / G.Manager

REVIEWED BY

B.K. Kim / Manager

J.T. Kim / Manager

PREPARED BY

S.H.Kim / Engineer

K.K.Jang / Manager

approval ,

approval ,approval ,

DATE

Please return 1 copy for your confirmation
with your signature and comments.

The preliminary document is subject to change without prior notice.

Ver 1.0 SEP 30, 2000 Page 1/24

Product Engineering Dept.

LG.Philips LCD Co., Ltd.

LM157E2-

A2

Product Specification

CONTENTS

NO. ITEM Page

- COVER 1

-CONTENTS 2

- RECORD OF REVISION 3
1 GENERAL DESCRIPTION 4
2 MAXIMUM RATINGS 5

3 ELECTRICAL SPECIFICATIONS 6
3-1 ELECTRICAL CHARACTERISTICS 6
3-2 INTERFACE CONNECTION 7
3-3 SIGNAL TIMING SPECIFICATIONS 9
3-4 SIGNAL TIMING WAVE FORMS 10
3-5 COLOR INPUT DATA REFERENCE 11
3-6 POWER SEQUENCE 12

4 OPTICAL SPECIFICATIONS 13

5 MECHANICAL CHARACTERISTICS 15

6RELIABILITY 18

7 INTERNATIONAL STANDARDS 19
7-1 SAFETY 19
7-2 EMC 19

8 PACKING 20
8-1 DESIGNATION OF LOT MARK 20
8-2 PACKING FORM 20

9 PRECAUTIONS 21

APPENDIX 23
A-1 OPTICAL CHARACTERISTIC MEASUREMENT EQUIPMENT AND METHOD 23
A-2 LUMINANCE 23
A-3 RESPONSE TIME 23
A-4 VIEWING ANGLE 24

Ver 1.0 SEP 30, 2000 Page 2/24

LM157E2-

Product Specification

RECORDS OF REVISIONS

Version No Date Page DESCRIPTION

A2

1.0 SEP.30, 2000 -

Final Specification

Ver 1.0 SEP 30, 2000 Page 3/24

LM157E2-

A2

Product Specification

1. General Description

The LM157E2-A2 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode
Fluorescent Lamp(CCFL) back light system. The m atrix employs a-Si Thin F ilm Transistor as the active
element. It is a transmiss ive type display operating in the normally white mode. This TFT -LCD has a 15.7
inch diagonally measured active display area with SXGA resolution(1024 vertic al by 1280 horizontal pixel
array). Each pix el is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical
stripes. Gray scale or the brightness of the sub- pixel color is determined with a 8-bit gray scale s ignal
for each dot, thus, presenting a palette of more than 16,777,216 colors.

The LM157E2-A2 has been designed to apply the interface method that enables low power, high speed
low EMI. FPD Link must be used as a LVDS(Low Voltage Differential Signaling) chip.

The LM157E2-A2 is intended to support applic ations where thin thickness and low power consumption
are critical factors and graphic displays are im portant. In com bination with the vertic al arrangem ent of the
sub-pixels, the LM157E2-A2 characteristic s provide an excellent flat panel display for office automation
products such as monitors.

RGB

Column Driver

LVDS

Pair#1

Timing Control

LVDS

Pair #2

CN2

& LVDS 1Chip

Power

Block

G1

Row

Driver

circuiit

G1024

S1

TFT-LCD

(1280 x RGB x 1024

Backlight 2EA

S1280

General Features

The following are general feature of the model LM157E1-A2 LCD;
Active screen size 15.7 inches(39.832cm) diagonal
Outline dimensions 335.0(H)  273.5(V)  11.2(D) mm (Typ.)

Pixel pitch 0.243 mm  0.243 mm
Pixel format 1280 horiz. By 1024 vert. pixels
RGB stripe arrangement
Color depth 8-bit, 16,777,216 colors
Luminance,White 200 cd/m
Power Consumption Total 12.57 Watt,typ (2.97 Watt @IV
Weight 1140g (typ)
Display operating mode Transmissive mode, normally white
Surface treatments Hard coating(3H),

A

nti-glare treatment of the front polarizer

2

(5point Average.)

, 9.6Watt@200cd/m2 [Lamp])

AA

Ver 1.0 SEP 30, 2000 Page 4/24

LM157E2-

A2

Product Specification

2. Maximum Ratings

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Values

Min. Max.

Units Notes

Power Input Voltage
Operating Temperature
Storage Temperature

V

cc

T

OP

T

ST

-0.3
0

-20

+3.5

+50
+60

Vdc




Note: 1. Temperature at 5mm above display center of LCD Module.
Ta  40 : 90%RH Max
Ta  40 : Absolute Humidity shall be less than Ta = 40 90%RH .
These shall be no dew condensation.

2. Humidity Min. 5%RH, Max. 95%RH

3. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39 max, and no condention of water.

95% 80%

%

60

40

%

Storage

Wet Bulb

Temperature []

60

50

40

at 25

1,2
1,2



-20

30

20

0

0

0

20 30 40

50

60 70 800

20

5

%

%

Operation

Humidity [(%)RH]

Dry Bulb Temperature []

Ver 1.0 SEP 30, 2000 Page 5/24

LM157E2-

A2

Product Specification

3. Electrical Specifications
3-1. Electrical Characteristics

The LM157E2-A2 requires two power inputs. One is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The other input which powers the CCFL, is typically generated by
an inverter. The inverter is an external unit to the LCD.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

MODULE:
Power Supply Input Voltage
Power Supply Input Current
Differential Impedance
Power Consumption

Vcc

Icc

Zm

Pc

Min. Typ. Max.

3.1

-

90

-

LAMP
Operating Voltage
Operating Current
Established Starting Voltage
at 25

at 0





Operating Frequency
Discharge Stabilization Time
Power Consumption(2CCFL’s)

Life Time

V

BL

I

BL

f

BL

T

S

P

BL

590

(3.0)

30,000

(8.5mA)

-

-

40

-

-

Note)The design of the inverter must have specifications for the lamp in LCD Assembly.

The performance of the Lamp in LCM, for example life time or brightness, is extremely influenced by the
characteristics of the DC-AC Inverter. So all the parameters of an inverter should be carefully designed
so as not to produce too much leakage current from high-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted lighting caused by the mismatch of
the lamp and the inverter(no lighting, flicker, etc) never occurs. When you confirm it, the LCD Assembly

should be operated in the same condition as installed in your instrument
Notes:1. The current draw and power consumption specified is for 3.3 Vdc at 25and fv at 60Hz.
(at chess 8X6 pattern)

2. The variance of the voltage is 10%.

3. The output voltage at the transformer in the inverter must be high considering to the loss of the

ballast capacitor in the inverter.

4. The output of the inverter must have symmetrical(negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the
inverter which has unsymmetrical voltage and unsymmetrical current and spike wave.

Lamp frequency may produce interference with horizontal synchronous frequency and as a result

this may cause beat on the display. Therefore lamp frequency shall be as away as possible from
the horizontal synchronous frequency and from its harmonics in order to prevent interference.

5. The lamp power consumption shown above does not include loss of external inverter.

6. Let’s define the brightness of the lamp after being lighted for 5 minutes as 100%.

T

is the time required for the brightness of the center of the lamp to be not less than 95%.

s

7. The life time is determined as the time at which brightness of lamp is 50% compare to that of

initial value at the typical lamp current on condition of continuous operating at 25 2.

Values

3.3
900
100

2.97

600

(8.0)

58

9.6

(8mA)

-

-

3.5

1400

110

4.62

730

(8.5)

(865)

(1210)

80

10.6

(3mA)

3

-

.

Units Notes

Vdc

mA

Ohm

Watt

V

RMS

mA

V

RMS

V

RMS

KHz

Minutes

Watts

Hrs

1
1

2

3
4

6
5
7

Ver 1.0 SEP 30, 2000 Page 6/24

LM157E2-

A2

Product Specification

3-2. Interface Connections

Interface chip must be used LVDS, part No. DS90CF383MTD(Transmitter), DS90CF384MTD(Receiver)
made by National Semiconductor. Or used the compatible interface chips(TI : SN75LVDS83, Thine).
This LCD employs three inter face connections. A 30-pin connector is used for the module electronics
interface and power interface.

The electronics interface connector is a model DF19K-30P-H manufactured by HIROSE. The pin
configuration for the connector is shown in the table 3.

Table 3. MODULE CONNECTOR PIN CONFIGURATION (LVDS)

Pin Symbol Description Notes

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

3.3V

3.3V

3.3V

3.3V
GND

GND

E_RX0-

E_RX0+

E_Rx1-

E_RX1+

E_RX2-

E_RX2+

E_RXC-

E_RXC+

E_RX3-

E_RX3+

GND
GND

O_RX0-

O_RX0+

O_RX1-

O_RX1+

O_RX2­O_RX2+
O_RXC-

O_RXC+

O_RX3­O_RX3+

GND
GND

3.3V

3.3V

3.3V

3.3V
GROUND
GROUND
Minus Signal of Even Channel 0 (LVDS)
Plus Signal of Even Channel 0 (LVDS)
Minus Signal of Even Channel 1 (LVDS)
Plus Signal of Even Channel 1 (LVDS)
Minus Signal of Even Channel 2 (LVDS)
Plus Signal of Even Channel 2 (LVDS)
Minus Signal of Even Clock Channel(LVDS)
Plus Signal of Even Clock Channel(LVDS)
Minus Signal of Even Channel 3 (LVDS)
Plus Signal of Even Channel 3 (LVDS)
GROUND
GROUND
Minus Signal of Odd Channel 0 (LVDS)
Plus Signal of Odd Channel 0 (LVDS)
Minus Signal of Odd Channel 1 (LVDS)
Plus Signal of Odd Channel 1 (LVDS)
Minus Signal of Odd Channel 2 (LVDS)
Plus Signal of Odd Channel 2 (LVDS)
Minus Signal of Odd Clock Channel(LVDS)
Plus Signal of Odd Clock Channel(LVDS)
Minus Signal of Odd Channel3(LVDS)
Plus Signal of Odd Channel3(LVDS)
GROUND
GROUND

Second Data

First Data

30

Transparent View

Ver 1.0 SEP 30, 2000 Page 7/24

LM157E2-

A2

Product Specification

The backlight interface connector is a model BHR-03VS-1, manufactored by JST. The mating connector
part number is SM02(8.0)B-BHS-1-TB or equivalent. The pin configuration for the connector is shown in
The table below.

Table 4. BACKLIGHT CONNECTOR PIN CONFIGURATION

Pin Symbol Description Notes

1
2
3

HV

Open

LV

Lamp power input

Open

GROUND

1
2

Notes: 1. The input power terminal is colored pink . Ground pin color is white.

2. The lamp ground should be common with GND.

Table 5 Required Signal A ssignment for FlatLink

Pin # Pin Name Required Signals Pin # Pin Name Required Signals

1 Vcc Power supply for TTL input 29 GND Ground pin for TTL
2 D5 TTL Input(R7) 30 D26 TTL Input (Data Enable)

3 D6 TTL Input (R5) 31 TxCLKIN TTL Input clock input
4 D7 TTL Input (G0) 32 PWR DWN Power down input
5 GND Ground pin f or TTL 33 PLL GND Ground pin for PLL
6 D8 TTL Input (G1) 34 PLL VCC Power supply f or P LL
7 D9 TTL Input (G2) 35 PLL GND Ground pin for PLL
8 D10 TTL Input (G6) 36 LVDS GND Ground pin for LVDS

9 Vcc Power supply for TTL input 37 TxOUT3+ Positive LVDS differential dat a output 3
10 D11 TTL Input (G7) 38 TxOUT3- Negative LVDS differential data output 3
11 D12 TTL Input (G3) 39 TxCLKOUT+ Positive LVDS differential clock output
12 D13 TTL Input (G4) 40 TxCLKOUT- Negative LVDS differential cl ock output
13 GND Ground pin for TTL 41 TxOUT2+ Positive LVDS diff erential data output 2
14 D14 TTL Input (G5) 42 TxOUT2- Negative LVDS differential data output 2
15 D15 TTL Input (B0) 43 LVDS GND Ground pin for LVDS
16 D16 TTL Input (B6) 44 LVDS Vcc Power supply for LVDS
17 Vcc Power supply for TTL input 45 TxOUT1+ Positive LVDS differential data output 1
18 D17 TTL Input (B7) 46 TxOUT1- Negative LVDS differential data output 1
19 D18 TTL Input (B1) 47 TxOUT0+ Positive LVDS differential data output 0
20 D19 TTL Input (B2) 48 TxOUT0- Negative LVDS differential data output 0
21 GND Ground pin for TTL 49 LVDS GND Ground pin for LVDS

22
23
24
25

26 Vcc Power supply for TTL input 54 D2 TTL Input (R2)
27 D24 TTL Input (Hsync) 55 D3 TTL Input (R3)
28 D25 TTL Input (Vs ync ) 56 D4 TTL Input (R4)

D20 TTL Input (B3) 50 D27 TTL Input (R6)
D21 TTL Input (B4) 51 D0 TTL Input (R0)
D22 TTL Input (B5) 52 D1 TTL Input (R1)
D23 TTL I nput (RSVD) 53 GND Ground pin for TTL

Notes : Refer to LVDS Transmitter Data Sheet for detail descriptions.

Ver 1.0 SEP 30, 2000 Page 8/24