LG Innotek BK1000 User Manual

User Guide for the LTD-BK1000

Product: LTE_WCDMA Wireless Modem

Model name: LTD-BK1000

Table of Contents

1. Overview

2. Major features

3. Interface

4. Electrical specifications

5. RF specifications

6. Mechanical specifications

7. General specifications

8. Connectors

9. RFx information

10. Approbation FCC

1. Overview

The LTD-BK1000 is a personal mobile communication device that incorporates

the latest compact radio technology, including smaller and lighter components and support for WCDMA(850/1900MHz) bands and LTE(700/850/1700/1900 MHz). This device acts as the vehicle’s telematics system and connects to

WCDMA (HSPA+) and LTE wireless networks and wireless modules to allow

voice and data communication. Furthermore, this device can operate on land and water as well as other similar areas. In LTE mode, the device provides uplink speeds of up to 50 Mbps and downlink speeds of up to 150 Mbps for seamless transfer of data such as movies and video calls. The device also supports the transfer of large amounts of data.

The device communicates with the host system via a standard RS-232 or USB

port, and AT commands and control commands can be used to send data. Voice calls are also possible.

34 x 40 x 3.5 mm (Tolerance

Technology

2. Major features

Dimensions

Weight

Mechanical

Interface

Temperature*

Main chipset

Memory

Standard

TBD g (max)

USB, general purpose I/O pins

Operation: -20 ℃ - +70 ℃ Storage: -40 ℃ - +85 ℃

MDM9628

4Gb(NAND) / 1Gb(SDRAM)

WCDMA (HSPA+)

LTE

– width, length : TBD)

- DL Speed : 14.4 Mbps

- UL Speed : 5.76 Mbps

- DL Speed : 150 Mbps

(L x W x T)

ETC

Band

Power

DC power

Functions

- UL Speed : 50 Mbps

WCDMA B2, B5 LTE B2, B4, B5, B17

WCDMA : Typ. 24dBm (Power Class 3) LTE : Typ. 23dBm (Power Class 3)

4 V

Voice, data, SMS

3. Interface

GND12 GND10 GND6 GND5

GND GND GND GND

GND GND

GND11 GND4

21 A21 C21 E21 G21 I21 K 21 M21 O21 Q21 S21 U21 W21 Y21 AA21 AC21 AE21

GND MAIN_ANT GND GND G ND GND GND GND G ND GND GND G ND GND GND ANT_DIV GND

20 B20 D20 F20 H20 J20 L20 N20 P20 R20 T20 V20 X20 Z20 AB20 A D20

GND GND M AIN_ANT_DTC_EN GND GND G ND GND GND GND GND GND GND DIV_ANT_DTC_EN GND GND

19 A19 C19 E19 G19 I19 K 19 M19 O19 Q19 S19 U19 W19 Y19 AA19 AC19 AE19

GND GND ADC 1 GND GND GND GND GND G ND GND GND GND GND ADC2 GND GND

18 B18 D18 F18 H18 J18 L18 N18 P18 R18 T18 V18 X18 Z18 AB18 A D18

GND GND GND GND GND G ND GND GND GND GND GND G ND G ND GND GND

17 A17 C17 E17 G17 I17 K 17 M17 O17 Q17 S17 U17 W17 Y17 AA17 AC17 AE17

VPH_PWR GND GND GND GND GND GND G ND G ND GND GND GND GND GND G ND GND

16 B16 D16 F16 H16 J16 L16 N16 P16 R16 T16 V16 X16 Z16 AB16 A D16

VPH_PWR GND GND GND GND GND GND G ND G ND GND GND GND GND GND G ND

15 A15 C15 E15 G15 I15 W15 Y15 AA15 AC15 AE15

VPH_PWR GND GND GND GND GND GND GND GND GND

14 B14 D14 F14 H14 N14 P14 R14 X14 Z14 AB14 A D14

VPH_PWR GND GND GND GND GND GND GND GND GND G ND

13 A13 C13 E13 G13 I13 M13 O13 Q13 S13 W13 Y13 AA13 AC13 AE13

GND GND GND GND GND GND GND GND GND GND GND GND GND GND

12 B12 D12 F12 H12 N12 P12 R12 X12 Z12 AB12 A D12

NC G ND GND GND GND GND GND GND G ND GND GND

11 A11 C11 E11 G11 I11 M11 O11 Q11 S11 W11 Y11 AA11 AC11 AE11

GND GND GND GND GND GND GND GND GND SGMII_RX_M SGMII_TX_P EPHY_RST_N SGM II_CLK EPHY_INT_N

10 B10 D10 F10 H10 N10 P10 R10 X10 Z10 AB10 A D10

GND GND GND GND GND GND GND SGMII_RX_P SGMII_TX_M SGMII_DATA GND

9 A9 C9 E9 G9 I9 M9 O9 Q9 S9 W9 Y9 AA9 A C9 AE9

VPH_PWR VREG_L11_1P8 GND NC NC GND GND G ND GND GND G ND GND GND MDM _JTAG_SRST_N

8 B8 D8 F8 H8 N8 P8 R8 X8 Z8 AB8 AD8

VPH_PWR VREG_L11_1P8 GND GND GND GND G ND MDM2AP_INT_N AP2MDM_INT_N MDM_JTAG_TCK MDM_JTAG_PS_HOLD

7 A7 C7 E7 G7 I7 W7 Y7 AA7 AC7 AE7

VPH_PWR VPH_PWR GND NC SPI_LEVEL_SHIFT_EN GND COEX_UART_RX GND MDM_JTAG_TMS MDM_JTAG_TRST_N

6 B6 D6 F6 H6 J6 L6 N6 P6 R6 T6 V6 X6 Z6 AB6 AD 6

GND GND GP IO ACC_PWR_ON G ND G PIO GPIO GND SPI_CS_N SPI_CLK GND DSRC_SLP_CLK COEX_UART_TX MDM_JTAG_TDO MDM_JTAG_TDI

5 A5 C5 E5 G5 I5 K5 M5 O5 Q5 S5 U5 W5 Y5 AA5 AC5 AE5

GND NC GPIO GND BOOT_OK UART1_TX UART2_TX UART3_TX SPI_INTERRUPT SPI_MOSI SPI_MISO GND

WLAN_3V_EN_DSRC

GND GND GND

4 B4 D4 F4 H4 J4 L4 N4 P4 R4 T4 V4 X4 Z4 AB4 AD4

MDM_RESOUT_N NC G ND MGS GND UART1_RX UART2_RX UA RT3_RX GND GND GND RFCLK2_QCA DSRC_PP S GND Ehernet_DC-DC_EN

3 A3 C3 E3 G3 I3 K3 M3 O3 Q3 S3 U3 W3 Y3 AA3 AC3 AE3

PHONE_ON_N LGA_RESIN_N GND 96H_END UIM1_PRESENT GND GND GND SDC_DATA3 SDC_DATA2 GND P CM_EN PCM_DIN WLAN_EN_DSRC GND VREG_L5_UIM2

2 B2 D2 F2 H2 J2 L2 N2 P2 R2 T2 V2 X2 Z2 AB2 AD2

GND GND VREG _L6_UIM1 UIM1_CLK GND USB_ID USB_HS_DM GND SDC _DATA1 SDC_DATA0 G ND PCM _CLK GND HSIC_DATA NC

1 A1 C1 E1 G1 I1 K1 M1 O1 Q1 S1 U1 W1 Y1 AA1 AC1 AE1

GND GND UIM 1_RESET UIM1_DATA GND U SB_VBUS USB_HS_DP GND SDC_CMD SDC_CLK GND PCM_SYNC PCM_DOU T GND HSIC_STB NC

GND9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z AA AB AC AD AE GND2

GND GND

GND GND GND GND

GND8 GND7 GND3 GND1

3.1 LGA Pad Layout (Top View)

Figure 1. LGA Pin map

3. Interface

PAD. NAME

DIRECTION

DESCRIPTION

Antenna Interface Pads

MAIN_ANT

RF Main Antenna

DIV_ANT

RF Diversity Antenna

User Interface Pads

ACC_PWR_ON

BOOT_OK

MSG

96H_END

MAIN_ANT_DTC_EN

Main ANT Detect Enable

DIV_ANT_DTC_EN

Diversity ANT Detect Enable

SPI_LEVEL_SHIFT_EN

SPI LEVEL SHIFT Enable

ETHERNET_DCDC_ENABLE

Ethernet power enable

GPIO1

General purpose I/O

GPIO2

General purpose I/O

GPIO3

Input/Output (Not support INTERR UPT)

General purpose I/O

GPIO4

General purpose I/O

ADC Interface Pads

ADC1

ADC Convertor input for main antenna detect

ADC2

ADC Convertor input for diversity antenna detect

PCM Interface Pads

PCM_EN

PCM 3.3 Level Shifter Enable

PCM_CLK

PCM Clock

PCM_SYNC

PCM Frame Sync

PCM_DIN

PCM Data In

PCM_DOUT

PCM Data Out

JTAG Pin Description

MDM_JTAG_TMS

JTAG mode select input

MDM_JTAG_PS_HOLD

JTAG PS HOLD detect

MDM_JTAG_TDI

JTAG data input

MDM_JTAG_TRST_N

JTAG reset for debug

MDM_JTAG_TDO

JTAG debugging

MDM_JTAG_TCK

JTAG clock input

MDM_JTAG_SRST_N

JTAG reset

USB Interface Pads

USB_HS_DM

USB high speed data (minus)

USB_HS_DP

USB high speed data (plus)

USB_VBUS

USB power

USB_ID

USB ID

SDIO Interface Pads

SDC_CLK

Secure digital controller clock

SDC_CMD

Secure digital controller command

SDC_DATA0

Secure digital controller data bit 0

SDC_DATA1

Secure digital controller data bit 1

SDC_DATA2

Secure digital controller data bit 2

3.2 Pin description

C21

AC21

H6

I5

H4

G3 F20 Z20

I7

AD4

F6

E5

L6

N6

E19

AA19

W3

X2

W1

Y3

Y1

AC7

AD8 AD6 AE7 AB6 AB8 AE9

N2

M1

K1

L2

S1

Q1

T2

R2

S3

Input/Output

Input

Output

Input Input

Output

Input

Output

Input/Output

input

Input

Output

Input

Input/Output

Input

Output

Input/Output Input/Output Input/Output

Input/Output

(Do not use

with External PU)

Table 1. Pin descriptions

3. Interface

SDC_DATA3

Secure digital controller data bit 3

SGMMI Interface Pads

EPHY_RST_N or UIM2_RESET

Ethernet PHY reset

EPHY_INT_N or UIM2_DETECT

Ethernet PHY interrupt

SGMII_DATA or UIM2_CLK

SGMII input Output data

GND

Ground

SGMII_RX_P

SGMII receive

SGMII_RX_M

SGMII receive

SGMII_TX_M

SGMII transmit

SGMII_TX_P

SGMII transmit

SGMII_CLK or UIM2_DATA

SGMII clock

SPI Interface Pads

SPI_MOSI

SPI Serial Output

SPI_CLK

SPI Serial Clock

SPI_CS_N

SPI Chip Select

SPI_MISO

SPI Serial input

SPI_INTERRUPT

MICOM → LGA SPI interrupt

UART Interface Pads

UART2_TX

UART2 Transmit data

UART2_RX

UART2 Receive data

UART1_TX

Debug UART5 Transmit Data

UART1_RX

Debug UART5 Receive Data

UART3_TX

UART6 Transmit data

UART3_RX

UART6 Receive data

USIM Interface Pads

UIM1_PRESENT

Detection of an external UIM card

UIM1_CLK

Clock Output to an external UIM card

UIM1_RESET

Reset Output to an external UIM card

UIM1_DATA

Data connection with an external UIM card

VREG_L6_UIM1

Supply Output for an external UIM card

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

HSIC Pin Description

HSIC_DATA

HSIC data

HSIC_STB

HSIC Strobe signal

NC

No Connect

NC

No Connect

DSRC Pin Description

COEX_UART_RX

LTE receiver sync for coexistence with UART

COEX_UART_TX

LTE transmitter sync for coexistence with UART

RFCLK2_QCA

Low noise RF clock Output

WLAN_EN_DSRC

WLAN Enable

Q3

AA11

AE11 AB10

AD10

X10

W11

Z10

Y11

AC11

S5 T6 R6 U5 Q5

M5 N4 K5

L4 O5 P4

I3 H2 E1

G1

F2 E3

D2 A1 C1 B2

AB2 AC1 AD2

AE1

Y7

Z6 X4

AA3

Input/Output

Input

Output

Input

Output

Input

Output

Input

Output

Input

Output

Input/Output

Output

Input/Output

Input

Output

Input

- plus

-minus

- plus

-minus

Table 1. Pin descriptions

3. Interface

DSRC_SLP_CLK

DSRC sleep clock

WLAN_3V_EN_DSRC

Used for WLAN enable

DSRC_PPS

Pulse Per Second

MDM2AP_INT_N

MDM to AP interrupt, PCM_LDO_EN

AP2MDM_INT_N

AP to MDM interrupt

Control Pads

LGA_PHONE_ON

ON/OFF Control

MDM_RESOUT_N

Reset Output

LGA_RESIN_N

External Reset Input

Power Supply Pads

VPH_PWR for PAM

power supply (4.0V)

VPH_PWR for PAM

power

VPH_PWR for PAM

power

VPH_PWR for PAM

power

VPH_PWR for PMIC

power

VPH_PWR for PMIC

power

VPH_PWR for PMIC

power

VPH_PWR for PMIC

power

Voltage Reference Pad

VREG_L11_1P8

LDO out for 1.8V pull up

VREG_L11_1P8

LDO out for 1.8V pull up

Voltage Reference for SGMII (VREG_L5_UIM2) – Ethernet

IO

Ethernet I/O voltage

NC Pads

NC

No Connect

NC

No Connect

NC

No Connect

NC

No Connect

NC

No Connect

NC

No Connect

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

X6 Y5 Z4 X8 Z8

A3 B4

C3

A17 B16 A15 B14

A9 B8

A7

C7 C9

D8

AE3

G9

B12

I9

G7 C5 D4

A21 E21 G21

I21 K21 M21 O21 Q21 S21 U21

W21

Y21

AA21 AE21

B20 D20 H20

J20

Output

Input/Output

Output Input

Input

Output

Input

Input Input Input Input

Input Input

Input

Output Output

전압 level

Output

supply (4.0V) supply (4.0V) supply (4.0V) supply (4.0V) supply (4.0V)

supply (4.0V)

Table 1. Pin descriptions

3. Interface

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

L20 N20 P20 R20 T20 V20 X20

AB20 AD20

A19 C19 G19

I19

K19 M19 O19 Q19 S19 U19

W19

Y19

AC19 AE19

B18 D18 F18

H18

J18

L18 N18 P18 R18 T18 V18 X18 Z18

AB18 AD18

C17 E17 G17

I17 K17 M17 O17 Q17 S17 U17

W17

Y17

Table 1. Pin descriptions

3. Interface

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

GND

Ground

AA17 AC17 AE17

D16 F16 H16

J16

L16 N16 P16 R16 T16 V16 X16 Z16

AB16 AD16

C15 E15 G15

I15

W15

Y15

AA15 AC15 AE15

D14

F14

H14 X14 Z14

AB14 AD14

A13

C13

E13 G13

I13

W13

Y13

AA13

AC13

AE13

D12 F12 H12 X12 Z12

AB12 AD12

Table 1. Pin descriptions

LG Innotek BK1000 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual