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LP173WF3-SLB1
Specification
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LG Display LP173WF3-SLB1 Specification

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LP173WF3
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
() Preliminary Specification
()Final Specification
Title 17.3” FHD TFT LCD
BUYER DELL
MODEL
APPROVED BY SIGNATURE
/
/
SUPPLIER LG Display Co., Ltd.
*MODEL LP173WF3
Suffix SLB1
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
S.R. Kim / S.Manager
REVIEWED BY
M. J. Lee / S.Manager
SIGNATURE
/
Please return 1 copy for your confirmation with your signature and comments.
Ver. 0.4
Ver. 0.4
28. Jun. 2011
28. Jun. 2011
PREPARED BY
J. P. Lee / Engineer
J. I. Joo / Engineer
Products Engineering Dept.
LG Display Co., Ltd
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LP173WF3
Liquid Crystal Display
Product Specification
Contents
No ITEM
COVER
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTREISTICS
3-2 INTERFACE CONNECTIONS
3-3 LVDS SIGNAL TIMING SPECIFICATIONS
3-4 SIGNAL TIMING SPECIFICATIONS
3-5 SIGNAL TIMING WAVEFORMS
3-6 COLOR INPUT DATA REFERNECE
3-7 POWER SEQUENCE
4 OPTICAL SFECIFICATIONS
Page
1
2
3
4
5
6
7
8
11
11
12
13
14
Ver. 0.4
Ver. 0.4
5 MECHANICAL CHARACTERISTICS
6 RELIABLITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
8 PACKING
8-1 DESIGNATION OF LOT MARK
8-2 PACKING FORM
9 PRECAUTIONS
A APPENDIX. Enhanced Extended Display Identification Data
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LP173WF3
Liquid Crystal Display
Product Specification
RECORD OF REVISIONS
Revision No Revision Date Page Description
0.0 10. Sep. 2010 - First draft 0.0
0.1 03. May. 2011 6 Update Electrical Characteristics 0.1
11 Update Timing Table -
14-15 Update Optical Specification -
30 Update Designation of Lot Mark -
33-35 Update E-EDID Table -
0.2 17. May. 2011 14 Update Optical Specification 0.2
33-35 Update E-EDID Table (Change checksum 4A Æ B9) -
0.3 25. May. 2011 33-35 Update E-EDID Table (Change checksum B9 Æ 31) 0.3
0.4 28. Jun. 2011 6 Update Electrical Characteristics 0.3
EDID
ver
Ver. 0.4
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28. Jun. 2011
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1. General Description
The LP173WF3 is a Color Active Matrix Liquid Crystal Display with an integral RGB LED backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally black mode. This TFT-LCD has 17.3 inches diagonally measured active display area with Full HD resolution(1920 horizontal by 1080 vertical pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 10-bit gray scale signal for each dot, thus, presenting a palette of more than 1.073G(True) colors.
The LP173WF3 has been designed to apply the interface method that enables low power, high speed, low EMI. The LP173WF3 is intended to support applications where thin thickness, low power are critical factors and graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the LP173WF3(SLB1) characteristics provide an excellent flat display for office automation products such as Notebook PC.
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LP173WF3
Liquid Crystal Display
Product Specification
General Features
Active Screen Size 17.3 inches diagonal Outline Dimension(max) 398.1 (H, typ.) Ý 234.3 (V, typ.) Ý 7.2(D, max.) mm Pixel Pitch 0.199mm Ý 0.199 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels RGB strip arrangement
Color Depth 10-bit, 1.073G colors
2
Luminance, White 300 cd/m
Power Consumption 18.2W (Typ.) [4.10W (Logic, Typ.) + 14.1W (B/L, Typ.)]
Weight (Max.) 830g
Display Operating Mode Transmissive mode, Normally black
Surface Treatment
BFR / PVC / As Free
Ver. 0.4
Ver. 0.4
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୅
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
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LP173WF3
Liquid Crystal Display
Product Specification
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
VCC -0.3 4.0 Vdc at 25 r 5qC
TOP 050qC1
HST -20 60 qC1
HOP 10 90 %RH 1
HST 10 90 %RH 1
Values
Units Notes
Min Max
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39
qC Max, and no condensation of water.
Note : 2. Storage Condition is guaranteed under packing condition.
90% 80%
60%
Humidity[(%)RH]
Storage
40%
Operation
20%
10%
Wet Bulb Temperature [
20
10
0
60
50
]
40
30
-20
10
20 30 40 50
60 70 800
Dry Bulb Temperature [୅]
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3. Electrical Specifications
3-1. Electrical Characteristics
The LP173WF3(SLB1) requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and liquid crystal. The second input which powers the LED, is typically generated by an LED Driver. The LED Driver is an internal unit to the LCD.
Table 2. ELECTRICAL CHARACTERISTICS
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LP173WF3
Liquid Crystal Display
Product Specification
Parameter Symbol
MODULE :
Power Supply Input Voltage VCC 3.0 3.3 3.6 V
Power Supply Input Current I
Power Consumption Pc - 4.1 4.92 Watt 1
Differential Impedance
LED Backlight :
Power Supply Input Voltage V
Operating Voltage V
Operating Current per string I
Power Consumption P
Life Time 15,000 - - Hrs 5
CC
Zm
BL+
LED (R,G,B)
LED (R,G,B)
BL
Min Typ Max
1.03 1.24 1.49 A 1
90 100 110 Ohm 2
7.5 14.4 21 V
--45V3
--50mA3
Values
Unit Notes
DC
DC
14.1 16.2 Watt 4
Note)
1. The specified current and power consumption are under the Vcc = 3.3V , 25୅, fv = 60Hz condition
whereas Mosaic pattern (8x6) is displayed and fv is the frame frequency.
2. This impedance value is needed to proper display and measured form LVDS Tx to the mating connector.
3. RGB LED
Operating Voltage and Operating Current per string should be within Max. SPEC.
4. The LED power consumption ( Typ ) shown above does include power of internal LED driver circuit for typical current condition. ( Luminance = 300nit condition ) The power consumption ( Max ) condition is R,G,B LED 100% Dimming.
5. The life time is determined as the time at which brightness of LED is 50% compare to that of initial value at the typical LED current.
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3-2. Interface Connections
This LCD employs two interface connections, a 50 pin connector is used for the module electronics interface and the other connector is used for the integral backlight system.
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LP173WF3
Liquid Crystal Display
Product Specification
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1
Pin Symbol Description
1 GND Ground
2 AVDD Power Supply, 3.3V Typ.
3 AVDD Power Supply, 3.3V Typ. 4 AVDD Power Supply, 3.3V Typ. 5 AVDD Power Supply, 3.3V Typ. 6 AVDD Power Supply, 3.3V Typ. 7 AVDD Power Supply, 3.3V Typ. 8 AVDD Power Supply, 3.3V Typ.
9 DVDD Digital Power supply (3.3V Typ) 10 DVDD Digital Power supply (3.3V Typ)
11 BIST BIST
12 Clk EEDID Two wire serial interface clock 13 DATA EEDID Two wire serial interface data 14 GND Ground 15 RXinO0- - LVDS differential data input, Chan 0-Odd 16 RXinO0+ + LVDS differential data input, Chan 0-Odd 17 GND Ground 18 RXinO1 - LVDS differential data input, Chan 1-Odd 19 RXinO1+ + LVDS differential data input, Chan 1-Odd 20 GND Ground 21 RXinO2- - LVDS differential data input, Chan 2-Odd 22 RXinO2+ + LVDS differential data input, Chan 2-Odd 23 GND Ground 24 RXOC- - LVDS Differential Clock input (Odd) 25 RXOC+ + LVDS Differential Clock input (Odd) 26 GND Ground 27 RXinO3- - LVDS differential data input, Chan 3-Odd 28 RXinO3+ + LVDS differential data input, Chan 3-Odd 29 GND Ground 30 RXinO4- - LVDS differential data input, Chan 4-Odd 31 RXinO4+ + LVDS differential data input, Chan 4-Odd 32 GND Ground 33 RXinE0- - LVDS differential data input, Chan 0-Even 34 RXinE0+ + LVDS differential data input, Chan 0-Even 35 GND Ground 36 RXinE1- - LVDS differential data input, Chan 1-Even 37 RXinE1+ + LVDS differential data input, Chan 1-Even 38 GND Ground 39 RXinE2- - LVDS differential data input, Chan 2-Even 40 RXinE2+ + LVDS differential data input, Chan 2-Even 41 GND Ground 42 RXEC- - LVDS Differential Clock input (Even) 43 RXEC+ + LVDS Differential Clock input (Even) 44 GND Ground 45 RXinE3- - LVDS differential data input, Chan 3-Even 46 RXinE3+ + LVDS differential data input, Chan 3-Even 47 GND Ground 48 RXinE4- - LVDS differential data input, Chan 4-Even 49 RXinE4+ + LVDS differential data input, Chan 4-Even 50 GND Ground
)
Notes
1, Interface chips
1.1 LCD : LGE (MAKO) including LVDS Receiver, VESA LVDS 10bit Format
1.2 System :
* Pin to Pin compatible with LVDS
2.Connector
2.1 LCD : JAE FI-VHP50S-A-HF11
or equivalent
2.2 Mating: JAE or equivalent
2.3 Connector pin arrangement
LCD rear view
1
[LCD Module Rear View]
50
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3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
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LP173WF3
Liquid Crystal Display
Product Specification
Description
LVDS Differential Voltage |V
LVDS Common mode Voltage V
LVDS Input Voltage Range V
3-3-2. AC Specification
Description Symbol Min Max Unit Notes
LVDS Clock to Data Skew Margin
Symb
ol
| 100 600 mV -
ID
CM
IN
t
SKEW
t
SKEW
Min Max Unit Notes
0.6 1.8 V -
0.3 2.1 V -
- 400 + 400 ps
- 600 + 600 ps
85MHz > Fclk ˻
65MHz > Fclk ˻
65MHz
25MHz
LVDS Clock to Clock Skew Margin (Even to Odd)
Maximum deviation of input clock frequency during SSC
Maximum modulation frequency of input clock during SSC
Ver. 0.4
Ver. 0.4
t
SKEW_EO
F
DEV
F
MOD
28. Jun. 2011
28. Jun. 2011
-1/7 + 1/7 T
clk
- · 3% -
- 200 KHz -
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Freq.
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LP173WF3
Liquid Crystal Display
Product Specification
< Clock skew margin between channel >
F
max
F
center
F
min
3-3-3. Data Format
1) LVDS Data Port
X
m
tvk
< Spread Spectrum >
m

QGm
Time
kl}
< LVDS Data Format >
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Table 4. BACKLIGHT CONNECTOR PIN CONFIGURATION (CN2)
Pin Symbol Description Notes
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LP173WF3
Liquid Crystal Display
Product Specification
1 GND Ground
2 Reserved Reserved
3 BLIM
4 BL_Enable
5 GND Ground
6 I2C_CLK CLK for RGB control
7 I2C_DATA DATA for RGB control
8 GND Ground
9 NC No Connection
10 VBL- Ground
11 VBL- Ground
12 VBL- Ground
13 VBL- Ground
14 VBL- Ground
15 VBL+ 7.5V - 21V LED Power
16 VBL+ 7.5V - 21V LED Power
17 VBL+ 7.5V - 21V LED Power
PWM for Luminance Control (720~1KHz, 3.3V, 5~100%) or DC(0~3.3v)
BL On/Off Control (On: 3.0~3.6v, Off: 0~0.5v)
1. Connector
1.1 LCD : Hirose DF19KR or equivalent
1.2 Mating : Hirose equivalent.
1.3 Connector pin arrangement
1
[LCD Module Rear View]
20
18 VBL+ 7.5V - 21V LED Power
19 VBL+ 7.5V - 21V LED Power
20 GND Ground
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3-3. Signal Timing Specifications
This is the signal timing required at the input of the User connector. All of the interface signal timing should be satisfied with the following specifications and specifications of LVDS Tx/Rx for its proper operation.
ITEM Symbol Min Typ Max Unit Note
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LP173WF3
Liquid Crystal Display
Product Specification
Table 5. TIMING TABLE
DCLK Frequency f
Period
Hsync
Width t
Width-Active t
Period t
Vsync
Width-Active t
Horizontal back porch t
Data
Enable
Horizontal front porch t
Vertical back porch t
Vertical front porch t
CLK
t
WH
WHA
WV
WVA
HBP
HFP
VBP
VFP
67.17 69.35 72.65 MHz LVDS 2 Port
HP
1020 1040 1078
16 16 16
960 960 960
VP
1096 1111 1122
55 5
1080 1080 1080
34 40 50
10 24 52
10 23 28
13 9
3-4. Signal Timing Waveforms (Normal status)
Data Enable, Hsync, Vsync
tCLK
DCLK
0.5 Vcc
High: 0.7VCC
Low: 0.3VCC
tCLK
tHPWidth t
tCLK
tHP
Condition : VCC =3.3V
t
Hsync
t
WH
t
HBP
HP
tWHA
t
HFP
Data Enable
t
VP
t
WV
Vsync
t
VBP
tWVA
t
VFP
Data Enable
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