LG Display LP173WF1-TLB5 Specification

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()Preliminary Specification
( Ⴠ ) Final Specification

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LP173WF1

Liquid Crystal Display

Product Specification

SPECIFICATION

FOR

APPROVAL

Title 17.3” FHD TFT LCD

BUYER

MODEL

APPROVED BY

/

/

/

SIGNATURE

SUPPLIER LG Display Co., Ltd.

*MODEL LP173WF1

Suffix TLB5

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY SIGNATURE

H.S. Kim / S.Manager

REVIEWED BY

M.J.Lee / Manager

PREPARED BY

J. P. Lee / Engineer
G. I. Seo / Engineer

Please return 1 copy for your confirmation with
your signature and comments.

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Product Engineering Dept.

LG Display Co., Ltd

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LP173WF1

Liquid Crystal Display

Product Specification

Contents

No ITEM

COVER

CONTENTS

RECORD OF REVISIONS

1 GENERAL DESCRIPTION

2 ABSOLUTE MAXIMUM RATINGS

3 ELECTRICAL SPECIFICATIONS

3-1 ELECTRICAL CHARACTREISTICS

3-2 INTERFACE CONNECTIONS

3-3 LVDS SIGNAL TIMING SPECIFICATIONS

3-4 SIGNAL TIMING SPECIFICATIONS

3-5 SIGNAL TIMING WAVEFORMS

3-6 COLOR INPUT DATA REFERNECE

3-7 POWER SEQUENCE

Page

1

2

3

4

5

6

8

9

11

11

12

13

4 OPTICAL SFECIFICATIONS

5 MECHANICAL CHARACTERISTICS

6 RELIABLITY

7 INTERNATIONAL STANDARDS

7-1 SAFETY

7-2 EMC

7-3 Environment

8 PACKING

8-1 DESIGNATION OF LOT MARK

8-2 PACKING FORM

9 PRECAUTIONS

A APPENDIX A. Enhanced Extended Display Identification Data

14

17

27

28

28

28

29

29

30-31

32-34

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LP173WF1

Liquid Crystal Display

Product Specification

RECORD OF REVISIONS

Revision No Revision Date Page Description

0.0 Oct. 07. 2009 - First Draft -

0.1 Nov.09.2009 32-34 Updated EDID 0.0

0.2 Mar.02.2010 4 Update General Features

6 Update Electrical characteristics

14-15 Update Optical Specification

19 Update rear view Label

32-34 Update EDID 0.1

1.0 Aug.08.2011 - Final Specification 1.0

EDID

ver

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LP173WF1

Liquid Crystal Display

Product Specification

1. General Description

The LP173WF1 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally white mode. This TFT-LCD has 17.3 inches diagonally measured active display area with FHD
resolution (1920 horizontal by 1080 vertical pixel array). Each pixel is divided into Red, Green and Blue sub­pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP173WF1 has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP173WF1 is intended to support applications where thin thickness, low power are
critical factors and graphic displays are important. In combination with the vertical arrangement of the sub­pixels, the LP173WF1 characteristics provide an excellent flat display for office automation products such as
Notebook PC.

User connector

40

Pin

General Features

Active Screen Size 17.3 inches diagonal

Outline Dimension 398.1(H, Typ.)  232.8(V, Typ.)  6.0(D, Max.) mm

Pixel Pitch 0.1989 X 0.1989 mm

Pixel Format 1920 horiz. by 1080 vert. Pixels RGB strip arrangement

Color Depth 6-bit, 262,144 colors

Luminance, White 300 cd/m

Power Consumption Total 8.5W(Typ.) Logic : 2.0W (Typ.@ Mosaic), B/L : 6.5W (Typ.@ VLED 12V )

Weight 580g (Max.)

Display Operating Mode Transmissive mode, normally white

Surface Treatment Anti Glare treatment (3H) of the front Polarizer

EEPROM Block

EEPROM Block

for EDID

for EDID

EEPROM Block

EEPROM Block

for Tcon Operating

for Tcon Operating

Timing Control

LVDS

2port

VCC

VLED

LED_EN

PWM

Timing Control

(Tcon) Block

(Tcon) Block

DVCC

Power

Power

Block

Block

LED Driver

LED Driver

Block

Block

TCLKs

VGH, VGL, GMA

Control & Data Power

2

(Typ., @ I

M

i

n

i

-

L

V

D

S

DVCC, AVDD

GIP CLKs, DSC

VOUT_LED

FB1~6

=22mA)

LED

1

1080

1920

TFT-LCD Panel

(FHD, GIP, TN)

Source Driver

(Bottom Bent)

LED Backlight Ass’y

EDID signal & Power

RoHS Compliance Yes

BFR / PVC / As Free Yes for all

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Liquid Crystal Display

Product Specification

2. Absolute Maximum Ratings

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.

Table 1. ABSOLUTE MAXIMUM RATINGS

LP173WF1

Parameter Symbol

Power Input Voltage

Operating Temperature

Storage Temperature

Operating Ambient Humidity

Storage Humidity

VCC -0.3 4.0 Vdc at 25 r 5qC

TOP

HST

HOP

HST

Values

Units Notes

Min Max

050qC1

-20 60 qC1

10 90 %RH 1

10 90 %RH 1

Note : 1. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be 39

Wet Bulb
Temperature [

]

qC Max, and no condensation of water.

90% 80%

60

50

60%

Humidity[(%)RH]

Storage

40

30

20

10

0

-20

10

20 30 40 50

60 70 800

Dry Bulb Temperature [ഒ]

Ver. 1.0 Aug.08.2011

40%

Operation

20%

10%

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LP173WF1

Liquid Crystal Display

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

The LP173WF1 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL.with LED Driver.

Table 2. ELECTRICAL CHARACTERISTICS

Values

Parameter Symbol

Min Typ Max

LOGIC :

Unit Notes

Power Supply Input Voltage

Power Supply Input Current

Power Consumption

Power Supply Inrush Current

LVDS Impedance

V

I

P

I

CC_P

Z

LVDS

CC

CC

CC

3.0 3.3 3.6 V 1

- 600 680 mA 2

- 1.98 2.24 W 2

- 770 900 mA 3

90 100 110 ˖ 4

BACKLIGHT : ( with LED Driver)

LED Power Input Voltage

LED Power Input Current

LED Power Consumption

LED Power Inrush Current

V

LED

I

LED

P

LED

I

LED_P

7.0 12.0 21.0 V 5

- 540 565 mA 6

- 6.48 6.78 W 6

- 450 550 mA 7

PWM Duty Ratio 5 - 100

Z

F

-

PWM

PWM

0-0.2%9

20 40 60 k˖

200 - 1000

PWM Jitter

PWM Impedance

PWM Frequency

%

Hz

8

10

PWM High Level Voltage

PWM Low Level Voltage

LED_EN Impedance

LED_EN High Voltage

LED_EN Low Voltage

V

PWM_H

V

PWM_L

Z

PWM

V

LED_EN_H

V

LED_EN_L

3.0 - 5.3

0-0.3V

20 40 60 k˖

3.0 - 5.3 V

0-0.3V

Life Time 12,000 - - Hrs 11

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Liquid Crystal Display

Product Specification

Note)

1. The measuring position is the connector of LCM and the test condition is under 25ഒ, fv = 60Hz,

Black pattern.

2. The specified Icc current and power consumption are under

the Vcc = 3.3V , 25ഒ, fv = 60Hz condition whereas Mosaic pattern
is displayed and fv is the frame frequency.

3. The below figures aire the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same the minimum of T1 at Power on sequence.

LP173WF1

Rising time
Vcc

0V

10%

90%

3.3V

0.5ms

4. This impedance value is needed to proper display and measured form LVDS Tx to the mating connector.

5. The measuring position is the connector of LCM and the test conditions are under 25ഒ.

6. The current and power consumption with LED Driver are under the V

LED = 12.0V , 25ഒ, Dimming of

Max luminance whereas White pattern is displayed and fv is the frame frequency.

7. The below figures are the measuring V
and the V

V

LED control block is same with Vcc control block.

LED control block LGD used.

LED condition

Rising time

LED

V

90%

12.0V

0V

10%

0.5ms

8. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.

9. If Jitter of PWM is bigger than maximum. It may cause flickering.

10. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent

to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.

11. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum

value specified in table 8. under general user condition.

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LP173WF1

Liquid Crystal Display

Product Specification

3-2. Interface Connections

This LCD employs one interface connections, a 40 pin connector is used for the module electronics interface.

Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)

Pin Symbol Description Notes

1 NC No Connection (Reserved)

2 VDD Power Supply (3.3V typ.)

3 VDD Power Supply (3.3V typ.)

4 V EEDID DDC 3.3V power

5 NC No Connection (Reserved)

6 CLK EEDID DDC clock / SMBus clock

7 DATA EEDLD DDC data / SMBus data

8 Odd_Rin0- - LVDS differential data input (R0-R5,G0)

9 Odd_Rin0+ + LVDS differential data input (R0-R5,G0)

10 GND Ground

11 Odd_Rin1- - LVDS differential data input (G1-G5,B0-B1)

12 Odd_Rin1+ + LVDS differential data input (G1-G5,B0-B1)

13 GND Ground

14 Odd_Rin2- - LVDS differential data input (B2-B5,HS,VS,DE)

15 Odd_Rin2+ + LVDS differential data input (B2-B5,HS,VS,DE)

16 GND Ground

17 Odd_ClkIN- - LVDS differential clock input

18 Odd_ClkIN+ + LVDS differential clock input

19 GND No Connection

20 Even Rin0- - LVDS differential data input (R0-R5,G0)

21 Even Rin0+ + LVDS differential data input (R0-R5,G0)

22 GND Ground

23 Even Rin1- - LVDS differential data input (G1-G5,B0-B1)

24 Even Rin1+ + LVDS differential data input (G1-G5,B0-B1)

25 GND Ground

26 Even Rin2- - LVDS differential data input (B2-B5,HS,VS,DE)

27 Even Rin2+ + LVDS differential data input (B2-B5,HS,VS,DE)

28 GND Ground

29 Even ClkIN- - LVDS differential clock input

30 Even ClkIN+ + LVDS differential clock input

31

32

33

34 NC No Connection (Reserved)

35 PWM PWM for luminance control

36 LED_EN LED Backlight On/Off

37 NC No Connection (Reserved)

38 VLED

39 VLED

40 VLED

GND

GND

GND

LED power return

LED power return

LED power return

LED Backlight Power (7V-21V)

LED Backlight Power (7V-21V)

LED Backlight Power (7V-21V)

[Interface Chip]

1. LCD :
SW, SW0617(LCD Controller)
Including LVDS Receiver.

2. System : SiW LVDS Rx

or equivalent
* Pin to Pin compatible with LVDS

[Connector]

UJU IS050-L40B-C10
LSMtron GT05Q-40S-H10
or equivalent

[Mating Connector]

I-PEX 20345-#40E-## series
or equivalent

[Connector pin arrangement]

140

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Product Specification

3-3. LVDS Signal Timing Specifications

3-3-1. DC Specification

LP173WF1

Liquid Crystal Display

Description

LVDS Differential Voltage |V

LVDS Common mode Voltage

LVDS Input Voltage Range

3-3-2. AC Specification

Description Symbol Min Max Unit Notes

LVDS Clock to Data Skew Margin

Symb

ol

| 100 600 mV -

ID

V

CM

V

IN

t

SKEW

t

SKEW

Min Max Unit Notes

0.6 1.8 V -

0.3 2.1 V -

- 400 + 400

- 600 + 600

ps

ps

85MHz > Fclk ุ

65MHz > Fclk ุ

65MHz

25MHz

LVDS Clock to Clock Skew Margin (Even
to Odd)

t

SKEW_EO

Maximum deviation

F

of input clock frequency during SSC

DEV

Maximum modulation frequency

F

of input clock during SSC

Ver. 1.0 Aug.08.2011

MOD

- 1/7 + 1/7

T

clk

- s 3% -

- 200 KHz -

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LP173WF1

Liquid Crystal Display

Product Specification

< Clock skew margin between channel >

F

max

F

center

F

min

3-3-3. Data Format

1) LVDS 2 Port



)

02'

< Spread Spectrum >

)

FHQWHU

)

Time

'(9

< LVDS Data Format >

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LP173WF1

Liquid Crystal Display

Product Specification

3-4. Signal Timing Specifications

This is the signal timing required at the input of the User connector. All of the interface signal timing should be
satisfied with the following specifications and specifications of LVDS Tx/Rx for its proper operation.

Table 5. TIMING TABLE

ITEM Symbol Min Typ Max Unit Note

DCLK Frequency

Period

Hsync

Width t

Width-Active t

Period t

Vsync

Width t

Width-Active t

Horizontal back porch

Data

Enable

Horizontal front porch

Vertical back porch

Vertical front porch

f

CLK

t

HP

WH

WHA

VP

WV

WVA

t

HBP

t

HFP

t

VBP

t

VFP

- 74.9 - MHz 2port

1086 1138 1190

32 48 56

tCLK 2port

960 960 960

1093 1097 1101

234

tHP

1080 1080 1080

68 98 134

tCLK 2port

26 32 40

10 12 14

tHP

123

Note)

1. In this documentation, all reliabilities are specified for timing specification based on refresh rate of 60Hz.
However, LP173WF1 has a good actual performance even at lower refresh rate( eg. 40Hz or 50Hz) for
power saving mode, whereas LP173WF1 is secured only for function under lower refresh rate.
60Hz at Normal mode, 50Hz ,40 Hz at Power save mode. Don’t care Flicker level (power save mode).

Condition : VCC=3.3V

3-5. Signal Timing Waveforms

t

Hsync

t

WH

t

HBP

Date Enable

t

WV

Vsync

t

VBP

Date Enable

Ver. 1.0 Aug.08.2011

HP

t

VP

High: 0.7VCC

Low: 0.3VCC

tWHA

tWVA

t

HFP

t

VFP

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