TCON Pull up/down resister value change
(Pull up 65㏀ 93㏀, Pull down 50㏀ 95㏀)
Ver. 1.0
2 /39
LD550EUD
Product Specification
1. General Description
The LD550EUD is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 54.64 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Bilion colors.
It has been designed to apply the 10-bit 4-port LVDS interface.
It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
EPI(RGB)
Control
Signals
Power Signals
G1
G1080
Source Driver Circuit
S1 S1920
TFT - LCD Panel
(1920 × RGB × 1080 pixels)
[Gate In Panel]
LVDS
2Port
LVDS
2Port
LVDS
Select
L-DIM
Enable
Bit
Select
+12.0V
CN2
(41pin)
CN1
(51pin)
LVDS 3,4
LVDS 1,2
Option
signal
I2C
EEPROM
SCL
SDA
Timing Controller
LVDS Rx + ODC + DGA
Integrated
Power Circuit
Block
EXT_PWM
+24.0V, GND, On/Off
LED Driver
Back Light Assembly
General Features
Active Screen Size 54.64 inches(1387.80mm) diagonal
Outline Dimension
Pixel Pitch 0.630 mm x 0.630 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 10bit, 1.06 Bilion colors
Luminance, White 700 cd/m2 (Center 1point ,Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Total 117.2W (Typ.) [Logic= 8.0W, LED Driver=109.2W(ExtVbr_B=100% )]
Weight 17.5Kg (Typ.)
Display Mode Transmissive mode, Normally black
Surface Treatment Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)
Possible Display Type Landscape and Portrait Enabled
1239.2(H) × 710.0(V) × 10.8(B) / 23.8(D) mm (Typ.)
Ver. 1.0
3 /39
LD550EUD
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Unit Note
Min Max
LCD Circuit VLCD -0.3 +14.0 VDC
Power Input Voltage
Driver VBL -0.3 + 27.0 VDC
Value
ON/OFF VOFF / VON -0.3 +5.5 VDC
1
Driver Control Voltage
Brightness EXTVBR-B -0.3 +5.5 VDC
T-Con Option Selection Voltage VLOGIC
Operating Temperature TOP 0 +50
-0.3 +4.0 VDC °C
2,3
Storage Temperature TST -20 +60
Panel Front Temperature TSUR
- +68
°C
°C
4
Operating Ambient Humidity HOP 10 90 %RH
2,3
Storage Humidity HST 10 90 %RH
Notes
1. Ambient temperature condition (Ta = 25 2 °C )
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 40°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 68℃. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Min Typ Max
Circuit :
Power Input Voltage VLCD 10.8 12.0 13.2 VDC
Power Input Current ILCD
Power Consumption PLCD - 8 10.4 Watt 1
Rush current IRUSH - - 5.0 A 3
- 665 865 mA 1
- 937 1218 mA 2
Value
Unit Note
Notes
1. The specified current and power consumption are under the V
=12.0V, Ta=25 2°C, fV=120Hz
LCD
condition, and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ±5% of typical voltage
White : 1023 Gray
Black : 0 Gray
Ver. 1.0
Mosaic Pattern(8 x 6)
5 /39
Product Specification
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
LD550EUD
Parameter Symbol
Unit notes
Min Typ Max
LED Driver :
Values
Power Supply Input Voltage VBL
Power Supply Input Current IBL
22.8 24.0 25.2 Vdc 1
-
4.55
5.0
A 1
VBL = 22.8V
Power Supply Input Current (In-Rush) In-rush - - 6.7 A
Power Consumption PBL
-
109.2 120
W 1
ExtV
BR-B
On V on 2.5 - 5.0 Vdc
Input Voltage for
Control System
Signals
On/Off
Brightness Adjust ExtV
ExtV
Frequency
BR-B
Pulse Duty Level
(PWM)
Off V off -0.3 0.0 0.7 Vdc
5 - 100 %
BR-B
1 - 100 %
PAL 100 Hz 3
NTSC 120 Hz 3
High Level 2.5 - 5.0
Low Level 0.0 - 0.7
Vdc
Vdc
On Duty
HIGH : on duty
LOW : off duty
LED :
Life Time 50,000 60,000 - Hrs 2
= 100%
4
6
notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage
24Vand VBR (ExtVBR-B : 100%), it is total power consumption.
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25±2°C.
3. LGD recommend that the PWM freq. is synchronized with Two time harmonic of V_sync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 200ms. This duration is applied to LED on time.
5. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.
6. ExtV
After Driver ON signal is applied, ExtV
signal have to input available duty range and sequence.
BR-B
After that, ExtV
1% and 100% is possible
BR-B
should be sustained from 5% to 100% more than 500ms.
BR-B
For more information, please see 3-6-2. Sequence for LED Driver.
Ver. 1.0
6 /39
LD550EUD
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector is used for the module
electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE) or GT05P-51S-H38(manufactured by LSM) or
IS050-C51B-C39(manufactured by UJU)
1. All GND (ground) pins should be connected together to the LCD module’s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #8~#9 NC (No Connection): These pins are used only for LGD (Do not connect)
5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
6. Specific pin No. #44is used for “No signal detection” of system signal interface.
It should be GND for NSB (No Signal Black) while the system interface signal is not.
If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).
No Connection (notes 4)
No Connection (notes 4)
No Connection (notes 4)
No Connection (notes 4)
No Connection (notes 4)
No Connection (notes 4)
‘H’ =JEIDA , ‘L’ or NC = VESA
No Connection (notes 4)
No Connection (notes 4)
No Connection (notes 4)
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)
No Connection or Ground
27
Bit Select
28
29
30
31
32
33
34
35
36
37
38
39
40 R2EN
41 R2EP
42
43
44
45
46
47
48
49
50
51
- - -
R2AN
R2AP
R2BN
R2BP
R2CN
R2CP
GND
R2CLKN
R2CLKP
GND
R2DN
R2DP
NC or GND
NC or GND
GND Ground (notes 6)
GND Ground
GND Ground
NC No connection
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
VLCD Power Supply +12.0V
‘H’ or NC= 10bit(D) , ‘L’ = 8bit
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+)
No Connection or Ground
No Connection or Ground
Ver. 1.0
7 /39
LD550EUD
Product Specification
-LCD Connector (CN2) : FI-RE41S-HF(manufactured by JAE) or GT05P-41S-H38(manufactured by LSM)
or IS050-C41B-C39(manufactured by UJU)
No connection 22
No connection 23
No connection 24 GND Ground
No connection
No connection
No connection 27
No connection 28
No connection 29 RB4P
Ground
THIRD LVDS Receiver Signal (A-)
THIRD LVDS Receiver Signal (A+)
THIRD LVDS Receiver Signal (B-)
THIRD LVDS Receiver Signal (B+)
THIRD LVDS Receiver Signal (C-)
THIRD LVDS Receiver Signal (C+)
Ground
THIRD LVDS Receiver Clock Signal(-)
THIRD LVDS Receiver Clock Signal(+)
Ground
THIRD LVDS Receiver Signal (D-)
THIRD LVDS Receiver Signal (D+)
THIRD LVDS Receiver Signal (E-)
THIRD LVDS Receiver Signal (E+)
FORTH LVDS Receiver Signal (A-)
FORTH LVDS Receiver Signal (A+)
FORTH LVDS Receiver Signal (B-)
FORTH LVDS Receiver Signal (B+)
FORTH LVDS Receiver Signal (C-)
FORTH LVDS Receiver Signal (C+)
Ground
FORTH LVDS Receiver Clock Signal(-)
FORTH LVDS Receiver Clock Signal(+)
Ground
FORTH LVDS Receiver Signal (D-)
FORTH LVDS Receiver Signal (D+)
FORTH LVDS Receiver Signal (E-)
FORTH LVDS Receiver Signal (E+)
Note : 1. All GND (ground) pins should be connected together to the LCD module’s metal frame.
2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
CN1 CN2
#1 #51 #1 #41
CN1 CN2
#1 #51
#1 #41
Rear view of LCM
Ver. 1.0
8 /39
Product Specification
3-2-2. Backlight Module
Master
-LED Driver Connector
: 20022WR - H14B2(Yeonho) or Compatible
- Mating Connector
: 20022HS - 14B2 (Yeonho) or Compatible
Table 5-1. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin No Symbol Description Note
LD550EUD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
VBL Power Supply +24.0V
GND
GND
GND
GND
GND
Status
ON/OFF
V
NC Don’t care
EXTVBR-B External PWM 3
Backlight Ground
Backlight Ground
Backlight Ground
Backlight Ground
Backlight Ground
Back Light Status 2
Backlight ON/OFF control 4
1
Notes :1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal : Open
3. High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXTVBR-B is 100% )
4. Each impedance of pin #12 and 14 is over 50 [KΩ] .
◆ Rear view of LCM
1
Ver. 1.0
◆ Status
PCB
14
1
…
14
…
<Master>
9 /39
LD550EUD
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEM Symbol Min Typ Max Unit notes
Horizontal
Vertical
Frequency
Display
Period
Blank tHB 40 70 200 tCLK 1
Total tHP 520 550 680 tCLK
Display
Period
Blank tVB
Total tVP
ITEM Symbol Min Typ Max Unit notes
DCLK fCLK 66.97 74.25 78.00 MHz
Horizontal fH 121.8 135 140 KHz 2
Vertical fV
tHV 480 480 480 tCLK 1920 / 4
tVV 1080 1080 1080 Lines
20
(228)
1100
(1308)
108
(95)
45
(270)
1125
(1350)
120
(100)
86
(300)
1166
(1380)
122
(104)
Lines 1
Lines
Hz
NTSC
(PAL)
2
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
3. Spread Spectrum Rate (SSR) for 50KHz ~ 100kHz Modulation Frequency(FMOD) is calculated by
(7 – 0.06*Fmod), where Modulation Frequency (FMOD) unit is KHz.
LVDS Receiver Spread spectrum Clock is defined as below figure
※ Timing should be set based on clock frequency.
Ver. 1.0
10 /39
LD550EUD
Product Specification
※ Please pay attention to the followings when you set Spread Spectrum Rate(SSR) and Modulation
Frequency(FMOD)
1. Please set proper Spread Spectrum Rate(SSR) and Modulation Frequency (FMOD) of TV system
LVDS output.
2. Please check FOS after you set Spread Spectrum Rate(SSR) and Modulation Frequency(FMOD)
to avoid abnormal display. Especially, harmonic noise can appear when you use Spread Spectrum
under FMOD 30 KHz.
Ver. 1.0
11 /39
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