LG Display LD550EUD-SCA1 Specification

LD550EUD

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(

(

Preliminary Specification

●

)

Final Specification

55.0” WUXGA TFT LCDTitle

MODEL

APPROVED BY

/

/

/

GeneralBUYER

SIGNATURE

DATE

LG DISPLAY Co., Ltd.SUPPLIER

LD550EUD*MODEL

SCA1SUFFIX

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY

K.S. Nah

/ Chief Research Engineer

REVIEWED BY

B. Y. Park

/ Chief Research Engineer

PREPARED BY

J. H. Kim

/ Junior Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 0.1

PD Design Team

LG Display Co., Ltd.

0 /39

Product Specification

CONTENTS

LD550EUD

CONTENTS

GENERAL DESCRIPTION1

ABSOLUTE MAXIMUM RATINGS2

ELECTRICAL SPECIFICATIONS3

ELECTRICAL CHARACTERISTICS3-1

INTERFACE CONNECTIONS3-2

SIGNAL TIMING SPECIFICATIONS3-3

COLOR DATA REFERENCE3-5

POWER SEQUENCE3-6

OPTICAL SPECIFICATIONS4

MECHANICAL CHARACTERISTICS5

RELIABILITY6

ITEMNumber

Page

0COVER

1

2RECORD OF REVISIONS

3

4

5

5

7

10

11LVDS SIGNAL SPECIFICATIONS3-4

14

15

17

21

24

Ver. 0.1

INTERNATIONAL STANDARDS7

SAFETY7-1

EMC7-2

Environment7-3

PACKING8

INFORMATION OF LCM LABEL8-1

PACKING FORM8-2

25

25

25

25

26

26

26

27PRECAUTIONS9

27MOUNTING PRECAUTIONS9-1

27OPERATING PRECAUTIONS9-2

28ELECTROSTATIC DISCHARGE CONTROL9-3

28PRECAUTIONS FOR STRONG LIGHT EXPOSURE9-4

28STORAGE9-5

28HANDLING PRECAUTIONS FOR PROTECTION FILM9-6

28APPROPRATE CONDITION FOR PUBLIC DISPLAY9-7

1 /39

Product Specification

RECORD OF REVISIONS

DescriptionPageRevision DateRevision No.

Preliminary Specification(First Draft) -Jan, 27, 20110.0

Changed Luminance spec.: 600nit450nit3,17Mar. 07. 20110.1

LD550EUD

Ver. 0.1

2 /39

LD550EUD

Product Specification

1. General Description

The LD550EUD is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
Local Block backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 54.64 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Bilion colors.
It has been designed to apply the 10-bit 4-port LVDS interface.
It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.

Mini-LVDS(RGB)

Control
Signals

Gate Driver Circuit

Source Driver Circuit

S1 S1920

G1

TFT - LCD Panel

(

1920 × RGB × 1080 pixels)

G1080

LVDS

2Port

LVDS

2Port

LVDS
Select

Bit

Select

EXTVBR-B

+12.0V

CN2

(41pin)

CN1

(51pin)

LVDS 3,4

LVDS 1,2

Option

signal

I2C

EEPROM

SCL

SDA

Timing Controller

LVDS Rx + L/D + DGA + ODC

Integrated

Power Circuit

Power Signals

Block

SIN, SCLK, V_Sync

+24.0V, GND, On/Off

ExtVBR-B

LED Driver

V : 8Block

Local Dimming :

General Features

Active Screen Size 54.64 inches(1387.80mm) diagonal

Outline Dimension 1255.6(H) × 726.4(V) X 19.0(B)/10.8 mm(D) (Typ.)

Pixel Pitch 0.630 mm x 0.630 mm

Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement

Color Depth 10bit(D) , 1.06Billon colors

Luminance, White 450 cd/m2 (Center 1point ,Typ.)

Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))

Power Consumption

Weight 14.5Kg (Typ.)

Display Mode Transmissive mode, Normally black

Total 128.6 W (Typ.) (Logic=6.4(TBD) W, LED Driver =122.2W @EXTVBR-B = 100% )

Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)Surface Treatment

Landscape and Portrait Enabled Possible Display Type

H : 2Block

16 Block

Ver. 0.1

3 /39

LD550EUD

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Power Input Voltage

Driver Control Voltage

T-Con Option Selection Voltage VLOGIC

Operating Temperature TOP

Storage Temperature TST

Operating Ambient Humidity HOP

Storage Humidity HST 10 90 %RH

1. Ambient temperature condition (Ta = 25 ± 2 °C )

Note

LCD Circuit VLCD -0.3 +14.0 VDC

VBL

ON/OFF VOFF / VON

Brightness VDC

EXTVBR-B

Value

Min Max

+ 27.0-0.3

-0.3 +5.5

+5.50.0

-0.3 +4.0

0 +50

-20 +60

10 90

2. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be Max 39°C, and no condensation of water.

TBD

Unit Note

VDCDriver

VDC

VDC

°C

°C

%RH

1

2

2

Ver. 0.1

Wet Bulb
Temperature [°C]

20

10

0

10 20 30 40 50 60 70 800-20

Dry Bulb Temperature [°C]

30

40

50

60

90%

60%

40%

10%

Storage

Operation

Humidity [(%)RH]

4 /39

LD550EUD

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Circuit :

ILCDPower Input Current

Note

1. The specified current and power consumption are under the V

-

-

Value

530(TBD)

790(TBD)

LCD

MaxTypMin

=12.0V, Ta=25 ± 2°C, fV=

condition whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

White : 1023 Gray
Black : 0 Gray

NoteUnit

VDC13.212.010.8VLCDPower Input Voltage

1mA689

2mA1027

1Watt-6.36(TBD)PLCDPower Consumption

3A5.0--IRUSHRush current

120Hz

Ver. 0.1

Mosaic Pattern(8 x 6)

5 /39

Product Specification

Table 3. ELECTRICAL CHARACTERISTICS (Continue)

LD550EUD

Parameter Symbol

LED Driver :

Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1

Power Supply Input Current IBL

Power Supply Input Current (In-Rush) In-rush

Power Consumption PBL

On/Off

Input Voltage for

Control System

Signals

LED :

Life Time 30,000 Hrs 2

Brightness Adjust ExtVBR-B 1 - 100 %

PWM Frequency for
NTSC & PAL

Pulse Duty Level
(PWM)

On V on 2.5 - 5.0 Vdc

Off V off -0.3 0.0 0.7 Vdc

PAL 100 Hz 3

NTSC 120 Hz 3

High Level 2.5 - 5.0

Low Level 0.0 - 0.7

Min Typ Max

Values

-

- 6.8 A

-

5.09

122.2 133.7

5.57

Unit Notes

Vdc

Vdc

A 1

VBL = 22.8V
Ext VBR-B = 100%

W 1

On Duty

HIGH : on duty

LOW : off duty

4

6

Notes :

1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60

minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage
24Vand VBR (ExtVBR-B : 100%), it is total power consumption.

2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25±2°C.

3. LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.

4. The duration of rush current is about

200ms.

5. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied.

6. Ext_PWM Signal have to input available duty range.
Between 99% and 100% ExtVBR-B duty have to be avoided. ( 99% < ExtVBR-B < 100%)
But ExtVBR-B 0% and 100% is possible.

High

Available duty range

Low

0%

1%

Ver. 0.1

99% 100%Ext_PWM Input Duty

6 /39

Product Specification

3-2. Interface Connections

This LCD module employs three kinds of interface connection,
for the module electronics and 14-pin connector is used for the integral backlight system.

3-2-1. LCD Module

- LCD Connector :

FI-R51S-HF(manufactured by JAE) or compatible

Refer to below and next Page table

- Mating Connector : FI-R51HL(JAE) or compatible

Table 4-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION

No

1

2

3

4

5

6

7

8

9

10
11

12

13

14

15

16

17

18

19

20
21
22

23

24
25
26

Note

DescriptionSymbolNo

NC or GND

NC

NC

NC

NC

NC

LVDS Select

NC

NC

GND

R1AN

R1AP

R1BN

R1BP

R1CN

R1CP

GND

R1CLKN
R1CLKP

GND
R1DN

R1DP

R1EN
R1EP

NC or GND

No Connection or Ground

No Connection (Note 4)

No Connection (Note 4)

No Connection (Note 4)

No Connection (Note 4)

No Connection (Note 4)

‘H’ =JEIDA , ‘L’ or NC = VESA

No Connection (Note 4)

No Connection (Note 4)

‘H’ = Enable , ‘L’ or NC = Disable L-DIM Enable

Ground

FIRST LVDS Receiver Signal (A-)

FIRST LVDS Receiver Signal (A+)

FIRST LVDS Receiver Signal (B-)

FIRST LVDS Receiver Signal (B+)

FIRST LVDS Receiver Signal (C-)

FIRST LVDS Receiver Signal (C+)
Ground

FIRST LVDS Receiver Clock Signal(-)

FIRST LVDS Receiver Clock Signal(+)
Ground

FIRST LVDS Receiver Signal (D-)

FIRST LVDS Receiver Signal (D+)

FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)

No Connection or Ground

1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. All VLCD (power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. #1~#6 & #8~#9 NC (No Connection): These pins are used only for LGD (Do not connect)

5. Specific pins(pin No. #10) are used for Local Dimming function of the LCD module.
If not used, these pins are no connection. (Please see the Appendix VI for more information.)

6. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.

7. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).

51-pin, 41-pina and 4-pin connector are used

Symbol

27

28

29

30

31

32

33

34

35

36

37

38

39
40

41

42

43

44

45

46
47
48

49

50
51

-

Bit Select

R2AN

R2AP

R2BN

R2BP

R2CN

R2CP

GND

R2CLKN

R2CLKP

GND

R2DN

R2DP

R2EN

R2EP

NC or GND

NC or GND

GND

GND

GND

NC
VLCD

VLCD

VLCD
VLCD

-

‘H’ or NC= 10bit(D) , ‘L’ = 8bit

SECOND LVDS Receiver Signal (A-)

SECOND LVDS Receiver Signal (A+)

SECOND LVDS Receiver Signal (B-)

SECOND LVDS Receiver Signal (B+)

SECOND LVDS Receiver Signal (C-)

SECOND LVDS Receiver Signal (C+)
Ground

SECOND LVDS Receiver Clock Signal(-)

SECOND LVDS Receiver Clock Signal(+)
Ground

SECOND LVDS Receiver Signal (D-)

SECOND LVDS Receiver Signal (D+)

SECOND LVDS Receiver Signal (E-)

SECOND LVDS Receiver Signal (E+)

No Connection or Ground

No Connection or Ground

Ground

Ground

Ground
No connection
Power Supply +12.0V

Power Supply +12.0V

Power Supply +12.0V
Power Supply +12.0V

LD550EUD

Description

-

Ver. 0.1

7 /39

Product Specification

-LCD Connector (CN2) : FI-RE41S-HF (manufactured by JAE) or compatible

- Mating Connector : FI-RE41HL or compatible

Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION

LD550EUD

10

11

12

14

15

16

17

19

20

21

DescriptionSymbolNo

NC

2

3

5

6

7

8

9

NC

NC

NC4
NC

NC

NC

NC

GND

RA3N

RA3P

RB3N

RB3P13

RC3N

RC3P

GND

RCLK3N

RCLK3P18

GND

RD3N

RD3P

No connection1

No connection

No connection
No connection

No connection

No connection

No connection

No connection
Ground

THIRD LVDS Receiver Signal (A-)

THIRD LVDS Receiver Signal (A+)

THIRD LVDS Receiver Signal (B-)

THIRD LVDS Receiver Signal (B+)

THIRD LVDS Receiver Signal (C-)

THIRD LVDS Receiver Signal (C+)
Ground

THIRD LVDS Receiver Clock Signal(-)

THIRD LVDS Receiver Clock Signal(+)
Ground

THIRD LVDS Receiver Signal (D-)

THIRD LVDS Receiver Signal (D+)

No

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

Symbol

RE3N

RE3P

GND

GND

RA4N

RA4P

RB4N

RB4P

RC4N

RC4P

GND

RCLK4N

RCLK4P

GND

RD4N

RD4P

RE4N

RE4P

GND

GND

-

THIRD LVDS Receiver Signal (E-)

THIRD LVDS Receiver Signal (E+)

Ground

Ground
FORTH LVDS Receiver Signal (A-)

FORTH LVDS Receiver Signal (A+)

FORTH LVDS Receiver Signal (B-)

FORTH LVDS Receiver Signal (B+)

FORTH LVDS Receiver Signal (C-)

FORTH LVDS Receiver Signal (C+)
Ground

FORTH LVDS Receiver Clock Signal(-)

FORTH LVDS Receiver Clock Signal(+)
Ground

FORTH LVDS Receiver Signal (D-)

FORTH LVDS Receiver Signal (D+)

FORTH LVDS Receiver Signal (E-)

FORTH LVDS Receiver Signal (E+)

Ground

Ground

Description

Note : 1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.

Ver. 0.1

CN3

#1

#8

CN3

#1 #8

CN1 CN2

#1

CN1 CN2

#1 #51

#51 #1 #41

#1 #41

Rear view of LCM

8 /39

Product Specification

3-2-2. Backlight Module

Master

-LED Driver Connector
:

20022WR - H14B1(Yeonho)

- Mating Connector
: 20022HS - 14B2

Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION

Pin No Symbol Description Master Note

LD550EUD

1

2

3

4

5

6

7

8

9

10

11

12

13

14

VBL Power Supply +24.0V VBL

VBL Power Supply +24.0V VBL

VBL Power Supply +24.0V VBL

VBL Power Supply +24.0V VBL

VBL Power Supply +24.0V VBL

GND Backlight Ground GND

GND Backlight Ground GND

GND Backlight Ground GND

GND Backlight Ground GND

GND Backlight Ground GND

Status Back Light Status Status 2

ON/OFF

V

NC Don’t care NC

EXTVBR-B External PWM

Backlight ON/OFF control V

ON/OFF

EXTVBR-B

Notes :1. GND should be connected to the LCD module’s metal frame.

2. Normal : Low (under 0.7V) / Abnormal : High (upper 3.0V)

3. High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXTVBR-B is 100% )

4. Each impedance of pin #12 and 14 is over 50 [KΩ] .

1

3

◆ Rear view of LCM

1

Ver. 0.1

…

14

<Master>

PCB

1

14

…

9 /39

LD550EUD

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.

Table 6. TIMING TABLE (DE Only Mode)

Symbol

Display

Period

Horizontal

Vertical 1Lines

Frequency

Blank

Total

Display

Period

DCLK

Horizontal

Vertical

tHV

tHB

tHP

tVBBlank

tVPTotal

fCLK

fH

fV

20

(228)

1100

(1308)

108

(95)

45

(270)

1125

(1350)

120

(100)

86

(300)

1166

(1380)

122

(104)

tCLK680550520

Lines108010801080tVV

Lines

NoteUnitMaxTypMinITEM

1920 / 4tCLK480480480

1tCLK2007040

NoteUnitMaxTypMinSymbolITEM

MHz78.0074.2566.97

2KHz140135121.8

2

NTSC :

Hz

108~122Hz

(PAL : 95~104Hz)

Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).

If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.

2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency

※ Timing should be set based on clock frequency.

Ver. 0.1

10 /39

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LD550EUD

Product Specification

DCLK

First data

Second data

Third data

Forth data

DE(Data Enable)

tCLK

0.5 VDD

Invalid data

Invalid data

Invalid data

Invalid data

DE, Data

Valid data

Pixel 0

Valid data

Pixel 1

Valid data

Pixel 2

Valid data

Pixel 3

Pixel 4

Pixel 5

Pixel 6

Pixel 7

0.7VDD

0.3VDD

Invalid data

Invalid data

Invalid data

Invalid data

DE(Data Enable)

Ver. 0.1

* tHB = tHFP + tWH +tHBP

* tVB = tVFP + tWV +tVBP

1 1080

tVV

tVP

11 /39