LG Display LD470WUN-SCA1 Specification

LD470WUN

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(

(

Preliminary Specification

●

)

Final Specification

47.0” WUXGA TFT LCDTitle

MODEL

APPROVED BY

/

/

/

MRIBUYER

SIGNATURE

DATE

LG.Display Co., Ltd.SUPPLIER

LD470WUN*MODEL

SCA1 SUFFIX

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY

G. S. Na / Team Leader

REVIEWED BY

B. Y. Park / Project Leader

PREPARED BY

J. H.KIM / Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 0.0

PD Products Development Dept.

LG. Display LCD Co., Ltd

1 /38

Product Specification

CONTENTS

LD470WUN

CONTENTS

RECORD OF REVISIONS

GENERAL DESCRIPTION1

ABSOLUTE MAXIMUM RATINGS2

ELECTRICAL SPECIFICATIONS3

ELECTRICAL CHARACTERISTICS3-1

INTERFACE CONNECTIONS3-2

SIGNAL TIMING SPECIFICATIONS3-3

LVDS SIGNAL SPECIFICATIONS3-4

COLOR DATA REFERENCE3-5

POWER SEQUENCE3-6

OPTICAL SPECIFICATIONS4

MECHANICAL CHARACTERISTICS5

ITEMNumber

Page

1COVER

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21

RELIABILITY6

INTERNATIONAL STANDARDS7

SAFETY7-1

EMC7-2

Environment7-3

PACKING8

INFORMATION OF LCM LABEL8-1

PACKING FORM8-2

PRECAUTIONS9

MOUNTING PRECAUTIONS9-1

OPERATING PRECAUTIONS9-2

ELECTROSTATIC DISCHARGE CONTROL9-3

PRECAUTIONS FOR STRONG LIGHT EXPOSURE9-4

STORAGE9-5

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28HANDLING PRECAUTIONS FOR PROTECTION FILM9-6

Ver. 0.0

2 /38

Product Specification

RECORD OF REVISIONS

DescriptionPageRevision DateRevision No.

Preliminary Specification(First Draft) -Jan. 15. 20100.0

LD470WUN

Ver. 0.0

3 /38

LD470WUN

Product Specification

1. General Description

The LD470WUN is a Color Active Matrix Liquid Crystal Display with an integral External Electrode Fluorescent
Lamp(EEFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 46.96 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Bilion (true) colors. It has been designed to apply the 10-bit
2-port LVDS interface. It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle,
high color gamut, high color depth and fast response time are important.

OPC Enable

ExtVBR-B

VBR-B out

LVDS

LVDS 1,2

2Port

CN1

(51pin)

Option
signal

I2C

LVDS
Select

Bit
Select

+12.0V

EXTVBR-B

Status

+24.0V, GND

General Features

EEPROM

SCL

Timing Controller

LVDS Rx +

OPC + DGA + ODC

Integrated

Power Circuit

Block

Inverter

46.96 inches(1192.87mm) diagonalActive Screen Size

1096.0(H) x 640.0 (V) x 53.0 mm(D) (Typ.)Outline Dimension

0.5415 mm x 0.5415 mmPixel Pitch

1920 horiz. by 1080 vert. Pixels, RGB stripe arrangementPixel Format

10bit(D) , 1.06Billon colorsColor Depth

500 cd/m2 (Center 1point ,Typ.)Luminance, White

Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))Viewing Angle (CR>10)

SDA

Mini-LVDS(RGB)

Control
Signals

Power Signals

3PinX1CN(High)

3PinX1CN(High)

Source Driver Circuit

S1 S

G1

TFT - LCD Panel

(

1920 × RGB × 1080 pixels)

[Gate In Panel]

G1080

Back light Assembly

1920

Ver. 0.0

Total TBD W (Typ.) (Logic=TBD W, Inverter=195W ) Power Consumption

12.5Kg (Typ.) Weight

Transmissive mode, Normally blackDisplay Mode

Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)Surface Treatment

4 /38

LD470WUN

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or damage to the
LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Value

Parameter Remark

Symbol

Unit

MaxMin

Power Input

Voltage

LCM

VDC+27.0-0.3VBLBacklight inverter

VDC+5. 5-0.3VON/OFFON/OFF Control Voltage

VDC+5.00VBRBrightness Control Voltage

+500TOPOperating Temperature

+60-20TSTStorage Temperature

°C

°C

%RH9010HOPOperating Ambient Humidity

%RH9010HSTStorage Humidity

Notes : 1. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be 39 °C Max. and no condensation of water.

90%

60

60%

at 25 ± 2 °CVDC+14.0-0.3VLCD

Note 1

Ver. 0.0

Wet Bulb
Temperature [°C]

20

10

0

10 20 30 40 50 60 70 800-20

Dry Bulb Temperature [°C]

30

40

50

40%

10%

Storage

Operation

Humidity [(%)RH]

5 /38

LD470WUN

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the EEFL
backlight and inverter circuit.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Circuit :

ILCDPower Input Current

Note

1. The specified current and power consumption are under the V

Value

MaxTypMin

=12.0V, Ta=25 ± 2°C, fV=60Hz

LCD

condition whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

White : 1023 Gray
Black : 0 Gray

NoteUnit

VDC13.212.010.8VLCDPower Input Voltage

1mA730560(TBD)-

2mA1150870(TBD)-

1Watt8.766.72(TBD)PLCDPower Consumption

3A5.0--IRUSHRush current

Ver. 0.0

Mosaic Pattern(8 x 6)

6 /38

Product Specification

Table 3. ELECTRICAL CHARACTERISTICS (Continue)

LD470WUN

Parameter Symbol

Inverter :

Power Supply
Input Current

Power Consumption

Input Voltage for

Control System

Signals

Lamp:

On/Off

Brightness Adjust

PWM Frequency for
NTSC & PAL

Pulse Duty
Level (PWM)
(Burst mode)

On VDC5.0-2.5VON

Off

Values

MaxTypMin

VDC25.224.022.8VBLPower Supply Input Voltage

IBL_AAfter Aging

IBL_BBefore Aging

-

-

-PBL

25EXTVBR-B

8.2

9.0

9.0

9.9

15--IRUSHPower Supply Input Current (In-Rush)

214195

0.8-0.0Low Level

A

VDC0.80.0-0.3VOFF

%100-

VDC5.0-2.5High Level

VDC

VBL = 22.8V

EXTVBR-B = 100%

High: Lamp on
Low : Lamp off

TsDischarge Stabilization Time

60,00050,000Life Time

NoteUnit

1

1A

2A

6

1W

On Duty

7

5Hz100PAL

5Hz120NTSC

3min3

4Hrs

Note

1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 120

minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage
24Vand VBR (EXTVBR-B : 100%), it is total power consumption.

2. Electrical characteristics are determined within 30 minutes at 25±2°C.

The specified currents are under the typical supply Input voltage 24V.

3. The brightness of the lamp after lighted for 5minutes is defined as 100%.
TS is the time required for the brightness of the center of the lamp to be not less than 95% at typical current.

The screen of LCD module may be partially dark by the time the brightness of lamp is stable after turn on.

4. Specified Values are for a single lamp which is aligned horizontally.
The life time is determined as the time which luminance of the lamp is 50% compared to that of initial value
at the typical lamp current (EXTVBR-B :100%), on condition of continuous operating at 25± 2°C

5. LGD recommend that the PWM freq. is synchronized with

Two times harmonic of Vsync signal of system.

6. The duration of rush current is about 10ms.

7. EXTVBR-B is based on input PWM duty of the inverter.

Ver. 0.0

7 /38

LD470WUN

Product Specification

3-2. Interface Connections

This LCD module employs two kinds of interface connection, 51-pin connector is used for the module
electronics and 14-pin connector is used for the integral backlight system.

3-2-1. LCD Module

- LCD Connector : FI-R51S-HF(manufactured by JAE) or KN25-51P-0.5SH(manufactured by Hirose)
(CN1) Refer to below table

- Mating Connector : FI-R51HL(JAE) or compatible

Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION

1

2

3

4

5

6

7

8

9

10
11

12

13

14

15

16

17

18

19

20
21
22

23

24
25
26

NC No Connection

No ConnectionNC

No ConnectionNC

No Connection (Reserved for LGD)NC

No Connection (Reserved for LGD)NC

No Connection (Reserved for LGD)NC

LVDS Select

GND

R1AN

R1AP

R1BN

R1BP

R1CN

R1CP

GND

R1CLKN
R1CLKP

GND
R1DN

R1DP

R1EN
R1EP

NC

‘H’ =JEIDA , ‘L’ or NC = VESA

External VBR (From System)EXTVBR-B

OPC output (From LCM)VBR-B out

‘H’ = Enable , ‘L’ or NC = Disable OPC Enable

Ground

FIRST LVDS Receiver Signal (A-)

FIRST LVDS Receiver Signal (A+)

FIRST LVDS Receiver Signal (B-)

FIRST LVDS Receiver Signal (B+)

FIRST LVDS Receiver Signal (C-)

FIRST LVDS Receiver Signal (C+)
Ground

FIRST LVDS Receiver Clock Signal(-)

FIRST LVDS Receiver Clock Signal(+)
Ground

FIRST LVDS Receiver Signal (D-)

FIRST LVDS Receiver Signal (D+)

FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)

No Connection

DescriptionSymbolNo

No

27

28

29

30

31

32

33

34

35

36

37

38

39
40

41

42

43

44

45

46
47
48

49

50
51

-

Symbol

Bit Select

R2AN

R2AP

R2BN

R2BP

R2CN

R2CP

GND

R2CLKN

R2CLKP

GND

R2DN

R2DP

R2EN

R2EP

NC

NC

GND

GND

GND

NC
VLCD

VLCD

VLCD
VLCD

-

‘H’ or NC= 10bit(D) , ‘L’ = 8bit

SECOND LVDS Receiver Signal (A-)

SECOND LVDS Receiver Signal (A+)

SECOND LVDS Receiver Signal (B-)

SECOND LVDS Receiver Signal (B+)

SECOND LVDS Receiver Signal (C-)

SECOND LVDS Receiver Signal (C+)
Ground

SECOND LVDS Receiver Clock Signal(-)

SECOND LVDS Receiver Clock Signal(+)
Ground

SECOND LVDS Receiver Signal (D-)

SECOND LVDS Receiver Signal (D+)

SECOND LVDS Receiver Signal (E-)

SECOND LVDS Receiver Signal (E+)
No Connection

No Connection

Ground

Ground

Ground
No connection
Power Supply +12.0V

Power Supply +12.0V

Power Supply +12.0V
Power Supply +12.0V

Description

-

Note

Ver. 0.0

1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. All VLCD (power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
These pins should be no connection.

5. Specific pins(pin No. # 8~#10) are used for OPC function of the LCD module.
If not used, these pins are no connection. (Please see the Appendix III-4 for more information.)

6. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.

7. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).

8 /38

Product Specification

3-2-2. Backlight Module

[ Master ]

[ Master ]

-Inverter Connector :

-Inverter Connector : 20022WR-14B1(Yeonho)

- Mating Connector :

- Mating Connector : 20022HS-14 or Equivalent

Table 5. INVERTER CONNECTOR PIN CONFIGULATION

20022WR-14B1(Yeonho)

or Equivalent

or Equivalent

20022HS-14 or Equivalent

LD470WUN

Note

Master

1

2

3

4

5

6

7

8

9

10

Power Supply +24.0VVBL

Power Supply +24.0VVBL

Power Supply +24.0VVBL

Power Supply +24.0VVBL

Power Supply +24.0VVBL

Backlight GroundGND

Backlight GroundGND

Backlight GroundGND

Backlight GroundGND

Backlight GroundGND

VBL

VBL

VBL

VBL

VBL

GND

GND

GND

GND

GND

11

12

13

14

ON/OFF

Backlight ON/OFF controlV

External PWMEXTVBR-B

ON/OFF

V

External PWM

Status

1. GND should be connected to the LCD module’s metal frame.

2. Normal : Low (under 0.7V) / Abnormal : High (upper 3.0V)
Please see Appendix IV-1 for more information.

3

. Each impedance of pin #12,#13 is over 50[KΩΩΩΩ], 50[KΩΩΩΩ],

NC

NoteDescriptionSymbolPin No

1

2No ConnectionNC

3Lamp StatusStatus

◆◆◆◆ Rear view of LCM

◆◆◆◆ Rear view of LCM

14

1

Ver. 0.0

…

PCB

…

9 /38

LD470WUN

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.

Table 6-1. TIMING TABLE for NTSC (DE Only Mode)

Symbol

Display Period

Horizontal

Vertical tHP694511tVBBlank

Frequency

Blank

Total

DCLK

Horizontal

Vertical

tHV

tHB

tHP

fCLK

fH

fV

Table 6-2. TIMING TABLE for PAL (DE Only Mode)

Symbol

Display Period

tHV

NoteUnitMaxTypMinITEM

tclk-960-

tclk240140100

2200/2tclk120011001060

tHP-1080-tVVDisplay Period

tHP114911251091tVPTotal

148.5/2MHz7774.2570

KHz7067.565

Hz636057

NoteUnitMaxTypMinITEM

tclk-960-

Horizontal

Vertical tHP300270228tVBBlank

Frequency

Note

The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
The performance of the electro-optical characteristics may be influenced by variance of the vertical

refresh rate.

Ver. 0.0

Blank

Total

DCLK

Horizontal

Vertical

tHB

tHP

fCLK

fH

fV

tclk240140100

2200/2tclk120011001060

tHP-1080-tVVDisplay Period

tHP138013501308tVPTotal

148.5/2MHz7774.2570

KHz7067.565

Hz535047

10 /38

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LD470WUN

Product Specification

DE, Data

DCLK

First data

Second data

0.7VDD

0.3VDD

tCLK

Invalid data

Invalid data

DE(Data Enable)

0.5 VDD

Valid data

Pixel 0,0

Valid data

Pixel 1,0

tHP

Pixel 2,0

Pixel 3,0

Invalid data

Invalid data

tHV

DE(Data Enable)

Ver. 0.0

1 1080

tVV

tVP

11 /38

3-4-2. LVDS Input Signal Characteristics

1) DC Specification

LVDS -

LVDS +

LD470WUN

Product Specification

0V

LVDS Common mode Voltage

LVDS Input Voltage Range

2) AC Specification

LVDS Clock

LVDS Data

LVDS 1’st Clock

LVDS 2nd/ 3rd/ 4thClock

t

SKEW_mintSKEW_max

# VCM= {(LVDS +) + ( LVDS - )} /2

CM

A

(F

tSKEW

tSKEW

clk

T

clk

IN

= 1/T

V

CM

V

IN _ MAXVIN _MIN

NoteUnitMaxMinSymbolDescription

-V1.51.0V

-V1.80.7V

-mV250ΔVCMChange in common mode Voltage

T

clk

)

clk

A

80%

20%

t

RF

LVDS Differential Voltage

High Threshold

Low Threshold

LVDS Clock to Data Skew Margin

LVDS Clock/DATA Rising/Falling time

Effective time of LVDS

LVDS Clock to Clock Skew Margin (Even to Odd)

1. All Input levels of LVDS signals are based on the EIA 644 Standard.

Note

2. If tRFisn’t enough, t

should be meet the range.

eff

3. LVDS Differential Voltage is defined within t

TH

TL

SKEW

RF

eff

t

SKEW_EO

260 ps(0.3*T

eff

Ver. 0.0

1/7* T

NoteUnitMaxMinSymbolDescription

mV300100V

3

mV-100-300V

)/7|t

clk

)/7t

clk

-ps|(0.25*T

2

-ps±360t

T

clk

clk

-

12 /38