LG Display LD470WUJ-SCE1 Specification

LD470WUJ

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(

(

Preliminary Specification

●

)

Final Specification

Title 47.0” WUXGA TFT LCD

BUYER General

MODEL

APPROVED BY

/

/

/

SIGNATURE

DATE

SUPPLIER LG.Display Co., Ltd.

MODEL LD470WUJ

SUFFIX SCE1 (RoHS Verified)

APPROVED BY

K. S. Nah

/ Chief Senior Engineer

REVIEWED BY

K.N. Kim

/ Chief Senior Engineer

PREPARED BY

J.H. Song

/ Senior Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 0.4

PD Product Design Dept.

LG Display Co., Ltd

1 /32

Product Specification

CONTENTS

LD470WUJ

Number

1

2

3

3-1

3-2

3-3

3-4

3-5

3-6

4

5

ITEM

COVER 1

CONTENTS

RECORD OF REVISIONS

GENERAL DESCRIPTION

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

INTERFACE CONNECTIONS

SIGNAL TIMING SPECIFICATIONS

LVDS SIGNAL SPECIFICATION

COLOR DATA REFERENCE

POWER SEQUENCE

OPTICAL SPECIFICATIONS

MECHANICAL CHARACTERISTICS

Page

2

3

4

5

6

6

7

8

9

12

13

14

18

6

7

8

8-1

9

9-1

9-2

9-3

9-4

9-5

Ver. 0.4

RELIABILITY

INTERNATIONAL STANDARDS

PACKING

PACKING FORM

PRECAUTIONS

ASSEMBLY PRECAUTIONS

OPERATING PRECAUTIONS

ELECTROSTATIC DISCHARGE CONTROL

PRECAUTIONS FOR STRONG LIGHT EXPOSURE

STORAGE

20

21

22

22

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24

24

2 /32

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description

0.0 Jun, 19, 2012 - Preliminary Specification(First Draft)

0.1 Jul, 20, 2012 19 Updated the Front view

Updated the Absolute Maximum Ratings2Aug, 06, 20120.2

15 Updated the Contrast Ratio

0.3 Jul, 20, 2012 4 pdated the Surface Treatment

19 Updated the Front view

0.4 Aug, 13, 2012 14 Updated the Optical Specification

15, 16 Updated the Notes

LD470WUJ

Ver. 0.4

3 /32

LD470WUJ

Product Specification

1. General Description

The LD470WUJ is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel ( GIP). T he matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 46.96 inch diagonally measured
active dis p l a y a r e a wi t h W UXGA resolution (1080 vertical by 1920 hor i z o n t a l p ix e l array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.07 Billion colors.
It has been designed to apply the 10-bit 2-port LVDS interface.
It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut,

high color depth and fast response time are important.

Mini-LVDS(RGB)

Control
Signals

Power Signals

Source Driver Circuit

S1 S1920

G1

TFT - LCD Panel

(1920 × RGB × 1080 pixels)

G1080

LVDS

2Port

LVDS
Select

Bit
Select

+12.0V

CN1

(51pin)

LVDS 1,2

Option
signal

I2C

EEPROM

SCL

Timing Controller

LVDS Rx + DCA + ODC

Power Circuit

SDA

Integrated

Block

General Features

Active Screen Size

Outline Dimension 1061.8(H) x 606.8 (V) x 1.75 mm(D) (Typ.)

Pixel Pitch

Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement

Color Depth 10Bit (D), 1.07 Billion colors

Transmittance (With POL) 5,5 %(Typ.)

46.96 inch (1192.87mm) diagonal

0.5415 mm x 0.5415 mm

[Gate In Panel]

Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))

Power Consumption Total 6.6W (Typ.)

Weight 2.6Kg (Typ.)

Display Mode Transmissive mode, Normally black

Surface Treatment (Top) Hard coating(3H), Anti-reflection treatment of the front polarizer (Reflectance〈 2%)

Possible Display Type Landscape and Portrait Enabled

Ver. 0.4

4 /32

LD470WUJ

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Unit Remark

Min Max

Value

Power Input

Voltage

ON/OFF Control Voltage VON/OFF -0.3 +5. 5 V

Operating Temperature T

Storage Temperature T

Operating Ambient Humidity H

Storage Humidity H

Note:

1. Ambient temperature condition (Ta =

LCM V

LCD

OP

ST

OP

ST

-0.3 +14.0 V

0 +50

-20 +60

10 90 %RH

10 90 %RH

25 ± 2 °C )

DC

DC

°C

°C

2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature

should be Max 39 °C and no condensation of water.

3. Gravity mura can be guaranteed below 40℃ condition.

4. The maximum operating temperature is based on the test condition that the surface temperature

of display area is less than or equal to 68 ℃ with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface

temperature of display area from being over 68 ℃. The range of operating temperature may

degrade in case of improper thermal management in final product design.

90%

60

60%

at 25 ± 2 °C

Note 1

Ver. 0.4

Wet Bulb
Temperature [°C]

20

10

0

10 20 30 40 50 60 70 800-20

Dry Bulb Temperature [°C]

30

40

50

40%

10%

Storage

Operation

Humidity

[(%)RH]

5 /32

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires one power inputs. That is employed to power for the LCD circuit.

Table 2. ELECTRICAL CHARACTERISTICS

LD470WUJ

Parameter Symbol

Value

Min Typ Max

Circuit :

Power Input Voltage V

Power Input Current I

Power Consumption P

Rush current I

LCD

LCD

LCD

RUSH

11.4 12.0 12.6 V

- 550 715

- 810 1053

-

-

6.6 8.88

- 5.0

Note

1. The specified current and power consumption are under the V

=12.0V, Ta=25 ± 2°C, fV=120Hz condition,

LCD

and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

4. Ripple voltage level is recommended under ±5% of typical voltage

White : 1023 Gray

Black : 0 Gray

Unit Note

DC

mA 1

mA 2

Watt 1

A 3

Ver. 0.4

Mosaic Pattern(8 x 6)

6 /32

Product Specification

3-2. Interface Connections

This LCD module employs a 51-pin connector, It is used for the module electronics

3-2-1. LCD Module

- LCD Connector(CN1): FI-RE51S-HF or Equivalent, Refer to below table.

- Mating Connector : FI-RE51HL

Table 3-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION

No Symbol Description No Symbol Description

1

2

3

4

5

6

7

8

9

10
11

12

13

14

15

16

17

18

19

20
21
22

23

24
25
26

GND

NC No Connection

NC No Connection

NC No Connection (Reserved for LGD)

NC No Connection (Reserved for LGD)

NC No Connection (Reserved for LGD)

LVDS Select

NC No Connection

NC No Connection

NC No Connection

GND

RO0N

RO0P

RO1N

RO1P

RO2N

RO2P

GND

ROCLKN
ROCLKP

GND
RO3N

RO3P

RO4N
RO4P

NC

Ground

‘H’ =JEIDA , ‘L’ or NC = VESA

Ground

FIRST LVDS Receiver Signal (A-)

FIRST LVDS Receiver Signal (A+)

FIRST LVDS Receiver Signal (B-)

FIRST LVDS Receiver Signal (B+)

FIRST LVDS Receiver Signal (C-)

FIRST LVDS Receiver Signal (C+)
Ground

FIRST LVDS Receiver Clock Signal(-)

FIRST LVDS Receiver Clock Signal(+)
Ground

FIRST LVDS Receiver Signal (D-)

FIRST LVDS Receiver Signal (D+)

FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)

No Connection

27

Bit Select

28

29

30

31

32

33

34

35

36

37

38

39
40

41

42

43

44

45

46
47
48

49

50
51

- - -

RE0N

RE0P

RE1N

RE1P

RE2N

RE2P

GND

RECLKN

RECLKP

GND

RE3N

RE3P

RE4N

RE4P

NC

NC

NC

GND Ground

GND Ground

AGP ‘H’=AGP, ‘L or NC’ = NSB
VLCD Power Supply +12.0V

VLCD Power Supply +12.0V

VLCD Power Supply +12.0V
VLCD Power Supply +12.0V

Note :

1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. All V

LCD

(power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
These pins should be no connection.

5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.

6. Specific pin No. #47 is used for “No signal detection” of system signal interface.
It should be GND or NC for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).

‘H’ or NC= 10bit(D) , ‘L’ = 8bit

SECOND LVDS Receiver Signal (A-)

SECOND LVDS Receiver Signal (A+)

SECOND LVDS Receiver Signal (B-)

SECOND LVDS Receiver Signal (B+)

SECOND LVDS Receiver Signal (C-)

SECOND LVDS Receiver Signal (C+)
Ground

SECOND LVDS Receiver Clock Signal(-)

SECOND LVDS Receiver Clock Signal(+)
Ground

SECOND LVDS Receiver Signal (D-)

SECOND LVDS Receiver Signal (D+)

SECOND LVDS Receiver Signal (E-)

SECOND LVDS Receiver Signal (E+)
No Connection

No Connection

No Connection

LD470WUJ

Ver. 0.4

7 /32

LD470WUJ

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.

Table 6-1. TIMING TABLE for NTSC (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Vertical

Frequency

Display Period t

Blank t

Total t

Display Period t

Blank t

Total t

DCLK f

Horizontal f

Vertical f

HV

HB

HP

VV

VB

VP

CLK

H

V

- 960 - tclk

100 140 240 tclk

1060 1100 1200 tclk 2200/2

- 1080 - t

11 45 69 t

1091 1125 1149 t

70 74.25 77 MHz 148.5/2

65 67.5 70 KHz

57 60 63 Hz

Table 6-2. TIMING TABLE for PAL (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Display Period t

Blank t

HV

HB

- 960 - tclk

100 140 240 tclk

HP

HP

HP

Vertical

Frequency

Note

Ver. 0.4

Total t

Display Period t

Blank t

Total t

DCLK f

Horizontal f

Vertical f

HP

VV

VB

VP

CLK

H

V

1060 1100 1200 tclk 2200/2

- 1080 - t

228 270 300 t

1308 1350 1380 t

HP

HP

HP

70 74.25 77 MHz 148.5/2

65 67.5 70 KHz

47 50 53 Hz

The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
The performance of the electro-optical characteristics may be influenced by variance of the vertical

refresh rate.

8 /32

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LD470WUJ

Product Specification

DE, Data

DCLK

First data

Second data

0.7VDD

0.3VDD

t

CLK

0.5 VDD

Invalid data

Invalid data

DE(Data Enable)

Valid data

Pixel 0,0

Valid data

Pixel 1,0

t

HP

Pixel 2,0

Pixel 3,0

Invalid data

Invalid data

t

HV

DE(Data Enable)

Ver. 0.4

1 1080

t

VV

t

VP

9 /32

3-4-2. LVDS Input Signal Characteristics

1) DC Specification

LVDS -

LVDS +

LD470WUJ

Product Specification

# VCM= {(LVDS +) + ( LVDS - )}/2

0V

V

CM

V

IN _ MAXVIN _MIN

Description Symbol Min Max Unit Note

LVDS Common mode Voltage V

LVDS Input Voltage Range V

CM

IN

1.0 1.5 V -

0.7 1.8 V -

Change in common mode Voltage ΔVCM 250 mV -

2) AC Specification

T

clk

LVDS Clock

A

LVDS Data

(F

= 1/T

)

clk

A

LVDS 1’st Clock

LVDS 2nd/ 3rd/ 4thClock

t

SKEW

t

SKEW_mintSKEW_max

t

SKEW

clk

T

clk

80%

20%

t

RF

Description Symbol Min Max Unit Note

LVDS Differential Voltage

High Threshold

Low Threshold

LVDS Clock to Data Skew Margin t

LVDS Clock/DATA Rising/Falling time t

Effective time of LVDS t

LVDS Clock to Clock Skew Margin (Even to Odd) t

1. All Input levels of LVDS signals are based on the EIA 644 Standard.

Note

2. If tRFisn’t enough, t

should be meet the range.

eff

V

TH

V

TL

SKEW

RF

eff

SKEW_EO

3. LVDS Differential Voltage is defined within t

Ver. 0.4

100 300 mV

-300 -100 mV

|(0.25*T

260 (0.3*T

± 360 ps -

eff

)/7| ps -

clk

)/7 ps 2

clk

1/7* T

clk

T

clk

3

-

10 /32