LG Display LD470WUJ-SCE1 Specification

LD470WUJ

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(

(

Preliminary Specification

●

)

Final Specification

Title 47.0” WUXGA TFT LCD

BUYER General

MODEL

APPROVED BY

/

/

/

SIGNATURE

DATE

SUPPLIER LG.Display Co., Ltd.

MODEL LD470WUJ

SUFFIX SCE1 (RoHS Verified)

APPROVED BY

K. S. Nah

/ Chief Senior Engineer

REVIEWED BY

K.N. Kim

/ Chief Senior Engineer

PREPARED BY

J.H. Song

/ Senior Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver. 0.4

PD Product Design Dept.

LG Display Co., Ltd

1 /32

Product Specification

CONTENTS

LD470WUJ

Number

1

2

3

3-1

3-2

3-3

3-4

3-5

3-6

4

5

ITEM

COVER 1

CONTENTS

RECORD OF REVISIONS

GENERAL DESCRIPTION

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

INTERFACE CONNECTIONS

SIGNAL TIMING SPECIFICATIONS

LVDS SIGNAL SPECIFICATION

COLOR DATA REFERENCE

POWER SEQUENCE

OPTICAL SPECIFICATIONS

MECHANICAL CHARACTERISTICS

Page

2

3

4

5

6

6

7

8

9

12

13

14

18

6

7

8

8-1

9

9-1

9-2

9-3

9-4

9-5

Ver. 0.4

RELIABILITY

INTERNATIONAL STANDARDS

PACKING

PACKING FORM

PRECAUTIONS

ASSEMBLY PRECAUTIONS

OPERATING PRECAUTIONS

ELECTROSTATIC DISCHARGE CONTROL

PRECAUTIONS FOR STRONG LIGHT EXPOSURE

STORAGE

20

21

22

22

23

23

23

24

24

24

2 /32

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description

0.0 Jun, 19, 2012 - Preliminary Specification(First Draft)

0.1 Jul, 20, 2012 19 Updated the Front view

Updated the Absolute Maximum Ratings2Aug, 06, 20120.2

15 Updated the Contrast Ratio

0.3 Jul, 20, 2012 4 pdated the Surface Treatment

19 Updated the Front view

0.4 Aug, 13, 2012 14 Updated the Optical Specification

15, 16 Updated the Notes

LD470WUJ

Ver. 0.4

3 /32

LD470WUJ

Product Specification

1. General Description

The LD470WUJ is a Color Active Matrix Liquid Crystal Display with an integral the Source PCB and Gate
implanted on Panel ( GIP). T he matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally black mode. It has a 46.96 inch diagonally measured
active dis p l a y a r e a wi t h W UXGA resolution (1080 vertical by 1920 hor i z o n t a l p ix e l array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.07 Billion colors.
It has been designed to apply the 10-bit 2-port LVDS interface.
It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut,

high color depth and fast response time are important.

Mini-LVDS(RGB)

Control
Signals

Power Signals

Source Driver Circuit

S1 S1920

G1

TFT - LCD Panel

(1920 × RGB × 1080 pixels)

G1080

LVDS

2Port

LVDS
Select

Bit
Select

+12.0V

CN1

(51pin)

LVDS 1,2

Option
signal

I2C

EEPROM

SCL

Timing Controller

LVDS Rx + DCA + ODC

Power Circuit

SDA

Integrated

Block

General Features

Active Screen Size

Outline Dimension 1061.8(H) x 606.8 (V) x 1.75 mm(D) (Typ.)

Pixel Pitch

Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement

Color Depth 10Bit (D), 1.07 Billion colors

Transmittance (With POL) 5,5 %(Typ.)

46.96 inch (1192.87mm) diagonal

0.5415 mm x 0.5415 mm

[Gate In Panel]

Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))

Power Consumption Total 6.6W (Typ.)

Weight 2.6Kg (Typ.)

Display Mode Transmissive mode, Normally black

Surface Treatment (Top) Hard coating(3H), Anti-reflection treatment of the front polarizer (Reflectance〈 2%)

Possible Display Type Landscape and Portrait Enabled

Ver. 0.4

4 /32

LD470WUJ

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Unit Remark

Min Max

Value

Power Input

Voltage

ON/OFF Control Voltage VON/OFF -0.3 +5. 5 V

Operating Temperature T

Storage Temperature T

Operating Ambient Humidity H

Storage Humidity H

Note:

1. Ambient temperature condition (Ta =

LCM V

LCD

OP

ST

OP

ST

-0.3 +14.0 V

0 +50

-20 +60

10 90 %RH

10 90 %RH

25 ± 2 °C )

DC

DC

°C

°C

2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature

should be Max 39 °C and no condensation of water.

3. Gravity mura can be guaranteed below 40℃ condition.

4. The maximum operating temperature is based on the test condition that the surface temperature

of display area is less than or equal to 68 ℃ with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface

temperature of display area from being over 68 ℃. The range of operating temperature may

degrade in case of improper thermal management in final product design.

90%

60

60%

at 25 ± 2 °C

Note 1

Ver. 0.4

Wet Bulb
Temperature [°C]

20

10

0

10 20 30 40 50 60 70 800-20

Dry Bulb Temperature [°C]

30

40

50

40%

10%

Storage

Operation

Humidity

[(%)RH]

5 /32

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires one power inputs. That is employed to power for the LCD circuit.

Table 2. ELECTRICAL CHARACTERISTICS

LD470WUJ

Parameter Symbol

Value

Min Typ Max

Circuit :

Power Input Voltage V

Power Input Current I

Power Consumption P

Rush current I

LCD

LCD

LCD

RUSH

11.4 12.0 12.6 V

- 550 715

- 810 1053

-

-

6.6 8.88

- 5.0

Note

1. The specified current and power consumption are under the V

=12.0V, Ta=25 ± 2°C, fV=120Hz condition,

LCD

and mosaic pattern(8 x 6) is displayed and fV is the frame frequency.

2. The current is specified at the maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

4. Ripple voltage level is recommended under ±5% of typical voltage

White : 1023 Gray

Black : 0 Gray

Unit Note

DC

mA 1

mA 2

Watt 1

A 3

Ver. 0.4

Mosaic Pattern(8 x 6)

6 /32

Product Specification

3-2. Interface Connections

This LCD module employs a 51-pin connector, It is used for the module electronics

3-2-1. LCD Module

- LCD Connector(CN1): FI-RE51S-HF or Equivalent, Refer to below table.

- Mating Connector : FI-RE51HL

Table 3-1. MODULE CONNECTOR(CN1) PIN CONFIGURATION

No Symbol Description No Symbol Description

1

2

3

4

5

6

7

8

9

10
11

12

13

14

15

16

17

18

19

20
21
22

23

24
25
26

GND

NC No Connection

NC No Connection

NC No Connection (Reserved for LGD)

NC No Connection (Reserved for LGD)

NC No Connection (Reserved for LGD)

LVDS Select

NC No Connection

NC No Connection

NC No Connection

GND

RO0N

RO0P

RO1N

RO1P

RO2N

RO2P

GND

ROCLKN
ROCLKP

GND
RO3N

RO3P

RO4N
RO4P

NC

Ground

‘H’ =JEIDA , ‘L’ or NC = VESA

Ground

FIRST LVDS Receiver Signal (A-)

FIRST LVDS Receiver Signal (A+)

FIRST LVDS Receiver Signal (B-)

FIRST LVDS Receiver Signal (B+)

FIRST LVDS Receiver Signal (C-)

FIRST LVDS Receiver Signal (C+)
Ground

FIRST LVDS Receiver Clock Signal(-)

FIRST LVDS Receiver Clock Signal(+)
Ground

FIRST LVDS Receiver Signal (D-)

FIRST LVDS Receiver Signal (D+)

FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)

No Connection

27

Bit Select

28

29

30

31

32

33

34

35

36

37

38

39
40

41

42

43

44

45

46
47
48

49

50
51

- - -

RE0N

RE0P

RE1N

RE1P

RE2N

RE2P

GND

RECLKN

RECLKP

GND

RE3N

RE3P

RE4N

RE4P

NC

NC

NC

GND Ground

GND Ground

AGP ‘H’=AGP, ‘L or NC’ = NSB
VLCD Power Supply +12.0V

VLCD Power Supply +12.0V

VLCD Power Supply +12.0V
VLCD Power Supply +12.0V

Note :

1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. All V

LCD

(power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
These pins should be no connection.

5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.

6. Specific pin No. #47 is used for “No signal detection” of system signal interface.
It should be GND or NC for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).

‘H’ or NC= 10bit(D) , ‘L’ = 8bit

SECOND LVDS Receiver Signal (A-)

SECOND LVDS Receiver Signal (A+)

SECOND LVDS Receiver Signal (B-)

SECOND LVDS Receiver Signal (B+)

SECOND LVDS Receiver Signal (C-)

SECOND LVDS Receiver Signal (C+)
Ground

SECOND LVDS Receiver Clock Signal(-)

SECOND LVDS Receiver Clock Signal(+)
Ground

SECOND LVDS Receiver Signal (D-)

SECOND LVDS Receiver Signal (D+)

SECOND LVDS Receiver Signal (E-)

SECOND LVDS Receiver Signal (E+)
No Connection

No Connection

No Connection

LD470WUJ

Ver. 0.4

7 /32

LD470WUJ

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.

Table 6-1. TIMING TABLE for NTSC (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Vertical

Frequency

Display Period t

Blank t

Total t

Display Period t

Blank t

Total t

DCLK f

Horizontal f

Vertical f

HV

HB

HP

VV

VB

VP

CLK

H

V

- 960 - tclk

100 140 240 tclk

1060 1100 1200 tclk 2200/2

- 1080 - t

11 45 69 t

1091 1125 1149 t

70 74.25 77 MHz 148.5/2

65 67.5 70 KHz

57 60 63 Hz

Table 6-2. TIMING TABLE for PAL (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Horizontal

Display Period t

Blank t

HV

HB

- 960 - tclk

100 140 240 tclk

HP

HP

HP

Vertical

Frequency

Note

Ver. 0.4

Total t

Display Period t

Blank t

Total t

DCLK f

Horizontal f

Vertical f

HP

VV

VB

VP

CLK

H

V

1060 1100 1200 tclk 2200/2

- 1080 - t

228 270 300 t

1308 1350 1380 t

HP

HP

HP

70 74.25 77 MHz 148.5/2

65 67.5 70 KHz

47 50 53 Hz

The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
The performance of the electro-optical characteristics may be influenced by variance of the vertical

refresh rate.

8 /32

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LD470WUJ

Product Specification

DE, Data

DCLK

First data

Second data

0.7VDD

0.3VDD

t

CLK

0.5 VDD

Invalid data

Invalid data

DE(Data Enable)

Valid data

Pixel 0,0

Valid data

Pixel 1,0

t

HP

Pixel 2,0

Pixel 3,0

Invalid data

Invalid data

t

HV

DE(Data Enable)

Ver. 0.4

1 1080

t

VV

t

VP

9 /32

3-4-2. LVDS Input Signal Characteristics

1) DC Specification

LVDS -

LVDS +

LD470WUJ

Product Specification

# VCM= {(LVDS +) + ( LVDS - )}/2

0V

V

CM

V

IN _ MAXVIN _MIN

Description Symbol Min Max Unit Note

LVDS Common mode Voltage V

LVDS Input Voltage Range V

CM

IN

1.0 1.5 V -

0.7 1.8 V -

Change in common mode Voltage ΔVCM 250 mV -

2) AC Specification

T

clk

LVDS Clock

A

LVDS Data

(F

= 1/T

)

clk

A

LVDS 1’st Clock

LVDS 2nd/ 3rd/ 4thClock

t

SKEW

t

SKEW_mintSKEW_max

t

SKEW

clk

T

clk

80%

20%

t

RF

Description Symbol Min Max Unit Note

LVDS Differential Voltage

High Threshold

Low Threshold

LVDS Clock to Data Skew Margin t

LVDS Clock/DATA Rising/Falling time t

Effective time of LVDS t

LVDS Clock to Clock Skew Margin (Even to Odd) t

1. All Input levels of LVDS signals are based on the EIA 644 Standard.

Note

2. If tRFisn’t enough, t

should be meet the range.

eff

V

TH

V

TL

SKEW

RF

eff

SKEW_EO

3. LVDS Differential Voltage is defined within t

Ver. 0.4

100 300 mV

-300 -100 mV

|(0.25*T

260 (0.3*T

± 360 ps -

eff

)/7| ps -

clk

)/7 ps 2

clk

1/7* T

clk

T

clk

3

-

10 /32

Product Specification

LD470WUJ

LVDS Data

0V

(Differential)

LVDS CLK

0.5tui

360ps

tui

VTH

VTL

360ps

teff

tui : Unit Interval

0V

(Differential)

* This accumulated waveform is tested with differential probe

Ver. 0.4

11 /32

LD470WUJ

Product Specification

3-5. Color Data Reference

The brightness of each primary color(red,green,blue) is based on the 10-bit gray scale data input for the color.
The higher binary input, the brighter the color. Table 8 provides a reference for color versus data input.

Table 8. COLOR DATA REFERENCE

Input Color Data

RED

Color

RED

REDRED

MSB LSB

R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

MSB L SB

GREEN

GREEN

GREENGREEN

BLUE

BLUE

BLUEBLUE

MSB LSB

Basic
Color

RED

GREEN

Black

Red (1023)

Green(1023)

Blue (1023)

Cyan

Magenta

Yellow

White

RED (0000)

RED (0001)

...

RED (1022)

RED (1023)

GREEN(0000)

GREEN(0001)

...

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 1

0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 1

...

... ... ...

......

1 1 1 1 1 1 1 1 1 0

1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 01 1 1 1 1 1 1 1 1 0

1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 11 1 1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

... ...

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 1

... ...

......

BLUE

Ver. 0.4

GREEN(1022)

GREEN(1023)

BLUE (0000)

BLUE (0001)

...

BLUE (1022)

BLUE (1023)

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

... ... ...

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 01 1 1 1 1 1 1 1 1 0

1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 11 1 1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 1

0 0 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 1

...

......

1 1 1 1 1 1 1 1 1 0

1 1 1 1 1 1 1 1 1 01 1 1 1 1 1 1 1 1 0

1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 11 1 1 1 1 1 1 1 1 1

12 /32

3-6. Power Sequence

LD470WUJ

Product Specification

Power Supply For LCD

V

LCD

Interface Signal (Tx)

User Control Signal

(LVDS_select, BIT_select)

Power for Lamp

Table 8. POWER SEQUENCE

Parameter

90%

10%

0V

T

1

T

2

Valid Data

30%

0V

100%

T

6

T

T

3

7

Lamp ON

Value

Min Typ Max

90%

10%

T

8

Vcm

: LVDS Common mode Voltage

T

4

10%

T

5

Unit Notes

T

1

T

2

T

3

T

4

T

5

T

6

T

7

T

8

1. Please avoid floating state of interface signal at invalid period.

Note :

0.5 - 20 ms

0 - - ms 4

200 - - ms 3

200 - - ms 3

1.0 - - s 5

- - T2 ms 4

0.5 - - s

100 - - ms 6

2. When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V.

3. The

T

3

/

T

4

is recommended value, the case when failed to meet a minimum specification,

abnormal display would be shown. There is no reliability problem.

4. If the on time of signals(Interface signal and user control signals) precedes the on time of Power(V
it will be happened abnormal display. When

5.

T

5

should be measured after the Module has been fully discharged between power off and on

T

6

is NC status,

T

6

doesn’t need to be measured.

period.

6. It is recommendation specification that T8has to be 100ms as a minimum value.

Ver. 0.4

LCD

13 /32

),

LD470WUJ

Product Specification

4. Optical Specification

Optical characteristics are determined after the unit has been ‘ON’ and stable in a dark environment at 25± 2°C.
The values are specified at distance 50cm from the LCD surface at a viewing angle of Φ and θ equal to 0 °.

FIG. 9 shows additional information concerning the measurement equipment and method.

Optical Stage(x,y)

LCD Module

Pritchard 880 or
equivalent

50cm

FIG. 9 Optical Characteristic Measurement Equipment and Method

Ta= 25

± 2°C

, V

=12.0V, fV=60Hz, Dclk=74.25MHz VBR_A=1.65V

LCD

Table 6. OPTICAL CHARACTERISTICS

Parameter Symbol

Contrast Ratio CR 1000 1200 - 1

Transmittance -

RED

Color Coordinates
[CIE1931]

Viewing Angle (CR>10)

x axis, right(φ=0°) θr 89 - ­x axis, left (φ=180°) θl 89 - ­y axis, up (φ=90°) θu 89 - ­y axis, down (φ=270°) θd 89 - -

Gray Scale - - - 5

GREEN

BLUE

Rx

Ry 0.334

Gx 0.290

Gy 0.606

Bx 0.146

By 0.058

Back Light : Lamp (Type) 7200nit (Luminance) 0.263/0.240 (Color)

Value

Min Typ Max

5.5 -

0.639

Typ

-0.03

Typ

+0.03

Unit Note

% 3

degree 4

2ms159-G to GGray-to-GrayResponse Time

Ver. 0.4

14 /32

Product Specification

Notes :

1. Contrast Ratio(CR) is defined mathematically as :
CR(Contrast Ratio) = Maximum CRn (n=1, 2, 3, 4, 5)

CRn =

※. Surface luminance is determined after the unit has been ‘ON’ and 1Hour after lighting the

backlight in a dark environment at 25± 2°C. Surface luminance is the luminance value at center

1-point across the LCD surface 50cm from the surface with all pixels displaying white.
For more information see the FIG. 10.

2. Response time is the time required for the display to transit from G(N) to G(M) (Rise Time, TrR)
and from G(M) to G(N) (Decay Time, TrD). For additional information see the FIG. 11. (N<M)

※ G to G Spec stands for average value of all measured points.

3. Definition of Transmittance (Measure Pattern : Full white)

The intensity of radiation (Output)

The intensity of radiation (Input)

Surface Luminance at position n with all white pixels

Surface Luminance at position n with all black pixels

n = the Position number(1, 2, 3, 4, 5). For more information, see FIG 10.

Photo Detector : RD-80S / Field : 2˚

× 100

LD470WUJ

4. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are

determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which
is normal to the LCD module surface. For more information, see the FIG. 12.

5. Gray scale specification

Gamma Value is approximately 2.2. For more information, see the Table 7.

Table 7. GRAY SCALE SPECIFICATION

Gray Level Luminance [%] (Typ.)

L0 0.07

L63 0.27

L127 1.04

L191 2.49

L255 4.68

L319 7.66

L383 11.5

L447 16.1

L511 21.6

L575 28.1

L639 35.4

L703 43.7

L767 53.0

L831 63.2

L895 74.5

L959 86.7

L1023 100

Ver. 0.4

15 /32

Product Specification

Measuring point for surface luminance & luminance variation

H

A

LD470WUJ

③③③③②②②②

V

①①①①

B

A : H / 4 mm

④④④④

FIG. 10 5 Points for Luminance Measure

Response time is defined as the following figure and shall be measured by switching the input signal for
“Gray(N)” and “Gray(M)”.

T

r

R

100

90

⑤⑤⑤⑤

T

r

D

B : V / 4 mm
@ H,V : Active Area

Ver. 0.4

Optical
Response

10

0

Gray(N)

N,M = Black~White, N<M

FIG. 11 Response Time

Gray(M)

Gray(N)

16 /32

Dimension of viewing angle range

LD470WUJ

Product Specification

φ

= 180°, Left

φ

= 270°, Down

Normal

θ

φ

FIG.12 Viewing Angle

E

Y

φ

= 90°, Up

φ

= 0°, Right

Ver. 0.4

17 /32

Product Specification

5. Mechanical Characteristics

Table 8 provides general mechanical characteristics.

Table 8. MECHANICAL CHARACTERISTICS

Item Value

LD470WUJ

Horizontal

Outline Dimension

(Only Glass)

Active Display Area

Weight 2.6kg(typ), 2.9Kg(Max)

Surface Treatment

Vertical

Thickness

Horizontal

Vertical

Hard coating(3H)
Anti-glare treatment of the front polarizer(<1%)

1061.8 mm

606.8 mm

1.75 mm

1039.68 mm

584.82 mm

Note : Please refer to a mechanic drawing in terms of tolerance at the next page.

Ver. 0.4

18 /32

[ FRONT VIEW ]

LD470WUJ

Product Specification

Ver. 0.4

19 /32

Product Specification

6. Reliability

Table 9. ENVIRONMENT TEST CONDITION

No. Test Item Condition

1 High temperature storage test Ta= 60°C 240h

2 Low temperature storage test Ta= -20°C 240h

3 High temperature operation test Ta= 50°C 50%RH 240h

4 Low temperature operation test Ta= 0°C 240h

5 Humidity condition Operation Ta= 40 °C ,90%RH

LD470WUJ

6

Altitude operating

storage / shipment

0 - 15,000 ft
0 - 40,000 ft

Note : Before and after Reliability test, Board ass’y should be operated with normal function.

Ver. 0.4

20 /32

Product Specification

7. International Standards

7-1. Environment

a) RoHS, Directive 2002/95/EC of the European Parliament and of the council of 27 January 2003

LD470WUJ

Ver. 0.4

21 /32

Product Specification

8. Packing

8-1. Packing Form

a) Package quantity in one Pallet : 70 pcs

b) Pallet Size :1250 mm(L) X 800 mm(W) X 1088 mm(H)

LD470WUJ

Ver. 0.4

22 /32

LD470WUJ

Product Specification

9. Precautions

Please pay attention to the followings when you use this TFT LCD panel.

9-1. Assembly Precautions

(1) Please attach the surface transparent protective plate to the surface in order to protect the polarizer.

Transparent protective plate should have sufficient strength in order to the resist external force.
(2) You should adopt radiation structure to satisfy the temperature specification.
(3) Acetic acid type and chlorine type materials for the cover case are not desirable because the former

generates corrosive gas of attacking the polarizer at high temperature and the latter causes circuit break
by electro-chemical reaction.

(4) Do not touch, push or rub the exposed polarizers with glass, tweezers or anything harder than HB

pencil lead. And please do not rub with dust clothes with chemical treatment.

Do not touch the surface of polarizer for bare hand or greasy cloth.(Some cosmetics are detrimental

to the polarizer.)
(5) When the surface becomes dusty, please wipe gently with absorbent cotton or other soft materials like

chamois soaks with petroleum benzine. Normal-hexane is recommended for cleaning the adhesives
used to attach front / rear polarizers. Do not use acetone, toluene and alcohol because they cause
chemical damage to the polarizer

(6) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizer causes

deformations and color fading.
(7) Board ass’y should be put on the mold frame properly.
(8) FFC Cable should be connected between System board and Source PCB correctly.
(9) Mechanical structure for backlight system should be designed for sustaining board ass’y safely.

9-2. Operating Precautions

(1) Response time depends on the temperature.(In lower temperature, it becomes longer.)
(2) Brightness depends on the temperature. (In lower temperature, it becomes lower.)

And in lower temperature, response time(required time that brightness is stable after turned on)
becomes longer

(3) Be careful for condensation at sudden temperature change.Condensation makes damage to polarizer or

electrical contacted parts. And after fading condensation, smear or spot will occur.
(4) When fixed patterns are displayed for a long time, remnant image is likely to occur.
(5) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference shall be

done by system manufacturers. Grounding and shielding methods may be important to minimized the
interference.

(6) Please do not give any mechanical and/or electrical impact to board assy. Otherwise, it can’t be operated

its full characteristics perfectly.

Ver. 0.4

23 /32

LD470WUJ

Product Specification

9-3. Electrostatic Discharge Control

Since a module is composed of electronic circuits, it is not strong to electrostatic discharge. Make certain that
treatment persons are connected to ground through wrist band etc. And don’t touch interface pin directly.
Panel ground path should be connected to metal ground.

9-4. Precautions for Strong Light Exposure

Strong light exposure causes degradation of polarizer and color filter.

9-5. Storage

When storing the board ass’y as spares for a long time, the following precautions are necessary.

(1) Store them in a dark place. Do not expose the board ass’y to sunlight or fluorescent light. Keep the

temperature between 5°C and 35°C at normal humidity.

(2) The polarizer surface should not come in contact with any other object.

It is recommended that they be stored in the container in which they were shipped.

Ver. 0.4

24 /32

# APPENDIX-I

■■■■ Pallet Ass’y

①①①① ②②②②

ⓐ

③③③③ ④④④④

ⓒ

LD470WUJ

Product Specification

ⓑ

⑤⑤⑤⑤

ⓓ

ⓔ

⑥⑥⑥⑥

ⓘ

ⓐ

ⓑ

ⓒ

ⓓ

ⓔ

ⓕ

ⓗ

ⓖ

ⓕ

MaterialDescriptionNo.

PlywoodPallet

Single WallSHEET

PEPE Sheet

EPPTop Packing

EPPBottom Packing

Single WallAngle Packing

Ver. 0.4

ⓖ

ⓗ

ⓘ

OPPTape

PPBand

SteelClip

25 /32

# APPENDIX- II-1

■ Board Ass’y ID Label

LD470WUJ

Product Specification

Model

Serial No.

Work Order

6060L-XXXX LD470WUJ-XXXX-XXX

XXXX

Ver. 0.4

26 /32

# APPENDIX- II-2

■ BOX Label

LD470WUJ

Product Specification

6060L-0000 LD470WUJ-XXXX-XXX
QTY : 10(PAJU)(P8)(01/01)

Type : BA Buyer : XXXX

Category : PROD

■ Pallet Label

LD470WUJ

6060L-XXXX

70 PCS

PAJU KOREA

001/01-01

XXXXXXXXXXXXX XXX

SCE1

BA

XXXXX

Ver. 0.4

27 /32

Product Specification

# APPENDIX-I-1

■ Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter(Pin7=“L or NC” )

THC63LVD103

Host System

30 Bit

RED0
RED1
RED2
RED3
RED4
RED5
RED6
RED7
RED8

RED9
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
GREEN6
GREEN7
GREEN8
GREEN9

BLUE0
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
BLUE6
BLUE7
BLUE8
BLUE9

Hsync
Vsync

Data Enable

CLOCK

or Compatible

33
34
35
36
37
38
59
61
4
5
40
41
42
44
45
46
62
63
6
8
48
49
50
52
53
54
64
1
9
11
55
57
58
12

TA1-TA1+

TB1-/TB1+

TC1-/TC1+

TCLK1-

TCLK1+

TD1-/TD1+

TE1-/TE1+

TA2-/TA2+

TB2-/TB2+

TC2-/TC2+

TCLK2-

TCLK2+

TD2-/TD2+

TE2-/TE2+

40
39
38

37
36
35

33

32

30

29
28

27

24

23

22
21

20

19

17

16
14

13
12

11

FI-RE51S-HF

GND

12
13
14
15
16
17
19
20
22
23
24
25

28
29
30
31
32
33
35
36
38
39
40
41

7

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

LCM Module

Timing

Controller

RO0N
RO0P
RO1N
RO1P
RO2N
RO2P
ROCLKN
ROCLKP
RO3N
RO3P
RO4N
RO4P

RE0N
RE0P
RE1N
RE1P
RE2N
RE2P
RECLKN
RECLKP
RE3N
RE3P
RE4N
RE4P

VESA /

LD470WUJ

JEIDA

Note: 1. The LCD module uses a 100 Ohm[Ω] resistor between positive and negative lines of each receiver

input.

2. Refer to LVDS Transmitter Data Sheet for detail descriptions. (THC63LVD103 or Compatible)

3. ‘9’ means MSB and ‘0’ means LSB at R,G,B pixel data.

Ver. 0.4

28 /32

LD470WUJ

Product Specification

# APPENDIX-I-2

■ Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter(Pin7=“H”)

THC63LVD103

Host System

30 Bit

RED0
RED1
RED2
RED3
RED4
RED5
RED6
RED7
RED8

RED9
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
GREEN6
GREEN7
GREEN8
GREEN9

BLUE0
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
BLUE6
BLUE7
BLUE8
BLUE9

Hsync
Vsync

Data Enable

CLOCK

or Compatible

4
5
59
61
33
34
35
36
37
38
6
8
62
63
40
41
42
44
45
46
9
11
64
1
48
49
50
52
53
54
55
57
58
12

TA1-TA1+

TB1-/TB1+

TC1-/TC1+

TCLK1-

TCLK1+

TD1-/TD1+

TE1-/TE1+

TA2-/TA2+

TB2-/TB2+

TC2-/TC2+

TCLK2-

TCLK2+

TD2-/TD2+

TE2-/TE2+

27

24

12
11

40
39
38
37
36
35

33
32
30
29

28

23

22

21
20

19

17
16
14

13

VCC

FI-RE51S-HF

12
13
14
15
16
17
19
20
22
23
24
25

28
29
30
31
32
33
35
36
38
39
40
41

7

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

100ΩΩΩΩ

LCM Module

Timing

Controller

RO0N
RO0P
RO1N
RO1P
RO2N
RO2P
ROCLKN
ROCLKP
RO3N
RO3P
RO4N
RO4P

RE0N
RE0P
RE1N
RE1P
RE2N
RE2P
RECLKN
RECLKP
RE3N
RE3P
RE4N
RE4P

VESA /

JEIDA

Note :1. The LCD module uses a 100 Ohm[Ω] resistor between positive and negative lines of each receiver

input.

2. Refer to LVDS Transmitter Data Sheet for detail descriptions. (THC63LVD103 or Compatible)

3. ‘9’ means MSB and ‘0’ means LSB at R,G,B pixel data.

Ver. 0.4

29 /32

Product Specification

# APPENDIX- II-1

LVDS Data-Mapping info. (10bit)

■ LVDS Select : “H” Data-Mapping (JEIDA format)

RCLKP

RCLKM

LD470WUJ

RAP

RBP

RCP

RDP

REP

R19 R18 R17 R16G14 R15R14’ R14R15’ G14”

B14 G19 G18 G17B15 G16G15’ G15G16’ B15”

V

SYNCHSYNC

B13 B12 G13 G12X R13R12’ R12R13’ X”

B11 B10 G11 G10X R11R10’ R10R11’ X”

B19 B18DE B17B16’ B16B17’ DE”

■ LVDS Select : “L” Data-Mapping (VESA format)

RCLKP

RCLKM

RAP

RBP

R15 R14 R13 R12G10 R11R10’ R10R11’ G10”

B10 G15 G14 G13B11 G12G11’ G11G12’ B15”

Ver. 0.4

RCP

RDP

REP

V

SYNCHSYNC

B17 B16 G17 G16X R17R16’ R16R17’ X”

B19 B18 G19 G18X R19R18’ R18R19’ X”

B15 B14DE B13B12’ B12B13’ DE”

30 /32

# APPENDIX- II-2

■ LVDS Select : “H” Data-Mapping (JEIDA format)

RCLKP

RCLKM

LD470WUJ

Product Specification

LVDS Data-Mapping info. (8bit)

RAP

RBP

RCP

RDP

R17 R16 R15 R14G12 R13R12’ R12R13’ G12”

B12 G17 G16 G15B13 G14G13’ G13G14’ B13”

V

SYNCHSYNC

B11 B10 G11 G10X R11R10’ R10R11’ X”

B17 B16DE B15B14’ B14B15’ DE”

■ LVDS Select : “L” Data-Mapping (VESA format)

RCLKP

RCLKM

RAP

RBP

R15 R14 R13 R12G10 R11R10’ R10R11’ G10”

B10 G15 G14 G13B11 G12G11’ G11G12’ B15”

Ver. 0.4

RCP

RDP

V

SYNCHSYNC

B17 B16 G17 G16X R17R16’ R16R17’ X”

B15 B14DE B13B12’ B12B13’ DE”

31 /32

Product Specification

# APPENDIX- ⅥⅥⅥⅥ

■ Option Pin Circuit Block Diagram

1) Circuit Block Diagram of LVDS Format Selection pin

LVDS Select Pin : Pin 7

1KΩΩΩΩ

LVDS Select

(Pin 7)

LD470WUJ

LVDS Select

50KΩΩΩΩ

ASIC

(TCON)

System Side

2) Circuit Block Diagram of Bit Format Selection pin

Bit Select Pin : Pin 27

1KΩΩΩΩ

Bit Select

(Pin 27)

System Side

3) Circuit Block Diagram of AGP Option Selection pin

AGP Select Pin : Pin 47

1KΩΩΩΩ

AGP Select

(Pin 47)

LCM Side

Bit Select

50KΩΩΩΩ

ASIC

(TCON)

LCM Side

AGP Select

System Side

Ver. 0.4

50KΩΩΩΩ

ASIC

(TCON)

LCM Side

32 /32