LG Display LD470WUB-SCB1 Specification

( ) Preliminary Specification

SUFFIX

SCB1(RoHS Verified)

(●) Final Specification

Title 47.0” WUXGA TFT LCD

LD470WUB

Product Specification

SPECIFICATION

FOR

APPROVAL

BUYER General

MODEL

APPROVED BY

SIGNATURE

DATE

SUPPLIER LG DISPLAY Co., Ltd.

*MODEL LD470WUB

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY

K.S. Nah

/ Chief Senior Engineer

REVIEWED BY

G. N. Kim

/ Chief Senior Engineer

PREPARED BY

J. H. Kim

/ Senior Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

Ver. 1.1

your signature and comments.

PD Product Design Dept.

LG Display Co., Ltd

1 / 37

Product Specification

OPTICAL SPECIFICATIONS

CONTENTS

LD470WUB

Number ITEM

COVER 1

CONTENTS

RECORD OF REVISIONS

1 GENERAL DESCRIPTION

2 ABSOLUTE MAXIMUM RATINGS

3 ELECTRICAL SPECIFICATIONS

3-1 ELECTRICAL CHARACTERISTICS

3-2 INTERFACE CONNECTIONS

3-3 SIGNAL TIMING SPECIFICATIONS

3-4 SIGNAL TIMING WAVEFORMS

3-5 COLOR DATA REFERENCE

3-6 POWER SEQUENCE

5 MECHANICAL CHARACTERISTICS

Page

6 RELIABILITY

7 INTERNATIONAL STANDARDS

7-1 SAFETY

7-2 EMC

8 PACKING

8-1 INFORMATION OF LCM LABEL

8-2 PACKING FORM

9 PRECAUTIONS

9-1 MOUNTING PRECAUTIONS

9-2 OPERATING PRECAUTIONS

9-3 ELECTROSTATIC DISCHARGE CONTROL

9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE

9-5 STORAGE

9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM

9-7 APPROPRIATE CONDITION FOR PUBLIC DISPLAY

Ver. 1.1

2 / 37

Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description

0.0 Mar. 29. 2011 - Preliminary Specification (First Draft)

1.0 May. 25. 2011 - Final Specification

1.1 Feb. 28. 2012 26 Updated the content of 8-1. Information of LCM label

LD470WUB

Ver. 1.1

3 / 37

LD470WUB

Select

I2C

Product Specification

1. General Description

The LD470WUB is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive display type which is operating in the normally black mode. It has a 46.96 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot. Therefore, it can present a palette of more than 1.07 Billion colors. It has been designed to apply the 10-bit 2-port LVDS interface. It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.

Mini-LVDS(RGB)

Control Signals

Power Signals

3PinX1CN(High)

Source Driver Circuit

S1 S1920

TFT - LCD Panel

(1920 × RGB × 1080 pixels)

[Gate In Panel]

G1080

Back light Assembly

LVDS

2Port

LVDS Select

Bit

+12.0V

VBR-A, VBR-B

LVDS 1,2

Option signal

CN1

(51pin)

Status

+24.0V, GND

EEPROM

SCL

Timing Controller

LVDS Rx + DCA + ODC

Power Circuit

SDA

Integrated

Block

Inverter

General Features

Active Screen Size 46.96 inch (1192.87mm) diagonal

Outline Dimension 1068.0(H) x 613.2(V) x 54.7 mm(D) (Typ.)

Pixel Pitch 0.5415 mm x 0.5415 mm

Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement

Color Depth 10Bit (D), 1.07 Billion colors

Luminance, White 500 cd/m2 (Center 1point ,Typ.)

Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))

Power Consumption Total 219.84W (Typ.) [Logic=6.84 W, Backlight=213W(V

BR-A

=1.65V)]

Weight 14.5 Kg (Typ.)

Display Mode Transmissive mode, Normally black

Surface Treatment Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)

Possible Display Type Landscape and Portrait Enabled

Ver. 1.1

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LD470WUB

2. Temperature and relative humidity range are shown in the figure below.

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or damage to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Symbol

Unit Remark

Min Max

Value

Power Input

Voltage

ON/OFF Control Voltage VON/OFF -0.3 +5. 5 VDC

Brightness Control Voltage VBR 0 +5.0 VDC

Operating Temperature TOP 0 +50

Storage Temperature TST -20 +60

Operating Ambient Humidity HOP 10 90 %RH

Storage Humidity HST 10 90 %RH

Notes

1. Ambient temperature condition (Ta = 25 ± 2 °C )

LCM VLCD -0.3 +14.0 VDC

Backlight inverter VBL -0.3 +27.0 VDC

Wet bulb temperature should be Max 39°C, and no condensation of water.

90%

60%

°C

at 25 ± 2 °C

Note 1

Wet Bulb

Temperature [°C]

10 20 30 40 50 60 70 800-20

Dry Bulb Temperature [°C]

Ver. 1.1

40%

10%

Storage

Operation

Humidity [(%)RH]

5 / 37

LD470WUB

2. The current is specified at maximum current pattern.

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the CCFL backlight and inverter circuit.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Value

Min Typ Max

Circuit :

Power Input Voltage V

Power Input Current I

Power Consumption P

Rush current I

LCD

RUSH

11.4 12.0 12.6 V

- 570 740

- 920 1196

6.84 8.88

- 5.0

Notes: 1. The specified current and power consumption are under the V

condition whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

White : 1023Gray Black : 0Gray

Unit Note

mA 1

mA 2

Watt 1

A 3

=12.0V, 25 ± 2°C, fV=60Hz

LCD

Ver. 1.1

Mosaic Pattern(8 x 6)

6 / 37

Product Specification

Control System

On/Off

Table 3. ELECTRICAL CHARACTERISTICS (Continue)

Parameter Symbol

Min Typ Max

Inverter :

Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1

Power Supply Input Voltage Ripple - - 0.5 Vp-p 1

Values

Unit Notes

LD470WUB

Power Supply

Input Current

After Aging IBL_A

Before Aging IBL_B

- 8.9

- 10.0

- 11.0

- 12.0

10.3

11.0

12.0

13.0

A VBR-A = 1.65V … 1

A VBR-A = 3.3V … 1

A VBR-A = 1.65V … 2

A VBR-A = 3.3V … 2

VBL = 22.8V

Power Supply Input Current (In-Rush) Irush - - 14.0 A

VBR-B = 3.3V VBR-A = 1.65V

Power Consumption PBL -

213 250

W VBR-A = 1.65V … 1

Brightness Adjust VBR-A 0.0 1.65 3.3 Vdc

Input Voltage for

Signals

On V on 2.5 - 5.0 Vdc

Off V off -0.3 0.0 0.8 Vdc

Brightness Adjust VBR-B 0 - 3.3 V

Lamp:

Discharge Stabilization Time Ts

Life Time 50,000 Hrs

3 min 3

Notes :

1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 120

minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage 24Vand VBR (VBR-A : 1.65V & VBR-B :3.3V), it is total power consumption.

The ripple voltage of the power supply input voltage is under 0.5 Vp-p. LPL recommend Input Voltage is

24.0V ± 5%.

2. Electrical characteristics are determined within 30 minutes at 25±2°C.

The specified currents are under the typical supply Input voltage 24V.

3. The brightness of the lamp after lighted for 5minutes is defined as 100%. TS is the time required for the brightness of the center of the lamp to be not less than 95% at typical current.

The screen of LCD module may be partially dark by the time the brightness of lamp is stable after turn on.

4. Specified Values are for a single lamp which is aligned horizontally. The life time is determined as the time which luminance of the lamp is 50% compared to that of initial value at the typical lamp current (VBR-A : 1.65V & VBR-B :3.3V), on condition of continuous operating at 25± 2°C

5. The duration of rush current is about 10ms.

Ver. 1.1

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LD470WUB

Product Specification

3-2. Interface Connections

This LCD module employs two kinds of interface connection, a 51-pin connector is used for the module electronics and Master 14-pin and Slave 12-pin connectors are used for the integral backlight system.

3-2-1. LCD Module

- LCD Connector(CN1): FI-RE51S-HF or Equivalent, Refer to below table.

- Mating Connector : FI-RE51HL

Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION

No Symbol Description No Symbol Description

1 GND

10 11 GND

12 RO0N

13 RO0P

14 RO1N

16 RO2N

17 RO2P

18 GND

19 ROCLKN

20 21 GND 22 RO3N

23 RO3P

24 RO4N 25 RO4P 26

NC No Connection

NC No Connection (Reserved for LGD)

LVDS Select

NC No Connection

RO1P

ROCLKP

Ground

‘H’ =JEIDA , ‘L’ or NC = VESA

Ground

FIRST LVDS Receiver Signal (A-)

FIRST LVDS Receiver Signal (A+)

FIRST LVDS Receiver Signal (B-)

FIRST LVDS Receiver Signal (B+)

FIRST LVDS Receiver Signal (C-)

FIRST LVDS Receiver Signal (C+) Ground

FIRST LVDS Receiver Clock Signal(-)

FIRST LVDS Receiver Clock Signal(+) Ground

FIRST LVDS Receiver Signal (D-)

FIRST LVDS Receiver Signal (D+)

FIRST LVDS Receiver Signal (E-) FIRST LVDS Receiver Signal (E+)

No Connection

Bit Select

39 40 RE4N

41 RE4P

46 47 48

50 51

- - -

RE0N

RE0P

RE1N

RE1P

RE2N

RE2P

GND

RECLKN

RECLKP

GND

RE3N

RE3P

GND Ground

AGP ‘H’=AGP, ‘L or NC’ = NSB VLCD Power Supply +12.0V

VLCD Power Supply +12.0V

VLCD Power Supply +12.0V VLCD Power Supply +12.0V

‘H’ or NC= 10bit(D) , ‘L’ = 8bit

SECOND LVDS Receiver Signal (A-)

SECOND LVDS Receiver Signal (A+)

SECOND LVDS Receiver Signal (B-)

SECOND LVDS Receiver Signal (B+)

SECOND LVDS Receiver Signal (C-)

SECOND LVDS Receiver Signal (C+) Ground

SECOND LVDS Receiver Clock Signal(-)

SECOND LVDS Receiver Clock Signal(+) Ground

SECOND LVDS Receiver Signal (D-)

SECOND LVDS Receiver Signal (D+)

SECOND LVDS Receiver Signal (E-)

SECOND LVDS Receiver Signal (E+) No Connection

No Connection

Ver. 1.1

Notes:

1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. All VLCD (power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.

These pins should be no connection.

5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.

If used for 8Bit(R), these pins are no connection.

6. Specific pin No. #47 is used for “No signal detection” of system signal interface.

It should be GND or NC for NSB(No Signal Black) during the system interface signal is not. If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).

8 / 37

Product Specification

GND

Backlight Ground

GND

Backlight Ground

GND

3-2-2. Backlight Inverter

Master

-Inverter Connector : S14B-PH-SMC (JST) or Equivalent

- Mating Connector : PHR-14 or Equivalent

Table 5. INVERTER CONNECTOR PIN CONFIGULATION

Pin No Symbol Description Master Slave Note

Slave

-Inverter Connector : S12B-PH-SMC (JST) or Equivalent

-Mating Connector : PHR-12 or Equivalent

LD470WUB

VBL Power Supply +24.0V VBL VBL

GND

VBR-A

ON/OFF

VBR-B

Status

Backlight Ground

Analog dimming voltage DC 0.0V ~ 3.3V (Typ : 1.65V)

0.0V ~ 5.0V

Burst dimming voltage DC 0.0V ~ 3.3V

Normal : Upper 3.0V

Abnormal : Under 0.7V

GND GND

VBR-A Don’t care 2, 3

On/Off Don’t care

VBR-B - 3

Status -

Notes : 1. GND should be connected to the LCD module’s metal frame.

2. If Pin #11 is open, VBR-A = 1.65V. When apply over 1.65V( ~ 3.3V) continuously, its luminance is increasing however lamp’s life time is decreasing. It could be usable for boost up luminance when using DCR (=Dynamic contrast ratio) function only.

3. Minimum Brightness : VBR-B =0V Maximum Brightness : VBR-B = 3.3V

4. Even though Pin #14 is open, there is no effect on inverter operating, The output terminal of inverter.

5. Each impedance of pin #11,12 and 13 is 140[KΩ], 41[KΩ],125[KΩ]

◆ Rear view of LCM

Ver. 1.1

…

PCB

…

PCB

…

<Slave>

9 / 37

LD470WUB

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timings should be satisfied with the following specification for normal operation.

Table 6-1. TIMING TABLE for NTSC (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Display Period tHV - 960 - tclk

Horizontal

Vertical

Frequency

Blank tHB 100 140 240 tclk

Total tHP 1060 1100 1200 tclk 2200/2

Display Period tVV - 1080 - tHP

Blank tVB 11 45 69 tHP

Total tVP 1091 1125 1149 tHP

DCLK fCLK 70 74.25 77 MHz 148.5/2

Horizontal fH 65 67.5 70 KHz

Vertical fV 57 60 63 Hz

Table 6-2. TIMING TABLE for PAL (DE Only Mode)

ITEM Symbol Min Typ Max Unit Note

Display Period tHV - 960 - tclk

Horizontal

Blank tHB 100 140 240 tclk

Total tHP 1060 1100 1200 tclk 2200/2

Vertical

Frequency

Note

Ver. 1.1

Display Period tVV - 1080 - tHP

Blank tVB 228 270 300 tHP

Total tVP 1308 1350 1380 tHP

DCLK fCLK 70 74.25 77 MHz 148.5/2

Horizontal fH 65 67.5 70 KHz

Vertical fV 47 50 53 Hz

The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode). The performance of the electro-optical characteristics may be influenced by variance of the vertical

refresh rate.

10 / 37

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LD470WUB

Product Specification

DE, Data

DCLK

First data

Second data

0.7VDD

0.3VDD

tCLK

DE(Data Enable)

0.5 VDD

Invalid data

Valid data

Pixel 0,0

Valid data

Pixel 1,0

tHP

Pixel 2,0

Pixel 3,0

Invalid data

tHV

DE(Data Enable)

Ver. 1.1

1 1080

tVV

tVP

11 / 37

3-4-2. LVDS Input Signal Characteristics

1) DC Specification

LVDS -

LVDS +

LD470WUB

Product Specification

# VCM= {(LVDS +) + ( LVDS - )} /2

IN _ MAXVIN _MIN

Description Symbol Min Max Unit Note

LVDS Common mode Voltage V

LVDS Input Voltage Range V

1.0 1.5 V -

0.7 1.8 V -

Change in common mode Voltage ∆VCM 250 mV -

2) AC Specification

clk

LVDS Clock

LVDS Data

= 1/T

)

clk

LVDS 1’st Clock

LVDS 2nd/ 3rd/ 4thClock

tSKEW

SKEW_mintSKEW_max

clk

80%

20%

Description Symbol Min Max Unit Note

LVDS Differential Voltage

High Threshold

Low Threshold

LVDS Clock to Data Skew Margin t

LVDS Clock/DATA Rising/Falling time t

Effective time of LVDS t

LVDS Clock to Clock Skew Margin (Even to Odd) t

1. All Input levels of LVDS signals are based on the EIA 644 Standard.

Note

2. If tRFisn’t enough, t

should be meet the range.

eff

SKEW

eff

SKEW_EO

3. LVDS Differential Voltage is defined within t

Ver. 1.1

100 300 mV

-300 -100 mV

0.25*T

260 (0.3*T

)/7| ps -

clk

)/7 ps 2

clk

±360

1/7* T

clk

eff

ps -

clk

12 / 37

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