LG Display LD470WUB-SCA1 Specification

Preliminary Specification

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(

)

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Final Specification

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LD470WUB

Product Specification

SPECIFICATION

FOR

APPROVAL

47.0” WUXGA TFT LCDTitle

MODEL

APPROVED BY

GeneralBUYER

SIGNATURE

DATE

LG DISPLAY Co., Ltd.SUPPLIER

LD470WUB*MODEL

SCA1(RoHS Verified)SUFFIX

*When you obtain standard approval,

please use the above model name without suffix

APPROVED BY

K.S. Nah /Senior Manager

REVIEWED BY

B. Y. Park / Manager

PREPARED BY

J. H. Kim / Engineer

SIGNATURE

DATE

Please return 1 copy for your confirmation with

your signature and comments.

Ver1.0

PD Product Development Dept.

LG Display Co., Ltd

1 / 38

Product Specification

CONTENTS

LD470WUB

CONTENTS

RECORD OF REVISIONS

GENERAL DESCRIPTION1

ABSOLUTE MAXIMUM RATINGS2

ELECTRICAL SPECIFICATIONS3

ELECTRICAL CHARACTERISTICS3-1

INTERFACE CONNECTIONS3-2

SIGNAL TIMING SPECIFICATIONS3-3

SIGNAL TIMING WAVEFORMS3-4

COLOR DATA REFERENCE3-5

POWER SEQUENCE3-6

OPTICAL SPECIFICATIONS4

MECHANICAL CHARACTERISTICS5

ITEMNumber

Page

1COVER

Ver1.0

RELIABILITY6

INTERNATIONAL STANDARDS7

SAFETY7-1

EMC7-2

PACKING8

DESIGNATION OF LOT MARK8-1

PACKING FORM8-2

PRECAUTIONS9

MOUNTING PRECAUTIONS9-1

OPERATING PRECAUTIONS9-2

ELECTROSTATIC DISCHARGE CONTROL9-3

PRECAUTIONS FOR STRONG LIGHT EXPOSURE9-4

STORAGE9-5

HANDLING PRECAUTIONS FOR PROTECTION FILM9-6

APPROPRIATE CONDITION FOR PUBLIC DISPLAY9-7

2 / 38

Product Specification

RECORD OF REVISIONS

DescriptionPageRevision DateRevision No.

Preliminary Specification (First Draft) -Jan. 14. 20100.0

Pin Configuration(Pin 7/8/9)8Mar. 3. 20100.1

Power Sequence(T3)15-

Color Coordinates (R/G/B)18-

Added contents about Panel surface in Notes 5April. 6 . 20100.2

Final Specification-April. 7 . 20101.0

OPC block is deleted. 4

Change in pin configurations8

Change in Response Time17

Final Specification-Jun. 01. 20101.1

LD470WUB

Ver1.0

3 / 38

LD470WUB

Product Specification

1. General Description

The LD470WUB is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive display type which is operating in the normally black mode. It has a 46.96 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot. Therefore, it can present a palette of more than 1.07 Billion colors. It has been designed to apply the 10-bit 2-port LVDS interface. It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important.

LVDS

2Port

LVDS Select

Bit Select

+12.0V

LVDS 1,2

Option signal

CN1

(51pin)

I2C

EXTVBR-B

Status

+24.0V, GND

General Features

EEPROM

SCL

Timing Controller

LVDS Rx +

Power Circuit

SDA

DGA + ODC

Integrated

Block

Inverter

46.96 inch (1192.87mm) diagonalActive Screen Size

1068.0(H) x 613.2.0 (V) x 54.7 mm(D) (Typ.)Outline Dimension

0.5415 mm x 0.5415 mmPixel Pitch

1920 horiz. by 1080 vert. Pixels, RGB stripe arrangementPixel Format

Mini-LVDS(RGB)

Control Signals

Power Signals

3PinX1CN(High)

Source Driver Circuit

S1 S

TFT - LCD Panel

(

1920 × RGB × 1080 pixels)

[Gate In Panel]

G1080

Back light Assembly

1920

Ver1.0

10Bit (D), 1.07 Billion colorsColor Depth

700 cd/m2 (Center 1point ,Typ.)Luminance, White

Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))Viewing Angle (CR>10)

Total 219.7W (Typ.) [Logic=6.7 W, Backlight=213W(V

13.5 Kg (Typ.) Weight

Transmissive mode, Normally blackDisplay Mode

Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)Surface Treatment

Landscape and Portrait Enabled Possible Display Type

BR-A

=1.65V)]Power Consumption

4 / 38

LD470WUB

Product Specification

2. Absolute Maximum Ratings

The following items are maximum values which, if exceeded, may cause faulty operation or damage to the LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Parameter Remark

Symbol

MaxMin

Value

Power Input

Voltage

Notes

1. Ambient temperature condition (Ta = 25 ± 2 °C )

LCM

+500TOPOperating Temperature

+60-20TSTStorage Temperature

2. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be Max 39°C, and no condensation of water.

Unit

at 25 ± 2 °CVDC+14.0-0.3VLCD

VDC+27.0-0.3VBLBacklight inverter

VDC+5. 5-0.3VON/OFFON/OFF Control Voltage

VDC+5.00VBRBrightness Control Voltage

°C

Note 1

%RH9010HOPOperating Ambient Humidity

%RH9010HSTStorage Humidity

Ver1.0

Wet Bulb Temperature [°C]

10 20 30 40 50 60 70 800-20 Dry Bulb Temperature [°C]

90%

60%

40%

10%

Storage

Operation

Humidity

[(%)RH]

5 / 38

LD470WUB

Product Specification

3. Electrical Specifications

3-1. Electrical Characteristics

It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the CCFL backlight and inverter circuit.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

Value

Circuit :

Power Input Voltage

Power Input Current

Power Consumption

Rush current

LCD

RUSH

-P

-I

Notes: 1. The specified current and power consumption are under the V

condition whereas mosaic pattern(8 x 6) is displayed and fVis the frame frequency.

2. The current is specified at maximum current pattern.

3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

White : 1023Gray Black : 0Gray

MaxTypMin

12.612.011.4V

700570450

1070920750

-6.72

5.0-

=12.0V, 25 ± 2°C, fV=60Hz

LCD

NoteUnit

1mA

2mA

1Watt

Ver1.0

Mosaic Pattern(8 x 6)

6 / 38

Product Specification

Table 3. ELECTRICAL CHARACTERISTICS (Continue)

Parameter Symbol

Inverter :

LD470WUB

Values

NotesUnit

MaxTypMin

Power Supply Input Current

Power Consumption

Input Voltage for

Control System

On/Off

Signals

Brightness Adjust

Lamp:

Discharge Stabilization Time

IBL_AAfter Aging

IBL_BBefore Aging

On Vdc5.0-2.5V on

Off

Vdc25.224.022.8VBLPower Supply Input Voltage

1Vp-p0.5--Power Supply Input Voltage Ripple

8.9-

10.0-

11.0-

12.0-

10.3

11.0

12.0

13.0

VBR-A = 1.65V … 1A

VBR-A = 3.3V … 1A

VBR-A = 1.65V … 2A

VBR-A = 3.3V … 2A

VBL = 22.8V VBR-B = 3.3V

A14.0--IrushPower Supply Input Current (In-Rush)

VBR-A = 1.65V

-PBL

250213

VBR-A = 1.65V … 1W

Vdc3.31.650.0VBR-ABrightness Adjust

Vdc0.80.0-0.3V off

V3.3-0VBR-B

3min3

Hrs50,000Life Time

Notes :

1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 120

minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage 24Vand VBR (VBR-A : 1.65V & VBR-B :3.3V), it is total power consumption.

The ripple voltage of the power supply input voltage is under 0.5 Vp-p. LPL recommend Input Voltage is

24.0V ± 5%.

2. Electrical characteristics are determined within 30 minutes at 25±2°C.

The specified currents are under the typical supply Input voltage 24V.

3. The brightness of the lamp after lighted for 5minutes is defined as 100%. TS is the time required for the brightness of the center of the lamp to be not less than 95% at typical current.

The screen of LCD module may be partially dark by the time the brightness of lamp is stable after turn on.

4. Specified Values are for a single lamp which is aligned horizontally. The life time is determined as the time which luminance of the lamp is 50% compared to that of initial value at the typical lamp current (VBR-A : 1.65V & VBR-B :3.3V), on condition of continuous operating at 25± 2°C

5. The duration of rush current is about 10ms.

Ver1.0

7 / 38

LD470WUB

Product Specification

3-2. Interface Connections

This LCD module employs two kinds of interface connection, a 51-pin connector is used for the module electronics and Master 14-pin and Slave 12-pin connectors are used for the integral backlight system.

3-2-1. LCD Module

- LCD Connector(CN1): FI-RE51S-HF or Equivalent, Refer to below table.

- Mating Connector : FI-RE51HL

Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION

11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

DescriptionSymbolNo

1 2 3 4 5 6 7

8 9

GND

GND RO0N RO0P RO1N RO1P

RO2N RO2P

GND

ROCLKN

ROCLKP

GND RO3N RO3P RO4N RO4P

Reserved

FIRST CLOCK CHANNEL C-

FIRST CLOCK CHANNEL C+

FIRST CHANNEL 4- (For 10bit D)

FIRST CHANNEL 4+ (For 10bit D)

Ground No ConnectionNC No ConnectionNC No ConnectionNC No ConnectionNC No ConnectionNC

‘H’ =JEIDA , ‘L’ = VESA LVDS Select

No ConnectionNC No ConnectionNC No ConnectionNC

Ground

FIRST CHANNEL 0-

FIRST CHANNEL 0+

FIRST CHANNEL 1-

FIRST CHANNEL 1+

FIRST CHANNEL 2-

FIRST CHANNEL 2+

Ground

FIRST CHANNEL 3-

FIRST CHANNEL 3+

No connection or GND

27 28 29 30 31 32 33

34 35 36 37 38 39 40 41 42 43

45 46

48 49 50 51

Symbol

Bit Selection

RE0N RE0P RE1N RE1P RE2N RE2P

GND RECLKN RECLKP

GND

RE3N RE3P RE4N

RE4P Reserved Reserved

GND

GND GND

VLCD VLCD VLCD VLCD

SECOND CLOCK CHANNEL C-

SECOND CLOCK CHANNEL C+

SECOND CHANNEL 4- (For 10bit D)

SECOND CHANNEL 4+ (For 10bit D)

Description

‘L’=8bit,’H’=10bit (D)

SECOND CHANNEL 0-

SECOND CHANNEL 0+

SECOND CHANNEL 1-

SECOND CHANNEL 1+

SECOND CHANNEL 2-

SECOND CHANNEL 2+

Ground

SECOND CHANNEL 3-

SECOND CHANNEL 3+

No connection or GND No connection or GND

Ground

Ground Ground

No Connection

Power Supply +12.0V Power Supply +12.0V Power Supply +12.0V Power Supply +12.0V

Note

Ver1.0

1. All GND(ground) pins should be connected together to the LCD module’s metal frame.

2. All VLCD (power input) pins should be connected together.

3. All Input levels of LVDS signals are based on the EIA 644 Standard.

4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module. These pins should be no connection.

5. Specific pins(pin No. # 8~#10) are used for OPC function of the LCD module. If not used, these pins are no connection. (Please see the Appendix III-4 for more information.)

6. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module. If used for 8Bit(R), these pins are no connection.

7. Specific pin No. #47 is used for “No signal detection” of system signal interface. It should be GND for NSB(No Signal Black) during the system interface signal is not. If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).

8 / 38

Product Specification

3-2-2. Backlight Inverter

Master

-Inverter Connector : S14B-PH-SMC (JST) or Equivalent

- Mating Connector : PHR-14 or Equivalent

Table 5. INVERTER CONNECTOR PIN CONFIGULATION

LD470WUB

Slave

-Inverter Connector : S12B-PH-SMC (JST) or Equivalent

-Mating Connector : PHR-12 or Equivalent

Master

Slave

NoteDescriptionSymbolPin No

VBR-A

ON/OFF

VBR-B

Status

Power Supply +24.0VVBL

Backlight GroundGND

Analog dimming voltage DC 0.0V ~ 3.3V (Typ : 1.65V)

Burst dimming voltage DC 0.0V ~ 3.3V

Normal : Upper 3.0V

Abnormal : Under 0.7V

VBL

GND

VBR-B

Status

Notes : 1. GND should be connected to the LCD module’s metal frame.

2. If Pin #11 is open, VBR-A = 1.65V. When apply over 1.65V( ~ 3.3V) continuously, its luminance is increasing however lamp’s life time is decreasing. It could be usable for boost up luminance when using DCR (=Dynamic contrast ratio) function only.

3. Minimum Brightness : VBR-B =0V Maximum Brightness : VBR-B = 3.3V

4. Even though Pin #14 is open, there is no effect on inverter operating, The output terminal of inverter.

5. Each impedance of pin #11,12 and 13 is 140[KΩ], 41[KΩ],125[KΩ]

Don’t careOn/Off0.0V ~ 5.0VV

VBL

GND

2, 3Don’t careVBR-A

◆◆◆◆ Rear view of LCM

Ver1.0

…

PCB

…

PCB

…

<Slave>

9 / 38

LD470WUB

Product Specification

3-3. Signal Timing Specifications

Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timings should be satisfied with the following specification for normal operation.

Table 6-1. TIMING TABLE for NTSC (DE Only Mode)

Symbol

Display Period

Horizontal

Vertical tHP694511tVBBlank

Frequency

Blank

Total

DCLK

Horizontal

Vertical

tHV

tHB

tHP

fCLK

Table 6-2. TIMING TABLE for PAL (DE Only Mode)

Symbol

Display Period

tHV

NoteUnitMaxTypMinITEM

tclk-960-

tclk240140100

2200/2tclk120011001060

tHP-1080-tVVDisplay Period

tHP114911251091tVPTotal

148.5/2MHz7774.2570

KHz7067.565

Hz636057

NoteUnitMaxTypMinITEM

tclk-960-

Horizontal

Vertical tHP300270228tVBBlank

Frequency

Note

The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode). The performance of the electro-optical characteristics may be influenced by variance of the vertical

refresh rate.

Ver1.0

Blank

Total

DCLK

Horizontal

Vertical

tHB

tHP

fCLK

tclk240140100

2200/2tclk120011001060

tHP-1080-tVVDisplay Period

tHP138013501308tVPTotal

148.5/2MHz7774.2570

KHz7067.565

Hz535047

10 / 38

3-4. LVDS Signal Specification

3-4-1. LVDS Input Signal Timing Diagram

LD470WUB

Product Specification

DE, Data

DCLK

First data

Second data

0.7VDD

0.3VDD

tCLK

DE(Data Enable)

0.5 VDD

Invalid data

Valid data

Pixel 0,0

Valid data

Pixel 1,0

tHP

Pixel 2,0

Pixel 3,0

Invalid data

tHV

DE(Data Enable)

Ver1.0

1 1080

tVV

tVP

11 / 38

3-4-2. LVDS Input Signal Characteristics

1) DC Specification

LVDS -

LVDS +

LD470WUB

Product Specification

LVDS Common mode Voltage

LVDS Input Voltage Range

2) AC Specification

LVDS Clock

LVDS Data

LVDS 1’st Clock

LVDS 2nd/ 3rd/ 4thClock

SKEW_mintSKEW_max

# VCM= {(LVDS +) + ( LVDS - )} /2

tSKEW

clk

= 1/T

IN _ MAXVIN _MIN

NoteUnitMaxMinSymbolDescription

-V1.51.0V

-V1.80.7V

-mV250ΔVCMChange in common mode Voltage

clk

)

clk

80%

20%

LVDS Differential Voltage

High Threshold

Low Threshold

LVDS Clock to Data Skew Margin

LVDS Clock/DATA Rising/Falling time

Effective time of LVDS

LVDS Clock to Clock Skew Margin (Even to Odd)

Note

1. All Input levels of LVDS signals are based on the EIA 644 Standard.

2. If tRFisn’t enough, t

should be meet the range.

eff

3. LVDS Differential Voltage is defined within t

Ver1.0

SKEW

eff

SKEW_EO

260 ps(0.3*T

eff

1/7* T

NoteUnitMaxMinSymbolDescription

mV300100V

mV-100-300V

)/7|t

clk

)/7t

clk

-ps|(0.25*T

-ps±360t

clk

12 / 38

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