24Changed the Test Condition in Table 13(Vibration/Shock Test)
Ver. 0.12/39
LD470EUP
Product Specification
1. General Description
The LD470EUP is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 46.96 inch d iagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-p ixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06Bilion colors.
It has been designed to apply the 10-bit 4-port LVDS interface.
It is intended to support Public Display where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.
EPI (RGB)
Control
Signals
Power Signals
G1
G1080
Source Driver Circuit
S1S1920
TFT - LCD Panel
(1920 ×
RGB ×
1080 pixels)
[Gate In Panel]
LVDS
2Port
LVDS
2Port
LVDS
Select
L-DIM
Enable
Bit
Select
+12.0V
CN2
(41pin)
CN1
(51pin)
LVDS 3,4
LVDS 1,2
Option
signal
I2C
EEPROM
SCL
SDA
Timing Controller
LVDS Rx + L/D + DGA + ODC
Integrated
Power Circuit
Block
SIN, SCLK, V_Sync
+24.0V, GND, On/Off
ExtV
BR-B
LED Driver
L-Dimming : 12 Block
General Features
Active Screen Size46.96 inches(1192.87mm) diagonal
Outline Dimension1068.8(H)
Pixel Pitch0.5415 mm x 0.5415 mm
Pixel Format1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Power ConsumptionTotal 100.4W (Typ.) [Logic=8.0W, LED Driver=92.4W (ExtVbr_B=100% )] [TBD]
Weight10.9 Kg (Typ.)
Display ModeTransmissive
Surface TreatmentHard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)
Possible Display
TypeLandscape & Portrait enabled
x 612.8(V)
x10.8(B)/24.0 mm(D) (Typ.)
mode, Normally black
Ver. 0.13/39
LD470EUP
Product Specification
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage
to the LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterSymbol
Power Input Voltage
Driver Control Voltage
T-Con Option Selection VoltageVLOGIC-0.3+4.0VDC
Operating TemperatureTOP0+50°C
Storage TemperatureTST-20+60°C
Panel Front Temperature TSUR-+60°C4
Operating Ambient HumidityHOP1090%RH
Storage HumidityHST1090%RH
Note
1. Ambient temperature condition (Ta =
LCD CircuitVLCD-0.3+14.0VDC
DriverVBL-0.3+ 27.0VDC
ON/OFFVOFF / VON-0.3+5.5VDC
BrightnessEXTVBR-B0.0+5.5VDC
25
2 °C )
Value
UnitNote
MinMax
2. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be Max 39°C, and no condensation of water.
3. Gravity mura can be guaranteed below 50°C condition.
4. The maximum operating temperatures is based on the test condition that the surface temperature
of display area is less than or equal to 60°C with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 60℃. The range of operating temperature may be degraded in case of
improper thermal management in final product design.
90%
1
2,3
2,3
60
60%
Storage
Operation
40
50
40%
Humidity [(%)RH]
10%
°C]
Wet Bulb
Temperature [
0
Ver. 0.14/39
°C]
30
20
10
10203040506070800-20
Dry Bulb Temperature [
LD470EUP
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED
backlight and LED Driver circuit.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
MinTypMax
Circuit :
Power Input VoltageVLCD10.812.013.2VDC
Power Input CurrentILCD
Power ConsumptionPLCD8.0(TBD)10.4(TBD)Watt1
Rush currentIRUSH--3.0A3
Note
1. The specified current and power consumption are under the V
-670(TBD)871(TBD)mA1
-970(TBD)1261(TBD)mA2
condition, and mosaic pattern(8 x 6) is displayed and f
Value
=12.0V, Ta=25
LCD
is the frame frequency.
V
UnitNote
2°C, fV =120Hz
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).
4. Ripple voltage level is recommended under ±5% of typical voltage
White : 1023 Gray
Black : 0 Gray
Mosaic Pattern(8 x 6)
Ver. 0.15/39
Product Specification
LD470EUP
Table 3. ELECTRICAL CHARACTERISTICS (Continue)
ParameterSymbol
LED Driver :
Power Supply Input VoltageVBL22.824.025.2Vdc1
Power Supply Input Current IBL
Power Supply Input Current (In-Rush)In-rush--(TBD)A
Power ConsumptionPBL-
On/Off
Input Voltage for
Control System
Signals
LED :
Life Time30,00050,000Hrs2
Brightness AdjustExtV
PWM Frequency for
NTSC & PAL
Pulse Duty Level
(PWM)
OnV on2.5-5.0Vdc
OffV off-0.30.00.7Vdc
BR-B1-100%
PAL100Hz3
NTSC120Hz3
High Level2.4-5.0
Low Level0.0-0.7
MinTypMax
-
Values
3.85(TBD)(TBD)A1
92.4
(TBD)
(TBD)
UnitNotes
BL
V
Ext V
W1
On Duty
Vdc
Vdc
HIGH : on duty
LOW : off duty
TBD
= 22.8V
BR-B
= 100%
4
6
Notes :
1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60
minutes at 25±
24Vand V
2°C. The specified current and power consumption are under the typical supply Input voltage
BR (ExtVBR-B : 100%), it is total power consumption.
2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial
value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at
25±2°C.
3. LGD recommend that the PWM freq. is synchronized with One time harmonic of V_sync signal of system.
Though PWM frequency is over 120Hz (max 252Hz), function of LED Driver is not affected.
4. The duration of rush current is about 200ms. This duration is applied to LED on time.
2
5. Even though inrush current is over the specified value, there is no problem if I
T spec of fuse is satisfied.
6. Ext_PWM Signal have to input available duty range.
Between 99% and 100%
ExtVBR-B 0% and 100% are available.
But
High
ExtVBR-B duty have to be avoided. ( 99% < ExtVBR-B < 100%)
Available duty range
Low
0%
1%
Ver. 0.16/39
99% 100%Ext_PWM Input Duty
LD470EUP
Product Specification
3-2. Interface Connections
This LCD module employs two kinds of interface connection, 51-pin connector and 41-pin connector are used
for the module electronics and 14-pin connector is used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE) or compatible
1. All GND (ground) pins should be connected together to the LCD module’s metal frame.
2. All V
LCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. #1~#6 & #8~#9 NC (No Connection): These pins are used only for LGD (Do not connect)
5. Specific pin (#10) is used for Local Dimming function of the LCD module.
If not used, these pins are no connection. (Please see the Appendix III-3 for more information.)
6. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
7. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB (No Signal Black) while the system interface signal is not.
If this pin is “H”, LCD Module displays AGP (Auto Generation Pattern).
Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
No Connection (Note 4)
‘H
’ =JEIDA , ‘L
No Connection (Note 4)
No Connection (Note 4)
‘H
’ = Enable , ‘L
Ground
FIRST LVDS Receiver Signal (A-)
FIRST LVDS Receiver Signal (A+)
FIRST LVDS Receiver Signal (B-)
FIRST LVDS Receiver Signal (B+)
FIRST LVDS Receiver Signal (C-)
FIRST LVDS Receiver Signal (C+)
Ground
FIRST LVDS Receiver Clock Signal(-)
FIRST LVDS Receiver Clock Signal(+)
Ground
FIRST LVDS Receiver Signal (D-)
FIRST LVDS Receiver Signal (D+)
FIRST LVDS Receiver Signal (E-)
FIRST LVDS Receiver Signal (E+)
SECOND LVDS Receiver Signal (A-)
SECOND LVDS Receiver Signal (A+)
SECOND LVDS Receiver Signal (B-)
SECOND LVDS Receiver Signal (B+)
SECOND LVDS Receiver Signal (C-)
SECOND LVDS Receiver Signal (C+)
Ground
SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock Signal(+)
Ground
SECOND LVDS Receiver Signal (D-)
SECOND LVDS Receiver Signal (D+)
SECOND LVDS Receiver Signal (E-)
SECOND LVDS Receiver Signal (E+)
No Connection or Ground
No Connection or Ground
10bit(D) , ‘L
’ = 8bit
Ver. 0.17/39
Product Specification
-LCD Connector (CN2) : FI-RE41S-HF (manufactured by JAE) or compatible
No connection22
No connection23
No connection24GNDGround
No connection
No connection
No connection27
No connection28
No connection29RB4P
Ground
THIRD LVDS Receiver Signal (A-)
THIRD LVDS Receiver Signal (A+)
THIRD LVDS Receiver Signal (B-)
THIRD LVDS Receiver Signal (B+)
THIRD LVDS Receiver Signal (C-)
THIRD LVDS Receiver Signal (C+)
Ground
THIRD LVDS Receiver Clock Signal(-)
THIRD LVDS Receiver Clock Signal(+)
Ground
THIRD LVDS Receiver Signal (D-)
THIRD LVDS Receiver Signal (D+)
THIRD LVDS Receiver Signal (E-)
THIRD LVDS Receiver Signal (E+)
FORTH LVDS Receiver Signal (A-)
FORTH LVDS Receiver Signal (A+)
FORTH LVDS Receiver Signal (B-)
FORTH LVDS Receiver Signal (B+)
FORTH LVDS Receiver Signal (C-)
FORTH LVDS Receiver Signal (C+)
FORTH LVDS Receiver Signal (D-)
FORTH LVDS Receiver Signal (D+)
FORTH LVDS Receiver Signal (E-)
FORTH LVDS Receiver Signal (E+)
LD470EUP
Note : 1. All GND (ground) pins should be connected together to the LCD module’s metal frame.
2. LVDS pin (pin No. #22,23,38,39) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
CN3
#1
#8
CN1 CN2
#1#51#1#41
TBD
CN3
#1#8
CN1CN2
#1#51
#1#41
TBD
Rear view of LCM
Ver. 0.18/39
Product Specification
3-2-2. Backlight Module
Master
-LED Driver Connector
: 20022WR - H14B2(Yeonho)
Mating Connector
: 20022HS - 14B2(Yeonho)
Table 5. LED DRIVER CONNECTOR PIN CONFIGURATION
Pin NoSymbolDescriptionNote
LD470EUP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
VBLPower Supply +24.0V
GNDBacklight Ground
GNDBacklight Ground
GNDBacklight Ground
GNDBacklight Ground
GNDBacklight Ground
Status
ON/OFF
V
NC
EXTVBR-B
Back Light Status
Backlight ON/OFF control
Don’t care
External PWM
Notes 1. GND should be connected to the LCD module’s metal frame.
2. Normal : Low (under 0.7V) / Abnormal : Open
3. High : on duty / Low : off duty, Pin#14 can be opened. ( if Pin #14 is open , EXTVBR-B is 100% )
4. Each impedance of pin #12 and 14 is over 50 [KΩ] .
1
2
3
◆
◆
Rear view of LCM
Status
PCB
1
14
…
1
14
…
<Master>
Ver. 0.19/39
LD470EUP
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEMSymbolMinTypMaxUnitNote
Horizontal
Vertical
Frequency
Display
Period
Blankt
Totalt
Display
Period
BlanktVB
Totalt
HV480480480tCLK1920 / 4
t
HB4070200tCLK1
HP520550680tCLK
VV108010801080Lines
t
VP
20
(228)
1100
(1308)
45
(270)
1125
(1350)
86
(300)
1166
(1380)
Lines1
Lines
ITEMSymbolMinTypMaxUnitNote
DCLKf
Horizontalf
Verticalf
CLK66.9774.2578.00MHz
H121.8135140KHz2
V
108
(95)
120
(100)
122
(104)
Hz
2
NTSC
(PAL)
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
※ Timing should be set based on clock frequency.
Ver. 0.110 /39
3-4. LVDS Signal Specification
3-4-1. LVDS Input Signal Timing Diagram
LD470EUP
Product Specification
DCLK
First data
Second data
Third data
Forth data
DE(Data Enable)
tCLK
0.5 VDD
Invalid data
Invalid data
Invalid data
Invalid data
DE, Data
Valid data
Pixel 0
Valid data
Pixel 1
Valid data
Pixel 2
Valid data
Pixel 3
Pixel 4
Pixel 5
Pixel 6
Pixel 7
0.7VDD
0.3VDD
Invalid data
Invalid data
Invalid data
Invalid data
* tHB = tHFP + tWH +tHBP
* tVB = tVFP + tWV +tVBP
11080
DE(Data Enable)
tVV
tVP
Ver. 0.111 /39
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