The LP173WF1 is a Color Active Matrix Liquid Crystal D isplay with an integral LED backligh t system. The
matrix employs a-Si Thin Film Tran sis tor as the active element. It is a trans missi ve type d isplay ope rating in
the normally white mode. This TFT-LCD has 17.3 inches diagonally measured active display area w ith FHD
resolution(1080 vertical by 1920 horizontal pixe l arr ay) . Each p ixel is di vided into R ed, Green and Blue subpixels or dots which are arranged in vertical stripes. Gray scale or the brightness o f the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP173WF1 has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP173WF1 is intended to support applications where thin th ickness, low power are
critical factors and graphic d isplays are important. In combination with the vertical arr angement of the subpixels, the LP156WF1 characteristics provide an excellent flat display for office automation products such as
Notebook PC.
EEPROM Block
EEPROM Block
for EDID
for EDID
EEPROM Block
EEPROM Block
for Tcon Operating
User connector
for TconOperating
1
TFT-LCD Panel
1920
40
Pin
Timing Control
LVDS
2port
VCC
VLED
LED_EN
PWM
Timing Control
(Tcon) Block
(Tcon) Block
DVCC
Power
Block
LED Driver
LED Driver
Block
TCLKs
Power
Block
Block
VGH, VGL, GMA
Control & DataPower
M
i
n
i
-
L
V
D
S
DVCC, AVDD
GIP CLKs, DSC
VOUT_LED
FB1~6
1080
(FHD, GIP, TN)
Source Driver
(Bottom Bent)
LED Backlight Ass’y
EDID signal & Power
General Features
Active Screen Size17.3 inches diagonal
Outline Dimension398.1(H, Typ.) × 232.8(V, Typ.) × 6.0(D, Max.) mm
Pixel Pitch0.1989 mm x 0.1989mm
Pixel Format1920 horiz. By 1080 vert. Pixels RGB strip arrangement
Color Depth6-bit, 262,144 colors
2
Luminance, White300 cd/m
Power ConsumptionTotal 10.0 W (Typ.) Logic : 2.5 W (Typ.@ Mosaic), B/L : 7.5 W (Typ.@ VLED 12V )
Weight630g (Max.)
Display Operating ModeTransmissive mode, normally white
Surface TreatmentAnti-Glare treatment of the front polarizer (3H)
RoHS ComplyYes
BFR / PVC / As Free Yes all.
Ver. 1.1Jan. 27, 2011
(Typ.5 point)
4/ 31
LP173WF1
www.yslcd.com.tw
Studio Technology Co. Ltd. ( www.yslcd.com.tw )
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below.
The LP173WF1 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL with LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
Values
ParameterSymbol
MinTypMax
LOGIC :
UnitNotes
Power Supply Input VoltageV
Power Supply Input CurrentMosaicI
Power ConsumptionP
Power Supply Inrush CurrentI
LVDS ImpedanceZ
BACKLIGHT : ( with LED Driver)
LED Power Input VoltageV
LED Power Input CurrentI
LED Power ConsumptionP
LED Power Inrush CurrentI
PWM Duty Ratio5-100%8
PWM Jitter
PWM ImpedanceZ
PWM FrequencyF
CC3.03.33.6V1
CC-760900mA2
CC-2.53.0W2
CC_P--1500mA3
LVDS90100110
LED7.012.021.0V5
LED-625730mA6
LED-7.58.8W6
LED_P--1500mA7
-
PWM204060kΩ
PWM200-1000Hz10
0-0.2%9
Ω
4
PWM High Level VoltageV
PWM Low Level VoltageV
LED_EN ImpedanceZ
LED_EN High VoltageV
LED_EN Low VoltageV
Life Time12,000--Hrs11
Ver. 1.1Jan. 27, 2011
PWM_H
PWM_L
PWM204060kΩ
LED_EN_H3.0-5.3V
LED_EN_L0-0.5V
3.0-5.3V
0-0.5V
6/ 31
Liquid Crystal Display
www.yslcd.com.tw
Studio Technology Co. Ltd. ( www.yslcd.com.tw )
Product Specification
Note)
1. The measuring position is the connector of LCM and the test cond
Black pattern.
2. The specified Icc cur
the Vcc = 3.3V , 25℃, fv = 60Hz con
3. The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.
rent and power consumption are under
dition and Mosaic pattern.
itions are under 25℃, fv = 60Hz,
LP173WF1
Rising time
Vcc
0V
5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.
6. The
7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25℃, Dimming of
8. The below figures are the measuring Vled condition
measuring position is the connector of LCM and the test conditions are under 25℃.
Max luminance and White pattern with the normal frame frequency operated(60Hz).
and the Vled control block LGD used.
VLED control block is sa me wit h Vc c co nt rol bl o c k.
90%
10%
0.5ms
3.3V
Rising time
LED
V
0V
10%
12.0V
90%
0.5ms
9. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.
10. If Jitter of PWM is bigger than maximum, it may induce flickering.
11. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum
value specified in table 7. under general user condition.
Ver. 1.1Jan. 27, 2011
7/ 31
3-2. Interface Connections
www.yslcd.com.tw
Studio Technology Co. Ltd. ( www.yslcd.com.tw )
LP173WF1
Liquid Crystal Display
Product Specification
This LCD employs two interface connections, a 40 pin connector is used for
the module electronics interface
and the other connector is used for the integral backlight system.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
PinSymbolDescriptionNotes
1NCNo Connection (Reserved)
2VCCLCD Logic and driver power (3.3V Typ.)
3VCCLCD Logic and driver power (3.3V Typ.)
4V EEDIDDDC Power (3.3V)
5BistLCD Panel Self Test Enable
6Clk EEDIDDDC Clock
7DATA EEDIDDDC Data
8ORX0-Negative LVDS differential data input
9ORX0+Positive LVDS differential data input
10GNDHigh Speed Ground
11ORX1-Negative LVDS differential data input
12ORX1+Positive LVDS differential data input
13GNDHigh Speed Ground
14ORX2-Negative LVDS differential data input
15ORX2+Positive LVDS differential data input
16GNDHigh Speed Ground
17ORXC-Negative LVDS differential clock input
18ORXC+Positive LVDS differential clock input
19GNDHigh Speed Ground
20ERX0-Negative LVDS differential data input
21ERX0+Positive LVDS differential data input
22GNDHigh Speed Ground
23ERX1-Negative LVDS differential data input
24ERX1+Positive LVDS differential data input
25GNDHigh Speed Ground
26ERX2-Negative LVDS differential data input
27ERX2+Positive LVDS differential data input
28GNDHigh Speed Ground
29ERXC-Negative LVDS differential clock input
30ERXC+Positive LVDS differential clock input
31
32
33
34
35
36
37
38
39
40