INTERFACE CONNECTIONS
LVDS SIGN AL TIM ING S PE C IFIC AT ION
SIGNAL TIMIN G SPEC IFICA TIONS
SIGNAL TIMIN G WAVEFORM S
COLOR INPUT DATA REFERNECE
POWER SEQUENCE
OPTICA L SFE CIFIC ATION S
ITEM
Page
1
2
3
4
5
6-7
8
9-10
11
11
12
13
14-16
5
6RELIABLITY
7INTERNATIONAL STANDARDS
8PACKING
9PRECAUTIONS
Ver. 1 .0Mar. 10, 2011
MECHANICAL CHARACTERISTICS
AAPPENDIX. LPL PROPOSAL FOR SYSTEM COVER DESIGN
7-1SAFETY
7-2EMC25
7-3ENVIRONMENT25
8-1DESIGN ATION OF LOT MARK
8-2PACKING FORM
AAPPENDIX. Enhanced Extended Display Identification Data
1.0Mar. 10, 2011-Final Draft
26Update Designation of lot mark
EDID
ver
Ver. 1 .0Mar. 10, 2011
3 / 31
LP156WH4
Liquid Crystal Display
Product Specific ation
1. General Description
The LP156WH4 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally white mode. This TFT-LCD has 15.6 inches diagonally measured active display area with HD
resolution (1366 horizontal by 768 vertical pixel array). Each pixel is divided into Red, Green and Blue subpixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors. The LP156WH4 has been designed to apply the interface method that enables low power, high
speed, low EMI. The LP156WH4 is intended to support applications where thin thickness, low power are
critical factors and graphic displays are important. In combination with the vertical arrangement of the subpixels, the LP156WH4 characteristics provide an excellent flat display for office automation products such
as Notebook PC.
1
TFT-LCD Panel
(FHD, GIP, TN)
768
Source Driver
(Bottom Bent)
LED Backlight Ass’y
EDID signal & Power
User connector
40
Pin
EEPROM Block
for EDID
LVDS
1port
VCC
VLED
LED_EN
PWM
Timing Control
Block
DVCC
Power
Block
LED Dri ver
Block
CLKs
VGH, VGL, GMA
Control & DataPower
AVCC, AVDD
GIP CLKs, DSC
VOUT_LED
FB1~4
General Features
Active Screen Size15.6 inches diagonal
Outline Dimension
Pixel Pitch
Pixel Format1366 horiz. By 768 vert. Pixels RGB strip arrangement
Color Depth6-bit, 262,144 colors
Luminance, White220 cd/m
Power ConsumptionTotal 4.2 W(Typ.) Logic : 0.9W (Typ.@ Mosaic), B/L : 3.3W (Typ.@ VLED 12V )
Weight450g (Max.)
Display Operating ModeTransmissive mode, normally white
Surface TreatmentGlare treatment (3H) of the front Polarizer
RoHS ComplyYes
BFR / PVC / As Free Yes for all
359.3(H, typ) × 209.5(V, typ) × 5.5(D,max) [mm]
0.252mm × 0.252 mm
2
(Typ.5 point @ PWM Duty = 100%)
1366
Ver. 1 .0Mar. 10, 2011
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LP156WH4
Liquid Crystal Display
Product Specific ation
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterSymbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
VCC-0.34.0Vdc
TOP050
HST-2060
HOP1090%RH1
HST1090%RH1
Values
UnitsNotes
MinMax
°C
°C
Note : 1. Temperature and relative humidity range are shown in the figure below.
The LP156WH4 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL.with LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
Values
ParameterSymbol
MinTypMax
LOGIC :
UnitNotes
Power Supply Input VoltageV
Power Supply Input CurrentMosaicI
Power ConsumptionP
Power Supply Inrush CurrentI
LVDS ImpedanceZ
CC3.03.33.6V1
CC-275320mA2
CC-0.91.1W2
CC_P--1500mA3
LVDS90100110Ω4
BACKLIGHT : ( with LED Driver)
LED Power Input VoltageV
LED Power Input CurrentI
LED Power ConsumptionP
LED Power Inrush CurrentI
LED7.012.021.0V5
LED-275290mA6
LED-3.33.5W6
LED_P--1500mA7
PWM Duty Ratio5-100%8
PWM Jitter
PWM ImpedanceZ
PWM FrequencyF
-
PWM204060kΩ
PWM200-1000Hz10
0-0.2%9
PWM High Level VoltageV
PWM Low Level VoltageV
LED_EN ImpedanceZ
LED_EN High VoltageV
LED_EN Low VoltageV
LED_EN_H3.0-5.3V
LED_EN_L0-0.3V
PWM_H
PWM_L
PWM204060kΩ
3.0-5.3V
0-0.3V
Life Time15,000--
Ver. 1 .0Mar. 10, 2011
Hrs11
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LP156WH4
Liquid Crystal Display
Product Specific ation
Note)
1. The measuring position is the connector of LCM and the test conditions are under 25℃, fv = 60Hz,
Black pattern.
2. The specified Icc current and power consumption are under
the Vcc = 3.3V , 25℃, fv = 60Hz condition and Mosaic pattern.
3. This Spec. is the max load condition for the cable impedance designing.
4. The below figures are the measuring Vcc condition and the Vcc control block LGD used.
The Vcc condition is same as the minimum of T1 at Power on sequence.
Rising time
Vcc
0V
10%
90%
3.3V
0.5ms
5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.
6. The measuring position is the connector of LCM and the test conditions are under 25℃.
7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25℃, Dimming of
Max luminance and White pattern with the normal frame frequency operated(60Hz).
8. The below figures are the measuring Vled condition
and the Vled control block LGD used.
VLED control block is same with Vcc control block.
Rising time
V
LED
0V
10%
90%
12.0V
0.5ms
9. The operation of LED Driver below minimum dimming ratio may cause flickeri ng or reliability issue.
10. If Jitter of PWM is bigger than maximum, it may induce flickering.
11. This Spec. is not effective at 100% dimmi ng ratio as an exception because it has DC lev el equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum
value specified in table 7. under general user condition.
Ver. 1 .0Mar. 10, 2011
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LP156WH4
Liquid Crystal Display
Product Specific ation
3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector used for the module electronics interface and
the other connector used for the integral backlight system.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
PinSymbolDescriptionNotes
1NCN o Connection.
2VCCLCD Logic and driver power (3.3V Typ.)
3VCCLCD Logic and driver power (3.3V Typ.)
4V EEDIDDDC Power (3.3V)
5NCN o Connection.
6Clk EEDIDDDC Clock
7DATA EEDIDDDC Data
8ORX0-Negative LVDS differential data input
9ORX0+Positive LVDS differential data input
10GNDLCM Ground
11ORX1-Negative LVDS differential data input
12ORX1+Positive LVDS differential data input
13GNDLCM Ground
14ORX2-Negative LVDS differential data input
15ORX2+Positive LVDS differential data input
16GNDLCM Ground
17ORXC-Negative LV DS dif ferential c lock input
18ORXC+Positive LVDS differential clock input
19GNDLCM Ground
20NCN o Connecti on
21NCN o Connecti on
19GNDLCM Ground
23NCN o Connecti on
24NCN o Connecti on
19GNDLCM Ground
26NCN o Connecti on
27NCN o Connecti on
19GNDLCM Ground
29NCN o Connecti on
30NCN o Connecti on
31
32
33
34NCN o Connecti on.
35
36
37
38
39
40
GNDLCM Ground (LED Backlight G round)
GNDLCM Ground (LED Backlight G round)
GNDLCM Ground (LED Backlight G round)
PWMSystem PWM Signal input for dimming
LED_EN
NC
VLEDL
VLEDLED Backlight Power (7V-21V)
VLEDL
LED Backlight On/Off
No C on nec t ion
ED Backlight Power (7V-21V)
ED Backlight Power (7V-21V)
[Interface Chip]
1. LCD :
SiW, SW0617(LCD Controller)
Including LVDS R eceiver.
2. System : SiW LVDSRx or equivalent
* Pin to Pin c ompati bl e with LVDS
[Connector]
UJU IS050-L40B-C10
LSMtron GT05Q-40S-H10 or equival en t
[Mating Connector]
20345-#40E-## s eries or equivale nt
[Connector pin arrangement]
40
[LCD Module Rear View]
1
Ver. 1 .0Mar. 10, 2011
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Product Specific ation
LVDS +
LVDS -
0V
V
CM
# |V
ID
| = |(LVDS+) – (LVDS-)|
# V
CM
= {(LVDS+) + (LVDS-)}/2
|VID|
V
IN_MAX
V
IN_MIN
LVDS Data
t
SKEW
LVDS Clock
T
clk
t
SKEW
(F
clk
= 1/T
clk
)
1) 85MHz > Fclk ≥ 65MHz : -400 ~ +400
2) 65MHz > Fclk ≥ 25MHz : -600 ~ +600
3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
LP156WH4
Liquid Crystal Display
Description
Symb
ol
MinMaxUnitNotes
LVDS Differential Voltage|VID|100600mVLVDS Common mode VoltageV
LVDS Input Voltage RangeV
CM
IN
0.61.8V-
0.32.1V-
3-3-2. AC Specification
DescriptionSymbolMinMaxUnitNotes
85MHz > Fclk ≥
65MHz > Fclk ≥
LVDS Clock to Data Skew Margin
t
SKEW
t
SKEW
- 400+ 400ps
- 600+ 600ps
65MHz
25MHz
LVDS Clock to Clock Skew Margin (Even
to Odd)
Maximum deviation
of input clock frequency during SSC
Maximum modulation frequency
of input clock during SSC
Ver. 1 .0Mar. 10, 2011
t
SKEW_EO
F
DEV
F
MOD
- 1/7+ 1/7T
clk
-± 3%-
-200KHz-
-
9 / 31
LVDS Even Data
LVDS Odd Clock
LVDS Even Clock
t
SKEW_EO
T
clk
T
clk
Freq.
F
max
F
center
F
min
Product Specific ation
< Clock skew margin between channel >
LP156WH4
Liquid Crystal Display
F
* F
center
DEV
3-3-3. Data For mat
1) LVDS 1 Port
RCLK+
RA+/-
RB+/-
RC+/-
RD+/-
R3R2
G4G3
B5B4
G7G6
R1R0
G2G1
B3B2
R7R6
1
F
MOD
< Spread Spectrum >
G0R5R4R3R2R1R0
B1B0G5G4G3G2G1
DE VSYNC HSYNCB5B4B3B2
XB7B6G7G6R7R6
Time
G0
B1
DE
VSYNC HSYNC
X
R5R4
B0G5
B7B6
Ver. 1 .0Mar. 10, 2011
Previous (N-1)th CycleNext (N+1)th Cycle
Current (Nth) Cycle
< LVDS Data Format >
10 / 31
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