The LP156WF1 is a Color Active Matrix Liquid Crystal Displa y with an integral Light Emitting Diode (LED)
backlight system. The matrix employs a-Si Thin Film Transistor as the active ele ment. It is a transmissive
type display operating in the normally white mode. This TFT-LCD has 15.6 inches diagonally measured
active display area with HD resolution(1080 vertical by 1920 horizon tal pixel array). Each pixel is divided
into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the
brightness of the sub-pixel color is dete rmined w ith a 6-bi t gray s cale s ignal for each dot, thus, presenting a
palette of more than 262,144 colors.
The LP156WF1 has been designed to apply the interface method that enables low power, high speed, low
EMI.
The LP156WF1 is intended to support applications where thin thickness, low power are critical factors and
graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the
LP156WF1 characteristics provide an excellent flat display for office automation p roducts such as Notebook
PC.
FPC
1
Source DriverCircuit
Source Driver Circuit
EDID signal & Power
CN
1
User connector
40
Pin
LED
Driver
EDID
BLOCK
POWER
BLOCK
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LVDS &= Timing
Control Block
Control & DataPower
CN2
CN2
9Pin
9Pin
General Features
Active Screen Size15.6 inches diagonal
Outline Dimension359.3(H, typ.) ×
Pixel Pitch0.17925 mm x 0.17925 mm
Pixel Format1920 horiz. By 1080 vert. Pixels RGB strip arrangement
Color Depth6-bit, 262,144 colors
Luminance, White300 cd/m
Power Consumption
Weight470g (Max.)
Display Operating ModeTransmissive mode, normally white
Surface TreatmentAnti-Glare treatment of the front polarizer(3H)
RoHS ComplyYes
Total 6.35 Watt(Typ.) @ LCM circuit 1.74 Watt(Typ.), B/L (W/O LED Driver) 4.61 Watt(Typ.)
2
209.5(V, typ.) ×
(Typ.5 point)
5.7(D,max) [mm]
WLED Ass’y
TFT-LCD Panel
(1920 x 1080)
1920
1
GIP(Gate In Panel)
1080
Ver. 1.0May 11, 2009
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LP156WF1
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Datasheet pdf - http://www.DataSheet4U.co.kr/
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterSymbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below.
The LP156WF1 requires two power inputs. The first logic is employed to power the LCD electronics and to
drive the TFT array and liquid crystal. The second backlight is the input about LED BL.with LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
LOGIC :
Power Supply Input VoltageVCC3.03.33.6V
Power Supply Input CurrentI
Power ConsumptionPc-1.742.0Watt
Power Supply Inrush CurrentICC_P--1500mA
Differential ImpedanceZm90100110Ohm2
BACKLIGHT : ( W/O LED Driver)
LED Power Input VoltageV
LED Power Input CurrentI
LED Power ConsumptionP
LED Power Inrush CurrentI
PWM Dimming (Duty) Ratio-12.5-100%4
PWM ImpedanceZ
PWM FrequencyF
PWM High Level VoltageV
PWM Low Level VoltageV
LED_EN High VoltageV
LED_EN Low VoltageV
Life Time15,000--Hrs6
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CC
LED7.0-20V
LED---mA3
LED-4.614.88W3
LED_P--2000mA
PWM204060kΩ
PWM200-1000Hz5
PWM_H
PWM_L
LED_EN_H
LED_EN_L
MinTypMax
-530610mA1
3.03.35.3V
0-0.5V
3.03.35.3V
0-0.5V
Note)
1. The specified Icc current and power consumption are under the Vcc = 3.3V , 25℃, fv = 60Hz condition
whereas Mosaic pattern is displayed and fv is the frame frequency.
Values
UnitNotes
DC
1
2. This impedance value is needed to proper display and measured form
LVDS Tx to the mating connector.
3. The specified LED current and power consumption are under the Vled = 12.0V , 25℃, Dimming of Max
luminance whereas White pattern is displayed and fv is the frame frequency.
4. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.
5. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
6. The life time is determined as the sum of the continuous operation time at which brightness of LCD at the
typical LED current is 50% compare to that of minimum value specified in table 9 under general user
condition.
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Ver. 1.0May 11, 2009
6/ 30
LP156WF1
www.DataSheet.net/
Datasheet pdf - http://www.DataSheet4U.co.kr/
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs one interface connections, a 40 pin connector is used for the module electronics interface
and LED Driver.
The electronics interface connector is a model 20455-040E-0x manufactured by I-PEX.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
PinSymbolDescriptionNotes
1NCReserved ( connector test )
2VCCPower Supply, 3.3V Typ.
3VCCPower Supply, 3.3V Typ.
4V EEDIDDDC 3.3V power
5BISTBuilt-In Self Test
6Clk EEDIDDDC Clock
7DATA EEDIDDDC Data
8
32VLED_GNDLED Ground
33VLED_GNDLED Ground
34NCReserved ( connector test )
35BLIMPWM for Luminance control
36BL_OnBacklight On/Off Control
37NCNo Connection
38VLEDLED Power Supply (7V-20V)
39VLEDLED Power Supply (7V-20V)
40VLEDLED Power Supply (7V-20V)
Odd_Rin0-Negative LVDS differential data input
Odd_Rin0+Positive LVDS differential data input
VSS1Ground
Odd_Rin1-Negative LVDS differential data input
Odd_Rin1+Positive LVDS differential data input
VSS2Ground
Odd_Rin2-Negative LVDS differential data input
Odd_Rin2+Positive LVDS differential data input
VSS3Ground
Odd_ClkIN-Negative LVDS differential clock input
Odd_ClkIN+Positive LVDS differential clock input
VSS4Ground
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Even_Rin0-Negative LVDS differential data input
Even_Rin0+Positive LVDS differential data input
VSS5Ground
Even_Rin1-Negative LVDS differential data input
Even_Rin1+ Positive LVDS differential data input
VSS6Ground
Even_Rin2-Negative LVDS differential data input
Even_Rin2+Positive LVDS differential data input
VSS7Ground
Even_ClkIN-Negative LVDS differential clock input
Even_ClkIN+Positive LVDS differential clock input
1, Interface chips
1.1 LCD : SW, ST2_BS (LCD Controller)
including LVDS Receiver
1.2 System : THC63LVDF823A
or equivalent
* Pin to Pin compatible with LVDS
2. Connector
2.1 LCD :20455-040E-0x, I-PEX
2.2 Mating : 20453-040T-0x, I-PEX
2.3 Connector pin arrangement
40
or its compatibles
or equivalent.
1
[LCD Module Rear View]
Ver. 1.0May 11, 2009
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Product Specification
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3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
LP156WF1
Liquid Crystal Display
Description
LVDS Differential Voltage|V
LVDS Common mode VoltageV
LVDS Input Voltage RangeV
3-3-2. AC Specification
LVDS Clock to Data Skew Margin
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DescriptionSymbolMinMaxUnitNotes
Symb
ol
|100600mV-
ID
CM
IN
t
SKEW
t
SKEW
MinMaxUnitNotes
0.61.8V-
0.32.1V-
- 400+ 400ps
- 600+ 600ps
85MHz > Fclk ≥
65MHz > Fclk ≥
65MHz
25MHz
LVDS Clock to Clock Skew Margin (Even
to Odd)
Maximum deviation
of input clock frequency during SSC
Maximum modulation frequency
of input clock during SSC
Ver. 1.0May 11, 2009
t
SKEW_EO
F
DEV
F
MOD
-1/7+ 1/7T
-±
-200KHz-
3%-
clk
-
8/ 30
Freq.
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Datasheet pdf - http://www.DataSheet4U.co.kr/
F
max
F
center
F
min
Product Specification
< Clock skew margin between channel >
LP156WF1
Liquid Crystal Display
F
* F
center
DEV
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3-3-3. Data Format
1) LVDS 2 Port
1
F
MOD
< Spread Spectrum >
Time
< LVDS Data Format >
Ver. 1.0May 11, 2009
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