INTERFACE CONNECTIONS3-2
SIGNAL TIMING SPECIFICATIONS3-3
SIGNAL TIMING WAVEFORMS3-4
COLOR INPUT DATA REFERNECE3-5
POWER SEQUENCE3-6
OPTICAL SFECIFICATIONS4
MECHANICAL CHARACTERISTICS5
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RELIABLITY6
INTERNATIONAL STANDARDS7
1
2
3
4
5
6
6
8
9
9
10
11
12
16
20
21
SAFETY7-1
EMC7-2
PACKING8
DESIGNATION OF LOT MARK8-1
PACKING FORM8-2
17Change the CCFL Cable length
23Add Label Discription0.1
23
9
17
Preliminary SpecificationSep. 12. 2005
Change Luminance
Add Rear view drawing
Change Packing Form
Change Power Sequence
: T4(200Æ0), T6(10Æ300), T7(400Æ100) and T5(Max) Delete
Life Time(Min.) Changed. (10,000 Æ 12,000)
Change the tolerance of white point
Change the Frequency of DCLK & Vsync (Min.&Max Spec.)
Add Luminance Var.(5P)
Change Horizontal back porch / front porch
Add CCFL exit position
EDID
Ver.
0.0
0.1
0.1
0.1
Ver. 0.4Mar. 02. 2006
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LP150X08
Liquid Crystal Display
Product Specification
1. General Description
The LP150X08 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent
Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally white mode. This TFT-LCD has 15.0 inches
diagonally measured active display area with XGA resolution(768 vertical by 1024 horizontal pixel array)
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes.
Gray scale or the brightness of the sub-pixel color is determined with a 6-bit gray scale signal for each dot,
thus, presenting a palette of more than 262,144 colors.
The LP150X08 has been designed to apply the interface method that enables low power, high speed,
low EMI.
The LP150X08 is intended to support applications where thin thickness, low power are critical factors
and graphic display are important. In combination with the vertical arrangement of the sub-pixels, the
LP150X08 characteristics provide an excellent flat display for office automation products such as
Notebook PC.
CN
1
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General Features
Color Depth
LVDS
&
Timing
Control
Block
Power
Block
:Control & Data:Power
15.0 inches(38.1cm) diagonalActive Screen Size
317.3(H) x 241.5(V) x 5.9(D) mm(Typ.)Outline Dimension
0.297 mm x 0.297 mmPixel Pitch
1024 horiz. By 768 vert. Pixels RGB strip arrangementPixel Format
6-bit, 262,144 colors
The LP150X08 requires two power i nputs. One is employed to power the LCD electronics and to drive the
TFT array and liquid crystal. The second input which powers the CCFL, is typically generated by an
inverter. The inverter is an external unit to the LCD.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
MODULE :
Power Supply Input Current
LAMP :
Operating Voltage
Operating Current
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Operating Frequency
Discharge Stabilization Time
Power Consumption
Life Time
Note : The design of the inverter must have sp ecifications for the lamp in LCD Assembly.
The performance of the Lamp in LCM, for example life time or brightness, is extremely influenced by
the characteristics of the DC-AC inverter. So all the parameters of an inverter should be carefully
designed so as not to produce too much leakage current from high-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted l igh ting caus ed by the mi s ma tch of
the lamp and the inverter(no lighting, flicker, etc) never occurs. When you confirm it, the LCD–
Assembly should be operated in the same condition as installed in you instrument.
°C, f
1. The specified current and power consumption are under the VCC=3.3V, 25
whereas Mosaic pattern is displayed and f
2. This impedance value is needed to proper display and measured from LVDS T
connector.
3. The variance of the voltage is
4. The voltage above V
Otherwise, the lamps may not be turned on. The used lamp current is the lamp typical current.
Ver. 0.4Mar. 02. 2006
should be applied to the lamps for more than 1 second for start-up.
S
± 10%.
is the frame frequency.
V
=60Hz condition
V
to the mating
X
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LP150X08
Liquid Crystal Display
Product Specification
5. The output of the inverter must have symmetrical(negative and positive) voltage waveform and
symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter
which has unsymmetrical voltage and unsymmetrical current and spike wave.
Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may
cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal
synchronous frequency and from its harmonics in order to prevent interference.
6. Let’s define the brightness of the lamp after being lighted for 5 minutes as 100%.
is the time required for the brightness of the center of the lamp to be not less than 95%.
T
S
7. The lamp power consumption shown above does not include loss of external inverter.
The used lamp current is 6.0
8. The life is determined as the time at which brightness of the lamp is 50% compared to that of initial
mA
value at 6.0
9. Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp, are following.
It shall help increase the lamp lifetime and reduce leakage current.
a. The asymmetry rate of the inverter waveform should be less than 10%.
b. The distortion rate of the waveform should be within √2
* Inverter output waveform had better be more similar to ideal sine wave.
on condition of continuous operating at 25 ± 2°C
RMS
mA
RMS
.
± 10%.
* Asymmetry rate:
I p
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※ Do not attach a conducting tape to lamp connecting wire.
If the lamp wir e attach to a conducting tape, TFT- LCD Module has a low luminance and the inverter
has abnormal action. Because leakage current is occurred between lamp wire and conducting tape.
I -p
| I
–I –p| / I
p
* Distortion rate
I
(or I –p) / I
p
rms
rms
* 100%
Ver. 0.4Mar. 02. 2006
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LP150X08
Liquid Crystal Display
Product Specification
3-2. Interface Connections
The interface connections are compatible with ISP (Industry Standard Panels) 15.0” Mounting and Top
Level Interface Requirements (Version2, June,2000) defined by SPWG (Standard Panels Working
Group). This LCD emp loys two interface connect ions, a 30 pin connector i s used for the module electr onics
and the other connector is used for the integral backlight system.
The electronics interface connector is a model GT101-30S-HR11 manufactured by LG Cable. The pin
configuration for the connector is shown in the table below.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
NotesDescriptionSymbolPin
VSSGround1
Power Supply, 3.3V Typ.VCC2
Power Supply, 3.3V Typ.VCC3
7
EDID4
DATA
IN
IN
IN
IN
IN
IN
EDID6
EDID
0 -8
0 +9
1 -11
1 +12
2 -14
2 +15
DDC 3.3V powerV
No ConnectionNC5
DDC ClockClk
DDC Data
- LVDS differential data input (R0-R5, G0)R
+ LVDS differential data input (R0-R5, G0)R
GroundVSS10
- LVDS differential data input (G1-G5, B0-B1)R
+ LVDS differential data input (G1-G5, B0-B1)R
GroundVSS13
- LVDS differential data input (B2-B5, HS, VS, DE)R
+ LVDS differential data input (B2-B5, HS, VS, DE)R
GroundVSS16
- LVDS differential clock inputClkIN -17
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+ LVDS differential clock inputClkIN +18
GroundVSS19
No ConnectionNC20
No ConnectionNC21
GroundVSS22
No ConnectionNC23
No ConnectionNC24
GroundVSS25
No ConnectionNC26
No ConnectionNC27
GroundVSS28
No ConnectionNC29
No ConnectionNC30
Note: All GND(ground) pins should be connected together and to GND which should also be connected to
the LCD’s metal frame. All VCC(power input) pins should be connected together.
The backlight interface connector is JST BHSR-02VS-1 or equivalent. The mating connector
part number is SM02B-BHSS-1 or equivalent.
1Power supply for lamp (High voltage side)HV1
1Power supply for lamp (Low voltage side)LV2
Notes : 1. The high voltage side terminal is colored pink and the low voltage side terminal is Green.
Ver. 0.4Mar. 02. 2006
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LP150X08
Liquid Crystal Display
Product Specification
3-3. Signal Timing Specifications
This is the signal timing required at the input of the User connector. All of the interface signal timing should be
satisfied with the following specifications and specifications of LVDS Tx/Rx for it’s proper operation.
Table 5. TIMING TABLE
NoteUnitMaxTypMinSymbolITEM
Vsync
Data
Enable
Vertical front porch
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3-4. Signal Timing Waveforms
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Data Enable, Hsync, Vsync
f
CLKFrequencyDCLK
t
t
t
t
HBPHorizontal back porch
t
t
HFPHorizontal front porch
VBPVertical back porch
t
VFP
t
MHz686540
HPPeriodHsync
WHWidth
VPPeriod
fvFrequency
WVWidth
High: 0.7VCC
Low: 0.3VCC
136413441206
t
CLK
-1368
830806780
HP
606040
2461
-16010
-2410
-297
-31
t
tCLK
tHP
Condition : VCC =3.3V
15.4ns
Don’t care
Flicker level at
40Hz
t
Hsync
t
WH
t
HBP
HP
tWHA
Date Enable
t
VP
t
WV
Vsync
t
VBP
tWVA
Date Enable
Ver. 0.4Mar. 02. 2006
t
HFP
t
VFP
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