LG LP-141WP1-TLC3 Service manual

LP141WP1

Liquid Crystal Display

Product Specification

SPECIFICATION

FOR

APPROVAL

)

(
(

Preliminary Specification◆

)

Final Specification

Title

DELLCustomer

MODEL

www.jxlcd.com

www.jxlcd.com

SIGNATUREAPPROVED BY

/

/

/

14.1” WXGA TFT LCD

www.DataSheet.net/

*When you obtain standard approval,

please use the above model name without suffix

S. C. Yun / G.Manager

REVIEWED BY

G. J. Han / Manager

PREPARED BY

B. T. Jang / Engineer

LG.Philips LCD Co., Ltd.SUPPLIER
LP141WP1*MODEL

TLC3Suffix

SIGNATUREAPPROVED BY

Please return 1 copy for your confirmation with
your signature and comments.

Ver. 0.0 Nov. 12, 2007

S. H. Ahn / Engineer

Products Engineering Dept.

LG. Philips LCD Co., Ltd

1 / 31

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Product Specification

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Contents

LP141WP1

Liquid Crystal Display

ITEMNo

COVER
CONTENTS
RECORD OF REVISIONS
GENERAL DESCRIPTION1
ABSOLUTE MAXIMUM RATINGS2

ELECTRICAL SPECIFICATIONS3
ELECTRICAL CHARACTREISTICS3-1

INTERFACE CONNECTIONS3-2
LVDS SIGNAL TIMING SPECIFICATIONS3-3
SIGNAL TIMING SPECIFICATIONS3-4
SIGNAL TIMING WAVEFORMS3-5
COLOR INPUT DATA REFERNECE3-6

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POWER SEQUENCE3-7
OPTICAL SFECIFICATIONS4

Page

1
2
3
4
5

6
8

9
11
11
12
13
14

MECHANICAL CHARACTERISTICS5
RELIABLITY6
INTERNATIONAL STANDARDS7
SAFETY7-1
EMC7-2
PACKING8
DESIGNATION OF LOT MARK8-1
PACKING FORM8-2
PRECAUTIONS9
APPENDIX. Enhanced Extended Display Identification Data A

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24

25
25

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26
27
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RECORD OF REVISIONS

LP141WP1

Liquid Crystal Display

DescriptionPageRevision DateRevision No

First Draft (Preliminary Specification)-Nov. 12. 20070.0

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EDID

ver

0.0

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LP141WP1

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Liquid Crystal Display

Product Specification

1. General Description

The LP141WP1 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent
Lamp (CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a
transmissive type display operating in the normally white mode. This TFT-LCD has 15.4 inches diagonally
measured active display area with WXGA resolution(900 vertical by 1440 horizontal pixel array). Each pixel
is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or
the brightness of the sub-pixel color is determined with a 6-bit gray scale signal for each dot, thus,
presenting a palette of more than 262,144 colors.

The LP141WP1 has been designed to apply the interface method that enables low power, high speed, low
EMI.

The LP141WP1 is intended to support applications where thin thickness, low power are critical factors and
graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the
LP141WP1 characteristics provide an excellent flat display for office automation products such as Notebook
PC.

CN

1

User connector

30

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Pin

CN

General Features

LVDS &
Timing

Control

Block

POWER

BLOCK

EDID

BLOCK

Control & Data Power EDID signal & Power

14.1 inches diagonal Active Screen Size

320.0 (H) × 206.0 (V) × 6.4(D, max) mmOutline Dimension

0.2109 mm × 0.2109 mm Pixel Pitch
1440 horiz. by 900 vert. Pixels RGB strip arrangementPixel Format
6-bit, 262,144 colorsColor Depth
235 cd/m2(Typ.) , 5 pointLuminance, White
Total 5.37 Watt(Typ.) @ LCM circuit 1.27 Watt(Typ.), B/L input 4.1 Watt(Typ.)Power Consumption

435g (Max.), 425g(Typ.)Weight
Transmissive mode, normally whiteDisplay Operating Mode
Anti-glare treatment of the front polarizerSurface Treatment

YesRoHS Comply

(LOG_B type)

(LOG_B type)

(LOG_B type)(LOG_B type)

1

Gate Driver

900

Source Driver Circuit

1 1440

TFT-LCD Panel

(1440 x 900)

Backlight Ass’y

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Liquid Crystal Display

Product Specification

2. Absolute Maximum Ratings

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.

Table 1. ABSOLUTE MAXIMUM RATINGS

60

Values

90% 80%

MaxMin

60

40

20

10

%

%

%

%

Parameter Notes

Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity

Note : 1. Temperature and relative humidity range are shown in the figure below.

Wet bulb temperature should be 39°CMax, and no condensation of water.

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Wet Bulb
Temperature [℃℃℃℃]

20

10

0

Symbol

OP

ST

OP

ST

50

40

30

Units

Humidity[(%)RH]

Storage

Operation

at 25 ± 5°CVdc4.0-0.3VCC

1°C500T
1°C60-20H
1%RH9010H
1%RH9010H

-20

Ver. 0.0 Nov. 12, 2007

10

20 30 40 50

Dry Bulb Temperature [℃℃℃℃]

60 70 800

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Liquid Crystal Display

Product Specification

3. Electrical Specifications
3-1. Electrical Characteristics

The LP141WP1 requires two power inputs. One is employed to power the LCD electronics and to drive the
TFT array and liquid crystal. The second input which powers the CCFL, is typically generated by an
inverter. The inverter is an external unit to the LCD.

Table 2. ELECTRICAL CHARACTERISTICS

Parameter Symbol

MODULE :

Power Supply Input Current

LAMP :

Operating Voltage
Operating Current

Power Consumption
Operating Frequency

Established Starting Voltage

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at 25℃
at 0 ℃

V

I

Vs

CC

BL

BL

BL

BL

640

(7.0mA)

Values

655

(6.3mA)

MaxTypMin

3.63.33.0VCCPower Supply Input Voltage

880

(2.0mA)

7.06.32.0I

4.54.1-P

1180
1415

V

DC

V

RMS

RMS

kHz806550f

V

RMS

V

RMS

Note)

1. The specified current and power consumption are under the Vcc = 3.3V , 25℃, fv = 60Hz condition
whereas Mosaic pattern is displayed and fv is the frame frequency.

NotesUnit

1mA445385
1Watt1.471.27-PcPower Consumption
2Ohm11010090ZmDifferential Impedance

3mA

4Min3--TsDischarge Stabilization Time
5Hrs--15,000Life Time

2. This impedance value is needed to proper display and measured form LVDS Tx to the mating connector.

3. The typical operating current is for the typical surface luminance (LWH) in optical characteristics.

4. Define the brightness of the lamp after being lighted for 5 minutes as 100%, Ts is the time required for
the brightness of the center of the lamp to be not less than 95%.

5. The life time is determined as the time at which brightness of lamp is 50% compare to that of initial value
at the typical lamp current.

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Liquid Crystal Display

Product Specification

Note)

6. The output of the inverter must have symmetrical(negative and positive) voltage waveform and
symmetrical current waveform.(Asymmetrical ratio is less than 10%) Please do not use the inverter
which has asymmetrical voltage and asymmetrical current and spike wave.
Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may
cause beat on the display. Therefore lamp frequency shall be as away possible from the

horizontal synchronous frequency and from its harmonics in order to prevent interference.

7. It is defined the brightness of the lamp after being lighted for 5 minutes as 100%.
TSis the time required for the brightness of the center of the lamp to be not less than 95%.

8. The lamp power consumption shown above does not include loss of external inverter.
The applied lamp current is a typical one.

9. Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp, are following.
It shall help increase the lamp lifetime and reduce leakage current.

a. The asymmetry rate of the inverter waveform should be less than 10%.
b. The distortion rate of the waveform should be within √2 ±10%.

* Inverter output waveform had better be more similar to ideal sine wave.

* Asymmetry rate:

I

p

| I p– I –p| / I

rms

* 100%

I

-p

10. Inverter open voltage must be more than lamp voltage for more than 1 second for start-up.
Otherwise, the lamps may not be turned on.

※ Do not attach a conducting tape to lamp connecting wire.

If the lamp wire attach to a conducting tape, TFT-LCD Module has a low luminance and the inverter
has abnormal action. Because leakage current is occurred between lamp wire and conducting tape.

Ex of current wave)

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Normal current wave - Standard

* Distortion rate

I p(or I –p) / I

Abnormal current wave - Bad

rms

Abnormal current wave - Bad

Ver. 0.0 Nov. 12, 2007

Abnormal current wave - Bad

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Liquid Crystal Display

Product Specification

3-2. Interface Connections

This LCD employs two interface connections, a 30 pin connector is used for the module electronics interface
and the other connector is used for the integral backlight system.

The electronics interface connector is a model FI-XB30SRL-HF11 manufactured by JAE.

Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)

NotesDescriptionSymbolPin

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

1
2
3
4
5
6
7
8
9

RC1+

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RA2+ Positive LVDS differential data input, R0-R5, G0

RC2+

GroundGND
Power Supply, 3.3V Typ.VCC
Power Supply, 3.3V Typ.VCC
DDC 3.3V powerV EEDID
Requested for LCD supplier test pointBIST
DDC ClockClk EEDID
DDC DataDATA EEDID
Negative LVDS differential data input, R0-R5, G0RA1­Positive LVDS differential data input, R0-R5, G0RA1+
GroundGND
Negative LVDS differential data input, G1-G5, B0-B1RB1­Positive LVDS differential data input, G1-G5, B0-B1RB1+
GroundGND
Negative LVDS differential data input, B2-B5, HS/VS/DERC1-

Positive LVDS differential data input, B2-B5,
HS/VS/DE

GroundGND
Negative LVDS differential clock inputRCLK1­Positive LVDS differential clock inputRCLK1+
GroundGND
Negative LVDS differential data input, R0-R5, G0RA2-

GroundNC
Negative LVDS differential data input, G1-G5, B0-B1RB2­Positive LVDS differential data input, G1-G5, B0-B1RB2+
GroundNC
Negative LVDS differential data input, B2-B5, HS/VS/DERC2-

Positive LVDS differential data input, B2-B5,
HS/VS/DE

GroundNC
Negative LVDS differential clock inputRCLK2­Positive LVDS differential clock inputRCLK2+

1, Interface chips

1.1 LCD : TLI, Dual LVDS Rx

1.2 System : it must include international
* Pin to Pin compatible with LVDS

2. Connector

2.1 LCD : MDF76LBRW-30S-1H, HIROSE or

2.2 Mating : FI-X30M or equivalent.

2.3 Connector pin arrangement

30

standard LVDS Transmitter.

FI-XB30SRL-HF11,JAE or
its compatibles

1

[LCD Module Rear View]

The backlight interface connector is a model BHSR-02VS-1, manufactured by JST or Compatible.
The mating connector part number is SM02B-BHSS-1 or equivalent.

PIN1

PIN2PIN2

Table 4. BACKLIGHT CONNECTOR PIN CONFIGURATION (J3)

NotesDescriptionSymbolPin

1Power supply for lamp (High voltage side)HV1
1Power supply for lamp (Low voltage side)LV2

Notes : 1. The high voltage side terminal is colored White and the low voltage side terminal is Blue.

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3-3. LVDS Signal Timing Specifications

3-3-1. DC Specification

LP141WP1

Liquid Crystal Display

Description

LVDS Common mode Voltage
LVDS Input Voltage Range

3-3-2. AC Specification

LVDS Clock to Data Skew Margin

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Symb

ol

CM

IN

SKEW

SKEW

- 600

NotesUnitMaxMin

-mV600100|VID|LVDS Differential Voltage

-V1.80.6V

-V2.10.3V

NotesUnitMaxMinSymbolDescription

ps+ 400- 400t

ps+ 600t

85MHz > Fclk ≥

65MHz

65MHz > Fclk ≥

25MHz

LVDS Clock to Clock Skew Margin (Even
to Odd)

Maximum deviation
of input clock frequency during SSC

Maximum modulation frequency
of input clock during SSC

Ver. 0.0 Nov. 12, 2007

SKEW_EO

DEV

MOD

- 1/7

+ 1/7t

T

clk

%± 3-F

KHz200-F

-

-

-

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Freq.

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F

max

F

center

F

min

Product Specification

< Clock skew margin between channel >

LP141WP1

Liquid Crystal Display

F

* F

center

DEV

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3-3-3. Data Format

1) LVDS 2 Port

1

F

MOD

< Spread Spectrum >

Time

< LVDS Data Format >

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