INTERFACE CONNECTIONS 3-2
LVDS SIGNAL TIMING SPECIFICATION 3-3
SIGNAL TIMING SPECIFICATIONS 3-3
SIGNAL TIMING WAVEFORMS 3-4
COLOR INPUT DATA REFERNECE 3-5
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POWER SEQUENCE 3-6
OPTICAL SFECIFICATIONS4
Page
1
2
3
4
5
6
7
8-9
9
10
11
12
13-16
MECHANICAL CHARACTERISTICS5
RELIABLITY6
INTERNATIONAL STANDARDS7
SAFETY 7-1
EMC 7-2
PACKING8
DESIGNATION OF LOT MARK 8-1
PACKING FORM 8-2
PRECAUTIONS9
APPENDIX. Enhanced Extended Display Identification Data A
The LP140WH1 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in
the normally white mode. This TFT-LCD has 14.0 inches diagonally measured active display area with HD
resolution(768 vertical by 1366 horizontal pixel array). Each pixel is divided into Red, Green and Blue subpixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is
determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144
colors.
The LP140WH1 has been designed to apply the interface method that enables low power, high speed, low
EMI.
The LP140WH1 is intended to support applications where thin thickness, low power are critical factors and
graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the
LP140WH1 characteristics provide an excellent flat display for office automation products such as Notebook
PC.
0.2265mm × 0.2265 mmPixel Pitch
1366 horiz. By 768 vert. Pixels RGB strip arrangementPixel Format
6-bit, 262,144 colorsColor Depth
220 cd/m2(Typ.5 point)Luminance, White
Total 4.5 Watt(Typ.) @ LCM circuit 1.4 Watt(Typ.), B/L input 3.1 Watt(Typ.)Power Consumption
350g (Max.)Weight
Transmissive mode, normally whiteDisplay Operating Mode
Hard Coating(3H), Glare treatment of the front polarizerSurface Treatment
YesRoHS Comply
1
GIP(Gate In Panel)
768
1
WLED Ass’y(48ea)
TFT-LCD Panel
(1366 X 768)
Source Driver Circuit
1366
Ver. 1.0Oct. 17, 2008
4 / 33
LP140WH1
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
ParameterNotes
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39C Max, and no condensation of water.
The LP140WH1 requires two power inputs. One is employed to power the LCD electronics and to drive the
TFT array and liquid crystal. The second input which powers the LED BL.
Table 2. ELECTRICAL CHARACTERISTICS
ParameterSymbol
MODULE :
Power Supply Input Current
LED Backlight ( With LED Driver )
Operating Current per string
Power Consumption
PWM Input Signal
Frequency
On Duty
Voltage Level
LED_EN
Voltage Level
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I
CC
LED
LED
PWM
on
PWM
LED_EN
Values
MaxTypMin
3.63.33.0VCC Power Supply Input Voltage
V
mA1500Irush Inrush Current
Hz1000120F
%3D
NotesUnit
DC
1mA4954301Watt1.61.4-Pc Power Consumption
2Ohm11010090Zm Differential Impedance
3mA-20-I
4Watt3.93.6-P
5Hrs--12,000 Life Time
V207.0VLED
V2.9V
V2.9V
Note)
1. The specified current and power consumption are under the Vcc = 3.3V , 25℃, fv = 60Hz condition
whereas Mosaic pattern is displayed and fv is the frame frequency.
2. This impedance value is needed to proper display and measured form LVDS Tx to the mating connector.
3. The typical operating current is for the typical surface luminance (LWH) in optical characteristics.
I
4. The LED power consumption shown above includes power of internal LED driver circuit for typical current
condition.
5. The life time is determined as the time at which brightness of LCD is 50% compare to that of initial value
at the typical LED current.
is the current of each LED’s string, LED backlight has 6 strings on it.
LED
Ver. 1.0Oct. 17, 2008
6 / 33
LP140WH1
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector is used for the module electronics interface
and the other connector is used for the integral backlight system.
The electronics interface connector is a model CABLINE-VS RECE ASS’Y manufactured by I-PEX.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
NotesDescriptionSymbolPin
ReservedNC1
Power Supply, 3.3V Typ.VCC2
31
32
33
34
35
36
37
38
39
40
Power Supply, 3.3V Typ.VCC3
DDC 3.3V powerV EEDID4
No ConnectionNC5
DDC ClockClk EEDID6
DDC DataDATA EEDID7
Negative LVDS differential data inputOdd_RIN 0-8
Positive LVDS differential data inputOdd_RIN 0+9
GroundGND10
Negative LVDS differential data inputOdd_RIN 1- 11
Positive LVDS differential data inputOdd_RIN 1+12
GroundGND13
Negative LVDS differential data inputOdd_RIN 2-14
Positive LVDS differential data inputOdd_RIN 2+15
GroundGND16
Negative LVDS differential clock inputOdd_CLKIN-17
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NCNo Connection21
Positive LVDS differential clock inputOdd_CLKIN+18
GroundGND19
No ConnectionNC20
GroundGND19
No ConnectionNC23
No ConnectionNC24
GroundGND19
No ConnectionNC26
No ConnectionNC27
GroundGND19
No ConnectionNC29
No ConnectionNC30
LED GroundVLED_GND
LED GroundVLED_GND
LED GroundVLED_GND
Reserved NC
PWM for luminance control(200Hz ~ 1000Hz)PWM
Backlight On/Off ControlLED_EN
No Connection (Reserved)NC
LED Power Supply (7V-20V)VLED
LED Power Supply (7V-20V)VLED
LED Power Supply (7V-20V)VLED
1, Interface chips
1.1 LCD : SW, SW0624 (LCD Controller)
including LVDS Receiver
1.2 System : THC63LVDF823A
or equivalent
* Pin to Pin compatible with LVDS
2. Connector
2.1 LCD : CABLINE-VS RECE ASS’Y, I-PEX
or its compatibles
2.2 Mating : CABLINE-VS PLUG CABLE
ASS’Y or equivalent.
Maximum deviation
of input clock frequency during SSC
Maximum modulation frequency
of input clock during SSC
Ver. 1.0Oct. 17, 2008
SKEW_EO
DEV
MOD
- 1/7
+ 1/7t
T
clk
%± 3-F
KHz200-F
-
-
-
8 / 33
LVDS Even Data
LVDS Odd Clock
LVDS Even Clock
t
SKEW_EO
T
clk
T
clk
Freq.
F
max
F
center
F
min
Product Specification
< Clock skew margin between channel >
LP140WH1
Liquid Crystal Display
F
* F
center
DEV
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3-3-3. Data Format
1) LVDS 1 Port
RCLK+
RA+/-
RB+/-
RC+/-
R3R2
G4G3
B5B4
R1R0
G2G1
B3B2
1
F
MOD
< Spread Spectrum >
G0R5R4R3R2R1R0
B1B0G5G4G3G2G1
DE VSYNC HSYNCB5B4B3B2
Time
G0
B1
DE
VSYNC HSYNC
R5R4
B0G5
Ver. 1.0Oct. 17, 2008
RD+/-
G7G6
Previous (N-1)th CycleNext(N+1)th Cycle
R7R6
XB7B6G7G6R7R6
Current (Nth) Cycle
< LVDS Data Format >
X
B7B6
9 / 33
LP140WH1
Liquid Crystal Display
Product Specification
3-4. Signal Timing Specifications
This is the signal timing required at the input of the User connector. All of the interface signal timing should be
satisfied with the following specifications and specifications of LVDS Tx/Rx for its proper operation.
Table 4. TIMING TABLE
NoteUnitMaxTypMinSymbolITEM
FrequencyDCLK
Period
Hsync
Vsync
Horizontal back porch
Data
Enable
3-5. Signal Timing Waveforms
Horizontal front porch
Vertical back porch
Vertical front porch
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Data Enable, Hsync, Vsync
DCLK
tCLK
0.5 Vcc
f
CLK
t
HP
Width-Active
WHA
Width-Active
WVA
HBP
HFP
t
VBP
t
VFP
High: 0.7VCC
Low: 0.3VCC
-
158615261470
403223tWH Width
136613661366t
801790779tVP Period
852tWV Width
768768768t
1248072t
48488t
20148
531
MHz-72.3
tCLK
tHP
tCLK
tHP
Condition : VCC =3.3V
t
HP
Hsync
t
WH
t
HBP
tWHA
Data Enable
t
VP
t
WV
Vsync
t
VBP
tWVA
Data Enable
Ver. 1.0Oct. 17, 2008
t
t
HFP
VFP
10 / 33
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