LG LP-133WH2-TLL2 Service manual

( ) Preliminary Specification (●) Final Specification
LP133WH2
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
BUYER DELL MODEL
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APPROVED BY
/
/
/
SIGNATURE
SUPPLIER LG Display Co., Ltd.
*MODEL LP133WH2
Suffix TLL2
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY SIGNATURE
H. S. Kim / S.Manager
REVIEWED BY
Y. S. Ha / Manager
PREPARED BY
K. Y. Kwon / Engineer
Please return 1 copy for your confirmation with your signature and comments.
Ver. 1.0 May. 31. 2010
Product Engineering Dept.
LG Display Co., Ltd
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Product Specification
Contents
LP133WH2
Liquid Crystal Display
No
COVER CONTENTS RECORD OF REVISIONS
1 2 3
4
GENERAL DESCRIPTION ABSOLUTE MAXIMUM RATINGS ELECTRICAL SPECIFICATIONS ELECTRICAL CHARACTREISTICS
3-1
INTERFACE CONNECTIONS
3-2
LVDS SIGNAL TIMING SPECIFICATION
3-3
SIGNAL TIMING SPECIFICATIONS
3-4
SIGNAL TIMING WAVEFORMS
3-5
COLOR INPUT DATA REFERNECE
3-6
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POWER SEQUENCE
3-7
OPTICAL SFECIFICATIONS
ITEM
Page
1 2 3 4 5
6-7
8
9-10
11 11 12 13
14-16 5 6 7
8
9
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MECHANICAL CHARACTERISTICS RELIABLITY INTERNATIONAL STANDARDS SAFETY
7-1
EMC
7-2
Environment
7-3
PACKING DESIGNATION OF LOT MARK
8-1
PACKING FORM
8-2
PRECAUTIONS
A APPENDIX. Enhanced Extended Display Identification Dat a
17-20
21
22 22 22
23
23 24-25 26-28
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Product Specification
RECORD OF REVISIONS
LP133WH2
Liquid Crystal Display
Revision No Rev ision Date Page Description
0.0 Dec. 14. 2009 - First Draft (Preliminary Specification) ­6 Update the Electrical Characteristics Spec.
0.1 Dec. 30. 2009
0.2 Feb. 01. 2010 26~28 Update EEDID Table (x20) 0.1
0.3 May. 03. 2010 14 Update Color Coordinates spec.
1.0 May. 31. 2010 4, 17 Update weight
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8 Update Module Connector Pin Configuration
14 Update Optical Characteristics
26~28 Update EEDID Table
15 Update Gray scale spec.
20~22 Add LGD proposal for system cover design 29~31
Update EEDID Table (A00)
Final Specification
EDID
ver
0.0
1.0
Ver. 1.0 May. 31. 2010
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LP133WH2
Liquid Crystal Display
Product Specification
1. General Description
The LP133WH2 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally white mode. This TFT-LCD has 13.3 inches diagonally measured active display area with HD resolution (1366 horizontal by 768 vertical pixel array). Each pixel is divided into Red, Green and Blue sub­pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144 colors. The LP133WH2 has been designed to apply the interface method that enables low power, high speed, low EMI. The LP133WH2 is intended to support applications where thin thickness, low power are critical factors and graphic displays are important. In combination with the vertical arrangement of the sub­pixels, the LP133WH2 characteristics provide an excellent flat display for office automation products such as Notebook PC.
EEPROM Block
for EDID
EEPROM Block
User connector
LVDS
1port
40
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Pin
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VCC
VLED
LED_EN
PWM
for Tcon Operating
Timing Control
(Tcon) Block
DVCC
Power
Block
LED Driver
Block
Control & Data Power
TCLKs
DVCC, AVDD
VGH, VGL, GMA
GIP CLKs, DSC
VOUT_LED
FB1~4
1
768
1366
TFT-LCD Panel
(HD, GIP, TN)
Source Driver
(Bottom)
LED Backlight Ass’y
EDID signal & Power
General Features
Active Screen Size 13.3 inches diagonal Outline Dimension Pixel Pitch Pixel Format 1366 horiz. by 768 vert. Pixels RGB strip arr angem ent Color Depth 6-bit, 262,144 colors Luminance, White 200 cd/m Power Consumption Total 2.8W(Max.) Logic : 1.0W (Typ.@ Mosaic), B/L : 1.8W (Typ.@ VLED 12V ) Weight 290g(Max.) Display Operating Mode Transmissive mode, normally white Surface Treatment Glare treatment (3H) of the front Polarizer RoHS Compliance Yes
BFR / PVC / As Free Yes for all.
306.3(Typ. H) × 177.7(Typ. V) × 3.6(D, Max.) mm
0.2148 × 0.2148 mm
2
(Typ.)
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LP133WH2
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage Operating Temperature Storage Temperature Operating Ambient Humidity Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39
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Wet Bulb Temperature []
20
10
0
VCC -0.3 4.0 Vdc at 25 ± 5°C
TOP 0 50 °C 1 HST -20 60 °C 1 HOP 10 90 %RH 1 HST 10 90 %RH 1
°C Max, and no condensation of water.
50
40
30
Values
Min Max
90% 80%
60
Units Notes
60%
Humidity[(%)RH]
Storage
40%
Operation
20%
10%
-20
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10
20 30 40 50
Dry Bulb Temperature []
60 70 800
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LP133WH2
Liquid Crystal Display
Product Specification
3. Electrical Specifications 3-1. Electrical Characteristics
The LP133WH2 requires two power inputs. The first logic is employed to power the LCD electronics and to drive the TFT array and liquid crystal. The second backlight is the input abou t LED BL wit h LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
LOGIC :
Power Supply Input Voltage V Power Supply Input Current Mosaic I Power Consumption P Power Supply Inrush Current I LVDS Impedance Z
BACKLIGHT : ( with LED Driver)
LED Power Input Voltage V LED Power Input Current I LED Power Consumption P LED Power Inrush Current I
PWM Duty Ratio 5 - 100 % 8
PWM Jitter
PWM Impedance Z
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CC 3.0 3.3 3.6 V 1
CC - 315 365 mA 2
CC - 1.0 1.2 W 2
CC_P - - 1500 mA 3
LVDS 90 100 110 Ω 4
LED 7.0 12.0 21.0 V 5
LED - 150 170 mA 6
LED 1.8 2.0 W
LED_P - - 1000 mA 7
-
PWM 20 40 60
Min Typ Max
0 - 0.2 % 9
Values
Unit Notes
PWM Frequency F
PWM High Level Voltage V
PWM Low Level Voltage V
LED_EN Impedance Z
LED_EN High Voltage V
LED_EN Low Voltage V
DBC_EN High Voltage 3.0 - 5.3 V
DBC_EN Low Voltage 0 - 0.3 V
Life Time 12,000 - - Hrs 11
Ver. 1.0 May. 31. 2010
PWM 200 1000 2000 Hz 10
PWM_H
PWM_L
PWM 20 40 60 LED_EN_H 3.0 - 5.3 V LED_EN_L 0 - 0.3 V
3.0 - 5.3 V 0 - 0.3 V
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Liquid Crystal Display
Product Specification
Note)
1. The measuring position is the connector of LCM and the test conditions are under 25, fv = 60Hz, Black pattern.
2. The specified Icc current and power consumption are under the Vcc = 3.3V , 25, fv = 60Hz condition and Mosaic pattern.
3. This Spec. is the max load condition for the cable impedance designing.
4. The below figures are the measuring Vcc condition and the Vcc control block LGD used. The Vcc condition is same as the minimum of T1 at Power on sequence.
LP133WH2
Rising time Vcc
0V
5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.
6. The measuring position is the connector of LCM and the test conditions are under 25℃.
7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25, Dimming of Max luminance and White pattern with the normal frame frequency operated(60Hz).
8. The below figures are the measuring Vled condition and the Vled control block LGD used. VLED control block is same with Vcc control block.
90%
10%
0.5ms
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3.3V
Rising time
LED
V
0V
10%
12.0V
90%
0.1ms
9. The operation of LED Driver below minim um dimming ratio may cause fli ckering or reliabil ity issue.
10. If Jitter of PWM is bigger than maximum, it may induc e flickering.
11. This Spec. is not effective at 100% dim ming ratio as an exceptio n because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for more consistent brightness control at any specific level desired.
12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum
value specified in table 7. under general user condition.
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LP133WH2
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector used for the module electronics interface and the other connector used for the integral backlight system.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
Pin Symbol Description Notes
1 DIAG_LOOP 2 VCC LCD Logic and driver power (3.3V Typ.)
3 VCC LCD Logic and driver power (3.3V Typ.) 4 V EEDID DDC Power (3.3V) 5 BIST Built-In Self Test 6 Clk EEDID DDC Clock 7 DATA EEDID DDC Data 8 ORX0- Negative LVDS differential data input
9 ORX0+ Positive LVDS differential data input 10 GND High Speed Ground 11 ORX1- Negative LVDS differential data input 12 ORX1+ Positive LVDS differential data input 13 GND High Speed Ground 14 ORX2- Negative LVDS differential data input 15 ORX2+ Positive LVDS differential data input 16 GND High Speed Ground 17 ORXC- Negative LVDS differential clock input 18 ORXC+ Positive LVDS differential clock input 19 GND High Speed Ground 20 21 22 GND High Speed Ground 23 24 25 GND High Speed Ground 26 27 28 GND High Speed Ground 29 30 31 32 33 34 DIAG_LOOP Diag pin for Dell testing. 35 36 37 DBC_EN Dynamic Backlight Control enable 38 39 40
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NC NC
NC NC
NC NC
NC
NC GND LED Backl ight Ground GND LED Backl ight Ground GND LED Backl ight Ground
PWM System PWM Signal input for dimming
LED_EN
VLED LED Backlight Power (7V-21V) VLED LED Backlight Power (7V-21V) VLED LED Backlight Power (7V-21V)
Diag pin for Dell testing. Pin 1& 34 must be connected together on the PCB board
No Connection No Connection
No Connection No Connection
No Connection No Connection
No Connection No Connection
LED Backlight On/Off
[Interface Chip]
1. LCD : SiW, SW0617(LCD Controller) Including LVDS Receiver.
2. System : SiW LVDSRx or equivalent
* Pin to Pin compatible with LVDS
[Connector]
UJU IS050-L40B-C10 LSMtron GT05Q-40S-H10 or equivalent
[Mating Connector]
20345-#40E-## series or equivalent
[Connector pin arrangement]
40
[LCD Module Rear View]
1
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Product Specification
LVDS Data
t
SKEW
LVDS Clock
T
clk
t
SKEW
(F
clk
= 1/T
clk
)
1) 85MHz > Fclk 65MHz : -400 ~ +400
2) 65MHz > Fclk 25MHz : -600 ~ +600
LVDS +
LVDS -
0V
V
CM
# |V
ID
| = |(LVDS+) – (LVDS-)|
# V
CM
= {(LVDS+) + (LVDS-)}/2
|V
ID
|
V
IN_MAX
V
IN_MIN
3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
Description Symbol Min Typ Max Unit Notes
LP133WH2
Liquid Crystal Display
VDD=1.8V
LVDS Differential Voltage |V LVDS Common mode Voltage V LVDS Input Voltage Range V
3-3-2. AC Specification
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Description Symbol Min Max Unit Notes
LVDS Clock to Data Skew Margin
| 100 - 600 mV -
ID
CM
IN
|VID| /2 1.2 VDD- |VID|/2 V -
0.3 - VDD V -
t
SKEW
t
SKEW
- 400 + 400 ps
- 600 + 600 ps
85MHz > Fclk
65MHz
65MHz > Fclk
25MHz
LVDS Clock to Clock Skew Margin (Even to Odd)
Maximum deviation of input clock frequency during SSC
Maximum modulation frequency of input clock during SSC
Ver. 1.0 May. 31. 2010
t
SKEW_EO
F
DEV
F
MOD
- 1/7 + 1/7 T
-
± 3
clk
% -
- 200 KHz -
-
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LVDS Even Data
LVDS Odd Clock
LVDS Even Clock
t
SKEW_EO
T
clk
T
clk
Freq.
F
max
F
center
F
min
Product Specification
< Clock skew margin between channel >
LP133WH2
Liquid Crystal Display
* F
F
center
DEV
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3-3-3. Data Format
1) LVDS 1 Port
RCLK+
RA+/-
RB+/-
RC+/-
RD+/-
R3 R2
G4 G3
B5 B4
G7 G6
Previous (N-1)th Cycle Next(N+1)th Cycle
R1 R0
G2 G1
B3 B2
R7 R6
1
F
MOD
< Spread Spectrum >
G0 R5 R4 R3 R2 R1 R0
B1 B0 G5 G4 G3 G2 G1
DE VSYNC HSYNC B5 B4 B3 B2
X B7 B6 G7 G6 R7 R6
Current (Nth) Cycle
Time
G0
B1
DE
VSYNC HSYNC
X
R5 R4
B0 G5
B7 B6
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< LVDS Data Format >
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