LG Electronics LP133WH2-TLHA Specification

( ) Preliminary Specification ( ● ) Final Specification
LP133WH2
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
BUYER
MODEL
APPROVED BY
/
/
/
SUPPLIER LG Display Co., Ltd.
*MODEL LP133WH2
Suffix TLHA
*When you obtain standard approval, please use the above model name without suffix
APPROVED BY SIGNATURE
SIGNATURE
S. R. Kim / S.Manager
REVIEWED BY
M. J. Lee / S.Manager
PREPARED BY
S. B. Park / Engineer
S. M. Woo / Engineer
Please return 1 copy for your confirmation with your signature and comments.
Ver. 1.0 Mar. 16, 2012
Product Engineering Dept.
LG Display Co., Ltd
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Product Specification
Contents
LP133WH2
Liquid Crystal Display
No
1 2 3 3-1 3-2 3-3 3-4 3-5 3-6 3-7 4
COVER CONTENTS RECORD OF REVISIONS GENERAL DESCRIPTION ABSOLUTE MAXIMUM RATINGS ELECTRICAL SPECIFICATIONS ELECTRICAL CHARACTREISTICS INTERFACE CONNECTIONS LVDS SIGNAL TIMING SPECIFICATION SIGNAL TIMING SPECIFICATIONS SIGNAL TIMING WAVEFORMS COLOR INPUT DATA REFERNECE POWER SEQUENCE OPTICAL SFECIFICATIONS
ITEM
Page
1 2 3 4 5
6-7
8
9-10
11 11 12 13
14-16 5 6 7 7-1 7-2 7-3 8 8-1 8-2 9
Ver. 1.0 Mar. 16, 2012
MECHANICAL CHARACTERISTICS RELIABLITY INTERNATIONAL STANDARDS SAFETY EMC Environment PACKING DESIGNATION OF LOT MARK PACKING FORM PRECAUTIONS
A APPENDIX. Enhanced Extended Display Identification Data
17-20
21
22 22 22
23
23 24-25 26-28
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Product Specification
RECORD OF REVISIONS
LP133WH2
Liquid Crystal Display
Revision No Revision Date Page Description
0.0 Aug. 04, 2011 - First Draft (Preliminary Specification) 0.0
0.1 Feb. 27, 2012 6 Update Electrical Characteristics 0.1 11
Update Signal Timing Specifications
14 - 15 Update Optical Specification ­17 - 20 Update Mechanical Characteristics -
27 Update Packing Form -
0.2 Mar. 06, 2012 26 Update Safety 0.1
1.0 Mar. 16, 2012 - Final Draft 1.0
19, 20 Update Mechanical Rear Drawing & Label Information -
EDID
ver
-
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LP133WH2
Liquid Crystal Display
Product Specification
1. General Description
The LP133WH2 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally white mode. This TFT-LCD has 13.3 inches diagonally measured active display area with HD resolution (1366 horizontal by 768 vertical pixel array). Each pixel is divided into Red, Green and Blue sub­pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144 colors. The LP133WH2 has been designed to apply the interface method that enables low power, high speed, low EMI. The LP133WH2 is intended to support applications where thin thickness, low power are critical factors and graphic displays are important. In combination with the vertical arrangement of the sub­pixels, the LP133WH2 characteristics provide an excellent flat display for office automation products such as Notebook PC.
EEPROM Block
for EDID
EEPROM Block
User connector
for Tcon Operating
1
1366
TFT-LCD Panel
40
Pin
LVDS
1port
VCC
VLED
LED_EN
PWM
Timing Control
(Tcon) Block
DVCC
Power
Block
LED Driver
Block
TCLKs
VGH, VGL, GMA
Control & Data Power
768
DVCC, AVDD
GIP CLKs, DSC
VOUT_LED
FB1~4
(HD, GIP, TN)
Source Driver
(Bottom)
LED Backlight Ass’y
EDID signal & Power
General Features
Active Screen Size 13.3 inches diagonal Outline Dimension Pixel Pitch Pixel Format 1366 horiz. by 768 vert. Pixels RGB strip arrangement Color Depth 6-bit, 262,144 colors Luminance, White 200 cd/m2( 5P Typ.) Power Consumption Total 2.8W(Typ.) Logic : 0.8 W (Typ.@ Mosaic), B/L : 2.0 W (Typ.@ VLED 12V )
Weight 300 g (Max.) Display Operating Mode Transmissive mode, Normally white
Surface Treatment Anti-Glare treatment of the front polarizer RoHS Compliance Yes
BFR / PVC / As Free Yes for all.
306.3(Typ. H) × 177.7(Typ. V) × 3.8(D, Max.) mm
0.2148 × 0.2148 mm
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LP133WH2
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage Operating Temperature Storage Temperature Operating Ambient Humidity Storage Humidity
VCC -0.3 4.0 Vdc at 25 5C
TOP 0 50 C 1 HST -20 60 C 1 HOP 10 90 %RH 1 HST 10 90 %RH 1
Values
Units Notes
Min Max
Note : 1. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be 39C Max, and no condensation of water.
90% 80%
60%
Humidity[(%)RH]
Storage
40%
Operation
20%
10%
Wet Bulb Temperature []
20
10
0
60
50
40
30
-20
10
20 30 40 50
60 70 80 0
Dry Bulb Temperature []
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LP133WH2
Liquid Crystal Display
Product Specification
3. Electrical Specifications 3-1. Electrical Characteristics
The LP133WH2 requires two power inputs. The first logic is employed to power the LCD electronics and to drive the TFT array and liquid crystal. The second backlight is the input about LED BL with LED Driver.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Unit Notes
Min Typ Max
LOGIC : Power Supply Input Voltage VCC 3.0 3.3 3.6 V 1 Power Supply Input Current Mosaic ICC - 255 315 mA 2 Power Consumption PCC - 0.8 1.0 W 2 Power Supply Inrush Current ICC_P - - 1500 mA 4 LVDS Impedance ZLVDS 90 100 110 Ω 5 BACKLIGHT : ( with LED Driver) LED Power Input Voltage VLED 7.0 12.0 21.0 V 6 LED Power Input Current ILED - 170 190 mA 7 LED Power Consumption PLED 2.0 2.2 W 7 LED Power Inrush Current ILED_P - - 1500 mA 8
Values
PWM Duty Ratio 5 - 100 % PWM Jitter
-
0 - 0.2 % 10
9
PWM Impedance ZPWM 20 40 60 PWM Frequency FPWM PWM High Level Voltage V
PWM Low Level Voltage V
PWM_H
PWM_L
200 - 1000 Hz
3.0 - 5.3 V 0 - 0.3 V
11
LED_EN Impedance ZPWM 20 40 60 LED_EN High Voltage VLED_EN_H 3.0 - 5.3 V LED_EN Low Voltage VLED_EN_L 0 - 0.3 V DBC_EN High Voltage 3.0 - 5.3 V DBC_EN Low Voltage 0 - 0.3 V Life Time 15,000 - - Hrs 12
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LP133WH2
Liquid Crystal Display
Product Specification
Note)
1. The measuring position is the connector of LCM and the test conditions are under 25, fv = 60Hz, Black pattern.
2. The specified Icc current and power consumption are under the Vcc = 3.3V , 25, fv = 60Hz condition and Mosaic pattern.
3. This Spec. is the max load condition for the cable impedance designing.
4. The below figures are the measuring Vcc condition and the Vcc control block LGD used. The Vcc condition is same as the minimum of T1 at Power on sequence.
Rising time Vcc
0V
10%
90%
3.3V
0.5ms
5. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.
6. The measuring position is the connector of LCM and the test conditions are under 25.
7. The current and power consumption with LED Driver are under the Vled = 12.0V , 25, Dimming of Max luminance and White pattern with the normal frame frequency operated(60Hz).
8. The below figures are the measuring Vled condition and the Vled control block LGD used. VLED control block is same with Vcc control block.
Rising time VLED
90%
12.0V
0V
10%
0.1ms
9. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.
10. If Jitter of PWM is bigger than maximum, it may induce flickering.
11. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for more consistent brightness control at any specific level desired.
12. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum value specified in table 7. under general user condition.
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LP133WH2
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector used for the module electronics interface and the other connector used for the integral backlight system.
Table 3. MODULE CONNECTOR PIN CONFIGURATION (CN1)
Pin Symbol Description Notes
1 Test Loop Dell’s Test loop to 34pin 2 VCC LCD Logic and driver power (3.3V Typ.) 3 VCC LCD Logic and driver power (3.3V Typ.) 4 V EEDID DDC Power (3.3V) 5 Bist LCD Panel Self Test Enable 6 Clk EEDID DDC Clock 7 DATA EEDID DDC Data 8 ORX0- Negative LVDS differential data input
9 ORX0+ Positive LVDS differential data input 10 GND LCM Ground 11 ORX1- Negative LVDS differential data input 12 ORX1+ Positive LVDS differential data input 13 GND LCM Ground 14 ORX2- Negative LVDS differential data input 15 ORX2+ Positive LVDS differential data input 16 GND LCM Ground 17 ORXC- Negative LVDS differential clock input 18 ORXC+ Positive LVDS differential clock input 19 GND LCM Ground 20 21 22 GND LCM Ground 23 24 25 GND LCM Ground 26 27 28 GND LCM Ground 29 30 31 32 33 34 35 36 37 DBC_EN Dynamic Backlight Control Enable 38 39 40
NC NC
NC NC
NC NC
NC
NC GND GND GND
Test Loop
PWM System PWM Signal input for dimming
LED_EN
VLED LED Backlight Power (7V-21V) VLED LED Backlight Power (7V-21V) VLED LED Backlight Power (7V-21V)
No Connection No Connection
No Connection No Connection
No Connection No Connection
No Connection No Connection LCM Ground (LED Backlight Ground) LCM Ground (LED Backlight Ground) LCM Ground (LED Backlight Ground)
Dell’s Test loop to 1pin
LED Backlight On/Off
[Interface Chip]
1. LCD : SiW, SW0663 (LCD Controller) Including LVDS Receiver.
2. System : Pin to Pin compatible with LVDS
[Connector] Hirose KN38-40S-0.5H UJU IS050-L40B-C10 or equivalent
[Mating Connector]
20453-#40E-## series or equivalent
[Connector pin arrangement]
40
[LCD Module Rear View]
1
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Product Specification
3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
LP133WH2
Liquid Crystal Display
LVDS -
LVDS +
0V
|VID|
# |VID| = |(LVDS+) – (LVDS-)| # VCM = {(LVDS+) + (LVDS-)}/2
V
CM
V
IN_MAXVIN_MIN
VDD=1.8V
Description Symbol Min Typ Max Unit Notes LVDS Differential Voltage |VID| 100 - 600 mV ­LVDS Common mode Voltage V LVDS Input Voltage Range V
CM
IN
|VID| /2 1.2 VDD- |VID|/2 V -
0.3 - VDD V -
3-3-2. AC Specification
T
clk
LVDS Clock
LVDS Data
t
= 1/T
SKEW (Fclk
1) 85MHz > Fclk 65MHz : -400 ~ +400
t
SKEW
2) 65MHz > Fclk 25MHz : -600 ~ +600
Description Symbol Min Max Unit Notes
t
SKEW
LVDS Clock to Data Skew Margin
t
SKEW
LVDS Clock to Clock Skew Margin (Even to Odd)
Maximum deviation of input clock frequency during SSC
Maximum modulation frequency of input clock during SSC
Ver. 1.0 Mar. 16, 2012
t
SKEW_EO
F
DEV
F
MOD
)
clk
- 400 + 400 ps
- 600 + 600 ps
- 1/7 + 1/7 T
-
± 3
clk
% -
- 200 KHz -
85MHz > Fclk ≥
65MHz
65MHz > Fclk ≥
25MHz
-
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t
SKEW_EO
LP133WH2
Liquid Crystal Display
Product Specification
LVDS Odd Clock
LVDS Even Clock
LVDS Even Data
Freq.
F
max
F
center
F
min
T
clk
T
clk
< Clock skew margin between channel >
1
F
MOD
< Spread Spectrum >
F
center
* F
Time
DEV
3-3-3. Data Format
1) LVDS 1 Port
RCLK+
RA+/-
RB+/-
RC+/-
RD+/-
R 3 R 2
G 4 G 3
B 5 B 4
G 7 G 6
R 1 R 0
G 2 G 1
B 3 B 2
R 7 R 6
Previous ( N - 1 ) th Cycle Next ( N + 1 ) th Cycle
Ver. 1.0 Mar. 16, 2012
G 0 R 5 R 4 R 3 R 2 R 1 R 0
B 1 B 0 G 5 G 4 G 3 G 2 G 1
DE VSYNC HSYNC B 5 B 4 B 3 B 2
X B 7 B 6 G 7 G 6 R 7 R 6
< LVDS Data Format >
Current ( Nth ) Cycle
G 0
R 5 R 4
B 1
B 0 G 5
DE
VSYNC HSYNC
X
B 7 B 6
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