LG LP-101WX1-SLN1 Service manual

( ) Preliminary Specification
( ) Final Specification
LP101WX1
Liquid Crystal Display
Product Specification
SPECIFICATION
FOR
APPROVAL
Customer Toshiba
MODEL
www.jxlcd.com
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APPROVED BY SIGNATURE
/
/
/
SUPPLIER LG Display Co., Ltd.
*MODEL LP101WX1
Suffix SLN1
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
S. W. Paeng / Manager
REVIEWED BY
P. A. Choi / Manager
PREPARED BY
K. C. Choi / Engineer
SIGNATURE
Please return 1 copy for your confirmation with your signature and comments.
Ver. 1.2 May. 18, 2011
Products Engineering Dept.
LG Display Co., Ltd
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Product Specification
Contents
LP101WX1
Liquid Crystal Display
No ITEM
COVER
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTREISTICS
3-2 INTERFACE CONNECTION
3-3 LVDS SIGNAL TIMING SPECIFICATIONS
3-4 SIGNAL TIMING SPECIFICATIONS
3-5 SIGNAL TIMING WAVEFORMS
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3-6 COLOR INPUT DATA REFERNECE
3-7 POWER SEQUENCE
4 OPTICAL SFECIFICATIONS
Page
1
2
3
4
5
6
7
8
10
10
11
12
13
5 MECHANICAL CHARACTERISTICS
6 RELIABLITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
8 PACKING
8-1 DESIGNATION OF LOT MARK
8-2 PACKING FORM
9 PRECAUTIONS
A APPENDIX. Enhanced Extended Display Identification Data
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20
21
21
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Product Specification
RECORD OF REVISIONS
LP101WX1
Liquid Crystal Display
Revision No Revision Date Page Description
0.0 Nov. 25 2010 All First Draft (Preliminary Specification) -
0.1 Jan. 14 2011 25~27 EDID update -
Jan. 14 2011 11 Timing update -
0.2 Feb.09 2011 18~19 Drawing update(Hole dimension adding) -
22 Lot Mark update(Year change), Packing Form update -
Power Consumption update
4,6
0.3 Mar. 27 2011 4,6
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- 11 Dclk Spec update(Dclk(Max.) : 74.5Mhz77.0Mhz) -
25~27
Total 3.3 W(Typ.)(Logic:0.9 W (@ Mosaic), B/L:2.4W (Typ.)) Total 3.73W(Typ.)(Logic :1.16 W (@ White), B/L : 2.57W (max.))
Logic Power Consumption update (1.16W max. White Pattern1.15W max @White Pattern)
4 Pixel Pitch change -
14 R,G, B Color Coordinates Spec update -
15 Gray Scale Spec update. -
EDID update
-P 26 : Timing descriptor #1 Pixel clock 69.3MHz 75MHz (WWAN)
-P27 : Check Sum change ( 90 12)
EDID
ver
-
-
-Final CAS-May. 11. 20111.0
-
Dclk Spec update(Dclk(Max.) : 74.5Mhz77.0Mhz)11
EDID update
25~27
1.1 May. 17. 2011 - Final CAS -
Ver. 1.2 May. 18, 2011
-P 26 : Timing descriptor #1 Pixel clock 69.3MHz 75MHz (WWAN)
-P27 : Check Sum change ( 90 12)
14 Viewing Angle typ is added. ( 85) -
18 Mechanical Drawing update ( Polarizer Dimension )
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-Viewing Angle typ update ( 85 89)14May. 18.20111.2
-
LP101WX1
Liquid Crystal Display
Product Specification
1. General Description
The LP101WX1 is a Color Active Matrix Liquid Crystal Display with an integral LED backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally white mode. This TFT-LCD has 10.1inches diagonally measured active display area with HD resolution(1280 horizontal by 800 vertical pixel array). Each pixel is divided into Red, Green and Blue sub­pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 6-bit gray scale signal for each dot, thus, presenting a palette of more than 262,144 colors.
The LP101WX1 has been designed to apply the interface method that enables low power, high speed, low EMI.
The LP101WX1 is intended to support applications where thin thickness, low power are critical factors and graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the LP101WX1 characteristics provide an excellent flat display for office automation products such as Notebook PC.
EDID
CN
1
User connector
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40
Pin
General Features
Active Screen Size 10.1 inches diagonal
Outline Dimension 229.46(H) × 149.2(V)x5.2(D,Max.) [mm]
Pixel Pitch 0.1695mm × 0.1695 mm
Pixel Format 1280 horiz. By 800 vert. Pixels RGB strip arrangement
Color Depth 6-bit, 262,144 colors
Luminance, White 400 cd/m2(Typ.5 point)
Power Consumption Total 3.72 W(Typ.) (Logic :1.15 W (max.@ White), B/L : 2.57W (max.@ VLED 12V ))
Weight 160g (Max.)
Display Operating Mode Transmissive mode, normally Black
Surface Treatment Glare treatment of the front polarizer
RoHS Compliance Yes
BFR / PVC / As Free Yes for all
Control & Data Power EDID signal & Power
BLOCK
POWER
BLOCK
LVDS &
Timing
Control
Block
LED Driver
LED Driver
Block
Block
TFT-LCD Panel
(1280 x 800)
1
Source Driver Circuit
LED Backlight Ass’y
1280
1
COG(Chip On Glass)
800
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LP101WX1
Liquid Crystal Display
Product Specification
2. Absolute Maximum Ratings
The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol
Power Input Voltage
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
Note : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39°C Max, and no condensation of water.
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Wet Bulb Temperature [℃℃℃]
20
10
0
VCC -0.3 4.0 Vdc at 25 ± 5°C
TOP 0 50 °C 1
HST -20 60 °C 1
HOP 10 90 %RH 1
HST 10 90 %RH 1
50
40
30
Values
Min Max
90% 80%
60
Units Notes
60%
Humidity[(%)RH]
Storage
40%
Operation
20%
10%
-20
Ver. 1.2 May. 18, 2011
10
20 30 40 50
Dry Bulb Temperature [℃℃℃]
60 70 800
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LP101WX1
Liquid Crystal Display
Product Specification
3. Electrical Specifications
3-1. Electrical Characteristics
The LP101WX1 requires two power inputs. One is employed to power the LCD electronics and to drive the
TFT array and liquid crystal. The second input which powers the LED BL.
Table 2. ELECTRICAL CHARACTERISTICS
Parameter Symbol
Min Typ Max
LOGIC :
Power Supply Input Voltage VCC 3.0 3.3 3.6 V 1
Power Supply Input Current White ICC - 303 348 mA 2
Power Consumption PCC - 1.0 1.15 W 2
Power Supply Inrush Current ICC_P - 1500 mA 3
Values
Unit Notes
LVDS Impedance ZLVDS 90 100 110
BACKLIGHT : ( with LED Driver)
LED Power Input Voltage VLED 7.0 12.0 21.0 V 5
LED Power Input Current ILED - 200 214 mA 6
LED Power Consumption PLED - 2.4 2.57 W 6
LED Power Inrush Current ILED_P - 2000 mA 7
PWM Duty Ratio 1 - 100 % 8
PWM Jitter - 0 - 0.2 % 9
PWM Impedance ZPWM 20 40 60 kΩ
PWM Frequency FPWM 200 - 1000 Hz
PWM High Level Voltage V
PWM Low Level Voltage V
LED_EN Impedance ZPWM 20 40 60 kΩ
LED_EN High Voltage
LED_EN Low Voltage
Life Time 12,000 - - Hrs 10
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PWM_H
PWM_L
VLED_EN
_H
VLED_EN
_L
2.2 - 5.3 V
0 - 0.3 V
2.2 - 5.3 V
0 - 0.3 V
Ω
4
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Liquid Crystal Display
Product Specification
Note)
1. The measuring position is the connector of LCM and the test conditions are under 25, fv = 60Hz,
Black pattern.
2. The specified Icc current and power consumption are under
the Vcc = 3.3V , 25, fv = 60Hz condition and White pattern.
3. The below figures are the measuring Vcc condition and the Vcc control block LGD used. The Vcc condition is same as the minimum of T1 at Power on sequence.
LP101WX1
Rising time Vcc
0V
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4. This impedance value is needed for proper display and measured form LVDS Tx to the mating connector.
5. The measuring position is the connector of LCM and the test conditions are under 25.
6. The current and power consumption with LED Driver are under the Vled = 12.0V , 25, Dimming of
Max luminance and White pattern with the normal frame frequency operated(60Hz).
7. The below figures are the measuring Vled condition and the Vled control block LGD used. VLED control block is same with Vcc control block.
90%
10%
0.5ms
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3.3V
Rising time VLED
0V
10%
12.0V
90%
0.5ms
8. The operation of LED Driver below minimum dimming ratio may cause flickering or reliability issue.
9. This Spec. is not effective at 100% dimming ratio as an exception because it has DC level equivalent
to 0Hz. In spite of acceptable range as defined, the PWM Frequency should be fixed and stable for
more consistent brightness control at any specific level desired.
10. The life time is determined as the time at which brightness of LCD is 50% compare to that of minimum
value specified in table 7. under general user condition.
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LP101WX1
Liquid Crystal Display
Product Specification
3-2. Interface Connections
This LCD employs two interface connections, a 40 pin connector used for the module electronics interface and the other connector used for the integral backlight system.
Pin Symbol Description Notes
1 NC No Connection
2 VCC LCD Logic and driver power (3.3V Typ.)
3 VCC LCD Logic and driver power (3.3V Typ.)
4 V EEDID DDC Power (3.3V)
5 NC No Connection
6 Clk EEDID DDC Clock
7 DATA EEDID DDC Data
8 ORX0- Negative LVDS differential data input
9 ORX0+ Positive LVDS differential data input
10 GND High Speed Ground
11 ORX1- Negative LVDS differential data input
12 ORX1+ Positive LVDS differential data input
13 GND High Speed Ground
14 ORX2- Negative LVDS differential data input
15 ORX2+ Positive LVDS differential data input
16 GND High Speed Ground
17 ORXC- Negative LVDS differential clock input
18 ORXC+ Positive LVDS differential clock input
19 GND High Speed Ground
20
21
22 GND High Speed Ground
23
24
25 GND High Speed Ground
26
27
28 GND High Speed Ground
29
30
31
32
33
34
35
36
37
38
39
40
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NC
NC
NC
NC
NC
NC
NC
NC
GND LED Backlight Ground
GND LED Backlight Ground
GND LED Backlight Ground
NC
PWM System PWM Signal input for dimming
LED_EN
NC
VLED LED Backlight Power (7V-21V)
VLED LED Backlight Power (7V-21V)
VLED LED Backlight Power (7V-21V)
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
LED Backlight On/Off No Connection
[Interface Chip]
1. LCD : SiW, SW0624(LCD Controller) Including LVDS Receiver.
2. System :
* Pin to Pin compatible with LVDS
[Connector]
UJU IS050-L40B-C10 LSMtron GT05Q-40S-H10 or equivalent
[Mating Connector]
20345-#40E-## series or equivalent
[Connector pin arrangement]
40
[LCD Module Rear View]
1
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Product Specification
3-3. LVDS Signal Timing Specifications
3-3-1. DC Specification
LP101WX1
Liquid Crystal Display
Description
LVDS Differential Voltage |VID| 100 600 mV -
LVDS Common mode Voltage V
LVDS Input Voltage Range V
3-3-2. AC Specification
LVDS Clock to Data Skew Margin
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Description Symbol Min Max Unit Notes
Symb
ol
CM
IN
t
SKEW
t
SKEW
Min Max Unit Notes
0.6 1.8 V -
0.3 2.1 V -
- 400 + 400 ps
- 600 + 600 ps
85MHz > Fclk
65MHz > Fclk
65MHz
25MHz
LVDS Clock to Clock Skew Margin (Even to Odd)
Maximum deviation of input clock frequency during SSC
Maximum modulation frequency of input clock during SSC
Ver. 1.2 May. 18, 2011
t
SKEW_EO
F
DEV
F
MOD
- 1/7 + 1/7 T
- ± 3 % -
- 200 KHz -
clk
-
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