This manual provides information necessary to repair, description and download the
features of this model.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part(for
example ,persons other than your company’s employees, agents, subcontractors, or person
working on your company’s behalf) can result in substantial additional charges for your
telecommunications services.
system users are responsible for the security of own system. There are may be risks of toll
fraud associated with your telecommunications system. System users are responsible for
programming and configuring the equipment to prevent unauthorized use .The manufacturer
dose not warrant that this product is immune from the above case but will prevent
unauthorized use of common-carrier telecommunications service of facilities accessed through
or connected to it.
The manufacturer will not be responsible for any charges that result from such unauthorized
use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and
possibly causing harm or interruption in service to the telephone network, it should disconnect
telephone service until repair can be done. A telephone company may temporarily disconnect
service as long as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure.
If these changes could reasonably be expected to affect the use of the this phone or
compatibility with the network, the telephone company is required to give advanced written
notice to the user, allowing the user to take appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on this model must be performed only by the manufacturer or its
authorized agent . The user may not make any changes and/or repairs expect as specifically
noted in this manual.
Therefore, note that authorized alternations or repair may affect the regulatory status of the
system and may void any remaining warranty.
E. Notice of Radiated Emissions
This model complies with rules regarding radiation and radio frequency emission as defined
by local regulatory agencies. In accordance with these agencies, you may be required to
provide information such as the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look
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slightly different.
G. Interference and Attenuation
Phone may interfere with sensitive laboratory equipment, medical equipment, etc.
Interference from unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Devices(ESD),are indicated by the
sign .
Following information is ESD handing:
. Service personnel should ground themselves by using a wrist strap when exchange system
boards.
. When repairs are made to a system board , they should spread the floor with anti-static mat
which is also grounded .
. Use a suitable, grounded soldering iron .
. Keep sensitive parts in these protective packages until these are used.
. When returning system boards or parts like EEPROM to the factory, use the protective
packages as described.
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2. PERFORMANCE
2.1 H/W Features
Solution
Type Bar type
Antenna Type Internal (Quad-Band) 850/900/1800/1900-
Main Display 2.0” 176x220 QCIF LGIT
GPRS Class 10
MMS Yes, 1.1
Camera 1.3M FF Abico
Flash Light Yes, / no Torch Definition check ??
Battery 1500mAh Li-ion inner pack Wisepower
Audio player Yes MP3/AAC/WAV
MT6235B
Media Tek
Benchmark (??)
FM Receiver Yes , US/Europe band support
MPEG4/H.263 Yes (support 3GP)
H.264 No(no support)
AAC Yes
AAC+
WMA
FM alarm
Scheduled FM recording
MP4 for incoming call/ power on off
animation and screen saver
Loud Speaker Yes
Audio player--real resuming Yes, for MP3 only
Video recording Yes
Memory Size
Internal NAND
Memory Card Micro SD
Yes
Yes(TBD) LGE will take care of
Yes
Yes
Yes
1G + 256Mb NAND Boot
Yes (Maximum is 80MB for
(87.5~108MHz) --reserve embedded FM
antenna contact pin on
PCB
Microsoft License if
needed
user memory )
Up to 8GB
Bluetooth Yes, version 2.0 W/O EDR.
USB
WAP Yes, 2.0
Java Yes
SIM Status LED
MPEG4 caller ID Yes TBD
OTA Yes TBD
In flight mode Yes TBD
Yes, USB 2.0 full speed
YES, Green 1pcs, Red 1pcs (TBD) TBD by UI Scenario
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2.2 S/W Features
2-2-1 System Specification
Item Target Specification
Form Factor Bar Type
Size TBD
Weight TBD
Battery 3.7V, 1500mAh Li-Ion
Talk Time
Standby Time
Antenna Embedded type
LCD 2.0” 176x220 QCIF
FM Yes,
Camera 1.3M pixel FF
Back Light White LED
Keypad Backlight Color
Vibrator Yes
Loud Speaker
Microphone Yes
Earphone Jack No
SIM Socket Yes, 1.8/3.0V
Volume Key Side key (up/down)
Basic Accessory
4 hrs 52 min (292 min) @1500mAh @GSM900 PCL 10
400 min @1500mAh @GSM900 PCL 10
428 hrs@1500mAh @ Paging period 9;
500hrs@1500mAh @ Paging period 9
Landscape mode by default setting
Blue TBD, White(confirm)
Yes, 17
Travel Adaptor
Standard Battery (1500mA, Li-Ion)
Stereo Headset with button (FM)
USB Data Cable (Option)
Caller Group-5 caller group- Friends, Family, VIP, Business, Others (6 fields –
Name, Ring, Picture, LED pattern, Video, Member list)
Own Numbers: User can change the own numbers of handset. (Sets of own
numbers depends on SIM)
vCard: (Edit, Send and Receive. 7 fields – Name, Mobile, Home, Company
Name, Email Address, Office Number, Fax Number)
Note: This phone doesn’t support phone number search.
SMS
Standard SMS
SMS Reply Path
SMS Delivery Report
Valid period (1 hour/12 hours/1 day/1 week/Maximum)
Message Type (Text, Fax, Page, Email) Message Indication Type refer to GSM
03.40
Basic text-only SMS as described in 3GPP TS 23.040 R5
Notice: This phone doesn’t support video ring tone via SMS
SMS Character Sets Support
GSM7
UCS-2
EMS
EMS Standard as described in 3GPP TS 23.040 R5 excluding WVG
EMS Text Format
Text Style: Normal, Bold, Italic, Underlined, Strikethrough
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Text Alignment: Left, Right, Center
Text Size: Normal, Large, Small
EMS Image Support
1-bit small image 16x16 pixels black and white
1-bit large image 32x32 pixels black and white
1-bit variable image in single SMS packet
Extended black and white 1-bit image up to 255x255 pixels
Extended 6-bit image up to 255x255
Pre-defined animation
User-defined small animation 8x8 pixel 4-frame black and white
User-defined large animation 16x16 pixel 4-frame black and white
Pre-defined sound
User-defined i-Melody up to 128 bytes
LZSS compression algorithm
Re-use extended object
Object Distribution
User Prompt Indicator
Hyperlink format element
Extended Object Distribution
Notice: This mobile doesn’t support Nokia smart message format (including
WBMP), only support *.ems format" subject to Nokia smart message license
EMS Character Sets Support
GSM7
UCS-2
EMS Miscellaneous
SMS Concatenation ( 8 Segments for MT/MO)
SMS Compression
MMS
MMS Standard as described in 3GPP TS 23.140 V4.8.0
Extract media from Message
Insert Media into message
OTA provisioning partially support (Network Profile setting
Auto download mode
Manual download mode
Operator can pre-configure the delivery mode
MMS notification with icon or Pop-up message display)
MMS Message Format
MMS SMIL (A subset of SMIL descried in the MMS Conformance Document 1.2)
- maximal size for each MMS is limited by300KB
MMS Character Sets Support
US-ASCII
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imum
Unicode
ISO-8859-1
UTF-16
UTF-8
MMS Images Support
WBMP Wireless bitmap
GIF87
GIF89a
JPEG
MMS Sound Formats Support
WAV
AMR
MIDI
MP3
i-Melody
MMS Miscellaneous
Multipart binary MIME
Storage
Separated Inbox folder for SMS and MMS
Separated Outbox folder for SMS and MMS
Total 300 SMS in the storage of phone plus SIM including Inbox and Outbox
( Phone could supports 260sets SMS including Inbox and Outbox. The max
SMS stored in SIM are 40sets. It means the actual SMS quantities in Inbox and
Outbox are among 260 to 300. )[p1]
Total 100 MMS in the phone storage including Inbox, draft and Outbox
Notice: Total MMS count need depends on user memory space.
Common Operation
Write Message
Read Message
Edit Message
(For MMS, Edit only conformance messages, unknown media not supported,
unknown SMIL not supported)
Reply Message
Send Message
Delete Message
Forward Message
Use Sender's Number
Message Templates
Extract media from Message (MMS/EMS)
Store Media (MMS/EMS)
Delete Media (MMS/EMS)
Cell Broadcast Read Cell Broadcast
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Network
SIM
Cell Broadcast Mode: Receive On/Off
Cell Broadcast Message Language
Channel Setting
Automatic Network Selection
Manual Network Selection
Network Service Status
Preferred Network (User definition)
GPRS connection mode selection: Always, When Needed
Common Operation
SIM Application Toolkit (Release 98 Class 2 certified)
Only Public WTA support, supported functions listing below * Make a telephone call
* Send a string of DTMF tones over an established voice connection
* Add an entry to the telephone book of the device
MT6235 is a highly-integrated and extremely powerful single-chip solution for
GSM/GPRS/EDGE mobile phones.
Based on the 32-bit ARM926EJ-STM RISC processor, MT6235’s superb processing power,
along with high bandwidth architecture and dedicated hardware support, provides an
unprecedented platform for high performance GPRS/EDGE Class 12 MODEM application.
Overall, MT6235 presents a revolutionary platform for mobile
devices.
.
Platform
MT6235 is capable of running the ARM926EJ-STM RISC processor at up to 208 MHz, thus
providing fast data processing capabilities. In addition to the high clock frequency, separate
CODE and DATA caches are also included to further improve the overall system efficiency.
For large amounts of data transfer, high performance DMA (Direct Memory Access) with
hardware flow control is implemented, which greatly enhances the data movement speed while
reducing MCU processing load.
Targeted as a high performance platform for mobile applications, hardware flash content
protection is also provided to prevent unauthorized porting of the software load to protect the
manufacturer’s development investment.
Memory
To provide the greatest capacity for expansion and maximum bandwidth for data intensive
applications such as multimedia features, MT6235 supports up to 4 external state-of-the-art
devices through its 8/16-bit host interface.High performance devices such as Mobile SDRAM and
Cellular RAM are supported for maximum bandwidth.Traditional devices such as burst/page
mode flash, page mode SRAM, and Pseudo SRAM are also supported. For greatest compatibility,
the memory interface can also be used to connect to legacy devices such as Color/Parallel LCD,
and multi-media companion chips are all supported through this interface. To minimize power
consumption and ensure low noise, this interface is designed for flexible
I/O voltage and allows lowering of the supply voltage down to 1.8V. The driving strength is
configurable for signal integrity adjustment.
Multi-media
The MT6235 multi-media subsystem provides a connection to a CMOS image sensor and
supports a resolution up to 2.0 Mpixels. With its high performance application platform, MT6235
allows efficient processing of image and video data.
In addition to image and video features, MT6235 utilizes high resolution DAC, digital audio, and
audio synthesis technology to provide superior audio features for all future multi-media needs.
Connectivity and Storage
To take advantage of its incredible multimedia strengths, MT6235 incorporates myriads of
advanced connectivity and storage options for data storage and communication. MT6235
supports UART, Fast IrDA, USB 2.0, SDIO,Bluetooth, Touch Screen Controller, WIFI Interface,
and MMC/SD/MS/MS Pro storage systems. These interfaces provide MT6235 users with the
highest degree of flexibility in implementing solutions suitable for the targeted application.
To achieve a complete user interface, MT6235 also brings together all the necessary
peripheral blocks for a multi-media GSM/GPRS/EDGE phone. The peripheral blocks include the
Keypad Scanner with the capability to detect multiple key presses, SIM Controller, Alerter, Real
Time Clock, PWM, Serial LCD Controller, and General Purpose Programmable I/Os.
Furthermore, to provide much better configurability and bandwidth for multi-media products, an
additional 18-bit parallel interface is incorporated. This interface enables connection to LCD
panels as well as NAND flash devices for additional multi-media data storage.
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Audio
Using a highly integrated mixed-signal Audio Front-End, the MT6235 architecture allows for
easy audio interfacing with direct connection to the audio transducers. The audio interface
integrates D/A and A/D Converters for Voice band, as well as high resolution Stereo D/A
Converters for Audio band. In addition, MT6235 also provides Stereo Input and Analog MUX.
MT6235 supports AMR codec to adaptively optimize speech and audio quality. Moreover,
HE-AAC codec is implemented to deliver CD-quality audio at low bit rates.
On the whole, MT6235’s audio features provide a rich solution for multi-media applications.
Radio
MT6235 integrates a mixed-signal baseband front-end in order to provide a well-organized
radio interface with flexibility for efficient customization. The front-end contains gain and offset
calibration mechanisms, and filters with programmable coefficients for comprehensive
compatibility control on RF modules. This approach allows the usage of a high resolution D/A
Converter for controlling VCXO or crystal, reducing the need for an expensive TCVCXO. MT6235
achieves great MODEM performance by utilizing a 14-bit high resolution A/D
Converter in the RF downlink path. Furthermore, to reduce the need for extra external
current-driving component, the driving strength of some BPI outputs is designed to be
configurable.
Debug Function
The JTAG interface enables in-circuit debugging of the software program with the
ARM926EJ-S core. With this standardized debugging interface, MT6235 provides
developers with a wide set of options in choosing ARM development kits from different third party
vendors.
Power Management
The MT6235 offers various low-power features to help reduce system power consumption.
These features include a Pause Mode of 32 KHz clocking in Standby State, Power Down Mode
for individual peripherals, and Processor Sleep Mode. MT6235 is also fabricated in an advanced
low leakage CMOS process, hence providing an overall ultra low leakage solution.
Package
The MT6235 device is offered in a 13mm×13mm, 362-ball,
0.5 mm pitch, TFBGA package.
3.1.2 Platform Features
General
Integrated voice-band, audio-band and base-band analog front ends TFBGA 13mm×13mm, 362-ball, 0.5 mm pitch package
MCU Subsystem
ARM926EJ-S 32-bit RISC processor High performance multi-layer AMBA bus Java hardware acceleration for fast Java-based games and applets Operating frequency: 26/52/104/208 MHz Dedicated DMA bus 14 DMA channels 512K bits on-chip SRAM 384K bits Instruction-TCM 640K bits Data-TCM
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128K bits Instruction-Cache 128K bits Data-Cache On-chip boot ROM for Factory Flash Programming Watchdog timer for system crash recovery3 sets of General Purpose Timer Circuit Switch Data coprocessor Division coprocessor PPP Framer coprocessor
External Memory Interface
Supports up to 4 external memory devices Supports 8-bit or 16-bit memory components with maximum size of up to 128M Bytes each Supports Mobile SDRAM and Cellular RAM Supports Flash and SRAM/PSRAM with page mode or burst mode Industry standard Parallel LCD interface Supports multi-media companion chips with 8/16 bits data width Flexible I/O voltage of 1.8V ~ 2.8V for memory interface Configurable driving strength for memory interface
User Interfaces
8-row × 8-column keypad controller with hardware scanner Supports multiple key presses for gaming SIM/USIM controller with hardware T=0/T=1 protocol control Real Time Clock (RTC) operating with a separate power supply General Purpose I/Os (GPIOs) 4 sets of Pulse Width Modulation (PWM) output Alerter output with Enhanced PWM or PDM 8 external interrupt lines
Security
Supports security key and 126 bit chip unique ID
Connectivity
3 UARTs with hardware flow control and speeds up to 921600 bps
IrDA modulator/demodulator with hardware framer. Supports SIR/MIR/FIR operating speeds.
USB 2.0 capability Multi Media Card, Secure Digital Memory Card, Memory Stick, Memory Stick Pro host
controller with flexible I/O voltage power
Supports SDIO interface for SDIO peripherals as well as WIFI connectivity DAI/PCM and I2S interface for Audio application
Power Management
Power Down Mode for analog and digital circuits Processor Sleep Mode Pause Mode of 32 KHz clocking in Standby State 4-channel Auxiliary 10-bit A/D Converter for charger and battery monitoring and photo sensing
Test and Debug
Built-in digital and analog loop back modes for both Audio and Baseband Front-End DAI port complying with GSM Rec.11.10 JTAG port for debugging embedded MCU
3.1.3 MODEM Features
Radio Interface and Baseband Front End
GMSK modulator with analog I and Q channel outputs
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10-bit D/A Converter for uplink baseband I and Q signals 14-bit high resolution A/D Converter for downlink baseband I and Q signals
Calibration mechanism of offset and gain mismatch for baseband A/D Converter and D/A
Converter
10-bit D/A Converter for Automatic Power Control 13-bit high resolution D/A Converter for Automatic Frequency Control Programmable Radio RX filter 2 channels Baseband Serial Interface (BSI) with 3-wire control Bi-directional BSI interface. RF chip register read access with 3-wire or 4-wire interface. 10-Pin Baseband Parallel Interface (BPI) with programmable driving strengthMulti-band support
Voice and Modem CODEC
Dial tone generation Voice memo Noise reduction Echo suppression Advanced sidetone Oscillation Reduction Digital sidetone generator with programmable gain Two programmable acoustic compensation filters GSM/GPRS quad vocoders for adaptive multirate (AMR), enhanced full rate (EFR), full rate
(FR) and half rate (HR)
GSM channel coding, equalization and A5/1, A5/2 and A5/3 ciphering GPRS GEA1, GEA2 and GEA3 ciphering Programmable GSM/GPRS/EDGE modem Packet Switched Data with CS1/CS2/CS3/CS4 coding schemes GSM Circuit Switch Data GPRS/EDGE Class 12
Voice Interface and Voice Front End
Two microphone inputs sharing one low noise amplifier with programmable gain and automatic
gain control (AGC) mechanisms
Voice power amplifier with programmable gain 2nd order Sigma-Delta A/D Converter for voice uplink path D/A Converter for voice downlink path Supports half-duplex hands-free operation Compliant with GSM 03.50
8-/9-/16-/18-bit Parallel interface, and Serial interface for LCM
Built-in NAND Flash Controller with 1-bit ECC for mass storage
LCD Controller
Supports simultaneous connection to up to 3 parallel LCD and 2 serial LCD modules Supports LCM format: RGB332, RGB444, RGB565, RGB666, RGB888 Supports LCD module with maximum resolution up to 800x600 at 24bpp Per pixel alpha channel True color engine Supports hardware display rotation
Capable of combining display memories with up to 6 blending layers
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Image Signal Processor
8 bit YUV format image input Capable of processing image of size up to 2.0 M pixels IEEE Std 1180-1990 IDCT standards compliance
Supports progressive image processing to minimize storage space requirement Supports reload-able DMA for VLD stream
Image Data Processing
Supports Digital Zoom Supports RGB888/565, YUV444 image processing High throughput hardware scaler. Capable of tailoring an image to an arbitrary size. Horizontal scaling in averaging method Vertical scaling in bilinear method YUV and RGB color space conversion Boundary padding
2D Accelerator
Supports 32-bpp ARGB8888, 24-bpp RGB888, 16-bpp RGB565, and 8-bpp index color modes Supports SVG Tiny Rectangle gradient fill BitBlt: multi-BitBlt with 7 rotation, 16 binary ROP Alpha blending with 7 rotation Line drawing: normal line, dotted line, anti-aliasing Circle drawing Bezier curve drawing Triangle flat fill Font caching: normal font, italic font Command queue with max depth of 2047
Audio CODEC
Supports HE-AAC codec decode Supports AAC codec decode Wavetable synthesis with up to 64 tones Advanced wavetable synthesizer capable of generating simulated stereo Wavetable including GM full set of 128 instruments and 47 sets of percussions PCM Playback and Record Digital Audio Playback
Audio Interface and Audio Front End
Supports I2S interface High resolution D/A Converters for Stereo Audio Stereo analog input for stereo audio source Analog multiplexer for stereo audio Stereo to mono conversion
3.1.5 General Description
Figure 3-1-2 depicts the block diagram of MT6235. Based on a dual-processor architecture,
MT6235 integrates both an ARM926EJ-S core and a digital signal processor core. ARM926EJ-S
is the main processor responsible for running high-level GSM/GPRS protocol software as well as
multi-media applications. The digital signal processor manages the
low-level MODEM as well as advanced audio functions. Except for a few mixed-signal circuitries,
the other building blocks in MT6235 are connected to either the microcontroller or the digital
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signal processor.
MT6235consists of the following subsystems:
Microcontroller Unit (MCU) Subsystem: includes an ARM926EJ-S RISC processor and its
accompanying memory management and interrupt handling logics;
Digital Signal Processor (DSP) Subsystem: includes a DSP and its accompanying memory,
memory controller, and interrupt controller;
MCU/DSP Interface: the junction at which the MCU and the DSP exchange hardware and
software information;
Microcontroller Peripherals: includes all user interface modules and RF control interface
modules;
Microcontroller Coprocessors: runs computing-intensive processes in place of the
Microcontroller;
DSP Peripherals: hardware accelerators for GSM/GPRS/EDGE channel codec; Multi-media Subsystem: integrates several advanced accelerators to support multi-media
applications;
Voice Front End: the data path for converting analog speech to and from digital speech; Audio Front End: the data path for converting stereo audio from an audio source; Baseband Front End: the data path for converting a digital signal to and from an analog signal
from the RF modules;
Timing Generator: generates the control signals related to the TDMA frame timing; and, Power, Reset and Clock Subsystem: manages the power, reset, and clock distribution inside
MT6235.
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Figure.3-1-2 MT6235 BLOCK DIAGRAM
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3.2 Power Amplifier Module (SKY77531)
Figure.3-2-1 SKY77531 FUNCTIONAL BLOCK DIAGRAM
The SKY77531 is a transmit and receive front-end module (FEM) with Integrated Power Amplifier
Control (iPAC.) for quad-band cellular handsets comprising GSM850/900 and DCS1800/PCS1900
operation. Designed in a low profile, compact form factor, the SKY77531 offers a complete Transmit
VCO-to-Antenna and Antenna-to-Receive SAW filter solution. The FEM also supports Class 12 General
Packet Radio Service (GPRS) multi-slot operation.
The module consists of a GSM850/900 PA block and a DCS1800/PCS1900 PA block,
impedancematching circuitry for 50 Ω input and output impedances, Tx harmonics filtering, high linearity
and a low insertion loss PHEMT RF switch, and a Power Amplifier Control (PAC) block with internal
current sense resistor. A custom BiCMOS integrated circuit provides the internal PAC function and
decoder circuitry to control the RF switches. The two Heterojunction Bipolar Transistor (HBT) PA blocks
are fabricated onto a single Gallium Arsenide (GaAs) die. One PA block supports the GSM850/900 bands
and the other PA block supports the DCS1800/PCS1900 bands. Both PA blocks share common power
supply pads to distribute current. The output of each PA block and the outputs to the four receive pads are
connected to the antenna pad through a PHEMT RF switch. The GaAs die, PHEMT die, Silicon (Si) die
and passive components are mounted on a multi-layer laminate substrate. The assembly is encapsulated
with plastic overmold.
Band selection and control of transmit and receive are performed using four external control pads. Refer
to the block diagram in Figure 1 below. The band select pads, BS1 and BS2, select GSM850, GSM900,
DCS, and PCS modes of operation. Transmit enable Tx_EN controls receive or transmit
mode of the RF switch (Tx = logic 1). Proper timing between transmit enable Tx_EN and Analog
Power Control VRAMP allows for high isolation between the antenna and Tx–VCO while the VCO is
being tuned prior to the transmit burst.
The SKY77531 is compatible with logic levels from 1.2 V to VCC for BS1, BS2, and Tx_EN pads,
depending on the level applied to the VLOGIC pad. This feature provides additional flexibility for the
designer in the selection of FEM interface control logic.
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3.3 Transceiver Module (AD6548)
Figure.3-3-1 AD6548 FUNCTIONAL BLOCK DIAGRAM
3.3.1 General Descriptions
The AD6548/9 provides a highly integrated direct conversion radio solution that combines, on a single
chip, all radio and power management functions necessary to build the most compact GSM radio solution
possible. The only external components required for a complete radio design are the Rx SAWs, PA,
Switchplexer and a few passives enabling an extremely small
cost effective GSM Radio solution.
The AD6548/9 uses the industry proven direct conversion receiver architecture of the OthelloTM family.
For Quad band applications the front end features four fully integrated programmable gain differential
LNAs. The RF is then downconverted by quadrature mixers and then fed to the baseband
programmable-gain amplifiers and active filters for channel selection. The Receiver output pins can be
directly connected to the baseband analog processor. The Receive path features automatic calibration
and tracking to remove DC offsets.
The transmitter features a translation-loop architecture for directly modulating baseband signals onto
the integrated TX VCO. The translation-loop modulator and TX VCO are extremely low noise removing the
need for external SAW filters prior to the PA.
The AD6548/9 uses a single integrated LO VCO for both the receive and the transmit circuits. The
synthesizer lock times are optimized for GPRS applications up to and including class 12.
To dramatically reduce the BOM both TX Translational loop and main PLL Loop Filters are fully integrated
into the device.
AD6548 incorporates a complete reference crystal calibration system. This allows the external VCTCXO
to be replaced with a low cost crystal. No other external components are required. The AD6549 uses the
traditional VCTCXO reference source.
The AD6548/9 also contains on-chip low dropout voltage regulators (LDOs) to deliver regulated supply
voltages to the functions on chip, with a battery input voltage of between 2.9V and 5.5V. Comprehensive
power down options are included to minimize power consumption in normal use.
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A standard 3 wire serial interface is used to program the IC. The interface features low-voltage digital
interface buffers compatible with logic levels from 1.6V to 3.0V.
The AD6548/9 is packaged in a 5mm × 5mm , 32-lead LFCSP package.
3.3.2 Features
Fully Integrated GSM Transceiver including
Direct Conversion Receiver
Translation Loop Direct VCO Modulator
High performance multi band PLL system
Power Management
Small footprint
APPLICATIONS
Dual, Triple and Quad Band Radios
- GSM850, E-GSM 900, DCS1800 and PCS1900
- GPRS to Class 12- EDGE RX
ORDERING GUIDE Model Temperature
Range
AD6548BCPZ -20°C to +85°C LFCSP-32
AD6549BCPZ -20°C to +85°C LFCSP-32
4 Differential LNAs
Integrated Active RX Channel Select Filters
Programmable Gain Baseband Amplifiers
Integrated TX VCO and tank
External TX filters eliminated
Integrated Loop filter components
Fast Fractional-N Synthesizer
Integrated Local Oscillator VCO
Fully Integrated Loop filters
Crystal Reference Oscillator & Tuning System (AD6548)
Integrated LDOs allow direct battery supply connection
32-Lead 5 X 5 mm Chipscale Package
Package
3.3.3 Pin Descriptions
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3.4 Bluetooth Module (MT6601)
The internal connection of the major physical blocks and their associated external interfaces
are shown in Figure 3-4-1.
The transceiver section of MT6601 incorporates the complete receive and transmit paths,
including PLL, VCO, LNA, PA, modulator, demodulator.
The baseband signal processor incorporates hardware engines performing frequency hopping,
error correcting, whitening, encrypting, data packet assembling and de-assembly to offload the
embedded ARM7.
Figure.3-4-1 MT6601 FUNCTIONAL BLOCK DIAGRAM
3.4.1 General description
Bluetooth is a low-cost wireless technology used to provide “ad hoc” networking between
versatile portable devices such as cell phones, PDAs, digital cameras, headsets, and more.
MT6601 is a highly integrated Bluetooth platform IC. It includes powerful baseband processing
capabilities with rich features and a high performance transceiver, all in a compact single
package.
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3.4.2 Features
Radio features
Fully compliant with Bluetooth specification 1.2.
Low out-of-band spurious emissions supports simultaneous operation with GPS, GSM/GPRS
worldwide radio systems.
Direct conversion architecture with no external channel filter or VCO resonator components.
Meets class 2 and class 3 transmitting requirement.
Support Class 1 operation with external PA.
Receiver features
-85dBm sensitivity with excellent interference rejection performance.
Hardware AGC dynamically adjusts receiver performance in changing environments.
Baseband features
eSCO support.
3 simultaneous SCO channels.
Scatternet support.
Sniff mode, hold mode, and part mode support.
AFH and PTA collaborative support for WLAN/BT coexistence.
Lower power mode and deep sleep mode enables ultra low power consumption
Platform features
On-chip voltage regulation simplifies voltage input requirements.
Low power consumption in active and standby mode.
Wide ranges of crystal and external reference clock support.
PCM interface and built-in transcoders for A-law, _-law and linear voice.
Built-in hardware modem engine for access code correlation, header error correction, forward
error correction,CRC, whitening, and encryption.
High speed UART support.
Built-in RAM and ROM with patch system.
Software features
Supports standard HCI interface.
3.4.3 Applications
MT6601 is designed to provide direct interface with existing handset chip as shown in Figure
3-4-2.
The PCM interface provides master or slave mode operation with programmable data frequency
to connect to the voice channel with the GSM baseband. The UART interface supports hardware
flow control as well as high-speed baud rate. The PTA interface accommodates different
arbitration scheme enabling efficient channel utilization in co-existence environment.
The external reference clock interface supports wide ranges of frequencies that the mobile
phones use.
The K5D12571CA is a Multi Chip Package Memory which combines 512Mbit NAND Flash
Memory and 256Mbit Mobile Synchronous Dynamic RAM.
Offered in 64Mx8bits, the NAND Flash is 512Mbit with spare 16Mbit capacity. The device is
offered in 2.7V Vcc. Its NAND cell provides the most cost-effective solutIon for the solid state
mass storage market. A program operation can be performed in typical 200μs on the 528-bytes
and an erase operation can be performed in typical 2ms on a 16K-bytes block. Data in the page
can be read out at 42ns cycle time per byte. The I/O pins serve as the ports for address and data
input/output as well as command input. The on-chip write control automates all program
and erase functions including pulse repetition, where required, and internal verification and
margining of data. Even the write-intensive systems can take advantage of the device′s
extended reliability of 100K program/erase cycles by providing ECC(Error Correcting Code) with
real time mapping-out algorithm. The device is an optimum solution for large nonvolatile storage
applications such as solid state file storage and other portable applications requiring
non-volatility.
The 256Mb Mobile SDRAM is 268,435,456 bits synchronous high data rate Dynamic RAM
organized as 4 x 4,194,304 words by 16 bits, fabricated with SAMSUNG’s high performance
CMOS technology. Synchronous design allows precise cycle control with the use of system clock
and I/O transactions are possible on every clock cycle. Range of operating frequencies,
programmable burst lengths and programmable latencies allow the same device to be useful for
a variety of high bandwidth and high performance memory system applications.
The K5D12571CA is suitable for use in data memory of mobile communication system to
reduce not only mount area but also power consumption. This device is available in 107-ball
FBGA Type.
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Figure.3-5-2 K5D12571CA-D090 PIN CONFIGURATION
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Figure.3-5-3 K5D12571CA-D090 PIN Description
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3.6 FM Radio Module (Si4708)
The Si4708/09 extends Silicon Laboratories Si4700 FM tuner family, and further increases the
ease and attractiveness of adding FM radio reception to mobile devices through small size and
board area, minimum component count, flexible programmability, and superior, proven
performance. Si4708/09 software is backwards compatible to existing Si4700/01/02/03 FM
Tuner designs and leverages Silicon Laboratories' highly successful and patented
Si4700/01/02/03 FM tuner. The Si4708/09 benefits from proven digital integration and 100%
CMOS process technology, resulting in a completely integrated solution. It is the industry's
smallest footprint FM tuner IC requiring only 6.25 mm2 board space and one external bypass
capacitor.
The device offers significant programmability, catering to the subjective nature of FM listeners’
audio preferences and variable FM broadcast environments worldwide.
The Si4709 incorporates a digital processor for the European Radio Data System (RDS) and
the US Radio Broadcast Data System (RBDS) including all required symbol decoding, block
synchronization, error detection, and error correction functions.
RDS/RDBS* enables data such as station identification and song name to be displayed to the
user. The Si4709 offers a detailed RDS view and a standard view, allowing adopters to
selectively choose granularity of software is backwards compatible to the proven Si4701/03,
adopted by leading cell-phone and MP3 manufacturers world-wide.
The Si4708/09 is based on the superior, proven performance of Silicon Laboratories' Aero
architecture offering unmatched interference rejection and leading sensitivity. The device uses
the same programming interface as the Si4700/01/02/03 and supports multiple bus modes.
Power management is simplified with an integrated regulator allowing direct connection to a 2.7
to 5.5 V battery for VD and 2.7 to 5.5 V battery for VA.
The Si4708/09 device’s high level of integration and complete FM system production testing
increases quality to manufacturers, improves device yields, and simplifies device manufacturing
and final testing.
Figure. 3-6-1 Si4708 FM Receiver Block Diagram
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3.7 LCD Interface
Figure.3-7-1 LCD Interface
The IM200CBNUA model is a Color TFT LCD supplied by LG Innotek.
This main LCD has a 2.00 inch diagonally measured active display area with 176(RGB)X220
resolution Each pixel is divided into Red, Green and Blue sub-pixels and dots which are arranged
in vertical stripes.
Main LCD color is determined with 262,000colors signal for each pixel.
The IM200CBNUA has been designed to apply the interface method that enables low power,
high speed, and high contrast.
The IM200CBNUA is intended to support applications where thin thickness, wide viewing angle
and low power consumption are critical factors and graphic displays are important.
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Figure. 3-7-2 IM200CBNUA Block Diagram
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Figure. 3-7-3 IM200CBNUA PIN DESCRIPTION
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3.8 SIM Card &SD Card Interface
Figure.3-8-1 SIM CARD Interface
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Figure.3-8-2 SD CARD Interface
The MT6235 contains a dedicated smart card interface to allow the MCU access to the SIM
card. It can operate via 4terminals, using VSIM, SIMI/O, SIMRST, SIMCLK
The VSIM is used to control the external voltage supply to the SIM card. SIMRST is used as
the SIM card reset signal. SIMI/O and SIMCLK are used for data exchange purpose.
The SIM interface acts as a half duplex asynchronous communication port and its data format
is composed of ten consecutive bits: a start bit in state Low, eight information bits, and a tenth bit
used for parity checking.
The SD Card control signal and data signal is controlled by MT6235.
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3.9 KEYPAD Interface
Figure.3-9-1. KEYPAD Interface
The keypad can be divided into two parts: one is the keypad interface including 4 columns and
6 rows; the other is the key detection block which provides key pressed, key released and
de-bounce mechanisms. Each time the key is pressed or released, i.e. something different in the
4 x 6 matrix, the key detection block senses the change and recognizes if a key has been
pressed or released. Whenever the key status changes and is stable, a KEYPAD IRQ is issued.
The MCU can then read the key(s) pressed directly in KP_HI_KEY, KP_MID_KEY and
KP_LOW_KEY registers. To ensure that the key pressed information is not missed, the status
register in keypad is not read-cleared by APB read command. The status register can only be
changed by the key-pressed detection FSM.
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3.10 Battery Charging Block Interface
Figure.3-10-1 Charging IC Interface
The BQ24350DSGR is controlled by MT6235.
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3.11 Audio Interface
Figure.3-11-1 Main Speaker Interface
Figure.3-11-2 Main Microphone & Receiver Interface
YDA145 (D-4H) is a digital audio power amplifier IC with maximum output of 2.1W
(RL=4Ώ)×1ch.
YDA145 has a “Pure Pulse Direct Speaker Drive Circuit” which directly drives speakers while
reducing distortion of pulse output signal and reducing noise on the signal, and realizes the
highest standard low distortion rate characteristics and low noise characteristics among digital
amplifier ICs for mobile use.
In addition, circuit design with fewer external parts can be made depend on the condition of use
because corresponds to filter less.
The YDA145 features Yamaha original non-clip output control function which detects output
signal clip due to the over level input signal and suppress the output signal clip automatically.
Also the non-clip output control function can adapt the output clip caused by power supply
voltage down with battery. This is the difference from the traditional AGC (Auto Gain Control) or
ALC (Auto Level Control) circuit.
YDA145 has the power-down function which can minimizes the power consumption in the
standby state.
As for protection function, overcurrent protection function for speaker output terminal,
overtemperatue protection function for inside of the device, and low supply voltage malfunction
preventing function are prepared.
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< 9-ball WLCSP Bottom View >
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3.12 Vibrator Interface
Figure.3-12-1 Vibrator Interface
This handset has Vibrator operation. Control signal is controlled by MT6235
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3.13 Camera Interface
Figure.3-13-1Camera Interface
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3.13.1 Pin Description
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4. Trouble Shooting
BB SUb-systems
4.1 Power On Trouble
4.1.1 Test Point
- Power-On key detection(PWRON signal)
- Outputs of CPU U401, LDOs U202
- Os Battery Voltage(Need to over 3.35V)
- Oscillate frequency of X401 and X201
Voltage PART
VDD 2.8V TP1(R511.2)
VMEM 1.8V TP2(R501.1)
AVDD 2.8V TP3(C531.1)
VCORE 1.2V TP4(C524.1)
VRF 2.8V TP5(B202.1)
VRTC 1.2V TP6(C507.1)
signal PART
32.768KHz 32.768KHz Clock signal TP7(X401.4)
26MHz 26MHz Clock signal TP8(X201.1)
26MHz out 26MHzClock signal TP9(C232.1)
TP7 32.768KHz
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TP8 26MHz
TP9 26MHz Out
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AVDD
VDD
VMEM
TP10
VCORE
32.768KHz
VRTC
VRF 26MHz Out 26MHz
TP11
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4.1.2 Circuit Diagram
TP10, 2.8V
32.768KH
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TP11
26MHz
TP5
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4.1.3 Checking Flow
Start
CheckBatteryVoltage
>3.35V?
YES
Checkkeyboard
connectoriswell?
YES
ChecktheVoltageof
U401,U202Outputof
TP1~TP6?
YES
NO
NO
NO
ChargeorChange
Battery
1.Re-workJ801
2.Chargekeyboard
3.Tryagain
Re-workorchangeCPU(U401),U202
CheckX401outputis
32.768KHzandX201,outputis26MHz?
YES
CheckTP11(SYSRST_B)andTP10(BBWAKEUP)signalis
YES
ThePhonewill
POWERON
NO
NO
Re-workorchangeX401,X201andaroundComponent
Re-workorchangeCPU(U401)
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4.2 SIM Card Trouble
4.2.1 Test Point
TP2 VSIM2
TP1 VSIM1
Voltage PART
VSIM1 1.8V or 3.0V TP1(J802.5)
VSIM2 1.8V or 3.0V TP2(J804.5)