LG C3380 Schematics 1

Service Manual

Date: November, 2005 / Issue 1.0

Service Manual

C3380

Model : C3380

- 3 -

1. INTRODUCTION .............................. 5

1.1 Purpose .................................................. 5

1.2 Regulatory Information............................ 5

1.3 Abbreviations .......................................... 7

2. PERFORMANCE.............................. 9

2.1 H/W Features.......................................... 9

2.2 Technical Specification ......................... 10

3. TECHNICAL BRIEF ...................... 16

3.1 Transceiver ........................................... 16

3.2 Power Amplifier Module ....................... 21

3.3 26 MHz Clock........................................ 22

3.4 Power Supplies for RF Circuits ............. 23

3.5 Digital Main Processor .......................... 24

3.6 Analog Main & Power Management

Processor.................................................. 30

3.7 Display and Interface ............................ 40

3.8 Camera Interface .................................. 42

3.9 Keypad Switches and Scanning ........... 44

3.10 Microphone ......................................... 45

3.11 Main Speaker...................................... 45

3.12 Headset Interface................................ 46

3.13 Key Back-light Illumination.................. 47

3.14 LCD Back-light Illumination................. 48

3.15 VIBRATOR.......................................... 49

3.16 BLUETOOTH .......................................50

4. TROUBLE SHOOTING ................. 52

4.1 RX Trouble............................................ 52

4.2 TX Trouble ............................................ 60

4.3 Power On Trouble................................. 68

4.4 Charging Trouble ...................................70

4.5 Vibrator Trouble .....................................72

4.6 LCD Trouble...........................................74

4.7 Camera Trouble .....................................76

4.8 Speaker Trouble ....................................78

4.9 SIM Card Interface Trouble....................80

4.10 Earphone Trouble ................................82

4.11 KEY backlight Trouble .........................84

4.12 Receiver Trouble .................................86

4.13 Microphone Trouble .............................88

4.14 RTC Trouble ........................................90

4.15 Indication LED Trouble ........................92

4.16 Folder on/off Trouble............................94

4.17 Bluetooth Trouble.................................96

5. DOWNLOAD AND CALIBRATION.. 100

5.1 Download ............................................ 100

5.2 Calibration............................................106

6. BLOCK DIAGRAM ...................... 109

7. CIRCUIT DIAGRAM ..................... 111

8. PCB LAYOUT ............................... 117

9. ENGINEERING MODE ..................119

9.1 BB Test [MENU 1]................................120

9.2 RF Test [MENU 2]................................122

9.3 MF mode [MENU 3] .............................122

9.4 Trace option [MENU 4] ........................123

9.5 Call timer [MENU 5] .............................123

9.6 Fact. Reset [MENU 6] ..........................123

9.7 S/W version..........................................123

10. STAND ALONE TEST .................124

10.1 Introduction ........................................124

10.2 Setting Method...................................124

10.3 Means of Test ....................................125

11. AUTO CALIBRATION..................127

11.1 Overview ............................................127

11.2 Requirements.....................................127

11.3 Menu and Settings .............................127

11.4 AGC ...................................................129

11.5 APC....................................................129

11.6 ADC ...................................................129

11.7 Setting................................................129

11.8 How to do calibration .........................129

12. EXPLODED VIEW &

REPLACEMENT PART LIST ..... 131

12.1 Exploded View .................................. 131

12.2 Replacement Parts ............................133

12.3 Accessory ......................................... 150

Table Of Contents

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1. INTRODUCTION

- 5 -

1.1 Purpose

This manual provides the information necessary to repair, calibration, description and download the
features of this model.

1.2 Regulatory Information

A. Security

Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company’s employees, agents, subcontractors, or person working on your
company’s behalf) can result in substantial additional charges for your telecommunications services.
System users are responsible for the security of own system. There are may be risks of toll fraud
associated with your telecommunications system. System users are responsible for programming and
configuring the equipment to prevent unauthorized use. The manufacturer does not warrant that this
product is immune from the above case but will prevent unauthorized use of common-carrier
telecommunication service of facilities accessed through or connected to it.
The manufacturer will not be responsible for any charges that result from such unauthorized use.

B. Incidence of Harm

If a telephone company determines that the equipment provided to customer is faulty and possibly
causing harm or interruption in service to the telephone network, it should disconnect telephone
service until repair can be done. A telephone company may temporarily disconnect service as long as
repair is not done.

C. Changes in Service

A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the this phone or compatibility with the
network, the telephone company is required to give advanced written notice to the user, allowing the
user to take appropriate steps to maintain telephone service.

D. Maintenance Limitations

Maintenance limitations on this model must be performed only by the manufacturer or its authorized
agent. The user may not make any changes and/or repairs expect as specifically noted in this manual.
Therefore, note that unauthorized alternations or repair may affect the regulatory status of the system
and may void any remaining warranty.

1. INTRODUCTION

1. INTRODUCTION

- 6 -

E. Notice of Radiated Emissions

This model complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies. In accordance with these agencies, you may be required to provide information
such as the following to the end user.

F. Pictures

The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly
different.

G. Interference and Attenuation

Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference from
unsuppressed engines or electric motors may cause problems.

H. Electrostatic Sensitive Devices

ATTENTION

Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign.
Following information is ESD handling:

• Service personnel should ground themselves by using a wrist strap when exchange system boards.

• When repairs are made to a system board, they should spread the floor with anti-static mat which is
also grounded.

• Use a suitable, grounded soldering iron.

• Keep sensitive parts in these protective packages until these are used.

• When returning system boards or parts like EEPROM to the factory, use the protective package as
described.

1. INTRODUCTION

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1.3 Abbreviations

For the purposes of this manual, following abbreviations apply:

APC Automatic Power Control

BB Baseband

BER Bit Error Ratio

CC-CV Constant Current - Constant Voltage

DAC Digital to Analog Converter

DCS Digital Communication System

dBm dB relative to 1 milli watt

DSP Digital Signal Processing

EEPROM Electrical Erasable Programmable Read-Only Memory

ESD Electrostatic Discharge

FPCB Flexible Printed Circuit Board

GMSK Gaussian Minimum Shift Keying

GPIB General Purpose Interface Bus

GSM Global System for Mobile Communications

IPUI International Portable User Identity

IF Intermediate Frequency

LCD Liquid Crystal Display

LDO Low Drop Output

LED Light Emitting Diode

OPLL Offset Phase Locked Loop

1. INTRODUCTION

- 8 -

PAM Power Amplifier Module

PCB Printed Circuit Board

PGA Programmable Gain Amplifier

PLL Phase Locked Loop

PSTN Public Switched Telephone Network

RF Radio Frequency

RLR Receiving Loudness Rating

RMS Root Mean Square

RTC Real Time Clock

SAW Surface Acoustic Wave

SIM Subscriber Identity Module

SLR Sending Loudness Rating

SRAM Static Random Access Memory

PSRAM Pseudo SRAM

STMR Side Tone Masking Rating

TA Travel Adapter

TDD Time Division Duplex

TDMA Time Division Multiple Access

UART Universal Asynchronous Receiver/Transmitter

VCO Voltage Controlled Oscillator

VCTCXO Voltage Control Temperature Compensated Crystal Oscillator

WAP Wireless Application Protocol

2. PERFORMANCE

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2.1 H/W Features

2. PERFORMANCE

Item Feature Comment

Li-ion, 1000mAh

Standard Battery

Battery Size : 34.15 (W) × 53.55(H) × 5.7(T) [mm]

Battery Weight : 25g

Under the minimum current consumption environment

Stand by Current (such as paging period 9), the level of standby current

is below 4mA.

Talk time Up to 3.5 hours (GSM TX Level 5)

Stand by time Up to 200 hours (Paging Period: 9, RSSI: -85 dBm)

Charging time Approx. Under 3.75 hours

RX Sensitivity GSM, EGSM: -107dBm, DCS: -107dBm

TX output power

GSM, EGSM: 33dBm(Level 5),
DCS: 30dBm(Level 0)

GPRS compatibility Class 10

SIM card type 3V Small

Display

Main LCD : CSTN 128 x 160 pixel 65K Color
Sub LCD : STN 96 x 64 pixel MONO Color

Hard icons. Key Pad
0 ~ 9, #, *, Up/Down Navigation Key

Status Indicator Menu Key, Clear Key

Send Key, END/PWR Key
Soft Key(Left/Right)

ANT Internal

EAR Phone Jack Yes (mono)

PC Synchronization Yes

Speech coding EFR/FR/HR

Data and Fax Yes

Vibrator Yes

Loud Speaker Yes

Voice Recoding Yes

Microphone Yes

Speaker/Receiver One way dual speaker

Travel Adapter Yes

MIDI 40 Poly (Mono SPK)

Options Data Kit , CD

2. PERFORMANCE

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2.2 Technical Specification

Item Description Specification

GSM

TX: 890 + n x 0.2 MHz
RX: 935 + n x 0.2 MHz (n=1~124)

EGSM

1Frequency Band TX: 890 + (n-1024) x 0.2 MHz

RX: 935 + (n-1024) x 0.2 MHz (n=975~1024)

DCS

TX: 1710 + (n-512) x 0.2 MHz
RX: 1805 + (n-512) x 0.2 MHz (n=512~885)

2 Phase Error

RMS < 5 degrees
Peak < 20 degrees

3 Frequency Error < 0.1 ppm

GSM, EGSM

Level Power Toler. Level Power Toler.

5 33 dBm 2dB 13 17 dBm 3dB

6 31 dBm 3dB 14 15 dBm 3dB

7 29 dBm 3dB 15 13 dBm 3dB

8 27 dBm 3dB 16 11 dBm 5dB

9 25 dBm 3dB 17 9 dBm 5dB

10 23 dBm 3dB 18 7 dBm 5dB

11 21 dBm 3dB 19 5 dBm 5dB

4 Power Level 12 19 dBm 3dB

DCS

Level Power Toler. Level Power Toler.

0 30 dBm 2dB 8 14 dBm 3dB

1 28 dBm 3dB 9 12 dBm 4dB

2 26 dBm 3dB 10 10 dBm 4dB

3 24 dBm 3dB 11 8 dBm 4dB

4 22 dBm 3dB 12 6 dBm 4dB

5 20 dBm 3dB 13 4 dBm 4dB

6 18 dBm 3dB 14 2 dBm 5dB

7 16 dBm 3dB 15 0 dBm 5dB

2. PERFORMANCE

- 11 -

Item Description Specification

GSM, EGSM

Offset from Carrier (kHz). Max. dBc

100 +0.5

200 -30

250 -33

400 -60

600 ~ 1,200 -60

1,200 ~ 1,800 -60

1,800 ~ 3,000 -63

3,000 ~ 6,000 -65

5

Output RF Spectrum 6,000 -71

(due to modulation) DCS

Offset from Carrier (kHz). Max. dBc

100 +0.5

200 -30

250 -33

400 -60

600 ~ 1,200 -60

1,200 ~ 1,800 -60

1,800 ~ 3,000 -65

3,000 ~ 6,000 -65

6,000 -73

GSM, EGSM

Offset from Carrier (kHz) Max. (dBm)

Output RF Spectrum 400 -19

6

(due to switching transient) 600 -21

1,200 -21

1,800 -24

2. PERFORMANCE

- 12 -

Item Description Specification

DCS

Offset from Carrier (kHz). Max. (dBm)

Output RF Spectrum 400 -22

6

(due to switching transient) 600 -24

1,200 -24

1,800 -27

7 Spurious Emissions Conduction, Emission Status

GSM, EGSM

8 Bit Error Ratio

BER (Class II) < 2.439% @-102 dBm

DCS

BER (Class II) < 2.439% @-100 dBm

9 RX Level Report Accuracy 3 dB

10 SLR 8 3 dB

Frequency (Hz) Max.(dB) Min.(dB)

100 -12 -

200 0 -

300 0 -12

11 Sending Response 1,000 0 -6

2,000 4 -6

3,000 4 -6

3,400 4 -9

4,000 0 -

12 RLR 2 3 dB

Frequency (Hz) Max.(dB) Min.(dB)

100 -12 -

200 0 -

300 2 -7

500

*

-5

13 Receiving Response 1,000 0 -5

3,000 2 -5

3,400 2 -10

4,000 2

*

Mean that Adopt a straight line in between 300 Hz and

1,000 Hz to be Max. level in the range.

2. PERFORMANCE

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Item Description Specification

14 STMR 13 5 dB

15 Stability Margin > 6 dB

dB to ARL (dB) Level Ratio (dB)

-35 17.5

-30 22.5

-20 30.7

16 Distortion

-10 33.3

0 33.7

7 31.7

10 25.5

17 Side Tone Distortion Three stage distortion < 10%

18

System frequency

2.5ppm

(13 MHz) tolerance

19 32.768KHz tolerance 30ppm

At least 65 dBspl under below conditions:

20 Ringer Volume 1. Ringer set as ringer.

2. Test distance set as 50 cm

21 Charge Current

Fast Charge : < 430 mA
Slow Charge: < 160 mA

Antenna Bar Number Power

5 -85 dBm ~

4 -90 dBm ~ -86 dBm

22 Antenna Display 3 -95 dBm ~ -91 dBm

2 -100 dBm ~ -96 dBm

1 -105 dBm ~ -101 dBm

0~ -105 dBm

Battery Bar Number Voltage

0 3.51V~3.61V

23 Battery Indicator 1 3.62V~3.69V

2 3.70V~3.77V

3 3.78V~3.91V

4 3.92V~

24 Low Voltage Warning

3.62 0.03V (Call)

3.50 0.03V (Standby)

2. PERFORMANCE

- 14 -

Item Description Specification

25 Forced shut down Voltage 3.35 0.03 V

1 Li-ion Battery

26 Battery Type

Standard Voltage = 3.7 V
Battery full charge voltage = 4.2 V
Capacity: 1000mAh

Switching-mode charger

27 Travel Charger Input: 100 ~ 240 V, 50/60Hz

Out put: 5.2V, 800mA

3. TECHNICAL BRIEF

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3.1 Transceiver (SI4205, U505)

The RF parts consist of a transmitter part, a receiver part, a frequency synthesizer part, a voltage
supply part, and a VCTCXO part.
The Aero I transceiver is the integrated RF front end for multi-band GSM/GPRS digital cellular
handsets and wireless data modems. The integrated solution eliminates the IF SAW filter, external low
noise amplifier (LNA) for three bands, transmit and RF voltage controlled oscillator (VCO) modules,
and other discrete components found in conventional designs.

3. TECHNICAL BRIEF

Figure. 3-1 RECEIVER FUNCTIONAL BLOCK DIAGRAM

3. TECHNICAL BRIEF

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(1) Receiver Part

The Aero I transceiver uses a low-IF receiver architecture which allows for the on chip integration of
the channel selection filters, eliminating the external RF image reject filters and the IF SAW filter
required in conventional super-heterodyne architectures.

A. RF front end

RF front end consists of Antenna Switch(FL500), two SAW Filters(FL401, FL402) and dual band LNAs
integrated in transceiver (U505).
The Received RF signals(GSM 925MHz ~ 960MHz, DCS 1805MHz ~ 1880MHz) are fed into the
antenna or Mobile switch.
The Antenna Switch(FL500) is used to control the Rx and Tx paths. And, the input signals VC1 and
VC2 of a FL500 are directly connected to baseband controller to switch either Tx or Rx path on.
The logic and current is given below Table 3-1.

Three differential-input LNAs are integrated in SI4205. The GSM input supports the GSM 850 (824-849
MHz) or E-GSM 900 (925-960MHz) bands. The DCS input supports the DCS 1800 (1805-1880 MHz)
band. The PCS input supports the PCS 1900 (1930-1990 MHz) band.
The LNA inputs are matched to the 150 balanced output SAW filters through external LC matching
networks. The LNA gain is controlled with the LNAG[1:0] and LNAC[1:0] bits in register 05h (Figure 3-2).

VC1 VC2 Current

DCS Tx 0 V 2.5 ~ 3.0 V 10.0 mA max

GSM Tx 2.5 ~ 3.0 V 0 V 10.0 mA max

GSM / DCS Rx 0 V 0 V < 0.1 mA

Table 3-1 THE LOGIC AND CURRENT

3. TECHNICAL BRIEF

- 17 -

B. Intermediate frequency (IF) and Demodulation

A quadrature image-reject mixer downconverts the RF signal to a 100KHz intermediate frequency (IF)
with the RFLO from the frequency synthesizer. The RFLO frequency is between 1737.8 to 1989.9
MHz, and is internally divided by 2 for GSM 850 and E-GSM 900 modes. The mixer output is amplified
with an analog programmable gain amplifier (PGA), which is controlled with the AGAIN[2:0] bits in
register 05h (Figure3-2). The quadrature IF signal is digitized with high resolution A/D converters
(ADCs).
The ADC output is downconverted to baseband with a digital 100KHz quadrature LO signal. Digital
decimation and IIR filters perform channel selection to remove blocking and reference interference
signals. The selectivity setting (CSEL=0) or a low selectivity setting (CSEL=1). The low selectivity filter
has a flatter group channelization filter is in the baseband chip. After channel selection, the digital
output is scaled with a digital PGA, which is controlled with the DGAIN [5:0] bits in register 05h.
The amplified digital output signal go through with DACs that drive a differential analog signal onto the
RXIP,RXIN,RXQP and RXQN pins to interface to standard analog ADC input baseband ICs. No
special processing is required in the baseband for offset compensation or extended dynamic range.
Compared to a direct-conversion architecture, the low-IF architecture has a much greater degree of
immunity to dc offsets that can arise from RF local oscillator(RFLO) self-mixing, 2nd order distortion of
blockers, and device 1/f noise.

Figure. 3-2 SI4205 RECEIVER PART

3. TECHNICAL BRIEF

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(2) Transmitter Part

The transmit (Tx) section consists of an I/Q baseband upconverter, and offset phase-locked loop
(OPLL) and two output buffers that can drive external power amplifiers (PA), one for the GSM 850
(824-849 MHz) and E-GSM 900 (880-915 MHz) bands and one for the DCS 1800 (1710-1785 MHz)
and PCS 1900 (1850-1910MHz) bands.

A. IF Modulator

The baseband converter(BBC) within the GSM chipset generates I and Q baseband signals for the
Transmit vector modulator. The modulator provides more than 40dBc of carrier and unwanted
sideband rejection and produces a GMSK modulated signal. The baseband software is able to cancel
out differential DC offsets in the I/Q baseband signals caused by imperfections in the D/A converters.
The Tx-Modulator implements a quadrature modulator. A quadrature mixer upconverts the differential
in-phase (TXIP, TXIN) and quadrature (TXQP, TXQN) signals with the IFLO to generate a SSB IF
signal that is filtered and used as the reference input to the OPLL.
The IFLO frequency is generated between 766 and 896 MHz and internally divided by 2 to generate
the quadrature LO signals for the quadrature modulator, resulting in an IF between 383 and 448 MHz.
For the E-GSM 900 band, two different IFLO frequencies are required for spur management.
Therefore, the IF PLL must be programmed per channel in the E-GSM 900 band.

Figure. 3-3 SI4205 TRANSMITTER PART

3. TECHNICAL BRIEF

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B. OPLL

The OPLL consists of a feedback mixer, a phase detector, a loop filter, and a fully integrated TXVCO.
The TXVCO is centered between the DCS 1800 and PCS 1900 bands, and its output is divided by 2
for the GSM 850 and E-GSM 900 bands. The RFLO frequency is generated between 1272 and 1483
MHz. To allow a single VCO to be used for the RFLO, high-side injection is used for the GSM 850 and
E-GSM 900 bands, and low-side injection is used for the DCS 1800 and PCS 1900 bands. The I and Q
signals are automatically swapped when switching bands. Additionally, the SWAP bit in register 03h
can be used to manually exchange the I and Q signals.

Low-pass filters before the OPLL phase detector reduce the harmonic content of the quadrature
modulator and feedback mixer outputs. The cutoff frequency of the filters is programmable with the
FIF[3:0] bits in register 04h (Figure 3-3), and should be set to the recommended settings detailed in
the register description.

3. TECHNICAL BRIEF

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(3) Frequency Synthesizer

The Aero I transceiver integrates two complete PLLs including VCOs, varactors, resonators, loop
filters, reference and VCO dividers, and phase detectors. The RF PLL uses two multiplexed VCOs.
The RF1 VCO is used for receive mode, and the RF2 VCO is used for transmit mode. The IF PLL is
used only during transmit mode. All VCO tuning inductors are also integrated. The IF and RF output
frequencies are set by programming the N-Divider registers, NRF1, NRF2 and NIF. Programming the
N-Divider register for either RF1 or RF2 automatically selects the proper VCO. The output frequency of
each PLL is as follows:

f

out

= N x f

ø

The DIV2 bit in register 31h controls a programmable divider at the XIN pin to allow either a 13 or 26
MHz reference frequency. For receive mode, the RF1 PLL phase detector update rate (fø) should be
programmed fø= 100 kHz for DCS 1800 or PCS 1900 bands, and fø= 200 kHz for GSM 850 and E­GSM 900 bands. For transmit mode, the RF2 and IF PLL phase detector update rates are always
fø =200 kHz.

Figure. 3-4 SI4205 FREQUENCY SYNTHESIZER PART

3. TECHNICAL BRIEF

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3.2 Power Amplifier Module (SKY77325, U501)

The SKY77325 Power Amplifier Module (PAM) is designed in a low profile (1.2 mm), compact form
factor for quad-band cellular handsets comprising GSM850/900, DCS1800, and PCS1900 operation.
The PAM also supports Class 12 General Packet Radio Service (GPRS) multi-slot operation.
The module consists of separate GSM850/900 PA and DCS1800/PCS1900 PA blocks, impedance­matching circuitry for 50 input and output impedances, and a Power Amplifier Control (PAC) block
with an internal current-sense resistor. The custom BiCMOS integrated circuit provides the internal
PAC function and interface circuitry. Fabricated onto a single Gallium Arsenide (GaAs) die, one
Heterojunction Bipolar Transistor (HBT) PA block supports the GSM850/900 bands and the other
supports the DCS1800 and PCS1900 bands. Both PA blocks share common power supply pins to
distribute current. The GaAs die, the Silicon (Si) die, and the passive components are mounted on a
multi-layer laminate substrate. The assembly is encapsulated with plastic overmold.
RF input and output ports of the SKY77325 are internally matched to a 50 load to reduce the number
of external components for a quad-band design. Extremely low leakage current (2.5 A, typical) of the
dual PA module maximizes handset standby time. The SKY77325 also contains band-select switching
circuitry to select GSM (logic 0) or DCS/PCS (logic 1) as determined from the Band Select (BS) signal.
In Figure 3-5 below, the BS pin selects the PA output (DCS/PCS OUT or GSM850/900 OUT) and the
Analog Power Control (VAPC) controls the level of output power.
VBATT and VSENSE pins connect to an internal current-sense resistor and interface to an integrated
power amplifier control (iPAC¢‚) function, which is insensitive to variations in temperature, power
supply, process, and input power. The ENABLE input allows initial turnon of PAM circuitry to minimize
battery drain

3-5 Functional Block Diagram

3. TECHNICAL BRIEF

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3.3 26 MHz Clock (VCTCXO, X500)

The 26 MHz clock(X500) consists of a TCXO(Temperature Compensated Crystal Oscillator) which
oscillates at a frequency of 26 MHz. It is used within the Si4205, digital base band chipset
(U101, AD6527)

3.4 Power Supplies for RF Circuits (RF LDO, U503)

Two regulators are used for RF circuits. One is MIC5255 (U503), and the other is one port of AD6537B
(U102).
MIC5255 (U503) supplies power to transceiver (SI4205, U505). One port of AD6537B supplies power
to VCTCXO (X500). Main power (VBAT) from battery is used for PAM (SKY77325, U501) because
PAM requires high power.

0.1u

C531

10K

R511

C533

2.2u

R510

100

100p

C530

GND

2

OUT

3

4

VCC

VCONT

1

X500

26MHz

2V75_VVCXO

AFC

Figure 3-6 VCTCXO CIRCUIT DIAGRAM

Supplier Voltage Powers enabled signal

U503(VRF) 2.85 V U505, U501 CLKON

U102(VVCXO) 2.75 V X501

Battery(VBAT) 3.4 ~ 4.2 V U501, U503

Table 3-2 RF POWER SUPPLIERS

3. TECHNICAL BRIEF

- 23 -

Figure 3-7 RF LDO CIRCUIT DIAGRAM

RF2.85V

C536

4.7u

(1608)

C535

22n

U503

GND

1

IN

2
3

5

OUT

4

BYP EN

MIC5255-2.85BM5

VBAT

C537

4.7u

(1608)

RF_LDO

CLKON

3. TECHNICAL BRIEF

- 24 -

3.5 Digital Main Processor (AD6527, U101)

Figure 3-8. SYSTEM INTERCONECTION OF AD6527 EXTERNAL INTERFACE

AD6527/AD6527B GSM-PROCESSOR

Keypad

Matrix

Backlight/

Service Light

Flash

16-bit

SRAM

8 or 16 bit

(optional)

DISPLAY

(parallel)

Serial display

Accessory

Devices

e.g

BATTERY

SIM

Application

Processor

USB Host

PA Supply

Enable

KEYPADCOL[7:0]
KEYPADROW[7:0]

BACKLIGHT[3.0]

Servicelight

Enhanced Generic Serial Port A

Generic Serial Port B

Generic Serial Port D

ROMCS[1:0]

ADD[24:0]

DATA[15:0]

RAMCS[1:0]

RD
WR
HWR/UBS
LWR/LBS

DISPLAYCS[1:0]

Generic Serial
Port C

GPCS[1:0]
AUXCS[1:0]
Generic Serial Port D-A
Generic Serial Port D-B

GPIO[ ] / IRQ

SIM Serial

Interface

SPI

USB Interface

*(AD6527B only)

CLKIN

MicroSM“

RF Interface

DRV - OUT

LNA IN

RADIO

AD6534

JTAGEN

TCK,TMS

TDI,TDO

JTAG,HSL,GPIO

USCTX/RX/CLK

PWRON

RESET

OSCIN

OSCOUT

VDDRTC

VMEM

VEXT

VCC

VMMC

VINT

VDDUSB

VSIM

GND

ASDO

ASFS

ASDI

BSDO

BSOFS

BSDI

BSIFS

CSDO

CSDI

CSFS

ABB_INT

CLKOUT_GATE

CLKOUT

ABBRESET

AGC

13/

26MHz

I

VCO

U S C

Synthesizer

Management

32kHz

ASDI
ASFS
ASDO

BSDI

BSIFS
BSDO
BSOFS

CSDI
CSDO
CSFS

INT

MCLKEN
MCLK
RESET
VCXOEN

RAMP
RF Timing

I/Q Interface
VOICE i/f &
Buzzer

VOSC
AFC

JTAG

JTAG

Universal

System

Connector

(USC)

Power

Processor

AD6535 Audio & Baseband

Audio

Dat

Port

BASE
BAND

I/Q

Serial

Port

control
serial
port

3. TECHNICAL BRIEF

- 25 -

• AD6527 is an ADI designed processor.

• AD6527 consists of

1. Control Processor Subsystem

• 32-bit ARM7TDMI Control Processor

• 58.5 MHz operation at 1.7V

• On-board 16KB instruction/Data Cache

• 1 Mbits of on-chip System SRAM

2. DSP Subsystem

• 16-bit Fixed Point DSP Processor

• 91 MIPS at 1.7V

• 16K word Data and 16K word Program SRAM

• 4K word Program Instruction Cache

• Architecture supports Full Rate, Enhanced Full Rate, Half Rate, and AMR Speech
Encoding/Decoding Algorithms

3. Peripheral Subsystem

• Shared on-chip peripheral and off-chip interface:

• Support for Burst and Page Mode Flash

• Support for Pseudo SRAM

• Ciphering module for GPRS supporting GAE1 and GAE2 encryption algorithms

• Parallel and Serial Display Interface

• 8 x 8 Keypad Interface

• Four independent programmable backlight plus One Service Light

• 1.8V and 3.0V, 64 kbps SIM interface

• Universal System Connector Interface

• Slow, Medium and Fast IrDA transceiver interface

• Enhanced Generic Serial Port

• Dedicated SPI interface

• Thumbwheel Interface

• JTAG Interface for Test and In-Circuit Emulation

4. Other

• Supports 13 MHz and 26 MHz Input Clocks

• 1.8V Typical Core Operating Voltages

• 204-Ball LFBGA(mini-BGA) Package

5. Applications

• GSM900/DCS1800/PCS1900/GSM850 Wireless Terminals

• GSM Phase 2+ Compliant

• GPRS Class 12 Compliant

• Multimedia Services(MMS)

• Extended Messaging System(EMS)

3. TECHNICAL BRIEF

- 26 -

3.5.1 Interconnection with external devices

A. RTC block interface

Countered by external X-TAL
The X-TAL oscillates 32.768KHz

B. LCD module interface

The LCD module is controlled by CAMERA IC, CL761A
If CL761A is in the state of by-pass mode, the LCD control signals from AD6527 are by-passed
through CL761A.
In operating mode, the CL761A controls the LCD module through L_MAIN_LCD_CS,
L_SUB_LCD_CS, LCD_RESET, LCD_RS, LCD_WR, LCD_RD, L_DATA[15-00], 2V85_VCAM,
IF_MODE, LCD_ID[1:3].

Signals Description

L_MAIN_LCD_CS MAIN LCD driver chip enable. MAIN LCD driver IC has own CS pin

L_SUBMLCD_CS SUB LCD driver chip enable. SUB LCD driver IC has own CS pin

LCD_RESET

This pin resets LCD module. This signal comes from DBB directly.

(GPIO 15)

LCD_WR Enable writing to LCD Driver.

LCD_RD Enable reading to LCD Driver.

LCD_RS

This pin determines whether the data to LCD module are display

data or control data. LCD_RS can select 16 bit parallel bus.

2V85_VCAM 2.85V voltage is supplied to LCD driver IC.

IF_MODE Select 16bits or 8bits interface mode for MAIN LCD.

(GPO_8) For the future

LCD_ID1

Select LCD modoule maker(2.4V : SII, 0V : HyeLCD)

(AUXADC1 in ABB)

LCD_ID2(GPIO_16)

For the future.

LCD_ID3(GPIO_17)

Table 3-3. LCD CONTRON SIGNALS DISCRIPTION

3. TECHNICAL BRIEF

- 27 -

The backlight of LCD module is controlled by DBB via AAT2807 , U402. The control signals related
to Backlight LED are given bellow.

C. RF interface

The AD6527 control RF parts through PA_BAND, ANT_SW1, ANT_SW2, CLKON , PA_EN, SEN,
SDATA, SCLK, RF_PWR_DWN.

Signals Description

C_FLASH

Control flash ON and OFF

(GPIO_24)

LCD_DIM_CTL

Control LCD backlight level in 16 steps

(GPO 23)

FLASH_LED Voltage source for FLASH LED

MLED Current source for backlight LED

MLED[1:3]

This pins are returned-paths for backlight LED current

source (MLED)

Table 3-4. DESCRIPTION OF LCD BACKLIGHT LED CONTROL

Signals Description

PA_BAND (GPO 17) PAM Band Select

ANT_SW1 (GPO 9) Antenna switch Band Select

ANT_SW2 (GPO 11) Antenna switch Band Select

CLKON RF LDO Enable/Disable

PA_EN (GPO 16) PAM Enable/Disable

SEN (GPO 19) PLL Enable/Disable

SDATA (GPO 20) Serial Data to PLL

SCLK (GPO 21) Clock to PLL

RF_EN (GPO 4) Power down Input

Table 3-5. RF CONTRON SIGNALS DISCRIPTION

3. TECHNICAL BRIEF

- 28 -

D. SIM interface

The AD6527 provides SIM Interface Module. The AD6527 checks status periodically during
established call mode whether SIM card is inserted or not, but it doesn't check during deep Sleep
mode. In order to communicate with SIM card, 3 signals such as SIM_DATA, SIM_CLK,
SIM_RST(GPIO_23) are required. The descriptions about the signals are given by bellow Table 3-6
in detail.

E. Key interface

Include 5 column , 5 row and additional GPIO 35 for KEY_ROW5. The AD6527 detects whether key
is pressed or not by using interrupt method.

F. AD6537B Interrupt

AD6537B provides an active-high interrupt output signal. Interrupt signals are generated by the
Auxiliary ADC, audio, and charger modules.

Signals Description

SIM_DATA

This pin receives and sends data to SIM card. This model can support

1.8volt and 3.0 volt interface SIM card.

SIM_CLK Clock 3.25MHz frequency.

SIM_RST

Reset SIM block

(GPIO_23)

Table 3-6. SIM CONTRON SIGNALS DISCRIPTION

SIM CONNECTOR

VCC

1

VPP

5

J300

3

CLK

4

GND

I_O

6

2

RST

2V85_VSIM

220n

C320

C321 22p

2V85_VSIM

0R361

1000pC322

20K

R359

C319 NA

0R360

SIM_RST

SIM_DATA SIM_CLK

Figure 3-9. SIM Interface of AD6527

3. TECHNICAL BRIEF

- 29 -

3.5.2 AD6527 Architecture

The internal architecture of AD6527 is shown above Figure 3-10. AD6527 regroups three main
subsystems connected together through a dynamic and flexible communication bus network. It also
includes onboard system RAM (SRAM) and interfaces with external Flash Memory, Baseband
converter functions, and terminal functions like MMI, SIM and Universal System Connector (USC).
The Digital Signal Processing (DSP) subsystem primarily hosts all the speech processing, channel
equalization and channel codec functions. The code used to implement such functions can be stored
in external Flash Memory and dynamically downloaded on demand into the DSP’s program RAM and
Instruction Cache.
The micro-controller subsystem supports all the GSM terminal software, including the layer 1, 2 and 3
of the GSM protocol stack, the MMI, and applications software such as data services, test and
maintenance. It is tightly associated with on-chip system SRAM and also includes boot ROM memory
with a small dedicated routine to facilitate the initialization of the external Flash Memory via code
download using the on-chip serial interface to the external Flash Memory interface.
The peripheral subsystem is composed of system peripherals such as interrupt controller, real time
clock, watch dog timer, power management and a timing and control module. It also includes
peripheral interfaces to the terminal functions: keyboard, battery supervision, radio and display. Both
the DSP and the MCU can access the peripheral subsystem via the peripheral bus (PBUS).
For program and data storage, both the MCU subsystem and the DSP subsystem can access the on
chip system SRAM and external memory such Flash Memory. The access to the SRAM module is
made through the RAM Bus (RBUS) under the control of the bus arbitration logic. Similarly, access to
the Flash Memory is through the parallel External Bus (EBUS).

Figure 3-10. AD6527 Architecture

AD6527/AD6527BAD6527/AD6527B

DSP

Subststem

DSP

Subststem

PBUSPBUS

DSP BUSDSP BUS

Serial Link

SBUSSBUS

PBUS 1MRBUS 1M

EBUSEBUS

Audio Baseband

and Power

Management

AD6535

Audio Baseband

and Power

Management

DMA and BUS

ARBITRATION

DMA and BUS

ARBITRATION

Peripheral

Subsystem

Peripheral

Subsystem

SRAMSRAM

FLASHFLASH

RF-Control

MMI

USC

RF-Control

MMI
USC

3. TECHNICAL BRIEF

- 30 -

3.6 Analog Main & Power Management Processor
(AD6537B, U102)

Figure 3-11. AD6537B FUNCTIONAL BLOCK DIAGRAM

AD6527

B

SI4205

3. TECHNICAL BRIEF

- 31 -

• AD6537B is an ADI designed Analog Baseband processor. AD6537B covers the processing GMSK
modulation interface, Aux ADC, Voice signal processing and Power Management.

• AD6537B consists of

1. BB Transmit section

• GMSK Modulation

• I-channel & Q-channel Transmit DACs and Filters

• Power Ramping DAC

2. BB Receiver section

• I-channel & Q-channel Receive ADCs and Filters

3. Auxiliary section

• Voltage Reference

• Automatic Frequency Control DAC

• Auxiliary ADC

• Light Controllers

4. Audio Section

• 8 kHz & 16 kHz Voiceband Codec

• 48 kHz Monophonic DAC

• Power Amplifiers

5. Power Management section

• Voltage Regulators

• Battery Charger

• Battery Protection

6. Digital Processor section

• Control, Baseband, and Audio Serial Ports

• Interrupt Logic

3. TECHNICAL BRIEF

- 32 -

3.6.1 Baseband Transmit Section

1. The AD6537B Baseband Transmit Section is designed to support GMSK for both single-slot and
multi-slot application.

2. The transmit channel consists of a digital GMSK modulator, a matched pair of 10-bit DACs and a
matched pair of reconstruction filter.

3.6.2 Baseband Transmit Section

1. This section consists of two identical ADC channels that process baseband in-phase(I) and
quadrature(Q) input signals.

Figure 3-12. AD6537B BASEBAND TRANSMIT SECTION

Digital

Filter

Baseband

Serial

Port

Rx

ADC

BSOFS

BSDO

SC

Filter

Digital

Filter

Rx

ADC

SC

Filter

AD6537B

IP

IN

QP

QN

Othello™

Figure 3-13. AD6537B BASEBAND RECEIVER SECTION

BSIFS

BSDI

CSFS

CSDI

CSDO

AD6537B

Baseband

Serial

Port

Control

Serial

Port

GMSK

Modulator

Ramp

RAM

Tx

DAC

Tx

DAC

Ramp

DAC

SC

Filter

SC

Filter

SC

Filter

Active

CT Filter

Active

CT Filter

Active

CT Filter

PGA

PGA

PGA

IP

IN

QP

QN

PA

3. TECHNICAL BRIEF

- 33 -

3.6.3 Auxiliary Section

1. This section includes an Automatic Frequency Control(AFC) DAC, voltage reference buffers, an
Auxiliary ADC, and light controllers.

• AFC DAC: 13 bits

2. This section also contains AUX ADC and Voltage Reference

• IDAC: 10 bits

• The Auxiliary ADC provides :

- Two differential inputs for temperature sensing.

- A differential input for the battery charger current sensor

Figure 3-14. AD6537B AUXILIARY SECTION

CSFS

CSDI

CSDO

AD6537B

Control

Serial

Port

AFC

DAC

Voltage

Reference

Aux

ADC

REFTXCM

Light

Controllers

AFCDAC

REFBB

REFOUT

REFCHG

REF

TEMP1

TEMP2

AUXADC1

AUXADC2

AIN1P

AIN2P

BATTYPE

ISENSE

VBATSENSE

LIGHT1

LIGHT2

LIGHT3

3. TECHNICAL BRIEF

- 34 -

3.6.4 Audio Section

1. Receive audio signal from microphone. This model uses differential configuration.

2. Send audio signal to speaker. This model uses differential configuration.

3. This section provides an audio codec with a digital-to-analog converter and an analogto-digital
converter, a ring tone volume controller, a microphone interface, and multiple analog input and
output channels.

4. It interconnects with external devices like main microphone, main receiver, and headset.
The descriptions of audio port used in This model are given bellow in detail.

<Up Link>

- AIN1P,AIN1N : Main microphone positive/negative terminal

- AIN2P,AIN2N : Headset microphone positive/negative terminal

- AIN3P,AIN3N : External Analog Input terminal

<Down Link>

- AOUT1P,AOUT1N : Main Speaker positive/negative terminal

- AOUT3P : Headset speaker terminal

Figure 3-15. AD6537B AUDIO SECTION

3. TECHNICAL BRIEF

- 35 -

3.6.5 Power Management

1. Power up sequence logic

1. The AD6537B controls power on sequence

2. Power on sequence

- If a battery is inserted, the battery powers the 8 LDOs.

- Then if PWRONKEY is detected, the LDOs output is turned on.

- REFOUT is also enabled

- Reset is generated and send to the AD6527

Figure 3-16. AD6537B POWER MANAGEMENT SECTION

2. LDO Block

1. There are 8 LDOs in the AD6537B.

- VCORE : supplies Digital baseband Processor core and AD6537B digital core (1.8V, 80mA)

- VMEM : supplies external memory and the interface to the external memory on the digital

baseband processor (1,8V or 2.8V, 150mA)

- VEXT : supplies Radio digital interface and high voltage interface (2.8V, 170mA)

- VSIM : supplies the SIM interface circuitry on the digital processor and SIM card

(1.8V or 2.85V, 20mA)

- VRTC : supplies the Real-Time Clock module (1.8 V, 20 A)

- VABB : supplies the analog portions of the AD6537B

- VMIC : supplies the microphone interface circuitry (2.5 V, 1 mA)

- VVCXO : supplies the voltage controlled crystal oscillator ( 2.75 V, 10 mA)

- 36 -

3. TECHNICAL BRIEF

Figure 3-17. AD6537B POWER MODE LOGIC

3. TECHNICAL BRIEF

- 37 -

3. Battery Charging Block

1. It can be used to charge Lithium Ion and/or Nickel Metal Hydride batteries.
Charger initialization, trickle charging, and Li-Ion charging control are implemented in hardware.

2. Charging Process

- Check charger is inserted or not

- If AD6537B detects that Charger is inserted, the CC-CV charging starts.

- Exception : When battery voltage is lower than 3.2V, the precharge(low current charge mode)

starts firstly.

- And the battery voltage reach to 3.2V the CC-CV charging starts.

3. Pins used for charging

- VCHG : charger supply.

- GATEDRIVE : charge DAC output

- ISENSE : charge current sense input

- VBATSENSE : battery voltage sense input.

- BATTYPE : battery type identification input

- REFCHG : voltage reference output

4. TA (Travel Adaptor)

- Input voltage: AC 85V ~ 260V, 50~60Hz

- Output voltage: DC 5.2V ( 0.2 V )

- Output current: Max 800mA ( 50mA )

5. Battery

- Li-ion battery (Max 4.2V, Nom 3.7V)

- Standard battery: Capacity 1000mAh

Figure 3-18. AD6537B BATTERY CHARGING BLOCK

3. TECHNICAL BRIEF

- 38 -

CLOSE TO AD6537B

39p

C136

10u

39p

C607

C139

39p

C142

C132

39p

T8

SGND1R8SGND2

NC_R12

R12

M2

DGND

C2

GPI

LGND

N15

T11

AOUT3N

K16

J16

AOUT3P

B16

AGND1

R16

AIN1N

P16

AIN1P

AIN2N

R15

AIN2P

P15

AIN3L

R13
R14

AIN3R

AOUT1N

K15

AOUT1P

J15

AOUT2N1

T9

AOUT2N2

R9

AOUT2P1

R11

AOUT2P2

39p

C133C130

39p

R108 4.7

C131

NA

39p

C138

39p

4.7R111

C143

C141

39p

AUXIN
VINNORP
VINNORN

SPKP_P

AUXOP

AUXIP

RCV_N

RCV_P

From Headset

Microphone

To Headse

Speaker

Figure 3-19. C3380 HEADSET SPEAKER CIRCUIT (AD6537B)

CLOSE TO AD6537B

39p

C136

10u

39p

C607

C139

39p

C142

C132

39p

T8

SGND1R8SGND2

NC_R12

R12

M2

DGND

C2

GPI

LGND

N15

T11

AOUT3N

K16

J16

AOUT3P

B16

AGND1

R16

AIN1N

P16

AIN1P

AIN2N

R15

AIN2P

P15

AIN3L

R13
R14

AIN3R

AOUT1N

K15

AOUT1P

J15

AOUT2N1

T9

AOUT2N2

R9

AOUT2P1

R11

AOUT2P2

39p

C133C130

39p

R108 4.7

C131

NA

39p

C138

39p

4.7R111

C143

C141

39p

AUXIN
VINNORP
VINNORN

SPKP_P

AUXOP

AUXIP

RCV_N

RCV_P

COM1

C3

COM2

A3

GND

B1

IN1

C2

IN2

A2

NC1

C1

NC2

A1

NO1

C4

NO2

A4

V+

B4

MAX4684EBC_T

U203

VBAT

1u

C227

SPK_N

SPK_P

RCV_N

RCV_P

SPK_RCV_N

SPK_RCV_SEL

SPK_RCV_P

To Main

Receiver/

Speaker

From Main

Microphone

Figure 3-20. C3380 HEADSET SPEAKER CIRCUIT (AD6537B)

3. TECHNICAL BRIEF

- 39 -

In order to reduce time for trickle charging, additional circuit(Pre-charge circuit) was included.
This circuit has supplied Max 160mA current into the battery additionally.
So call it, it reduce trickle charging time

Figure 3-21. CIRCUIT FOR BATTERY CHARGING AT AD6537B

NORMAL

CHARGING

Pre-CHARGING

NC_T15

VMEMSEL

GND_NET1

NC_G16

VBATSENSE

ISENSE

GATEDRIVE

2V8_VEXT

R610

100K

RPWRON

R224

NC_R1

NC_B7
NC_B5

VCHG

NA

C220
1u

R227
NA

T15
R1

R3
T5
G16

B7
B5

B8
A5
A7
A6

VCHARGE

R219

15

ERHZ0000757

(5%,1/10W)

Q401

56

4

UMX1NTN

VBAT

C125

(1%)

1u

R104 0.2

VBAT

R223

R222

1K

2

31

0

R225

7.5K

R105 330

Q100

G

S

4

D33D4

D5

D2

2

D6

D1

1

TPCF8102-TE85L-F

R226

10K

(2012)

D102

CUS02

5

6

7

8

VCHARGE

LD200

2SC5585

Q200

VCHARGE

R220

3

2

1

R228

20

C126

4.7u

390

3. TECHNICAL BRIEF

- 40 -

3.7 Display and Interface

• Main LCD

• Sub LCD

Controlled by L_MAIN_LCD_CS, LCD_RESET, LCD_RS, LCD_WR, LCD_RD, IFMODE,
L_DATA[00:15] ports

• L_MAIN_LCD_CS : MAIN LCD driver chip enable. MAIN LCD driver IC has own CS pin

• LCD_RST : This pin resets LCD module. This signal comes from DBB directly.

• LCD_RS: This pin determines whether the data to LCD module are display data or control data.

• IFMODE : This can select 16bits or 8bits parallel bus. But for the future.
Default is low (low is 16bits interface)

• L_WR : Write control Signal

• L_RD : Read control Signal. But this pin used only for debugging.

• L_DATA[00:15] : Parallel data lines.

• LCD_ID[1:2] : LCD type selection signals

- LCD_ID1 : LCD maker(2.4V is SII, 0V is HyeLCD)

- LCD_ID[2:3] : for the future using

• For using 65K color, data buses should be 16 bits.

Properties Spec. Unit

Active Screen Size 28.022(H) X 35.03(V) mm

Color Depth 65,536 colors

Resolution 128 X RGB X 160 dots

Pixel Size 0.063(H) X 0.209(V) mm

Properties Spec. Unit

Active Screen Size 18.902(H) X 13.43(V) mm

Color Depth Mono

Resolution 96 X 64 dots

Pixel Size 0.187(H) X 0.2(V) mm

3. TECHNICAL BRIEF

- 41 -

Figure 3-23. LCD INTERFACE CIRCUIT

L_DATA11

L_DATA12

L_DATA13

L_DATA14

L_DATA10

L_DATA09

2

3

INOUT_A2

INOUT_A3

INOUT_B2

INOUT_B3

8

7

1

INOUT_A1

INOUT_B1

9

9

INOUT_B1

INOUT_A1

1

8

2

INOUT_B2

INOUT_A2

7

INOUT_B36INOUT_B4

INOUT_A3

3

4

L_DATA15

G2

G1

INOUT_A4

10

5

ICVE21054E250R401FR

ICVE21184E150R500FR

5

G1

10

FL603

G2

FL605

C_CD00

4

INOUT_A4

INOUT_B4

6

C_CD01

3

INOUT_A3

INOUT_B3

7

C_CD02

2

INOUT_A2

INOUT_B2

8

C_CD03

1

INOUT_A1

INOUT_B1

9

C_CD06

C_CD04

C_CD05

C_CD07

9

8

7

6

ICVE21184E150R500FRFL608

G2

INOUT_B1

INOUT_B2

INOUT_B3

INOUT_B4

10

G1

5

INOUT_A1

INOUT_A2

INOUT_A3

INOUT_A4

1

2

3

4

L_DATA08

4

FL601ICVE21054E250R401FR

5

G1

INOUT_A4

10

G2

INOUT_B4

6

LCD_RD

CAM_DET

MONO_COLOR

100KR602

2V8_VEXT

2V8_VEXT

2V8_VEXT

VGA CAMERA

2V8_C_PWR

128x160 MAIN LCD

2V85_VCAM

R601 100K

R603 100K

CN601

SUB_LCD_DET

R604 470

59660

1

96x64 SUB LCD CONNECTOR

1

2

3

4

FL600

ICVE21054E250R401FR

9

5

G1

INOUT_A1

INOUT_A2

INOUT_A3

INOUT_A4

G2

INOUT_B3

INOUT_B4

6

L_DATA00

L_DATA01

INOUT_B2

8

7

L_DATA02

INOUT_B1

9

L_DATA03

INOUT_B1

INOUT_A1

1

10

LCD_ID3

4

8

7

INOUT_B2

INOUT_A2

2

3

L_DATA04

L_DATA05

FLASH_LED

6

INOUT_B3

INOUT_B4

INOUT_A3

INOUT_A4

4

L_DATA07

L_DATA06

LCD_ID2

5455565758

789

MOTOR

495505152

53

101112131415161718

LCD_MAKER(TO AUXADC1)

R605 100K

LCD_ID1

G2

10

G1

5

FL602

ICVE21054E250R401FR

100

FL604

C601

R606

R607

LCD_RESET

MLED1

MLED2

MLED3

404142434445464748

1922021222324

MLED

BACK_BATT

3

4

5

G1

ICVE21184E150R500FR

INOUT_A3

INOUT_A4

10

G2

INOUT_B3

INOUT_B4

7

6

22p

100K

L_SUB_LCD_CS

L_MAIN_LCD_CS

IFMODE

39

INOUT_A2

INOUT_B2

LCD_WR

2

8

2526272829330 31

1

INOUT_A1

INOUT_B1

9

LCD_RS

9

1

8

INOUT_B1

INOUT_B2

INOUT_A1

INOUT_A2

2

C_PCLK

C_MCLK

7

3

32333435363738

6

INOUT_B3

INOUT_A3

4

C_HS

SPK_RCV_P

SPK_RCV_N

G2

INOUT_B4

G1

5

INOUT_A4

FL606

C_VS

10

1uC605

C604 0.1u

39pC603

C602

39p

4.7KR608

2V8_C_PWR

ICVE21184E150R500FR

R609 4.7K

8

7

6

9

INOUT_B2

INOUT_B3

INOUT_B1

FL607

INOUT_A1

INOUT_A2

INOUT_A3

ICVE21184E150R500FR

1

2

3

4

C_RST

C_SCK

C_SDA

INOUT_B4

INOUT_A4

G2

10

G1

5

3. TECHNICAL BRIEF

- 42 -

3.8 Camera Interface

The CL761A, a camera application processor optimized for the mobile operation, provides various
highly-advanced functions, such as Sensor Interface, Fully-hardwired JPEG Codec, a scalar for Digital
Zoom Function, various LCD Interfaces, Motion JPEG Codec, high-speed Image data processing and
so on.
Also, the CL761A supports 80-Type Indirect Parallel Interface, so developers can easily distinguish
Bypass Mode fron Camera Mode by adding CORE LOGIC’s CL761A chip at the head of the LCD
Interface. In addition, the CL761A supports various types of STN/TFT/OLED LCD Driver Controllers of
8-bpp, 12-bpp, 16-bpp, adn 18-bpp color depths. With the built-in CMOS-/CCD-based Image Sensor
Controller which supports CCIR601 and CCIR656 formats.

CL761A System Architecture Diagram

3. TECHNICAL BRIEF

- 43 -

CAMERA CTL IC

Figure 3-26. CL761S BLOCK DIAGRAM

2V85_VCAM

100K

R402

100K

R403

$V

$V

C_CD00

C_CD01

C_CD02

C_CD03

C_CD04

C_CD05

C_CD06

C_CD07

C_SCK

C_PCLK

C_SDA

C_RST

C_HS

C_VS

C_MCLK

2V8_C_PWR

D

Q402

C407

G

SI1305-E3

$V

0.1u

S

$V

2V85_VCAM

$V

C408
10u

L_DATA00
L_DATA01
L_DATA02
L_DATA03
L_DATA04
L_DATA05
L_DATA06
L_DATA07
L_DATA08
L_DATA09
L_DATA10
L_DATA11
L_DATA12
L_DATA13
L_DATA14
L_DATA15

L_MAIN_LCD_CS

LCD_WR

LCD_RD
LCD_RS

L_SUB_LCD_CS

L2

L10

J9

K10

H8

H9
J10
G10

G9

G8

F8
F10
E10

F9
D10

E9
C10

H2
G1

L1

K2
K1
K3
K9

$V

L_RESET_N
L_DA0
L_DA1
L_DA2
L_DA3
L_DA4
L_DA5
L_DA6
L_DA7
L_DA8
L_DA9
L_DA10
L_DA11
L_DA12
L_DA13
L_DA14
L_DA15
L_DA16
L_DA17
L_CS_N
L_WR_N
L_RD_N
L_ADS
LS_CS_N

100K

J1

GPIO_0H3GPIO_1H1GPIO_2

M_SA0D8M_SA1

M_8BIT

D9

$V

R407

ADD01

M6

M7

T_MODE0

SCAN_EN

M_ADS

C8

B10

ADD01

ADD02

L6

TEST_EN

M_SD0A7M_SD1

B7

DATA00

G2

B8

STROBE

M_SD3B6M_SD4C6M_SD5A4M_SD6B4M_SD7

M_SD2

A6

DATA01

DATA02

DATA03

M10

C9

L3

C_PWDN

CIS_TYPE0

CIS_TYPE1

CIS_TYPE2

EUSY0240501

C4

DATA05

DATA06

DATA07

DATA04

J8

C_D7

U401

M_SD8B3M_SD9

C3

DATA08

M9

C_D5L9C_D6

M_SD10D3M_SD11

A3

DATA09

DATA10

K8

DATA11

C_D2M8C_D3L8C_D4

M_SD12

M_SD13E3M_SD14C1M_SD15

C2

B1

DATA12

DATA13

L7

L4

M5

M4

C_D0K7C_D1

C_SCK

C_SDA

M_CS_N

M_RD_NG3M_RESET_N

F3

E2

D1

_RD

DATA14

DATA15

_LCD_CS

K4

M3

C_RST

C_PCLK

M_WR_N

F1

_WR

CAM_INT

M1

M2

C_VS

C_HS

C_MCLK

GNDC1
GNDC2
GNDC3
GNDC4
GNDC5

M_HOLDE1M_INTR

MS_CS_N

A9

_SUB_CS

CAM_RST

CAM_HOLD

VDDS

VDDL

VDDI1
VDDI2

VDDC1
VDDC2
VDDC3
VDDC4

GNDI1
GNDI2
GNDI3
GNDI4

XOUT

2V85_VCAM

K5

C409

J2

0.1u
$V

$V

B9
C7

A8
A10
D2
H10

B2
E8
J3
K6
A5
B5
C5
F2
L5

A2

XIN

A1

$V

R408

100K

C414

4.7u

$V

1608

C410

C411

0.01u

C413

C412

1u

1u

1u

$V

$V

$V

C415

0.01u

$V

26MHz

3. TECHNICAL BRIEF

- 44 -

3.9 Keypad Switches and Scanning

The key switches are metal domes, which make contact between two concentric pads on the keypad
layer of the PCB when pressed. There are 27 switches (Normal Key 24EA, Camera side key, Volume
up down side key), connected in a matrix of 5 rows by 5 columns and additional GPIO 35 for
KEY_ROW5, as shown in Figure 3-24, except for the power switch (KB1), which is connected
independently. Functions, the row and column lines of the keypad are connected to ports of AD6527.
The columns are outputs, while the rows are inputs and have pull-up resistors built in.
When a key is pressed, the corresponding row and column are connected together, causing the row
input to go low and generate an interrupt. The columns/rows are then scanned by AD6527 to identify
the pressed key.

Figure 3-27. Keypad Switches and Scanning

POWERKEY

680R302

KEY_ROW0

KEY_ROW1

KEY_ROW2

KEY_ROW3

KEY_ROW4

KEY_ROW5

KEY_COL0

KEY_COL1

KEY_COL2

KEY_COL3

KEY_COL4

VBAT

R301

10K

SW305

END

R324 680

R340

R343 680

R344

R345

CAMERA

SW300

VA303

680R316

ECVAS1005-14A30-120NBT

680R330

680R335

680R338

680

680R342

680

680

680R346

R304

100

SW301

VA304

ECVAS1005-14A30-120NBT

VOL_UP

VA301

R305

100

ECVAS1005-14A30-120NBT

1

SW308 SW312

SW313

4

SW318

7

SW323

*

SW328

T

R303

100

SW309

SW314

SW319

SW324

0

VOL_DOWN

SW304

VA302

R307

100

ECVAS1005-14A30-120NBT

2

8

SW303SW302

VA300

R306

100

ECVAS1005-14A30-120NBT

3

SW310

SW315

65

9

SW325

#

CLR

SW306

LEFT

SW311

SW316

UP

SW321SW320

RIGHT

SW326

DOWN

VA307

ECVAS1005-14A30-120NBT

FAV

SW307

MENU

SW317

SEL

SW322

SEND

SW327

CONF

VA308

ECVAS1005-14A30-120NBT

3. TECHNICAL BRIEF

- 45 -

3.10 Microphone

The microphone is placed to the front cover and soldered to main PCB. The audio signal is passed to
AIN1P and AIN1N pins of AD6537B. The voltage supply VMIC is output from AD6537B, and is a
biased voltage for the AIN1P. The AIN1P and AIN1N signals are then A/D converted by the voice­band ADC part of AD6537B.The digitized speech (PCM 8KHz ,16KHz) is then passed to the DSP
section of AD6527 for processing (coding, interleaving etc).

3.11 Main Speaker

In the case of C3380 , there are 3 different speakers. One is main speaker for the received voice, the
other is loud speaker for playback of ring tone , key tone and other MIDI sounds and another is
headset speaker.
The main speaker is driven directly by AD6537B AOUT1P and AOUT1N pins and the gain is controlled
by the PGA in an AD6537B. The receiver is placed in the folder cover and connected to AOUT1x
terminal via FPCB.

Figure 3-28. Connection between Microphone and AD6537B

2V5_VMIC

R201

1K

VINNORP

VINNORN

C210

39p

R211 100

R206

2.2K

100R208

0R209

0.1uC212

R213

2.2K

C202
39p

39pC216

C203
10u

C215 39p

C211

39p

AVL5M02-200VA202

MIC200

SOB-413S44-RC3310

AVL5M02-200

VA203

1
2

CLOSE TO MIC

3. TECHNICAL BRIEF

- 46 -

3.12 Headset Interface

This phone chooses a 5 pin type headset which has 6 electrodes such as GND, AUXIP, AUXIN (this
pin is floating), AUXOP, JACK_DETECT, HOOK_DETECT. This type supports mono sound

Switching from Receiver to Headset Jack

If jack is inserted, JACK_DETECT goes from low to high.
Audio path is switched from receiver to earphone by JACK_DETECT interrupt.

Switching from Headset Jack to Receiver

If jack is removed, JACK_DETECT goes from high to low.
Audio path is switched from earphone to receiver by JACK_DETECT interrupt.

Hook detection

If hook-button is pressed, HOOK_DETECT is changed from high to low.
This is detected by AUXADC2.
And then hook is detected.

Figure 3-29. HEADSET JACK INTERFACE

JACK_DETECT

L

H

CLOSE TO EARJACK

AUXIN

2V8_VEXT

C213

39p

U202

LMV7291MGX-NOPB

JACK_DETECT

REMOVE

INSERT

5

4

VCC

1

OUT

3

GND

2

2V5_JACK

R202

1K

R204

1.5K

R205 12K

C209

22u

C214 33u

0.1uC606

C217 39p

2V8_VEXT

VIN-

VIN+

R210

R216

330K

NA

AUXOP

AUXIPAUXIP

R207

R203

20K

C208

NA

NA

C201

0.1u

C207

1M

C206

0.1u

R212 4.7

R214 4.7

1MR217

HOOK_DETECT

C219 39p

VA204

AVL5M02-200

5
1
3
4

2

J200

3. TECHNICAL BRIEF

- 47 -

3.13 Key Back-light Illumination

In key back-light illumination, there are 12 Blue LEDs in Main Board, which are driven by
KEY_BACKLIGHT signal from AD6527.

Figure 3-30. KEY BACK-LIGHT ILLUMINTION

VBAT

75

1uC318

C317 1u

1uC307

1uC308

1u

C309

1uC378

C379 1u

75

R347

LD300

LEBB-S14H

75

R391

LD301

LEBB-S14H

R392

LD302

LEBB-S14H

KEY BACKLIGHT

75

75

R349

LD304

LEBB-S14H

R350

LD305

R348

LD303

LEBB-S14H

75

R351

LD306

LEBB-S14H

75

LEBB-S14H

VBAT

75R352

LD307

LEBB-S14H

R353 75

LD308

LEBB-S14H

75R354

LD309

LEBB-S14H

R355 75

LD310

LEBB-S14H

75R356

LD311

LEBB-S14H

75R357

LD312

LEBB-S14H

R358 75

LD313

LEBB-S14H

1u

C310

1u

C311

1u

C312

1u

C313

1u

C314

1u

C315

1u

C316

Q301

31

4

56

IMX9T110

2

C323 27p

R364 10

R363 10

KEY_BACKLIGHT

R362 12K

27p

C324

R365 12K

R367 10

R366 10

3. TECHNICAL BRIEF

- 48 -

3.14 LCD Back-light Illumination

LCD backlight LEDs is controlled by DBB via AAT2807, U402.

Figure 3-31. MAIN LCD BACKLIGHT ILLUMINATION

WHITE/FLASH LED LDO

C_FLASH

LCD_DIM_CTL

C419

1u

VBAT

R405

1.5K

R406

7.5K

16

10

$V

4

9

1uC416

11

C1+

VIN

GND
PGND

EN_FLSH

EN_SET

1uC418

C417 1u

12

14

15

2

C1-

C2-

C2+

C3+

VOUT_FL

VOUT_BL

U404

AAT2807AIXN-4.5

1

ISINK1
ISINK2
ISINK3

C3-

NC

3

13

817

5
6
7

1uC420

1uC421

FB400

FB403

MLED1
MLED2
MLED3

22R404

FLASH_LED

MLED

3. TECHNICAL BRIEF

- 49 -

3.15 VIBRATOR

The vibrator is placed in the folder cover and contacted to LCD MODULE. The vibrator is driven from
VIBRATOR (GPIO_3) of AD6527.

Figure 3-32. MOTOR

VIBRATOR

VBAT

220

R370

R368

47K

1.5KR371

4.7u

C325

VBAT

R372

7.5K

23

64

1

5

EMZ2

Q300

R369

20

MOTOR

VIBRATOR

3. TECHNICAL BRIEF

- 50 -

3.16 BLUETOOTH

1) U204(BH28FB1WHFV) : Provide power for bluetooth block

2) U205(TC7SH08FS) : PCM Sync Clock rate converter for bluetooth clock(8kHZ)

3) U206(MAX4717EBC_T) : Analog switch for bluetooth block

4) M201(LBMA-2C67B2) : Bluetooth module

BLUETOOTH

PCM_TX

USC3

U205

TC7SH08FS

2V8_VBT

1

3

BT_EN

C228

0.1u

5

VCC

4

GND

2

C222
15p

PCM_EN

VBAT

R221

330

C223

2.2u

PCM_SYNC8

U206

MAX4717EBC-T

USC1

USC2

C224

0.1u

R239

U204

3
2
1

BH28FB1WHFV

2V8_VMEM

C2

IN1

A2

IN2

C3

COM1

A3

COM2

10K

VIN
GND
STBY

2V8_VBT

VOUT

4

BGND

6

NC

5

C225

C226

2.2u

15p

5

_BT_RST

C232

0.1u

B4

V+

C4

NO1

NO2

NC1

NC2

GND

B1

PCM_RX

A4

PCM_TX

C1

USC_1

A1

USC_2 PCM_SYNC8

R229

0

C229
NA

16

10

28

13
14
12
15

1
2
7
8
9

RESETB

PIO0
PIO1
PIO2
PIO3
PIO4
PIO5

NC

SPI_CLK
SPI_CSB
SPI_MOSI
SPI_MISO

LBMA-2C67B3M201

ANT

VDD_1_8V

VDD_DIG

VDD_VREGIN

GND1
GND2
GND3
GND4

UART_TX

UART_RX
UART_RTS
UART_CTS

PCM_IN

PCM_OUT

PCM_SYNC

PCM_CLK

L515
NA

R218

33p

22
21
3

4
6
11
25

27
24
23
26

19
17
18
20

L511

22nH

R234 47

ANT201

FEED

47R230
47R231

47R235
47R236
47R238

NC1

NC2

2V8_VBT

C230

2.2u

DEBUG_RX
DEBUG_TX

PCM_TX
PCM_RX

USC0

C231

2.2u

3. TECHNICAL BRIEF

- 51 -

Bluetooth Module Features

- Output power(Class2) : 1.0 dBm Typ.

- Receiver Sensitivity : -83 dBm Max.

- Dimensions : 6.9*7.9*1.5 (unit: mm)

- Wide operating temperature range(Target) : -40 to85C (Storage: -40 to 100C)

- D.C Supply voltage range : 1.8V or 3.0V(Nominal)

- Interfaces : UART and SPI for data and PCM for voice

- Stack layer : HCI or RFCOMM

- Compatibility with Bluetooth Specification 1.2

4. TROUBLE SHOOTING

- 52 -

4.1 RX Trouble

4. TROUBLE SHOOTING

U501

U505

FL500

U503

X500

SW500

(1) Checking

Regulator Circuit

(2) Checking

VCTCXO Circuit

(3) Checking

Ant SW & Mo bile SW

(4)

Checking

SAW Filt er Circuit

(5) Checking

RX IQ

Figure 4-1(a)

Test Points

4. TROUBLE SHOOTING

- 53 -

Checking Flow

START

HP8960 : Test mode

62 CH, 7 level setting (TCH)

62CH, -60dBm setting (BCCH)

Spectrum analyzer setting

Oscilloscope setting

Check

regulator circuit

Check

VCTCXO

Check
ANT SW &
Mobile SW

Check

SAW filter

circuit

Check

RX IQ

Re-download SW or

Do calibration again

(1) Checking Regulator Circuit

4. TROUBLE SHOOTING

- 54 -

Figure 4-2

RF_LDO

(1608)

(1608)

RF2.85V

VBAT

C536

4.7u

4.7u

C537

4

BYP EN

3

GND

2

1

IN

5

OUT

22n

C535

U503

MIC5255-2.85BM5

CLKON

Regulator Circuit is OK

See next Page to check

VCTCXO

Voltage at

Pin5 of U503

Is 2.8V?

Level at

Pin3 of U503

Is high?

YES

NO

Replace U503

YES

NO

Change main board

Test Points

Circuit Diagram

Checking Flow

U503.5

U503.3

U503

4. TROUBLE SHOOTING

- 55 -

(2) Checking VCTCXO Circuit

X500.3

X500.4

X500

Figure 4-3

Test Points Checking Flow

Circuit Diagram

Waveform

Check Pin 3.

Refer to Graph 4-1(b)

26 MHz OK?

NoNo

VCTCXO Circuit is OK
See next Page to check
ANT SW & Mobile SW

Yes

Check Pin 4.

Refer to Graph 4-1(a)

2.7V OK?

No

Yes

Change X500

Check U101, PMIC

0.1u

C531

10K

R511

C533

2.2u

R510

100

100p

C530

GND

2

OUT

3

4

VCC

VCONT

1

X500

26MHz

2V75_VVCXO

AFC

Graph 4-1(a) Graph 4-1(b)

(3) Checking Ant SW & Mobile SW

4. TROUBLE SHOOTING

- 56 -

Figure 4-5

ANT SW Control GSM& DCS RX Mode

Graph 4-3

Table 4-2

Test Points

Circuit Diagram Waveform

ANT_SW1 ANT_SW2

GSM_TX H L

DCS_TX L H

RX L L

SW500.

RF

FL500

SW500

C532(VC2)

C534(VC1)

FL500. 10

FL500. 1

L510

3.3nH

SW500
ENWY0002201

ANT500

G1

C501

1.2p

L500

22nH

ANT

G2

RF

C508

22p

ANT501 ANT502

FL301. 10

VC1

VC1

VC1

VC2

VC2

VC2

Low

Low

Low

Low

Low

Low

FL500

8

ANT

4

GND1

6

GND2

7

GND3

9

GND4

12

GND5

13

GND6

14

GND7

VC111VC2

2

EGSM_TX

DCS_TX

EGSM_RX

DCS_RX

SHS-C090DR

5
3

10
1

C513

NA

C517

NA

C524

EFCH942MTCA7

27p

EFCH1842TCA7

L507

33nH

10pC532

L508

33nH

3.3pC534

ANT_SW2

ANT_SW1

GPO_11

GPO_9

4. TROUBLE SHOOTING

- 57 -

Checking Flow

Table 4-2

ANT_SW1 ANT_SW2

GSM_TX H L

DCS_TX L H

RX L L

For these 2 test case,

No Call connection is needed

Check SW500 Pin ANT,RF

with RF Cable connected.

Check SW500 Pin ANT,RF

with No RF Cable Connected

Check C532,C534

Check whether Ant SW

Set as RX mode

RRefer to Table 4-2

Check RF Level of

FL500.10 (for GSM) &

FL500.1(for DCS)

For this RF Level test case,

RX Stand alone Mode is needed

refer to chapter 11

Open

Yes

Short

Yes

VC1 :Low
VC2 :Low

Yes

Pin10 : ~ -62dBm
Pin 1 : ~ -63dBm

Yes

Ant SW & Mobile SW is OK

See next Page to check

Rx IQ Signal

No

No

No

No

Change SW500

Change SW500

Change the Main Board

Change FL500

(4) Checking SAW Filter Circuit

4. TROUBLE SHOOTING

- 58 -

Test Points

Checking Flow

Circuit Diagram

Figure 4-6

FL401

Soldering chec

FL402

k

FL401

FL402

EFCH942MTCA7

EFCH1842TCA7

3

2
G1

O1

1

IN

FL401

G2

O2

5

4

3

2

O1

G1

1

IN

FL402

G2

O2

5

4

C523

C525

C526

C529

1p

1p

1p

1p

L501

27nH

L503

6.8nH

Check RF Level of
Saw Filter Input
For GSM : FL401.3
For DCS : FL402.3

For the test,
RX Stand alone Mode is
needed. Refer to chapter

FL401.3: ~ -64dBm
FL402.3: ~ -64dBm

Yes

Saw Filter is OKSaw Filter is OK
See next Page to check
Rx IQ Signal

No

Soldering is

OK?

NoNo

Change
L501,C523,C525 for GSM
L503, C526,C529 for DCS

Check the parts are well Soldered
For GSM : L501,C523,C525
For DCS : L503, C526,C529

Yes

Change
FL401 for GSM
FL402 for DCS

4. TROUBLE SHOOTING

- 59 -

(5) Checking RX IQ

Re-download software and calibration again

Similar?

No

Replace U505

Yes

No

Check C518,C521
Check if there is any
Major difference
Refer to graph 4-4

U505

U101

C518

C521

C518 39p

TXIP

4

TXQN

7

TXQP

6

32

VDD2

27

RXIN

3

2

RXIP

1

RXQN

28

RXQP

TXIN

5

GND2

29

30

GND3

GND4

31

C521 39p

IP

QP

QN

IN

Test Points

Checking Flow

Waveform

Circuit Diagram

Figure 4-7

Graph 4-4

4. TROUBLE SHOOTING

- 60 -

4.2 TX Trouble

Figure 4-8

Test Points

(3) Chec ki ng

Ant SW & Mobile SW

(2) Checki ng

VCTCXO Circuit

(1) Checki ng

Regulator

Circ uit

SW500

X500

U503

FL500

U505

(5) Chec ki ng

TX IQ

U501

(4) Checki ng P AM

Cont r ol Signal

4. TROUBLE SHOOTING

- 61 -

Checking Flow

START

Check

regulator circuit

Redownload SW or
Do calibration again

HP8960 : Test mode

62 CH, 7 level setting (TCH)

62CH, -60dBm setting (BCCH)

Spectrum analyzer setting

Oscilloscope setting

Check

VCTCXO

Check

PAM control

signal

Check

TX IQ

Check
ANT SW &
Mobile SW

(1) Checking Regulator Circuit

4. TROUBLE SHOOTING

- 62 -

Test Points

Circuit Diagram

Checking Flow

Figure 4-2

U503.5

U503.3

U503

RF2.85V

C536

4.7u

(1608)

Voltage at

Pin5 of U503

Is 2.8V?

C535

22n

5

OUT

4

BYP EN

MIC5255-2.85BM5

NO

U503

1

IN

2

GND

3

Level at

Pin3 of U503

Is high?

VBAT

C537

4.7u

(1608)

RF_LDO

CLKON

NO

Change main board

YES

Regulator Circuit is OK

See next Page to check

VCTCXO

YES

Replace U503

4. TROUBLE SHOOTING

- 63 -

(2) Checking VCTCXO Circuit

X500.3

X500.4

X500

Check Pin 3.

Refer to Graph 4-1(b)

26 MHz OK?

NoNo

VCTCXO Circuit is OK
See next Page to check
ANT SW & Mobile SW

Yes

Check Pin 4.

Refer to Graph 4-1(a)

2.7V OK?

No

Yes

Change X500

Check U101, PMIC

0.1u

C531

10K

R511

C533

2.2u

R510

100

100p

C530

GND

2

OUT

3

4

VCC

VCONT

1

X500

26MHz

2V75_VVCXO

AFC

Test Points

Circuit Diagram

Waveform

Checking Flow

Figure 4-3

Graph 4-1(a) Graph 4-1(b)

(3) Checking Ant SW & Mobile SW

4. TROUBLE SHOOTING

- 64 -

Figure 4-5

Graph 4-6(b)

Graph 4-6(a)

Test Points

Circuit Diagram

Waveform

L510

3.3nH

SW500
ENWY0002201

ANT500

G1

C501

1.2p

L500

22nH

ANT

G2

RF

C508

22p

ANT501 ANT502

SW500.

RF

C532(VC2)

SW500

C534(VC1)

FL500

FL500. 3

FL500. 5

FL500

8

ANT

4

GND1

6

GND2

7

GND3

9

GND4

12

GND5

13

GND6

14

GND7

VC111VC2

2

EGSM_TX

DCS_TX

EGSM_RX

DCS_RX

SHS-C090DR

5
3

10
1

L507

33nH

10pC532

L508

33nH

3.3pC534

ANT_SW2

ANT_SW1

C513

NA

C517

NA

C524

EFCH942MTCA7

27p

EFCH1842TCA7

GPO_11

GPO_9

4. TROUBLE SHOOTING

- 65 -

Checking Flow

Table 4-3

ANT_SW1 ANT_SW2

GSM_TX H L

DCS_TX L H

RX L L

Check C532,C534
Check whether Ant SW
Set as TX mode

Refer to Graph4-6
Refer to Table 4-3

For the test,

TX Stand alone Mode is needed.

Refer to chapter 11 (PL=7 for GSM, PL=2 for DCS)

Check VC1, VC2

Yes

No

Change board

Check RF Level of
FL500 Pin 5 (for GSM)
& Pin 3 (for DCS)

Check SW500. ANT, RF
with RF Cable connected.

Check SW500. ANT,RF
with RF Cable disconnected

Pin5 : ~29.5dBm
Pin3 : ~26.5dBm

Yes

Open

Yes

Short

Yes

END

No

No

No

Check PAM control signal

Change SW501

Change SW501

(4) Checking PAM Control Signal

4. TROUBLE SHOOTING

- 66 -

Test Points

Waveform

Checking Flow

Circuit Diagram

Graph 4-7

Figure 4-12

U501

TX_RAMP

(R509)

PA_EN

(R502)

C505
12p

RSVD

15

GSM_OUT

17

C504

C506

C507

18p

0.01u

23

14

21

GND5

GND616GND718GND8

GND9

PGND

SKY77325

U501

VAPC20VBATT3VCC1A

VSENSE

22

19

C519

0.01u

R509 1K

C522

39p

VBAT

C503

33p

22u

7

10

11

13

GND19GND2

GND3

GND4

BS

4

PAC_ENABLE

2

GSM_IN

DCS_PCS_INDCS_PCS_OUT

NC

1

VCC1B

8

C520

0.01u

TX_RAMP

612

5

R504
150

100R501

C502

27p

R502 100

C509

27p

R503

36

R505
150

R506

30

R507

R508

180

180

PA_BAND

PA_EN

GPO_17

GPO_16

Check TX_RAMP and PA_EN
Check if there is
Any Major Difference or not

Refer to Graph 4-7

Similar?

Similar?

Similar?

Yes

Yes

Yes

Go to Next Step

No

No

No

Re-download S/W

4. TROUBLE SHOOTING

- 67 -

(5) Checking TX IQ

U505

U101

C518

C521

C518 39p

TXIP

4

TXQN

7

TXQP

6

32

VDD2

27

RXIN

3

2

RXIP

1

RXQN

28

RXQP

TXIN

5

GND2

29

30

GND3

GND4

31

C521 39p

IP

QP

QN

IN

Check if there is
Any Major Difference or not

Refer to Graph 4-8

Similar?

Yes

No

Similar?

Yes

No

Replace U102

Re-download the Software
And calibrate

Similar?

Yes

No

Test Points Circuit Diagram

Waveform

Checking Flow

Figure 4-13

Graph 4-8

4.3 Power On Trouble

4. TROUBLE SHOOTING

- 68 -

Test Points

Circuit Diagram

Figure 4-14

C122

(VEXT)

C121

(VVCXO)

C117

(VABB)

C113

(VCORE)

C114

(VMEM)

C115

(VRCT)

C116

(VSIM)

VBAT_NET

VCORE1
VCORE2

VMEM1
VMEM2

VRTC

VSIM

VABB

VMIC

VVCXO

NC_E15

VEXT1
VEXT2

NC_E16
NC_F16

1V8_VCORE

P1
N1
T3
T2
T7
T6
H16
N16
D16
E15
A4
B4
T4
E16
F16

1V8_VRTC

2V8_VMEM

2V85_VSIM

2V75_VABB

U102

2V5_VMIC

2V75_VVCXO

VBAT

2V8_VEXT

1KR102

C113 1u

1uC114

C115

0.1u
1uC116

C117 2.2u

1uC118
1uC121

C122 1u

C118

(VMIC)

BACK_BATT

(1608)

4. TROUBLE SHOOTING

- 69 -

Checking Flow

START

Check Battery Voltage

> 3.35V ?

YES

Push power-on key

And check the level change

of PWRKEY

YES

Check the voltage of

The LDO outputs at U102

YES

Logic level at KEYON of U102

= HIGH

YES

Does it work properly?

NO

NO

NO

VCORE=1.8V VVCXO=2.75V
VMEM=2.8V VRTC=1.8V
VEXT=2.8V VSIM=1.8V or 2.85V
VABB=2.75V VMIC=2.5V

NO

NO

Charge or Change Battery

Check the contact of power key

Or dome-switch

Replace U102

Re-download software

Does it work properly?

YES

THE PHONE WILL

POWER ON.

The power-on procedure is

Completed. The problem may

be elsewhere.

NO

Replace the main board

4. TROUBLE SHOOTING

- 70 -

4.4 Charging Trouble

Q100

R105

R104

D102

(2012)

(1%)

C125

1u

CUS02

D102

A5

VCHG

VMEMSEL

R3

VBATSENSE

B8

NC_B5

B5

NC_B7

B7

G16

NC_G16

R1

NC_R1

T15

NC_T15

GATEDRIVE

A6

T5

GND_NET1

A7

ISENSE

4.7u

C126

VBAT

4

S

5

Q100

TPCF8102-TE85L-F

D1

1

D2

2

D33D4

6

D5

7

D6

8

G

R104 0.2

R105 330

VCHARGE

Test Points

Circuit Diagram

Figure 4-15

4. TROUBLE SHOOTING

- 71 -

Checking Flow

START

I/O Connector(CN300)

Is well-soldered ?

YES

Voltage at anode of

D102 = 5.2V ?

YES

Q100,D102,R104 are

well-soldered?

YES

Voltage across R104 is

about 10~100mV?

YES

0.7V < voltage(R105) < 1.3V?

YES

Battery is charged?

NO

NO

NO

NO

NO

NO

Re-solder the CN300

Pin 4,5 : VCHARGE

Pin12,19 : GND

The TA is out of order

Change the TA

Re-solder the

Q100, D102, R104

Replace the
Q100, D102

Replace the

Q100

The battery may have

problems.

Change the battery.

YES

Charging is

properly operating

4. TROUBLE SHOOTING

- 72 -

4.5 Vibrator Trouble

Soldering C heck in LC D Module

R372

R371 R368

R369

Q300

VIBRATOR

VBAT

220

R370

R368

47K

1.5KR371

4.7u

C325

VBAT

R372

7.5K

23

64

1

5

EMZ2

Q300

R369

20

MOTOR

VIBRATOR

Test Points

Circuit Diagram

Figure 4-16

4. TROUBLE SHOOTING

- 73 -

Checking Flow

SETTING : Enter the engineering mode, and set vibrator on at vibration of BB test menu

START

Is the voltage at pin 3

of Q300 high ?

YES

Is the voltage at pin 2

of Q300 low ?

YES

Is the voltage at pin 1

of Q300 high ?

YES

Check the soldering

of CN601 ?

YES

Check the soldering

of vibrator ?

NO

NO

NO

NO

NO

Check the soldering

of R371, R372

YES

Check the soldering

of R368

YES

Check the soldering

of R369

YES

Replace Q300

NO

Re-solder R371, R372

NO

Re-solder R368

NO

Re-solder R369

Re-solder CN601

Re-solder vibrator

YES

Replace Vibrator

YES

Vibrator is

Working well !!!

4. TROUBLE SHOOTING

- 74 -

4.6 LCD Trouble

FL602

FL600

FL604

FL601

FL603

CN601

Test Points

Figure 4-17

LCD Module

LCD Module connection

connector( 4 0Pin, m ale )

Camera Module conne ction

Connect or ( 20Pin, f emal e )

4. TROUBLE SHOOTING

- 75 -

Checking Flow

START

Is the connection of

FPCB with connector on

PCB(CN601) ok ?

YES

Check the connection LCD

module with connector

On FPCB ?

YES

Check the soldering of

CN601 ?

YES

Change the FPCB and try again

YES

Check the soldering of

EMI filter ?

YES

NO

NO

NO

NO

Reassemble FPCB with CN601 connector

Reassemble LCD module with connector on FPCB

Re-solder CN601

Re-solder EMI filter(FL600~FL604)

Does LCD work

properly ?

YES

LCD is working well

NO

Replace LCD module

4. TROUBLE SHOOTING

- 76 -

4.7 Camera Trouble

Camera Module

Camera

Mod ule

Connector

( 20Pin, m ale )

Q402.1

(C_PWDN)

Q402.3

(2V8_C_PWR)

Q402

U401

FL606

FL607

FL608

FL606

Test Points

Figure 4-18

1608

C411

1u

$V

0.1u

C409

$V

C407

0.1u

$V

2V85_VCAM

0.01u

$V

C415

100K

R403

$V

C413

1u

$V

0.01u

C410

$V

C408

$V

2V8_C_PWR

10u

2V85_VCAM

$V

100K

R402

C412

1u

$V

Q402

$V

D

G

S

2V85_VCAM

SI1305-E3

C414

4.7u

$V

B9

VDDI1

C7

VDDI2

VDDL

J2

K5

VDDS

XIN

A2
A1

XOUT

SCAN_EN

M6

STROBE

G2

TEST_EN

L6

M7

T_MODE0

VDDC1

A8

VDDC2

A10

VDDC3

D2

VDDC4

H10

J3

GNDI3
GNDI4

K6

J1

GPIO_0H3GPIO_1H1GPIO_2

C_D7

J8

C_HS

K4

M1

C_MCLK

C_PCLK

L4

L3

C_PWDN

M3

C_RST

M5

C_SCK

C_SDA

M4

C_VS

M2

A5

GNDC1

B5

GNDC2

C5

GNDC3
GNDC4

F2
L5

GNDC5

GNDI1

B2

GNDI2

E8

U401

EUSY0240501

CIS_TYPE0

M10

C9

CIS_TYPE1

CIS_TYPE2

B8

L7

C_D0K7C_D1

C_D2M8C_D3L8C_D4

K8

M9

C_D5L9C_D6

26MHz

C_CD00

C_CD01

C_CD02

C_CD03

C_CD04

C_CD05

C_CD06

C_CD07

C_HS

C_MCLK

C_PCLK

C_RST

C_SCK

C_SDA

C_VS

Circuit Diagram

4. TROUBLE SHOOTING

- 77 -

Checking Flow

START

Does the LCD itself

Has no trouble ?

YES

Change the camera

module, Does it work

properly ?

YES

Itís camera moduleís problem

Replace the camera module

Check the voltage of pin 12 of

CN601 if 3V ?

NO

NO

Go to the LCD trouble

Check the voltage

Q400 is 3V ?

YES

NO

Check the soldering

of pin 3 of

of CN601 ?

YES

Replace the U401

NO

NO

Check the voltage

of pin 1 of Q400 (C_PWDN)

YES

Replace the Q400

NO

Replace the Q400

LOW ?

YES

Check the signals of the

FL605~FL608

YES

Camera will work properly

NO

Does the image

appears on LCD ?

Replace

FL605~FL608

YES

Camera will work properly

4. TROUBLE SHOOTING

- 78 -

4.8 Speaker Trouble

Soldering Check

U207

C237

(SPK_N)

C241

C238 (SPK_P)

Test Points

Circuit Diagram

Figure 4-19

2V85_VCAM

20K

R232

2V85_VCAM

47p

C238

C239 0.1u

R237

24K

C237
47p

0.1u

C240

0.1u

C233

VSS

_CS

29

_IRQ

3

31

_RD

4

_RST

28

_WR

12

EQ2

13

14

EQ3

HPOUT_L

10

HPOUT_R

11

IOVDD

32

2

LED

MTR

19

NC

5

6

PLLC

SPOUT1

17

18

SPOUT2

15

SPVDD

16

SPVSS

VDD

7

VREF

9

8

30

A0

1

CLK1

D0

27

D1

26

D2

25

D3

24
23

D4

22

D5

21

D6

20

D7

EQ1

YMU762C-QZE2

U207

C236
1000p

82K

R240

C235
390p

0.01u

C234

C242
1u

VBAT

R233 0

1u

C241

R241

3.3K

SPK_P

SPK_N

13MHz

SPKP_P

ADD00

DATA08
DATA09
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15

_MIDI_CS

_MIDI_IRQ

_RD

_MIDI_RST

_WR

4. TROUBLE SHOOTING

- 79 -

Checking Flow

START

Voltage across C241

= 2.8 V?

Yes

Check the soldering of

C237, C238

Yes

Check the signal level of

C237, C238

Yes

Check the state of

contact of dual mode speaker

Yes

No

No

No

No

Check the soldering of

C241

Yes

Re-soldering

C241

Re-soldering

C237, C238

Re-solder C237,

C238 or Replace

U207

Replace speaker

No

Replace C241

Speaker is

Working well !!

4. TROUBLE SHOOTING

- 80 -

4.9 SIM Card Interface Trouble

C230 (J300.1)

J300

SIM CONNECTOR

VCC

1

VPP

5

J300

3

CLK

4

GND

I_O

6

2

RST

2V85_VSIM

220n

C320

C321 22p

2V85_VSIM

0R361

1000pC322

20K

R359

C319 NA

0R360

SIM_RST

SIM_DATA SIM_CLK

Test Points

Circuit Diagram

Figure 4-20

4. TROUBLE SHOOTING

- 81 -

Checking Flow

START

Does the SIM cards

supports 3V ?

YES

Voltage at pin1 of

J300 is 3V?

YES

Change the SIM Card

And try again.

Does it work

Properly?

YES

Change SIM Card

NO

NO

NO

Change the SIM Card. Our phone

Is supported only 3V SIM card.

Voltage output

of VSIM LDO

Is 3V?

YES

Replace J300

Re-download SW.

Does it work

Properly?

YES

SIM Card will be detected.

YES

NO

Re-solder J300

Change the main board

4. TROUBLE SHOOTING

- 82 -

4.10 Earphone Trouble

C209

U202

J200

H

L

CLOSE TO EARJACK

JACK_DETECT

REMOVE

INSERT

C219 39p

C208

NA

1

2

3
4

5

J200

C206

0.1u

39p

C213

R214 4.7

C209

22u

2V5_JACK

GND

2

OUT

1

VCC

5

VIN+

3

4

VIN-

LMV7291MGX-NOPB

U202

2V8_VEXT

1M

R210

2V8_VEXT

R202

1K

C214 33u

NA

R207

C217 39p

R204

1.5K

R203

20K

R212 4.7

1MR217

VA204

AVL5M02-200

0.1u

C201

330K

R216

0.1uC606

R205 12K

NA

C207

HOOK_DETECT

AUXIPAUXIP

AUXIN

JACK_DETECT

AUXOP

Test Points

Circuit Diagram

Figure 4-21

4. TROUBLE SHOOTING

- 83 -

Checking Flow

START

Resolder J200

Does the audio

profile of the phone

change to the

earphone mode?

YES

Set the audio part of the test

Equipment to echo mode

Can you hear your

voice from

the earphone?

YES

Earphone will work properly

NO

NO

Level at pin1

of U201 is high

YES

Change the earphone

and try again

Can you hear your

voice from

the earphone?

YES

Change earphone

YES

NO

Set the audio part of

the test equipment to

PRBS or continuous

Download software.

Does it work well?

Replace U201

wave mode

Can you hear

the sound from

the earphone?

YES

Resolder component

Download software

No

Voltage at

C209

=1.2V ?

YES

Check soldering

C209

R210

YES

NO

Change the main board.

Change the main board.

4. TROUBLE SHOOTING

- 84 -

4.11 KEY backlight Trouble

Test Points

Figure 4-22

4. TROUBLE SHOOTING

- 85 -

Circuit Diagram

START

Is the level at R362

High?

NO

Check U101

YES

Are all LEDs

Working?

NO

YES

Check the soldering

each R and LED

Backlight will work properly.

NO

Replace or re-solder

component

Checking Flow

1uC318

C317 1u

1uC307

1uC308

1u

1uC378

C309

KEY_BACKLIGHT

C379 1u

VBAT

75

R347

LD300

LEBB-S14H

75

R391

LD301

LEBB-S14H

75

R392

LD302

LEBB-S14H

R362 12K

KEY BACKLIGHT

75

75

R348

R349

R350

LD304

LEBB-S14H

27p

R365 12K

LD305

LEBB-S14H

C324

R366 10

LD303

75

R351

LD306

LEBB-S14H

R367 10

75

LEBB-S14H

Q301

4

56

IMX9T110

31

2

VBAT

75R352

LD307

LEBB-S14H

R353 75

LD308

LEBB-S14H

C323 27p

75R354

LD309

LEBB-S14H

R363 10

LD310

R364 10

R355 75

LD311

LEBB-S14H

75R356

LD312

LEBB-S14H

75R357

LD313

LEBB-S14H

R358 75

LEBB-S14H

1u

C310

1u

C311

1u

C312

1u

C313

1u

C314

1u

C315

1u

C316

4. TROUBLE SHOOTING

- 86 -

4.12 Receiver Trouble

U102

R108

R111

39p

C136

39p

C139

39p

C142

SGND2M2DGND

C2

GPI

LGND

N15

T11

AOUT3N

K16

J16

AOUT3P

AOUT1N

K15

AOUT1P

J15

AOUT2N1

T9

AOUT2N2

R9

AOUT2P1

R11

AOUT2P2

R108 4.7

39p

C138

39p

4.7R111

C143

C141

39p

SPKP_P

AUXOP

RCV_N

RCV_P

Test Points

Circuit Diagram

Figure 4-23

4. TROUBLE SHOOTING

- 87 -

Checking Flow

SETTING : After initialize Agilent 8960, Test EGSM, DCS mode

Set the property of audio as PRBS or continuous wave. Set the receiving volume of mobile as Max.

START

Does waveform at

R108 and R111

fluctuate?

YES

Is CN601 connected

properly?

YES

Is receiver connected

Properly?

YES

Receiver will work properly.

NO

NO

NO

Replace main board

Reassemble CN601

Re-solder receiver

4. TROUBLE SHOOTING

- 88 -

4.13 Microphone Trouble

U302

C211

C118

(2V5_VMIC)

U102

R208
R211

C210

R201

R206

CLOSE TO MIC

C215 39p

C211

39p

39pC216

2V5_VMIC

R211 100

0R209

2.2K

R206

AVL5M02-200

VA203

1
2

MIC200

SOB-413S44-RC3310

C203
10u

39p

C202

2.2K

R213

1K

R201

0.1uC212

100R208

C210

39p

AVL5M02-200VA202

VINNORN

VINNORP

Test Points

Circuit Diagram

Figure 4-24

4. TROUBLE SHOOTING

- 89 -

Checking Flow

SETTING : After initialize Agilent 8960, Test EGSM, DCS mode

START

Voltage VMIC of U102

= DC 2.5V?

YES

Check the signal

Level at each side

of MIC200.

Is it a few tens

mV AC?

YES

Check the soldering of

C210,R208,R211,R209

C212

YES

Microphone will work

properly.

NO

NO

NO

Replace U102

Replace microphone

Re-solder component

4. TROUBLE SHOOTING

- 90 -

4.14 RTC Trouble

U101

X101

R106

C127 1000p

10M

R106

NRESET

V3

E9

OSCIN

OSCOUT

C9

F9

PWRON

V6

NAUXCS1

T5

NGPCS1

N9

GPIO_42_NMAIN_LCD_CS

V7

GPIO_43_NSUB_LCD_CS

L14

GPIO_1_IRDA_RX
GPIO_2_NIRDA_EN

K16

L18

GPIO_0_IRDA_TX

P13

CLKON

N10

CLKIN

C608
NA

32.768KHz

12

3

4

MC-146_7pF

X101

NA

C128

BT_EN

CLKON

_SUB_CS

_LCD_CS

_RESET

_MIDI_CS

26MHz

Test Points

Circuit Diagram

Figure 4-25

4. TROUBLE SHOOTING

- 91 -

Checking Flow

START

Is the voltage
level at R106

about 1.2V

YES

Replace X101and try again.

YES

RTC will work properly

NO

Check the soldering of R106.

4. TROUBLE SHOOTING

- 92 -

4.15 Indication LED Trouble

LD200

R226 (1.2V)

Q401

R225

(5%,1/10W)

ERHZ0000757

VCHARGE

R220

390

Q200

2SC5585

2

3

1

R223

1K

R227

NA

VCHARGE

R219

15

LD200

1u

C220

R222

0

2V8_VEXT

Q401

UMX1NTN

2

56

31

4

10K

R226

R610

10K

VBAT

R224

NA 7.5K

R225

20

R228

RPWRON

Test Points

Circuit Diagram

Figure 4-26

4. TROUBLE SHOOTING

- 93 -

Checking Flow

Indication LED only operates in trickle charging mode.

START

Is the voltage

at R226 1.2V?

YES

Is LED working?

YES

LED will work properly

NO

NO

Check the soldering of R225 or Q 401

Check the soldering of Q200,

R218, LD200, R226

4. TROUBLE SHOOTING

- 94 -

4.16 Folder on/off Trouble

U403.1

U403

FLIP SWITCH

0.1u

C404

GND

OUT

VDD

A3212ELH

U403

R401 100K

10p

C405

C406

2V8_VEXT

330p

FLIP

Test Points

Circuit Diagram

Figure 4-27

4. TROUBLE SHOOTING

- 95 -

Checking Flow

START

Is there the magnet

in the folder side?

YES

Voltage at pin 1

of U403 = 2.8V?

YES

Open folder.

Voltage at pin 1 of U403

=2.8V

YES

Close folder.

Voltage at pin 1 of U403

= 0V

YES

NO

NO

NO

NO

Place the magnet properly.

Voltage of VEXT at U102

= 2.8V?

YES

Re-solder U403

Re-solder R401 and U403

Replace U403

NO

Replace U102

Does it work properly?

YES

Folder on/off will

work properly

NO

Change Main board

4. TROUBLE SHOOTING

- 96 -

4.17 Bluetooth Trouble

M201

R221

C226

C225

C232

R239

R218

C230

R230

R231

BLUETOOTH

2V8_VBT

0.1u

C232

R239

10K

R234 47

2.2u

C231

15p

C222

VOUT

4

BH28FB1WHFV

U204

6

BGND

2

GND

NC

5

STBY

1

3

VIN

C3

COM1

A3

COM2

B1

GND

C2

IN1

A2

IN2

C1

NC1

A1

NC2

C4

NO1

A4

NO2

B4

V+

U206

MAX4717EBC-T

R229

0

47R236

47R235

FEED

NC1

NC2

ANT201

L515
NA

22nH

L511

NA

C229

2.2u

C225

47R238

C226
15p

C223

2.2u

47R230

16

RESETB

SPI_CLK

13
14

SPI_CSB

SPI_MISO

15

12

SPI_MOSI

26

UART_CTS

UART_RTS

23

24

UART_RX

UART_TX

27

22

VDD_1_8V

VDD_DIG

21

VDD_VREGIN

3

ANT

5

4

GND1

6

GND2
GND3

11

GND4

25

28

NC

20

PCM_CLK

PCM_IN

19

PCM_OUT

17
18

PCM_SYNC

PIO0

1
2

PIO1
PIO2

7
8

PIO3
PIO4

9

10

PIO5

2V8_VBT

LBMA-2C67B3M201

R218

33p

330

R221

47R231

C224

0.1u

2V8_VBT

2.2u

4

5

VCC

C230

U205

TC7SH08FS

2

GND

1

3

2V8_VMEM

VBAT

0.1u

C228

PCM_TX

USC_1

USC_2 PCM_SYNC8

PCM_TX

USC0

PCM_EN

USC1

USC2

PCM_SYNC8

BT_EN

DEBUG_TX

DEBUG_RX

USC3

PCM_TX

PCM_RX

_BT_RST

PCM_RX

Test Points

Circuit Diagram

4. TROUBLE SHOOTING

- 97 -

Checking Flow

Bluettooth
Power on

2V8_VBT

at C230 =2.8V ?

No

Yes

Replace U101

Yes

No

No

Yes

BT_EN at R221 =2.8V ?

No

Yes

Replace

U204

Check PCB pattern

Replace U101

Replace

U101

4. TROUBLE SHOOTING

- 98 -

Yes

Yes

No

No

Replace U101

Resolder

Replace U101

Replace M201

Connect BT Headset

Yes

Not available

IF RF level at Antenna

Feeding about 0dBm?

Yes

Replace Headset

No

Is soldering of R218,

L515 good?

Yes

Replace

M201

No

Resolder

4. TROUBLE SHOOTING

- 99 -

Establish a call

Software

Re_download

Yes

Yes

No

No

Replace U101

Replace M201

5.1 Download

A. Download Setup

Figure 5-1 describes Download setup

Figure 5-1. Download Setup

5. DOWNLOAD AND CALIBRATION

(If you have battery, no TA is needed)

UART

5. DOWNLOAD AND CALIBRATION

- 100 -

5. DOWNLOAD AND CALIBRATION

- 101 -

B. Download Procedure

1. Access Flash loader program in PC and select Erase.(Don’t check OWCD)

2. Press Start and Wait until Erase is completed.

1. Select Erase

3. Check

4. Donít Check
OWCD

2. Select Model

1. Press

Start and

Wait