LG 72LZ9700 Schematic
LED LCD TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : LB03N
MODEL : 72LZ9700 72LZ9700-TA
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
Printed in KoreaP/NO : MFL63261929 (1011-REV00)
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 8
EXPLODED VIEW .................................................................................. 15
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument’s
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1
*Base on Adjustment standard
IMPORTANT SAFETY NOTICE
0.15 uF
Ω
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
4. Model General Specification
1. Application range
This specification is applied to the LCD TV used LB03N
chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC :CE, IEC
No. Item Specification Remarks
1 Market Asia, Oceania, Africa, DTV & Analog
Middle East *DTV Region: Australia/New Zealand(AU), Singapore(SG), Indonesia(ID), Malaysia(MY),
(PAL/DVB Market) Vietnam(VN), South Africa(SA)
-Considering for Israel(IL)
2 Broadcasting system 1) PAL/SECAM–B/G/D/K * Australia/India : only PAL
2) PAL-I/II
3) NTSC-M
4) DVB-T
3 Receiving system Analog : Upper Heterodyne
G DBV-T
Digital : COFDM (DVB-T) - Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
4 Video Input RCA PAL, SECAM, NTSC 4 System : PAL, SECAM, NTSC, PAL60
5 Component Input Y/Cb/Cr
Y/Pb/Pr
6 RGB Input RGB-PC Analog(D-SUB 15PIN)
7 HDMI Input Rear : HDMI/DVI PC (HDMI version 1.3)
Side : Only HDMI Support HDCP
PCM/AC-3
8 Audio Input RGB/DVI Audio L/R Input
Component
AV
9 SDPIF out Optical Output
10 Earphone out L/R Out
11 USB JPEG, MP3, Divx HD
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Component Video Input (Y, CB/PB, CR/PR)
No.
Specification
Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
No.
Specification
Proposed Remarks
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1280*1024 63.595 60.0 108.875 SXGA FHD model
8. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
6. RGB (PC)
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
7. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*1024 63.595 60.0 108.875 SXGA HDCP/FHD model
8. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P
8. 3D Mode - HDMI & USB
(1) HDMI Input (HDMI V1.4 with 3D)
* For 3D video feed that is in the HDMI(V1.4 with 3D) frame packing format, it is automatically switched to 3D.
* You press the BLUE button, the left/right video switches.
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1920*1080 33.75 30.000 74.25 Side by Side HDTV 1080P
Top & Bottom
Checkerboard
No. Side by Side Top & Bottom Checkerboard Single Frame Sequential Frame Packing
1
(2) USB Input
(3) 3D Input mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Remark
1 1280*720 45.00 60.00 74.25 Side by Side HDTV 720P
Top & Bottom
89.9/90 59.94/60 148.35 HDMI(V1.4 with 3D)
Frame Packing
2 1280*720 37.5 50 74.25 Side by Side HDTV 720P
Top & Bottom
75 50 148.5 HDMI(V1.4 with 3D)
Frame Packing
3 1920*1080 33.75 60 74.25 Side by Side HDTV 1080I
Top & Bottom
4 1920*1080 28.125 50 74.25 Side by Side HDTV 1080I
Top & Bottom
5 1920*1080 27 24 74.25 Side by Side HDTV 1080P
Top & Bottom
Checkerboard
53.95/54 23.98/24 148.35/148.5 HDMI(V1.4 with 3D)
Frame Packing
6 1920*1080 67.50 60 148.50 Side by Side HDTV 1080P
Top & Bottom
Checkerboard
Single Frame Sequential
7 1920*1080 56.250 50 148.5 Side by Side HDTV 1080P
Top & Bottom
RL
L
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD TV with
LB03N chassis.
2. Designation
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ºC ± 5 ºC of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~ 50 / 60Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15.
In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours
In case of keeping module is in the circumstance of below 20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
3. Automatic Adjustment
3.1. ADC Adjustment
(1) Overview
ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate
RGB deviation.
(2) Equipment & Condition
1) Jig (RS-232C protocol)
2) MSPG-925 Series Pattern Generator(MSPG-925FA,
pattern - 65)
- Resolution :
480i Comp1(MSPG-925FA, Model-209, pattern-65)
1080P Comp1(MSPG-925FA, Model-225, pattern-65)
1920*1080 RGB(MSPG-925FA, Model-225, pattern-65)
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7±0.1 Vp-p
- Image
(3) Adjustment
1) Adjustment method
- Using RS-232, adjust items listed in 3.1 in the other
shown in “3.1.(3).3)”
2) Adj. protocol
Ref.) ADC Adj. RS232C Protocol_Ver1.0
3) Adj. order
- aa 00 00 [Enter ADC adj. mode]
- xb 00 04 [Change input source to Component1 (480i&
1080p)]
- ad 00 10 [Adjust 480i Comp1]
- xb 00 06 [Change input source to RGB(1024*768)]
- ad 00 10 [Adjust 1024*768 RGB]
- ad 00 90 End adj.
3.2. MAC Address
(1) Equipment & Condition
- Play file: Serial.exe
- MAC Address edit
- Input Start / End MAC address
(2) Download method
1) Communication Prot connection
Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port
Protocol Command Set ACK
Enter adj. mode aa 00 00 a 00 OK00x
Source change xb 00 40 b 00 OK40x (Adjust 480i, 1080p Comp1 )
xb 00 60 b 00 OK60x (Adjust 1920*1080 RGB)
Begin adj. ad 00 10
Return adj. result OKx (Case of Success)
NGx (Case of Fail)
Read adj. data (main) (main)
ad 00 20 000000000000000000000000007c007b006dx
(sub) (Sub)
ad 00 21 000000070000000000000000007c00830077x
Confirm adj. ad 00 99 NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
End adj. aa 00 90 a 00 OK90x
PCBA
PC(RS-232C)
RS-232C Por t
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2) MAC Address Download
- Com 1,2,3,4 and 115200(Baud rate)
- Port connection button click(1)
- Load button click(2) for MAC Address write.
- Start MAC Address write button(3)
- Check the OK Or NG
3.3. LAN
(1) Equipment & Condition
A Each other connection to LAN Port of IP Hub and Jig
(2) LAN inspection solution
A LAN Port connection with PCB
A Network setting at MENU Mode of TV
A setting automatic IP
A Setting state confirmation
-> If automatic setting is finished, you confirm IP and
MAC Address.
3.4. LAN PORT INSPECTION(PING TEST)
Connect SET -> LAN port == PC -> LAN Port
(1) Equipment setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2
(2) LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program.
2) Connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) Remove LAN CABLE
3.5. Model name & serial number download
(1) Model name & Serial number D/L
A Press “Power on” key of service remote control.(Baud
rate : 115200 bps)
A Connect RS232 Signal Cable to RS-232 Jack.
A Write Serial number by use RS-232.
A Must check the serial number at Instart menu.
(2) Method & notice
A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is
produced in production line, because serial number D/L
is mandatory by D-book 4.0.
SET PC
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man,
sometimes model name or serial number is initialized.(Not
always)
There is impossible to download by bar code scan, so It
need Manual download.
a. Press the ‘instart’ key of ADJ remote control.
b. Go to the menu ‘5.Model Number D/L’ like below photo.
c. Input the Factory model name(ex 42LX6500-TD) or Serial
number like photo.
d. Check the model name Instart menu -> Factory name
displayed (ex 42LX6500-TD)
4. Manual Adjustment
4.1. ADC(GP2) Adjustment
4.1.1. Overview
ADC adjustment is needed to find the optimum black level and
gain in Analog-to-Digital device and to compensate RGB
deviation.
4.1.2. Equipment & Condition
(1) Adjust Remote control
(2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern Generator
- Resolution :
480i,720*480(MSPG-925FA -> Model: 209, Pattern: 65) 480i
1080p, 1920*1080(MSPG-925FA -> Model: 225, Pattern:
65) - 1080p
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level: 0.7 ± 0.1 Vp-p
- Image
(3) Must use standard cable
4.1.3. Adjust method
(1) ADC 480i, 1080p Comp1
1) Check connected condition of Comp1 cable to the
equipment.
2) Give a 480i, 1080p Mode, Horizontal 100% Color Bar
Pattern to Comp1.
(MSPG-925FA -> Model: 209, Pattern: 65) - 480i
(MSPG-925FA -> Model: 225, Pattern: 65) - 1080p
3) Change input mode as Component1 and picture mode
as “Standard”
4) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select 7. External ADC ->
1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.
5) If ADC calibration is successful, “ADC RGB Success” is
displayed.
If ADC calibration is failure, “ADC RGB Fail” is displayed.
6) If ADC calibration is failure, after recheck ADC pattern or
condition retry calibration Error message refer to 5).
(2) ADC 1920*1080 RGB
1) Check connected condition of Component & RGB cable
to the equipment
2) Give a 1920*1080 Mode, 100 % Horizontal Color Bar
Pattern to RGB port.
(MSPG-925 Series -> model: 225 , pattern: 65 )
3) Change input mode as RGB and picture mode as “Standard”.
4) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select 7. External ADC ->
1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.
5) If ADC calibration is successful, “ADC RGB Success” is
displayed.
If ADC calibration is failure, “ADC RGB Fail” is displayed.
6) If ADC calibration is failure, after recheck ADC pattern or
condition retry calibration Error message refer to 5).
4.2. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download
(1) Overview
It is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of “Plug and Play”.
(2) Equipment
- Adjust remote control
- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
(3)Download method
1) Press Adj. key on the Adj. R/C, then select “10.EDID
D/L”, By pressing Enter key, enter EDID D/L menu.
2) Select [Start] button by pressing Enter key, HDMI1 /
HDMI2 / HDMI3 / HDMI4 / RGB are Writing and display
OK or NG.
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
For HDMI EDIDFor Analog EDID
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LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
(4) EDID DATA
A RGB
A HDMI(FHD 3D, HDMI 1.4a 3D)
* Physical Add & Checksum(HDMI1/2/3/4)
4.3. White Balance Adjustment
4.3.1 Overview
(1) W/B adj. Objective & How-it-works
(2) Objective: To reduce each Panel’s W/B deviation
(3) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.
(4) Adj. condition : normal temperature
1) Surrounding Temperature : 25 ºC ± 5 ºC
2) Warm-up time: About 5 Min
3) Surrounding Humidity : 20 % ~ 80 %
4.3.2 Equipment
1) Color Analyzer: CA-210 (LED Module : CH 14)
2) Adj. Computer(During auto adj., RS-232C protocol is needed)
3) Adjust Remote control
4) Video Signal Generator MSPG-925F 720p/216-Gray(Model:
217, Pattern:78) -> Only when internal pattern is not available
A Color Analyzer Matrix should be calibrated using CS-1000
4.3.3. Equipment connection MAP
4.3.4. Adj. Command (Protocol)
<Command Format>
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
A RS-232C Command used during auto-adj.
Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. completed
*(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj.
wb 00 ff -> End white balance auto-adj.
A Adj. Map
0123456789ABCDEF
0 00FFFFFFFFFFFF001E6D 0100 0101 0101
10 01 14 01 03 80 10 09 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 71 4F 81 01 01 01 01 01 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 D7
80 02 03 37 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
90 22 15 01 26 15 07 50 09 57 07 78 03 0C 00 XX XX
A0 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58
B0 10 38 10 E3 05 03 01 01 1D 80 18 71 1C 16 20 58
C0 2C 25 00 A0 5A 00 00 00 9E 01 1D 00 80 51 D0 1A
D0 20 6E 88 55 00 A0 5A 00 00 00 1A 02 3A 80 18 71
E0 38 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 XX
0123456789ABCDEF
0 00FFFFFFFFFFFF001E6D 0100 0101 0101
10 01 14 01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20
50 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 1D
INPURT 9Eh/9Fh(Physical Add) FFh(Checksum)
HDMI 1 10 00 CB
HDMI 2 20 00 BB
HDMI 3 30 00 AB
HDMI 4 40 00 9B
Color Analyzer
Comp uter
Pattern Generator
RS- 232C
RS-232C
RS-232C
Probe
Signal Source
* If TV internal pattern is used, not needed
LEN CMD VAL
CS
RS-232C COMMAND
Explanation
[CMD ID DATA]
wb 00 00 Begin White Balance adj.
wb 00 10 Gain adj.(internal white pattern)
wb 00 1f Gain adj. completed
wb 00 20 Offset adj.(internal white pattern)
wb 00 2f Offset adj. completed
wb 00 ff End White Balance adj.(Internal pattern disappears)
ITEM Command Data Range(Hex.) Default(Decimal)
Cmd 1 Cmd 2 Min Max
Cool R-Gain j g 00 C0
G-Gain j h 00 C0
B-Gain j i 00 C0
R-Cut
G-Cut
B-Cut
Medium R-Gain j a 00 C0
G-Gain j b 00 C0
B-Gain j c 00 C0
R-Cut
G-Cut
B-Cut
Warm R-Gain j d 00 C0
G-Gain j e 00 C0
B-Gain j f 00 C0
R-Cut
G-Cut
- 12 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.3.5. Adj. method
(1) Auto adj. method
1) Set TV in adj. mode using POWER ON key.
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable (RS-232C)
4) Select mode in adj. Program and begin adjustment.
5) When adj. is complete (OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
A W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
(2) Manual adj. method
1) Set TV in Adj. mode using POWER ON.
2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10cm of the surface.
3) Press ADJ key -> EZ adjust using adj. R/C -> 7. WhiteBalance then press the cursor to the right (KEY G).
(When KEY(G) is pressed 216 Gray internal pattern will
be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
5) Adj. is performed in COOL, MEDIUM, WARM 3 modes
of color temperature.
A If internal pattern is not available, use RF input. In EZ
Adj. menu 7.White Balance, you can select one of 2
Test-pattern : ON, OFF. Default is inner (ON).
By selecting OFF, you can adjust using RF signal in 216
Gray pattern.
A Adj. condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
: Color Analyzer (CA-210) probe should be within 10
cm and perpendicular of the module surface (80° ~
100°)
3) Aging time
- After Aging Start, Keep the Power ON status during
5 Minutes.
- In case of LCD, Back-light on should be checked
using no signal or Full-white pattern.
4.3.6. Reference (White Balance Adj. coordinate
and color temperature)
A Luminance : 216 Gray
A Standard color coordinate and temperature using CS-1000
(over 26 inch)
A Standard color coordinate and temperature using CA-210
(CH 14)
A 10 Point White Balance
A Color coordinate Variation by Aging time.
4.4. EYE-Q function check
Step 1) Turn on TV
Step 2) Press EYE key of Adj. R/C
Step 3) Cover the Eye Q II sensor on the front of the using
your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw
Data (Sensor data, Back light)”. If after 6 seconds,
R/G/B value is not lower than 10, replace Eye Q II
sensor.
Step 5) Remove your hand from the Eye Q II sensor and wait
for 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen,
replace Eye Q II sensor.
Mode Color Coordination Temp ∆UV
xy
COOL 0.269 0.273 13000 K 0.0000
MEDIUM 0.285 0.293 9300 K 0.0000
WARM 0.313 0.329 6500 K 0.0000
Mode Color Coordination Temp ∆UV
xy
COOL 0.269 ± 0.002 0.273 ± 0.002 13000 K 0.0000
MEDIUM 0.285 ± 0.002 0.293 ± 0.002 9300 K 0.0000
WARM 0.313 ± 0.002 0.329 ± 0.002 6500 K 0.0000
Aging Time Cool Medium Warm
GP2 (Min.) X Y X Y X Y
269 273 285 293 313 329
1 0-2 278 288 295 307 316 334
2 3-5 277 286 294 305 315 332
3 6-9 276 284 293 304 314 331
4 10-19 274 282 291 302 313 329
5 20-35 272 278 289 298 311 325
6 36-49 270 275 287 295 309 322
7 50-79 269 273 285 293 308 323
8 Over 80 269 273 285 293 308 323
On / Off On / Off
Pattern Outer(default)
IRE 100
Luminance 130
Red(130.0 nit) 0
Green(130.0 nit) 0
Blue(130.0 nit) 0
- 13 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.5. Checking the function of Bluetooth
using adjusts Remote control
- Auto checking
• Auto checking is doing in “Power Only”.
• Checking the result of searched (check that is in list or not)
• Go out of checking mode pushing button “Exit”.
- Manual checking
• Push the button “Power Only” and “Exit”.
• Push the button hot key “Bluetooth”.
• Checking the result of searched (check that is in list or not)
• Go out of checking mode pushing button “Exit.
4.6. Ship-out mode check (In-stop)
- After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode.
5. GND and Internal Pressure check
5.1. Method
1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)
2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
5.2. Checkpoint
• TEST voltage
- GND: 1.5 KV / min at 100 mA
- SIGNAL: 3 KV / min at 100 mA
• TEST time: 1 second
• TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
• LEAKAGE CURRENT: At 0.5 mArms
6. Audio
Measurement condition:
1. RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
2. CVBS, Component: 1 KHz sine wave signal 0.4 Vrms
3. RGB PC: 1 KHz sine wave signal 0.7 Vrms
No. Item Min. Typ. Max. Unit
1. Audio practical max 9.0 10.0 12.0 W EQ Off
Output, L/R AVL Off
(Distortion=10 % 8.5 8.9 9.8 Vrms Clear Voice Off
max Output)
2. Speaker (8 Ω 10.0 15.0 W EQ On
Impedance) AVL On
Clear Voice On
- 14 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
7. USB S/W Download (option, Service only)
1) Put the USB Stick to the USB socket
2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting
3) Show the message “Copying files from memory”
4) Updating is starting.
5) Updating Completed, The TV will restart automatically
6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didn’t have a
DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1) Push "IN-START" key in service remote control.
2) Select "Tool Option 1" and Push “OK” button.
3) Push in the number. (Each model has their number.)
8. 3D function test
(Pattern Generator MSPG-3233, HDMI mode No. 371, pattern
No. 81)
1) Please input 3D test pattern like below
2) Enter 3D mode, then select side by side
(If you don’t wear a 3D Glasses, you will see the picture
like below)
3) Put on the 3D Glasses, And block the right side of Glasses
(LEFT:OPEN[TEST], RIGHT:CLOSED)
And check the middle sides of picture, RED -> normal,
others -> abnormal
4) Put on the 3D Glasses, And block the right side of Glasses
(LEFT:CLOSED, RIGHT:OPEN[TEST])
And check the middle sides of picture, BLUE -> normal,
others -> abnormal
- 15 -
LGE Internal Use OnlyCopyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
810
800
541
540
580
570
120
500
310
610
620
860
850
730
200
560
510
300
700
840
710
720
740
750
530
531
830
550
820
521
121
910
900
920
A2
A5
A9
A23
A10
A13
LV1
LV2
: Module +Formatter(upper)
: Module +Formatter(lower)
LV3
: Main +Formatter
400
122
600
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
SOC_RESET
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
NVRAM
+3.3V_NORMAL
M24M01-HRMN6TP
4.7K
R1025
NC
R1032
E1
0
E2
VSS
Boot Strap
NAND_DATA[0-7]
NAND_ALE
NAND_CLE
RESET
+3.3V_NORMAL
R1027
10K
R1030 0
+3.3V_NORMAL
VCC
8
WP
7
SCL
6
SDA
5
C103
0.1uF
C171
8pF
OPT
+3.3V_NORMAL
R1000
R1036
OPT
R1040
OPT
R1039
R1037
OPT
R1002
OPT
R1034
R1006
OPT
R158
OPT
R157
OPT
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
IC102
1
2
A8’h
3
4
Default Res. of all NAND pin is Pull-down
NAND_DATA[0]
NAND_DATA[1]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[6]
NAND_DATA[7]
NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash
1 : Boot From NAND Flash
NAND_IO[1] : NAND Block 0 Write (DNS)
0 : Enable Block 0 Write
1 : Disable Block 0 Write
NAND_IO[3:2] : NAND ECC (1, DNS)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
NAND_IO[6:5] : Xtal Bias Control (1, DNS)
00 : 1.2mA (Fundmental Recommand)
01 : 1.8mA
10 : 2.4mA (3rd over tune Recommand)
11 : 3.0mA
NAND_IO[7] : MIPS Frequency (DNS)
0 : 405MHz
1 : 378MHz
NAND_ALE : I2C Level (DNS)
0 : 3.3V Switching
1 : 5V Switching
NAND_CLE
0 : Enable D2CDIFF AC (DNS)
1 : Disabe D2CDIFF AC
SYS_RESETb
R1026 22
R1028 22
C167
8pF
OPT
OPT
R1008
2.7K
R1005
2.7K
R169
2.7K
OPT
R1004
2.7K
R1003
2.7K
R1035
2.7K
OPT
R1007
2.7K
R1038
2.7K
R156
2.7K
R1001
2.7K
SCL3_3.3V
SDA3_3.3V
SMD GASKET
GAS8
6.5T_GAS
MDS62110206
5.5T_GAS
MDS62110204
GAS1-*2
7.5T_GAS
MDS62110205
GAS1
6.5T_GAS
MDS62110206
GAS1-*1
5.5T_GAS
MDS62110204
7.5T_GAS
MDS62110205
WIRELESS_SDA
WIRELESS_SCL
GAS2
GAS2-*1
GAS2-*2
6.5T_GAS
MDS62110206
5.5T_GAS
MDS62110204
GAS3-*2
7.5T_GAS
MDS62110205
GAS3
6.5T_GAS
GAS3-*1
7.5T_GAS
GAS4
MDS62110206
GAS4-*1
5.5T_GAS
MDS62110204
GAS4-*2
MDS62110205
Q103
FDV301N
GAS5
6.5T_GAS
MDS62110206
GAS5-*1
5.5T_GAS
MDS62110204
GAS5-*2
7.5T_GAS
MDS62110205
G
D
OPT
WIRELESS_NON_ESD
R123 0
R124
WIRELESS_NON_ESD
GAS6
6.5T_GAS
MDS62110206
GAS6-*1
5.5T_GAS
MDS62110204
GAS6-*2
7.5T_GAS
MDS62110205
+3.3V_NORMAL
OPT
S
G
D
OPT
0
6.5T_GAS
MDS62110206
5.5T_GAS
MDS62110204
7.5T_GAS
MDS62110205
10K
R173
Q104
FDV301N
S
GAS7
6.5T_GAS
GAS7-*1
5.5T_GAS
GAS7-*2
7.5T_GAS
MDS62110206
MDS62110204
MDS62110205
6.5T_GAS
GAS8-*1
5.5T_GAS
GAS8-*2
7.5T_GAS
WIRELESS_ESD
WIRELESS_ESD
GAS9
MDS62110206
GAS9-*1
MDS62110204
GAS9-*2
MDS62110205
SDA2_3.3V
SCL2_3.3V
R123-*1
33
R124-*1
33
* I2C MAP
* NAND FLASH MEMORY 4Gbit (512M for BB)
+3.3V_NORMAL
IC101
NAND04GW3B2DN6E
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VDD_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
FLASH_WP
NAND_RBb
NAND_REb
NAND_CEb
NAND_CLE
NAND_ALE
NAND_WEb
Open Drain
+3.3V_NORMAL
R136
4.7K
C
Q101
B
KRC103S
E
R134 2.7K
C114
0.1uF
R191 2.7K
C116
4700pF
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
VDD_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
1
NAND FLASH
2
3
4
5
6
RB
7
R
8
E
9
10
11
12
13
14
15
CL
16
AL
17
W
18
WP
19
20
21
22
23
24
NAND_CEb
NAND_ALE
NAND_REb
NAND_CLE
NAND_WEb
NAND_RBb
* I2C_0 :
* I2C_1 :
* I2C_2 :
* I2C_3 :
NAND_DATA[7]
NAND_DATA[6]
NAND_DATA[5]
NAND_DATA[4]
+3.3V_NORMAL
C136 10uF
NAND_DATA[3]
NAND_DATA[2]
NAND_DATA[1]
NAND_DATA[0]
CI_A[0-13]
EBI_CS
/CI_WAIT
EBI_WE
NAND_DATA[0-7]
10V
C115
0.1uF
+3.3V_NORMAL
R1045
4.7K
EBI_RW
EBI_CS
+3.3V_NORMAL
R194 4.7K
NAND_DATA[0-7]
CI_A[3]
CI_A[4]
CI_A[2]
CI_A[1]
CI_A[0]
CI_A[5]
CI_A[6]
CI_A[8]
CI_A[9]
CI_A[13]
CI_A[12]
CI_A[11]
CI_A[10]
CI_A[7]
22
22
R193 4.7K
NAND_DATA[0-7]
R116
R122
R117
R127
22
22
R140
NAND_DATA[0]
NAND_DATA[1]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[6]
NAND_DATA[7]
EBI_ADDR3
EBI_ADDR4
EBI_ADDR2
EBI_ADDR1
EBI_ADDR0
EBI_ADDR5
EBI_ADDR6
EBI_ADDR8
EBI_ADDR9
EBI_ADDR13
EBI_ADDR12
EBI_ADDR11
EBI_ADDR10
EBI_ADDR7
EBI_TAB
EBI_WE1B
EBI_CLK_IN
EBI_CLK_OUT
EBI_RWB
EBI_CS0B
NAND_DATA0
NAND_DATA1
NAND_DATA2
NAND_DATA3
NAND_DATA4
NAND_DATA5
NAND_DATA6
NAND_DATA7
NAND_CS0B
NAND_ALE
NAND_REB
NAND_CLE
NAND_WEB
NAND_RBB
SF_MISO
SF_MOSI
SF_SCK
SF_CSB
IC100
LGE3556CP (C0 3D PIP)
J23
J24
H25
H24
H23
J25
F26
H28
J26
H27
G26
J27
J28
F27
G24
H26
G27
33
G28
K23
G25
U24
T26
T27
U26
U27
V26
V27
V28
T24
R23
T23
T25
R24
U25
W24
U23
V23
V24
FOR ESD 12V Pattern
+12V
IF_AGC_SEL
LNA2_CTL/BOSTER_CTL
RF_SWITCH_CTL
E_TMS
/CI_SEL
C178
0.1uF
50V
GPIO_00
GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06
GPIO_07
GPIO_08
GPIO_09
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
SGPIO_00
SGPIO_01
SGPIO_02
SGPIO_03
SGPIO_04
SGPIO_05
SGPIO_06
SGPIO_07
C179
0.1uF
50V
R1012 100
R1019 100
R1024 100
R1061
22
R130
0
N26
L26
N25
L25
K27
K28
K24
K26
K25
AA27
AA28
AA26
L1
L3
L2
Y25
Y26
M27
AA25
R25
N28
N27
AH18
P23
M23
AD19
AE19
M4
M5
L23
Y28
Y27
G2
G3
G5
G6
G4
L24
P25
L5
K4
K1
L27
M26
N23
R28
R27
R26
P28
P27
K6
K5
P26
M3
M2
M1
L4
L6
W27
W28
W26
W25
J2
J1
K3
K2
OLED
R118 1K
OPT
NON_OLED
R119 1K
OPT
0
R1029
R111
R199
1K
R106
R1048
R109 100
R110 100
OPT
R1054 0
OPT
R1055 0
R107
R108
0
R1033
R1046
R132
R1050
R161 100
R133
R103 0
R129
22
R160100
22
R102
22
R1049
22
R1051
LOCAL DIMMING
CI_MOD_RESET
CI_OUTCLK
SC_RE1
/CI_CD2
/CI_IREQ
GIP
R1013 1K
R1009 1K
EXTERNEL FRC/T_CON FRC
NON_GIP
R1023 1K
R1010 1K
NO FRC/INTERNER FRC
R1047
R1920
R1141K
R1042
1K
22
100
BCM_AVC_DEBUG_TX1
BCM_AVC_DEBUG_RX1
100
100
R1044
22
FHD
HD
22
1K
R1031
22
22
100
22
+3.3V_NORMAL
R1017 1K
R1021 1K
R1016
M_REMOTE
0 M_REMOTE
0
ALTERA DL GPIO
DDR_512MB
R1022 1K
DDR_256MB
R1015 1K
ALTRA DL GPIO
ALTRA DL GPIO
OPT
ALTRA DL GPIO
R1060
0
FRC
R1011 1K
R1020 1K
MINI_LVDS/NO LOCAL_D
NO_FRC
LVDS/LOCAL_D
R1014 1K
R1018 1K
INTERRUPT PIN
POWER_DET
INTERRUPT PIN
DC DC
INTERRUPT PIN
ERROR_OUT
MODEL_OPT_4
MODEL_OPT_5
SIDE_AV_DET
CI_5V_CTL
HDMI_HPD_4
PWM_DIM
HDMI_HPD_3
MODEL_OPT_1
DSUB_DET
BT_RESET
/RST_HUB
SC_RE1
SC_RE2
CI_MOD_RESET
MODEL_OPT_0
DD
HDMI_HPD_2
IR_IN
IR_IN
HDMI_HPD_1
5V_HDMI_1
EPHY_ACTIVITY
EPHY_LINK
/CI_CD1
M_REMOTE_TX
M_REMOTE_RX
VREG_CTRL
TUNER_RESET
DTV_ATV_SELECT
5V_HDMI_2
R115 1.8K
REAR_AV_DET
5V_HDMI_3
5V_HDMI_4
MODEL_OPT_2
SCART1_DET
SIDE_COMP_DET
M_RFModule_RESET
RGB_DDC_SCL
FRC_RESET
RGB_DDC_SDA
COMP1_DET
LG5111_RESET
HP_DET
R1056
0
R1057
0
R1058
0
ALTRA DL GPIO
R1059
0
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
Page 27 to FR_SWITCH_CTL2
R1053 2.7K
DD
R105 56
R104112K
BB Add.
For CI
R1043 0
R126 0
R125 0
R1052
4.7K
17page : Motion Remocon
+3.3V_NORMAL
LG5111_RESET
E_TCK
E_TDO
E_TDI
+3.3V_NORMAL
EMI
C180
100pF
50V
E_TMS
17page : Motion Remocon
BCM_RX
BCM_TX
AUD_MASTER_CLK
A_DIM
C173
22uF
16V
L/R_SYNC
CI_OUTCLK
/CI_CD2
/CI_IREQ
MODEL_OPT_6
MODEL_OPT_3
M_REMOTE_TX
M_REMOTE_RX
R18 4
2.2 K
R18 7
2.2 K
MODEL OPTION
PIN NAME
MODEL_OPT_0
MODEL_OPT_1 AA26
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
*MODEL_OPT_0 & MODEL_OPT_4
REFER TO THIS OPTION
MODEL_OPT_0
LOW
HIGH
HIGH
LOW
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
M_REMOTE_TX
M_REMOTE_RX
VREG_CTRL
For CI
WIRELESS_DL_RX
WIRELESS_DL_TX
17page : Motion Remocon
17page : Motion Remocon
1.2K
1.2K
R183
1.2K
R180
PIN NO.
N28
R26
K1
L25
K27
K4
MODEL_OPT_4
LOW
LOW
HIGH
HIGH
For LEX8(ALEF)/LEX9
CHINA
43page:/BT_ON_OFF
15page:/TW_9910_RESET
15page:/CHB_RESET
EXT IRQ
GPIO_00, GPIO_01, GPIO_02,
GPIO_11, GPIO_11, GPIO_39
IR_INT : GPIO_23
IR1_IN : GPIO_25
IR2_IN : GPIO_29
IR_OUT : GPIO_26
PWM0 : GPIO_24
PWM1 : GPIO_09
For LEX8(ALEF)
+3.3V_NORMAL
1.2K
1.2K
1.2K
R170
R176
R171
R177
HIGH
URSA3
MAIN_MINI_LVDSHDMAIN_LVDS
DDR-512M
FHD
FRC
GIP
OLED
NO FRC
URSA3 Internal
URSA3 External
PWIZ Pannel T-con
with LG FRC
EU
26page:USB_PWRON3
15page:/CHB_RESET
SIDE_AV_DET
HDMI_HPD_4
BT_RESET
/RST_HUB
SIDE_COMP_DET
HP_DET
SIDE_COMP_DET
HP_DET
5V_HDMI_4
WIRELESS_DL_RX
WIRELESS_DL_TX
SCL0_3.3V
SDA0_3.3V
SCL1_3.3V
SDA1_3.3V
SCL2_3.3V
SDA2_3.3V
SCL3_3.3V
SDA3_3.3V
NON_URSA3
DDR-236M
NON_FRC
NON-GIP
NON_OLED
LOW
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM (EUROBBTV)
BCM3556 & NAND FLASH
2009.06.18
1
CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
BLM18PG121SN1D
L202
A3.3V
045:V14
A1.2V
R2360R237
A2.5V
0
BROAD BAND STUDIO
R220 : BCM recommened resistor 562 ohm
75
1%
R238
A2.5V
L200
R209
3.9K
R210
120
BLM18PG121SN1D
C244
0.1uF
16V
C206 0.015uF
C210 0.015uF
OPT
C211 0.015uF
C232 0.015uF
OPT
C220 0.015uF
C221 0.015uF
C224 0.015uF
C225 0.015uF
C226 0.015uF
C227 0.015uF
C20 7 0 .1uF
C208 4.7uF
C20 3 0. 1uF
C20 2 0. 1uF
BLM18PG121SN1D
L209
L210
C2020
0.1uF
0
0.047uF
C2027 0.047uF
R264 0
R265
C277
C20 9 0 .1uF
C2021
C279 0.047uF
4.7uF
C296 0.047uF
EPHY_RDN
EPHY_RDP
EPHY_TDN
EPHY_TDP
Route INCM between associated
left and right signals of same channel
The INCM trace ends at the
same point where the connector
ground connects to the board ground
(thru-hole connector pin).
Place test points, resistors
near audio connector.
Connect the other side of
the resistor to GND as close
as possible to the ground
connection of the associated
audio connector.
C206-*1
C210-*1
0.015uF
50V
C277-*1
0.047uF
350V
C211-*1
0.015uF
50V
15nF_U2J
C279-*1
0.047uF
350V
47nF_X7T
15nF_U2J
47nF_X7T
0.015uF
50V
15nF_U2J
C2027-*1
0.047uF
350V
47nF_X7T
15nF_U2J
47nF_X7T
P200
TJC2508-4A
AUDIO IN CAP Replacement of MLCC
C232-*1
0.015uF
50V
C296-*1
0.047uF
350V
15nF_U2J
47nF_X7T
C220-*1
0.015uF
50V
C298-*1
0.047uF
350V
C221-*1
0.015uF
50V
15nF_U2J
C299-*1
0.047uF
350V
47nF_X7T
15nF_U2J
47nF_X7T
1
2
3
4
C224-*1
0.015uF
50V
C252-*1
0.047uF
350V
+3.3V_NORMAL
C225-*1
0.015uF
50V
15nF_U2J
C253-*1
0.047uF
350V
47nF_X7T
R200
1.5K
R201
1.5K
4.7uF
C2028
A2.5V A1.2V
BLM18PG121SN1D
086:AD21
REAR_AV_L_IN
086:AD20
REAR_AV_R_IN
002:J6
REAR_AV_LR_INCM
COMP1_LR_INCM
002:J6
041:D4
041:D4
002:J7
086:O21
086:O20
002:J6
084:H4
084:H3
002:J7
SIDE_AV_LR_INCM
C226-*1
0.015uF
50V
15nF_U2J
C254-*1
0.047uF
350V
47nF_X7T
SC1_L_IN
SC1_R_IN
SC1_LR_INCM
SIDE_AV_L_IN
SIDE_AV_R_IN
PC_LR_INCM
15nF_U2J
47nF_X7T
L212
PC_L_IN
PC_R_IN
C227-*1
0.015uF
50V
C256-*1
0.047uF
350V
DTV/MNT_V_OUT
A3.3V
C201
100pF
C2026
4.7uF
R204 51
R214 51
R215 51
R228 51
R229 51
R230 51
R231 51
R232 51
R233 51
R234 51
A1.2V
BLM18PG121SN1D
OPT
OPT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
4.7uF
C212
C215
C213
0.01uF
D3.3V
C247
C298 0.047uF
C299 0.047uF
0.1uF
0.1uF
0.1uF
C252 0.047uF
0.1uF
C214
SIDE_USB_DM
SIDE_USB_DP
R266
R235
2.7K
2.7K
R218
240
4.7uF
C2018
C253 0.047uF
C256 0.047uF
C254 0.047uF
TP4021
TP4022
TP4023
CI_A[14]
CI_OUTDATA[0]
CI_OUTDATA[1]
CI_OUTDATA[2]
CI_OUTDATA[3]
CI_OUTDATA[4]
CI_OUTDATA[5]
CI_OUTDATA[6]
CI_OUTDATA[7]
CI_OUTSTART
CI_OUTVALID
0.1uF
C219
C223
R220 560
1K
R219
C222
0.1uF
LGE3556CP (C0 3D PIP)
D23
PKT0_CLK
C24
PKT0_DATA
B26
PKT0_SYNC
A25
RMX0_CLK
B25
RMX0_DATA
A26
RMX0_SYNC
G23
POD2CHIP_MCLKI
D25
POD2CHIP_MDI0
D24
POD2CHIP_MDI1
C25
POD2CHIP_MDI2
E27
POD2CHIP_MDI3
E26
POD2CHIP_MDI4
D28
POD2CHIP_MDI5
D27
POD2CHIP_MDI6
D26
POD2CHIP_MDI7
E23
POD2CHIP_MISTRT
E24
POD2CHIP_MIVAL
F25
CHIP2POD_MCLKO
C27
CHIP2POD_MDO0
C26
CHIP2POD_MDO1
B28
CHIP2POD_MDO2
B27
CHIP2POD_MDO3
A27
CHIP2POD_MDO4
F24
CHIP2POD_MDO5
F23
CHIP2POD_MDO6
E25
CHIP2POD_MDO7
C28
CHIP2POD_MOSTRT
A28
CHIP2POD_MOVAL
AC18
VDAC_AVDD2P5
AF20
VDAC_AVDD1P2
AG20
VDAC_AVDD3P3_1
AG21
VDAC_AVDD3P3_2
AF19
VDAC_AVSS_1
AD20
VDAC_AVSS_2
AE20
VDAC_AVSS_3
AH22
VDAC_RBIAS
AH20
VDAC_1
AG19
VDAC_2
AH21
VDAC_VREG
M25
BSC_S_SCL
M24
BSC_S_SDA
R6
USB_AVSS_1
T6
USB_AVSS_2
R7
USB_AVSS_3
T7
USB_AVSS_4
T8
USB_AVSS_5
R3
USB_AVDD1P2
U3
USB_AVDD1P2PLL
T4
USB_AVDD2P5
T3
USB_AVDD2P5REF
R4
USB_AVDD3P3
U4
USB_RREF
V1
USB_DM1
V2
USB_DP1
U1
USB_DM2
U2
USB_DP2
T5
USB_MONCDR
R5
USB_MONPLL
R1
USB_PWRFLT_1
R2
USB_PWRFLT_2
T2
USB_PWRON_1
T1
USB_PWRON_2
P6
EPHY_VREF
P5
EPHY_RDAC
P3
EPHY_RDN
P2
EPHY_RDP
N3
EPHY_TDN
EPHY_TDP
EPHY_AVDD1P2
EPHY_AVDD2P5
EPHY_PLL_VDD1P2
EPHY_AGND_1
EPHY_AGND_2
EPHY_AGND_3
AUDMX_LEFT1
AUDMX_RIGHT1
AUDMX_INCM1
AUDMX_LEFT2
AUDMX_RIGHT2
AUDMX_INCM2
AUDMX_LEFT3
AUDMX_RIGHT3
AUDMX_INCM3
AUDMX_LEFT4
AUDMX_RIGHT4
AUDMX_INCM4
AUDMX_LEFT5
AUDMX_RIGHT5
AUDMX_INCM5
AUDMX_LEFT6
AUDMX_RIGHT6
AUDMX_INCM6
AUDMX_AVSS_1
AUDMX_AVSS_2
AUDMX_AVSS_3
AUDMX_AVSS_4
AUDMX_AVSS_5
AUDMX_AVSS_6
AUDMX_LDO_CAP
AUDMX_AVDD2P5
A2.5V
C217
10uF
PLL_MAIN_MIPS_EREF_TESTOUT
AA10
AB10
AA11
AB11
N2
P1
P4
N4
N1
N5
P7
AE6
AD7
AF6
AH4
AG5
AG4
AG6
AF7
AE7
AH5
AG7
AH6
AD8
AF8
AE8
AH7
AH8
AG8
AF5
AB9
AC8
AE5
IC100
LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_CLK_P
LVDS_TX_0_CLK_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA4_N
LVDS_TX_1_CLK_P
LVDS_TX_1_CLK_N
LVDS_PLL_VREG
LVDS_TX_AVDDC1P2
LVDS_TX_AVDD2P5_1
LVDS_TX_AVDD2P5_2
LVDS_TX_AVSS_1
LVDS_TX_AVSS_2
LVDS_TX_AVSS_3
LVDS_TX_AVSS_4
LVDS_TX_AVSS_5
LVDS_TX_AVSS_6
LVDS_TX_AVSS_7
LVDS_TX_AVSS_8
LVDS_TX_AVSS_9
LVDS_TX_AVSS_10
LVDS_TX_AVSS_11
CLK54_AVDD1P2
CLK54_AVDD2P5
CLK54_AVSS
CLK54_XTAL_N
CLK54_XTAL_P
CLK54_MONITOR
PM_OVERRIDE
VCXO_AGND_1
VCXO_AGND_2
VCXO_AGND_3
VCXO_AVDD1P2
VCXO_PLL_AUDIO_TESTOUT
RESET_OUTB
RESETB
NMIB
TMODE_0
TMODE_1
TMODE_2
TMODE_3
SPI_S_MISO
POR_OTP_VDD2P5
POR_VDD1P2
EJTAG_TCK
EJTAG_TDI
EJTAG_TDO
EJTAG_TMS
EJTAG_TRSTB
EJTAG_CE0
EJTAG_CE1
PLL_MAIN_AVDD1P2
PLL_MAIN_AGND
PLL_RAP_AVD_TESTOUT
PLL_RAP_AVD_AVDD1P2
PLL_RAP_AVD_AGND
BYP_CPU_CLK
BYP_DS_CLK
BYP_SYS216_CLK
BYP_SYS175_CLK
B4
A4
C6
B6
B3
A3
A1
A2
D5
D6
C5
B5
B1
B2
C2
C3
D1
D2
E1
E2
E3
E4
D3
D4
F5
F1
F4
F2
C1
F3
C4
A5
E5
E6
D7
E7
F7
G7
H7
AD27
AD28
AD26
AC26
AC27
AE25
Y23
AA23
AB24
AC24
AF25
AF24
P24
F6
N24
J5
J4
J6
J3
V25
AH3
AB8
H4
H3
H2
H1
G1
H6
H5
AB26
AC25
AB27
M6
N6
N7
AA24
Y24
AE24
AD25
OPT
C228
10uF
C233
0.1uF
4.7K
R221
L211
BLM18PG121SN1D
C231
10uF
R240
390
OPT
TP is Necessory
0.1 uF
C23 6
A1.2V
0.1 uF
C20 12
C235
4.7uF
+3.3V_NORMAL
A2.5V
1K
R249
C23 8
0.1 uF
R2221K
R2621K
LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_CLK_N
LVDS_TX_1_CLK_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA0_P
LVDS_TX_0_CLK_N
LVDS_TX_0_CLK_P
0.1 uF
0.1 uF
4.7uF
C29 5
C242
C23 9
A2.5V
C25 1
0.1 uF
L203
BLM18PG121SN1D
C234
0.1uF
C241
4.7uF
4.7uF
C2013
A1.2V
BLM18PG121SN1D
BLM18PG121SN1D
C240
C23 7
0.1 uF
097:E18;097:I24
097:D18;097:I24
097:E18;097:I24
097:D18;097:I24
097:E18;097:I25
097:D18;097:I25
097:E18;097:I25
097:D18;097:I25
097:E19;097:I26
097:D19;097:I26
097:E18;097:I24
097:D18;097:I25
097:E20;097:I26
097:D20;097:I27
097:E20;097:I27
097:D20;097:I27
097:E20;097:I28
097:D20;097:I28
097:E20;097:I28
097:D20;097:I28
097:E21;097:I28
097:D21;097:I29
097:E20;097:I27
097:D20;097:I27
54MHz_XTAL_N
54MHz_XTAL_P
SYS_RESETb
L204
L207
4.7uF
A1.2V
001:A7
A1.2V
A1.2V
002:I1
002:I2
A1.2V
R224
2.7K
OPT
R226
2.7K
A2.5V
+3.3V_NORMAL
OPT
R225
2.7K
R227
2.7K
Near Q1705
Near J1500
Near J1603
Near P1600
Near J1500
Near J1501
PLACE NEAR Jacks
Near J1501
Near J1600
Near J1603
Near J1500
Near J1602
Near Q1704
VIDEO INCM
Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace
5.1
R256
5.1
R258
5.1
R259
5.1
R257
5.1
R252
54MHz X-TAL
54MHz_XTAL_N
54MHz_XTAL_P
Run Along TUNER_CVBS_IF_P Trace
Run Along SC1_R,SC_G,SC_B Trace
Run Along DSUB_R Trace
Run Along DSUB_G Trace
Run Along DSUB_B Trace
Run Along SC1_CVBS_IN Trace
Run Along SC2_CVBS_IN Trace
AUDIO INCM
Route Between SC2_L_IN & SC2_R_IN
Route Between AV1_L_IN & AV1_R_IN
Route Between COMP1_L_IN & COMP1_R_IN
Route Between SC1_L_IN & SC1_R_IN
Route Between PC_L_IN & PC_R_IN
Route Along With TUNER_SIF_IF_N
BCM (EUROBBTV)
BCM3556 AUD_IN/LVDS
When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF
When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF
C230
12pF
3
12pF
C229
33pF
C257
L208
1008LS-272XJLC
R243
604
R212
R211
22
21
X903
54MHz
22
PLACE NEAR BCM CHIP
R248
34
R244
34
R245
34
R24634R247
34
C2011 0.1uF
R260
34
C2023 0.1uF
R261
34
C258 0.1uF
C2019 0.1uF
C261 0.1uF
R250
34
C262 0.1uF
C2015 0.1uF
C2016 0.1uF
C264 0.1uF
R251
34
PLACE NEAR BCM CHIP
0.15uF
C2014
0.15uF
C2024
0.15uF
C265
OPT
0.15uF
C2022
0.15uF
C269
TU_CVBS_INCM
003:A3
SC1_RGB_INCM
003:A4
REAR_AV_CVBS_INCM
003:A3
COMP1_VID_INCM
R_VID_INCM
003:A5
G_VID_INCM
003:A5
B_VID_INCM
003:A5
SC1_CVBS_INCM
SIDE_AV_CVBS_INCM
0.47uF
C271
0.47uF
C2017
C2025
0.47uF
OPT
0.47uF
C270
0.47uF
C2010
TU_SIF_INCM
2009.06.18
003:A3
003:A3
SIDE_AV_LR_INCM
002:C6
REAR_AV_LR_INCM
002:C6
COMP1_LR_INCM
002:C6
SC1_LR_INCM
002:C6
PC_LR_INCM
002:C6
003:A3
2
Place here for common circuit with ATSC
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
+1.8V_HDMI+1.8V_AMP
L111
BLM18PG121SN1D
C2008
0.1uF
16V
L112
CIC21J501NE
C288
1000pF
D1.2V
C290
0.01uF
C245
4.7uF
C255
1000pF
C377
0.01uF
C375
0.1uF
C263
4.7uF
C373
1000pF
C267
0.01uF
D1.2V
A3.3V+3.3V_NORMAL
C2007
0.1uF
16V
C243
0.1uF
4.7uF
1000pF
C382
0.01uF
C381
0.1uF
C380
10uF
C379
10uF
C286
33uF
C287
100uF
FOR ESD
C383
1000pF
C246
0.01uFC250
C378
0.1uF
C376
4.7uFC249
C259
1000pF
C374
0.01uF
C366
0.1uF
C266
4.7uF
C289
0.1uF
D3.3V
C291
10uF
COMPONENT
COMP1_Y
COMP1_Pr
COMP1_Pb
COMP1_VID_INCM
SC1_RGB(EU)
SC1_RGB_INCM
SIDE COMPONENT
SIDE_COMP_Y
SIDE_COMP_Pr
SIDE_COMP_Pb
SIDE_COMP_INCM
For LEX8(ALEF)
SC1_G
SC1_R
SC1_B
CVBS
SIDE_AV_CVBS
26page : TUNER(HALF NIM)
TU_IF_AGC_1
TU_IF_AGC_2
TU_IF_N_1
TU_IF_P_1
TU_IF_N_1
TU_IF_P_1
DSUB
R195 10
R138 0
TU_SIF_INCM
R_VID_INCM
G_VID_INCM
B_VID_INCM
1%
82
1%
R120
R138-*110
NON_EU
1%
EU
75
1%
OPT
R13 5
TU_CVBS
REAR_AV_CVBS
SC1_CVBS_IN
SIDE_AV_CVBS
TU_CVBS_INCM
REAR_AV_CVBS_INCM
SC1_CVBS_INCM
SIDE_AV_CVBS_INCM
TU_SIF
SC1_FB
DSUB_R
DSUB_G
DSUB_B
75
OPT
1%
R312
C104
OPT
1%
R31 5 7 5
C105
NON_EU
NON_EU
R196
10
1%
SIDE_COMP_Y
SIDE_COMP_Pr
SIDE_COMP_Pb
SIDE_COMP_INCM
R128
OPT
CONNECT NEAR BCM CHIP
TU_IF_AGC_1
TU_IF_AGC_2
75
R131
1%
R31 3 7 5
0
OPT
120
R3056
1%
R135-*1
R2112
R3055
240
EU
181%
0.1uF
C106
C4020
0.1uF
NON_EU
82 1%
R2113
12
47pF
C101
ONLY USE NON_EU
FOR COMP 1
82
1%
R165
C177
R2114
0
A2.5V
R137
10K
R139
12K
R2117
0
OPT
A2.5V
A1.2V
C111
0.1uF
R2115
R4020
10K
C169 47pF
R166
12
12K
75
R4021
OPT
A2.5V
A1.2V
BLM18PG121SN1D
47pF
C170
75
1%
1%
R167
R100
R142
R143
R141 1%
0
R2116
BLM18PG121SN1D
L102
C113
0.1uF
L103
A2.5V
C112
0.1uF
NON_EU
62
OPT
62
75
A1.2V
C172
4.7uF
C119
0.1uF
BLM18PG121SN1D
C120
L104
1000pF
BLM18PG121SN1D
L105
C117
1000pF
NON_EU
R2112-*1
R141-*1
125%
EU
L106
BLM18PG121SN1D
C121
0.1uF
RGB_HSYNC
RGB_VSYNC
C293
0.01uF
C2005
0.01uF
D3.3V
D1.8V
C294
0.1uF
C2006
0.01uF
C365
0.1uF
C272
0.1uF
C357
10uF
10V
DVSS_1
DVSS_2
DVSS_3
DVSS_4
DVSS_5
DVSS_6
DVSS_7
DVSS_8
DVSS_9
DVSS_10
DVSS_11
DVSS_12
DVSS_13
DVSS_14
DVSS_15
DVSS_16
DVSS_17
DVSS_18
DVSS_19
DVSS_20
DVSS_21
DVSS_22
DVSS_23
DVSS_24
DVSS_25
DVSS_26
DVSS_27
DVSS_28
DVSS_29
DVSS_30
DVSS_31
DVSS_32
DVSS_33
DVSS_34
DVSS_35
DVSS_36
DVSS_37
DVSS_38
DVSS_39
DVSS_40
DVSS_41
DVSS_42
DVSS_43
DVSS_44
DVSS_45
DVSS_46
DVSS_47
DVSS_48
DVSS_49
DVSS_50
DVSS_51
DVSS_52
DVSS_53
DVSS_54
DVSS_55
DVSS_56
DVSS_57
DVSS_58
DVSS_59
DVSS_60
DVSS_61
C275
0.1uF
C356
0.1uF
16V
IC100
0.1uF
C348
0.1uF
16V
DVSS_62
DVSS_63
DVSS_64
DVSS_65
DVSS_66
DVSS_67
DVSS_68
DVSS_69
DVSS_70
DVSS_71
DVSS_72
DVSS_73
DVSS_74
DVSS_75
DVSS_76
DVSS_77
DVSS_78
DVSS_79
DVSS_80
DVSS_81
DVSS_82
DVSS_83
DVSS_84
DVSS_85
DVSS_86
DVSS_87
DVSS_88
DVSS_89
DVSS_90
DVSS_91
DVSS_92
DVSS_93
DVSS_94
DVSS_95
DVSS_96
DVSS_97
DVSS_98
DVSS_99
DVSS_100
DVSS_101
DVSS_102
DVSS_103
DVSS_104
DVSS_105
DVSS_106
DVSS_107
DVSS_108
DVSS_109
DVSS_110
DVSS_111
DVSS_112
DVSS_113
DVSS_114
DVSS_115
DVSS_116
DVSS_117
0.1uF
C274
0.1uF
C363
C364
0.1uF
0.1uF
16V
16V
16V
LGE3556CP (C0 3D PIP)
AD5
AD6
J7
K7
L7
M7
AB7
AC7
G8
D9
AA9
G10
A11
L11
M11
N11
P11
R11
T11
U11
V11
D12
G12
L12
M12
N12
P12
R12
T12
U12
V12
L13
M13
N13
P13
R13
T13
U13
V13
G14
L14
M14
N14
P14
R14
T14
U14
V14
L15
M15
N15
P15
R15
T15
U15
V15
A16
G16
L16
M16
N16
C276
C320
P16
R16
T16
U16
V16
AA16
D17
L17
M17
N17
P17
R17
T17
U17
V17
AA17
AC19
G18
L18
M18
N18
P18
R18
T18
U18
V18
D20
G20
H20
A21
E21
F21
G21
E22
F22
G22
H22
J22
K22
L22
M22
N22
P22
R22
T22
U22
V22
W22
Y22
AA22
W23
AB23
F28
M28
T28
AC28
16V
C278
4.7uF
C319
0.1uF
16V
C280
4.7uF
LGE3556CP (C0 3D PIP)
AG28
DS_AGCI_CTL
AH28
DS_AGCT_CTL
AA21
EDSAFE_AVSS_1
AB22
EDSAFE_AVSS_2
AF26
EDSAFE_AVSS_3
AF27
A1.2V
C144
0.1uF
C122
4.7uF
C123
0.01uF
C118
0.01uF
C127
0.1uF
0.1uF
C128
0.1uF
C129
C130
0.1uF
0.1uF
C131
0.1uF
C132
0.1uF
C133
0.1uF
C134
0.1uF
C135
0.1uF
C174
0.1uF
C175
0.1uF
C176
5%
62
0.1uF
C110
0.1uF
C124
0.1uF
C125
0.1uF
C100
SC1_ID
C140
4.7uF
EDSAFE_AVSS_4
AF28
EDSAFE_AVSS_5
AG27
EDSAFE_AVDD2P5
AE26
EDSAFE_DVDD1P2
AE28
EDSAFE_IF_N
AE27
EDSAFE_IF_P
AD24
PLL_DS_AGND
AB19
PLL_DS_AVDD1P2
AB25
PLL_DS_TESTOUT
AB18
SD_V5_AVDD1P2
AC17
SD_V5_AVDD2P5
AB17
SD_V5_AVSS
AD14
SD_V1_AVDD1P2
AD16
SD_V1_AVDD2P5
AB15
SD_V1_AVSS_1
AC15
SD_V1_AVSS_2
AD13
SD_V2_AVDD1P2
AE13
SD_V2_AVDD2P5
AC13
SD_V2_AVSS_1
AB14
SD_V2_AVSS_2
AC14
SD_V2_AVSS_3
AC12
SD_V3_AVDD1P2
AD12
SD_V3_AVDD2P5
AB13
SD_V3_AVSS_1
AA14
SD_V3_AVSS_2
AC11
SD_V4_AVDD1P2
AD11
SD_V4_AVDD2P5
AB12
SD_V4_AVSS
AD10
SD_R
AC10
SD_INCM_R
AE9
SD_G
AF9
SD_INCM_G
AH9
SD_B
AG9
SD_INCM_B
AG15
SD_Y1
AE15
SD_PR1
AF15
SD_PB1
AH15
SD_INCM_COMP1
AG16
SD_Y2
AF16
SD_PR2
AH17
SD_PB2
AH16
SD_INCM_COMP2
AG14
SD_Y3
AE14
SD_PR3
AF14
SD_PB3
AH14
SD_INCM_COMP3
AH10
SD_L1
AG10
SD_C1
AE10
SD_INCM_LC1
AE11
SD_L2
AF11
SD_C2
AH11
SD_INCM_LC2
AH13
SD_L3
AE12
SD_C3
AF12
SD_INCM_LC3
AD9
SD_CVBS1
AG11
SD_CVBS2
AG12
SD_CVBS3
AF13
SD_CVBS4
AC9
SD_INCM_CVBS1
AF10
SD_INCM_CVBS2
AH12
SD_INCM_CVBS3
AG13
SD_INCM_CVBS4
AF17
SD_SIF1
AG17
SD_INCM_SIF1
AD15
SD_FB
AE16
SD_FS
AE17
SD_FS2
AB16
PLL_VAFE_AVDD1P2
AA15
PLL_VAFE_AVSS
AC16
PLL_VAFE_TESTOUT
AG3
RGB_HSYNC
AF4
RGB_VSYNC
IC100
I2S_CLK_IN
I2S_CLK_OUT
I2S_DATA_IN
I2S_DATA_OUT
I2S_LR_IN
I2S_LR_OUT
AUD_LEFT0_N
AUD_LEFT0_P
AUD_AVDD2P5_0
AUD_AVSS_0_1
AUD_AVSS_0_2
AUD_AVSS_0_3
AUD_AVSS_0_4
AUD_AVSS_0_5
AUD_RIGHT0_N
AUD_RIGHT0_P
AUD_LEFT1_N
AUD_LEFT1_P
AUD_RIGHT1_N
AUD_RIGHT1_P
AUD_AVDD2P5_1
AUD_AVSS_1_1
AUD_AVSS_1_2
AUD_AVSS_1_3
AUD_LEFT2_N
AUD_LEFT2_P
AUD_RIGHT2_N
AUD_RIGHT2_P
AUD_AVDD2P5_2
AUD_AVSS_2_1
AUD_AVSS_2_2
AUD_SPDIF
SPDIF_AVDD2P5
SPDIF_AVSS
SPDIF_IN_N
SPDIF_IN_P
HDMI_RX_0_CEC_DAT
HDMI_RX_0_HTPLG_IN
HDMI_RX_0_HTPLG_OUT
HDMI_RX_0_DDC_SCL
HDMI_RX_0_DDC_SDA
HDMI_RX_0_RESREF
HDMI_RX_0_CLK_N
HDMI_RX_0_CLK_P
HDMI_RX_0_DATA0_N
HDMI_RX_0_DATA0_P
HDMI_RX_0_DATA1_N
HDMI_RX_0_DATA1_P
HDMI_RX_0_DATA2_N
HDMI_RX_0_DATA2_P
HDMI_RX_0_VDD3P3
HDMI_RX_0_VDD1P2
HDMI_RX_0_VDD2P5
HDMI_RX_0_AVSS_1
HDMI_RX_0_AVSS_2
HDMI_RX_0_AVSS_3
HDMI_RX_0_AVSS_4
HDMI_RX_0_AVSS_5
HDMI_RX_0_AVSS_6
HDMI_RX_0_PLL_AVSS
HDMI_RX_0_PLL_DVDD1P2
HDMI_RX_0_PLL_DVSS
HDMI_RX_1_CEC_DAT
HDMI_RX_1_HTPLG_IN
HDMI_RX_1_HTPLG_OUT
HDMI_RX_1_DDC_SCL
HDMI_RX_1_DDC_SDA
HDMI_RX_1_RESREF
HDMI_RX_1_CLK_N
HDMI_RX_1_CLK_P
HDMI_RX_1_DATA0_N
HDMI_RX_1_DATA0_P
HDMI_RX_1_DATA1_N
HDMI_RX_1_DATA1_P
HDMI_RX_1_DATA2_N
HDMI_RX_1_DATA2_P
HDMI_RX_1_VDD3P3
HDMI_RX_1_VDD1P2
HDMI_RX_1_VDD2P5
HDMI_RX_1_AVSS_1
HDMI_RX_1_AVSS_2
HDMI_RX_1_AVSS_3
HDMI_RX_1_AVSS_4
HDMI_RX_1_AVSS_5
HDMI_RX_1_AVSS_6
HDMI_RX_1_AVSS_7
HDMI_RX_1_AVSS_8
HDMI_RX_1_AVSS_9
HDMI_RX_1_PLL_AVSS
HDMI_RX_1_PLL_DVDD1P2
HDMI_RX_1_PLL_DVSS
AE18
AF18
AD17
AH19
AD18
AG18
AG26
AH26
AF23
AA20
AB21
AC22
AC23
AD23
AH25
AG25
AH23
AG23
AG24
AH24
AE22
AB20
AC21
AE23
AF21
AE21
AF22
AG22
AD21
AC20
AD22
AH2
AC6
AE4
AF3
AH1
AG1
AA6
AA5
AB3
Y6
AC4
AC1
AC2
AD1
AD2
AE1
AE2
AF1
AF2
AD3
AE3
AC3
AD4
AB5
AB6
AG2
AB4
AA7
Y8
AC5
W8
AA3
V4
U6
V5
V3
W4
W2
W3
Y1
Y2
AA2
AA1
AB2
AB1
Y3
Y4
W5
W1
U5
W6
U7
V7
W7
U8
V8
Y5
V6
AA4
Y7
BT_LOUT_N
BT_LOUT_P
BT_ROUT_N
BT_ROUT_P
R2036
1K
R309
OPT
C150
0.1uF
10K
R152499
R2037
R153499
C145
4.7uF
10K
OPT
C158
1000pF
R310 10K
R2035
0
R2038 10K
SPDIF_OUT
+5V_NORMAL
R3070
R3080
C153
0.1uF
C151
0.01uF
10K
R2039
C146
4.7uF
C159
1000pF
C147
0.01uF
HP_ROUT_N
HP_ROUT_P
C148
0.01uF
SCART1_Lout_N
SCART1_Lout_P
SCART1_Rout_N
SCART1_Rout_P
C149
0.01uF
HDMI_CLKHDMI_CLK+
HDMI_RX0HDMI_RX0+
HDMI_RX1-
HDMI_RX1+
HDMI_RX2HDMI_RX2+
C160
0.1uF
C165
10uF
D3.3V
C154
0.1uF
C152
0.01uF
AUD_SCK
AUD_LRCH
AUD_LRCK
HP_LOUT_N
HP_LOUT_P
C155
0.1uF
C156
0.1uF
C157
0.1uF
BLM18PG121SN1D
L107
C161
0.1uF
BLM18PG121SN1D
L108
C166
10uF
C162
10uF
C163
10uF
C164
10uF
HDMI_SCL
HDMI_SDA
A3.3V
BLM18PG121SN1D
L109
A1.2V
A3.3V
BLM18PG121SN1D
L110
A1.2V
FOR ESD
C384
33uF
10V
A2.5V
For LEX8(ALEF)
A2.5V
C3006
0.1uF
16V
A2.5V
A2.5V
HP_LOUT_N
HP_LOUT_P
HP_ROUT_N
HP_ROUT_P
C248
1000pF
C216
0.1uF
C281
1000pF
C2003
0.1uF
R205
C268
1000pF
A3.3V
20
C370
C371
0.1uF
0.01uF
C283
C282
1000pF
1000pF
D1.2V
LGE3556CP (C0 3D PIP)
H8
VDDC_1
J8
VDDC_2
K8
VDDC_3
L8
VDDC_4
M8
VDDC_5
N8
VDDC_6
P8
VDDC_7
R8
VDDC_8
AA8
VDDC_9
H9
VDDC_10
H10
VDDC_11
H11
VDDC_12
H12
VDDC_13
H13
VDDC_14
H14
VDDC_15
H15
VDDC_16
H16
VDDC_17
H17
VDDC_18
H18
VDDC_19
H19
VDDC_20
H21
VDDC_21
J21
VDDC_22
K21
VDDC_23
L21
VDDC_24
M21
VDDC_25
N21
VDDC_26
P21
VDDC_27
R21
VDDC_28
T21
VDDC_29
U21
VDDC_30
V21
VDDC_31
W21
VDDC_32
Y21
VDDC_33
AH27
AA12
AA13
AA18
AA19
AB28
AGC_VDDO
VDDO_1
VDDO_2
VDDO_3
VDDO_4
E28
VDDO_5
L28
VDDO_6
U28
VDDO_7
VDDO_8
A9
DDRV_1
G9
DDRV_2
G11
DDRV_3
G13
DDRV_4
A14
DDRV_5
G15
DDRV_6
G17
DDRV_7
A19
DDRV_8
G19
DDRV_9
D3.3V
D1.8V
C369
4.7uF
C284
0.01uF
IC100
C292
1000pF
C285
0.01uF
C318
0.1uF
D1.8V
C297
C2004
4.7uF
33uF
D1.8V
C304
0.1uF
16V
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EUROBBTV
BCM3556 VIDEO IN
2009.06.18
3
IC100
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
LGE3556CP (C0 3D PIP)
DDR_BVDD0
DDR_BVDD1
DDR_BVSS0
DDR_BVSS1
DDR_PLL_TEST
DDR_PLL_LDO
DDR01_CKE
DDR_COMP
DDR01_ODT
DDR_EXT_CLK
DDR0_CLK
DDR0_CLKB
DDR1_CLK
DDR1_CLKB
DDR01_A00
DDR01_A01
DDR01_A02
DDR01_A03
DDR0_A04
DDR0_A05
DDR0_A06
DDR01_A07
DDR01_A08
DDR01_A09
DDR01_A10
DDR01_A11
DDR01_A12
DDR01_A13
DDR1_A04
DDR1_A05
DDR1_A06
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_CASB
DDR0_DQ00
DDR0_DQ01
DDR0_DQ02
DDR0_DQ03
DDR0_DQ04
DDR0_DQ05
DDR0_DQ06
DDR0_DQ07
DDR0_DQ08
DDR0_DQ09
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR1_DQ00
DDR1_DQ01
DDR1_DQ02
DDR1_DQ03
DDR1_DQ04
DDR1_DQ05
DDR1_DQ06
DDR1_DQ07
DDR1_DQ08
DDR1_DQ09
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15
DDR0_DM0
DDR0_DM1
DDR1_DM0
DDR1_DM1
DDR0_DQS0
DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B
DDR1_DQS0
DDR1_DQS0B
DDR1_DQS1
DDR1_DQS1B
DDR01_RASB
DDR_VREF0
DDR_VREF1
DDR01_WEB
DDR_VDDP1P8_1
DDR_VDDP1P8_2
* DDR_VTT
C426
C425
10uF
16V
C417
10uF
10V
10uF
16V
DDR1_VREF0
DDR0_VREF0
C411
0.1uF
16V
DDR_VTT
R414 0
R415 0
C412
0.1uF
16V
A6
A24
B7
B24
F20
B23
B17
C22
E16
C23
B12
C12
A13
A12
B15
E14
A15
D15
E13
E12
F13
C14
F14
B14
D14
C13
D13
B13
F15
C15
D16
F16
B16
E15
A17
A8
B11
B8
D11
E11
C8
C11
C9
D8
E10
E9
F11
F12
E8
D10
F8
C18
C20
A18
B21
C21
B18
B20
D18
E18
D21
F18
E20
A22
F17
B22
E17
A10
C10
A20
F19
B10
B9
F10
F9
B19
C19
E19
D19
C16
A7
A23
C17
C7
D22
C406
0.1uF
C423
10uF
10V
C419
10uF
10V
A1.2V
R411 0
OPT
D1.8V
R412 240
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]
C415
0.1uF
OPT
C413
0.1uF
16V
C414
0.1uF 16V
D1.8V
D1.8V
C4030.1uF
C4040.1uF
DDR01_CKE
1%
0.1uF
OPT
C428 0.1uF
C427
R418
C405
1uF
BD35331F-E2
10K
GND
1
EN
2
VTTS
3
VREF
4
DDR01_ODT
DDR0_CLKb
DDR1_CLKb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_CASb
DDR0_DQS0
DDR0_DQS0b
DDR0_DQS1
DDR0_DQS1b
DDR1_DQS0
DDR1_DQS0b
DDR1_DQS1
DDR1_DQS1b
DDR01_RASb
DDR01_WEb
C4020.1uF
C4080.1uF
IC404
DDR0_CLK
DDR1_CLK
DDR0_DM0
DDR0_DM1
DDR1_DM0
DDR1_DM1
C407
1uF
004:C7;004:C4
004:C7;004:C4
004:F7;004:F4
004:F7;004:F4
004:E6
004:E3
004:H6
004:H3
004:E6
004:E6
004:E3
004:E3
004:H6
004:H6
004:H3
004:H3
VTT
8
VTT_IN
7
VCC
6
VDDQ
5
C422
1uF
10V
DDR01_A[0-3]
DDR0_A[4-6]
DDR01_A[7-13]
DDR1_A[4-6]
DDR0_DQ[8-15]
DDR1_DQ[8-15]
C400
C401
1uF
470pF
D3.3V
R417
220
004:A7;004:C4
004:A7;004:C4
DDR0_DQ[0-7]
DDR1_DQ[0-7]
004:A7;004:C7
004:A7;004:C7
004:A7;004:C7;004:F7;004:F4;004:I6;004:I4
DDR0_VREF0
DDR1_VREF0
C410
C409
1uF
470pF
D1.8V
C420
0.1uF
16V
C418
1uF
10V
C416
10uF
10V
DDR0_CLK
DDR0_CLKb
DDR01_CKE
DDR01_RASb
DDR01_CASb
DDR01_WEb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR0_A[4-6]
DDR01_ODT
DDR0_CLK
DDR0_CLKb
DDR01_CKE
DDR01_RASb
DDR01_CASb
DDR01_WEb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR0_A[4-6]
DDR01_ODT
R406
K4T1G084QF-BCF8
100
1%
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_1
L7
NC_2
F9
ODT0
K4T1G084QF-BCF8
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
BA2
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_1
L7
NC_2
F9
ODT0
C440
470pF
IC400
IC401
C441
0.047uF
C442
0.1uF
DM/RDQS
NU/RDQS
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
DM/RDQS
NU/RDQS
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VSS_1
VSS_2
VSS_3
VSS_4
VREF
VDDL
VSSDL
VDD_1
VDD_2
VDD_3
VDD_4
VSS_1
VSS_2
VSS_3
VSS_4
VREF
VDDL
VSSDL
C445
C446
C444
C443
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS
DQS
10uF
C8
C2
D7
D3
D1
D9
B1
B9
B7
A8
B3
A2
A9
C1
C3
C7
C9
A1
L1
E9
H9
A7
B2
B8
D2
D8
A3
E3
J1
K9
E2
E1
E7
470pF
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
0.047uF
0.1uF
D1.8V
DDR0_VREF0
C449
0.1uF
Close to IC
C8
DDR0_DQ[9]
DQ0
C2
DDR0_DQ[8]
DQ1
D7
DDR0_DQ[12]
DQ2
D3
DDR0_DQ[13]
DQ3
D1
DDR0_DQ[15]
DQ4
D9
DDR0_DQ[11]
DQ5
B1
DDR0_DQ[10]
DQ6
B9
DDR0_DQ[14]
DQ7
B7
DQS
A8
DQS
B3
A2
A9
C1
C3
C7
C9
A1
L1
E9
H9
A7
B2
B8
D2
D8
A3
E3
J1
K9
E2
E1
E7
D1.8V
DDR0_VREF0
C450
0.1uF
Close to IC
C447
10uF
DDR0_DQS0
DDR0_DQS0b
DDR0_DM0
C452
470pF
DDR0_DQS1
DDR0_DQS1b
DDR0_DM1
C453
470pF
C451
C448
10uF
22uF
DDR0_DQ[0-7]
004:B6;004:F3;004:I7
DDR0_DQ[8-15]
C456
C457
C455
C454
10uF
0.1uF
004:A7;004:F4
004:A7;004:F4
004:A4
004:A4
004:A4
004:A7;004:C5;004:C2;004:F2;004:I4;004:I6
004:A4
004:A4
004:A4
004:B6;004:F6;004:I7
C458
10uF
470pF
0.047uF
004:B6
DDR1_CLK
DDR1_CLKb
DDR01_CKE
DDR01_RASb
DDR01_CASb
DDR01_WEb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR1_A[4-6]
DDR01_ODT
DDR1_CLK
DDR1_CLKb
DDR01_CKE
DDR01_RASb
DDR01_CASb
DDR01_WEb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR1_A[4-6]
DDR01_ODT
C459
0.1uF
C460
R407
100
1%
0.047uF
C461
470pF
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
IC402
K4T1G084QF-BCF8
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_1
L7
NC_2
F9
ODT0
IC403
K4T1G084QF-BCF8
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_1
L7
NC_2
F9
ODT0
DM/RDQS
NU/RDQS
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSS_1
VSS_2
VSS_3
VSS_4
VREF
VDDL
VSSDL
DM/RDQS
NU/RDQS
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSS_1
VSS_2
VSS_3
VSS_4
VREF
VDDL
VSSDL
C477
C471
C470
C472
0.047uF
0.1uF
C473
C469
0.047uF
C468
0.1uF
004:B5
004:A4
004:A3
004:A4
10uF
470pF
DDR01_A[0-3,7-13]
DDR1_A[4-6]
DDR0_A[4-6]
C465
C462
470pF
DDR1_DQ[0-7]
C8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS
DQS
DDR1_DQ[0]
C2
DDR1_DQ[1]
D7
DDR1_DQ[5]
D3
DDR1_DQ[3]
D1
DDR1_DQ[4]
D9
DDR1_DQ[2]
B1
DDR1_DQ[6]
B9
DDR1_DQ[7]
B7
A8
B3
A2
A9
C1
C3
C7
C9
A1
L1
E9
H9
A7
B2
B8
D2
D8
A3
E3
J1
K9
E2
E1
E7
D1.8V
DDR1_VREF0
DDR1_DQS0
DDR1_DQS0b
DDR1_DM0
C463
470pF
C466
0.1uF
10uF
C474
10uF
C475
22uF
DDR01_RASb
DDR01_CASb
DDR01_BA1
DDR01_BA0
DDR01_BA2
DDR01_WEb
DDR01_CKE
DDR01_ODT
DDR01_RASb
DDR01_BA1
Close to IC
DDR01_BA0
DDR01_BA2
DDR01_WEb
DDR01_CKE
DDR01_ODT
DDR1_DQ[8-15]
004:B5
C8
DDR1_DQ[9]
DQ0
C2
DDR1_DQ[8]
DQ1
D7
DDR1_DQ[12]
DQ2
D3
DDR1_DQ[13]
DQ3
D1
DDR1_DQ[15]
DQ4
D9
DDR1_DQ[14]
DQ5
B1
DDR1_DQ[10]
DQ6
B9
DDR1_DQ[11]
DQ7
B7
DQS
A8
DQS
B3
A2
A9
C1
C3
C7
C9
A1
L1
E9
H9
A7
B2
B8
D2
D8
A3
E3
J1
K9
E2
E1
E7
D1.8V
DDR1_VREF0
DDR1_DQS1
DDR1_DQS1b
DDR1_DM1
470pF
C464
C467
0.1uF
004:A3
004:A3
004:A4
C476
10uF
DDR01_A[2]
DDR01_A[0]
DDR1_A[6]
DDR01_A[12]
DDR01_A[9]
DDR01_A[7]
DDR1_A[5]
DDR1_A[4]
DDR01_A[11]
DDR01_A[8]
DDR01_A[13]
DDR01_A[3]
DDR01_A[1]
DDR01_A[10]
DDR01_A[2]
DDR01_A[0]
DDR0_A[6]
DDR01_A[3]
DDR01_A[1]
DDR01_A[10]
DDR01_A[12]
DDR01_A[9]
DDR01_A[7]
DDR0_A[5]
DDR0_A[4]
DDR01_A[11]
DDR01_A[8]
DDR01_A[13]
0.1uF
C478
0.047uF
75
AR400
R408 75
R409 75
75
AR401
AR402
75
AR403
75
AR404
R410 75
75
AR405
75
AR406
75
AR407
75
AR408
75
AR409
R404 75
470pF
C479
C481
C480
10uF
DDR_VTT
75
DDR_VTT
0.1uF
SI
C482
0.047uF
SI
C485
0.1uF
C486
0.1uF
C487
0.1uF
C488
0.1uF
C489
0.1uF
C490
0.1uF
C499
0.1uF
C421
0.1uF
PI
C491
0.1uF
C483
0.1uF
C484
0.1uF
C492
0.1uF
C493
0.1uF
C494
0.1uF
C496
0.1uF
C497
0.1uF
C498
0.1uF
C495
470pF
Close to IC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HONG YEON HYUK
BCM (EUROBBTV) 2009.06.18
DDR Memory
4
Motion Remote controller
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Motion Remocon Interface
L1700
120-ohm
BLM18PG121SN1D
R1700
100
R1701
100
R1702
100
R1703
100
R1704
100
+3.3V_NORMAL
M_REMOTE_RX
001:H6;001:I5
M_REMOTE_TX
001:H6;001:I5
P1700
12507WR-08L
1
2
3
4
5
6
7
8
9
ALL M_REMOTE OPTION
+3.3V_NORMAL
R1705
2.7K
R1706
2.7K
R1707
2.7K
M_RFModule_RESET
001:H5
DC
001:G7;001:H7
DD
001:G6;001:H6
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2_BCM_ATSC
MOTION_REMOCON
09/10/xx
20 100
Woofer AMP.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
+1.8V_AMP
L2101
BLM18PG121SN1D
WOOFER OPT
10uF
AUD_LRCH
AUD_LRCK
AUD_SCK
SDA2_3.3V
SCL2_3.3V
C2101
10V
AMP_RESET_N
AUD_MASTER_CLK
+1.8V_AMP
L2103
BLM18PG121SN1D
C2103
0.1uF
16V
WOOFER OPT
C2105
10uF
10V
R2106 100
R2107 100
R2108 100
R2109 100
R2110 100
C2112
1000pF
R2111
56
50V
C2108
100pF
50V
C2109
0.1uF
16V
C2113
100pF
OPT
C2116
33pF
50V
C2119
0.1uF
C2117
1000pF
50V
R2158
3.3K
+3.3V_NORMAL
L2105
BLM18PG121SN1D
R21 60 1 00
OPT
C2121
33pF
50V
WOOFER OPT
C2123
22pF
50V
C21 29
1uF 25 V
WOOFER OPT
C2127
10uF
10V
C2126
22pF
50V
WOOFER OPT
C2135
22000pF
BST1A
VDR1A
/RESET
DGND_1
GND_IO
CLK_I
VDD_IO
DGND_PLL
AGND_PLL
AVDD_PLL
DVDD_PLL
+1.8V_AMP
C2131
22pF
50V
WOOFER OPT
50V
AD
LF
GND
C2133
0.1uF
16V
+24V_AMP
PGND1A_2
EP_PAD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DGND_2
OUT1A_2
PGND1A_1
55
56
THERMAL
57
IC2101
NTP-7000
15
16
DVDD
SDATA
PVDD1A_2
OUT1A_1
52
53
54
17
18
WCK19BCK20SDA21SCL
PVDD1B_1
PVDD1B_2
PVDD1A_1
49
50
51
EAN60969601
22
MONITOR023MONITOR124MONITOR2
C2137
0.1uF
50V
OUT1B_1
OUT1B_2
47
48
C21 41
1uF
25V
PGND1B_2
46
25
26
VDR2B27BST2B
/FAULT
C2139
1000pF
50V
C2143
22000pF
50V
C2145
1uF
25V
VDR1B44BST1B45PGND1B_1
43
28
PGND2B_1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
C2147
10uF
35V
NC
VDR2A
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
PVDD2A_2
PVDD2A_1
PVDD2B_2
PVDD2B_1
OUT2B_2
OUT2B_1
PGND2B_2
C21 50
1uF25V
C2151
22000pF
50V
R2119
0
WOOFER OPT
R2120 100
WOOFER OPT
R2122
3.3
C2153
22000pF
50V
R2124
R2123
4.7K
WOOFER OPT
C2156
0.01uF
50V
4.7K
POWER_DET
AMP_MUTE1
R21 25 1 00
+24V_AMP
D2104
1N4148W
100V
WOOFER OPT
D2105
1N4148W
WOOFER OPT
WOOFER OPT
WOOFER OPT
R21 26 1 00
100V
R2131
12
C2162
390pF
50V
C2163
390pF
50V
R2132
12
R2138
12
R2137
12
L2108
AD-9060
2S
1S 1F
15uH
2F
C2166
0.47uF
50V
C2171
0.1uF
50V
C2172
0.1uF
50V
4.7K
R2144
4.7K
WOOFER OPT
R2149
3.3
WOOFER OPT
R2150
3.3
WOOFER OPT
C2178
0.01uF
50V
WOOFER OPT
C2177
0.01uF
50V
R2143
SPK_Woofer+
SPK_Woofer-
Woofer
SPK_Woofer-
SPK_Woofer+
R2156
0
R2155
0
1
2
FW25001-02(SPK 2P)
P2100
Development Item(Slim Depth)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2_BCM_ATSC
AMP_SUB_NTP
09.10
21 100
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