LG 65EC970V, 65EC970V-ZA Schematic

Internal Use Only

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OLED TV

SERVICE MANUAL

CHASSIS : ED41E

MODEL : 65EC970V 65EC970V-ZA

CAUTION

BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

Printed in KoreaP/NO : MFL68642101 (1411-REV00)

CONTENTS

CONTENTS .............................................................................................. 2

SAFETY PRECAUTIONS

SERVICING PRECAUTIONS

SPECIFICATION

....................................................................................... 6

ADJUSTMENT INSTRUCTION

EXPLODED VIEW

.................................................................................. 24

........................................................................ 3

.................................................................... 4

.............................................................. 15

SCHEMATIC CIRCUIT DIAGRAM

TROUBLE SHOOTING GUIDE

................................................ APPENDIX

........................................... APPENDIX

Only for training and service purposes

- 2 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.

It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to

0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

Only for training and service purposes

- 3 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

SERVICING PRECAUTIONS

CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the

SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conict between the

following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precau­tions. Remember: Safety First.

General Servicing Precautions

1. Always unplug the receiver AC power cord from the AC power
source before;

a. Removing or reinstalling any component, circuit board

module or any other receiver assembly.

b. Disconnecting or reconnecting any receiver electrical plug

or other electrical connection.

c. Connecting a test substitute in parallel with an electrolytic

capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explo­sion hazard.

2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".

3. Do not spray chemicals on or near this receiver or any of its
assemblies.

4. Unless specied otherwise in this service manual, clean

electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)

CAUTION: This is a ammable mixture.
Unless specied otherwise in this service manual, lubrication

of contacts in not required.

5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.

6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks
are correctly installed.

7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.

8. Use with this receiver only the test xtures specied in this

service manual.

CAUTION: Do not connect the test xture ground strap to any

heat sink in this receiver.

Electrostatically Sensitive (ES) Devices

Some semiconductor (solid-state) devices can be damaged eas­ily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES

devices are integrated circuits and some eld-effect transistors

and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component dam­age caused by static by static electricity.

1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alter­natively, obtain and wear a commercially available discharg­ing wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.

2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or expo­sure of the assembly.

3. Use only a grounded-tip soldering iron to solder or unsolder
ES devices.

4. Use only an anti-static type solder removal device. Some sol-

der removal devices not classied as “anti-static” can generate
electrical charges sufcient to damage ES devices.

5. Do not use freon-propelled chemicals. These can generate

electrical charges sufcient to damage ES devices.

6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads elec­trically shorted together by conductive foam, aluminum foil or
comparable conductive material).

7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective mate­rial to the chassis or circuit assembly into which the device will
be installed.
CAUTION: Be sure no power is applied to the chassis or cir­cuit, and observe all other safety precautions.

8. Minimize bodily motions when handling unpackaged replace­ment ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your

foot from a carpeted oor can generate static electricity suf­cient to damage an ES device.)

General Soldering Guidelines

1. Use a grounded-tip, low-wattage soldering iron and appropri­ate tip size and shape that will maintain tip temperature within
the range or 500 °F to 600 °F.

2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.

3. Keep the soldering iron tip clean and well tinned.

4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.

5. Use the following unsoldering technique

a. Allow the soldering iron tip to reach normal temperature.

(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-

type solder removal device or with solder braid.

CAUTION: Work quickly to avoid overheating the circuit

board printed foil.

6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature

(500 °F to 600 °F)

b. First, hold the soldering iron tip and solder the strand

against the component lead until the solder melts.

c. Quickly move the soldering iron tip to the junction of the

component lead and the printed circuit foil, and hold it there
only until the solder ows onto and around both the compo­nent lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.

d. Closely inspect the solder area and remove any excess or

splashed solder with a small wire-bristle brush.

Only for training and service purposes

- 4 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

IC Remove/Replacement

Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent at against the cir­cuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.

Removal

1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.

2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.

Replacement

1. Carefully insert the replacement IC in the circuit board.

2. Carefully bend each IC lead against the circuit foil pad and
solder it.

3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).

"Small-Signal" Discrete Transistor
Removal/Replacement

1. Remove the defective transistor by clipping its leads as close
as possible to the component body.

2. Bend into a "U" shape the end of each of three leads remain­ing on the circuit board.

3. Bend into a "U" shape the replacement transistor leads.

4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.

Power Output, Transistor Device
Removal/Replacement

1. Heat and remove all solder from around the transistor leads.

2. Remove the heat sink mounting screw (if so equipped).

3. Carefully remove the transistor from the heat sink of the circuit
board.

4. Insert new transistor in the circuit board.

5. Solder each transistor lead, and clip off excess lead.

6. Replace heat sink.

Diode Removal/Replacement

1. Remove defective diode by clipping its leads as close as pos­sible to diode body.

2. Bend the two remaining leads perpendicular y to the circuit
board.

3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.

4. Securely crimp each connection and solder it.

5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.

3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.

Circuit Board Foil Repair

Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed when­ever this condition is encountered.

At IC Connections

To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connec­tions).

1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).

2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.

3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.

4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.

At Other Connections

Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.

1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.

2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly con­nected to the affected copper pattern.

3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

Fuse and Conventional Resistor
Removal/Replacement

1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.

2. Securely crimp the leads of replacement component around
notch at stake top.

Only for training and service purposes

- 5 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application range

This specification is applied to the OLED TV with ED41E
chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

2) Relative Humidity: 65 % ± 10 %

3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed

each drawing and specification by part number in
accordance with BOM.

5) The receiver must be operated for about 20 minutes prior to

the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety : CE, IEC specification

- EMC : CE, IEC specification

- Wireless : Wireless HD Specification (Option)

4. Model General Specification

No. Item Specication Remarks

DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) : 26 countrie

Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria,
France, Spain, , Belgium, Luxemburg, Greece, Czech, Turkey, Morocco,
Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania, Albania,
Bosnia, Slovakia, Belarus

DTV (MPEG2/4, DVB-T2) :11 countries

UK(Ireland), Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan,
Russia, Italy, Croatia, Serbia

1 Market

EU(PAL Market-36Countries)/CIS
+ Morocoo(Africa)

DTV (MPEG2/4, DVB-C) : 37 countries

Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria,
France, Spain, Italy, Belgium, Russia, Luxemburg, Greece, Czech, Croa­tia, Turkey, Morocco, Ireland, Latvia, Estonia, Lithuania, Poland, Portugal,
Romania, Albania, Bosnia, Serbia, Slovakia, Belarus, UK, Sweden, Den­mark, Finland, Norway, Ukraine, Kazakhstan

DTV (MPEG2/4,DVB-S) : 37 countries

Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria,
France, Spain,Belgium, Luxemburg, Greece, Czech, Turkey, Morocco,
Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania, Albania,
Bosnia, Slovakia, Belarus, UK(Ireland), Sweden, Denmark, Finland, Nor­way, Ukraine, Kazakhstan,Russia, Italy, Croatia, Serbia

Supported satellite : 35 satellites
ABS1 75.0E, AMOS 4.0W, ASIASAT3S 105.5E, ASTRA 19.2E, ASTRA

23.5E, ASTRA 28.2E, ASTRA 4.8E, ATLANTIC BIRD2 8.0W, ATLAN­TIC BIRD3 5.0W, BADR 26.0E, DIRECTV-1R 56.0E, EUROBIRD 9A

9.0E, EUROBIRD3 33.0E, EUTELSAT 36 A/B 36.0E, EUTELSAT W2A

10.0E, EUTELSAT W3A 7.0E, EUTELSAT7WA 7.3WEUTELSAT 16.0E,
EXPRESS AM1 40.0E, EXPRESS AM3 140.0E, EXPRESS AM33 96.5E,
HELLASSAT 39.0E, HISPASAT 1CDE 30.0WHOTBIRD 13.0E, INTEL­SAT10&7 68.5E, INTELSAT15 85.2E, INTELSAT1R 50.0W, INTEL­SAT903 33.5W, INTELSAT904 60.0E, NILESAT 7.0W, NSS12 57.0E,
THOR 0.8W, TURKSAT 42.0E, YAMAL201 90.0E, OTHER

Only for training and service purposes

- 6 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

No. Item Specication Remarks

1) Digital TV

- DVB-T/T2

2 Broadcasting system

3 Program coverage

4 Receiving system

5 Scart (1EA) PAL, SECAM

6 Video Input RCA (1EA) PAL, SECAM, NTSC4.43

7 Head phone out

8 Component Input (1EA)

9 HDMI Input (4EA) Digital Input

10 Audio Input (3EA) Component, AV, DVI

11 SPDIF out (1EA) SPDIF out

12 USB (3EA) EMF, DivX HD, For SVC (download) JPEG, MP3, DivX HD

13 Ethernet Connect(1EA) Ethernet Connect

14 PCMCIA Card slot (1EA) PCMCIA slot

- DVB-C

- DVB-S/S2

2) Analogue TV

- PAL/SECAM B/G/I/D/K

- SECAM L/L’

1 ) Digital TV

- VHF, UHF

- C-Band,Ku-Band

2) Analogue TV

- VHF : E2 to E12

- UHF : E21 to E69

- CATV : S1 to S20

- HYPER : S21 to S47

Analog : Upper Heterodyne
Digital : COFDM, QAM

Antenna, AV1, AV2, Component, HDMI1,
HDMI2, HDMI3, HDMI4, USB1, USB2, USB3

Y/Cb/Cr
Y/Pb/Pr

► DVB-T

- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32

- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

► DVB-T2

- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,

- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

► DVB-T2

- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s

- Modulation :
16QAM, 64-QAM, 128-QAM and 256-QAM

► DVB-S/S2

- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s

- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10

Scart jack is Full scart and support ATV/DTV-OUT
(not support DTV Auto AV)
System : PAL, SECAM, PAL60

4 System : PAL, SECAM, NTSC4.43, PAL60
Hybrid Type

Rear : HDMI1 ~ HDMI3
Side : HDMI4

Rear (AV Gender)
Component, AV and DVI use same jack.

Only for training and service purposes

- 7 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

5. External Input Support Format

5.1. Component (Y, CPB, PR)

No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed

1. 720*480i 15.73 59.94 13.500 SDTV, DVD 480I(525I)

2 720*480i 15.73 60.00 13.514 SDTV, DVD 480I(525I)

3. 720*576i 15.625 50.00 13.500 SDTV, DVD 576I(625I) 50Hz

4 720*480p 31.47 59.94 27.000 SDTV 480P

5 720*480p 31.50 60.00 27.027 SDTV 480P

6 720*576p 31.25 50.00 27.000 SDTV 576P 50Hz

7 1280*720 44.96 59.94 74.176 HDTV 720P

8 1280*720 45.00 60.00 74.250 HDTV 720P

9 1280*720 45.00 50.00 74.250 HDTV 720P 50Hz

10 1920*1080 28.125 50.00 74.250 HDTV 1080I 50Hz,

11 1920*1080 33.72 59.94 74.176 HDTV 1080I

12 1920*1080 33.75 60.00 74.25 HDTV 1080I

13 1920*1080 56.25 50 148.5 HDTV 1080P

14 1920*1080 67.5 60.00 148.5 HDTV 1080P

Only for training and service purposes

- 8 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

5.2. HDMI : EDID DATA : Refer to adjust specification.

(1) DTV mode

No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Proposed

1 640*480 31.469 59.94 25.125 SDTV 480P

2 640*480 31.5 60.00 25.125 SDTV 480P

3 720*480 15.73 59.94 13.500 SDTV, DVD 480I(525I)

Spec. out but display4 720*480 15.75 60.00 13.514 SDTV, DVD 480I(525I)

5 720*576 15.625 50.00 13.500 SDTV, DVD 576I(625I) 50Hz

6 720*480 31.47 59.94 27 SDTV 480P

7 720*480 31.5 60.00 27.027 SDTV 480P

8 720*576 31.25 50.00 27 SDTV 576P

9 1280*720 44.96 59.94 74.176 HDTV 720P

10 1280*720 45 60.00 74.25 HDTV 720P

11 1280*720 37.5 50.00 74.25 HDTV 720P

12 1920*1080 28.125 50.00 74.25 HDTV 1080I

13 1920*1080 33.72 59.94 74.176 HDTV 1080I

14 1920*1080 33.75 60.00 74.25 HDTV 1080I

15 1920*1080 26.97 23.976 63.296 HDTV 1080P

16 1920*1080 27.00 24.000 63.36 HDTV 1080P

17 1920*1080 33.71 29.97 79.120 HDTV 1080P

18 1920*1080 33.75 30.00 79.20 HDTV 1080P

19 1920*1080 56.25 50.00 148.5 HDTV 1080P

20 1920*1080 67.432 59.94 148.350 HDTV 1080P

21 1920*1080 67.5 60.00 148.50 HDTV 1080P

22 3840*2160 53.95 23.98 296.703 UDTV 2160P Only UD Model

23 3840*2160 54 24.00 297.00 UDTV 2160P Only UD Model

24 3840*2160 56.25 25.00 297.00 UDTV 2160P Only UD Model

25 3840*2160 61.43 29.97 296.703 UDTV 2160P Only UD Model

26 3840*2160 67.5 30.00 297.00 UDTV 2160P Only UD Model

27 3840*2160 112.5 50.00 594 UDTV 2160P Only UD Model, Port3

28 3840*2160 135 59.94 593.407 UDTV 2160P Only UD Model, Port3

29 3840*2160 135 60.00 594 UDTV 2160P Only UD Model, Port3

30 4096*2160 53.95 23.98 296.703 UDTV 2160P Only UD Model

31 4096*2160 54 24.00 297 UDTV 2160P Only UD Model

32 4096*2160 56.25 25.00 297 UDTV 2160P Only UD Model

33 4096*2160 61.43 29.97 296.703 UDTV 2160P Only UD Model

34 4096*2160 67.5 30.00 297 UDTV 2160P Only UD Model

35 4096*2160 112.5 50.00 594 UDTV 2160P Only UD Model, Port3

36 4096*2160 135 59.94 593.407 UDTV 2160P Only UD Model, Port3

37 4096*2160 135 60.00 594 UDTV 2160P Only UD Model, Port3

Only for training and service purposes

- 9 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

(2) PC mode

No Resolution H-freq.(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Proposed

1 640*350 31.468 70.09 25.17 EGA

2 720*400 31.469 70.08 28.32 DOS

3 640*480 31.469 59.94 25.17 VESA(VGA)

4 800*600 37.879 60.31 40 VESA(SVGA)

5 1024*768 48.363 60.00 65 VESA(XGA)

6 1360*768 47.712 60.015 84.75 VESA(WXGA)

7 1152*864 54.348 60.053 80 VESA

8 1280*1024 63.981 60.020 109.00 SXGA Support to HDMI-PC

9 1920*1080 67.5 60 158.40 WUXGA(Reduced Blanking)

10 3840*2160 54 24.00 297.00 UDTV 2160P Only UD Model

11 3840*2160 56.25 25.00 297.00 UDTV 2160P Only UD Model

12 3840*2160 67.5 30.00 297.00 UDTV 2160P Only UD Model

13 4096*2160 53.95 23.97 296.703 UDTV 2160P Only UD Model

14 4096*2160 54 24 297 UDTV 2160P Only UD Model

Only for training and service purposes

- 10 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

5.3. 3D Mode - DTV/HDMI/USB

(1) RF Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1280*720 37.500 50 74.25 HDTV 720P 2D to 3D, Side by Side, Top & Bottom

2 1920*1080 28.125 50 74.25 HDTV 1080I 2D to 3D, Side by Side, Top & Bottom

(2) HDMI Input

1) HDMI 1.4/2.0(3D Supported mode manually)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode

1 720*480 31.5 60 27.03 SDTV 480P

2 720*576 31.25 50 27 SDTV 576P

3 1280*720

4 1920*1080

5 1920*1080

3840*2160

6

4096*2160

7

3840*2160
4096*2160

8 135 60

45.00 60.00 74.25 HDTV 720P

37.500 50 74.25 HDTV 720P

33.75 60.00 74.25 HDTV 1080I

28.125 50.00 74.25 HDTV 1080I

27.00 24.00 74.25 HDTV 1080P

28.12 25 74.25 HDTV 1080P

33.75 30.00 74.25 HDTV 1080P

67.50 60.00 148.5 HDTV 1080P

56.250 50 148.5 HDTV 1080P

53.95 23.976 296.703

54 24.00 297.00

56.25 25.00 297.00

61.43 29.970 296.703

67.5 30.00 297.00

112.5 50
594 HDTV 2160P

HDTV 2160P

2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Frame Sequential, Row Inter­leaving, Column Interleaving

2D to 3D, Side by Side(Half), Top & Bottom

2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column
Interleaving

2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Single Frame Sequential,
Row Interleaving, Column Interleaving

2D to 3D,
Top & Bottom(half), Side by Side(half),

2D to 3D, Top & Bottom(half), Side by Side(half),
Port3 Only

Only for training and service purposes

- 11 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

2) HDMI 1.4b (3D Supported mode automatically)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC 3D input proposed mode Proposed

31.469 / 31.5 59.94/ 60 25.125/25.2 1

1 640*480

2 720*480

3 720*576

4 720*576 15.625 50 27 21

5 1280*720

6 1920*1080

7 1920*1080

31.469 / 31.5 59.94/ 60 50.35/50.4 1 Side-by-side(Full) (SDTV 480P)

62.938/63 59.94/ 60 50.35/50.4 1

31.469 / 31.5 59.94 / 60 27.00/27.03 2,3

31.469 / 31.5 59.94 / 60 54/54.06 2,3 Side-by-side(Full) (SDTV 480P)

62.938/63 59.94 / 60 54/54.06 2,3

31.25 50 27 17,18

31.25 50 54 17,18 Side-by-side(Full) (SDTV 576P)

62.5 50 54 17,18

37.500 50 74.25 19

37.500 50 148.5 19 Side-by-side(Full) (HDTV 720P)

44.96 / 45 59.94 / 60 74.17/74.25 4

44.96 / 45 59.94 / 60 148.35/148.5 4 Side-by-side(Full) (HDTV 720P)

75 50 148.5 19

89.91/90 59.94 / 60 148.35/148.5 4

28.125 50.00 74.25 20

28.125 50.00 148.5 20 Side-by-side(Full) (HDTV 1080I)

33.72 / 33.75 59.94 / 60 74.17/74.25 5

33.72 / 33.75 59.94 / 60 148.35/148.5 5 Side-by-side(Full) (HDTV 1080I)

56.25 50.00 148.5 20

67.432/67.50 59.94 / 60 148.35/148.5 5

26.97 / 27 23.97 / 24 74.17/74.25 32

26.97 / 27 23.97 / 24 148.35/148.5 32 Side-by-side(Full) (HDTV 1080P)

28.125 25 74.25 33

28.125 25 148.5 33 Side-by-side(Full) (HDTV 1080P)

33.716 / 33.75 29.976 / 30.00 74.18/74.25 34

33.716 / 33.75 29.976 / 30.00 148.35/148.5 34 Side-by-side(Full) (HDTV 1080P)

43.94/54 23.97 / 24 148.35/148.5 32

56.25 25 148.5 33

29.976 / 30.00 148.35/148.5 34

56.250 50 148.5 31

67.432 / 67.5 59.94 / 60 148.35/148.50 16

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Frame packing
Field alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)

Top-and-Bottom
Side-by-side(half)

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Top-and-Bottom
Side-by-side(half)

Frame packing
Field alternative

Frame packing
Field alternative

Top-and-Bottom
Side-by-side(half)

Top-and-Bottom
Side-by-side(half)

Top-and-Bottom
Side-by-side(half)

Frame packing
Line alternative

Frame packing
Line alternative

Frame packing
Line alternative

Top-and-Bottom
Side-by-side(half)

Top-and-Bottom
Side-by-side(half)

Secondary(SDTV 480P)
Secondary(SDTV 480P)

Secondary(SDTV 480P)
(SDTV 480P)

Secondary(SDTV 480P)
Secondary(SDTV 480P)

Secondary(SDTV 480P)
(SDTV 480P)

Secondary(SDTV 576P)
Secondary(SDTV 576P)

Secondary(SDTV 576P)
(SDTV 576P)

Secondary(SDTV 576I)
(SDTV 576I
(SDTV 576I
Secondary(SDTV 576I)
Secondary(SDTV 576I)

Primary(HDTV 720P)
Primary(HDTV 720P)

Primary(HDTV 720P)
Primary(HDTV 720P)

Primary(HDTV 720P)
(HDTV 720P)

Primary(HDTV 720P)
(HDTV 720P)

Secondary(HDTV 1080I)
Primary(HDTV 1080I)

Secondary(HDTV 1080I)
Primary(HDTV 1080I)

Primary(HDTV 1080I)
(HDTV 1080I)

Primary(HDTV 1080I)
(HDTV 1080I)

Primary(HDTV 1080P)
Primary(HDTV 1080P)

Secondary(HDTV 1080P)
Secondary(HDTV 1080P)

Primary(HDTV 1080P)
Secondary(HDTV 1080P)

Primary(HDTV 1080P)
(HDTV 1080P)

Secondary(HDTV 1080P)
(HDTV 1080P)

Primary(HDTV 1080P)
(HDTV 1080P)

Primary(HDTV 1080P)
Secondary(HDTV 1080P)

Primary(HDTV 1080P)
Secondary(HDTV 1080P)

Only for training and service purposes

- 12 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

3) HDMI-PC Input (3D Supported mode manually)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1024*768 48.36 60 65 HDTV 768P

2 1360*768 47.71 60 85.5 HDTV 768P

3 1920*1080 67.500 60 148.50 HDTV 1080P

54 24.00 297.00

4 3840*2160

5 4096*2160 54 24 297.00 HDTV 2160P

6 Others - - -

4) Component Input (3D) (3D Supported mode manually)

56.25 25.00 297.00

67.5 30.00 297.00

HDTV 2160P

640*350
720*400
640*480
800*600
1152*864

2D to 3D,
Side by Side(half), Top & Bottom

2D to 3D,
Side by Side(half), Top & Bottom

2D to 3D,
Side by Side(half), Top & Bottom,
Checker Board, Single Frame Sequential,
Row Interleaving, Column Interleaving

2D to 3D,
Top & Bottom(half), Side by Side(half),

2D to 3D,
Top & Bottom(half), Side by Side(half),

2D to 3D,
Side by Side(half), Top & Bottom

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1280*720 37.5 50 74.25 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom

2 1280*720 45.00 60.00 74.25 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom

3 1280*720 44.96 59.94 74.176 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom

4 1920*1080 33.75 60.00 74.25 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom

5 1920*1080 33.72 59.94 74.176 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom

6 1920*1080 28.12 50 74.25 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom

7 1920*1080 67.500 60 148.50 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

8 1920*1080 67.432 59.94 148.352 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

9 1920*1080 27.000 24.000 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

10 1920*1080 28.12 25 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

11 1920*1080 56.25 50 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

12 1920*1080 26.97 23.976 74.176 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

13 1920*1080 33.75 30.000 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

14 1920*1080 33.71 29.97 74.176 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom

Only for training and service purposes

- 13 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

R

L

R

L

(3) USB - Movie (3D) (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 Under 704x480 - - - 2D to 3D

Over 704x480

2

Under 1080P
Interlaced

Over 704x480

3

Under 1080P
Progressive

4 Over 2160P - 24/25/30/50/60 -

- - - 2D to 3D, Side by Side(Half), Top & Bottom

2D to 3D, Side by Side(Half), Top & Bottom,

- 50 / 60 -

- others -

Checker Board, Row Interleaving, Column Inter­leaving, Frame Sequential

2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column Inter­leaving

2D to 3D, Side by Side(Half), Top & Bottom
USB Only

(4) USB - Photo (3D) (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 Under 320x240 - - - 2D to 3D

2 Over 320x240 - - - 2D to 3D, Side by Side(Half), Top & Bottom

(5) USB (3D) (3D supported mode automatically)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 1080p 33.75 30 74.25 Side by Side(Half), Top & Bottom, Checker Board,

2 2160p 67.5 30 297 MPO(Photo), JPS(Photo)

(6) Miracast, Widi (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode

1 1024*768p - 30/60 -

2D to 3D, Side by Side(Half), Top & Bottom2 1280*720p - 30/60 -

3 1920*1080p - 30/60 -

4 Others - - - 2D to 3D

■ Remark: 3D Input mode

No. Side by Side Top & Bottom Checker board

1

Single Frame

Sequential

Frame Packing

Line

Interleaving

Column

Interleaving

Only for training and service purposes

- 14 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied to ED41E Chassis applied
OLED TV all models manufactured in TV factory.

2. Designation

(1) Because this is not a hot chassis, it is not necessary to

use an isolation transformer. However, the use of isolation

transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of

25 °C ± 5 °C of temperature and 65 % ± 10 % of relative

humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240

V~, 50/60 Hz.
(5) The receiver must be operated for about 5 minutes prior to

the adjustment when module is in the circumstance of over

15 °C.

In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours.

In case of keeping module is in the circumstance of below

-20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.

[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.

(4) Communication Port connection

1) Connect

: PCBA Jig → RS-232C Port == PC → RS-232C Port

(5) Download

- 14Y LCD TV + MAC +CI + Widevine + ESN + HDCP2.0 +
DTCP key

(6) Inspection

- In INSTART menu, check these keys.

3. MAIN PCBA Adjustments

3.1. ADC Calibration

- An ADC calibration is not necessary because MAIN SoC
(LGExxxx) is already calibrated from IC Maker

- If it needs to adjust manually, refer to appendix

3.2. MAC Address, ESN, Widevine, HDCP2.0
key download

(1) Equipment & Condition

- Play file: keydownload.exe

(2) Communication Port connection

1) Key Write: Com 1,2,3,4 and 115200 (Baudrate)

2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)

(3) Download process

1) Select the download items.

2) Mode check: Online Only

3) Check the test process : DETECT → MAC→ CI →

Widevine → ESN → HDCP2.0 → DTCP

4) Play: START

5) Check of result: Ready, Test, OK or NG

6) Printer out (MAC Address Label)

3.3. LAN Inspection(Ping Test)

3.3.1. Equipment setting

(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.

*IP Number : 12.12.2.2

Connect SET → LAN Port == PC → LAN Port

SET PC

3.3.2. LAN PORT inspection(PING TEST)

(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.

Only for training and service purposes

- 15 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

3.4. EDID download

3.4.1. Overview

It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity
of user input. It is a realization of "Plug and Play".

3.4.2. Equipment

(1) Since embedded EDID data is used, EDID download JIG,

HDMI cable are not need.

(2) Adjustment remote control

EDID Block 1, Bytes 128-255 [80H-FFH]
Block Type : CEA EDID Timing Extension Version 3

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 02 03 4A F1 54 10 9F 04 13 05 14 03 02 12 20 21
10 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50
20 09 57 07 7C 03 0C 00 10 00 B8 3C 20 C0 8E 01 02
30 03 04 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
40 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18 71 1C
50 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72
60 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 04

3.4.3. Download method

(1) Press Adj. key on the Adjustment remote control
(2) Select EDID D/L menu.
(3) By pressing Enter key, EDID download will begin
(4) If Download is successful, OK is display, but If Download is

failure, NG is displayed.

(5) If Download is failure, Re-try downloads.

Caution) When EDID Download, must remove HDMI Cable.

3.4.4. EDID DATA

- HDMI1 ~ HDMI3

- In the data of EDID, bellows may be different by Input mode.

0 1 2 3 4 5 6 7 8 9 A B C D E F

0x00 00 FF FF FF FF FF FF 00 1E 6D

ⓒ

0x01
0x02 0F 50 54 A1 8 00 31 40 45 40 61 40 71 40 81 80
0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
0x04 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
0x05 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20
0x07
0x00 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21
0x01 22 15 01 29 3D 06 C0 15 07 50
0x02
0x03
0x04 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18
0x05 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D
0x06 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

ⓓ

ⓕ

10 28 10 E3 05 03 01 02 3A 80 18 71 38

ⓕ

ⓐ Product ID
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:

ex) Monthly : ‘01’ → ‘01’, Year : ‘2014’ → ‘18’

ⓓ Model Name(Hex): LGTV
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)

# HDMI1 (C/S: 0xE7, 0x04)
EDID Block 0, Bytes 0-127 [00H-7FH]
Block Type : EDID 1.3

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7

ⓐ ⓑ

ⓓ

01

ⓕ

ⓔ1

ⓔ2

# HDMI2 (C/S: 0xE7, 0xF4)
EDID Block 0, Bytes 0-127 [00H-7FH]
Block Type : EDID 1.3

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7

EDID Block 1, Bytes 128-255 [80H-FFH]

Block Type : CEA EDID Timing Extension Version 3

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 02 03 4A F1 54 10 9F 04 13 05 14 03 02 12 20 21
10 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50
20 09 57 07 7C 03 0C 00 20 00 B8 3C 20 C0 8E 01 02
30 03 04 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
40 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18 71 1C
50 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72
60 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F4

# HDMI3 (C/S: 0xA1, 0x3A)

EDID Block 0, Bytes 0-127 [00H-7FH]

Block Type : EDID 1.3

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 A1

EDID Block 1, Bytes 128-255 [80H-FFH]

Block Type : CEA EDID Timing Extension Version 3

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 02 03 4A F1 54 10 9F 04 13 05 14 03 02 12 20 21
10 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 28 3D 06
20 C0 15 07 50 09 57 07 7C 03 0C 00 30 00 B8 3C 20
30 C0 8E 01 02 03 04 01 4F 3F FC 08 10 18 10 06 10
40 16 10 28 10 67 D8 5D C4 01 78 80 03 E3 05 03 01
50 E4 0F 00 C0 18 66 21 50 B0 51 00 1B 30 40 70 36
60 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 00 6E
70 28 55 00 40 84 63 00 00 1e 00 00 00 00 00 00 3A

Only for training and service purposes

- 16 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

# HDMI4 (C/S: 0xE7, 0xD4)
EDID Block 0, Bytes 0-127 [00H-7FH]
Block Type : EDID 1.3

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7

EDID Block 1, Bytes 128-255 [80H-FFH]
Block Type : CEA EDID Timing Extension Version 3

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 02 03 4A F1 54 10 9F 04 13 05 14 03 02 12 20 21
10 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50
20 09 57 07 7C 03 0C 00 40 00 B8 3C 20 C0 8E 01 02
30 03 04 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
40 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18 71 1C
50 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72
60 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D4

* Checksum (HDMI 1/2/3/4)

Input FFh (Checksum)

HDMI1 E7 04

HDMI2 E7 F4

HDMI3 A1 3A

HDMI4 E7 D4

4. Final Assembly Adjustment

4.1. White Balance Adjustment

4.1.1. Overview

(1) W/B adj. Objective & How-it-works

1) Objective: To reduce each Panel's W/B deviation

2) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order
to prevent saturation of Full Dynamic range and data,
one of R/G/B is fixed at 192, and the other two is
lowered to find the desired value.

3) Adjustment condition : normal temperature

① Surrounding Temperature : 25 °C ± 5 °C
② Warm-up time: About 5 Min
③ Surrounding Humidity : 20 % ~ 80 %
④ Before White balance adjustment, Keep power on

status, don’t power off

(2) Adj. condition and cautionary items

1) Lighting condition in surrounding area surrounding
lighting should be lower 10 lux. Try to isolate adj. area
into dark surrounding.

2) Probe location: Color Analyzer(CA-210) probe should be
within 10 cm and perpendicular of the module surface
(80°~ 100°)

3) Aging time

① After Aging Start, Keep the Power ON status during 5

Minutes.

② In case of LCD, Back-light on should be checked

using no signal or Full-white pattern.

4.1.2. Equipment

(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH 12 / LED:

CH 14 / OLED: CH 17)

(2) Adjustment Computer(During auto adj., RS-232C protocol

is needed)
(3) Adjustment Remote control
(4) Video Signal Generator MSPG-925F 720p/204-Gray

(Model: 217, Pattern: 49)

* Color Analyzer Matrix should be calibrated using CS-1000.

Only for training and service purposes

4.1.3. Equipment connection

Probe

- 17 -

Color Analyzer

Computer

RS- 232C

Pattern Generator

Signal Source

* If TV internal pattern is used, not needed

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

RS-232C

RS-232C

4.1.4. Adj. Command (Protocol)

(1) RS-232C Command used during auto-adjustment.

RS-232C COMMAND

CMD D ATA ID

Wb 00 00 Begin White Balance adj.

Wb 00 ff

End White Balance adj.(internal pattern disappears)

Explanation

(2) Adjustment Map

Cool

Medium

Warm

Command

Adj. item

R Gain j g 00 C0 172

G Gain j h 00 C0 172
B Gain j i 00 C0 192
R Cut
G Cut
B Cut
R Gain j a 00 C0 192
G Gain j b 00 C0 192
B Gain j c 00 C0 192
R Cut
G Cut
B Cut
R Gain j d 00 C0 192
G Gain j e 00 C0 160
B Gain j f 00 C0 128

R Cut

G Cut

(lower case ASCII)

CMD1 CMD2 MIN MAX

Data Range

(Hex.)

4.1.5. Adjustment method

(1) Auto WB calibration

1) Set TV in ADJ mode using P-ONLY key(or POWER
ONLY key).

2) Place optical probe on the center of the display

- It need to check probe condition of zero calibration
before adjustment

3) Connect RS-232C Cable

4) Select mode in ADJ Program and begin a adjustment.

5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode(Cool, Medium,
Warm)

6) Remove probe and RS-232C cable.

▪ W/B Adj. must begin as start command “wb 00 00” , and

finish as end command “wb 00 ff”, and Adj. offset if need

(2) LED White balance table

1) Cool Mode

① Purpose: Especially G-gain fix adjust leads to the

luminance enhancement. Adjust the color
temperature to reduce the deviation of the module
color temperature.

② Principle: To adjust the white balance without the

saturation, Adjust the G gain more than 172(If R gain
or G gain is more than 255, G gain can adjust less
than 172) and change the others (R/B Gain).

③ Adjustment mode : mode - Cool

Default

(Decimal)

3) Warm Mode

① Purpose : Adjust the color temperature to reduce the

deviation of the module color temperature.

② Principle : To adjust the white balance without the

saturation, Fix the W gain to 192 (default data) and
decrease the others.

③ Adjustment mode : mode - Warm

4) THX(Warm)

① Purpose : Adjust the color temperature to reduce the

deviation of the module color temperature.

② Principle : To adjust the white balance without the

saturation,Fix the W gain to 192 (default data) and
decrease the others.

③ Adjustment mode : mode - Warm
④ Auto White balance 4 point
⑤ Adjust 100 IRE White Balance.
⑥ Adjust Gamam 2.2 each IRE(60, 40, 20). Using max

luminance

⑦ Complete 4 point gamma, W/B.

Picture is H 1/3, V 1/3
fixed Center Window size
Outer Black Picture do not need change Contrast /
Brightness
Center Level can change Contrast / Bright
Window pattern of Center 0~255 level

4.1.6. Reference (White balance Adj. coordinate and
color temperature)

▪ Luminance : 204 Gray, 80IRE
▪ Standard color coordinate and temperature using CS-1000

(over 26 inch)

Mode

Cool 0.277 0.278 11,000 K - 0.0030

Medium 0.286 0.289 9,300 K 0.0000

Warm 0.313 0.329 6,500 K + 0.0030

▪

Standard color coordinate and temperature using CA-210(CH-17)

Mode

Cool 0.276 ± 0.002 0.283 ± 0.002 11,000 K 0.0000

Medium 0.285±0.002 0.293±0.002 9,300 K 0.0000

Warm 0.313±0.002 0.329±0.002 6,500 K + 0.0030

Coordinate

x y

Coordinate

x y

Temp ∆uv

Temp ∆uv

2) Medium Mode

① Purpose : Adjust the color temperature to reduce the

deviation of the module color temperature.

② Principle : To adjust the white balance without the

saturation, Fix the B gain to 192 (default data) and
decrease the others.

③ Adjustment mode : modes - Medium

Only for training and service purposes

- 18 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

4.2. Tool Option setting & Inspection per
countries

4.2.1. Overview

(1) Tool option selection is only done for models

4.2.2. Country Group selection

- Press ADJ key on the Adj. R/C, and then select Country
Group Menu

4.2.3. Tool Option Inspection

(1) Press Adj. key on the Adj. R/C, and then check Tool option.

Model Tool 1 Tool 2 Tool 3 Tool 4 Tool 5 Tool 6 Tool 7 Area

77EG97** 33963 29713

65EC97** 33929 29713

* Tool option can be reconstructed by Software

EU : 701
CIS : 669
EU : 700
CIS : 668

64797 2203 398 46735 3122

64797 2203 2430 46735 3122

4.3. Magic Motion remote control Check

4.3.1. Required Instruments

(1) RF-remote control for check, IR-KEY-CODE remote

control.

(2) Check AA battery before test. A recommendation is that a

tester change battery every lots.

4.5. 3D pattern test(Only for 3D models)

4.5.1. Test equipment

(1) Pattern Generator MSHG-600 or MSPG-6100 (HDMI 1.4

support)

(2) Pattern: HDMI mode (model No. 872, pattern No. 83)

4.5.2. Test method

(1) Input 3D test signal as Fig.1.

<Fig.1> HDMI Model No.872, Pattern No. 83

(2) Press ‘OK” key as a 3D input OSD is shown.
(3) Check pattern as Fig2 without 3D glasses. (3D mode

without 3D glasses)

4.3.2. Test

(1) Make pairing with TV set by pressing “Start key(Wheel

key)” on RCU.
(2) Check a cursor on screen by pressing "Wheel key" of RCU.
(3) Stop paring with TV set by pressing “Back+ Home” key of

RCU.

4.4. WIFI MAC ADDRESS CHECK

a. Using RS232 Command

Command Set ACK

Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]

b. check the menu on in-start

<Fig.2> OK in 3D mode without

3D glasses

<Fig.3> NG in 3D mode without

3D glasses

4.6. HDMI ARC Function Inspection

4.6.1. Test equipment

- Optic Receiver Speaker

- MSHG-600 (SW: 1220 ↑)

- HDMI Cable (for 1.4 version)

4.6.2. Test method

(1) Insert the HDMI Cable to the HDMI ARC port from the

master equipment (HDMI2)



(2) Check the sound from the TV Set

Only for training and service purposes

- 19 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

(3) Check the Sound from the Speaker or using AV & Optic

TEST program (It’s connected to MSHG-600)

* Remark: Inspect in Power Only Mode and check SW version

in master equipment

4.7. UHD 4K Test

(1) Video Inspection(UDG-4004NS)

1) Insert the HDMI Cable to TV Set.

2) Convert to HDMI Mode using TV/AV key on ADJ remote
control.

3) Inspect the sound and picture operation well.

(Color condition, Picture noise, Sound distortion etc.)

4) Inspection 2D → 3D conversion

(2) Pattern Inspection (MSPG-7100)

1) Insert the HDMI Jack to HDMI 3 Port.

2) Convert to UHD Inspection Pattern. (Use remote control)

3) Check Video and Sound.

4) Convert to 64 Gray Inspection Pattern.

5) Check Video and Sound.

6)Inspect HDMI-CEC function. (Push Play & Pause button)

5. AUDIO output check

5.1. AUDIO output check

(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal (0.4 Vrms)

5.2. Specification

Item Min Typ Max Unit Remark

Audio practical
max Output, L/R

(Distortion=10 %

max Output)

5.3. Audio Output Inspection

(1) Input “Check-S" key of adjust remote control to inspect

speaker.

(2) When you click the first, the output volume of left &right

main speakers must be 50.

(3) When you click the second, the output volume of left &right

main speakers must be 80.

(4) When you click the third, the output volume of left &right

main speakers must be 100.

(5) When you click the fourth, the output volume of left main

speaker must be 50.

9.0 10.0 12.0 W

8.5 8.9 9.9 Vrms

(1) Measurement condition

- EQ/AVL/Clear Voice: Off

(2) Speaker(8 Ω Impedance)

(3) 4K Inspection.(HEVC Inspection model only)

1) Insert USB that 4K video file is saved.

2) Check that the video plays normally.

Only for training and service purposes

- 20 -

(6) When you click the fifth, the output volume of right main

speaker must be 50.

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

6. Joystick function check

- Before you start a test, you must run a ‘Power Only Mode’.
(1) Channel Up Test : Press UP KEY OF SET

(2) Channel Down Test : Press DOWN KEY OF SET

(3) Volume Up Test : Press Left KEY OF SET

(4) Volume Down Test : Press Right KEY OF SET

7. EYE Q Green Inspection

(1) Turn on the TV set.
(2) After 25~30 seconds, Press “EYE” key on the Adjustment

remote control.



(3) Block the Intelligent Sensor module on the front C/A about

6 seconds. When the “Sensor Data” is lower than 20, you
can see the “OK” message.

→ If it doesn’t show “OK” message, the Sensor Module is

defected one. You have to replace that with a good one.



(4) After check the “OK” message come out, take out your

hand from the Sensor module.

→ Check “Sensor Data” value change from “0” to “300” or

not. If it doesn’t change the value, the sensor is also
defected one. You have to replace it.

Block

(hands or other object)



(5) Enter Test : Press Enter KEY OF SET

- Don’t need to run a test with this sequence. For example,

the sequence such as ‘Right → Up → Down → Left → Enter’

is allowed.

8. GND and HI-POT Test

8.1. GND & HI-POT auto-check preparation

- Check the POWER cable and SIGNAL cable insertion
condition

8.2. GND & HI-POT auto-check

(1) Pallet moves in the station. (POWER CORD / AV CORD is

tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)

- If Test is failed, Buzzer operates.

- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)

(5) HI-POT test (Auto)

- If Test is failed, Buzzer operates.

- If Test is passed, GOOD Lamp on and move to next
process automatically.

8.3. Checkpoint

(1) Test voltage

- GND: 1.5 KV/min at 100 mA

- SIGNAL: 3 KV/min at 100 mA

(2) TEST time: 1 second
(3) TEST POINT

- GND Test= POWER CORD GND and SIGNAL CABLE

GND.

- Hi-pot Test= POWER CORD GND and LIVE & NEUTRAL.

(4) LEAKAGE CURRENT: At 0.5 mArms

Only for training and service purposes

- 21 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

9. USB S/W download(Service only)

(1) Run a ‘Power Only Mode’.
(2) Put the USB Stick to the USB socket.
(3) Automatically detecting update file in USB Stick

- If your downloaded program version in USB Stick is lower
than that of TV set, it didn’t work.
Otherwise USB data is automatically detected.

(4) Show the message “Copying files from memory”.

(5) Updating is staring.

(6) Updating Completed, the TV will restart automatically.
(7) If your TV is turned on, check your updated version and

Tool option.

* If downloading version is more new than your TV have, TV

can lost all channel data. In this case, you have to channel
recover. If all channel data is cleared, you didn’t have a
DTV/ATV test on production line.

* After downloading, TOOL OPTION setting is needed again.

(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)

10. Optional adjustments

10.1. Manual ADC Calibration

10.1.1. Equipment & Condition

(1) Adjustment Remote control
(2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern Generator

- Resolution: 480i Comp1 (MSPG-925FA: model-209,
pattern-65)

- Resolution: 1080p Comp1 (MSPG-925FA: model-225,
pattern-65)

- Resolution: 1080p RGB (MSPG-925FA: model-225,
pattern-65)

- Pattern : Horizontal 100% Color Bar Pattern

- Pattern level: 0.7±0.1 Vp-p

10.1.2. Adjust method

(1) Check connected condition of Comp cable to the equipment
(2) Give a 480i Mode, Horizontal 100% Color Bar Pattern to

Comp1. (MSPG-925FA → Model: 209, Pattern: 65)

(3) Change input mode as Component1 and picture mode as

“Standard”

(4) Press the In-start key on the ADJ remote control after at

least 1 min of signal reception. Then, select 7.External

ADC. And Press OK or Right key for going to sub menu.
(5) Press OK in Comp 480i menu
(6) Give a 1080p Mode, Horizontal 100% Color Bar Pattern to

Comp1. (MSPG-925FA → Model: 225, Pattern: 65)

(7) Press OK in Comp 1080p menu
(8) If ADC Comp is successful, “ADC Component Success” is

displayed.
(9) If ADC calibration is failure, “ADC Component Fail” is

displayed.
(10) If ADC calibration is failure, after rechecking ADC pattern

or condition, retry calibration

(11) If ADC calibration is failure, after recheck ADC pattern or

condition, retry calibration

10.2. Manual White balance Adjustment

10.2.1. Adj. condition and cautionary items

(1) Lighting condition in surrounding area surrounding lighting

should be lower 10 lux. Try to isolate adj. area into dark

surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be

within 10 cm and perpendicular of the module surface

(80°~ 100°)
(3) Aging time

1) After Aging Start, Keep the Power ON status during 5
Minutes.

2) In case of LCD, Back-light on should be checked using
no signal or Full-white pattern.

Only for training and service purposes

10.2.2. Equipment

(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:

CH14/ OLED : CH17)
(2) Adj. Computer(During auto adj., RS-232C protocol is needed)
(3) Adjust Remote control
(4) Video Signal Generator MSPG-925F 720p/216-Gray

(Model: 217, Pattern: 78)

- 22 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

10.2.3. Adjustment

(1) Set TV in Adj. mode using POWER ON.
(2) Zero Calibrate the probe of Color Analyzer, then place it on

the center of LCD module within 10 cm of the surface.

(3) Press ADJ key → EZ adjust using adj. R/C → 6. White-

Balance then press the cursor to the right (KEY►). When
KEY(►) is pressed 216 Gray internal pattern will be

displayed.

(4) One of R Gain / G Gain / B Gain should be fixed at 192,

and the rest will be lowered to meet the desired value.

(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of

color temperature.

▪ If internal pattern is not available, use RF input. In EZ Adj.

menu 6.White Balance, you can select one of 2 Test-pattern:
ON, OFF. Default is inner(ON). By selecting OFF, you can
adjust using RF signal in 216 Gray pattern

Only for training and service purposes

- 23 -

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

400

EXPLODED VIEW

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

710

700

900

200

820

CAM1

830

LV2

LV1

521

540

530

541

811

522

840

502

810

121

AV1

500

570

571

501

AT1

AG1

560

561

120

A10

Set + Stand

Only for training and service purposes

- 24 -

A22

A2

LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.

System Configuration

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Clock for LG1154D

MAIN Clock(24Mhz)

8pF

C100

8pF

C101

System Clock for Analog block(24Mhz)

OPT

R100 33

R101 33

OPT

T32

0.1uF

P100

12505WS-10A00

T32

1

2

3

4

5

6

7

8

9

10

11

WebOS UHD HW Option

BIT0
BIT1

BIT2

BIT3

BIT4

BIT5

BIT6

BIT7

BIT8

BIT9

BIT10

20131016 version

00

01

10

11

00

01

10

11

DVB

TW/COL

CN/HK

EU

AJJA

Resolution

Support U14

D9 Model

URSA7/URSA9

EU/CIS

T/C

T2/C/S2/ATV_EXT

T2/C

T2/C/S2/AT

Display

Reserved

BIT(0/1)

BIT2

BIT3

BIT4

BIT(6/7)

BIT8

BIT9

BIT10 Reserved

X-TAL_1

GND_1

1

2

4

3

GND_2

X-TAL_2

PLLSET1

PLLSET0

+3.3V_NORMAL

OPT

R160 10K

ATSC

North.AM.

KR

BR

High

FHD

U14

D9

URSA9

AJJA

T/C

T2/C_PIP

T2/C

T2/C/S2

High

OLED

XIN_MAIN

1M

R108

X100

24MHz

XO_MAIN

PLL SET[1:0] : internal pull up
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz)
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz)
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz)

Jtag I/F
For Main

OPT

R167
33

TRST_N0
TDI0
TDO0
TMS0
TCK0
SOC_RESET

OPT

OPT

OPT

R163 10K

R166 10K

R168 10K

+3.3V_NORMAL

URSA7/URSA9PBIT5

BIT0_1

R110 10K

BIT0_0

R109 10K

JP

JP

Low

UHD

Non_U14

Non_D9

T2/C_PIP

Low

LCD

TW/COL

T/C

T2/C

10K

BIT1_1

R112

10K

BIT1_0

R111

FHD

R114 10K

UHD

R113 10K

CN/HK

Default

U14

R116 10K

NON_U14

R115 10K

D9

R120 10K

NOT_D9

R119 10K

ATSC_PIP

ATV_SOC

ATV_EXT

URSA9

R122 10K

R121 10K

URSA7/URSA9P

KR

BIT6_1

R124 10K

BIT6_0

R123 10K

North.AM

ATSC_PIP

ATV_SOC

ATV_EXT

VSS

OP MODE[1:0]
"00" : Normal Mode
"01/10/11" : Internal Test mode

+3.3V_NORMAL

OLED

BIT7_1

R126 10K

R128 10K

R129 10K

OPT

LCD

BIT7_0

R130 10K

R127 10K

R125 10K

BR

ISDB_PIP

ISDB

NVRAM

EEPROM_RENESAS

IC102

R1EX24256BSAS0A

A0

1

A1

2

A2

A0’h

3

4

OPT

R133 33

R134 33

OPT

R131 10K

OPT

R132 10K

JP

Default

VCC

8

WP

7

SCL

6

SDA

5

OPM1

OPM0

+3.3V_LNA_TU

C103

0.1uF

D13_INT

EPHY_INT

R135

1.8K

KR_PIP_NOT

1.5K

KR_PIP

R135-*1

+3.3V_NORMAL

Write Protection

- Low : Normal Operation

- High : Write Protection

AR102

+3.3V_NORMAL

OPT

INSTANT_MODE0

+3.3V_NORMAL

R137

1.8K

R136

1.8K

R138

1.8K

KR_PIP_NOT

1.5K

KR_PIP

R136-*1

33

INSTANT boot MODE
"1 : Instant boot
"0 : normal

3.3K

R150

(internal pull down)

R164331/16W

5%

+3.3V_TUNER

R142

1.8K

R141

1.8K

I2C_SCL5

I2C_SDA5

INSTANT_BOOT

SOC_RESET

R149

10K

H13_CONNECT

+3.3V_NORMAL

R144

1.8K

R143

1.8K

EEPROM_ST

M24256-BRMN6TP

E0

1

E1

2

E2

3

VSS

4

EEPROM_ATMEL

AT24C256C-SSHL-T

A0

1

A1

2

A2

3

GND

4

BOOT_MODE0

R151

I2C_SCL_MICOM_SOC
I2C_SDA_MICOM_SOC

I2C PULL UP

R146

1.8K

R147

4.7K

R145

1.8K
I2C_CH1_pullup_4.7K

IC102-*1

VCC

8

WC

7

SCL

6

SDA

5

IC102-*2

VCC

8

WP

7

SCL

6

SDA

5

+3.3V_NORMAL

BOOT MODE
"0 : EMMC
"1 : TEST MODE

3.3K

R117

OPT



3.3K

R118

XIN_MAIN

XO_MAIN

C108

0.1uF

H13A_SCL
H13A_SDA

TRST_N0

PLLSET1
PLLSET0

BOOT_MODE

CAM_TRIGGER_DET

SOC_RX

10K

SOC_TX
M_REMOTE_RX
M_REMOTE_TX

M_REMOTE_RTS

M_REMOTE_CTS

SOC_SPI1_CS

SOC_SPI1_MOSI

SOC_SPI1_MISO

U14 SPI

SOC_SPI1_SCLK

SOC_SPI0_CS0
SOC_SPI0_MOSI
SOC_SPI0_MISO

D13 SPI

SOC_SPI0_SCLK

I2C_SCL1
I2C_SDA1

I2C_SCL2_SOC

I2C_SDA2_SOC

I2C_SCL4
I2C_SDA4
I2C_SCL5
I2C_SDA5
I2C_SCL6
I2C_SDA6

I2C_SDA_MICOM
I2C_SCL_MICOM

I2C_SDA2
I2C_SCL2

I2C_CH1_pullup_4.7K

R148

4.7K
I2C_SDA1
I2C_SCL1
I2C_SDA_MICOM_SOC

I2C_SCL_MICOM_SOC
I2C_SDA2_SOC

I2C_SCL2_SOC
I2C_SDA4
I2C_SCL4
I2C_SDA5
I2C_SCL5

I2C_SDA6
I2C_SCL6

OPM1

TMS0
TCK0
TDI0
TDO0

BOOT_MODE

H13D_XTAL_560ohm

H13D_XTAL_100ohm

R152-*1

AR100

33

0

I2C for tuner

I2C for tuner

560

R152

100

R1020
R104

R148-*1

R147-*1

3.3K

I2C_CH1_pullup_3.3K

R147-*2

1.2K

R148-*2

I2C_CH1_pullup_1.2K

A26
B26

B27

AT37

AU16

AD34
AD33

AT26
AU26

AP9

AN9
AP11
AN11
AN10
AM10

AM9
AM11
AM12
AL11

AL9
AL10
AE34

Y33

W32

W33

W34

AU12
AT12
AU13
AT13
AP12
AR12

AE35
AE36
AF36
AF35
AG34
AF33
AG33
AG32

AR15
AP15
AR16
AP16
AP17
AR17

AP6

AR6
AH32
AJ33
AH34
AH33

I2C_SDA_MICOM_SOC
I2C_SCL_MICOM_SOC

I2C_SDA2_SOC

I2C_SCL2_SOC

I2C_CH1_pullup_3.3K

3.3K

I2C_CH1_pullup_1.2K

1.2K

XIN
XOUT

XTAL_BYPASS
H13DA_XTAL

PORES_N

OPM1
OPM0

H13DA_SCL
H13DA_SDA

TRST_N0
TMS0
TCK0
TDI0
TDO0
TRST_N1
TMS1
TCK1
TDI1
TDO1
PLLSET1
PLLSET0
BOOT_MODE

EXT_INTR3/GPIO70
EXT_INTR2/GPIO69
EXT_INTR1/GPIO68
EXT_INTR0/GPIO67

UART0_RXD
UART0_TXD
UART1_RXD
UART1_TXD
UART1_RTS
UART1_CTS

SPI_CS0/GPIO36
SPI_DO0/GPIO38
SPI_DI0/GPIO39
SPI_SCLK0/GPIO37
SPI_CS1
SPI_DO1
SPI_DI1
SPI_SCLK1

SCL0/GPIO66
SDA0/GPIO65
SCL1/GPIO64
SDA1/GPIO79
SCL2/GPIO78
SDA2/GPIO77
SCL3
SDA3
SCL4
SDA4
SCL5
SDA5

F33

+3.3V_NORMAL

K35

CAM_CE1_N

CAM_CE2_N

CAM_CD1_N/GPIO76

CAM_CD2_N/GPIO75

F34

D32

E32

G32

/PCM_CE1

/PCM_CE2

CAM_CD2_N

CAM_CD1_N

CI

R153

10K

USB_CTL3

/USB_OCD3

/USB_OCD2

USB_CTL2

EB_WE_N

K36

K37

L35

H35

EB_CS3/GPIO93

EB_CS2/GPIO92

EB_CS1/GPIO91

EB_CS0/GPIO90

EB_WE_N/GPIO95

EB_BE_N1

EB_OE_N

EB_BE_N0

H36

J35

J36

H37

EB_WAIT/GPIO94

EB_OE_N/GPIO82

EB_BE_N1/GPIO81

EB_BE_N0/GPIO80

EB_ADDR[0-14]

EB_ADDR[14]

EB_ADDR[10]

EB_ADDR[13]

EB_ADDR[11]

EB_ADDR[12]

G37

G36

G35

F36

F35

EB_ADDR15/GPIO89

EB_ADDR14/GPIO88

EB_ADDR13/GPIO103

EB_ADDR12/GPIO102

EB_ADDR11/GPIO101

EB_ADDR[6]

EB_ADDR[9]

EB_ADDR[8]

EB_ADDR[5]

EB_ADDR[7]

E36

E37

E35

D37

D36

D35

EB_ADDR9/GPIO99

EB_ADDR8/GPIO98

EB_ADDR7/GPIO97

EB_ADDR6/GPIO96

EB_ADDR10/GPIO100

EB_ADDR[3]

EB_ADDR[4]

C36

C35

EB_ADDR5/GPIO111

EB_ADDR4/GPIO110

EB_DATA[0-7]

EB_ADDR[2]

EB_ADDR[0]

EB_DATA[6]

EB_DATA[7]

EB_ADDR[1]

B37

B36

B35

C32

B33

EB_ADDR3/GPIO109

EB_ADDR2/GPIO108

EB_ADDR1/GPIO107

EB_ADDR0/GPIO106

EB_DATA7/GPIO105

EB_DATA[2]

EB_DATA[3]

EB_DATA[5]

EB_DATA[4]

A33

C33

A34

B34

EB_DATA6/GPIO104

EB_DATA5/GPIO119

EB_DATA4/GPIO118

EB_DATA3/GPIO117

IC100

LG1154D_H13D

CAM_VS1_N/GPIO86

CAM_VS2_N/GPIO85

CAM_IREQ_N/GPIO73

CAM_RESET

CAM_INPACK/GPIO74

CAM_VCCEN_N/GPIO87

CAM_WAIT_N/GPIO84

CAM_REG_N/GPIO72

CAM_IOIS16_N/GPIO83

SC_CLK/GPIO130

SC_DETECT/GPIO133

SC_VCCEN/GPIO129

SC_VCC_SEL/GPIO128

SC_RST/GPIO131

SC_DATA/GPIO132

SD_CLK/GPIO125

SD_CMD/GPIO124

SD_CD_N/GPIO123

SD_WP_N/GPIO122

SD_DATA3/GPIO121

SD_DATA2/GPIO120

SD_DATA1/GPIO135

SD_DATA0/GPIO134

USB2_2_DP0

USB2_2_DM0

USB2_2_TXRTUNE

USB2_1_DP0

USB2_1_DM0

G33

F32

G34

D33

H32

E33

D34

H33

T33

U33

T32

V32

V33

V34

A25

C25

B25

E25

D25

E24

D24

C24

L37

L36

K34

M37

M36

K33

1%

1%

200

200

HUB_DP

HUB_DM

R157

R159

CAMERA_DP

PCM_RESET

CAM_IREQ_N

CI

R154

10K

CAM_REG_N

CAM_WAIT_N

PCM_5V_CTL

R155

10K

CI

SMARTCARD_CLK/SD_EMMC_DATA[0]

SMARTCARD_DET/SD_EMMC_DATA[3]

interface

Only SMART CARD

SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]

SMARTCARD_VCC/SD_EMMC_CMD

SMARTCARD_DATA/SD_EMMC_CLK

SMARTCARD_RST/SD_EMMC_DATA[2]

CAMERA_DM

EMMC_DATA[0-7]

EMMC_CMD

EMMC_CLK

EB_DATA[0]

EB_DATA[1]

C34

A36

Y37

Y36

W35

EMMC_CLK

EMMC_CMD

EB_DATA2/GPIO116

EB_DATA1/GPIO115

EB_DATA0/GPIO114

USB2_1_TXRTUNE

USB2_0_DP

USB2_0_DM

USB2_0_TXRTUNE

AU7

AT7

AP7

P37

WIFI_DM

WIFI_DP

R161 200 1%

EMMC_RST

EMMC_DATA[7]

EMMC_DATA[6]

T36

W36

V35

EMMC_DATA7

EMMC_DATA6

EMMC_RESETN

USB3_DP0

USB3_DM0

USB3_RX0P

P36

N36

N37

USB3_DM

USB3_DP

USB3_RX0P

EMMC_DATA[3]

EMMC_DATA[4]

EMMC_DATA[2]

EMMC_DATA[5]

V37

V36

U35

U36

EMMC_DATA5

EMMC_DATA4

EMMC_DATA3

EMMC_DATA2

USB3_RX0M

USB3_TX0P

USB3_TX0M

USB3_RESREF

R36

R37

N34

P33

1%

200

R162

C105 0.1uF

C104 0.1uF

USB3_TX0P

USB3_RX0M

USB3_TX0M

EPHY_MDIO

EPHY_MDC

EPHY_REFCLK

EPHY_EN

EPHY_CRS_DV

EMMC_DATA[1]

EMMC_DATA[0]

U37

AU11

AU8

AT8

AR8

AR10

RMII_MDC

RMII_MDIO

RMII_CRS_DV

RMII_REF_CLK

NC_1

NC_2

NC_3

L32

L33

M31

AJ31

RMII_TXEN

NC_4

EMMC_DATA1

EMMC_DATA0

USB3_REFPADCLKM

USB3_REFPADCLKP

P32

AC-coupling CAP

Place near by LG1154D

EPHY_TXD1

EPHY_RXD0

EPHY_TXD0

EPHY_RXD1

AT10

AU10

AT11

AR11

RMII_TXD1

RMII_TXD0

RMII_RXD1

RMII_RXD0

GPIO23/UART2_TX
GPIO22/UART2_RX

PHY0_ARC_OUT_0

HUB_PORT_OVER0

HUB_VBUS_CTRL0

GPIO136

GPIO137

GPIO138

GPIO139

J32

J33

K32

J34

DPC_CTL

SIL9617_INT

R9531_RESET

R9531_FLASH_WP

GPIO31
GPIO30
GPIO29
GPIO28
GPIO27
GPIO26
GPIO25
GPIO24

GPIO21
GPIO20
GPIO19
GPIO18
GPIO17
GPIO16
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10

GPIO9
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0

DDCD0_CK
DDCD0_DA

HPD0

PHY0_RX0N_0
PHY0_RX0P_0
PHY0_RX1N_0
PHY0_RX1P_0
PHY0_RX2N_0
PHY0_RX2P_0
PHY0_RXCN_0
PHY0_RXCP_0

AL34
AM33
AM32
AF30
AN34
AK34
AL33
AL32
AR9
AM5
AM6

R107 100

AM7
AL6
AK7
AK6
AK5
AJ5
AJ6
AJ7
AH6
AG7
AG6
AG5
AF5
AH30
AG30
AN33
AK33
AE30
AD30

R105 0

AN32

USB3.0_REDRIVER_CTL

AK32

AC32
AC33
AB33

AE37
AC36
AC37
AB36
AB37
AA36
AA37
AD36
AD37

R32

R33

RF_SWITCH_CTL

For connecting
SIC debug tool

CAM_SLIDE_DET

Compensation_Done

/RST_PHY

HDMI_HPD_3
HDMI_HPD_2

AUD_LRCH2

INSTANT_BOOTOPM0

SC_DET
AV1_CVBS_DET
AMP_RESET_N
COMP1_DET
M_RFModule_RESET
HP_DET

SIL9617_RESET

/TU_RESET1

U14_RESET
D14_HWRESET
FRC_FLASH_WP

/RST_HUB

/TU_RESET2

MN864778_RESET

USB3_EN

AMP_RESET_N_1

AR101

3.3K

SPDIF_OUT_ARC

HDMI_RX0-

HDMI_RX0+

HDMI_RX1-

HDMI_RX1+

HDMI_RX2­HDMI_RX2+

HDMI_CLK-

HDMI_CLK+

/USB_OCD1

USB_CTL1

+3.3V_NORMAL

R175

3.3K
HDMI_MUX_SEL

To surround amp

local dimming

I2C port

+3.3V_NORMAL

Not Used Net (UB85/95/UC89)

CAM_TRIGGER_DET
H13_CONNECT
SOC_SPI1_CS
SOC_SPI1_MOSI
SOC_SPI1_MISO
SOC_SPI1_SCLK

CAM_SLIDE_DET
AUD_LRCH2
AMP_RESET_N_1

U14_RESET

/RST_HUB

AMP_RESET_N_1
M_REMOTE_RX
M_REMOTE_TX
M_REMOTE_RTS
M_REMOTE_CTS

Not Used Net (Only OLED)

DPC_CTL

Not Used Net (Only OLED 77EC98)

AMP_RESET_N

+3.3V_NORMAL

For ISP

R103

3.3K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-001-HD

2013-12-17

H13 D CHIP

LG1154A

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LG1154D

AVDD25

VDD25_LTX

VDDC10

AVDD33_CVBS

VDD25_REF

VDD25_LTX

VDD25_AUD

VDD10_XTAL

VDD10_XTAL

AVDD33_XTAL

VSS25_REF

LG1154A

H13A_NON_BRAZIL

E11

F5
F6

F11

G5
H13
J13
P12
P13

R5

R6
N16
T13
T14

N10
N11
N12
N13

U5

N7

N8

N9
F14

M6

N6
M13
F15
F16
H15
J15
J16
K15
K16

R18

G7

G8

G9

H7
H12

J7
J12

K7
K12

L7
L12

M7
M12
T17
T18

M8
G10
G11
G12

V5

C3

D3

D4
D17

E4

F4

F7

F8

F9
F10
F12
F13
F17
F18

G4

G6
G13
G14
G15
G16
G17
G18

H4

H5

H6

H8

H9
H10
H11

VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
VDD33_7
VDD33_8
VDD33_9
VDD33_10
VDD33_11
VDD33_XTAL
AVDD33_CVBS_1
AVDD33_CVBS_2

VDD25_CVBS_1
VDD25_CVBS_2
VDD25_VSB_1
VDD25_VSB_2
VDD25_REF
VDD25_COMP_1
VDD25_COMP_2
VDD25_COMP_3
VDD25_APLL
VDD25_AUD_1
VDD25_AUD_2
VDD25_AAD
LTX_LVDD_1
LTX_LVDD_2
SDRAM_VDDQ_1
SDRAM_VDDQ_2
SDRAM_VDDQ_3
SDRAM_VDDQ_4
SDRAM_VDDQ_5

VDD10_XTAL
VDDC10_1
VDDC10_2
VDDC10_3
VDDC10_4
VDDC10_5
VDDC10_6
VDDC10_7
VDDC10_8
VDDC10_9
VDDC10_10
VDDC10_11
VDDC10_12
VDDC10_13
AVDD10_CVBS
AVDD10_VSB
AVDD10_LLPLL
DVDD10_APLL_1
DVDD10_APLL_2
LTX_VDD

VSS25_REF
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29

LG1154AN_H13A

AVDD33

IC101

GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98

GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116

IC100

LG1154D_H13D

A24

M0_DDR_VREF1

A4

M0_DDR_VREF2

A2

M1_DDR_VREF1

Y1

M1_DDR_VREF2

P26

XTAL_VDD

N26

XTAL_VDDP

M21

VDD33_1

Y30

VDD33_2

AA30

VDD33_3

AE8

VDD33_4

AF8

VDD33_5

AK13

VDD33_6

AK24

VDD33_7

AK25

VDD33_8

M22

AVDD33_USB_1

M23

AVDD33_USB_2

AK11

AVDD33_BT_USB_1

AK12

AVDD33_BT_USB_2

AF25

AVDD33_HDMI_1

AF26

AVDD33_HDMI_2

R31

SP_VQPS

AE23

VDD25_LVRX_1

AF23

VDD25_LVRX_2

AE14

VTXPHY_VDD25_1

AF14

VTXPHY_VDD25_2

N25

VDD25_DR3PLL

AD26

GPLL_AVDD25

H10

VDD15_M0_1

H11

VDD15_M0_2

H12

VDD15_M0_3

H13

VDD15_M0_4

H14

VDD15_M0_5

H15

VDD15_M0_6

H16

VDD15_M0_7

H17

VDD15_M0_8

H18

VDD15_M0_9

H19

VDD15_M0_10

H20

VDD15_M0_11

H21

VDD15_M0_12

H22

VDD15_M0_13

H23

VDD15_M0_14

H24

VDD15_M0_15

H25

VDD15_M0_16

H7

VDD15_M1_1

H8

VDD15_M1_2

J8

VDD15_M1_3

K8

VDD15_M1_4

L7

VDD15_M1_5

L8

VDD15_M1_6

M8

VDD15_M1_7

N7

VDD15_M1_8

N8

VDD15_M1_9

P8

VDD15_M1_10

R7

VDD15_M1_11

R8

VDD15_M1_12

T8

VDD15_M1_13

U8

VDD15_M1_14

V8

VDD15_M1_15

W8

VDD15_M1_16

LG1154AN_H13A_ISDB-T (LG1154AN-IT)

P17
P18
J17

N18
D18
M18
M17

U13
V14
V15
V13

U15
U14

U10
V12

V10
U11
V11
U12

E3

K3
K2

A8
B8

U7
V6
V7

T5
T6
U8
V8
V9
U9

H13A_BRAZIL

XIN_SUB
XO_SUB
VSB_AUX_XIN

XTAL_BYPASS
CLK_24M
XTAL_SEL0
XTAL_SEL1

PORES_N

OPM0
OPM1

H13A_SCL
H13A_SDA

CVBS_IN3
CVBS_IN2
CVBS_IN1
CVBS_VCM

BUF_OUT1
BUF_OUT2

REFT
REFB
ADC1_COM
ADC2_COM
ADC3_COM
SC1_SID
SC1_FB
PB1_IN
Y1_IN
SOY1_IN
PR1_IN
PB2_IN
Y2_IN
SOY2_IN
PR2_IN

VTXPHY_VDD11_1
VTXPHY_VDD11_2
VTXPHY_VDD11_3

AVDD11_DR3PLL

IC101-*1

AAD_ADC_SIF

AAD_ADC_SIFM

AUDA_VBG_EXT

AUDA_OUTL

AUDA_OUTR
AUD_SCART_OUTL
AUD_SCART_OUTR

AUAD_L_CH4_IN
AUAD_R_CH4_IN
AUAD_L_CH3_IN
AUAD_R_CH3_IN
AUAD_L_CH2_IN
AUAD_R_CH2_IN
AUAD_L_CH1_IN
AUAD_R_CH1_IN

AUAD_R_REF
AUAD_M_REF
AUAD_L_REF

AUAD_REF_PO

ADC_I_INCOM

ADC_I_INP

ADC_I_INN

VDDC11_1
VDDC11_2
VDDC11_3
VDDC11_4
VDDC11_5
VDDC11_6
VDDC11_7
VDDC11_8

VDDC11_9
VDDC11_10
VDDC11_11
VDDC11_12
VDDC11_13
VDDC11_14
VDDC11_15
VDDC11_16
VDDC11_17
VDDC11_18
VDDC11_19
VDDC11_20
VDDC11_21
VDDC11_22
VDDC11_23
VDDC11_24
VDDC11_25
VDDC11_26
VDDC11_27
VDDC11_28
VDDC11_29
VDDC11_30
VDDC11_31
VDDC11_32
VDDC11_33
VDDC11_34
VDDC11_35

AVDD11_DCO
GPLL_VDD11

H18
H17

P2
N1
N2
N3
P1

P3
R1
R2
T1
U2
U3
V2
V3
U1
T3
T2
R3

K17

ANTCON

K18

RFAGC

J18

IFAGC

U16
U17
V17

F3

GPIO0

F2

GPIO1

F1

GPIO2

G3

GPIO3

G2

GPIO4

G1

GPIO5

H3

GPIO6

H2

GPIO7

H1

GPIO8

J3

GPIO9

E18

GPIO10

E17

GPIO11

H16

GPIO12

J2

GPIO13

J1

GPIO14

K1

GPIO15

N21
N22
N23
P15
P16
P17
P18
R15
T15
T22
T23
T24
U15
U22
U23
U24
V15
V22
V23
V24
W22
W23
W24
AB15
AB24
AC15
AC24
AD15
AD16
AD17
AD18
AD21
AD22
AD23
AD24

AB14
AC14
AD14

P25
AA15
AC26

+1.1V

+1.2V_VDD

VDD12_VTXPHY

VDDC12_XTAL

+1.2V_VDD

(4)

C381 0.1uF

C217 0.1uF

+0.75V

+3.3V

+2.5V

+1.5V

VREF_M1_1

VDDC12_XTAL

VDD25_XTAL

VDD33

VDD25_LVDS

VDD25_XTAL

VREF_M0_1

VREF_M1_0

VDDC15_M0

VDDC15_M1

VREF_M0_0

+3.3V_Bypass Cap

+3.3V_NORMAL

H14
J4
J5
J6
J8
J9
J10
J11
J14
K4
K5
K6
K8
K9
K10
K11
K13
K14
L1
L2
L3
L4
L5
L6
L8
L9
L10
L11
L13
L14
L15
L16
L17
L18
M1
M2
M3
M4
M5
M9
M10
M11
M14
M15
M16
N4
N5
N14
N15
N17
P4
P5
P6
P7
P8
P9
P10
P11
P14
P15
P16
R4
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
T4
T7
T8
T9
T10
T11
T12
T15
T16
U4
U6
U18
V4
V16

+2.5V_Bypass Cap

+1.0V_Bypass Cap

L209

BLM18PG121SN1D

+2.5V_Normal

+2.5V_Normal

+1.0V_VDD

+1.0V_VDD

AVDD33

(2)

4.7uFC241

L220

BLM18PG121SN1D

L207

BLM18PG121SN1D

L211

BLM18PG121SN1D

L206

BLM18PG121SN1D

C218 0.1uF

4.7uFC211

VDD25_LTX

4.7uFC275

+3.3V_NORMAL

AFE 3CH Power

AVDD25

4.7uFC270

4.7uFC242

Bottom side of chip

4.7uFC216

C223 0.1uF

VDD10_XTAL

4.7uFC239

VDDC10

4.7uFC214

AVDD33_XTAL

L216
BLM18PG121SN1D

4.7uFC255

4.7uFC222

C274 0.1uF

+2.5V_Normal

C246 0.1uF

(1)

C259 0.1uF

BLM15BD121SN1

1uFC224

L200

BLM18PG121SN1D

C251 0.1uF

+3.3V_NORMAL

VDD25_REF

L225

L226

BLM15BD121SN1

1005 size bead
Bottom side of chip

VDD25_AUD

4.7uF

C200

AVDD33_CVBS

L222

BLM18PG121SN1D

0.1uF

C288

VSS25_REF

4.7uF

C202

C204 0.1uF

4.7uFC279

(2)

C283 0.1uF

+1.24V_Bypass Cap

+1.2V_VDD

4.7uFC297

4.7uFC351

C208 0.47uF

C209 0.47uF

Place at the bottom side

+1.2V_VDD

C300 0.1uF

+1.2V_VDD

L227

BLM18PG121SN1D

L201

BLM18PG121SN1D

VDDC12_XTAL

VDD12_VTXPHY

+3.3V_Bypass Cap

+3.3V_NORMAL

L203

BLM18PG121SN1D

+2.5V_Bypass Cap

+2.5V_Normal

L234

BLM18PG121SN1D

4.7uFC298

4.7uFC205

C210 0.47uF

C301 0.1uF

C206 0.1uF

C213 0.47uF

C219 0.47uF

OPT

C207 0.1uF

VDD33

4.7uFC201

C203 0.1uF

C212 0.1uF

C215 0.1uF

Place at the bottom side

VDD25_XTAL

4.7uFC364

C368 0.1uF

+2.5V_Normal

(1)

L238

BLM18PG121SN1D

VDD25_LVDS

4.7uFC378

Place at the bottom side

A27

B5

C5
C26
C27

D5
D26

E5

E6

E7

E8
E22
E23
E26

F7

F8
F22
F23
F24
F25
F26
F27
F31

G7

G8

G9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G25
G26
G27
G28
G29
G30
G31

H9
H26
H27
H28
H29
H30
H31

J7
J30
J31

K7
K30
K31
L30
L31

M7
M12
M13
M14
M15
M16
M17
M18
M19
M20
M24
M25
M26
M30
M32
M33
M34
N12
N13
N14
N15
N16
N17
N18
N19
N20
N24
N30
N31
N32
N33

P7
P12
P13
P14
P19
P20
P21
P22
P23
P24
P30
P31
R12
R13
R14
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R30
R34

T7
T12
T13
T14
T16
T17
T18
T19
T20
T21
T25
T26
T30
T31
T34

U7
U12
U13
U14
U16
U17
U18
U19
U20
U21
U25
U26
U30
U31

V7
V12
V13
V14
V16
V17
V18
V19
V20
V21
V25
V26
V30
V31

W5

W6

W7
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W25
W26
W30
W31

Y3

Y4

LG1154D_H13D

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184

IC100

GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_201
GND_202
GND_203
GND_204
GND_205
GND_206
GND_207
GND_208
GND_209
GND_210
GND_211
GND_212
GND_213
GND_214
GND_215
GND_216
GND_217
GND_218
GND_219
GND_220
GND_221
GND_222
GND_223
GND_224
GND_225
GND_226
GND_227
GND_228
GND_229
GND_230
GND_231
GND_232
GND_233
GND_234
GND_235
GND_236
GND_237
GND_238
GND_239
GND_240
GND_241
GND_242
GND_243
GND_244
GND_245
GND_246
GND_247
GND_248
GND_249
GND_250
GND_251
GND_252
GND_253
GND_254
GND_255
GND_256
GND_257
GND_258
GND_259
GND_260
GND_261
GND_262
GND_263
GND_264
GND_265
GND_266
GND_267
GND_268
GND_269
GND_270
GND_271
GND_272
GND_273
GND_274
GND_275
GND_276
GND_277
GND_278
GND_279
GND_280
GND_281
GND_282
GND_283
GND_284
GND_285
GND_286
GND_287
GND_288
GND_289
GND_290
GND_291
GND_292
GND_293
GND_294
GND_295
GND_296
GND_297
GND_298
GND_299
GND_300
GND_301
GND_302
GND_303
GND_304
GND_305
GND_306
GND_307
GND_308
GND_309
GND_310
GND_311
GND_312
GND_313
GND_314
GND_315
GND_316
GND_317
GND_318
GND_319
GND_320
GND_321
GND_322
GND_323
GND_324
GND_325
GND_326
GND_327
GND_328
GND_329
GND_330
GND_331
GND_332
GND_333
GND_334
GND_335
GND_336
GND_337
GND_338
GND_339
GND_340
GND_341
GND_342
GND_343
GND_344
GND_345
GND_346
GND_347
GND_348
GND_349
GND_350
GND_351
GND_352
GND_353
GND_354
GND_355
GND_356
GND_357
GND_358
GND_359
GND_360
GND_361
GND_362
GND_363
GND_364
GND_365
GND_366
GND_367
GND_368

Y5

Y8
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
Y31
Y35
AA8
AA12
AA13
AA14
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA26
AA31
AB6
AB8
AB12
AB13
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB25
AB26
AB30
AB31
AC8
AC12
AC13
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC25
AC30
AC31
AD8
AD12
AD13
AD19
AD20
AD25
AD31
AE12
AE13
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE24
AE25
AE26
AE31
AF12
AF13
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF24
AF31
AG8
AG31
AH8
AH31
AJ8
AJ30
AK8
AK9
AK10
AK14
AK15
AK16
AK17
AK18
AK19
AK20
AK21
AK22
AK23
AK26
AK27
AK28
AK29
AK30
AK31
AL8
AL12
AL13
AL14
AL15
AL16
AL17
AL18
AL19
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL28
AL29
AL30
AL31
AM8
AM13
AM14
AM15
AM16
AM17
AM18
AM19
AM20
AM21
AM22
AM23
AM24
AM25
AM26
AM27
AM28
AM29
AM30
AM31
AN6
AN12
AN13
AN15
AN16
AN17
AN18
AN19
AN20
AN21
AN22
AN23
AN24
AN25
AN26
AN27
AN28
AN29
AN30
AN31

GND JIG POINT

JP203

JP204

JP202

JP205

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

11/05/31

+1.5V_DDR

L230

BLM18PG121SN1D

22uF

C303

C302

0.1uF

C306

0.1uF

C308

0.1uF

C305

VDDC15_M1

+1.5V_Bypass Cap

VDDC15_M0

R200

OPT

OPT

OPT

0.1uF

C309

0.1uF

C311

0.1uF

C312

OPT

OPT

0.1uF

C313

OPT

0.1uF

C314

C350

0.1uF

C352

0.1uF

0.1uF

C353

0.1uF

C354

0.1uF

C355

0.1uF

C356

0.1uF

C357

0.1uF

C358

0.1uF

C359

0.1uF

C360

0.1uF

C361

0.1uF

C362

0.1uF

C363

0.1uF

C365

0.1uF

C366

0.1uF

C367

0.1uF

C369

0.1uF

C370

0.1uF

C371

0.1uF

C372

0.1uF
R201

VREF_M0_0

1K 1%

1K 1%

C296

OPT

0.1uF

VDDC15_M0

R202

R203

1K 1%

VREF_M0_1

1K 1%

OPT

C344

0.1uF

+1.5V_DDR

L228

BLM18PG121SN1D

22uFC299

C307

0.1uF

VDDC15_M1

R300

R301

VREF_M1_0

1K 1%

1K 1%

C304

OPT

0.1uF

VDDC15_M1VDDC15_M0

VREF_M1_1

R302

1K 1%

OPT

0.1uF

R303

1K 1%

C310

BSD-14Y-UD-003-HD

2013-12-17

MAIN POWER

Place JACK Side

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

AV1_CVBS_IN

5.5V

D404

SC_CVBS_IN

TU_CVBS

SCART_FB_DIRECT

SC_FB

SC_ID

NON_EU

R422-*1

SC_CVBS_IN_SOY

COMP1_Pb

COMP1_Y

COMP1_Pr

SC_L_IN

SC_R_IN

SCART_Lout

SCART_Rout

HP_LOUT_MAIN

HP_ROUT_MAIN

R423 100

R435

R422

75

0

SCART_FB_DIRECT

SC_B
SC_G

SC_R

C472

D406

D403

D401

5.5V

5.5V

5.5V

Near Place Scart AMP

EU

4.7uF 10V
C6006

EU

10K

4.7uF 10V

R6005

C6001

COMP1/AV1/DVI_L_IN

COMP1/AV1/DVI_R_IN

+12V

EU

R403

100K

EU

R404

100K

R430

22K

OPT

R445

22K

OPT

C405
150pF
50V

C408
150pF
50V

EU

10K

10pF

C473

50V

OPT

EU

10K

R60 06
EU

R408

100K

2.2uF

R409

100K

R6450

C400

0.01uF
OPT

C401

0.01uF

OPT

10V

L408

C402
150pF
50V

OPT

EU

10pF

50V

EU

EU

C403

EU

100

R6451

L409

OPT

C430

1uH

1uH

EU

EU

2.7K

10pF

C474

50V

OPT

10pF

C431

50V

SCART_AMP_R_FB

EU

C406

2.2uF
10V

100

+3.3V_NORMAL

R4641K1/16W

R465

390

1/16W

C410

R410

150pF

75
1%

3216

C462

R411

150pF

75

EU

EU

1%

3216

NON_EU

R436

R436-*1

0

75

75

1%

1%

EU

R414

R412

10pF

10pF

C470

50V

50V

SCART_AMP_L_FB

SCART_Lout_SOC

SCART_Rout_SOC

CLK_54M_VTT

1%

C404

0.01uF
50V

1%

DAC_START_PULLDOWN

R466821/16W

1%

75

EU

EU

1%

R416

75

75

75

1%

1%

1%

R417

R415

R413

AUDA_OUTL

AUDA_OUTR

FOR EMI

R400
R405

R427

R424
R425

1%

R418 27K

1%

R419 27K

1%

R420 27K

1%

R421 27K

SC_FB

Clock for H13A

MAIN Clock(24Mhz)

12pF D13_STPO_SOP

C426

12pF

C427

Place SOC Side

R434

C424 0.047uF

100

EU
EU

R432

EU

R433

EU

C425 0.047uF

100

SC_CVBS_IN_SOY

C423 0.047uF

100

C417 0.047uF

33

C418 0.047uF

33

C428 1000pF
C419 0.047uF

33

C420 0.047uF

33

C421 0.047uF

33

C429 1000pF
C422 0.047uF

33

R431

EU

EU
EU
EU
EU

AUDIO IN

EU

EU

EU

SCART_FB_BUFFER

C432 4.7uF

R437 10K 1%

C433 4.7uF

R438 10K 1%

C434 4.7uF

R439 10K 1%

C435 4.7uF

R440 10K 1%

R401
470

1/16W
5%

R4061K

SCART_FB_BUFFER

EU

EU

EU

+3.3V_NORMAL

R446

4.7K

SCART_FB_BUFFER

C

B

E

1/16W

1%

X-TAL_1

GND_1

1

2

4

3

GND_2

X-TAL_2

AV1_CVBS_IN_SOC

SC_CVBS_IN_SOC

TU_CVBS_SOC

SC_FB_SOC

SC_ID_SOC

COMP1_PB_IN_SOC
COMP1_Y_IN_SOC

COMP1_Y_IN_SOC_SOY

COMP1_PR_IN_SOC

COMP2_PB_IN_SOC

COMP2_Y_IN_SOC

COMP2_Y_IN_SOC_SOY

COMP2_PR_IN_SOC

SC_FB_BUF

MMBT3904(NXP)

Q400

SCART_FB_BUFFER

R441

X400

24MHz

SOC_RESET

AUAD_L_CH3_IN

AUAD_R_CH3_IN

AUAD_L_CH2_IN

AUAD_R_CH2_IN

1M

DTV/MNT_V_OUT_SOC

R447 68
R448 68
R449 68

SC_ID_SOC
SC_FB_SOC

COMP1_PB_IN_SOC

COMP1_Y_IN_SOC

COMP1_Y_IN_SOC_SOY

COMP1_PR_IN_SOC
COMP2_PB_IN_SOC

COMP2_Y_IN_SOC

COMP2_Y_IN_SOC_SOY

COMP2_PR_IN_SOC

+3.3V_NORMAL

DTV/MNT_V_OUT

ADC_I_INN

ADC_I_INP

Tuner IF Filter

HP_OUT
L400

BLM18PG121SN1D

HP_LOUT_AMP

XIN_SUB

XOUT_SUB

XIN_SUB

XOUT_SUB

XTAL_SEL[0]
XTAL_SEL[1]

C415

0.1uF

H13A_SCL

H13A_SDA

AV1_CVBS_IN_SOC

SC_CVBS_IN_SOC

TU_CVBS_SOC

Placed as close as possible to SOC

REFT
REFB

POWER_SAVE

VOUT

VSAG

NON_TU_W_BR/TW

To ADC

NON_TU_W_BR/TW

HP_OUT
C407

0.22uF
10V

R453 330

OPM[0]

OPM[1]

C443 0.047uF

68

R450

C439

OPT

100pF
50V

C440 0.047uF
C441 0.047uF
C442 0.047uF

IC400

NJM2561BF1

1

2

3

R443

NON_TU_W_BR/TW

R444

HP_LOUT

6

EU

5

4

TU_W_BR/TW

R443-*1

220

51

51

0.01uF

C436
22pF

0.01uF

Placed as close as possible to IC100

BLM18PG121SN1D

HP_ROUT_AMP

Place at JACK SIDE

OP MODE Setting
& Select XTAL Input

OP MODE[0:1] : SW[2:1]
00 => Normal Operaiton Mode
/T32 Debug Mode
01 => Internal Test Purpose
10 => Internal Test Purpose
11 => Internal Test Purpose

XTAL SEL[1:0] : SW[4:3]
00 => Xtal Input
01 => CLK 24M from H13D
10 => XTAL Bypass from H13D

IC101

C414

0.1uF

TU_W_BR/TW

C436-*1
100pF

IF_N

IF_P

HP_ROUT

H13A_NON_BRAZIL

AAD_ADC_SIF

AAD_ADC_SIFM

AUDA_VBG_EXT

AUDA_OUTL

AUDA_OUTR
AUD_SCART_OUTL
AUD_SCART_OUTR

AUAD_L_CH4_IN
AUAD_R_CH4_IN
AUAD_L_CH3_IN
AUAD_R_CH3_IN
AUAD_L_CH2_IN
AUAD_R_CH2_IN
AUAD_L_CH1_IN
AUAD_R_CH1_IN

AUAD_R_REF
AUAD_M_REF
AUAD_L_REF

AUAD_REF_PO

ADC_I_INCOM

ADC_I_INP

ADC_I_INN

V+

GND

VIN

C437

C438

P17
P18
J17

N18
D18
M18
M17

E3

K3
K2

A8
B8

U13
V14
V15
V13

U15
U14

U7
V6

V7
U10
V12

T5

T6

U8

V8

V9

U9
V10
U11
V11
U12

TU_W_BR/TW

L406

OPT

HP_OUT
L401

XIN_SUB
XO_SUB
VSB_AUX_XIN

XTAL_BYPASS
CLK_24M
XTAL_SEL0
XTAL_SEL1

PORES_N

OPM0
OPM1

H13A_SCL
H13A_SDA

CVBS_IN3
CVBS_IN2
CVBS_IN1
CVBS_VCM

BUF_OUT1
BUF_OUT2

REFT
REFB
ADC1_COM
ADC2_COM
ADC3_COM
SC1_SID
SC1_FB
PB1_IN
Y1_IN
SOY1_IN
PR1_IN
PB2_IN
Y2_IN
SOY2_IN
PR2_IN

R444-*1

LG1154AN_H13A

EU

C412

0.1uF

EU

DTV/MNT_V_OUT_SOC

220

HP_OUT
C409

0.22uF
10V

10K

10K

OPT

OPT

R482

R481

100

R459

100

R460

100

R461

100

R462

H18

C450 0.1uF

H17

C451 0.1uF

10uFC452

C453 2.2uF

P2

ANTCON

RFAGC
IFAGC

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15

N1
N2
N3
P1

P3
R1
R2
T1
U2
U3
V2
V3
U1
T3
T2
R3

K17
K18
J18

U16
U17
V17

F3
F2
F1
G3
G2
G1
H3
H2
H1
J3
E18
E17
H16
J2
J1
K1

AUDA_OUTL
AUDA_OUTR

EU

EU

AUAD_L_CH3_IN
AUAD_R_CH3_IN
AUAD_L_CH2_IN
AUAD_R_CH2_IN

AUAD_R_REF
AUAD_M_REF
AUAD_L_REF
AUAD_REF_PO

C454 0.1uF

R479100
R480100

ADC_I_INP
ADC_I_INN

BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10

SC_FB_BUF

Placed as close as possible to IC4300

AUAD_REF_PO

AUAD_L_REF

AUAD_R_REF

AUAD_M_REF

C447

OPT

1uF
25V

OPT

R45421/10W

AFE 3CH REF Setting

Placed as close as possible to IC4300

C444

0.1uF
C446

0.1uF

C445

0.1uF

PWM_DIM

PWM_DIM2

DIMMING

NON_OLED

AR402
33
1/16W

+3.3V_NORMAL

10K

10K

OPT

OPT

R484

R483

C457

1000pF

OPT

R442

22K

R426

22K

EU

EU

Close to IC4300

NON_TU_W_BR/TW/CO

R487

0

+2.5V_Normal

1%

R45 5

51K

C4494.7uF

R45 647K 1 %

5%

C448

OPT

4.7uF
10V

REFT

Must be used

REFB

EU

C458 0.01uF

1%

R45 7

51K

1%

R45 8

47K

C460 0.01uF

OPM[0]
OPM[1]
XTAL_SEL[0]
XTAL_SEL[1]

TU_SIF

SCART_Lout_SOC

SCART_Rout_SOC

EU

IF_AGC

C459

0.1uF

TU_W_BR/TW/CO

TU_W_BR/TW/CO

R487-*1

10K

L407

C455

10uF

C456

4.7uF
10V

PWM2

PWM1

LG1154AN_H13A

L/DIM0_VS

L/DIM0_SCLK
L/DIM0_MOSI

LG1154A

IC101

INTR_GBB

INTR_AFE3CH

INTR_AGPIO

AUD_FS20CLK
AUD_FS21CLK
AUD_FS23CLK
AUD_FS24CLK
AUD_FS25CLK

AUDCLK_OUT_SUB

AUD_HDMI_MCLK

AUD_DAC1_LRCK

AUD_DAC1_SCK
AUD_DAC1_LRCH
AUD_DAC0_LRCK

AUD_DAC0_SCK
AUD_DAC0_LRCH

AUD_ADC_LRCK

AUD_ADC_SCK

AUD_ADC_LRCH

BB_SCL

BB_SDA
BB_TP_CLK
BB_TP_ERR
BB_TP_SOP
BB_TP_VAL

BB_TP_DATA7
BB_TP_DATA6
BB_TP_DATA5
BB_TP_DATA4
BB_TP_DATA3
BB_TP_DATA2
BB_TP_DATA1
BB_TP_DATA0

CLK_F54M
CVBS_GC2
CVBS_GC1
CVBS_GC0

CVBS_UP
CVBS_DN

FS00CLK

AUDCLK_OUT

DAC_START
DAC_DATA4
DAC_DATA3
DAC_DATA2
DAC_DATA1
DAC_DATA0

AAD_GC4
AAD_GC3
AAD_GC2
AAD_GC1
AAD_GC0

AAD_DATA9
AAD_DATA8
AAD_DATA7
AAD_DATA6
AAD_DATA5
AAD_DATA4
AAD_DATA3
AAD_DATA2
AAD_DATA1
AAD_DATA0

AAD_DATAEN

ADCO_OUT_CLK

HSR_AP0
HSR_AM0
HSR_BP0
HSR_BM0
HSR_CP0

HSR_CM0
HSR_CLKP0
HSR_CLKM0

HSR_DP0

HSR_DM0

HSR_EP0

HSR_EM0

R402 33

AR404

33

L/DIM0_VS
L/DIM0_SCLK
L/DIM0_MOSI
BPL_IN

H13A_NON_BRAZIL

E1
E2
D1

A6
B6
A5
B5
A4
C4

C18

A2
B2
B1
C2
C1
D2
B4
A3
B3

A7
B7
E8
D8
C8
E7
D7
C7
E6
D6
C6
E5
D5
C5

CLK_54M_VTT

1/16W 1%

B10
C9
B9
A9
D9
E9

Close to LG1154A

B11

R492 330

A11

R407 330

D11
C11
E10
D10
C10
A10

R451 330

D13
C13
E12
D12
C12

C17
E16
D16
C16
E15
D15
C15
E14
D14
C14
E13

B18

A12
B12
A13
B13
A14
B14
A15
B15
A16
B16
A17
B17

PWM1
PWM2

BPL_IN

R467 82

DAC_START_PULLDOWN

AT16

INTR_GBB

AU17

INTR_AFE3CH

AT17

INTR_AGPIO

AT24

AUD_FS20CLK

AU24

AUD_FS21CLK

AT23

AUD_FS23CLK

AU23

AUD_FS24CLK

AT22

AUD_FS25CLK

AU36

AUD_HDMI_MCLK

AT20

AUD_DAC1_LRCK

AU20

AUD_DAC1_SCK

AT19

AUD_DAC1_LRCH

AU19

AUD_DAC0_LRCK

AT18

AUD_DAC0_SCK

AU18

AUD_DAC0_LRCH

AU22

AUD_ADC_LRCK

AT21

AUD_ADC_SCK

AU21

AUD_ADC_LRCH

AT25

BB_SCL

AU25

BB_SDA

AP23

BB_TPI_CLK

AR23

BB_TPI_ERR

AP22

BB_TPI_SOP

AR22

BB_TPI_VAL

AP21

BB_TPI_DATA7

AR21

BB_TPI_DATA6

AP20

BB_TPI_DATA5

AR20

BB_TPI_DATA4

AP19

BB_TPI_DATA3

AR19

BB_TPI_DATA2

AP18

BB_TPI_DATA1

AR18

BB_TPI_DATA0

AU28

CLK_54M

AR24

CVBS_GC2

AU27

CVBS_GC1

AT27

CVBS_GC0

AP24

CVBS_UP

AR25

CVBS_DN

AU29

FS00CLK

AT29

H13A_AUDCLK_OUT

AP27

DAC_START

AR27

DAC_DATA4

AP26

DAC_DATA3

AR26

DAC_DATA2

AP25

DAC_DATA1

AT28

DAC_DATA0

AR30

AAD_GC4

AP29

AAD_GC3

AR29

AAD_GC2

AP28

AAD_GC1

AR28

AAD_GC0

AP35

AAD_DATA9

AR35

AAD_DATA8

AP34

AAD_DATA7

AR34

AAD_DATA6

AP33

AAD_DATA5

AR33

AAD_DATA4

AP32

AAD_DATA3

AR32

AAD_DATA2

AP31

AAD_DATA1

AR31

AAD_DATA0

AP30

AAD_DATAEN

AT36

ADCO_OUT_CLK

AT30

HSR_AP

AU30

HSR_AM

AT31

HSR_BP

AU31

HSR_BM

AT32

HSR_CP

AU32

HSR_CM

AT33

HSR_CLKP

AU33

HSR_CLKM

AT34

HSR_DP

AU34

HSR_DM

AT35

HSR_EP

AU35

HSR_EM

AT14

AUD_HPDRV_LRCH

AT15

AUD_HPDRV_LRCK

AU15

NC

AUD_HPDRV_SCK

AC7

FRC_LR_O_SYNC_FLAG

AN5

L_VSOUT_LD

AR14

DIM0_SCLK

AP14

DIM0_MOSI

AN14

DIM1_SCLK

AP13

DIM1_MOSI

AF6

PWM0

AF7

PWM1

AD7

PWM2

AE6

PWM_IN

AP5

EPI_EO

AN8

EPI_VST

AP8

EPI_DPM

AR7

EPI_MCLK

AN7

EPI_GCLK

LG1154D

IC100

LG1154D_H13D

STPI0_CLK/GPIO47
STPI0_SOP/GPIO46
STPI0_VAL/GPIO45
STPI0_ERR/GPIO44

STPI0_DATA/GPIO43

STPI1_CLK/GPIO42
STPI1_SOP/GPIO41
STPI1_VAL/GPIO40
STPI1_ERR/GPIO55

STPI1_DATA/GPIO54

TPIO_DATA0/GPIO58
TPIO_DATA1/GPIO59
TPIO_DATA2/GPIO60
TPIO_DATA3/GPIO61
TPIO_DATA4/GPIO62
TPIO_DATA5/GPIO63
TPIO_DATA6/GPIO48
TPIO_DATA7/GPIO49

DACSLRCH/GPIO127
PCMI3SCK/GPIO112

PCMI3LRCK/GPIO113

DACCLFCH/GPIO126

TP_DVB_CLK
TP_DVB_SOP
TP_DVB_VAL

TP_DVB_ERR
TP_DVB_DATA0
TP_DVB_DATA1
TP_DVB_DATA2
TP_DVB_DATA3
TP_DVB_DATA4
TP_DVB_DATA5
TP_DVB_DATA6
TP_DVB_DATA7

TPI_CLK
TPI_SOP
TPI_VAL

TPI_ERR
TPI_DATA0
TPI_DATA1
TPI_DATA2
TPI_DATA3
TPI_DATA4
TPI_DATA5
TPI_DATA6
TPI_DATA7

TPIO_CLK/GPIO53
TPIO_SOP/GPIO52
TPIO_VAL/GPIO51
TPIO_ERR/GPIO50

AUDCLK_OUT

DACLRCH

DACSCK

DACLRCK

PCMI3LRCH

IEC958OUT

DACSUBMCLK
DACSUBLRCH

DACSUBSCK

DACSUBLRCK

TEST1
TEST2

TX0N
TX0P
TX1N
TX1P
TX2N
TX2P
TX3N
TX3P
TX4N
TX4P
TX5N
TX5P
TX6N
TX6P
TX7N
TX7P
TX8N
TX8P
TX9N

TX9P
TX10N
TX10P
TX11N
TX11P
TX12N
TX12P

TX13N
TX13P
TX14N
TX14P
TX15N
TX15P
TX16N
TX16P
TX17N
TX17P
TX18N
TX18P
TX19N
TX19P
TX20N
TX20P
TX21N
TX21P
TX22N
TX22P
TX23N
TX23P

TX_LOCKN

AK35
AK36
AK37
AJ35
AJ36
AH35
AH37
AH36
AG35
AG36

AM36
AL36
AL35
AL37
AM35
AN36
AN37
AN35
AP37
AP36
AR37
AR36

A28
B29
B28
C28
B32
C31
B31
A31
C30
A30
B30
C29

D30
D31
F30
E31
E30
F29
E29
F28
E28
D28
E27
D27

AD5
AD6
Y6
Y7
AC6
AC5
AA6
AB7
AB5
AU14
AA32
AA34
AA33
AB34
AE32
AE33

AT6
AU6
AT5
AU5
AT4
AU4
AU3
AU2
AT2
AT1
AR4
AR3
AP1
AP2
AP4
AP3
AN4
AN3
AM4
AM3
AL4
AL3
AK1
AK2
AK4
AK3

AJ4
AJ3
AH4
AH3
AG4
AG3
AF1
AF2
AF4
AF3
AE4
AE3
AD4
AD3
AC4
AC3
AB1
AB2
AB4
AB3
AA4
AA3

AR5

FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_ERROR

FE_DEMOD2_TS_DATA

D13_STPO_CLK

D13_STPO_VAL
D13_STPO_ERR
D13_STPO_DATA

FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_DATA[0]

FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]

TPI_CLK
TPI_SOP
TPI_VAL
TPI_ERR

TPI_DATA[0]
TPI_DATA[1]
TPI_DATA[2]
TPI_DATA[3]
TPI_DATA[4]
TPI_DATA[5]
TPI_DATA[6]
TPI_DATA[7]

TPO_CLK
TPO_SOP
TPO_VAL

TPO_ERR
TPO_DATA[0]
TPO_DATA[1]
TPO_DATA[2]
TPO_DATA[3]
TPO_DATA[4]
TPO_DATA[5]
TPO_DATA[6]
TPO_DATA[7]

R495 100
R496 100
R452 100

R497 100
R498 100

URSA_RESET_SoC

AR403
33
1/16W

TXB0P/TX5P
TXB0N/TX5N
TXB1P/TX4P
TXB1N/TX4N
TXB2P/TX3P
TXB2N/TX3N
TXBCLKP/TX2P
TXBCLKN/TX2N
TXB3P/TX1P
TXB3N/TX1N
TXB4P/TX0P
TXB4N/TX0N

TXA0P/TX11P
TXA0N/TX11N
TXA1P/TX10P
TXA1N/TX10N
TXA2P/TX9P
TXA2N/TX9N
TXACLKP/TX8P
TXACLKN/TX8N
TXA3P/TX7P
TXA3N/TX7N
TXA4P/TX6P
TXA4N/TX6N

TXD0P/TX17P
TXD0N/TX17N

TXD1P/TX16P
TXD1N/TX16N
TXD2P/TX15P
TXD2N/TX15N
TXDCLKP/TX14P
TXDCLKN/TX14N
TXD3P/TX13P
TXD3N/TX13N
TXD4P/TX12P
TXD4N/TX12N

TXC0P/TX23P
TXC0N/TX23N
TXC1P/TX22P

TXC1N/TX22N

TXC2P/TX21P
TXC2N/TX21N

TXCCLKP/TX20P

TXCCLKN/TX20N
TXC3P/TX19P
TXC3N/TX19N
TXC4P/TX18P

TXC4N/TX18N

TP402

C411
10pF
50V
OPT

FE_DEMOD1_TS_DATA[1-7]

TPI_ERR

TPI_DATA[0-7]

TP400

AUD_MASTER_CLK
AUD_LRCH
AUD_LRCH1

To height amp FOR UB98/UB9

AUD_SCK
AUD_LRCK

SPDIF_OUT

+3.3V_NORMAL

Not Used Net (UB85/95/UC89)

TPO_ERR

TPO_DATA[0-7]

I2S_I/F

To front, woofer,
center amp FOR UB98/UB9

AUD_LRCH1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-004-HD

2013-12-17

MAIN AUDIO/VIDEO

IC100

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LG1154D_H13D

M0_DDR_A[10]
M0_DDR_A[11]
M0_DDR_A[12]
M0_DDR_A[13]
M0_DDR_A[14]
M0_DDR_A[15]

M0_DDR_BA[0]
M0_DDR_BA[1]
M0_DDR_BA[2]

M0_DDR_U_CLK

M0_DDR_U_CLKN

M0_DDR_D_CLK

M0_DDR_D_CLKN

M0_DDR_RESET_N

M0_DDR_ZQCAL

M0_DDR_DQS[0]

M0_DDR_DQS_N[0]

M0_DDR_DQS[1]

M0_DDR_DQS_N[1]

M0_DDR_DQS[2]

M0_DDR_DQS_N[2]

M0_DDR_DQS[3]

M0_DDR_DQS_N[3]

M0_DDR_DM[0]
M0_DDR_DM[1]
M0_DDR_DM[2]
M0_DDR_DM[3]

M0_DDR_DQ[0]
M0_DDR_DQ[1]
M0_DDR_DQ[2]
M0_DDR_DQ[3]
M0_DDR_DQ[4]
M0_DDR_DQ[5]
M0_DDR_DQ[6]
M0_DDR_DQ[7]
M0_DDR_DQ[8]

M0_DDR_DQ[9]
M0_DDR_DQ[10]
M0_DDR_DQ[11]
M0_DDR_DQ[12]
M0_DDR_DQ[13]
M0_DDR_DQ[14]
M0_DDR_DQ[15]
M0_DDR_DQ[16]
M0_DDR_DQ[17]
M0_DDR_DQ[18]
M0_DDR_DQ[19]
M0_DDR_DQ[20]
M0_DDR_DQ[21]
M0_DDR_DQ[22]
M0_DDR_DQ[23]
M0_DDR_DQ[24]
M0_DDR_DQ[25]
M0_DDR_DQ[26]
M0_DDR_DQ[27]
M0_DDR_DQ[28]
M0_DDR_DQ[29]
M0_DDR_DQ[30]
M0_DDR_DQ[31]

IC100

LG1154D_H13D

M1_DDR_U_CLKN

M1_DDR_D_CLKN

M1_DDR_RESET_N

M1_DDR_DQS[0]

M1_DDR_DQS_N[0]

M1_DDR_DQS[1]

M1_DDR_DQS_N[1]

M1_DDR_DQS[2]

M1_DDR_DQS_N[2]

M1_DDR_DQS[3]

M1_DDR_DQS_N[3]

M1_DDR_DQ[10]
M1_DDR_DQ[11]
M1_DDR_DQ[12]
M1_DDR_DQ[13]
M1_DDR_DQ[14]
M1_DDR_DQ[15]
M1_DDR_DQ[16]
M1_DDR_DQ[17]
M1_DDR_DQ[18]
M1_DDR_DQ[19]
M1_DDR_DQ[20]
M1_DDR_DQ[21]
M1_DDR_DQ[22]
M1_DDR_DQ[23]
M1_DDR_DQ[24]
M1_DDR_DQ[25]
M1_DDR_DQ[26]
M1_DDR_DQ[27]
M1_DDR_DQ[28]
M1_DDR_DQ[29]
M1_DDR_DQ[30]
M1_DDR_DQ[31]

M0_DDR_A[0]
M0_DDR_A[1]
M0_DDR_A[2]
M0_DDR_A[3]
M0_DDR_A[4]
M0_DDR_A[5]
M0_DDR_A[6]
M0_DDR_A[7]
M0_DDR_A[8]
M0_DDR_A[9]

M0_DDR_CKE

M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

M1_DDR_A[0]
M1_DDR_A[1]
M1_DDR_A[2]
M1_DDR_A[3]
M1_DDR_A[4]
M1_DDR_A[5]
M1_DDR_A[6]
M1_DDR_A[7]
M1_DDR_A[8]

M1_DDR_A[9]
M1_DDR_A[10]
M1_DDR_A[11]
M1_DDR_A[12]
M1_DDR_A[13]
M1_DDR_A[14]
M1_DDR_A[15]

M1_DDR_BA[0]
M1_DDR_BA[1]
M1_DDR_BA[2]

M1_DDR_U_CLK

M1_DDR_D_CLK

M1_DDR_CKE

M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN

M1_DDR_WEN

M1_DDR_ZQCAL

M1_DDR_DM[0]
M1_DDR_DM[1]
M1_DDR_DM[2]
M1_DDR_DM[3]

M1_DDR_DQ[0]
M1_DDR_DQ[1]
M1_DDR_DQ[2]
M1_DDR_DQ[3]
M1_DDR_DQ[4]
M1_DDR_DQ[5]
M1_DDR_DQ[6]
M1_DDR_DQ[7]
M1_DDR_DQ[8]
M1_DDR_DQ[9]

DDR_HYNIX

F15

M0_DDR_A0

F13

M0_DDR_A1

F17

M0_DDR_A2

F19

M0_DDR_A3

E10

M0_DDR_A4

E18

M0_DDR_A5

E11

M0_DDR_A6

F18

M0_DDR_A7

F11

M0_DDR_A8

F16

M0_DDR_A9

E9

M0_DDR_A10

E12

M0_DDR_A11

E13

M0_DDR_A12

E16

M0_DDR_A13

F12

M0_DDR_A14

F14

M0_DDR_A15

E19

M0_DDR_BA0

F10

M0_DDR_BA1

E15

M0_DDR_BA2

B10

M0_U_CLK

A10

M0_U_CLKN

A19

M0_D_CLK

B19

M0_D_CLKN

E14

M0_DDR_CKE

F21

M0_DDR_ODT

E21

M0_DDR_RASN

E20

M0_DDR_CASN

F20

M0_DDR_WEN

E17

M0_DDR_RESET_N

F9

B20
A20
C19
D19
A11
B11
C10
D10

D18
C20
D9
C11

D22
C15
C23
D16
B24
B15
D23
A15
C16
D21
D17
C22
C18
C21
C17
D20
C13
D7
D13
C6
D14
D6
C14
A5
C7
D12
D8
B13
C9
C12
C8
D11

R500

240

1%

M0_DDR_DQS0
M0_DDR_DQS_N0
M0_DDR_DQS1
M0_DDR_DQS_N1
M0_DDR_DQS2
M0_DDR_DQS_N2
M0_DDR_DQS3
M0_DDR_DQS_N3

M0_DDR_DM0
M0_DDR_DM1
M0_DDR_DM2
M0_DDR_DM3

M0_DDR_DQ0
M0_DDR_DQ1
M0_DDR_DQ2
M0_DDR_DQ3
M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7
M0_DDR_DQ8
M0_DDR_DQ9
M0_DDR_DQ10
M0_DDR_DQ11
M0_DDR_DQ12
M0_DDR_DQ13
M0_DDR_DQ14
M0_DDR_DQ15
M0_DDR_DQ16
M0_DDR_DQ17
M0_DDR_DQ18
M0_DDR_DQ19
M0_DDR_DQ20
M0_DDR_DQ21
M0_DDR_DQ22
M0_DDR_DQ23
M0_DDR_DQ24
M0_DDR_DQ25
M0_DDR_DQ26
M0_DDR_DQ27
M0_DDR_DQ28
M0_DDR_DQ29
M0_DDR_DQ30
M0_DDR_DQ31

N6

M1_DDR_A0

R6

M1_DDR_A1

L6

M1_DDR_A2

J6

M1_DDR_A3

U5

M1_DDR_A4

J5

M1_DDR_A5

T5

M1_DDR_A6

K6

M1_DDR_A7

U6

M1_DDR_A8

M6

M1_DDR_A9

V5

M1_DDR_A10

R5

M1_DDR_A11

P5

M1_DDR_A12

L5

M1_DDR_A13

T6

M1_DDR_A14

P6

M1_DDR_A15

H5

M1_DDR_BA0

V6

M1_DDR_BA1

M5

M1_DDR_BA2

R2

M1_U_CLK

R1

M1_U_CLKN

F1

M1_D_CLK

F2

M1_D_CLKN

N5

M1_DDR_CKE

G6

M1_DDR_ODT

F5

M1_DDR_RASN

G5

M1_DDR_CASN

H6

M1_DDR_WEN

K5

M1_DDR_RESET_N

F6

E2
E1
F3
F4
P1
P2
R3
R4

G4
E3
T4
P3

C4
K3
B3
J4
A3
K2
B4
K1
J3
D4
H4
C3
G3
D3
H3
E4
M3
V4
M4
W3
L4
W4
L3
Y2
V3
N4
U4
M2
T3
N3
U3
P4

R501

240

1%

M1_DDR_DQS0
M1_DDR_DQS_N0
M1_DDR_DQS1
M1_DDR_DQS_N1
M1_DDR_DQS2
M1_DDR_DQS_N2
M1_DDR_DQS3
M1_DDR_DQS_N3

M1_DDR_DM0
M1_DDR_DM1
M1_DDR_DM2
M1_DDR_DM3

M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15
M1_DDR_DQ16
M1_DDR_DQ17
M1_DDR_DQ18
M1_DDR_DQ19
M1_DDR_DQ20
M1_DDR_DQ21
M1_DDR_DQ22
M1_DDR_DQ23
M1_DDR_DQ24
M1_DDR_DQ25
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_DQ28
M1_DDR_DQ29
M1_DDR_DQ30
M1_DDR_DQ31

M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8

M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15

M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2

M0_D_CLK

M0_D_CLKN
M0_DDR_CKE

M0_DDR_ODT

M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

M0_DDR_RESET_N

M0_DDR_DQS0

M0_DDR_DQS_N0

M0_DDR_DM0

M0_DDR_DQ0
M0_DDR_DQ1
M0_DDR_DQ2
M0_DDR_DQ3
M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7

VDDC15_M0

R520
10K

200

200

VDDC15_M0

R514

1K 1%

R515

1K 1%

VDDC15_M0

R516

1K 1%

R517

1K 1%

M0_DDR_RESET_N

R519

R580

M0_DDR_VREFCA

0.1uF

C504

M0_DDR_VREFDQ

0.1uF

C505

M0_D_CLK

M0_D_CLKN

M0_D_CLK

M0_D_CLKN

M0_DDR_CKE

IC500

H5TQ4G83AFR-PBC

DDR3

K3

A0

4Gbit

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK

G9

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

B7

DM/TDQS

A7

NF/TDQS

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

A3

NC_1

F1

NC_2

F9

NC_3

H1

NC_4

H9

NC_5

M0_U_CLK

200

R535

M0_U_CLKN

M0_U_CLK

200

R581

M0_U_CLKN

VDDC15_M0

M0_1_DDR_VREFCA

R536

1K 1%

R537

1K 1%

C512

VDDC15_M0

M0_1_DDR_VREFDQ

R538

1K 1%

R539

1K 1%

C513

0.1uF

0.1uF

VREFCA

VREFDQ

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4

VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

R541
10K

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

M0_DDR_VREFCA

M0_DDR_VREFDQ

J8

E1

VDDC15_M0

R558

H8

ZQ

240

1%
A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

VDDC15_M0

VDDC15_M0

R550

R551

1K 1%

R552

R553

1K 1%

C559
C560

M0_DDR_VREFCA_T

1K 1%

0.1uF

C550

M0_DDR_VREFDQ_T

1K 1%

0.1uF

C551

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7

J2
K8
J3

F7
G7
G9

H2
G1
F3
G3
H3

N2

C3
D3

B7
A7

B3
C7
C2
C8
E3
E8
D2
E7

A3
F1
F9
H1
H9
J7

0.1uF

0.1uF

IC500-*1

K4B4G0846D-BCK0

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQS
DQS

DM/TDQS
NU/TDQS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6

DDR_SAMSUNG

M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8

M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15

M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2

M0_D_CLK

M0_D_CLKN
M0_DDR_CKE

M0_DDR_ODT

M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

M0_DDR_RESET_N

M0_DDR_DQS1

M0_DDR_DQS_N1

M0_DDR_DM1

J8

VREFCA

E1

VREFDQ

M0_DDR_DQ8

H8

ZQ

M0_DDR_DQ9

A2

VDD_1

A9

VDD_2

D7

M0_DDR_DQ10

VDD_3

G2

VDD_4

G8

VDD_5

K1

M0_DDR_DQ11

VDD_6

K9

VDD_7

M1

VDD_8

M9

VDD_9

M0_DDR_DQ12

B9

VDDQ_1

C1

M0_DDR_DQ13

VDDQ_2

E2

VDDQ_3

E9

VDDQ_4

M0_DDR_DQ14
M0_DDR_DQ15

A1

VSS_1

A8

VSS_2

B1

VSS_3

D8

VSS_4

F2

VSS_5

F8

VSS_6

J1

VSS_7

J9

VSS_8

L1

VSS_9

L9

VSS_10

N1

VSS_11

N9

VSS_12

B2

VSSQ_1

B8

VSSQ_2

C9

VSSQ_3

D1

VSSQ_4

D9

VSSQ_5

VDDC15_M0

M0_1_DDR_VREFCA_T

R554

1K 1%

0.1uF

R555

1K 1%

C552

VDDC15_M0

M0_1_DDR_VREFDQ_T

R556

1K 1%

0.1uF

R557

1K 1%

C553

DDR_HYNIX

IC502

H5TQ4G83AFR-PBC

DDR3

K3

A0

4Gbit

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK

G9

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

B7

DM/TDQS

A7

NF/TDQS

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

A3

NC_1

F1

NC_2

F9

NC_3

H1

NC_4

H9

NC_5

VDDC15_M1

R521
10K

M1_DDR_RESET_N

M1_D_CLK

100

R518

M1_D_CLKN

VDDC15_M1

M1_DDR_VREFCA

R510

1K 1%

0.1uF

R511

1K 1%

C500

VDDC15_M1

M1_DDR_VREFDQ

R512

1K 1%

0.1uF

R513

1K 1%

C501

VREFCA

VREFDQ

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4

VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

J8

E1

H8

ZQ

A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

M1_DDR_CKE

M0_1_DDR_VREFCA

R560

240

1%

100

R530

M1_U_CLK

M1_U_CLKN

VDDC15_M1

R531

R532

VDDC15_M1

R533

R534

M0_1_DDR_VREFDQ

R540
10K

M1_1_DDR_VREFCA

1K 1%

0.1uF

1K 1%

C508

M1_1_DDR_VREFDQ

1K 1%

0.1uF

1K 1%

C509

VDDC15_M0

0.1uF

C583

0.1uF

C574

M0_DDR_RESET_N

M0_DDR_DQS_N2

DDR_SAMSUNG

IC502-*1

K4B4G0846D-BCK0

J8

K3

VREFCA

A0

L7

A1

L3

A2

E1

K2

VREFDQ

A3

L8

A4

L2

A5

M8

H8

A6

ZQ

M2

A7

N8

A8

M3

A2

A9

VDD_1

H7

A9

A10/AP

VDD_2

M7

D7

A11

VDD_3

G2

K7

A12/BC

VDD_4

G8

N3

VDD_5

A13

N7

K1

A14

VDD_6

K9

VDD_7

M1

VDD_8

M9

J2

VDD_9

BA0

K8

BA1

J3

BA2

B9

VDDQ_1

C1

F7

VDDQ_2

CK

E2

G7

VDDQ_3

CK

E9

G9

VDDQ_4

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

A1

B7

VSS_1

DM/TDQS

A8

A7

VSS_2

NU/TDQS

B1

VSS_3

D8

VSS_4

F2

VSS_5

F8

VSS_6

J1

B3

VSS_7

DQ0

J9

C7

VSS_8

DQ1

L1

C2

VSS_9

DQ2

L9

C8

VSS_10

DQ3

N1

E3

VSS_11

DQ4

N9

E8

VSS_12

DQ5

D2

DQ6

E7

DQ7

B2

VSSQ_1

B8

A3

VSSQ_2

NC_1

C9

F1

VSSQ_3

NC_2

D1

F9

VSSQ_4

NC_3

D9

H1

VSSQ_5

NC_4

H9

NC_5

J7

NC_6

Place at the bottom side

M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8

M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15

M0_DDR_BA0

M0_DDR_BA1

M0_DDR_BA2

M0_U_CLK

M0_U_CLKN

M0_DDR_CKE

M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

M0_DDR_DQS2

M0_DDR_DM2

M0_DDR_DQ16
M0_DDR_DQ17
M0_DDR_DQ18
M0_DDR_DQ19
M0_DDR_DQ20
M0_DDR_DQ21
M0_DDR_DQ22
M0_DDR_DQ23

M1_DDR_DQS0

M1_DDR_DQS_N0

M1_DDR_DQS1

M1_DDR_DQS_N1

M1_DDR_DM0
M1_DDR_DM1

VDDC15_M1

M1_DDR_RASN
M1_DDR_CASN

M1_DDR_RESET_N

M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15

1uF

C502

M1_DDR_A0
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8

M1_DDR_A9
M1_DDR_A10
M1_DDR_A11
M1_DDR_A12
M1_DDR_A13
M1_DDR_A14
M1_DDR_A15

M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2

M1_D_CLK

M1_D_CLKN
M1_DDR_CKE

M1_DDR_ODT

M1_DDR_WEN

M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7

M1_DDR_DQ8
M1_DDR_DQ9

C516

1uF

DDR_HYNIX

IC504

H5TQ4G83AFR-PBC

DDR3

K3

4Gbit

A0

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK

G9

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

B7

DM/TDQS

A7

NF/TDQS

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

A3

NC_1

F1

NC_2

F9

NC_3

H1

NC_4

H9

NC_5

OPT

IC501

K4B4G1646B-HCK0

N3

DDR3

A0

P7

4Gbit

A1

P3

(x16)

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

ZQ

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

M0_DDR_VREFCA_T

M0_DDR_VREFDQ_T

J8

E1

VDDC15_M0

R559

H8

240

1%
A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

C568
C569

M0_DDR_RESET_N

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

M1_DDR_VREFCA

M1_DDR_VREFDQ

M8

H1

L8

ZQ

NC_1
NC_2
NC_3
NC_4

R543

VDDC15_M1

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2

C529

H9

J1
J9
L1
L9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

0.1uF

C530

0.1uF

AR7
56

M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8

M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15

M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2

0.1uF

0.1uF

M0_DDR_CKE

M0_DDR_ODT

M0_DDR_RASN
M0_DDR_CASN

M0_DDR_WEN

DDR_SAMSUNG

IC504-*1

K4B4G0846D-BCK0

J8

K3

VREFCA

A0

L7

A1

L3

A2

K2

E1

A3

VREFDQ

L8

A4

L2

A5

M8

H8

A6

ZQ

M2

A7

N8

A8

M3

A2

A9

VDD_1

H7

A9

A10/AP

VDD_2

M7

D7

A11

VDD_3

K7

G2

A12/BC

VDD_4

N3

G8

A13

VDD_5

N7

K1

A14

VDD_6

K9

VDD_7

M1

VDD_8

M9

J2

VDD_9

BA0

K8

BA1

J3

BA2

B9

VDDQ_1

C1

F7

VDDQ_2

CK

E2

G7

VDDQ_3

CK

E9

G9

VDDQ_4

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

A1

B7

VSS_1

DM/TDQS

A8

A7

VSS_2

NU/TDQS

B1

VSS_3

D8

VSS_4

F2

VSS_5

F8

VSS_6

J1

B3

VSS_7

DQ0

J9

C7

VSS_8

DQ1

L1

C2

VSS_9

DQ2

L9

C8

VSS_10

DQ3

N1

E3

VSS_11

DQ4

N9

E8

VSS_12

DQ5

D2

DQ6

E7

DQ7

B2

VSSQ_1

B8

A3

VSSQ_2

NC_1

C9

F1

VSSQ_3

NC_2

D1

F9

VSSQ_4

NC_3

D9

H1

VSSQ_5

NC_4

H9

NC_5

J7

NC_6

DDR_HYNIX

IC501-*1

H5TQ4G63AFR-PBC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

240

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

K4B4G1646D-BCK0

N3

DDR3 1.5V bypass Cap - Place these caps near Memory

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

AR9

AR8

56

56

M0_U_CLK

M0_U_CLKN

H5TQ1G63DFR-PBC(x16)

1Gbit : T7(NC_6)
4Gbit : T7(A14)

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

DDR_SAMSUNG

IC501-*2

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

AR10
56

M0_DDR_DQS3

M0_DDR_DQS_N3

M0_DDR_DM3

M0_DDR_DQ24
M0_DDR_DQ25
M0_DDR_DQ26
M0_DDR_DQ27
M0_DDR_DQ28
M0_DDR_DQ29
M0_DDR_DQ30
M0_DDR_DQ31

Real USE : 1Gbit

M1_DDR_A10
M1_DDR_A11
M1_DDR_A12
M1_DDR_A13
M1_DDR_A14
M1_DDR_A15

M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2

M1_DDR_CKE

M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN

M1_DDR_WEN

M1_DDR_RESET_N

M1_DDR_DQS2

M1_DDR_DQS_N2

M1_DDR_DQS3

M1_DDR_DQS_N3

M1_DDR_DM2

M1_DDR_DM3

M1_DDR_DQ16
M1_DDR_DQ17

M1_DDR_DQ18
M1_DDR_DQ19
M1_DDR_DQ20

M1_DDR_DQ21

M1_DDR_DQ22
M1_DDR_DQ23

M1_DDR_DQ24

M1_DDR_DQ25
M1_DDR_DQ26

M1_DDR_DQ27

M1_DDR_DQ28
M1_DDR_DQ29

M1_DDR_DQ30
M1_DDR_DQ31

AR11
56

M1_DDR_A0
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8
M1_DDR_A9

M1_U_CLK

M1_U_CLKN

AR12
56

DDR_HYNIX

R3104

IC505

56

H5TQ4G83AFR-PBC

DDR3

K3

A0

4Gbit

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK

G9

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

B7

DM/TDQS

A7

NF/TDQS

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

A3

NC_1

F1

NC_2

F9

NC_3

H1

NC_4

H9

NC_5

OPT

IC503

K4B4G1646B-HCK0

N3

DDR3

A0

P7

4Gbit

A1

P3

(x16)

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

NC_1
NC_2
NC_3
NC_4

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

ZQ

J8

E1

H8

ZQ

A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

M1_1_DDR_VREFCA

M8

H1

L8

VDDC15_M1
B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

M0_1_DDR_VREFCA_T

M0_1_DDR_VREFDQ_T

R561

240
1%

M1_1_DDR_VREFDQ

R545

C561

0.1uF

C562

0.1uF

VDDC15_M0

0.1uF

C572

0.1uF

C577

DDR_SAMSUNG

IC505-*1

K4B4G0846D-BCK0

J8

K3

VREFCA

A0

L7

A1

L3

A2

E1

K2

VREFDQ

A3

L8

A4

L2

A5

M8

H8

A6

ZQ

M2

A7

N8

A8

M3

A2

A9

VDD_1

H7

A9

A10/AP

VDD_2

M7

D7

A11

VDD_3

G2

K7

A12/BC

VDD_4

G8

N3

VDD_5

A13

N7

K1

A14

VDD_6

K9

VDD_7

M1

VDD_8

M9

J2

VDD_9

BA0

K8

BA1

J3

BA2

B9

VDDQ_1

C1

F7

VDDQ_2

CK

E2

G7

VDDQ_3

CK

E9

G9

VDDQ_4

CKE

H2

CS

G1

ODT

F3

RAS

G3

CAS

H3

WE

N2

RESET

C3

DQS

D3

DQS

A1

B7

VSS_1

DM/TDQS

A8

A7

VSS_2

NU/TDQS

B1

VSS_3

D8

VSS_4

F2

VSS_5

F8

VSS_6

J1

B3

VSS_7

DQ0

J9

C7

VSS_8

DQ1

L1

C2

VSS_9

DQ2

L9

C8

VSS_10

DQ3

N1

E3

VSS_11

DQ4

N9

E8

VSS_12

DQ5

D2

DQ6

E7

DQ7

B2

VSSQ_1

B8

A3

VSSQ_2

NC_1

C9

F1

VSSQ_3

NC_2

D1

F9

VSSQ_4

NC_3

D9

H1

VSSQ_5

NC_4

H9

NC_5

J7

NC_6

DDR_HYNIX

IC503-*1

H5TQ4G63AFR-PBC

M8

N3

VREFCA

A0

P7

A1

P3

A2

N2

H1

A3

VREFDQ

P8

A4

P2

A5

R8

L8

A6

ZQ

R2

A7

T8

A8

R3

B2

A9

VDD_1

L7

D9

A10/AP

VDD_2

R7

G7

A11

VDD_3

N7

K2

A12/BC

VDD_4

T3

K8

A13

VDD_5

T7

N1

A14

VDD_6

N9

M7

VDD_7

A15

R1

VDD_8

R9

M2

VDD_9

BA0

N8

BA1

M3

BA2

A1

VDDQ_1

A8

J7

VDDQ_2

CK

K7

C1

VDDQ_3

CK

K9

C9

CKE

VDDQ_4

D2

VDDQ_5

E9

L2

VDDQ_6

CS

F1

K1

VDDQ_7

ODT

H2

240

J3

VDDQ_8

RAS

H9

K3

VDDQ_9

CAS

L3

WE

J1

NC_1

J9

T2

NC_2

RESET

L1

NC_3

L9

NC_4

F3

DQSL

G3

DQSL

A9

C7

VSS_1

DQSU

B3

B7

VSS_2

DQSU

E1

VSS_3

G8

E7

VSS_4

DML

J2

D3

VSS_5

DMU

J8

VSS_6

M1

E3

VSS_7

DQL0

M9

F7

VSS_8

DQL1

P1

F2

VSS_9

DQL2

P9

F8

VSS_10

DQL3

T1

H3

VSS_11

DQL4

T9

H8

VSS_12

DQL5

G2

DQL6

H7

DQL7

B1

VSSQ_1

B9

D7

VSSQ_2

DQU0

D1

C3

VSSQ_3

DQU1

D8

C8

VSSQ_4

DQU2

E2

C2

VSSQ_5

DQU3

E8

A7

VSSQ_6

DQU4

F9

A2

VSSQ_7

DQU5

G1

B8

VSSQ_8

DQU6

G9

A3

VSSQ_9

DQU7

DDR_SAMSUNG

IC503-*2

K4B4G1646D-BCK0

N3

M8

A0

VREFCA

P7

A1

P3

A2

N2

H1

A3

DDR3 1.5V bypass Cap - Place these caps near Memory

VREFDQ

P8

A4

P2

A5

L8

R8

ZQ

A6

R2

A7

T8

A8

B2

R3

VDD_1

A9

D9

L7

VDD_2

A10/AP

G7

R7

VDD_3

A11

K2

N7

VDD_4

A12/BC

K8

T3

VDD_5

A13

N1

T7

VDD_6

A14

M7

N9

A15

VDD_7

R1

VDD_8

M2

R9

BA0

VDD_9

N8

BA1

M3

BA2

A1

VDDQ_1

J7

A8

CK

VDDQ_2

K7

C1

CK

VDDQ_3

K9

C9

CKE

VDDQ_4

D2

VDDQ_5

L2

E9

CS

VDDQ_6

K1

F1

ODT

VDDQ_7

J3

H2

RAS

VDDQ_8

K3

H9

CAS

VDDQ_9

L3

WE

J1

NC_1

T2

J9

RESET

NC_2

L1

NC_3

L9

NC_4

F3

DQSL

G3

DQSL

C7

A9

DQSU

VSS_1

B7

B3

DQSU

VSS_2

E1

VSS_3

E7

G8

DML

VSS_4

D3

J2

DMU

VSS_5

J8

VSS_6

E3

M1

DQL0

VSS_7

F7

M9

DQL1

VSS_8

F2

P1

DQL2

VSS_9

F8

P9

DQL3

VSS_10

H3

T1

DQL4

VSS_11

H8

T9

DQL5

VSS_12

G2

DQL6

H7

DQL7

B1

VSSQ_1

D7

B9

DQU0

VSSQ_2

C3

D1

DQU1

VSSQ_3

C8

D8

DQU2

VSSQ_4

C2

E2

DQU3

VSSQ_5

A7

E8

DQU4

VSSQ_6

A2

F9

DQU5

VSSQ_7

B8

G1

DQU6

VSSQ_8

A3

G9

DQU7

VSSQ_9

* DDR_VTT

VDDC15_M0

DDR_VTT

R546
10K

R549

10K

L500

UBW2012-121F

C503
22uF
10V

REFIN

VLDOIN

VOSNS

IC506

TPS51200DRCR

1

10

11

2

9

THERMAL

VO

3

PGND

8

4

7

5

6

1%

C510

1000pF

1%

C511
22uF
10V

C506

C507

22uF

22uF

10V

10V

[EP]

VIN

PGOOD

GND

EN

REFOUT

+3.3V_NORMAL

L501

UBW2012-121F

C514

0.1uF

C515
4700pF

DDR_VTT

C519

0.47uF

6.3V

C520

0.47uF

6.3V

C521

0.47uF

6.3V

C522

0.47uF

6.3V

Close to REFOUT pin

DDR_VTT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-005-HD

2013-12-17

MAIN DDR

PCM_RESET

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

/PCM_WAIT

/PCM_IORD
/PCM_IOWR

R701
R702

CI_IN_TS_DATA[0-7]

CI

33

CI

33

+5V_CI_ON

/PCM_CE2

10K

R709

CI

C702

0.1uF
CI

/CI_CD1
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]

/PCM_CE2

CI_IN_TS_DATA[0]
CI_IN_TS_DATA[1]
CI_IN_TS_DATA[2]
CI_IN_TS_DATA[3]

CI_IN_TS_DATA[4]
CI_IN_TS_DATA[5]
CI_IN_TS_DATA[6]
CI_IN_TS_DATA[7]

CI_TS_CLK

/PCM_REG

CI_TS_VAL

CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]

/CI_CD2

C703

4.7uF
10V

CI

+5V_CI_ON

R716

CI

R717 100

CI_ADDR[11]
CI_ADDR[9]

CI_ADDR[13]

C707

0.1uF
16V

CI_ADDR[12]

CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]

CI_ADDR[4]

CI_ADDR[3]

CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]

CI_DATA[0-7]

CI_ADDR[10]

CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[8]
CI_ADDR[13]
CI_ADDR[14]

CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]

/PCM_CE1

+5V_CI_ON

10K

R723

CI

/PCM_OE

/PCM_WE
/PCM_IRQA

CI_DATA[0-7]

CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DATA[3]

CI_DATA[0-7]

CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]

CI

AR712

33

CI

AR713

33

EB_DATA[0]

EB_DATA[1]
EB_DATA[2]
EB_DATA[3]

EB_DATA[4]
EB_DATA[5]
EB_DATA[6]
EB_DATA[7]

@netLa

EB_DATA[0-7]

CI

JK700

10125901-115LF

100

CI

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59

65
66
67
68

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
2660
2761
2862
2963
3064
31
32
33
34

G1G2

69

CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]

CI

C706 0.1uF

C705
12pF
50V
OPT

R721 33

CI

CI_DATA[0]
CI_DATA[1]
CI_DATA[2]

CI_IN_TS_VAL
CI_IN_TS_CLK

CI_IN_TS_SYNC

CI_ADDR[10]

CI_ADDR[8]

CI_ADDR[14]

CI

TPO_DATA[0-7]

/CI_CD2

/CI_CD1

TPO_CLK
TPO_SOP
TPO_VAL

R703

+5V_NORMAL

10K

R705

CI
C700

0.1uF
16V

TPO_DATA[0]
TPO_DATA[1]
TPO_DATA[2]
TPO_DATA[3]
TPO_DATA[4]
TPO_DATA[5]
TPO_DATA[6]
TPO_DATA[7]

10K

/PCM_WAIT
/PCM_IRQA

CI
C701

0.1uF
16V

CI_TS_CLK

CI_TS_VAL

CI_TS_SYNC

CI_TS_DATA[7]
CI_TS_DATA[6]
CI_TS_DATA[5]
CI_TS_DATA[4]

CI_TS_DATA[3]
CI_TS_DATA[2]
CI_TS_DATA[1]
CI_TS_DATA[0]

CI

AR701

33

AR706

CI

AR705

33

AR702

100

AR703

CI

100

AR704

CI

100

CI

AR700

100

CI
33

CAM_WAIT_N
CAM_IREQ_N

CAM_CD2_N
CAM_CD1_N

TPI_VAL
TPI_SOP

TPI_DATA[7]
TPI_DATA[6]
TPI_DATA[5]
TPI_DATA[4]

TPI_DATA[3]
TPI_DATA[2]
TPI_DATA[1]
TPI_DATA[0]

CI_IN_TS_DATA[0]
CI_IN_TS_DATA[1]
CI_IN_TS_DATA[2]
CI_IN_TS_DATA[3]
CI_IN_TS_DATA[4]
CI_IN_TS_DATA[5]
CI_IN_TS_DATA[6]
CI_IN_TS_DATA[7]

CI_IN_TS_CLK
CI_IN_TS_SYNC
CI_IN_TS_VAL

C704
12pF
50V
OPT

TPI_CLK

CI_ADDR[3]
CI_ADDR[0]
CI_ADDR[2]
CI_ADDR[1]

CI_ADDR[4]
CI_ADDR[5]
CI_ADDR[6]
CI_ADDR[7]

CI_ADDR[8]

CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]

CI

AR707

33

CI

AR708

33

CI

AR709

33

EB_ADDR[3]
EB_ADDR[0]
EB_ADDR[2]
EB_ADDR[1]

EB_ADDR[4]
EB_ADDR[5]
EB_ADDR[6]
EB_ADDR[7]

EB_ADDR[8]
EB_ADDR[9]
EB_ADDR[10]
EB_ADDR[11]

CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[14]

/PCM_REG

/PCM_OE
/PCM_WE

/PCM_IORD
/PCM_IOWR

CI

AR711

33

CI

AR710

33

EB_ADDR[12]
EB_ADDR[13]
EB_ADDR[14]
CAM_REG_N

EB_OE_N
EB_WE_N
EB_BE_N1
EB_BE_N0

CI POWER ENABLE CONTROL

IN

EN

IC700

AP2151WG-7

5

4

+5V_CI_ON

OUT

1

CI

GND

2

FLG

3

C708
1uF
25V

R706

10K

CI

CI

PCM_5V_CTL

+5V_NORMAL

C709

0.1uF

CI

50V

R700
10K

CI

CI

R704
100

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-007-HD

2013-12-17

PCMCIA

Power_DET

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+12V

PD_+12V
R2325

2.7K
1%

OLED_AC_DET

PD_OLED_AC

R2369

PD_UHD_24V

R2327-*2

9.1K
1%

PD_UHD_24V
R2328-*2

1.6K
1%

39K

PD_+12V
R2326

1.2K

1%

1%

PD_20V
R2327-*1

5.6K

1%

PD_20V
R2328-*1

1.3K
1%

+24V

+3.5V_ST

PD_24V
R2327

8.2K
1%

PD_24V
R2328

1.5K
1%

PD_+3.5V
R2330
0
5%

C2355

0.1uF
16V

C2356

0.1uF
16V

PD_20_24V

R2337
100K

RESET_IC_ROHM

IC2307

BD48K28G

VDD

3

PD_20_24V

R2336
100K

PD_20_24V_ROHM

IC2308

BD48K28G

VDD

3

RESET_IC_DIODES

IC2307-*1
APX803D29

RESET

+3.5V_ST

C2365

0.1uF
16V

C2362

0.1uF
16V

R2316
0

24V-->3.48V
20V-->3.51V
12V-->3.58V

ST_3.5V-->3.5V

RESET

POWER_DET

POWER_DET_1

R2338
10K
OPT

VOUT

2

1

GND

R2315

0

PWR_DET_MERGE

VOUT

2

1

GND

PWR_DET_SEPARATE

3

2

1

GND

PD_20_24V_DIODES

IC2308-*1
APX803D29

3

2

1

GND

not to RESET
at 8kV ESD

PWR_DET_SEPARATE

VCC

VCC

eMMC POWER

+3.3V_NORMAL

+12V

L2300
BLM18PG121SN1D

C2301
10uF
16V

1.0V_DCDC_TI

L2302
BLM18PG121SN1D

C2312-*1
3300pF
50V

C2359

0.1uF

3.3V_EMMC

C2305

C2300

0.1uF
22uF

16V

10V

+1.0V_VDD

R2304

1%

R2302

R2306

R2

10K

11K

33K

1%

POWER_ON/OFF2_3

R1

C2308
100pF

50V

DCDC_ROHM

IC2300

BD9D320EFJ

EN

C2310
1uF
10V

1

FB

2

VREG

3

SS

4

C2312
2200pF
50V

1.0V_DCDC_ROHM

3A

9

THERMAL

8

7

6

5

Vout=0.765*(1+R1/R2)

[EP]FIN

VIN

BOOT

SW

GND

+3.5V_ST

LG1154A

0.1uF
C2314

R2333

16V

22

LD2300

NR5040T2R2N

L2307

2.2uH

R2341

10K

C2340

22uF

10V

+3.3V_NORMAL

1.5K

R2342

+1.0V_VDD

R2346

C

Q2303

2SC3052

C2348
22uF
10V

+2.5V

POWER_ON/OFF2_2

+3.3V_NORMAL

C2327

0.1uF

11K

B

E

16V

R2312

10K

+5V_NORMAL

C2337
1uF

C2341

0.1uF

IC2302

AP2132MP-2.5TRG1

1

PG

2

EN

THERMAL

3

VIN

4

2A

VCTRL

EAN61387601

[EP]

8

GND

9

7

ADJ

6

VOUT

5

NC

T2 : Max 1.7A

else : Max 0.7A

+2.5V_Normal

1.2K

R2

R2321

R1

3.9 K

R23 22

C2342
10uF
10V

5V

OPT

ZD2302

Vout=0.6*(1+R1/R2)

+12V

L2301

BLM18PG121SN1D

C2302

C2360

10uF

0.1uF

16V

1.0V_DCDC_TI
C2315-*1

3300pF
50V

UB98/UC9_H13_DDR_Voltage

R2305-*1

4.99K
1%

Main +1.5V

POWER_ON/OFF2_3

UB95/95/UC97_H13_DDR_Voltage

R2305

R2303

R1

18K
1%

C2303
100pF

50V

R2

R2313

10K

4.3K
1%

R2307
22K
1%

Vout=0.765*(1+R1/R2)=1.516V

C2313
1uF
10V

BD9D320EFJ

EN

1

FB

2

VREG

3

SS

4

C2315
2200pF
50V

1.0V_DCDC_ROHM

DCDC_ROHM

IC2303

THERMAL

3A

+1.5V_DDR

DCDC_TI

IC2303-*1

TPS54327DDAR

[EP]GND

VIN

EN

8

1

VBST

VFB

9

7

C2321
22uF
10V

VREG5

OPT

SS

ZD2303

2.5V

2

THERMAL

SW

6

3

GND

5

4

[EP]FIN

VIN

8

9

7

6

5

BOOT

SW

GND

16V

0.1uF
C2318

NR5040T2R2N

L2308

2.2uH

C2320
22uF
10V

+1.2V_CORE

R2368

100

1/16W

R2363

R2364

C2373
2200pF
50V

5.1K

4.87K

1%

1/16W

1%

1/16W

1%

1%

1/16W

20K

R2365

C2374
1uF
10V

L2322

C2375
10uF
16V

+12V

C2376
10uF
16V

R2359
10K

2.5V

ZD2300

OPT

DCDC_TI

IC2300-*1

TPS54327DDAR

[EP]GND

VIN

EN

8

1

VBST

VFB

9

7

2

THERMAL

SW

VREG5

6

3

GND

SS

5

4

POWER_ON/OFF2_4

+1.2V_VDD

OPT

2.5V

ZD2304

C2361

22uF

C2353

22uF

C2369

0.1uF
16V

C2366
22uF

C2370
1000pF
50V

R2356 1K

R2355
2K

1/16W
5%

L2321

1uH

R2357

1%

91K

1/1 6W

R23 61

1%

27K

1/1 6W

RF

R23 60

PGOOD

EN

16V

0.1uF
VBST

C2372

NC_1

4.7

R2358

SW_1

SW_2

SW_3

SW_4

3.3

1/10W

5%

30V

OPT

D2301
C2371
470pF
50V

[EP]

1

THERMAL

2

29

3

IC2309

4

TPS53513RVER

5

6

7

8

8A

9

10

PGND_111PGND_212PGND_313PGND_414PGND_5

R2362
39K

1/16W
5%

TRIP26NC_327GND128GND2

24VO25

R1

R2

FB

23

GND

22

MODE

21

VREG

20

VDD

19

NC_2

18

VIN_3

17

VIN_2

16

VIN_1

15

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Vout=0.6*(1+R1/R2)

POWER UP SEQUENCE

5V/3.3V->2.5V->1.5V/1.1V->1.0V
LG1154D : 3.3V->2.5V->1.5V->1.1V
LG1154AN : 3.3V->2.5V->1.0V

BSD-14Y-UD-023-HD

2013-12-17

POWER

+3.3V_NORMAL for UB98, UC9

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

R2323
10K

R2335
39K

1/16W
5%

TRIP

NC_3

GND1

GND2

[EP]

26

27

28

THERMAL

29

IC2301

TPS53513RVER

8A

10

PGND_111PGND_212PGND_313PGND_414PGND_5

POWER_ON/OFF2_1

OPT

2.5V

ZD2301

+3.3V_NORMAL

C3346

C2304

22uF

22uF

C2319

22uF

C2325

0.1uF
16V

C2323
22uF

C2326
1000pF
50V

R2311 1K

R2308
2K

1/16W
5%

L2305

1uH

R2319

3.3

R2320

1/10W

5%

C2328
470pF
50V

1%

0.1uF

C2332

4.7

OPT

1/16W

16V

30V

1%

27K

1/16W

R2331

PGOOD

VBST

NC_1

SW_1

SW_2

SW_3

SW_4

D2300

91K

R2334

RF

1

2

EN

3

4

5

6

7

8

9

R2339

18K

1/16W

R2340

3.6K

R2366

4.87K

C2345
2200pF
50V

1%

1/16W

1%

1/16W

1%

1%

1/16W

20K

R2367

C2363
1uF
10V

L2309

C2364
10uF
16V

+12V

C2367
10uF
16V

R1

R2

24VO25

FB

23

GND

22

MODE

21

VREG

20

VDD

19

NC_2

18

VIN_3

17

VIN_2

16

VIN_1

15

Vout=0.6*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+5.0V normal & USB (65EC97 Only)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+12V

L2501

120-ohm

C2501
10uF
35V

OPT

C2502
10uF
35V

C2506

OPT

2200pF

C2507

50V

100pF
50V

R2506
10K

R25 05150 K 1%

R25 02 16K 1%

R25 04 16K 1%

COMP25RLIM26RSET1

RSET2

AGND

[EP]

12

SW_EN213SW_EN1

+5V_USB_3

+5V_USB_2

USB_CTL2

USB_CTL3

22SS23FB24

21

20

19

18

17

16

15

14

NFAULT2

/USB_OCD2

LX_3

LX_2

LX_1

BST

SW_IN2

SW_IN1

NFAULT1

27

28

VIN_1

1

THERMAL

VIN_2

2

VIN_3

C2504

0.1uF
50V

PGND_1

PGND_2

PGND_3

1uF

25V

5%

C25 03

1/16W

C2505

0.0068uF

29

3

IC2501

4

SN1302001(TPS65286RHDR)

5

6

V7V

0

R2501

50V

7

6A

9EN10

8

MODE/SYNC

10K

R2503

SW_OUT211SW_OUT1

POWER_ON/OFF1

R2

C2508

0.047uF
25V

R2507

0

C2510

5%

82pF

50V

L2502

4.7uH

C2509

0.047uF
25V

100K

R2508

1/16W

/USB_OCD3

R1

1%

1%

R2511

1/16W

1/16W

1/16W

6.8K

51K

5%

R2509

R2510

100K

C2511
1uF
10V

C2512
22uF
10V

C2513
22uF
10V

Vout=0.6*(1+R1/R2)=5.1V

C2514

10uF

+5V_NORMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+3.5V_ST

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+12V

C2602

0.1uF
50V

55/65 UHD OLED POWER

+3.5V_ST

1

10K

R2601

RL_ON

PWM_DIM

L2601

UBW2012-121F

C2601

0.1uF
16V

D2601

23.2V

10K

OLED_AC_DET

UBW2012-121F

L2602

UBW2012-121F

L2603

R2602

2

PD_OLED_AC
R2608

UBW2012-121F

Q2601 MMBT3906(NXP)

3

0

L2604

3.5V_ST
R2609 0

PWR ON

3.5V

3.5V
GND
24V
GND
12V
12V
GND

NC
12V
GND

P2600
SMAW200-H24S5

1
3

5

7

10

9
11

12

13

14

15

16

17

18
20

19

21

22

23

24

25

2
4
6
8

INV CTL
DPC_CTL

3.5V
GND
24V
GND
12V
24V
GND
NC
12V
GND

R2603

0

R2606
100

+3.3V_NORMAL

3.3K
R2604
OPT

3.3K
R2605

L2605

UBW2012-121F

L2606

UBW2012-121F

+12V

C2603
10uF
16V

+3.3V_NORMAL

R2607
1K

INV_CTL

C2605

0.1uF
50V

C2604
10uF
16V

DPC_CTL

PWM_DIM2

DPC_CTL

C2606
10uF
16V

+24V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

OLED

POWER WAFER

BSD-14Y-UD-026-HD

2014-03-08

EL_VDD_DETECT_22V

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

EL_DET_22V

R2800

5.6K
1%

EL_DET_22V
R2801

1.3K
1%

VCC

C2800

0.1uF
16V

EL_DET_22V

EL_DET_22V

R2802
100K

PD_22V_ONSEMI

IC2850

NCP803SN293

3

1

GND

PD_22V_DIODES

IC2850-*1
APX803D29

VCC2RESET

3

1

GND

SW2800

JS2235S

1

R2803
0

OPT

2

R2804

OLED_DEBUG

0
OPT

RESET

2

3

+3.5V_ST

R2806
10K

6

5

4

OLED_DEBUG

R2805
0

OLED_MP

To monitor EL_VDD voltage.

EL_VDD_MONITOR

EL_VDD_MONITOR

R2807

PWR_DET_MERGE

0

POWER_DET_1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

OLED

ELVDD DETECT

BSD-14Y-UD-028-HD

2014-03-11

Renesas MICOM

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

For Debug

+3.5V_ST

MICOM_DEBUG

P3000

12507WS-04L

5

1

2

3

4

Don’t remove R3014,
not making float P40

R3013 1K

R3010 10K

MICOM_DEBUG

MICOM_DEBUG

MICOM_RESET

GP4 High/MID Power SEQUENCE

POWER_ON/OFF!

POWER_ON/OFF2_1

POWER_ON/OFF2_2

POWER_ON/OFF2_3

POWER_ON/OFF2_4

SOC_RESET

MICOM MODEL OPTION

MICOM MODEL OPTION

+3.5V_ST

MODEL_OPT_0

MODEL_OPT_1

MICOM_GED

R3000 10K

MICOM_EPI

R3004 10K

R3002 10K

MICOM_H13/H14

R3006 10K

MICOM_OLED

R3011 10K

MICOM_LOGO_LIGHT

Non_OLED_AC_DET

R3006-*2 10K

R3006-*1 10K

98UB98_Moving_SPK

MODEL1_OPT_0

MODEL1_OPT_1

MODEL1_OPT_2

MODEL1_OPT_3

MODEL1_OPT_4

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_1

MICOM_M14

R3003 10K

R3001 10K

MICOM_NON_GED

R3007 10K

R3005 10K

MICOM_LCD/UHD

MICOM_NON_EPI

MICOM_NON_LOGO_LIGHT

OLED_AC_DET

R3012 10K

R3007-*2 10K

98UB98_Moving_SPK

R3007-*1 10K

Pull Down MICOM_LCD/UHD

Pull up + pull down 98UB98_Moving_SPK

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

0

NON LOGO

LCD / UHD

NON_EPI

M14

NON_GED

Pull Up MICOM_OLED

PANEL_CTL

CAM_SLEEP

1

LOGO

OLED

EPI

H13 / H14

GED

LCD_MICOM_CODE OLED_MICOM_CODE

For LOGO LIGHT

Need to Assign ADC port

P30/INTP3/RTC1HZ/SCK11/SCL11

Non_POWER_AC_DET

POWER_AC_DET

I2C_SCL_MICOM

I2C_SDA_MICOM

MODEL1_OPT_4

PANEL_CTL

WOL/WIFI_POWER_ON

IR

HDMI_CEC

POWER_ON/OFF2_2

POWER_ON/OFF2_3

EYE_SDA

EYE_SCL

CAM_SLEEP

TP3002

+3.5V_ST

P60/SCLA0
P61/SDAA0

P31/TI03/TO03/INTP4

P75/KR5/INTP9/SCK01/SCL01

P74/KR4/INTP8/SI01/SDA01

P73/KR3/SO01
P72/KR2/SO21

P71/KR1/SI21/SDA21

P70/KR0/SCK21/SCL21

1
2

P62

3

P63

4
5
6
7
8
9
10
11
12

+3.5V_ST

R3018

10K

P31/TI03/TO03/INTP4

P75/KR5/INTP9/SCK01/SCL01

P74/KR4/INTP8/SI01/SDA01

P71/KR1/SI21/SDA21

P70/KR0/SCK21/SCL21

P30/INTP3/RTC1HZ/SCK11/SCL11

3.3K

AR3000

EYE_Q_10P

P120/ANI19

P41/TI07/TO07

P40/TOOL0

RESET41P124/XT2/EXCLKS

P123/XT1

P137/INTP0

P122/X2/EXCLK

P121/X1

REGC47VSS48VDD

37

38

39

40

42

43

44

45

46

IC3000-*1

R5F100GEAFB#30

MICOM_LEAD_Cu

13

14

15

16

17

18

19

20

P17/TI02/TO02

P13/TXD2/SO20

P51/INTP2/SO11

P16/TI01/TO01/INTP5

P14/RXD2/SI20/SDA20

P50/INTP1/SI11/SDA11

P12/SO00/TXD0/TOOLTXD

P15/PCLBUZ1/SCK20/SCL20

21

P11/SI00/RXD0/TOOLRXD/SDA00

P140/PCLBUZ0/INTP6

36

P00/TI00/TXD1

35

P01/TO00/RXD1

34

P130

33

P20/ANI0/AVREFP

32

P21/ANI1/AVREFM

31

P22/ANI2

30

P23/ANI3

29

P24/ANI4

28

P25/ANI5

27

P26/ANI6

26

P27/ANI7

25

22

23

24

P146

P147/ANI18

P10/SCK00/SCL00

HDMI_WAUP:HDMI_INIT

MHL_DET

MHL_DET

+3.5V_ST

C3000

0.1uF

P60/SCLA0
P61/SDAA0

P62
P63

P73/KR3/SO01
P72/KR2/SO21

8pF

C3002

X3000

32.768KHz

POWER_DET_1

CAM_PWR_ON_CMD

P137/INTP0

P122/X2/EXCLK

P121/X1

43

44

45

R3019

1

10K

VDD

48

TP3009

GND

VSS

47

CAM_PWR_ON_CMD

C3001 0.47uF

REGC

46

2
3
4
5
6
7
8

IC3000

R5F100GEAFB

MICOM_LEAD_Au

9
10
11
12

13

14

15

16

17

18

P17/TI02/TO02

P51/INTP2/SO11

P16/TI01/TO01/INTP5

P50/INTP1/SI11/SDA11

P14/RXD2/SI20/SDA20

P15/PCLBUZ1/SCK20/SCL20

LED_R

POWER_DET

WOL/ETH_POWER_ON

WOL_CTL

POWER_ON/OFF1

LED_R

SOC_RESET

C3003 8pF

R3020

4.7M

MICOM_RESET

OPT

R3021 22

MICOM_RESET_22OHM

P40/TOOL0

RESET

P124/XT2/EXCLKS

P123/XT1

40

41

42

19

20

21

LOGO_LIGHT

MICOM_DEBUG

LOGO_LIGHT

C3004

0.1uF
16V

P120/ANI19

P41/TI07/TO07

37

38

39

36
35
34
33
32
31
30
29
28
27
26
25

22

23

24

+3.5V_ST

10K

R3022

R3023

P140/PCLBUZ0/INTP6
P00/TI00/TXD1
P01/TO00/RXD1
P130
P20/ANI0/AVREFP
P21/ANI1/AVREFM
P22/ANI2
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7

P146

P147/ANI18

P13/TXD2/SO20

P10/SCK00/SCL00

P12/SO00/TXD0/TOOLTXD

P11/SI00/RXD0/TOOLRXD/SDA00

INV_CTL

0.1uF

C3005

SOC_TX

SOC_RX

EDID_WP

AMP_MUTE

EDID_WP

CAM_CTL

CAM_CTL

CEC_REMOTE

MICOM_RESET_SW

OPT

270K

CAM_RESET

MICOM

SW3000

JTP-1127WEM

4 3

BAT54_SUZHO

12

MICOM_RESET_33OHM

R3021-*1 33

R3024
27K

D3000

CAM_RESET

RL_ON

SCART_MUTE

POWER_ON/OFF2_4

POWER_ON/OFF2_1

KEY2

KEY1

MODEL1_OPT_3

MODEL1_OPT_0

SIDE_HP_MUTE

MODEL1_OPT_2

MODEL1_OPT_1

For CEC

+3.5V_ST

G

D

S

Q3000
RUE003N02

SCART_MUTE

POWER_ON/OFF2_4

R3025

120K

HDMI_CEC

BSD-14Y-UD-030-HD

2014.03.11

30

5V_HDMI_1

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

R3298

33

VA3212

Q3200

Q3201

VA3210
ESD_HDMI

5V_HDMI_4

C

E

C

E

VA3215
ESD_HDMI

VA3204

ESD_HDMI

R3205

1K

B

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

R3219

1K

B

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1
2
3
4
5

1
2
3
4
5

HDMI_HPD_1

R3233
1K

R3245
1K

VA3213
ESD_HDMI

AR3207
33
1/16W

VA3207

ESD_HDMI

D3202
IP4294CZ10-TBR

1
2
3

OPT

4
5

D3203
IP4294CZ10-TBR

1
2
3

OPT

4
5

R3218

4.7K
HDMI_INT_EDID

R3247

4.7K
HDMI_EXT_EDID

D3204
RCLAMP0544T.TCT

6.5VTO11.0V

9

D3205
RCLAMP0544T.TCT

6.5VTO11.0V

9

R3220

4.7K
HDMI_INT_EDID

R3248

4.7K
HDMI_EXT_EDID

AR3205
33
1/16W

D3206
RCLAMP0544T.TCT

6.5VTO11.0V

9

D3207
RCLAMP0544T.TCT

6.5VTO11.0V

9

AR3206
33
1/16W

D3200
IP4294CZ10-TBR

10
9
8

OPT

7
6

D3201
IP4294CZ10-TBR

10
9
8

OPT

7
6

BODY_SHIELD

BODY_SHIELD

BODY_SHIELD

BODY_SHIELD

20

05008WR-H19C.

JK3203

VA3205

ESD_HDMI

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

05008WR-H19C.

JK3200

VA3202

ESD_HDMI

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

05008WR-H19C.

JK3201

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

05008WR-H19C.

JK3202

19

HOT_PLUG_DETECT

18

VDD[+5V]

17

DDC/CEC_GND

16

SDA

15

SCL

14

RESERVED

13

CEC

12

TMDS_CLK-

11

TMDS_CLK_SHIELD

10

TMDS_CLK+

9

TMDS_DATA0-

8

TMDS_DATA0_SHIELD

7

TMDS_DATA0+

6

TMDS_DATA1-

5

TMDS_DATA1_SHIELD

4

TMDS_DATA1+

3

TMDS_DATA2-

2

TMDS_DATA2_SHIELD

1

TMDS_DATA2+

HOT_PLUG_DETECT

VDD[+5V]

DDC/CEC_GND

SDA

SCL

RESERVED

CEC

TMDS_CLK-

TMDS_CLK_SHIELD

TMDS_CLK+

TMDS_DATA0-

TMDS_DATA0_SHIELD

TMDS_DATA0+

TMDS_DATA1-

TMDS_DATA1_SHIELD

TMDS_DATA1+

TMDS_DATA2-

TMDS_DATA2_SHIELD

TMDS_DATA2+

HOT_PLUG_DETECT

VDD[+5V]

DDC/CEC_GND

SDA

SCL

RESERVED

CEC

TMDS_CLK-

TMDS_CLK_SHIELD

TMDS_CLK+

TMDS_DATA0-

TMDS_DATA0_SHIELD

TMDS_DATA0+

TMDS_DATA1-

TMDS_DATA1_SHIELD

TMDS_DATA1+

TMDS_DATA2-

TMDS_DATA2_SHIELD

TMDS_DATA2+

HOT_PLUG_DETECT

VDD[+5V]

DDC/CEC_GND

SDA

SCL

RESERVED

CEC

TMDS_CLK-

TMDS_CLK_SHIELD

TMDS_CLK+

TMDS_DATA0-

TMDS_DATA0_SHIELD

TMDS_DATA0+

TMDS_DATA1-

TMDS_DATA1_SHIELD

TMDS_DATA1+

TMDS_DATA2-

TMDS_DATA2_SHIELD

TMDS_DATA2+

CEC_REMOTE

VA3201

ESD_HDMI

CEC_REMOTE

VA3206

ESD_HDMI

CEC_REMOTE

VA3200

ADLC 5S 02 015

VA3211

ADLC 5S 02 015

CEC_REMOTE

VA3203

ESD_HDMI

MMBT3904(NXP)
R3202
100K

MMBT3904(NXP)
R3203
100K

OPT

ESD_HDMI

HDMI4 with MHL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

10
9
8
7
6

10
9
8
7
6

5V_HDMI_2

HDMI_HPD_2

OPT

OPT

5V_HDMI_3

HDMI_HPD_3

OPT

OPT

HDMI3

HDMI_HPD_4_MHL

DDC_SDA_MHL

DDC_SCL_MHL

CK-_HDMI4_JACK

CK+_HDMI4_JACK

D0-_HDMI4_JACK

D0+_HDMI4_JACK

D1-_HDMI4_JACK

D1+_HDMI4_JACK

D2-_HDMI4_JACK

D2+_HDMI4_JACK

VA3216

ESD_HDMI

DDC_SDA_1_R9531
DDC_SCL_1_R9531

CK-_HDMI1_R9531

CK+_HDMI1_R9531

D0-_HDMI1_R9531

D0+_HDMI1_R9531

D1-_HDMI1_R9531

D1+_HDMI1_R9531

D2-_HDMI1_R9531

D2+_HDMI1_R9531

HDMI1

CK-_HDMI2

CK+_HDMI2

D0-_HDMI2

D0+_HDMI2

D1-_HDMI2

D1+_HDMI2

D2-_HDMI2

D2+_HDMI2

DDC_SDA_3

DDC_SCL_3

CK-_HDMI3

CK+_HDMI3

D0-_HDMI3

D0+_HDMI3

D1-_HDMI3

D1+_HDMI3

D2-_HDMI3

D2+_HDMI3

AR3204
33
1/16W

VA3214

VA3209

ESD_HDMI

ESD_HDMI

5V_HDMI_2

R3206

1K

C3200

OPT

1uF

VA3208

ESD_HDMI

10V

R3207

3.9K

OPT

HDMI2 with ARC

R3260
1K

Q3205

1/16W

C3234

5%

R3232

R3259

180K

120K

MMBT3904(NXP)

0.1uF
16V

OPT

DDC_SDA_2

DDC_SCL_2

SPDIF_OUT_ARC

OPT

C3201

0.1uF
16V

ARC

+3.5V_ST

R3261

B

10K

C

E

R3262
10K

P_XOUT

P_XIN

P_AVDD33

P_AVDD33

+1.1V_VDD_D14

+1.1V_VDD_D14

HDMI_3.3V

HDMI_3.3V

E

B

C

R3241

2.2M

510

R3225

510

R3228

+1.1V_VDD_D14

C3202

C3272

0.33uF

22uF
10V

L3200
BLM18PG121SN1D

L3201
BLM18PG121SN1D

L3204
BLM18PG121SN1D

+5V_NORMAL

AR3201

47K

MMBT3906(NXP)

Q3206

MHL_DET

(CD_SENCE)

X3200
27MHz

X-TAL_1

1

GND_13X-TAL_2

2

HDMI_1_RX2+

HDMI_1_RX2-

HDMI_1_RX1+

HDMI_1_RX1-

HDMI_1_RX0+

HDMI_1_RX0-

HDMI TX port 1

HDMI_1_CLK+

HDMI_1_CLK-

HDMI_0_RX2+

HDMI_0_RX2-

HDMI_0_RX1+

HDMI_0_RX1-

HDMI_0_RX0+

HDMI_0_RX0-

HDMI TX port 0

HDMI_0_CLK+

HDMI_0_CLK-

L3205
BLM18PG121SN1D

P_VDD11

OPT

OPT

OPT

C3229 1000pF

C3204 1000pF

C3228 1000pF

P_VDD33

C3206 0.1uF

C3205 0.33uF

C3207 0.1uF

P_AVDDH33

C3221 0.33uF

C3223 0.1uF

C3225 0.1uF

DDC pull-up

5V_HDMI_1

A2CA1
MMBD6100
D3218

1/16W

DDC_SCL_1_R9531

C3233

20pF

GND_2

4

C3214

20pF

1000pF

1000pF

C3226 1000pF

C3224

C3222

OPT

OPT

+1.1V_VDD_D14

1000pF

OPT

OPT

C3248

C3208 1000pF

HDMI_3.3V

C3216 4.7uF

C3260 4.7uF

C3261 0.33uF

C32610 0.1uF

4th layer

DDC_SDA_1_R9531

OPT

C3263

4.7uF
10V

R3214
0

HDMI_3.3V

5V_HDMI_2

P_AVDDH11

1000pF

C3253 1000pF

C3227

OPT

L3203
BLM18PG121SN1D

C3212 0.33uF

C3230 0.33uF

AR3200

47K

1/16W

P_AVDD33

1000pF

OPT

P_AVDD33

C3215 0.33uF

R3221
0

C3254

C3255 1000pF

OPT

1000pF

OPT

C3250

C3217 0.33uF

P_PVDD33

C3231 0.33uF

+5V_NORMAL

A2CA1
MMBD6100
D3208

P_AVDD11

Test3_ANA_MON3

1000pF

C3256

OPT

P_AVDD11

1000pF

OPT

C3252 1000pF

C3251

C3258 0.33uF

0.1uF

C3232

DDC_SDA_2

DDC_SCL_2

Test1_ANA_MON1
Test2_ANA_MON2
Test3_ANA_MON3

P_VDD11

VDD33_1
VDD11_1

AVDD33_1

AVDD11_1

AVDD33_2

AVDD11_2

P1EXT_SWING

NC[ANA_MON3]

AVDD33_3

AVDD11_3

AVDD33_4

AVDD11_4

P0EXT_SWING

CH0ABCLK

CH0ALRCLK

CH0ASD3
CH0ASD2
CH0ASD1
CH0ASD0
VDD11_2

C3264

4.7uF
10V

OPT

OPT

C3259 4.7uF

C3265 4.7uF

+5V_NORMAL

5V_HDMI_3

AR3202

47K

1/16W

+5V_NORMAL

R326 6

1.8K

R326 7

R326 5

1.8K

[EP]

TX0SCL

TX0SDA

143

144

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36

P_PVDD33

P_VDD33

THERMAL

145

37

38

NIRQA039NIRQA140TX1HPD41TX0HPD

VDD33_2

R3231
10K

P1TX2P

P1TX2M
P1TX1P

P1TX1M
P1TX0P

P1TX0M
P1TXCP

P1TXCM

P0TX2P

P0TX2M
P0TX1P

P0TX1M
P0TX0P

P0TX0M
P0TXCP

P0TXCM

3.3V Power Separation

+3.3V_NORMAL

C3269

C3268

22uF

100uF

10V

6.3V

+3.5V_ST

A2CA1
MMBD6100
D3219

AR3203

47K

DDC_SDA_3

DDC_SCL_3

R326 8

1.8K

TX1SDA

142

+5V_NORMAL

5V_HDMI_4

1/16W

1.8K

R3269 0

R3270 0

R3271 0

R3272 0

NC_11

TX1SCL

140

141

R3208

10K

S
AO3438
Q3204

A2CA1

MMBD6100

D3209

TX0SDA

TX0SCL

TX1SDA

TX1SCL

NC_8

NC_9

NC_10

CH0AMCLK

VDD11_6

135

136

137

138

139

MN864778P

42

43

44

45

46

NTEST

PVDD33

P3RXCM47P3RXCP

AVDDH33_1

NC[ANA_MON2]

Test2_ANA_MON2

CK-_HDMI1

HDMI_3.3V

G

D

C3235
10uF
10V

+5V_NORMAL

DDC_SCL_MHL

DDC_SDA_MHL

NC_4

NC_5

NC_6

NC_7

131

132

133

134

IC3200

48

49

P3RX0M50P3RX0P

AVDD11_5

CK+_HDMI1

D0-_HDMI1

A2CA1
MMBD6100
D3210

TX0SDA

TX0SCL

TX1SDA

TX1SCL

LPSA1

LPSA0

NC_1

NC_2

NC_3

126

127

128

129

130

51

52

P3RX1M53P3RX1P54P3RX2M55P3RX2P56P2RXCM57P2RXCP

AVDD11_6

D2-_HDMI1

D1+_HDMI1

D1-_HDMI1

D2+_HDMI1

D0+_HDMI1

HDMI1

MN864778_RESET

P_XIN

10K

R3244

VDD11_5

VSS

121

122

59

P2RX0M60P2RX0P

D0-_HDMI2

D0+_HDMI2

HDMI_3.3V

C3240

0.1uF
16V

P_XOUT

SYSCLK/XI

NC/XO

RX3P5V

NRESET

117

118

119

120

61

62

P2RX1M63P2RX1P64P2RX2M65P2RX2P

AVDD11_8

D1+_HDMI2

D1-_HDMI2

R3279

10K

+5V_NORMAL

C3241
1uF

HSDA0

D2-_HDMI2

C3243

0.1uF

10K

R3243

CH1ASD0

CH1ALRCLK

CH1ABCLK

123

124

125

58

AVDD11_7

CK+_HDMI2

CK-_HDMI2

R9531 +1.0V

Vout=0.6*(1+R1/R2)

I2C_SCL5

I2C_SDA5

R3230 0

R3258 0

CEC1

HSCL0

114

115

116

66

67

VDD11_3

AVDDH33_2

5V_HDMI_2

R3236
0

HDMI_Damping0ohm

R3237
47K

HDMI_Damping10ohm

D2+_HDMI2

HDMI2

AP2132MP-2.5TRG1

R3235
47K

TX0ARCIN

VDD33_4

NIRQ1

112

113

68

69

RX2P5V

VDD33_3

NC[VDDQ]

R3236-*1
10

PG

EN

VIN

VCTRL

5V_HDMI_1

R3234
0

HDMI_Damping0ohm

P_VDD33

CEC5

TX1ARCIN

109

110

111

108
107
106
105
104
103
102
101
100

99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73

70

71

RX1P5V72RX0P5V

5V_HDMI_3

HDMI_Damping0ohm

R3239

47K

HDMI_Damping10ohm

IC3204

1

9

2

THERMAL

3

4

2A

EAN61387601

VDD11_4
AVDDH33_4
P0RX2P
P0RX2M
P0RX1P
P0RX1M
AVDD11_12
P0RX0P
P0RX0M
AVDD11_11
P0RXCP
P0RXCM
P1RX2P
P1RX2M
P1RX1P
P1RX1M
AVDD11_10
P1RX0P
P1RX0M
AVDD11_9
P1RXCP
P1RXCM
AVDDH33_3
NC[ANA_MON1]
CEC0
CEC2
CEC3
CEC4
RX0SCL
RX0SDA
RX1SCL
RX1SDA
RX2SCL
RX2SDA
RX3SCL
RX3SDA

R3238
0

R3238-*1
10

[EP]

8

GND

7

ADJ

6

VOUT

5

NC

R3234-*1
10

HDMI_Damping10ohm

P_VDD33

P_AVDDH33

5V_HDMI_4

R3240

0
HDMI_Damping0ohm
R3242

47K

R3240-*1
10

HDMI_Damping10ohm

else : Max 0.7A

R3280

R328 1

P_AVDDH11

1.8K

1.2K

D2+_HDMI4_MHL

D2-_HDMI4_MHL

D1+_HDMI4_MHL

D1-_HDMI4_MHL

D0+_HDMI4_MHL

D0-_HDMI4_MHL

CK+_HDMI4_MHL

CK-_HDMI4_MHL

D2+_HDMI3

D2-_HDMI3

D1+_HDMI3

D1-_HDMI3

D0+_HDMI3

D0-_HDMI3

CK+_HDMI3

CK-_HDMI3

Test1_ANA_MON1

P_AVDDH33

+5V_NORMAL

AR3209
47K
1/16W

DDC_SCL_3

DDC_SDA_3

DDC_SCL_2

DDC_SDA_2

DDC_SCL_1

DDC_SDA_1

Solder Preform
Attach at R9531 thermal pad

+1.0V_R9531

R2

R1

C3262

ZD3202

10uF

2.5V

10V

OPT

HDMI3

CK-_HDMI1_R9531

CK+_HDMI1_R9531

D0-_HDMI1_R9531

D0+_HDMI1_R9531

D1-_HDMI1_R9531

D1+_HDMI1_R9531

D2-_HDMI1_R9531

D2+_HDMI1_R9531

+1.0V_R9531

HDMI4

BLM18PG121SN1D

BLM18PG121SN1D

BLM18PG121SN1D

L3210

L3207

L3211

HDMI_3.3V

+1.0V_R9531

SPI_CK_R9531

R3257

R3263 5.1

R3264

R3273 5.1

R3274

R3276 5.1

R3277

R3299 5.1

CVDD10_R9531

DVDD10_R9531

AVDD33_R9531

3.3V_Sil9617

L3202
BLM18PG121SN1D

C3203

C3209

0.1uF

10uF

16V

10V

D2+_HDMI4_MHL
D2-_HDMI4_MHL
D1+_HDMI4_MHL
D1-_HDMI4_MHL
D0+_HDMI4_MHL
D0-_HDMI4_MHL
CK+_HDMI4_MHL
CK-_HDMI4_MHL

Q3203

SI1012CR-T1-GE3

S3200

RAC33437501

S3201

RAC33437501

S3202

RAC33437501

S3203

RAC33437501

S3204

RAC33437501

5.1

5.1

5.1

5.1

CVDD10_R9531

C3246
10uF
10V

APLL10_R9531

C3282

C3244

0.1uF

10uF

16V

10V

C3278

C3257

2.2uF

10uF

10V

10V

C3218

C3219

0.1uF
22uF

16V

10V

C3210

C3211

0.1uF

0.1uF

16V

16V

SIL9617_RESET

SIL9617_INT

+3.3V_NORMAL

S

G

D

R3204

SCLK_GPIO9

33

GPIO5

SD0_IN_SPDIF0_IN

GPIO6

RSVDL_1

R0XC­R0XC+
R0X0­R0X0+
R0X1­R0X1+
R0X2-

R0X2+
CVDD10_1
AVDD10_1
AVDD33_1
RSVDNC_1
RSVDNC_2
RSVDNC_3
RSVDNC_4
RSVDNC_5
RSVDNC_6
RSVDNC_7
RSVDNC_8
RSVDNC_9

R9531_RESET

Q3202

SI1012CR-T1-GE3

C3279

C3284

C3289

10uF

0.1uF

0.1uF

10V

16V

16V

DVDD10_R9531

C3288

C3280

0.1uF

0.1uF
16V

16V

+5V_NORMAL

L3208

BLM18PG121SN1D

AVDD10_1

RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7

RSVD_8
VDD10_1
TAVDD10

TX2P
TX2N
TX1P
TX1N
TX0P
TX0N
TXCP
TXCN

PWRMUX_OUT_SIL9617

10K

R3201

+3.3V_NORMAL

R3200

47K

SPI_DI_R9531

SDI_GPIO11

SS_GPIO8

[EP]

99

100

1
2

THERMAL

3

101
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

26

RSVDNC_1027RSVDNC_1128RSVDNC_1229RSVDNC_1330RSVDNC_1431RSVDNC_15

HDMI_3.3V

S

PWRMUX_OUT

G

R3252

D

10K

HDMI_3.3V

C3245

C3266

0.1uF

0.1uF

16V

16V

5V_MHL

3.3V_Sil9617

1
2

THERMAL

3

77
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

20

21

INT

RSVDL_1

TPWR_CI2CA

4.7K

R3210

R3209

47K

AR3208

33

AVDD33_R9531

RSVDNC_36

IOVCC33

SDO_GPIO10

96

97

98

L3215

BLM18PG121SN1D

L3213

BLM18PG121SN1D

C3236

0.1uF
16V

IC3206

SIL9617

22

23

24

25

27

RESET_N

RSVDH_128RSVDH_229RSVDL_230RSVDL_331RSVDH_332RSVDH_433RSVDL_434RSVDL_5

CD_SENSE

DSDA4[VGA]26DSCL4[VGA]

MHL_DET

5.1KR3212

R3211 47K

SPI_CS_R9531
SPI_DO_R9531

RSVDNC_31

RSVDNC_32

RSVDNC_33

RSVDNC_34

RSVDNC_35

91

92

93

94

95

IC3202

R9531AN

32

35

CVDD10_233AVDD10_234AVDD33_2

RSVDNC_1636RSVDNC_1737RSVDNC_1838RSVDNC_1939RSVDNC_2040RSVDNC_2141RSVDNC_2242RSVDNC_23

DVDD10_R9531

CVDD10_R9531

C3292
10uF
10V

XTAL_VCC33_R9531

C3290
10uF
10V

5.1KR3215

R3213 47K

CVDD10_R9531

RSVDNC_28

RSVDNC_29

RSVDNC_30

88

89

90

AVDD33_R9531

AVDD33_R9531

C3294
10uF
10V

C3293

0.1uF
16V

35

37

DSDA136DSCL1

CBUS_HPD1

5.1KR3216

R3222

R3223

ARCRX_TX

87

C3298

0.1uF
16V

AVDD10_259VDD33_160R1XCN61R1XCP62R1X0N63R1X0P64R1X1N65R1X1P66R1X2N67R1X2P68RSVD_969RSVD_1070RSVD_1171RSVD_1272RSVD_1373RSVD_1474RSVD_1575RSVD_1676VDD33_277[EP]GND

58

57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39

38

R1PWR5V

5.1KR3217

D0-_HDMI1

C3299

0.1uF
16V

5V_MHL

C3249

0.1uF
16V

MHL_DET

R0X2P
R0X2N
R0X1P
R0X1N
R0X0P
R0X0N
R0XCP
R0XCN
VDD10_2
ARC
SPDIF_IN
CSCL
CSDA
PWRMUX_OUT
SBVCC5
R0PWR5V
CBUS_HPD0
DSCL0
DSDA0

+3.3V_NORMAL

47K
47K

R3224
47K

DVDD10_R9531

D0+_HDMI1

D1+_HDMI1

D1-_HDMI1

T0X1-83T0X1+84T0X2-85T0X2+86CVDD10_3

82

43

44

RESET_N

CI2CA_TPWR

C3271

0.1uF
16V

R3227

10K

+5V_NORMAL

R3226
47K

D2-_HDMI1

45

46

INT

DSDA047DSCL0

10K

R3282

R3283 4.7K

DDC_SDA_1_R9531

AVDD33_R9531

ZD3200

5V
OPT

R3294

R3229
47K

D2+_HDMI1

DDC_SCL_1_R9531

R9531_FLASH_WP

Current Limit

IC3207

TPS2553DBV

IN

1

GND

2

EN

3

10K

D2+_HDMI4_JACK
D2-_HDMI4_JACK
D1+_HDMI4_JACK
D1-_HDMI4_JACK

R3255

5.1

R3256 5.1

CK+_HDMI4_JACK
CK-_HDMI4_JACK

PWRMUX_OUT_SIL9617
I2C_SCL2
I2C_SDA2

HDMI_HPD_4_MHL

DDC_SCL_MHL

DDC_SDA_MHL

R3246
47K

R9531_XTAL_IN

DVDD10_R9531

CK-_HDMI1

CK+_HDMI1

TPVDD10

T0XC-78T0XC+79T0X0-80T0X0+81TDVDD10

76

77

XTALGND

75

XTALIN

74

XTALOUT

73

XTALVCC33

72

APLL10

71

RSVD_9

70

TX_HPD0

69

TX_DSCL0

68

TX_DSDA0

67

RSVDNC_27

66

RSVDNC_26

65

RSVD_8

64

RSVD_7

63

RSVD_6

62

RSVDNC_25

61

RSVD_5

60

RSVD_4

59

RSVD_3

58

RSVDNC_24

57

RSVD_2

56

RSVD_1

55

CSDA

54

CSCL

53

RSVDL_2

52

SBVCC5V

51

48

49

50

PWRMUX_OUT

R0PWR5V

CBUS_HPD0

VCC33_OUT

C3276

C3277

10uF

0.1uF

10V

16V

HDMI_HPD_1

R3254
10

R3253

C3275

5.1K

1uF

SPI FLASH (2MBit)

SPI_CS_R9531

R3275

SPI_DO_R9531

#MHL_OCP

R3249 10

5V_HDMI_1

DO[IO1]

33

OUT

6

ILIM

5

FAULT

4

D0+_HDMI4_JACK
D0-_HDMI4_JACK

C3213

10uF

+5V_NORMAL

C3267
18pF
50V

R3284

4.7K

R3285

4.7K

R3286

4.7K

R3287

4.7K

R3288

4.7K

R3290

4.7K

R3291

4.7K

R3292

4.7K

C3273
10uF
10V

IC3203

W25X20CLSNIG

CS

1

2

WP

3

GND

4

L3216

BLM31PG500SN1

50-ohm

D3211

1%

20K

R3295

#MHL_OCP

TP3203

C3220

R3297
120K

X3201
27MHz

X-TAL_1

1

GND_13X-TAL_2

2

R9531_XTAL_IN

R9531_XTAL_OUT

XTAL_VCC33_R9531

APLL10_R9531

R32931.8K

R32961.8K

R3912 0

R3913 0

AVDD33_R9531

I2C_SDA2

I2C_SCL2

+5V_NORMAL

C3274

0.1uF
16V

+3.3V_NORMAL

VCC

8

HOLD

7

CLK

6

DIO[IO0]

5

30V
OPT

R3289

100K

1uF
10V

GND_2

4

+5V_NORMAL

DDC_SDA_1

DDC_SCL_1

R3278

10K

32HDMI

5V_HDMI_4

C3242

R3251
10

R3250

5.1K

C3239

0.1uF

C3281

0.1uF

10uF

10V

5V_HDMI_4

R9531_XTAL_OUT

C3270
18pF
50V

SPI_CK_R9531

SPI_DI_R9531

UB98/UC9 only

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

TX0SDA

IC3302

D0+A
D0-A
D1+A
D1-A
D2+A
D2-A
D3+A
D3-A
NC_2
D0+B
D0-B
B1+B
B1-B
D2+B
D2-B
D3+B
D3-B

TX0SCL

SDA_B40SCL_B41SDA_A42SCL_A43[EP]GND

39

38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22

THERMAL

TI 2:1 Mux

HDMI0_TX2P
HDMI0_TX2N
HDMI0_TX1P
HDMI0_TX1N
HDMI0_TX0P
HDMI0_TX0N

HDMI0_TXCP

HDMI0_TXCN

HDMI_0_RX2+
HDMI_0_RX2­HDMI_0_RX1+
HDMI_0_RX1­HDMI_0_RX0+
HDMI_0_RX0-

HDMI_0_CLK+

HDMI_0_CLK-

From MN864778 From D13

TS3DV642A0RUAR

HDMI Splitter

IC3300 : HDMI412AD(3.0Gbps) -> select HDMI_Splitter_AD option.
HDX412BD(3.4Gbps) -> select HDMI_Splitter_BD option.

D1N144D1P145GND_846D2N147D2P148VDD_1049SW1/12C_ADR0

SW2/I2C_ADR1

EMP1/I2C_ADR2

EMP2/I2C_ADR3

GND_954DR55SEL156OE

VDD_1
GND_1

VDD_2

VDD_3

GND_2

[EP]GND

51

52

53

MS

1

THERMAL

2

57

3

D2P

4

D2N

5
6
7
8
9
10
11
12
13
14

15

VDD_4

16

SEL_OUT

ROUT_SEL

IC3300-*1

PI3HDX412BD

HDMI_Splitter_BD

17

18

19

VDD18

EQ2/SCL_CTL20SQ1/SDA_CTL

D1P
D1N
D0P
D0N

CLKP
CLKN

50

21

GND_322VDD_523GND_424VDD_625CLKN226CLKP227GND_5

HDMI_Splitter_CLK-

HDMI_Splitter_CLK+

HDMI_Splitter_RX0-

HDMI_Splitter_RX0+

HDMI_Splitter_RX1-

HDMI_Splitter_RX1+

HDMI_Splitter_RX2-

HDMI_Splitter_RX2+

43

VDD_9

42

D0P1

41

D0N1

40

GND_7

39

CLKP1

38

CLKN1

37

VDD_8

36

D2P2

35

D2N2

34

GND_6

33

D1P2

32

D1N2

31

VDD_7

30

D0P2

29

28

D0N2

MS

VCC

1

EN

2

SCL

3

SDA

4

D0+

5

D0-

6

D1+

7

D1-

8

NC_1

9

D2+

10

D2-

11

D3+

12

D3-

13

HPD

14

CEC

15

SEL1

16

SEL2

17

18

CEC_A19HPD_A20CEC_B21HPD_B

+3.3V_Pericom

S3

S2

HDMI0_DDC_DA
HDMI0_DDC_CK

+3.3V_MUX

MS
VDD_1
GND_1

D0+
D0-

VDD_2

D1+
D1­D2+
D2-

VDD_3

D3+
D3-

GND_2

3.3K

1
2
3
4
5
6
7
8
9
10
11
12
13
14

R3318

[EP]GND

15

VDD_4

OE

THERMAL

SEL_OUT

RXBSCL_U14
RXBSDA_U14

HDMI_Splitter_RX2+
HDMI_Splitter_RX2­HDMI_Splitter_RX1+
HDMI_Splitter_RX1­HDMI_Splitter_RX0+
HDMI_Splitter_RX0­HDMI_Splitter_CLK+
HDMI_Splitter_CLK-

HDMI_MUX_SEL

A1/S5

A2/S6

SEL_IN

A3/S7

Splitter_TEST_IN

A0/S4

57

IC3300

PI3HDMI412ADZBE

HDMI_Splitter_AD

16

17

18NC19

21

GND_322VDD_523GND_424VDD_6

SCL/S320SDA/S2

4.7uF

TEST_OUT

1K

R3305

C3313

HDMI_Splitter_BD

HDMI_Splitter_BD

C3301

0.1uF
16V

+3.3V_NORMAL

10K

R3319

25

D3-B26D3+B

C3300

10uF

10V

D1-A44D1+A45GND_1046D0-A47D0+A48VDD_849A0/S450A1/S551A2/S652A3/S753GND_1154TEST_IN55SEL_IN56OE

HDMI_Splitter_BD

43

42
41
40
39
38
37
36
35
34
33
32
31
30
29

27

28

HDMI_Splitter_BD

D2-B

GND_5

+3.3V_Pericom

C13455

0.1uF

GND_9
D2+A
D2-A
GND_8
D3+A
D3-A
VDD_7
D0+B
D0-B
GND_7
D1+B
D1-B
GND_6
D2+B

C13456

0.1uF

+3.3V_MUX

HDMI_1_RX2+
HDMI_1_RX2­HDMI_1_RX1+
HDMI_1_RX1­HDMI_1_RX0+
HDMI_1_RX0­HDMI_1_CLK+
HDMI_1_CLK-

R3342
0

HDMI_Splitter_AD

R3344
0

HDMI_Splitter_AD

R3345
0

HDMI_Splitter_BD

+3.3V_NORMAL

R3343 0

HDMI_Splitter_BD

+3.3V_Pericom

BLM18PG121SN1D

C3314
22uF
10V

L13413

+3.3V_MUX

HDMI1_TX2P
HDMI1_TX2N
HDMI1_TX1P
HDMI1_TX1N
HDMI1_TX0P
HDMI1_TX0N

HDMI1_TXCP

HDMI1_TXCN

IC3501

TS3DV642A0RUAR

HDMI_CLK-_U14_1

HDMI_CLK+_U14_1

HDMI_RX0-_U14_1

HDMI_RX0+_U14_1

HDMI_RX1-_U14_1

HDMI_RX1+_U14_1

HDMI_RX2-_U14_1

HDMI_RX2+_U14_1

HDMI OUTPUT to H13

HDMI_CLK-

HDMI_CLK+

HDMI_RX0-

HDMI_RX0+

HDMI_RX1-

HDMI_RX1+

HDMI_RX2-

HDMI_RX2+

TX1SDA

TX1SCL

SDA_B40SCL_B41SDA_A42SCL_A43[EP]GND

39

D0+A
D0-A
D1+A
D1-A
D2+A
D2-A
D3+A
D3-A
NC_2
D0+B
D0-B
B1+B
B1-B
D2+B
D2-B
D3+B
D3-B

38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22

THERMAL

10
11
12
13
14
15
16
17

18

VCC

1

EN

2

SCL

3

SDA

4

D0+

5

D0-

6

D1+

7

D1-

8

NC_1

9

D2+
D2­D3+
D3­HPD
CEC
SEL1
SEL2

CEC_A19HPD_A20CEC_B21HPD_B

HDMI OUTPUT to U14

+3.3V_NORMAL

Splitter_TEST_IN

I2C_SCL5

I2C_SDA5

MS : MODE SEL, 1:I2C control, 0:Pin control

SEL_IN : OUTPUT port SEL

OE : OUPUT Enable

TEST_IN : 1:splitter mode, 0:demux mode

HDMI1_DDC_DA
HDMI1_DDC_CK

+3.3V_MUX

3.3K

C3312
22uF
10V

MS

SEL_IN

OE

A3/S7

A2/S6

A1/S5

A0/S4

S3

S2

HDMI_Splitter_BD

R3300

HDMI_Splitter_BD

R3322

R3505

C3502

0.1uF
16V

RXASCL_U14
RXASDA_U14

HDMI_RX2+_U14_2
HDMI_RX2-_U14_2
HDMI_RX1+_U14_2
HDMI_RX1-_U14_2
HDMI_RX0+_U14_2
HDMI_RX0-_U14_2
HDMI_CLK+_U14_2
HDMI_CLK-_U14_2

+3.3V_NORMAL

R3509

HDMI_MUX_SEL

SEL2(GPIO30) Function

Low CH A (HEVC decoder) enable
High CH B (HDMI S/W) enable

L3300

BLM18PG121SN1D

C3302

C3303

R3323

R3324

0.1uF

16V

+3.3V_Pericom

R3325 10K

HDMI_Splitter_BD

0

0

10K

R3301

HDMI_Splitter_AD

C3304

0.1uF

16V

OPT

R3302 10K

R3303 10K

SEL_IN : S1

0

0

10uF
10V

HDMI_Splitter_AD

HDMI_Splitter_AD

PS8407

AZ1117EH-1.2TRG1

IN

3

+3.3V_PS8401

C3504

0.1uF

IC3502

R3501

4.7K
OPT

R3502

4.7K

+1.2V

1

ADJ/GND

R3506

4.7K

R3507

4.7K

OPT

2

L3501

120-ohm

OUT

R3508

4.7K

R3510

4.7K
OPT

+1.2V_PS8401

C3508

0.1uF

R3512

4.7K

R3513

4.7K

+1.2V

R3521
1

2.5V

ZD3500

C3513

C3512
10uF
10V

OPT

10uF
10V

+3.3V_PS8401

R3514

4.7K
OPT

R3515

4.7K

R3516

4.7K

R3517

4.7K

OPT

R3519

4.7K

OPT

OPT

R3520

4.7K

[EP]GND

1
2
3
4
5
6
7
8
9
10

11

VDD33_112VDDRX_1

+1.2V_PS8401

+3.3V_PS8401

THERMAL

41

IC3500

PS8401A

13

14

DDCBUF/SDA_CTL

DCIN_EN/SCL_CTL

DDCBUF

DCIN_EN

+3.3V_PS8401

+1.2V_PS8401

GND_1

C3506

0.1uF
16V

15

16

PRE

ISET

17

18

REXT

VDDRA

R3511

4.99K
1%

EQ/I2C_ADDR0

PRE

EQ/I2CADDR_0

+1.2V_PS8401

VDDTX_232SCL_SNK33SDA_SNK34ISET35GND_236PD37VDD33_238SCL_SRC39SDA_SRC40VDDRX_2

31

30
29
28
27
26
25
24
23
22
21

19

20

VDDTX_1

C3509

0.1uF

+1.2V_PS8401

+1.2V_PS8401

C3507

0.1uF
16V

OUT_D2P
OUT_D2N
HPD_SNK
OUT_D1P
OUT_D1N
OUT_D0P
OUT_D0N
CFG/I2C_ADDR1
OUT_CKP
OUT_CKN

16V

RP_HDMI_D2+
RP_HDMI_D2-

R3518 1K

RP_HDMI_D1+
RP_HDMI_D1­RP_HDMI_D0+
RP_HDMI_D0­CFG/I2C_ADDR1
RP_HDMI_CK+
RP_HDMI_CK-

C3511

0.1uF
16V

+5V_NORMAL

+3.3V_MUX

C3503

10uF

10V

HDMI_RX2+_U14_1
HDMI_RX2-_U14_1

R3500 1K

10K

+3.3V_Pericom

C3309

C3311

C3310

C3306

C3305

0.1uF

16V

R3304 10K

R3306 10K

HDMI_Splitter_BD

OPT

R3307 10K

HDMI_Splitter_AD

0.1uF

0.1uF

0.1uF

0.1uF
16V

16V

16V

16V

+3.3V_NORMAL

OPT

OPT

OPT

OPT

OPT

R3310 10K

R3314 10K

R3320 10K

R3316 10K

R3312 10K

R3308 10K

R3311 10K

R3309 10K

R3321 10K

R3313 10K

R3317 10K

R3315 10K

HDMI_RX1+_U14_1
HDMI_RX1-_U14_1
HDMI_RX0+_U14_1
HDMI_RX0-_U14_1

I2C_CTL_EN
HDMI_CLK+_U14_1
HDMI_CLK-_U14_1

OPT

C3500

0.1uF
16V

I2C_SCL2
I2C_SDA2

0.1uF

IN_D2P
IN_D2N

HPD_SRC

IN_D1P
IN_D1N
IN_D0P
IN_D0N

I2C_CTL_EN

IN_CKP
IN_CKN

C3505

16V

C3501

0.1uF
16V

R3504
22

R3503
22

OPT

OPT

+3.3V_NORMAL

C3307

10uF

10V

+3.3V_NORMAL

L3500

120-ohm

I2C_CTL_EN

DDCBUF

DCIN_EN

EQ/I2CADDR_0

CFG/I2C_ADDR1

PRE

ISET

VDDC15_M0

330pF

C3316

C3318

330pF

C3320

330pF

C3322

330pF

C3324

330pF

C3326

330pF

C3328

330pF

C3308

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

330pF

C3330

330pF

C3331

330pF

VDDC15_M1

C3315

330pF

C3317

H13 DDR VDD Decap

330pF

330pF

C3319

C3321

330pF

C3323

330pF

C3325

4Layer

330pF

C3327

330pF

C3329

330pF

D14 DDR VDD Decap (For EMI)

VDDC15_D14

330pF

330pF

330pF

OPT

OPT

OPT

C3333

C3334

C3335

C3332

4Layer

+1.5V_U_DDR

URSA9 DDR VDD Decap (For EMI)

330pF

330pF

OPT

OPT

C3336

C3337

330pF

330pF

330pF

OPT

OPT

OPT

C3339

C3338

C3340

330pF

330pF

330pF

330pF

330pF

OPT

OPT

OPT

OPT

OPT

C3341

C3343

C3344

C3342

C3345

4Layer

330pF

OPT

BSD-14Y-UD-033_01-HD

2013.12.17

HDMI

SPDIF OUT

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

SPDIF_OUT

R3400

+3.3V_NORMAL

33

C3402
47pF
50V

VA3400

5.5V

OPT

ADUC 5S 02 0R5L

C3400

0.1uF
16V

JK3401

JSTIB15

VIN

A

VCC

B

GND

C

Fiber Optic

4

SHIELD

HP_LOUT

HP_ROUT

R3404
150

1/10W
5%

R3405
150

1/10W
5%

HP_DET

HP_OUT

R3409
100

1/16W
5%

+3.3V_NORMAL

R3406

10K

HP_OUT

VA3405

5.6V

JK3403

PEJ038-3B61

5GND

4L

3DETECT

1R

EAG61030015

COMPONENT 1 PHONE JACK

JK3400

PEJ038-3B6111

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

EAG61030017

VA3401

5.6V

+3.3V_NORMAL

R3402
10K

OPT

C3401
18pF

R3407
100

1/16W
5%

COMP1_DET

COMP1_Y

COMP1_Pb

COMP1_Pr

CVBS 1 PHONE JACK

JK3402

PEJ038-3B611

5 M5_GND

4 M4

3 M3_DETECT

1 M1

6 M6

EAG61030016

VA3402

5.6V

VA3403

5.6V

VA3404

5.6V

+3.3V_NORMAL

R3403
330K

C3403

0.1uF
16V

for audio Hum noise (L)

C3405

0.01uF
25V

C3404

0.01uF
25V

R3408
100

1/16W
5%

AV1_CVBS_DET

COMP1/AV1/DVI_L_IN

COMP1/AV1/DVI_R_IN

AV1_CVBS_IN

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JACK HIGH/MID

BSD-14Y-UD-034-HD

2013.12.17

Place Near Micom

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LOGO_LIGHT

+3.5V_ST

10K

R4001

10K

LOGO_LIGHT

OPT

R4000

C4000

0.1uF
16V

LOGO_LIGHT

1K

R4002

LOGO_LIGHT

LOGO_LIGHT

B

Q4000
MMBT3904(NXP)

AR4001
33
1/16W

C

E

LOGO_LIGHT_WAFER

C4011
3300pF
50V

C4010

0.1uF

C4004

22uF

10V

L4000

BLM18PG121SN1D

+3.5V_WOL

For EMI(ready)

RCLAMP0502BA

RCLAMP0502BA

D4000

C4015

+3.3V_NORMAL

WIFI_DM

WIFI_DP

C4016
5pF
50V

5pF
50V

L4002

R4014

10K

120-ohm

WOL/WIFI_POWER_ON

M_REMOTE_CTS

M_RFModule_RESET

EYE_SDA

EYE_SCL

P13503

SMAW200-H28S5K

GND

1

WOL

3

GND

5

NC

RESET

KEY2

EYE_SCL

GND
CTS

GND

GND

7
9
11
13
15
17
19
21IR22
23
25NC26
27NC28

29

R13430
100

R13429
100

OPT

OPT

C4008

C4009

47pF

47pF

50V

50V

For EMI

R4010
100

EYE_Q

R4011
100

EYE_Q

IR

OPT

OPT

R4005

10K
5%

+3.5V_ST

VA4003
ADMC 5M 02 200L

VA4004
ADMC 5M 02 200L

C4006
100pF

NON_OLED

50V

VA4002

5.6V

NON_OLED

AMOTECH CO., LTD.

2
4
6

8
10
12
14
16
18
20

24

+3.5V_WOL
DN
DP
+3.3V_NORMAL
RTS
UART_RX_RF
UART_TX_RF
KEY1
+3.5V_ST
LOGO
GND
EYE_SDA
NC
NC

MAX 0.4A

For EMI

C4005
1000pF
50V

C4012
1000pF

50V

C4014

C4013

47pF

47pF

50V

50V

L4001

BLM18PG121SN1D

R4016

0

VA4001

5.6V

AMOTECH CO., LTD.

AR4000
100

1/16W

+3.5V_ST

LOGO_LIGHT_WAFER

C4001

0.1uF

R4009

10K

D4000-*1

RCLAMP0582B

+3.5V_ST

5%

R4008

R4006

10K
5%

100

RCLAMP0582B

M_REMOTE_RTS

M_REMOTE_RX

M_REMOTE_TX

KEY1

C4007

0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

VA4000

5.6V

AMOTECH CO., LTD.

C4002

0.1uF

R4007

100

KEY2

BSD-NC4_H040-HD

IR / KEY

2014.01.28

UB98/D9 only

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

From HUB

USB_Camera

P4200

3510-56216

+3.3V_NORMAL

BLM18PG121SN1D

L4200

120-ohm

C4200

1uF
25V

C4201

0.1uF

+3.3V_NORMAL

C4202

4.7uF

HUB_DM

HUB_DP

USB_DM3

USB_DP3

C4203

0.1uF

CAM_SLIDE_DET

To SoC

R421910K

R421810K

R4216

R4215100K

PGANG

23

GND_2

X-TAL_2

100K

PSELF

22

21

20

19

18

17

16

15

14

AVDD_3

DVDD

OVCUR3

OVCUR4

TEST/SCL

RESET

DP4

DM4

C4207

22pF

C4208

0.1uF

R42020

R42030

+3.3V_NORMAL

R4217

10K

USB_DP2

USB_DM2

1/16W

C4209

0.1uF

5%

/RST_HUB

OPT

OVCUR2

OVCUR1

SDA

V33

[EP]GND

24

25

26

1

2

3

4

5

6

7

R4214

1%

C4205

0.1uF

THERMAL

RREF

680

X-TAL_1

27V528

29

IC4200

GL852G-31

9

10X111X212

8

AVDD_2

X4200
12MHZ

1

GND_1

2

22pF

C4204

DM313DP3

C4206

0.1uF

4

3

DM0

DP0

R42000

R42010

DM1

DP1

AVDD_1

DM2

DP2

CAMERA_DM

CAMERA_DP

I2S_WOOFER

AUD_SCK

AUD_LRCK

I2S_AMP

From Micom

CAM_TRIGGER_DET

RCLAMP0502BA

D4200

RCLAMP0502BA

+3.5V_CAM

C4226

4.7uF
10V

RCLAMP0582B

D4200-*1

RCLAMP0582B

RCLAMP0502BA

D4201

RCLAMP0502BA

CAM_PWR_ON_CMD

RCLAMP0502BA

RCLAMP0502BA

CAM_RESET

CAM_SLEEP

RCLAMP0582B

D4201-*1

RCLAMP0582B

D4202

RCLAMP0582B

D4202-*1

RCLAMP0582B

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Camera Power CNT

+3.5V_CAM

C4210

4.7uF
10V

P4201

12507WR-04L

1

2

3

4

5

CAMERA POWER ENABLE CONTROL

+3.5V_ST

CAM_CTL

C4225

0.1uF

IN

EN

IC4201

AP2191WG-7

5

4

USB3_HUB

+3.5V_CAM

OUT

1

GND

2

FLG

3

BSD-14Y-UD-042-HD

2013.12.17

/USB_OCD1

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

USB_CTL1

R4400

10K

+3.3V_NORMAL

R4401

4.7K

OCP USB1

+5V_NORMAL

C4401

0.1uF
16V

VIN

GND

C4416

22uF

10V

+5V_USB_3

C4310

10uF

10V

ZD4302

5V

USB2 (2.0)

MAX 1.0A

D4300

RCLAMP0502BA

OPT

RCLAMP0502BA

D4300-*1

RCLAMP0582B

RCLAMP0582B

3AU04S -385-ZC -(L G).

JK4300

1234

USB DOWN STREAM

5

+5V_USB_2

+5V_USB_1

IC4400

BD2242G

1

2

EN

3

VOUT

6

ILIM

5

OC

4

1%

14K

R4402

USB3_3.3V

R4410

4.7K

OPT

R4412

4.7K

OPT

R4414

4.7K

OPT

R4416

4.7K

OPT

USB_DM2

USB_DP2

USB3_EN

C4414

22uF

10V

C4322

10uF

10V

USB3 (2.0)

MAX 1.0A

ZD4300

5V

RCLAMP0502BA

RCLAMP0502BA

D4302-*1

RCLAMP0582B

D4302

OPT

3AU04S -385-ZC -(L G).

RCLAMP0582B

JK4302

1234

USB DOWN STREAM

5

USB_DM3

USB_DP3

USB3.0 redriver IC EQ setting

-> EQ2: Low / DE1: Low

USB REDRIVER POWER ENABLE CONTROL

+3.3V_NORMAL

USB3.0_REDRIVER_PWR_CTL

USB3_EN

C4417

0.1uF

Non_USB3.0_REDRIVER_PWR_CTL

USB3.0_REDRIVER_PWR_CTL

IN

EN

10K

R4403

USB3.0_REDRIVER_PWR_CTL

L4400

BLM18PG121SN1D

IC4401

AP2191WG-7

5

4

USB3_TX0P

USB3_TX0M

USB3_RX0P

USB3_RX0M

OUT

1

GND

2

FLG

3

C4407

0.1uF

USB3_3.3V

C4409

0.1uF

HOST_RX1-

HOST_RX1+

GND_2

HOST_TX2-

HOST_TX2+

NC_6

[EP]GND

USB3_3.3V

C4400
1uF

EN_RXD

NC_5

18

19

20

21

22

23

THERMAL

24

1

NC_1

NC_2

USB3_3.3V

C4403
1uF

17

25

2

OS1

16

IC4402

3

VCC_1

C4404

0.1uF

DE1

DE2

VCC_2

EQ1

13

14

15

12

NC_4

11

DEVICE_TX1-

10

DEVICE_TX1+

9

GND_1

8

5

6

NC_3

DEVICE_RX2-

7

DEVICE_RX2+

USB3_3.3V

C4406
1uF

SN65LVPE502A

4

EQ2

C4405

0.01uF

USB3_3.3V

OPT

R4404

4.7K

R4405

4.7K

C4408
1uF

0.1uF
C4412

USB3_3.3V

OPT

R4406

4.7K

OPT

R4407

4.7K

R4411

C4413

0.1uF

C4410

0.1uF

4.7K

R4413

4.7K

OPT

C4411

0.01uF

R4415

4.7K

OPT

R4417

4.7K

OPT

USB3_DM

USB3_DP

R4408

R4409 0

0

D4400

RCLAMP0502BA

RCLAMP0502BA

C4415
22uF

10V

OPT

D4401

RCLAMP0502BA

RCLAMP0502BA

ZD4301
C4402
10uF
10V

D4402

RCLAMP0502BA

RCLAMP0502BA

+5V_USB_1

5V

OPT

D4400-*1

RCLAMP0582B

RCLAMP0582B

USB1 (3.0)

MAX 1.2A

STDA_SSRX-

STDA_SSRX+

GND_DRAIN

STDA_SSTX-

STDA_SSTX+

D4401-*1

RCLAMP0582B

RCLAMP0582B

D4402-*1

RCLAMP0582B

RCLAMP0582B

PC2R009NJA1.

VBUS

D-

D+

GND

SHIELD

JK4400

1

2

3

4

5

6

7

8

9

10

Place under DUT Near SN65LVPE502CP PIN VCC

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-044-HD

2013-12-17

USB JACK

Full Scart(18 Pin Gender)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

VA4801

5.6V
EU

VA4807

VA4800
20V

EU

5.5V
EU

VA4808

5.5V
OPT

VA4804

5.5V
EU

VA4805

5.5V
EU

VA4802

5.6V

VA4803

5.5V
EU

19

DA1R018H91E

JK4800

EU

SHIELD

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

AV_DET

COM_GND

SYNC_IN

SYNC_OUT

SYNC_GND

RGB_IO

R_OUT

R_GND

G_OUT

G_GND

ID

B_OUT

AUDIO_L_IN

B_GND

AUDIO_GND

AUDIO_L_OUT

AUDIO_R_IN

AUDIO_R_OUT

+3.3V_NORMAL

EU

R4801

CLOSE TO JUNCTION

10K

EU
R4802

100

1/16W

EU

5%

C4804

0.1uF

SC_CVBS_IN

R480075

EU

EU

VA4809

5.6V
EU

SC_FB

SC_R

SC_G

SC_B

SC_L_IN

SC_DET

DTV/MNT_V_OUT

SC_ID

VA4806

5.6V
EU

BLM18PG121SN1D

EU

EU
C4800
1000pF
50V

BLM18PG121SN1D

EU

EU
C4801
1000pF
50V

L4800

L4801

C4802
4700pF

EU

C4803
4700pF

EU

SC_R_IN

DTV/MNT_L_OUT

DTV/MNT_R_OUT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-048-HD

2013.12.17

SCART GENDER

Ethernet Block

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LAN_JACK_POWER

JK5100

BS-R570098

LAN_UDE

12

SHIELD

10

11

D1

D2

D3

D4

1

2

3

4

5

6

7

8

9

P1[CT]

P2[TD+]

P3[TD-]

P4[RD+]

P5[RD-]

P6[CT]

P7

P8

9

P10[GND]

P11

YL_C

YL_A

GN_C

GN_A

R5100
0

C5100

C5101

0.1uF

0.01uF

16V

50V

VA5100

5.5V

EMI

C5102

0.1uF
16V

VA5101

5.5V

C5103

0.01uF
50V

VA5102

5.5V

VA5103

5.5V

EPHY_TDP

EPHY_TDN

EPHY_RDP

EPHY_RDN

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JK5100-*1
TLA-6T764

LAN_TDK

R1

1

R2

2

R3

3

R4

4

R5

5

R6

6

R7

7

R8

8

R9

9

R10[GND]

10

R11

11

YL_C

D1

YL_A

D2

GN_C

D3

GN_A

D4

12

SHIELD

BSD-14Y-UD-051-HD

LAN_VERTICAL

2012.12.17

51

Ethernet Block

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.5V_WOL

3.3K

+3.5V_WOL

5V

ZD5201

OPT

LAN_JACK_POWER

C5203

C5201

C5200

4.7uF
10V

Place 0.1uF close to each power pins

0.1uF
16V

EPHY_RDP

EPHY_RDN

EPHY_TDP

EPHY_TDN

0.1uF
16V

Route Single 50 Ohm, Differential 100 Ohm

ET_COL/SNI

Place this cap. near IC

C5205

0.1uF
16V

Place this Res. near IC

+3.5V_WOL

R5203

3.3K

C5206
8pF
50V

R5204

2.49K 1%

GND_1

1

2

4

3

XTAL_2

C5207
8pF

50V

AVDD10OUT

+3.5V_WOL

XTAL_1

X5200

25MHz

GND_2

RSET

MDI+[0]

MDI-[0]

MDI+[1]

MDI-[1]

AVDD33_1

RXDV

3.3K

R5200

R52021M

OPT

[EP]

1

2

3

4

5

6

7

8

Place this cap. near IC

C5208

0.1uF
16V

+3.5V_WOL

R5218

0

DVDD10OUT

AVDD33_2

CKXTAL1

CKXTAL2

29

30

31

32

THERMAL

33

IC5200

RTL8201F-VB-CG

9

11

12

13

RXD[2]/INTB

AR5200

33

R5201 33

EPHY_INT

EPHY_RXD1

EPHY_RXD0

RXC

RXD[3]/CLK_CTL

OPT

3.3K

R5208

RXD[0]10RXD[1]

ET_RXER

ET_COL/SNI

COL28RXER/FXEN

27

14

DVDD33

C5209

33pF

C5202

5pF

EPHY_CRS_DV

EPHY_ACTIVITY

R521033

LED1/PHYAD[1]

CRS/CRS_DV

25

26

24

23

22

21

20

19

18

17

15

16

TXC

TXD[0]

R5209

51

EPHY_TXD0

Place near IC

LED0/PHYAD[0]/PMEB

MDIO

MDC

PHYRSTB

TXEN

TXD[3]

TXD[2]

TXD[1]

+3.5V_WOL

C5211

0.1uF
16V

R5215

3.3K

R5217

EPHY_EN

EPHY_TXD1

R5205

+3.5V_WOL

3.3K

R5212

1.5K

1/16W

EPHY_ACTIVITY

ET_RXER

1%

R5219

10K

1/16W

C5212

0.1uF
OPT

5%

WOL/ETH_POWER_ON

EPHY_MDIO

EPHY_MDC

/RST_PHY

(from SOC)

WOL POWER ENABLE CONTROL

+3.5V_ST

C5204

0.1uF

WOL_CTL

R5211 33

R5213
10K

OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IN

EN

AP2191WG-7

5

4

IC5201

+3.5V_WOL

OUT

1

GND

2

FLG

3

EPHY_REFCLK

BSD-14Y-UD-052-HD

2013-12-17

ETHERNET

Front speaker(EC97 Only)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V_NORMAL

R5613

AMP_RESET_N

AUD_MASTER_CLK

NC_1

NC_2

GND
NC_3
DVDD

SDATA

WCK

BCK

SDA

100

1/16W

C5627
1000pF
50V

VDD_IO

[EP]GND

40

1
2

THERMAL

3
4
5
6
7
8
9
10

11

SCL

R5614

4.7K

AD

CLK_I

GND_IO

37

38

39

41

NTP7514

12

13

14

FAULT

MONITOR_0

MONITOR_1

50V

C5606

22000pF

BST1A

RESET

35

36

IC5600

0x54

15

16

BST2B

MONITOR_2

C5607

22000pF

50V

I2S_AMP

OUT1A

PGND1A

33

34

17

18

OUT2B

PGND2B

+24V_AMP

PVDD1B

PVDD1A

31

32

30
29
28
27
26
25
24
23
22
21

19

PVDD2B20PVDD2A

From DACLRCH

AMP_MUTE

+24V

AUD_LRCH

AUD_LRCK

I2C_SDA2

I2C_SCL2

L5600

UBW2012-121F

AUD_SCK

R5600

10K

+24V_AMP

+3.3V_NORMAL

R5601

10K

C

B

Q5600

MMBT3904(NXP)

E

R5602
100

R5603
100

R5604

100

C5600

1000pF

L5601

BLM18PG121SN1D

C5626

10uF
10V

C5605

0.1uF
16V

VDD_PLL

C5603

1uF

10V

C5604
1uF
10V

C5601
33pF
50V

50V

C5602
33pF
50V

C5608
10uF
35V

OUT1B
PGND1B
BST1B
VDR1
NC_4
AGND
VDR2
BST2A
PGND2A
OUT2A

+24V_AMP

C5609
10uF
35V

C5624

0.1uF
50V

C5625

0.1uF
50V

C5610
22000pF

50V

C5611
22000pF
50V

C56 12
1uF
10V

C5613
1uF
10V

R5605

5.6
1/10W

C5614
390pF

50V

C5615
390pF

50V

R5606

5.6
1/10W

R5607

5.6

1/10W

C5616
390pF
50V

C5617
390pF
50V

R5608

5.6

1/10W

L5602

10.0uH

NRS6045T100MMGK

L5605

10.0uH

NRS6045T100MMGK

L5603

10.0uH

NRS6045T100MMGK

L5604

10.0uH

NRS6045T100MMGK

C5618

0.47uF
50V

C5619

0.47uF

50V

C5620

0.1uF
50V

C5621

0.1uF
50V

C5622

0.1uF
50V

C5623

0.1uF

50V

R5609

4.7K

R5610

4.7K

R5611

4.7K

R5612

4.7K

SPK_L+

SPEAKER_L

SPK_L-

SPK_R+

SPEAKER_R

SPK_R-

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

WOOFER_MUTE

SPK_L+

SPK_L-

SPK_R+

SPK_R-

W_SPK_L+

W_SPK_L-

W_SPK_R+

W_SPK_R-

8

7

6

5

4

3

2

1

SMAW250-08

P5600

Woofer speaker(EC97 ONLY)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V_NORMAL

+3.3V_NORMAL

R5812

AMP_RESET_N

AUD_MASTER_CLK

NC_1

NC_2

GND
NC_3
DVDD

SDATA

WCK

BCK

SDA

100

1/16W

C5826
1000pF
50V

VDD_IO

[EP]GND

40

1
2

THERMAL

3
4
5
6
7
8
9
10

11

SCL

R5813

4.7K

R58 104. 7K

AD

CLK_I

GND_IO

37

38

39

41

NTP7514

12

13

14

FAULT

MONITOR_0

MONITOR_1

50V

C5805

BST1A

RESET

35

36

IC5800

0x56

15

16

BST2B

MONITOR_2

C5806

22000pF

50V

22000pF

OUT1A

PGND1A

33

34

17

18

OUT2B

PGND2B

+24V_AMP_HEIGHT

PVDD1B

PVDD1A

31

32

30
29
28
27
26
25
24
23
22
21

19

PVDD2B20PVDD2A

From DACLRCH

+24V +24V_AMP_HEIGHT

L5800

UBW2012-121F

AUD_LRCH1

AUD_LRCH

AUD_LRCK

AUD_SCK

I2C_SDA2

I2C_SCL2

WOOFER_MUTE

0

0

R5814

R5815

I2S_4CH

I2S_2CH

R5800
100

R5801
100

C5800
33pF
50V

C5801
33pF
50V

C5802

1uF

10V

C5825

BLM18PG121SN1D

10uF
10V

C5803
1uF
10V

L5801

C5804

0.1uF
16V

VDD_PLL

C5823

C5807

0.1uF

10uF

50V

35V

OUT1B
PGND1B
BST1B
VDR1
NC_4
AGND
VDR2
BST2A
PGND2A
OUT2A

+24V_AMP_HEIGHT

C5808
10uF
35V

C5824

0.1uF
50V

C5809
22000pF
50V

C5810
22000pF
50V

C58 11
1uF
10V

C5812
1uF
10V

R5802

5.6
1/10W

C5813
390pF

50V

C5814
390pF

50V

R5803

5.6
1/10W

R5804

5.6

1/10W

C5815
390pF
50V

C5816
390pF
50V

R5805

5.6

1/10W

L5802

10.0uH

NRS6045T100MMGK

L5805

10.0uH

NRS6045T100MMGK

L5803

10.0uH

NRS6045T100MMGK

L5804

10.0uH

NRS6045T100MMGK

C5817

0.47uF
50V

C5818

0.47uF
50V

C5819

0.1uF
50V

C5820

0.1uF
50V

C5821

0.1uF
50V

C5822

0.1uF

50V

R5806

4.7K

R5807

4.7K

R5808

4.7K

R5809

4.7K

W_SPK_L+

WOOFER_L

W_SPK_L-

W_SPK_R+

WOOFER_R

W_SPK_R-

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

I2S_WOOFER

AUD_OUT >> EU/CHINA_HOTEL_OPT

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

DTV/MNT_L_OUT

1uF
25V

EU

C6000

OPT
C6002
6800pF

EU

R60002.2K

R6002

OPT

470K

SCART_AMP_L_FB

SCART_Lout

33pF

+12V

EU

IC6000

AZ4580MTR-E1

EU

VCC

8

OUT2

7

IN2-

6

IN2+

5

OUT1

EU

R600433K

C6003

EU

IN1-

IN1+

1

2

3

VEE

4

L6000

EU

C6004

0.1uF
50V

SIGN60000003

EU

R6008 33K

C6005

EU

33pF

SCART_AMP_R_FB

SCART_Rout

OPT

R6010
470K

R6011

OPT
C6007
6800pF

2.2K

EU

C6008

1uF
25V

EU

DTV/MNT_R_OUT

[SCART AUDIO MUTE]

DTV/MNT_L_OUT

Q6000

MMBT3904(NXP)

DTV/MNT_R_OUT

Q6001

MMBT3904(NXP)

C

E

C

E

EU

R6013

1K

B

EU

EU

R6014

1K

B

EU

EU_SCART_MUTE_ISAHAYA

Q6002
RT1P141C-T112

E

C

B

SCART_MUTE

PDTA114ET

Q6002-*1

E

C

B

EU_SCART_MUTE_NXP

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SCART AUDIO AMP

BSD-14Y-UD-060-HD

2012.12.17

60

EARPHONE AMP

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

HP_OUT_H13

C6104-*1

18pF

IC6100

TPA6138A2

HP_OUT_H13

C6109-*1
18pF

HP_ROUT_MAIN

HP_OUT_H13

R6103-*1
43K

1%

C6100
1uF
10V

HP_OUT

HP_ROUT_AMP

SIDE_HP_MUTE

HP_OUT

R6100
10K

C6104

180pF

R6103

33K

HP_OUT_MTK

HP_OUT_MTK

HP_OUT

R6106
43K

+3.3V_NORMAL

4.7K

R6105

HP_OUT

+INR

1

C6108
10pF
50V

C6102
1uF
10V

-INR

OUTR

GND_1

MUTE

VSS

2

3

4

5

6

CN

7

C6103
1uF

HP_OUT

HP_OUT

1%

HP_OUT

10V

+INL

14

-INL

13

12

11

10

HP_OUT

OUTL

UVP

GND_2

VDD

9

CP

8

C6106
10pF
50V

HP_OUT_MTK

HP_OUT

R6104
43K

1%

+3.3V_NORMAL

HP_OUT

HP_OUT

C6109
180pF

R6102

33K

HP_OUT_MTK

L6100

120-ohm

BLM18P G121SN1 D

HP_OUT

C6105

1uF

10V

C6107

0.1uF

16V

HP_OUT
R6101
10K

C6101
1uF
10V

HP_OUT

HP_LOUT_AMP

HP_LOUT_MAIN

HP_OUT_H13

R6102-*1
43K

1%

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

HEADPHONE AMP

BSD-14Y-UD-061-HD

2013.12.17

61

B-CAS (SMART CARD) INTERFACE

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]

JAPAN

R6300 22

+3.3V_NORMAL

2.7K
R6303

R6301

JAPAN

OPT

R6304

R6302

OPT

2.7K
JAPAN

R6305

R6306

CLKDIV1 CLKDIV2 : F_CRD_CLK

2.7K

----------------------------­ 1 0 CLKIN

JAPAN

+5V_NORMAL

OPT

BLM18PG121SN1D

JAPAN

C6300

0.1uF
16V

JAPAN

L6300

SIGN63000018

JAPAN

C6301

10uF
10V

C6302

0.1uF

INT CMDVCC : STATUS

+3.3V_NORMAL

IC6300

TDA8024TT

CLKDIV1

1

CLKDIV2

2

5V/3V

3

PGND

4

S2

5

VDDP

PRES

PRES

AUX2

AUX1

CGND

6

S1

7

VUP

I/O

JAPAN

8

9

10

11

12

13

14

JAPAN

C6303

0.1uF
16V

JAPAN

16V

AUX2UC

28

AUX1UC

27

I/OUC

26

XTAL2

25

XTAL1

24

OFF

23

GND

22

VDD

21

RSTIN

20

CMDVCC

19

PORADJ

18

VCC

17

RST

16

CLK

15

C6304

0.1uF

JAPAN

16V

JAPAN

R6307 22

JAPAN

R6308 22

JAPAN

R6309 22

JAPAN

R6310 22

JAPAN

R6311 22

Place CLK C3 far from C2,C7,C4 and C8

75 ohm in I/O is for short circuit Protection

OPT

JAPAN

R6317

1.2K

L6301

JAPAN

BLM18PG121SN1D

JAPAN
C6305

0.1uF
16V

JAPAN

JAPAN

R6318

1.2K

R6315

JAPAN

C6306

0.1uF

16V

+3.3V_NORMAL

10K

R6312

1.2K

JAPAN

R6313
75

OPT

R6319

1.2K

JAPAN

R6316

1.2K

+3.3V_NORMAL

JAPAN

C6307

0.33uF
16V

JAPAN

R6314
1K

ZD6300

5V

JAPAN

SMARTCARD_DATA/SD_EMMC_CLK

SMARTCARD_CLK/SD_EMMC_DATA[0]

SMARTCARD_DET/SD_EMMC_DATA[3]

SMARTCARD_RST/SD_EMMC_DATA[2]

B-CAS SLOT

P6300

10057542-1311FLF(B CAS Slot)

VCC

C1

RST

C2

CLK

C3

RESERVED_1

C4

GND

C5

JAPAN

VPP

C6

I/O

C7

RESERVED

C8

SW1

S1

SW2

S2

ZD6301
5V

JAPAN

--------------------------------­ HIGH HIGH CARD PRESENT
LOW HIGH CARD not PRESENT

SMARTCARD_VCC/SD_EMMC_CMD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

JAPAN_BCAS

BSD-14Y-UD-063-HD

2012.12.17

63

1

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

2

+3.3V_LNA_TU

RF_SWITCH_CTL_TU

L6500

BLM18PG121SN1D

C6519

0.1uF
TU_M/W_CN/HK/TW/CO/BR

+3.3V_TU

close to TUNER

TU_M/W_CN/HK/TW/CO/BR

R6502

C6502

10K

0.1uF

1K

R6504

TU_M/W_CN/HK/TW/CO/BR

1. should be guarded by ground

2. No via on both of them

3. Signal Width >= 12mils
Signal to Signal Width = 12mils

RF_SWITCH_CTL

Ground Width >= 24mils

FE_DEMOD1_2_TS_DATA[0]

FE_DEMOD1_TS_DATA[7]

Global F/E Option Name

1. TU

2. Tuner Name = TDS’S’,TDS’Q’...

3. Country Name = T,T2,S2,KR,US,BR ...

Example of Option name

TU_Q_T2 = apply TDSQ type tuner and T2 country
TU_M/W = apply TDSM&TDSW Type Tuner

13’ Tuner Type for Global
TDS’S’-G501D : T/C Half NIM Horizontal Type
TDS’Q’-G501D : T/C/S2 Combo Horizontal type
TDS’Q’-G601D : T2/C/S2 Combo Horizontal Type
TDS’Q’-G651D : T2/C/S2 Combo Vertical Type
TDS’M’-C601D : China NIM with Isolater Type
TDS’W’-J551F : Japan Dual NIM
TDS’W’-B651F : Brazil 2Tuner
TDS’W’-A651F : Taiwan 2Tuner
TDS’W’-K651F : Colombia DVB-T2 2Tuner

FE_DEMOD1_2_TS_CLK

R6511 0

TU_W_AJ

R6521 0

TU_W_Non_AJ

3

4

5

6

7

8

9

11

FE_DEMOD1_TS_ERROR

12

FE_DEMOD1_1_TS_CLK

14

FE_DEMOD1_TS_SYNC

15

FE_DEMOD1_TS_VAL

16

FE_DEMOD1_1_TS_DATA[0]

17

FE_DEMOD1_TS_DATA[1]

18

FE_DEMOD1_TS_DATA[2]

19

FE_DEMOD1_TS_DATA[3]

20

FE_DEMOD1_TS_DATA[4]

21

FE_DEMOD1_TS_DATA[5]

22

FE_DEMOD1_TS_DATA[6]

23

FE_DEMOD1_TS_DATA[7]

24

25

26

/TU_RESET1_TU

+3.3V_DEMOD_TU

27

28

D_Demod_Core

29

30

31

FE_DEMOD2_TS_ERROR

34

FE_DEMOD2_TS_SYNC

36

FE_DEMOD2_TS_CLK_TU

37

38

FE_DEMOD2_TS_VAL

39

FE_DEMOD2_TS_DATA

40

45

/TU_RESET2_TU

IF_AGC_TU

I2C_SCL6_TU

I2C_SDA6_TU

IF_P_TU

IF_N_TU

TU_CVBS_TU

TU_SIF_TU

+3.3V_TUNER

I2C_SCL4_TU

LNB_TX

I2C_SDA4_TU

LNB_OUT

+2.5V_DEMOD

TU_ALL_IntDemod

R6516 10

TU_ALL_IntDemod

TU_M

R6514 0

R6512 0

TU_W

R6513 0

TU_M // W_AJ

TU_ALL_IntDemod

C6500

close to Tuner

0.1uF

16V

TU_M/W_EU/CN/HK/JP

C6503
15pF

TU_M/W_EU/CN/HK/JP
50V
OPT

C6501
15pF
50V

OPT

should be guarded by ground,Match GND VIA

R6517 10

TU_W_AJ

R6518 0

FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]

FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]

FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]

C6504

0.1uF

LNB_TX

TU_M/W

FE_DEMOD2_TS_ERROR

FE_DEMOD2_TS_SYNC

R6522 0

FE_DEMOD2_TS_CLK

FE_DEMOD2_TS_VAL

FE_DEMOD2_TS_DATA

R6503

100

TU_ALL_IntDemod

R6515 33

R6510 33

I2C_SCL6

I2C_SDA6

IF_P

IF_N

TU_SIF

R6518-*1

150
TU_H/M/W_KR/US/EU/CN/HK/TW/CO/BR

L6505

BLM18PG121SN1D

TU_M/W

C6507

16V

0.1uF
TU_W

BLM18PG121SN1D

C6518

0.1uF

TU_W_JP

R6501
100

TU_W

Demod_Core

C6520

0.1uF
LNB

L6506

TU_W_JP

/TU_RESET2

R6515-*1
200

TU_H/M/W_KR/US/TW/CO/BR

R6510-*1
200

TU_H/M/W_KR/US/TW/CO/BR

R6515-*2
300

TU_W_AJ
R6510-*2

300
TU_W_AJ

FE_DEMOD1_TS_ERROR

FE_DEMOD1_TS_CLK

FE_DEMOD1_TS_SYNC

FE_DEMOD1_TS_VAL

FE_DEMOD1_TS_DATA[0]

FE_DEMOD1_TS_DATA[1-7]

TU_M/W

R6520
33

C6512
15pF
50V
OPT

LNB_OUT

C6521
18pF

LNB

+2.5V_Normal

IF_AGC

BLM18PG121SN1D

C6509

0.1uF

TU_M/W

I2C_SCL4

C6511
15pF
50V

OPT

TU_M/W
R6519
33

TU_M/W

L6501

BLM18PG121SN1D

C6510

0.1uF
TU_M/W

I2C_SDA4

TU_ALL_2178B

+3.3V_TU

L6503

TU_M/W

C6516

0.1uF
16V

TU_ALL_2178B

+3.3V_TU

+3.3V_TU

L6504

TU_ALL_2178B

BLM18PG121SN1D

R6505
200

E

B

MMBT3906(NXP)

C

TU_M/W_NonBr

C6505

16V

0.1uF
TU_M/W_NonBr

R6506

200

TU_ALL_2178B

Q6500

R6500
100

1608 perallel
because of derating

TU_ALL_2178B

TU_CVBS

/TU_RESET1

+3.3V_NORMAL

TU_M/W

C6517

0.1uF
16V

+5V_NORMAL

TU_M/W
C6508
1uF

TU_M/W

C6513

0.1uF

+3.3V_NORMAL

L6502

C6506

22uF

10V

85C

AP2132MP-2.5TRG1

PG

TU_M/W

EN

R6507
10K

VIN

VCTRL

BLM18PG121SN1D

C6515

0.1uF
16V

TU_M/W

IC6500

1

9

2

THERMAL

3

4

2A

EAN61387601

+3.3V_TU

8

7

6

5

Vout=0.6*(1+R1/R2)

[EP]

GND

ADJ

VOUT

NC

T2 : Max 1.7A

else : Max 0.7A

R6508

10K

1/16W

1%

R2

TU_M/W_1.2V

R1

R6509

10K

1/16W

1%

TU_M/W_1.2V

Demod_Core

R6508-*1

18K

TU_M/W_1.1V

R6509-*1

16K

TU_M/W_1.1V

TU_M/W
C6514
10uF
10V

1/16W

1/16W

1%

1%

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TUNER

BSD-14Y-UD-065-HD

2013.12.17

65

TDJW_A152D

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

TU6800
TDJW-A152D

TDJW-J251F

TU6700
TDJW-J251F

TDJM_G251D

TU6707
TDJM-G251D

TDJM_H151F

TU6701
TDJM-H151F

TDJH_H251F

TU6703
TDJH-H251F

B1[+3.3V]

1

NC_1

2

NC_2

3

SCL_RF

4

SDA_RF

5

NC_3

6

NC_4

7

M_SIF

8

M_CVBS

9

NC_5

10

B2[+3.3V]

11

NC_6

12

GROUND_1

13

M_RESET_DEMOD

25

B3[+3.3V]

26

SCL_DEMOD

27

B4[+1.2V]

28

NC_7

29

SDA_DEMOD

30

1

2

3

4

5

6

7

8

9

10

11

12

13

25

26

27

28

29

30

31

32

NC_8

33

M_ERROR

34

GROUND_2

35

M_SYNC

36

M_MCLK

37

NC_9

38

M_VALID

39

M_DATA

40

S_ERROR

41

S_SYNC

42

S_MCLK

43

S_VALID

44

S_RESET_DEMOD

45

S_DATA_7

46

S_DATA_0

47

S_DATA_1

48

S_DATA_2

49

S_DATA_3

50

S_DATA_4

51

S_DATA_5

52

S_DATA_6

53

A1

A1

B1

B1

FE_DEMOD1_1_TS_DATA[0]

FE_DEMOD1_TS_DATA[1]

FE_DEMOD1_TS_DATA[2]

FE_DEMOD1_TS_DATA[3]

FE_DEMOD1_TS_DATA[4]

FE_DEMOD1_TS_DATA[5]

FE_DEMOD1_TS_DATA[6]

TU_GND_A

A1

A1

33

34

35

36

37

38

39

40

41

42

43

44

45

46

B1

47

SHIELD

54

SHIELD

TU_GND_A

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

TU_GND_B

Temporary Page: For EU S4

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

B1[+3.3V]

NC_1

NC_2

SCL_RF

SDA_RF

NC_3

NC_4

NC_5

NC_6

NC_7

B2[+3.3V]

NC_8

GND_1

M_RESET_DEMOD

B3[+3.3V]

SCL_DEMOD

B4[+1.2V]

NC_9

SDA_DEMOD

LNB

GND_2

NC_10

M_ERROR

GND_3

M_SYNC

M_MCLK

B5[+2.5V]

M_VALID

M_DATA

S_ERROR

S_SYNC

S_MCLK

S_VALID

S_RESET_DEMOD

S_DATA

B1

TU_GND_B

FE_DEMOD2_TS_ERROR

FE_DEMOD2_TS_SYNC

FE_DEMOD2_TS_CLK_TU

+2.5V_DEMOD

FE_DEMOD2_TS_VAL

FE_DEMOD2_TS_DATA

FE_DEMOD1_TS_ERROR

FE_DEMOD1_TS_SYNC

FE_DEMOD1_2_TS_CLK

FE_DEMOD1_TS_VAL

/TU_RESET2_TU

FE_DEMOD1_2_TS_DATA[0]

TU_GND_A

C6704

3300pF

630V

TU_M/W_EU/JP

A1

A1

C6702

1000pF

630V

TU_M/W_EU/JP

C6700-*1

3300pF

TU_M_CN/HK

47

SHIELD

C6700

1000pF

630V

TU_W_TW/CO/BR/JP

630V

B1[+3.3V]

1

NC_1

2

NC_2

3

SCL_RF

4

SDA_RF

5

NC_3

6

NC_4

7

SIF

8

CVBS

9

NC_5

10

B2[+3.3V]

11

ERROR

12

GND_1

13

MCLK

14

SYNC

15

VAILD

16

D0

17

D1

18

D2

19

D3

20

D4

21

D5

22

D6

23

D7

24

RESET_DEMOD

25

B3[+3.3V]

26

SCL_DEMOD

27

B4[+1.1V]

28

F22_OUTPUT

29

SDA_DEMOD

30

LNB

31

GND_2

32

B1

B1

R6702 0TU_H/M/W_KR/US/JP/EU

TU_GND_B

TU_M/W_EU/AJ_3300pF

C6708
3300pF

TU_GND_A

R6703 0

TU_H/M/W_KR/US/JP/EU

630V

TU_GND_B

C6701

C6703

1000pF

1000pF

630V

630V

TU_M/W_EU/JP

C6701-*1
3300pF
630V
TU_M_CN/HK

TU_H/M/W_KR/US/EU/AJ/JP/TW/CO/BR

URSA9 I2C cap. Ready

I2CS_SDA

I2CS_SCL

C15001

C15002

A1

TU_GND_A

TU_M/W_EU/AJ_3300pF

C6710

C6709

3300pF

3300pF

630V

630V

C6707
1000pF
630V
TU_W_JP

C6703-*1
3300pF
630V

TU_W_AJ_3300pF

C6703-*2

0.022uF
630V

TU_W_AJ_2.2nF

OPT

20pF

OPT

20pF

A1

47

SHIELD

TU_M/W_EU/AJ_3300pF

B1[+3.3V]

1

NC_1

2

M_DIF_AGC

3

SCL_RF

4

SDA_RF

5

M_DIF[P]

6

M_DIF[N]

7

S_SIF

8

S_CVBS

9

NC_2

10

B2[+3.3V]

11

S_ERROR

12

GND_1

13

S_MCLK

14

S_SYNC

15

S_VAILD

16

S_DATA

17

NC_3

18

NC_4

19

NC_5

20

NC_6

21

NC_7

22

NC_8

23

NC_9

24

S_RESET_DEMOD

25

B3[+3.3V]

26

SCL_DEMOD

27

B4[+1.1V]

28

NC_10

29

SDA_DEMOD

30

B1

B1

TU_GND_B

TU_GND_B

TU_GND_A

TU_GND_B

EMS_S4_GND_Connection

R6701

0

GND_3

for tuner EMS (S4) testing

+3.3V_TUNER

FE_DEMOD1_TS_ERROR

FE_DEMOD1_1_TS_CLK

FE_DEMOD1_TS_SYNC

FE_DEMOD1_TS_VAL

FE_DEMOD1_1_TS_DATA[0]

FE_DEMOD1_TS_DATA[1]

FE_DEMOD1_TS_DATA[2]

FE_DEMOD1_TS_DATA[3]

FE_DEMOD1_TS_DATA[4]

FE_DEMOD1_TS_DATA[5]

FE_DEMOD1_TS_DATA[6]

FE_DEMOD1_TS_DATA[7]

/TU_RESET1_TU

+3.3V_DEMOD_TU

I2C_SCL4_TU

D_Demod_Core

LNB_TX

I2C_SDA4_TU

LNB_OUT

TU6701-*1
TDJM-C351D

TDJM_C351D

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

A1

B1B1A1

47

SHIELD

B1[+3.3V]

RF_SW_CTL

NC_1

SCL_RF

SDA_RF

NC_2

NC_3

SIF

CVBS

NC_4

NC_5

ERROR

GND_1

MCLK

SYNC

VAILD

D0

D1

D2

D3

D4

D5

D6

D7

RESET_DEMOD

B2[+3.3V]

SCL_DEMOD

B3[+1.1V]

NC_6

SDA_DEMOD

TU_GND_A

TDJW_K152F

A1

47

TU_SYMBOL_EU

SHIELD

A1

TU6800-*1
TDJW-K152F

B1[+3.3V]

1

SWITCH_CTR

2

NC_1

3

SCL_RF

4

SDA_RF

5

NC_2

6

NC_3

7

S_SIF

8

S_CVBS

9

NC_4

10

B2[+3.3V]

11

NC_5

12

GND_1

13

M_RESET_DEMOD

25

B3[+3.3V]

26

SCL_DEMOD

27

B4[+1.2V]

28

NC_6

29

SDA_DEMOD

30

NC_7

33

M_ERROR

34

GND_2

35

M_SYNC

36

M_MCLK

37

NC_8

38

M_VALID

39

M_DATA

40

S_ERROR

41

S_SYNC

42

S_MCLK

43

S_VALID

44

S_RESET_DEMOD

45

S_DATA

46

B1B1A1

B1[+3.3V]

1

NC

2

DIF_AGC

3

SCL

4

SDA

5

DIF[P]

6

DIF[N]

7

SIF

8

CVBS

9

A1

B1

B1

47

SHIELD

TU6800-*2
TDJW-H151F

DEV_KR_T2

B1[+3.3V]

1

NC_1

2

M_DIF_AGC

3

SCL_RF

4

SDA_RF

5

M_DIF[P]

6

M_DIF[N]

7

S_SIF

8

S_CVBS

9

NC_2

10

B2[+3.3V]

11

NC_3

12

GND_1

13

RESET1_DEMOD

25

B3[+3.3V]

26

SCL_DEMOD

27

B4[+1.1V]

28

NC_4

29

SDA_DEMOD

30

NC_5

33

NC_6

34

GND_2

35

NC_7

36

NC_8

37

NC_9

38

NC_10

39

NC_11

40

ERROR

41

SYNC

42

MCLK

43

VALID

44

RESET2_DEMOD

45

DATA

46

A1

B1B1A1

47

SHIELD

BSD-14Y-UD-067_02-HD

+3.3V_LNA_TU

RF_SWITCH_CTL_TU

IF_AGC_TU

I2C_SCL6_TU

I2C_SDA6_TU

IF_P_TU

IF_N_TU

TU_SIF_TU

TU_CVBS_TU

TU_GND_B

TDJW-B251F

A1

47

SHIELD

2014.03.12

TU6800-*3
TDJW-B251F

B1[+3.3V]

1

RF_S/W_CTL

2

NC_1

3

SCL_RF

4

SDA_RF

5

NC_2

6

NC_3

7

M_SIF

8

M_CVBS

9

NC_4

10

B2[+3.3V]

11

NC_5

12

GND_1

13

M_RESET_DEMOD

25

B3[+3.3V]

26

SCL_DEMOD

27

B4[+1.1V]

28

NC_6

29

SDA_DEMOD

30

NC_7

33

M_ERROR

34

GND_2

35

M_SYNC

36

M_MCLK

37

NC_8

38

M_VALID

39

M_DATA

40

S_ERROR

41

S_SYNC

42

S_MCLK

43

S_VALID

44

S_RESET_DEMOD

45

S_DATA

46

B1B1A1

RS-232C Control INTERFACE

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

C6812

0.33uF

OPT

C6808

0.1uF

C6809

0.1uF

C6810

0.1uF

C6811

0.1uF

C1+

C1-

C2+

C2-

DOUT2

RIN2

V+

V-

IC6801

MAX3232CDR

1

2

3

4

5

6

7

8

EAN41348201

R6820

+3.5V_ST

OPT
ZD6802

ADUC 20S 02 010L
20V

C6813

0.1uF

VCC

16

GND

15

DOUT1

14

RIN1

13

ROUT1

12

DIN1

11

DIN2

10

ROUT2

9

SOC_RX

SOC_TX

100

R6821
100

OPT
ZD6803

ADUC 20S 02 010L
20V

6M6

1M1

3M3_DETECT

4M4

5M5_GND

PEJ038-4B6

JK6800

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

12/08/16

RS232C 68

DVB-S2 LNB Part Allegro

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LNB_OUT

(Option:LNB)

C6900
18pF

LNB

Close to Tuner
Surge protectioin

C6901
33pF

LNB

D6900

LNB

R6900

2.2K
1W

LNB

D6901-*1

SS23L

30V

LNB_DIODE_TSC

D6901

MBR230LSFT1G

LNB_DIODE_ONSEMI

C6902

0.22uF

LNB

25V

A_GND

2A

D6902-*1

LNB_DIODE_TSC

30V

LNB_DIODE_ONSEMI

30V

D6902

30V

C6903

0.01uF
50V

LNB

C6905
10uF
25V

LNB

close to Boost pin(#1)

C6904

0.1uF
50V

LNB

A_GND

C6906
10uF
25V

LNB

D6903
LNB_SMAB34

40V

D6903-*1

LNB_SX34

40V

A_GND

C6907
10uF
25V

LNB

D6904-*1

LNB_SX34

LNB_SMAB34

LNB

C6908 0.1uF

40V

D6904

40V

[EP]GND

VCP

1

LNB

2

NC_1

3

TDI

A8303SESTR-T

4

TDO

5

A_GND

NC_3

BOOST

19

20

THERMAL

21

IC6900

7

6

SCL9ADD

IRQ

LNB

NC_2

18

8

SDA

GNDLX

3.5A

SP-7850_15

16LX17

15

14

13

12

11

10

TONECTRL

15uH

L6900

VIN

GND

VREG

ISET

TCAP

+12V

LNB

3A

Max 1.3A

C6909
10uF
25V

LNB

A_GND

close to VIN pin(#15)

C6910

0.1uF
50V

LNB

C6912

LNB

0.1uF

LNB

C6911 0.22uF

Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A

LNB
R6903

39K

1/16W
1%

Caution!! need isolated GND

A_GND



R6904
0

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

LNB

R6901 33

I2C_SCL4

LNB

R6902 33

I2C_SDA4

LNB_TX

LNB

BSD-14Y-UD-069-HD

2013.12.17

69

SMD bottom for EMI_HDMI_892Mhz SMD bottom Ready

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7401

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7406

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7410

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7417

MDS62110225

SMD_Ready

GASKET_8.0X6.0X10.5H

M7403

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7402

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7404

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7405

MDS62110225

GASKET_8.0X6.0X10.5H

GASKET_8.0X6.0X10.5H

GASKET_8.0X6.0X10.5H

SMD top for EMI_HDMI

SMD_GASKET_for_EMI_TOP

GASKET_8.0X6.0X12.5H

M7411

MDS62110217

SMD_GASKET_for_EMI_TOP

GASKET_8.0X6.0X12.5H

M7412

MDS62110217

SMD_GASKET_for_EMI_TOP

GASKET_8.0X6.0X12.5H

M7413

MDS62110217

SMD_for_EMI_HDMI

M7407

MDS62110225

SMD_for_EMI_HDMI

M7408

MDS62110225

SMD_for_EMI_HDMI

M7409

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7414

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7415

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7416

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7418

MDS62110225

SMD_for_EMI_HDMI

GASKET_8.0X6.0X10.5H

M7419

MDS62110225

SMD_Ready

GASKET_8.0X6.0X10.5H

M7420

MDS62110225

SMD_Ready

GASKET_8.0X6.0X10.5H

M7421

MDS62110225

Decap for EMI (4Layer)

+3.3V_NORMAL

C7401

C7402

1uF

0.1uF

+2.5V_Normal

C7403
1uF

C7404

0.01uF

Decap for D14 (4Layer)

VDDC15_D14

C7405

0.1uF

C7406

0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

65EC9700

SMD Gasket

2014-04-05

eMMC I/F

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

R8107-*1 47K

R8106-*1 47K

AR8100
22
1/16W

EMMC_SERIAL_22

AR8101
22
1/16W

EMMC_SERIAL_22

AR8102 22

3.3V_EMMC

R8100 10K

OPT

R8101 10K

R8102 10K

C8100

0.1uF
16V

R8103 10K

C8107
10pF

OPT

50V

EMMC DATA LINE 47K PULL/UP

R8103-*1 47K

R8100-*1 47K

EMMC_DATA[0-7]

EMMC_DATA[0]
EMMC_DATA[1]
EMMC_DATA[2]

EMMC_DATA[3]

EMMC_DATA[4]
EMMC_DATA[5]
EMMC_DATA[6]
EMMC_DATA[7]

EMMC_CLK
EMMC_CMD
EMMC_RST

R8101-*1 47K

R8102-*1 47K

R8105-*1 47K

R8104-*1 47K

EMMC_SERIAL_22

eMMC serial 100 ohm option

AR8100-*1
100
1/16W

EMMC_SERIAL_100

100
1/16W

EMMC_SERIAL_100

EMMC_SERIAL_100

100
1/16W

AR8102-*1

AR8101-*1

Don’t Connect Power At VDDI

(Just Interal LDO Capacitor)

IC8100-*1

THGBM5G5A1JBAIR

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

EMMC DATA LINE
10K PULL/UP
FOR M13

R8107 10K

R8105 10K

R8106 10K

R8104 10K

DAT4

DAT5

DAT3

DAT6

10K

R8117

EMMC_CLK_BALL

EMMC_CMD_BALL

10K

R8116

EMMC_RESET_BALL

EMMC_VDDI

EMMC_VDDI

3.3V_EMMC

DAT3
DAT4

DAT5

C8104
1uF
10V

A3
A4
A5
B2
B3
B4
B5
B6

M6
M5

A6
A7
C5
E5
E8

E9
E10
F10

G3
G10

H5

J5

K6

K7
K10

P7
P10

K5

C6

M4

N4

P3

P5

E6

F5
J10

K9

C2

E7

G5
H10

K8

C4

N2

N5

P4

P6

A1

A2

A8

A9
A10
A11
A12
A13
A14

B1

B7

B8

B9
B10
B11
B12
B13
B14

C1

C3

C7

DU1
DU2
DU3
DU4
DU5
DU6
DU7
DU8

H26M31002GPR

DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7

CLK
CMD

NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119

RESET

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

VCC_1
VCC_2
VCC_3
VCC_4

VDDI

VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

NC_1
NC_2
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_24

DUMMY_1
DUMMY_2
DUMMY_3
DUMMY_4
DUMMY_5
DUMMY_6
DUMMY_7
DUMMY_8

IC8100

C8

NC_25

C9

NC_26

C10

NC_27

C11

NC_28

C12

NC_29

C13

NC_30

C14

NC_31

D1

NC_32

D2

NC_33

D3

NC_34

D4

NC_35

D12

NC_36

D13

NC_37

D14

NC_38

E1

NC_39

E2

NC_40

E3

NC_41

E12

NC_46

E13

NC_47

E14

NC_48

F1

NC_49

F2

NC_50

F3

NC_51

F12

NC_53

F13

NC_54

F14

NC_55

G1

NC_56

G2

NC_57

G12

NC_60

G13

NC_61

G14

NC_62

H1

NC_63

H2

NC_64

H3

NC_65

H12

NC_67

H13

NC_68

H14

NC_69

J1

NC_70

J2

NC_71

J3

NC_72

J12

NC_74

J13

NC_75

J14

NC_76

K1

NC_77

K2

NC_78

K3

NC_79

K12

NC_83

K13

NC_84

K14

NC_85

L1

NC_86

L2

NC_87

L3

NC_88

L12

NC_89

L13

NC_90

L14

NC_91

M1

NC_92

HYNIX_EMMC_4GB

NC_93
NC_94
NC_95
NC_96
NC_97
NC_98

NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106
NC_107
NC_108
NC_109
NC_110
NC_111
NC_112
NC_113
NC_114
NC_115
NC_117
NC_118
NC_120
NC_121
NC_122
NC_123

DUMMY_9
DUMMY_10
DUMMY_11
DUMMY_12
DUMMY_13
DUMMY_14
DUMMY_15
DUMMY_16

M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

DU9
DU10
DU11
DU12
DU13
DU14
DU15
DU16

DAT5

DAT6

EMMC_RESET_BALL

EMMC_CMD_BALL

EMMC_CLK_BALL

M6

CLK

M5

CMD

A6

RFU_1

A7

RFU_2

C5

NC_21

E5

RFU_3

E8

RFU_4

E9

RFU_5

E10

RFU_6

F10

RFU_7

G3

RFU_8

G10

RFU_9

H5

RFU_10

J5

RFU_11

K6

RFU_12

K7

RFU_13

K10

RFU_14

P7

RFU_15

P10

RFU_16

K5

RST_N

C6

VCCQ_1

M4

VCCQ_2

N4

VCCQ_3

P3

VCCQ_4

P5

VCCQ_5

E6

VCC_1

F5

VCC_2

J10

VCC_3

K9

VCC_4

C2

VDDI

E7

VSS_1

G5

VSS_2

H10

VSS_3

K8

VSS_4

C4

VSSQ_1

N2

VSSQ_2

N5

VSSQ_3

P4

VSSQ_4

P6

VSSQ_5

A1

NC_1

A2

NC_2

A8

NC_3

A9

NC_4

A10

NC_5

A11

NC_6

A12

NC_7

A13

NC_8

A14

NC_9

B1

NC_10

B7

NC_11

B8

NC_12

B9

NC_13

B10

NC_14

B11

NC_15

B12

NC_16

B13

NC_17

B14

NC_18

C1

NC_19

C3

NC_20

C7

NC_22

TOSHIBA_EMMC_4GB

IC8100-*5

KLM4G1FE3B-B001

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

NC_3

A7

NC_4

C5

NC_23

E5

NC_42

E8

NC_43

E9

NC_44

E10

NC_45

F10

NC_52

G3

NC_58

G10

NC_59

H5

NC_66

J5

NC_73

K6

NC_80

K7

NC_81

K10

NC_82

P7

NC_116

P10

NC_119

K5

RSTN

C6

VDD_1

M4

VDD_2

N4

VDD_3

P3

VDD_4

P5

VDD_5

E6

VDDF_1

F5

VDDF_2

J10

VDDF_3

K9

VDDF_4

C2

VDDI

E7

VSS_2

G5

VSS_3

H10

VSS_4

K8

VSS_5

C4

VSS_1

N2

VSS_6

N5

VSS_7

P4

VSS_8

P6

VSS_9

A1

NC_1

A2

NC_2

A8

NC_5

A9

NC_6

A10

NC_7

A11

NC_8

A12

NC_9

A13

NC_10

A14

NC_11

B1

NC_12

B7

NC_13

B8

NC_14

B9

NC_15

B10

NC_16

B11

NC_17

B12

NC_18

B13

NC_19

B14

NC_20

C1

NC_21

C3

NC_22

C7

NC_24

C8

NC_23

C9

NC_24

C10

NC_25

C11

NC_26

C12

NC_27

C13

NC_28

C14

NC_29

D1

NC_30

D2

NC_31

D3

NC_32

D4

NC_33

D12

NC_34

D13

NC_35

D14

NC_36

E1

NC_37

E2

NC_38

E3

NC_39

E12

NC_40

E13

NC_41

E14

NC_42

F1

NC_43

F2

NC_44

F3

NC_45

F12

NC_46

F13

NC_47

F14

NC_48

G1

NC_49

G2

NC_50

G12

NC_51

G13

NC_52

G14

NC_53

H1

NC_54

H2

NC_55

H3

NC_56

H12

NC_57

H13

NC_58

H14

NC_59

J1

NC_60

J2

NC_61

J3

NC_62

J12

NC_63

J13

NC_64

J14

NC_65

K1

NC_66

K2

NC_67

K3

NC_68

K12

NC_69

K13

NC_70

K14

NC_71

L1

NC_72

L2

NC_73

L3

NC_74

L12

NC_75

L13

NC_76

L14

NC_77

M1

NC_78

M2

NC_79

M3

NC_80

M7

NC_81

M8

NC_82

M9

NC_83

M10

NC_84

M11

NC_85

M12

NC_86

M13

NC_87

M14

NC_88

N1

NC_89

N3

NC_90

N6

NC_91

N7

NC_92

N8

NC_93

N9

NC_94

N10

NC_95

N11

NC_96

N12

NC_97

N13

NC_98

N14

NC_99

P1

NC_100

P2

NC_101

P8

NC_102

P9

NC_103

P11

NC_104

P12

NC_105

P13

NC_106

P14

NC_107

IC8100-*6

THGBM5G6A2JBAIR

C8

NC_25

C9

NC_26

C10

NC_27

C11

NC_28

C12

NC_29

C13

NC_30

C14

NC_31

D1

NC_32

D2

NC_33

D3

NC_34

D4

NC_35

D12

NC_36

D13

NC_37

D14

NC_38

E1

NC_39

E2

NC_40

E3

NC_41

E12

NC_46

E13

NC_47

E14

NC_48

F1

NC_49

F2

NC_50

F3

NC_51

F12

NC_53

F13

NC_54

F14

NC_55

G1

NC_56

G2

NC_57

G12

NC_60

G13

NC_61

G14

NC_62

H1

NC_63

H2

NC_64

H3

NC_65

H12

NC_67

H13

NC_68

H14

NC_69

J1

NC_70

J2

NC_71

J3

NC_72

J12

NC_74

J13

NC_75

J14

NC_76

K1

NC_77

K2

NC_78

K3

NC_79

K12

NC_83

K13

NC_84

K14

NC_85

L1

NC_86

L2

NC_87

L3

NC_88

L12

NC_89

L13

NC_90

L14

NC_91

M1

NC_92

M2

NC_93

M3

NC_94

M7

NC_95

M8

NC_96

M9

NC_97

M10

NC_98

M11

NC_99

M12

NC_100

M13

NC_101

M14

NC_102

N1

NC_103

N3

NC_104

N6

NC_105

N7

NC_106

SAMSUNG_EMMC_4GB

N8

NC_107

N9

NC_108

N10

NC_109

N11

NC_110

N12

NC_111

N13

NC_112

N14

NC_113

P1

NC_114

P2

NC_115

P8

NC_117

P9

NC_118

P11

NC_120

P12

NC_121

P13

NC_122

P14

NC_123

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

RFU_1

A7

RFU_2

C5

NC_21

E5

RFU_3

E8

RFU_4

E9

RFU_5

E10

RFU_6

F10

RFU_7

G3

RFU_8

G10

RFU_9

H5

RFU_10

J5

RFU_11

K6

RFU_12

K7

RFU_13

K10

RFU_14

P7

RFU_15

P10

RFU_16

K5

RSTN

C6

VCCQ_1

M4

VCCQ_2

N4

VCCQ_3

P3

VCCQ_4

P5

VCCQ_5

E6

VCC_1

F5

VCC_2

J10

VCC_3

K9

VCC_4

C2

VDDI

E7

VSS_1

G5

VSS_2

H10

VSS_3

K8

VSS_4

C4

VSSQ_1

N2

VSSQ_2

N5

VSSQ_3

P4

VSSQ_4

P6

VSSQ_5

A1

NC_1

A2

NC_2

A8

NC_3

A9

NC_4

A10

NC_5

A11

NC_6

TOSHIBA_EMMC_8GB

A12

NC_7

A13

NC_8

A14

NC_9

B1

NC_10

B7

NC_11

B8

NC_12

B9

NC_13

B10

NC_14

NC_100

B11

NC_15

NC_101

B12

NC_16

NC_102

B13

NC_17

NC_103

B14

NC_18

NC_104

C1

NC_19

NC_105

C3

NC_20

NC_106

C7

NC_22

NC_107

E10
F10

G10

K10

P10

J10

H10

A10
A11
A12
A13
A14

B10
B11
B12
B13
B14

NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99

A3
A4
A5
B2
B3
B4
B5
B6

M6
M5

A6
A7
C5
E5
E8
E9

G3

H5
J5
K6
K7

P7

K5

C6
M4
N4
P3
P5

E6
F5

K9

C2

E7
G5

K8
C4
N2
N5
P4
P6

A1
A2
A8
A9

B1
B7
B8
B9

C1
C3
C7

C8
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

IC8100-*2

H26M21001ECR

DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7

CLK
CMD

NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119

RESET

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

VCC_1
VCC_2
VCC_3
VCC_4

VDDI

VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

NC_1
NC_2
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_24

C8

NC_25

C9

NC_26

C10

NC_27

C11

NC_28

C12

NC_29

C13

NC_30

C14

NC_31

D1

NC_32

D2

NC_33

D3

NC_34

D4

NC_35

D12

NC_36

D13

NC_37

D14

NC_38

E1

NC_39

E2

NC_40

E3

NC_41

E12

NC_46

E13

NC_47

E14

NC_48

F1

NC_49

F2

NC_50

F3

NC_51

F12

NC_53

F13

NC_54

F14

NC_55

G1

NC_56

G2

NC_57

G12

NC_60

G13

NC_61

G14

NC_62

H1

NC_63

H2

NC_64

H3

NC_65

H12

NC_67

H13

NC_68

H14

NC_69

J1

NC_70

J2

NC_71

J3

NC_72

J12

NC_74

J13

NC_75

J14

NC_76

K1

NC_77

K2

NC_78

K3

NC_79

K12

NC_83

K13

NC_84

K14

NC_85

L1

NC_86

L2

NC_87

L3

NC_88

L12

NC_89

L13

NC_90

L14

NC_91

M1

NC_92

HYNIX_EMMC_2GB

KLMAG2GE4A-A001

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

RFU_1

A7

RFU_2

C5

RFU_3

E5

RFU_4

E8

RFU_5

E9

RFU_6

E10

NC_39

F10

RFU_7

G3

RFU_8

G10

RFU_9

H5

RFU_10

J5

RFU_11

K6

RFU_12

K7

RFU_13

K10

RFU_14

P7

RFU_15

P10

NC_104

K5

RESET

C6

VDD_1

M4

VDD_2

N4

VDD_3

P3

VDD_4

P5

VDD_5

E6

VDDF_1

F5

VDDF_2

J10

VDDF_3

K9

VDDF_4

C2

VDDI

E7

VSS_2

G5

VSS_3

H10

VSS_4

K8

VSS_9

C4

VSS_1

N2

VSS_5

N5

VSS_6

P4

VSS_7

P6

VSS_8

A1

NC_1

A2

NC_2

A8

NC_3

A9

NC_4

A10

NC_5

A11

NC_6

A12

NC_7

A13

NC_8

A14

NC_9

B1

NC_10

B7

NC_11

B8

NC_12

B9

NC_13

B10

NC_14

B11

NC_15

B12

NC_16

B13

NC_17

B14

NC_18

C1

NC_19

C3

NC_20

C7

NC_21

DU1

DUMMY_1

DU2

DUMMY_2

DU3

DUMMY_3

DU4

DUMMY_4

DU5

DUMMY_5

DU6

DUMMY_6

DU7

DUMMY_7

DU8

DUMMY_8

M2

NC_93

M3

NC_94

M7

NC_95

M8

NC_96

M9

NC_97

M10

NC_98

M11

NC_99

M12

NC_100

M13

NC_101

M14

NC_102

N1

NC_103

N3

NC_104

N6

NC_105

N7

NC_106

N8

NC_107

N9

NC_108

N10

NC_109

N11

NC_110

N12

NC_111

N13

NC_112

N14

NC_113

P1

NC_114

P2

NC_115

P8

NC_117

P9

NC_118

P11

NC_120

P12

NC_121

P13

NC_122

P14

NC_123

IC8100-*7

C8

NC_22

C9

NC_23

C10

NC_24

C11

NC_25

C12

NC_26

C13

NC_27

C14

NC_28

D1

NC_29

D2

NC_30

D3

NC_31

D4

NC_32

D12

NC_33

D13

NC_34

D14

NC_35

E1

NC_36

E2

NC_37

E3

NC_38

E12

NC_40

E13

NC_41

E14

NC_42

F1

NC_43

F2

NC_44

F3

NC_45

F12

NC_46

F13

NC_47

F14

NC_48

G1

NC_49

G2

NC_50

G12

NC_51

G13

NC_52

G14

NC_53

H1

NC_54

H2

NC_55

H3

NC_56

H12

NC_57

H13

NC_58

H14

NC_59

J1

NC_60

J2

NC_61

J3

NC_62

J12

NC_63

J13

NC_64

J14

NC_65

K1

NC_66

K2

NC_67

K3

NC_68

K12

NC_69

K13

NC_70

K14

NC_71

L1

NC_72

L2

NC_73

L3

NC_74

L12

NC_75

L13

NC_76

L14

NC_77

M1

NC_78

M2

NC_79

M3

NC_80

M7

NC_81

M8

NC_82

M9

NC_83

M10

NC_84

M11

NC_85

M12

NC_86

M13

NC_87

M14

NC_88

N1

SAMSUNG_EMMC_16G

NC_89

N3

NC_90

N6

NC_91

N7

NC_92

N8

NC_93

N9

NC_94

N10

NC_95

N11

NC_96

N12

NC_97

N13

NC_98

N14

NC_99

P1

NC_100

P2

NC_101

P8

NC_102

P9

NC_103

P11

RFU_16

P12

NC_105

P13

NC_106

P14

NC_107

DU9

DUMMY_9

DU10

DUMMY_10

DU11

DUMMY_11

DU12

DUMMY_12

DU13

DUMMY_13

DU14

DUMMY_14

DU15

DUMMY_15

DU16

DUMMY_16

A3
A4
A5
B2
B3
B4
B5
B6

M6
M5

A6
A7
C5
E5
E8

E9
E10
F10

G3
G10

H5

J5

K6

K7
K10

P7
P10

K5

C6

M4

N4

P3

P5

E6

F5
J10

K9

C2

C4

E7

G5
H10

K8

N2

N5

P4

P6

A1

A2

A8

A9
A10
A11
A12
A13
A14

B1

B7

B8

B9
B10
B11
B12
B13
B14

C1

C3

C7

IC8100-*8

H26M42002GMR

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

NC_3

A7

NC_4

C5

NC_23

E5

NC_42

E8

NC_43

E9

NC_44

E10

NC_45

F10

NC_52

G3

NC_58

G10

NC_59

H5

NC_66

J5

NC_73

K6

NC_80

K7

NC_81

K10

NC_82

P7

NC_116

P10

NC_119

K5

RESET

C6

VCCQ_1

M4

VCCQ_2

N4

VCCQ_3

P3

VCCQ_4

P5

VCCQ_5

E6

VCC_1

F5

VCC_2

J10

VCC_3

K9

VCC_4

C2

VDDI

E7

VSS_1

G5

VSS_2

H10

VSS_3

K8

VSS_4

C4

VSSQ_1

N2

VSSQ_2

N5

VSSQ_3

P4

VSSQ_4

P6

VSSQ_5

A1

NC_1

A2

NC_2

A8

NC_5

A9

NC_6

A10

NC_7

A11

NC_8

A12

NC_9

A13

NC_10

A14

NC_11

B1

NC_12

B7

NC_13

B8

NC_14

B9

NC_15

B10

NC_16

B11

NC_17

B12

NC_18

B13

NC_19

B14

NC_20

C1

NC_21

C3

NC_22

C7

NC_24

IC8100-*3

KLM2G1HE3F-B001

DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7

CLK
CMD

NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119

RSTN

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5

VDDF_1
VDDF_2
VDDF_3
VDDF_4

VDDI

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

NC_1
NC_2
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_24

C8

NC_25

C9

NC_26

C10

NC_27

C11

NC_28

C12

NC_29

C13

NC_30

C14

NC_31

D1

NC_32

D2

NC_33

D3

NC_34

D4

NC_35

D12

NC_36

D13

NC_37

D14

NC_38

E1

NC_39

E2

NC_40

E3

NC_41

E12

NC_46

E13

NC_47

E14

NC_48

F1

NC_49

F2

NC_50

F3

NC_51

F12

NC_53

F13

NC_54

F14

NC_55

G1

NC_56

G2

NC_57

G12

NC_60

G13

NC_61

G14

NC_62

H1

NC_63

H2

NC_64

H3

NC_65

H12

NC_67

H13

NC_68

H14

NC_69

J1

NC_70

J2

NC_71

J3

NC_72

J12

NC_74

J13

NC_75

J14

NC_76

K1

NC_77

K2

NC_78

K3

NC_79

K12

NC_83

K13

NC_84

K14

NC_85

L1

NC_86

L2

NC_87

L3

NC_88

L12

NC_89

L13

NC_90

HYNIX_EMMC_8GB

L14

NC_91

M1

NC_92

M2

NC_93

M3

NC_94

M7

NC_95

M8

NC_96

M9

NC_97

M10

NC_98

M11

NC_99

M12

NC_100

M13

NC_101

M14

NC_102

N1

NC_103

N3

NC_104

N6

NC_105

N7

NC_106

N8

NC_107

N9

NC_108

N10

NC_109

N11

NC_110

N12

NC_111

N13

NC_112

N14

NC_113

P1

NC_114

P2

NC_115

P8

NC_117

P9

NC_118

P11

NC_120

P12

NC_121

P13

NC_122

P14

NC_123

SAMSUNG_EMMC_2GB

C8

NC_25

C9

NC_26

C10

NC_27

C11

NC_28

C12

NC_29

C13

NC_30

C14

NC_31

D1

NC_32

D2

NC_33

D3

NC_34

D4

NC_35

D12

NC_36

D13

NC_37

D14

NC_38

E1

NC_39

E2

NC_40

E3

NC_41

E12

NC_46

E13

NC_47

E14

NC_48

F1

NC_49

F2

NC_50

F3

NC_51

F12

NC_53

F13

NC_54

F14

NC_55

G1

NC_56

G2

NC_57

G12

NC_60

G13

NC_61

G14

NC_62

H1

NC_63

H2

NC_64

H3

NC_65

H12

NC_67

H13

NC_68

H14

NC_69

J1

NC_70

J2

NC_71

J3

NC_72

J12

NC_74

J13

NC_75

J14

NC_76

K1

NC_77

K2

NC_78

K3

NC_79

K12

NC_83

K13

NC_84

K14

NC_85

L1

NC_86

L2

NC_87

L3

NC_88

L12

NC_89

L13

NC_90

L14

NC_91

M1

NC_92

M2

NC_93

M3

NC_94

M7

NC_95

M8

NC_96

M9

NC_97

M10

NC_98

M11

NC_99

M12

NC_100

M13

NC_101

M14

NC_102

N1

NC_103

N3

NC_104

N6

NC_105

N7

NC_106

N8

NC_107

N9

NC_108

N10

NC_109

N11

NC_110

N12

NC_111

N13

NC_112

N14

NC_113

P1

NC_114

P2

NC_115

P8

NC_117

P9

NC_118

P11

NC_120

P12

NC_121

P13

NC_122

P14

NC_123

IC8100-*9

THGBMAG5A1JBAIR

A3

C8

DAT0

NC_23

A4

C9

DAT1

NC_24

A5

C10

DAT2

NC_25

B2

C11

DAT3

NC_26

B3

C12

DAT4

NC_27

B4

C13

DAT5

NC_28

B5

C14

DAT6

NC_29

B6

D1

DAT7

NC_30

D2

NC_31

D3

NC_32

M6

D4

CLK

NC_33

M5

D12

CMD

NC_34

D13

NC_35

D14

NC_36

A6

E1

RFU_1

NC_37

A7

E2

RFU_2

NC_38

C5

E3

NC_21

NC_39

E5

E12

RFU_3

NC_40

E8

E13

RFU_4

NC_41

E9

E14

RFU_5

NC_42

E10

F1

RFU_6

NC_43

F10

F2

RFU_7

NC_44

G3

F3

RFU_8

NC_45

G10

F12

RFU_9

NC_46

H5

F13

RFU_10

NC_47

J5

F14

RFU_11

NC_48

K6

G1

RFU_12

NC_49

K7

G2

RFU_13

NC_50

K10

G12

RFU_14

NC_51

P7

G13

RFU_15

NC_52

P10

G14

RFU_16

NC_53

H1

NC_54

H2

NC_55

K5

H3

RST_N

NC_56

H12

NC_57

H13

NC_58

C6

H14

VCCQ_1

NC_59

M4

J1

VCCQ_2

NC_60

N4

J2

VCCQ_3

NC_61

P3

J3

VCCQ_4

NC_62

P5

J12

VCCQ_5

NC_63

J13

NC_64

J14

NC_65

E6

K1

VCC_1

NC_66

F5

K2

VCC_2

NC_67

J10

K3

VCC_3

NC_68

K9

K12

VCC_4

NC_69

K13

NC_70

K14

NC_71

C2

L1

VDDI

NC_72

L2

NC_73

L3

NC_74

E7

L12

VSS_1

NC_75

G5

L13

VSS_2

NC_76

H10

L14

VSS_3

NC_77

K8

M1

VSS_4

NC_78

C4

M2

VSSQ_1

NC_79

N2

M3

VSSQ_2

NC_80

N5

M7

VSSQ_3

NC_81

P4

M8

VSSQ_4

NC_82

P6

M9

VSSQ_5

NC_83

M10

NC_84

M11

NC_85

M12

NC_86

A1

M13

NC_1

NC_87

A2

M14

NC_2

NC_88

A8

N1

NC_3

NC_89

A9

N3

NC_4

NC_90

A10

N6

NC_5

NC_91

A11

N7

NC_6

NC_92

A12

N8

NC_7

NC_93

A13

N9

NC_8

NC_94

A14

N10

NC_9

NC_95

B1

N11

NC_10

NC_96

B7

N12

NC_11

NC_97

B8

N13

NC_12

NC_98

B9

N14

NC_13

NC_99

B10

P1

NC_14

NC_100

B11

P2

NC_15

NC_101

B12

P8

NC_16

NC_102

B13

P9

NC_17

NC_103

TOSHIBA_EMMC_4GB_V4.5

B14

P11

NC_18

NC_104

C1

P12

NC_19

NC_105

C3

P13

NC_20

NC_106

C7

P14

NC_22

NC_107

A3
A4
A5
B2
B3
B4
B5
B6

M6
M5

A6
A7
C5
E5
E8

E9
E10
F10

G3
G10

H5

J5

K6

K7
K10

P7
P10

K5

C6

M4

N4

P3

P5

E6

F5
J10

K9

C2

E7

G5
H10

K8

C4

N2

N5

P4

P6

A1

A2

A8

A9
A10
A11
A12
A13
A14

B1

B7

B8

B9
B10
B11
B12
B13
B14

C1

C3

C7

IC8100-*4

THGBM5G7A2JBAIR

A3

DAT0

A4

DAT1

A5

DAT2

B2

DAT3

B3

DAT4

B4

DAT5

B5

DAT6

B6

DAT7

M6

CLK

M5

CMD

A6

RFU_1

A7

RFU_2

C5

NC_21

E5

RFU_3

E8

RFU_4

E9

RFU_5

E10

RFU_6

F10

RFU_7

G3

RFU_8

G10

RFU_9

H5

RFU_10

J5

RFU_11

K6

RFU_12

K7

RFU_13

K10

RFU_14

P7

RFU_15

P10

RFU_16

K5

RSTN

C6

VCCQ_1

M4

VCCQ_2

N4

VCCQ_3

P3

VCCQ_4

P5

VCCQ_5

E6

VCC_1

F5

VCC_2

J10

VCC_3

K9

VCC_4

C2

VDDI

E7

VSS_1

G5

VSS_2

H10

VSS_3

K8

VSS_4

C4

VSSQ_1

N2

VSSQ_2

N5

VSSQ_3

P4

VSSQ_4

P6

VSSQ_5

A1

NC_1

A2

NC_2

A8

NC_3

A9

NC_4

A10

NC_5

A11

NC_6

A12

NC_7

A13

NC_8

A14

NC_9

B1

NC_10

B7

NC_11

B8

NC_12

B9

NC_13

B10

NC_14

B11

NC_15

B12

NC_16

B13

NC_17

B14

NC_18

C1

NC_19

C3

NC_20

C7

NC_22

IC8100-*10

THGBMAG6A2JBAIR

DAT0

NC_23

DAT1

NC_24

DAT2

NC_25

DAT3

NC_26

DAT4

NC_27

DAT5

NC_28

DAT6

NC_29

DAT7

NC_30
NC_31
NC_32

CLK

NC_33

CMD

NC_34
NC_35
NC_36

RFU_1

NC_37

RFU_2

NC_38

NC_21

NC_39

RFU_3

NC_40

RFU_4

NC_41

RFU_5

NC_42

RFU_6

NC_43

RFU_7

NC_44

RFU_8

NC_45

RFU_9

NC_46

RFU_10

NC_47

RFU_11

NC_48

RFU_12

NC_49

RFU_13

NC_50

RFU_14

NC_51

RFU_15

NC_52

RFU_16

NC_53
NC_54
NC_55

RST_N

NC_56
NC_57
NC_58

VCCQ_1

NC_59

VCCQ_2

NC_60

VCCQ_3

NC_61

VCCQ_4

NC_62

VCCQ_5

NC_63
NC_64
NC_65

VCC_1

NC_66

VCC_2

NC_67

VCC_3

NC_68

VCC_4

NC_69
NC_70
NC_71

VDDI

NC_72
NC_73
NC_74

VSS_1

NC_75

VSS_2

NC_76

VSS_3

NC_77

VSS_4

NC_78

VSSQ_1

NC_79

VSSQ_2

NC_80

VSSQ_3

NC_81

VSSQ_4

NC_82

VSSQ_5

NC_83
NC_84
NC_85
NC_86

NC_1

NC_87

NC_2

NC_88

NC_3

NC_89

NC_4

NC_90

NC_5

NC_91

NC_6

NC_92

NC_7

NC_93

NC_8

NC_94

NC_9

NC_95

NC_10

NC_96

NC_11

NC_97

NC_12

NC_98

NC_13

NC_99

NC_14

NC_100

NC_15

NC_101

NC_16

NC_102

NC_17

NC_103

TOSHIBA_EMMC_8GB_V4.5

NC_18

NC_104

NC_19

NC_105

NC_20

NC_106

NC_22

NC_107

TOSHIBA_EMMC_16GB

C8
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

C8

NC_23

C9

NC_24

C10

NC_25

C11

NC_26

C12

NC_27

C13

NC_28

C14

NC_29

D1

NC_30

D2

NC_31

D3

NC_32

D4

NC_33

D12

NC_34

D13

NC_35

D14

NC_36

E1

NC_37

E2

NC_38

E3

NC_39

E12

NC_40

E13

NC_41

E14

NC_42

F1

NC_43

F2

NC_44

F3

NC_45

F12

NC_46

F13

NC_47

F14

NC_48

G1

NC_49

G2

NC_50

G12

NC_51

G13

NC_52

G14

NC_53

H1

NC_54

H2

NC_55

H3

NC_56

H12

NC_57

H13

NC_58

H14

NC_59

J1

NC_60

J2

NC_61

J3

NC_62

J12

NC_63

J13

NC_64

J14

NC_65

K1

NC_66

K2

NC_67

K3

NC_68

K12

NC_69

K13

NC_70

K14

NC_71

L1

NC_72

L2

NC_73

L3

NC_74

L12

NC_75

L13

NC_76

L14

NC_77

M1

NC_78

M2

NC_79

M3

NC_80

M7

NC_81

M8

NC_82

M9

NC_83

M10

NC_84

M11

NC_85

M12

NC_86

M13

NC_87

M14

NC_88

N1

NC_89

N3

NC_90

N6

NC_91

N7

NC_92

N8

NC_93

N9

NC_94

N10

NC_95

N11

NC_96

N12

NC_97

N13

NC_98

N14

NC_99

P1

NC_100

P2

NC_101

P8

NC_102

P9

NC_103

P11

NC_104

P12

NC_105

P13

NC_106

P14

NC_107

IC8100-*11

THGBMAG7A2JBAIR

A3

C8

DAT0

NC_23

A4

C9

DAT1

NC_24

A5

C10

DAT2

NC_25

B2

C11

DAT3

NC_26

B3

C12

DAT4

NC_27

B4

C13

DAT5

NC_28

B5

C14

DAT6

NC_29

B6

D1

DAT7

NC_30

D2

NC_31

D3

NC_32

M6

D4

CLK

NC_33

M5

D12

CMD

NC_34

D13

NC_35

D14

NC_36

A6

E1

RFU_1

NC_37

A7

E2

RFU_2

NC_38

C5

E3

NC_21

NC_39

E5

E12

RFU_3

NC_40

E8

E13

RFU_4

NC_41

E9

E14

RFU_5

NC_42

E10

F1

RFU_6

NC_43

F10

F2

RFU_7

NC_44

G3

F3

RFU_8

NC_45

G10

F12

RFU_9

NC_46

H5

F13

RFU_10

NC_47

J5

F14

RFU_11

NC_48

K6

G1

RFU_12

NC_49

K7

G2

RFU_13

NC_50

K10

G12

RFU_14

NC_51

P7

G13

RFU_15

NC_52

P10

G14

RFU_16

NC_53

H1

NC_54

H2

NC_55

K5

H3

RST_N

NC_56

H12

NC_57

H13

NC_58

C6

H14

VCCQ_1

NC_59

M4

J1

VCCQ_2

NC_60

N4

J2

VCCQ_3

NC_61

P3

J3

VCCQ_4

NC_62

P5

J12

VCCQ_5

NC_63

J13

NC_64

J14

NC_65

E6

K1

VCC_1

NC_66

F5

K2

VCC_2

NC_67

J10

K3

VCC_3

NC_68

K9

K12

VCC_4

NC_69

K13

NC_70

K14

NC_71

C2

L1

VDDI

NC_72

L2

NC_73

L3

NC_74

E7

L12

VSS_1

NC_75

G5

L13

VSS_2

NC_76

H10

L14

VSS_3

NC_77

K8

M1

VSS_4

NC_78

C4

M2

VSSQ_1

NC_79

N2

M3

VSSQ_2

NC_80

N5

M7

VSSQ_3

NC_81

P4

M8

VSSQ_4

NC_82

P6

M9

VSSQ_5

NC_83

M10

NC_84

M11

NC_85

M12

NC_86

A1

M13

NC_1

NC_87

A2

M14

NC_2

NC_88

A8

N1

NC_3

NC_89

A9

N3

NC_4

NC_90

A10

N6

NC_5

NC_91

A11

N7

NC_6

NC_92

A12

N8

NC_7

NC_93

A13

N9

NC_8

NC_94

A14

N10

NC_9

NC_95

B1

N11

NC_10

NC_96

B7

N12

NC_11

NC_97

B8

N13

NC_12

NC_98

B9

N14

NC_13

NC_99

B10

P1

NC_14

NC_100

B11

P2

NC_15

NC_101

B12

P8

NC_16

NC_102

B13

P9

NC_17

NC_103

B14

P11

TOSHIBA_EMMC_16GB_V4.5

NC_18

NC_104

C1

P12

NC_19

NC_105

C3

P13

NC_20

NC_106

C7

P14

NC_22

NC_107

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

eMMC

BSD-14Y-UD-081-HD

2013.12.17

81

XTAL(24.75MHz)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

XTAL_IN

D14_HWRESET
SPI_DL_MODE

C12000
24pF
50V

C120020.1uF

R1200010K

TRST_N_0
TMS_0
TCK_0
TDI_0
TDO_0

TRST_N_1
TMS_1
TCK_1
TDI_1
TDO_1
UART_RX_1
UART_TX_1

X-TAL_1

GND_1

AR12000

33

SOC_SPI0_SCLK

SOC_SPI0_MOSI
SOC_SPI0_MISO

I2C_SCL2
I2C_SDA2

D13_STPO_CLK
D13_STPO_SOP
D13_STPO_VAL
D13_STPO_ERR

D13_STPO_DATA

+3.3V_NORMAL

R12001

R12002

R12004
1M

X12000

24.75MHz
1

2

TRST_N_0

TMS_0
TCK_0
TDI_0
TDO_0

TRST_N_1

TMS_1
TCK_1
TDI_1
TDO_1

TRST_N_2

TMS_2
TCK_2
TDI_2
TDO_2

UART_RX_0
UART_TX_0
UART_RX_1
UART_TX_1

SOC_SPI0_CS0

SPI_SCLK_M

SPI_CS_M
SPI_MOSI_M
SPI_MISO_M

1K

OPT

1K

GND_2

4

X-TAL_2

3

XTAL_IN

XTAL_OUT

R12010 33

R12011 33
R12012 33
R12013 33

R12014 33

R12015 33

R12016 33

R12018 33
R12019 33
R12020 33
R12021 33

SMODE[0]

SMODE[1:0]

- 00 : Normal Mode

- Other : Test Mode



R12022
330

C12001
24pF
50V

+3.3V_NORMAL

R12050

OPT

+3.3V_NORMAL

R12005

1K

OPT

R12006

1K

P12007

12507WS-04L

5

JTAG1 for HEVC

+3.3V_NORMAL

1

2

3

4

+3.3V_NORMAL

R12103

4.7K

UART_TX_0

C12011

0.1uF
16V

C12010

0.1uF
16V
D14_DEBUG

TDI_2

TMS_2

TCK_2

TDO_2

TRST_N_2

UART_RX_0

SPI/I2C For Aardvak Interface

SW12000

JTP-1127WEM

XTAL_OUT

R12023

3.3K

OPT

B3

XTALI

A3

XTALO

A6

PORES_N

B6

TRST_0

B7

TMS_0

C6

TCK_0

C7

TDI_0

A8

TDO_0

H21

TRST_1

K22

TMS_1

H20

TCK_1

J21

TDI_1

J20

TDO_1

P19

TRST_2

M19

TMS_2

L19

TCK_2

N19

TDI_2

K19

TDO_2

T22

UART_RXD0

R21

UART_TXD0

T20

UART_RXD1

T21

UART_TXD1

N20

SPI_SCLK_S

P22

SPI_CS_S

P20

SPI_MOSI_S

P21

SPI_MISO_S

M22

SPI_SCK_M

M21

SPI_CS_M

N21

SPI_MOSI_M

M20

SPI_MISO_M

L20

SCL_S

L21

SDA_S

K20

SCL_M

K21

SDA_M

D22

STPI_CLK

C20

STPI_SOP

D20

STPI_VAL

D21

STPI_ERR

E21

STPI_DATA[0]

E20

STPI_DATA[1]

F22

STPI_DATA[2]

F21

STPI_DATA[3]

F20

STPI_DATA[4]

G21

STPI_DATA[5]

G20

STPI_DATA[6]

H22

STPI_DATA[7]

0

+3.3V_NORMAL

R12024

SMODE[1]

R12025

12

4 3

IC12000
LG1512D

GPIO[7]
GPIO[6]
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]

HDMI0_DDC_CK
HDMI0_DDC_DA

HDMI0_HPD

HDMI0_REXT

HDMI0_CEC

HDMI0_DDC_CEC

HDMI0_TX0N
HDMI0_TX0P
HDMI0_TX1N
HDMI0_TX1P
HDMI0_TX2N
HDMI0_TX2P
HDMI0_TXCN
HDMI0_TXCP

HDMI1_DDC_CK
HDMI1_DDC_DA

HDMI1_HPD

HDMI1_REXT

HDMI1_CEC

HDMI1_DDC_CEC

HDMI1_TX0N
HDMI1_TX0P
HDMI1_TX1N
HDMI1_TX1P
HDMI1_TX2N
HDMI1_TX2P
HDMI1_TXCN
HDMI1_TXCP

SMODE[0]
SMODE[1]

TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]

1K

GPIO[5]

1K

OPT

GPIO[5]

- 1 : Serial Flash Boot

- 0 : Live Boot



Y22
W20
W21
V20
V21
V22
U20
U21

C18
A18
B18
C17
B19
C19

B15
C15
B16
C16
B17
A17
B14
C14

C12
A12
B12
C11
B13
C13

B9
C9
B10
C10
B11
A11
B8
C8

A21
A20

C21
B20
B21
B22

C12003

0.1uF
16V

R12027
10

D14_HWRESET

+3.3V_NORMAL

15K

R12038 15K

R12096

R12095 15K

HDMI0_TX0N
HDMI0_TX0P
HDMI0_TX1N
HDMI0_TX1P
HDMI0_TX2N
HDMI0_TX2P
HDMI0_TXCN

HDMI0_TXCP

HDMI1_TX0N
HDMI1_TX0P
HDMI1_TX1N
HDMI1_TX1P
HDMI1_TX2N

HDMI1_TX2P

HDMI1_TXCN

HDMI1_TXCP

SMODE[0]
SMODE[1]

15K

R12097

D13_INT

R12098 15K

GPIO[5]

- 1 : Serial Flash Boot

- 0 : Live Boot



GPIO[5]

GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]

FLASH_WP

GPIO[5]

GPIO[4]
GPIO[3]

GPIO[2]

GPIO[1]
GPIO[0]

+3.3V_NORMAL

R12 037 2K

R12 036 2K

R12041 1K

R12042 27K

R12045

1.6K 1%

Closed to D13

R12032 1K

R12099 2K

R12003 2K

R12044

1.6K 1%

Closed to D13

HDMI1_DDC_CK
HDMI1_DDC_DA

+3.3V_NORMAL

R12039 27K

HDMI0_DDC_CK
HDMI0_DDC_DA

HDMI0_DDC_CK
HDMI0_DDC_DA
HDMI1_DDC_CK
HDMI1_DDC_DA

SPI_CS_M

SPI_MISO_M

FLASH_WP

SPI FLASH(4MByte)

R12060
10K

R12062

R12054
0

R12061
10K

OPT

Serial Flash Boot Test

MX25L3206EM2I-12G

CS#

1

SO/SIO1

33

2

WP#

3

GND

4

IC12002

+3.3V_NORMAL

R12068

1K

R12063 0

D14_DEBUG

R12064 0

D14_DEBUG

R12065 0

D14_DEBUG

R12066 0

D14_DEBUG

R12067 0

D14_DEBUG

R12069 0

R12070 0

D14_DEBUG

R12071 0

D14_DEBUG

R12072 0

VCC

8

HOLD#

7

SCLK

6

SI/SIO0

5

D14_DEBUG

OPT

OPT

R12073

3.3K

SPI_CS_M

SPI_MOSI_M

SPI_SCLK_M

SPI_MISO_M

SPI_DL_MODE

FLASH_WP

I2C_SDA2

I2C_SCL2

+3.3V_NORMAL

SPI_SCLK_M

SPI_MOSI_M

C12005

0.1uF

UART0 For system

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-119-HD

2013.12.17

VDDC15_D14

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

R12101
10K

100

VDDC15_D14

R12102

1K 1%

R12130

1K 1%

IC12000
LG1512D

M1_DDR_RESET_N_D14

M1_D_CLK_D14

R12 100

M1_D_CLKN_D14

M1_DDR_VREFCA_D14

0.1uF

C12100

OPT

DDR0_A[0]
DDR0_A[1]
DDR0_A[2]
DDR0_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR0_A[7]
DDR0_A[8]

DDR0_A[9]
DDR0_A[10]
DDR0_A[11]
DDR0_A[12]
DDR0_A[13]
DDR0_A[14]
DDR0_A[15]

DDR0_BA[0]
DDR0_BA[1]
DDR0_BA[2]

DDR0_U_CK

DDR0_U_CK_N

DDR0_D_CK

DDR0_D_CK_N

DDR0_CKE

DDR0_ODT
DDR0_RAS_N
DDR0_CAS_N

DDR0_WE_N

DDR0_RST_N

DDR0_ZQ_CALIB

DDR0_DQS[0]

DDR0_DQS_N[0]

DDR0_DQS[1]

DDR0_DQS_N[1]

DDR0_DQS[2]

DDR0_DQS_N[2]

DDR0_DQS[3]

DDR0_DQS_N[3]

DDR0_DM[0]
DDR0_DM[1]
DDR0_DM[2]
DDR0_DM[3]

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]

DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[18]
DDR0_DQ[19]
DDR0_DQ[20]
DDR0_DQ[21]
DDR0_DQ[22]
DDR0_DQ[23]
DDR0_DQ[24]
DDR0_DQ[25]
DDR0_DQ[26]
DDR0_DQ[27]
DDR0_DQ[28]
DDR0_DQ[29]
DDR0_DQ[30]
DDR0_DQ[31]

M1_DDR_CKE_D14

V13
V15
V11
V9
W17
W9
W16
V10
V17
V12
W18
W15
W14
W11
V16
V14

W8
V18
W12

Y17
AA17
Y8
AA8
W13

V7
W6
W7
V8

W10

V6

AA7
Y7
AA9
AB9
AA16
Y16
AA18
AB18

AB10
AB7
AB19
AB16

AA5
AA12
Y4
Y11
AB4
AB12
AA4
Y12
AA11
AA6
Y10
Y5
Y9
AB6
AA10
Y6
AA14
Y20
Y13
AA21
AB13
AB21
AA13
Y21
AA20
AA15
Y19
Y14
Y18
AB15
AA19
Y15

100

VDDC15_D14

R12105

1K 1%

R12106

1K 1%

M0_DDR_A0_D14
M0_DDR_A1_D14
M0_DDR_A2_D14
M0_DDR_A3_D14
M0_DDR_A4_D14
M0_DDR_A5_D14
M0_DDR_A6_D14
M0_DDR_A7_D14
M0_DDR_A8_D14
M0_DDR_A9_D14
M0_DDR_A10_D14
M0_DDR_A11_D14
M0_DDR_A12_D14
M0_DDR_A13_D14

M0_DDR_BA0_D14
M0_DDR_BA1_D14
M0_DDR_BA2_D14

R12108

240

1%

R12107
10K

M1_U_CLK_D14

R12 104

M1_U_CLKN_D14

M1_1_DDR_VREFCA_D14

0.1uF

C12101

OPT

M0_U_CLK_D14
M0_U_CLKN_D14
M0_D_CLK_D14
M0_D_CLKN_D14
M0_DDR_CKE_D14

M0_DDR_ODT_D14
M0_DDR_RASN_D14
M0_DDR_CASN_D14
M0_DDR_WEN_D14

M0_DDR_RESET_N_D14

M0_DDR_DQS0_D14
M0_DDR_DQS_N0_D14
M0_DDR_DQS1_D14
M0_DDR_DQS_N1_D14
M0_DDR_DQS2_D14
M0_DDR_DQS_N2_D14
M0_DDR_DQS3_D14
M0_DDR_DQS_N3_D14

M0_DDR_DM0_D14
M0_DDR_DM1_D14
M0_DDR_DM2_D14

M0_DDR_DM3_D14

M0_DDR_DQ0_D14
M0_DDR_DQ1_D14
M0_DDR_DQ2_D14
M0_DDR_DQ3_D14
M0_DDR_DQ4_D14
M0_DDR_DQ5_D14
M0_DDR_DQ6_D14
M0_DDR_DQ7_D14
M0_DDR_DQ8_D14

M0_DDR_DQ9_D14
M0_DDR_DQ10_D14
M0_DDR_DQ11_D14
M0_DDR_DQ12_D14
M0_DDR_DQ13_D14
M0_DDR_DQ14_D14
M0_DDR_DQ15_D14
M0_DDR_DQ16_D14
M0_DDR_DQ17_D14
M0_DDR_DQ18_D14
M0_DDR_DQ19_D14
M0_DDR_DQ20_D14
M0_DDR_DQ21_D14
M0_DDR_DQ22_D14
M0_DDR_DQ23_D14
M0_DDR_DQ24_D14
M0_DDR_DQ25_D14
M0_DDR_DQ26_D14
M0_DDR_DQ27_D14
M0_DDR_DQ28_D14
M0_DDR_DQ29_D14
M0_DDR_DQ30_D14
M0_DDR_DQ31_D14

VDDC15_D14

M1_DDR_VREFDQ_D14

R12109

1K 1%

R12110

1K 1%

C12102

0.1uF

OPT

VDDC15_D14

R12112
10K

100

R12 111

VDDC15_D14

R12113

R12114

VDDC15_D14

M0_DDR_CKE_D14

M0_DDR_RESET_N_D14

M0_D_CLK_D14

M0_D_CLKN_D14

M0_DDR_VREFCA_D14

1K 1%

0.1uF

1K 1%

OPT

C12103

M1_1_DDR_VREFDQ_D14

R12115

1K 1%

0.1uF

R12116

1K 1%

OPT

C12104

100

R12 117

VDDC15_D14

R12118

1K 1%

R12119

1K 1%

R12120
10K

M0_U_CLK_D14

M0_U_CLKN_D14

M0_1_DDR_VREFCA_D14

0.1uF

OPT

C12105

IC12000
LG1512D

VDDC15_D14

R12121

1K 1%

R12122

1K 1%

DDR1_A[0]
DDR1_A[1]
DDR1_A[2]
DDR1_A[3]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR1_A[7]
DDR1_A[8]

DDR1_A[9]
DDR1_A[10]
DDR1_A[11]
DDR1_A[12]
DDR1_A[13]
DDR1_A[14]
DDR1_A[15]

DDR1_BA[0]
DDR1_BA[1]
DDR1_BA[2]

DDR1_U_CK

DDR1_U_CK_N

DDR1_D_CK

DDR1_D_CK_N

DDR1_CKE

DDR1_ODT
DDR1_RAS_N
DDR1_CAS_N

DDR1_WE_N

DDR1_RST_N

DDR1_ZQ_CALIB

DDR1_DQS[0]

DDR1_DQS_N[0]

DDR1_DQS[1]

DDR1_DQS_N[1]

DDR1_DQS[2]

DDR1_DQS_N[2]

DDR1_DQS[3]

DDR1_DQS_N[3]

DDR1_DM[0]
DDR1_DM[1]
DDR1_DM[2]
DDR1_DM[3]

DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]

DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]
DDR1_DQ[16]
DDR1_DQ[17]
DDR1_DQ[18]
DDR1_DQ[19]
DDR1_DQ[20]
DDR1_DQ[21]
DDR1_DQ[22]
DDR1_DQ[23]
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]

M0_DDR_VREFDQ_D14

0.1uF

OPT

C12106

L5
N5
J5
G5
T4
H4
R4
H5
R5
K5
U4
P4
N4
K4
P5
M5

G4
T5
L4

T3
T2
G3
G2
M4

E5
E4
F4
F5

J4

U5

F2
F3
H2
H1
R2
R3
U2
U1

J1
F1
V1
R1

D2
L2
C3
K3
C1
L1
C2
L3
K2
E2
J3
D3
H3
E1
J2
E3
N2
W3
M3
Y2
M1
Y1
M2
Y3
W2
P2
V3
N3
U3
P1
V2
P3

240

VDDC15_D14

1%

M0_1_DDR_VREFDQ_D14

R12124

1K 1%

0.1uF

R12125

1K 1%

OPT

C12107

M1_DDR_A0_D14
M1_DDR_A1_D14
M1_DDR_A2_D14
M1_DDR_A3_D14
M1_DDR_A4_D14
M1_DDR_A5_D14
M1_DDR_A6_D14
M1_DDR_A7_D14
M1_DDR_A8_D14
M1_DDR_A9_D14
M1_DDR_A10_D14
M1_DDR_A11_D14
M1_DDR_A12_D14
M1_DDR_A13_D14

M1_DDR_BA0_D14
M1_DDR_BA1_D14
M1_DDR_BA2_D14

M1_U_CLK_D14
M1_U_CLKN_D14
M1_D_CLK_D14
M1_D_CLKN_D14
M1_DDR_CKE_D14

M1_DDR_ODT_D14
M1_DDR_RASN_D14
M1_DDR_CASN_D14
M1_DDR_WEN_D14

M1_DDR_RESET_N_D14

R12123

M1_DDR_DQS0_D14
M1_DDR_DQS_N0_D14
M1_DDR_DQS1_D14
M1_DDR_DQS_N1_D14
M1_DDR_DQS2_D14
M1_DDR_DQS_N2_D14
M1_DDR_DQS3_D14
M1_DDR_DQS_N3_D14

M1_DDR_DM0_D14
M1_DDR_DM1_D14
M1_DDR_DM2_D14
M1_DDR_DM3_D14

M1_DDR_DQ0_D14
M1_DDR_DQ1_D14
M1_DDR_DQ2_D14
M1_DDR_DQ3_D14
M1_DDR_DQ4_D14
M1_DDR_DQ5_D14
M1_DDR_DQ6_D14
M1_DDR_DQ7_D14
M1_DDR_DQ8_D14
M1_DDR_DQ9_D14
M1_DDR_DQ10_D14
M1_DDR_DQ11_D14
M1_DDR_DQ12_D14
M1_DDR_DQ13_D14
M1_DDR_DQ14_D14
M1_DDR_DQ15_D14
M1_DDR_DQ16_D14
M1_DDR_DQ17_D14
M1_DDR_DQ18_D14
M1_DDR_DQ19_D14
M1_DDR_DQ20_D14
M1_DDR_DQ21_D14
M1_DDR_DQ22_D14
M1_DDR_DQ23_D14
M1_DDR_DQ24_D14
M1_DDR_DQ25_D14
M1_DDR_DQ26_D14
M1_DDR_DQ27_D14
M1_DDR_DQ28_D14
M1_DDR_DQ29_D14
M1_DDR_DQ30_D14
M1_DDR_DQ31_D14

M0_DDR_A0_D14
M0_DDR_A1_D14
M0_DDR_A2_D14
M0_DDR_A3_D14
M0_DDR_A4_D14
M0_DDR_A5_D14
M0_DDR_A6_D14
M0_DDR_A7_D14
M0_DDR_A8_D14

M0_DDR_A9_D14
M0_DDR_A10_D14
M0_DDR_A11_D14
M0_DDR_A12_D14
M0_DDR_A13_D14

M0_DDR_BA0_D14

M0_DDR_BA1_D14
M0_DDR_BA2_D14

M0_D_CLK_D14

M0_D_CLKN_D14
M0_DDR_CKE_D14

M0_DDR_ODT_D14
M0_DDR_RASN_D14
M0_DDR_CASN_D14

M0_DDR_WEN_D14

M0_DDR_RESET_N_D14

M0_DDR_DQS0_D14

M0_DDR_DQS_N0_D14

M0_DDR_DQS1_D14

M0_DDR_DQS_N1_D14

M0_DDR_DM0_D14
M0_DDR_DM1_D14

M0_DDR_DQ0_D14

M0_DDR_DQ1_D14
M0_DDR_DQ2_D14
M0_DDR_DQ3_D14
M0_DDR_DQ4_D14
M0_DDR_DQ5_D14
M0_DDR_DQ6_D14
M0_DDR_DQ7_D14

M0_DDR_DQ8_D14
M0_DDR_DQ9_D14

M0_DDR_DQ10_D14
M0_DDR_DQ11_D14
M0_DDR_DQ12_D14
M0_DDR_DQ13_D14
M0_DDR_DQ14_D14
M0_DDR_DQ15_D14

M1_DDR_A0_D14
M1_DDR_A1_D14
M1_DDR_A2_D14
M1_DDR_A3_D14
M1_DDR_A4_D14
M1_DDR_A5_D14
M1_DDR_A6_D14
M1_DDR_A7_D14
M1_DDR_A8_D14

M1_DDR_A9_D14
M1_DDR_A10_D14
M1_DDR_A11_D14
M1_DDR_A12_D14
M1_DDR_A13_D14

M1_DDR_BA0_D14
M1_DDR_BA1_D14
M1_DDR_BA2_D14

M1_D_CLK_D14

M1_D_CLKN_D14
M1_DDR_CKE_D14

M1_DDR_ODT_D14

M1_DDR_RASN_D14
M1_DDR_CASN_D14

M1_DDR_WEN_D14

M1_DDR_RESET_N_D14

M1_DDR_DQS0_D14

M1_DDR_DQS_N0_D14

M1_DDR_DQS1_D14

M1_DDR_DQS_N1_D14

M1_DDR_DM0_D14
M1_DDR_DM1_D14

M1_DDR_DQ0_D14
M1_DDR_DQ1_D14

M1_DDR_DQ2_D14
M1_DDR_DQ3_D14
M1_DDR_DQ4_D14
M1_DDR_DQ5_D14
M1_DDR_DQ6_D14
M1_DDR_DQ7_D14

M1_DDR_DQ8_D14

M1_DDR_DQ9_D14
M1_DDR_DQ10_D14
M1_DDR_DQ11_D14
M1_DDR_DQ12_D14
M1_DDR_DQ13_D14
M1_DDR_DQ14_D14
M1_DDR_DQ15_D14

H5TQ1G63EFR-PBC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

DDR_HYNIX

IC12100

H5TQ1G63EFR-PBC

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
NC_7

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

DDR3
1Gbit
(x16)

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

DDR_HYNIX

IC12101

DDR3
1Gbit
(x16)

VREFCA

VREFDQ

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

M8

H1

L8

ZQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

M0_DDR_VREFCA_D14

M8

H1

R12127

L8

ZQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

M1_DDR_VREFCA_D14

M1_DDR_VREFDQ_D14

R12126

240

1%

M0_DDR_VREFDQ_D14

VDDC15_D14

240

1%

VDDC15_D14

C12108
C12109

C12110
C12111

0.1uF

0.1uF

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

K4B1G1646G-BCK0

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

0.1uF

0.1uF

IC12100-*1

DDR_SAMSUNG

IC12101-*1

K4B1G1646G-BCK0

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

DDR_SAMSUNG

VREFCA

VREFDQ

ZQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

M0_DDR_RASN_D14
M0_DDR_CASN_D14

M0_DDR_RESET_N_D14

M0_DDR_DQS2_D14

M0_DDR_DQS_N2_D14

M0_DDR_DQS3_D14

M0_DDR_DQS_N3_D14

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

M1_DDR_A0_D14
M1_DDR_A1_D14
M1_DDR_A2_D14
M1_DDR_A3_D14
M1_DDR_A4_D14
M1_DDR_A5_D14
M1_DDR_A6_D14
M1_DDR_A7_D14
M1_DDR_A8_D14

M1_DDR_A9_D14
M1_DDR_A10_D14
M1_DDR_A11_D14
M1_DDR_A12_D14
M1_DDR_A13_D14

M1_DDR_BA0_D14
M1_DDR_BA1_D14
M1_DDR_BA2_D14

M1_U_CLK_D14

M1_U_CLKN_D14
M1_DDR_CKE_D14

M1_DDR_ODT_D14

M1_DDR_RASN_D14
M1_DDR_CASN_D14

M1_DDR_WEN_D14

M1_DDR_RESET_N_D14

M1_DDR_DQS2_D14

M1_DDR_DQS_N2_D14

M1_DDR_DQS3_D14

M1_DDR_DQS_N3_D14

M1_DDR_DM2_D14
M1_DDR_DM3_D14

M8

H1

M1_DDR_DQ16_D14

L8

M1_DDR_DQ17_D14

B2
D9
G7

M1_DDR_DQ18_D14

K2
K8
N1

M1_DDR_DQ19_D14

N9
R1
R9

M1_DDR_DQ20_D14

A1
A8

M1_DDR_DQ21_D14

C1
C9
D2

M1_DDR_DQ22_D14

E9
F1
H2

M1_DDR_DQ23_D14

H9

J1
J9
L1
L9
T7

M1_DDR_DQ24_D14

A9

M1_DDR_DQ25_D14

B3
E1
G8
J2

M1_DDR_DQ26_D14

J8
M1
M9

M1_DDR_DQ27_D14

P1
P9
T1

M1_DDR_DQ28_D14

T9

B1

M1_DDR_DQ29_D14

B9
D1
D8

M1_DDR_DQ30_D14

E2
E8
F9

M1_DDR_DQ31_D14

G1
G9

M0_DDR_A0_D14
M0_DDR_A1_D14
M0_DDR_A2_D14
M0_DDR_A3_D14
M0_DDR_A4_D14
M0_DDR_A5_D14
M0_DDR_A6_D14
M0_DDR_A7_D14
M0_DDR_A8_D14

M0_DDR_A9_D14
M0_DDR_A10_D14
M0_DDR_A11_D14
M0_DDR_A12_D14
M0_DDR_A13_D14

M0_DDR_BA0_D14
M0_DDR_BA1_D14
M0_DDR_BA2_D14

M0_U_CLK_D14

M0_U_CLKN_D14
M0_DDR_CKE_D14

M0_DDR_ODT_D14

M0_DDR_WEN_D14

M0_DDR_DM2_D14
M0_DDR_DM3_D14

M0_DDR_DQ16_D14

M0_DDR_DQ17_D14
M0_DDR_DQ18_D14
M0_DDR_DQ19_D14
M0_DDR_DQ20_D14
M0_DDR_DQ21_D14
M0_DDR_DQ22_D14
M0_DDR_DQ23_D14

M0_DDR_DQ24_D14
M0_DDR_DQ25_D14
M0_DDR_DQ26_D14
M0_DDR_DQ27_D14
M0_DDR_DQ28_D14
M0_DDR_DQ29_D14
M0_DDR_DQ30_D14
M0_DDR_DQ31_D14

IC12103

H5TQ1G63EFR-PBC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

DDR_HYNIX

IC12102

H5TQ1G63EFR-PBC

DDR3

N3

A0

1Gbit

P7

A1

(x16)

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

DDR_HYNIX

DDR3
1Gbit
(x16)

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

ZQ

ZQ

M8

H1

L8

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

M0_1_DDR_VREFCA_D14

M8

H1

R12129

L8

240
1%

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

M1_1_DDR_VREFCA_D14

M1_1_DDR_VREFDQ_D14

R12128

240
1%

M0_1_DDR_VREFDQ_D14

VDDC15_D14

C12114
C12115

VDDC15_D14

C12112
C12113

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

0.1uF

0.1uF

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

0.1uF

0.1uF

DDR_SAMSUNG

IC12103-*1

K4B1G1646G-BCK0

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

DDR_SAMSUNG

IC12102-*1

K4B1G1646G-BCK0

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-121-HD

2013.12.17

D14_DDR

+1.1V_VDD_D14

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+12V

L12213

BLM18PG121SN1D

C12277
10uF
16V

1.0V_DCDC_TI

POWER_ON/OFF2_4

C12203

22uF

OPT

2.5V

ZD12200

C12204

0.1uF

C12280-*1
3300pF
50V

C12213

0.1uF
16V

C12212

C12205

22uF

22uF

+1.5V

R12218

18K

R1

1%

C12278

100pF

50V

+1.1V_VDD

R12204
10K

1%

0.1uF

4.7

R12203

5%

OPT

R12221

C12279
1uF
10V

1%

1/1 6W

16V

C12217

30V

10K

91K

1/1 6W

R12 206

27K

RF

R12 205

PGOOD

EN

VBST

NC_1

SW_1

SW_2

SW_3

SW_4

D12200

VREG

C12280
2200pF
50V

1.0V_DCDC_ROHM

C12214
1000pF
50V

R12201 1K

R12200
2K

1/16W
5%

L12200

1uH

R12219

3.6K
1%

R12220
22K
1%

R2

R12202

3.3

1/10W

C12215
470pF
50V

Vout=0.765*(1+R1/R2)=1.516V

[EP]

1

THERMAL

2

3

IC12200

4

TPS53513RVER

5

6

7

8

9

10

PGND_111PGND_212PGND_313PGND_414PGND_5

POWER_ON/OFF2_3

DCDC_ROHM

IC12201

BD9D320EFJ

EN

1

FB

2

3

SS

4

3A

R12207
39K

1/16W
5%

29

8A

THERMAL

TRIP26NC_327GND128GND2

8

9

7

6

5

24VO25

[EP]FIN

VIN

BOOT

SW

GND

23

22

21

20

19

18

17

16

15

FB

GND

MODE

VREG

VDD

NC_2

VIN_3

VIN_2

VIN_1

16V

0.1uF
C12281

NR5040T2R2N

R1

R2

L12214

2.2uH

R12216

R12217

C12220
2200pF
50V

C12282

22uF

10V

4.87K

4.99K

1/16W

1%

1/16W

1%

1%

VDDC15_D14

1/16W

20K

R12222

C12283

22uF
10V

C12221
1uF
10V

EN

VFB

VREG5

SS

ZD12201

OPT

IC12201-*1

TPS54327DDAR

1

2

3

4

2.5V

L12201

DCDC_TI

C12222
10uF
16V

9

THERMAL

+12V

+1.1V_Bypass Cap

+1.1V_VDD_D14

C12223
10uF
16V

0.1uFC12210

C12209 4.7uF

C12207 10uF

C12236 0.1uF

C12239 0.1uF

C12211 10uF

C12200 0.1uF

4th layer

C12230 10uF

C12227 22uF

C12225 0.1uF C12224 10uF

C12228 0.1uF

C12233 1uF

C12206 10uF

4th layer

C12226 22uF

VDDC11_XTAL_D14

L12203

BLM18PG121SN1D

1uFC12216

[EP]GND

VIN

8

VBST

7

SW

6

GND

5

+3.3V_Bypass Cap

+3.3V_NORMAL

VDD33_D14

L12205

BLM18PG121SN1D

22uF

C12218

VDD33_XTAL_D14

L12206

BLM18PG121SN1D

4.7uFC12219

+1.5V_Bypass Cap

VDDC15_D14

22uFC12250

VREF_M0_0_D14

R12208

1K 1%

VREF_M0_1_D14

R12209

1K 1%

+2.5V_Bypass Cap

+2.5V_Normal

L12210

BLM18PG121SN1D

22uF

C12253

VDD25_XTAL_D14

L12209

BLM18PG121SN1D

4.7uFC12254

0.1uF

0.1uF

C12258

C12255

C12251

0.1uF

OPT

C12252

0.1uF

OPT

VDD25_D14

C12259 0.1uF

C12256 10uF

C12257 0.1uF

C12201 10uF

4th layer

R12210

1K 1%

R12211

1K 1%

4th layer

C12208 10uF

VDDC15_D14

22uFC12264

0.1uF

C12267

VREF_M1_0_D14

R12212

1K 1%

VREF_M1_1_D14

R12213

1K 1%

0.1uF

C12268

R12214

1K 1%

C12265

0.1uF
OPT

R12215

1K 1%

C12266

0.1uF
OPT

C12202 10uF

4th layer

VREF_M0_1_D14

VREF_M1_0_D14

VREF_M1_1_D14

VDDC11_XTAL_D14

VDDC15_D14

VDDC15_D14

VDD25_D14

VDD25_XTAL_D14

VDD33_XTAL_D14

VREF_M0_0_D14

+1.1V_VDD_D14

VDD33_D14

AA22

J13
J14
J11
J12

H9
J9

J15

K9

K15

L9

L15

M9
M15
N15

P9
P10
P11
P12
P13
P15

B4

A4

T9
T10
T11
T12
T13
T14
T15
T16
T17

G7

H7

J7

K7

L7

M7

N7

P7

R7

H13
H14
H11
H12
H15

B5

F8
F12
F13
H10
H16
J16
K16
L16
M16
N16
P16

T8

A5

AB3

B1
AA1

A2
A14

B2

C4

C5

D4

D5

D6

D7

D8

D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19

E6

E7

E8

E9

IC12000
LG1512D

AVDD11_HDMI0_1
AVDD11_HDMI0_2
AVDD11_HDMI1_1
AVDD11_HDMI1_2
DVDD11_1
DVDD11_2
DVDD11_3
DVDD11_4
DVDD11_5
DVDD11_6
DVDD11_7
DVDD11_8
DVDD11_9
DVDD11_10
DVDD11_11
DVDD11_12
DVDD11_13
DVDD11_14
DVDD11_15
DVDD11_16
DVDD11_PLL
DVDD11_XTAL

DVDD15_DDR0_1
DVDD15_DDR0_2
DVDD15_DDR0_3
DVDD15_DDR0_4
DVDD15_DDR0_5
DVDD15_DDR0_6
DVDD15_DDR0_7
DVDD15_DDR0_8
DVDD15_DDR0_9
DVDD15_DDR1_1
DVDD15_DDR1_2
DVDD15_DDR1_3
DVDD15_DDR1_4
DVDD15_DDR1_5
DVDD15_DDR1_6
DVDD15_DDR1_7
DVDD15_DDR1_8
DVDD15_DDR1_9

AVDD25_HDMI0_1
AVDD25_HDMI0_2
AVDD25_HDMI1_1
AVDD25_HDMI1_2
DVDD25_OTP
DVDD25_PLL

DVDD33_1
DVDD33_2
DVDD33_3
DVDD33_4
DVDD33_5
DVDD33_6
DVDD33_7
DVDD33_8
DVDD33_9
DVDD33_10
DVDD33_11
DVDD33_12
DVDD33_XTAL

VREF0_DDR0
VREF1_DDR0
VREF0_DDR1
VREF1_DDR1

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25

VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119

E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
F6
F7
F9
F10
F11
F14
F15
F16
F17
F18
F19
G6
G18
G19
H6
H18
H19
J6
J10
J18
J19
K6
K10
K11
K12
K13
K14
K18
L6
L10
L11
L12
L13
L14
L18
M6
M10
M11
M12
M13
M14
M18
N6
N9
N10
N11
N12
N13
N14
N18
P6
P14
P18
R6
R18
R19
R20
T6
T7
T18
T19
U6
U7
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
U18
U19
V4
V5
V19
W4
W5
W19
AA2
AA3
AB2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-122-HD

2013.12.17

XTAL(24.75MHz)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

U14_XTAL_IN

JTAG for U14

P12300

12507WS-08L

U14_DEBUG

P12301

12507WS-04L

C12300
24pF
50V

+3.3V_NORMAL

1

2

3

4

5

6

7

8

9

UART For U14

1

2

3

4

5

X12300

24.75MHz

X-TAL_1

1

GND_1

2

R12300 33

U14_DEBUG

R12301 33

U14_DEBUG

R12302 33

U14_DEBUG

R12304 33

U14_DEBUG

R12303 33

U14_DEBUG

+3.3V_NORMAL

R12305

33

R12306

33

R12307
1M

U14_DEBUG
C12301

0.1uF
16V

C12302

0.1uF
16V

4

3

R12342

GND_2

X-TAL_2

3.3K

C12303

330

R12343

24pF
50V

U14_TDI

U14_TMS

U14_TCLK

U14_TDO

U14_TRST_N

U14_UART_RX_1

U14_UART_TX_1

U14_XTAL_OUT

+3.3V_NORMAL

R12312

10K
OPT

R12313

10K

SMODE[1:0]

- 00 : Normal Mode

- Other : Test Mode



Serial Flash Boot Test

HW RESET

SW12300

JTP-1127WEM

12

U14_SMODE[0]

4 3

+3.3V_NORMAL

R12327

10K
OPT

R12328

10K

U14_HWRESET

U14_SMODE[1]

U14_SPI_CS_M

U14_SPI_MOSI_M

U14_SPI_SCLK_M

U14_SPI_MISO_M

U14_SPI_DL_MODE

U14_FLASH_WP

URSA9_CONNECT

GPIO[0]

+3.3V_NORMAL

R12344

URSA7/URSA9P

R12345

URSA9

URSA9

URSA7

HDMI_RX0-_U14_2
HDMI_RX0+_U14_2

HDMI_RX1-_U14_2
HDMI_RX1+_U14_2

HDMI_RX2-_U14_2
HDMI_RX2+_U14_2

HDMI_CLK-_U14_2

HDMI_CLK+_U14_2

RXASCL_U14

RXASDA_U14

RP_HDMI_D0­RP_HDMI_D0+
RP_HDMI_D1­RP_HDMI_D1+

URSA7/9_SET

H13_CONNECT

Vx1_LOCKn_V
Vx1_LOCKn_O

RP_HDMI_D2­RP_HDMI_D2+
RP_HDMI_CK­RP_HDMI_CK+

RXBSCL_U14

RXBSDA_U14

FHD_D9_SET

U14_FLASH_WP

+3.3V_NORMAL

R12317

10K
OPT

R12318

10K
OPT

+3.3V_NORMAL

R12319

10K
OPT

R12320

100K

GPIO[1]

+3.3V_NORMAL

R12346

URSA7/9_SET

U14_D9

R12347

NOT_D9

10K

10K

10K

10K

GPIO[0]

1920x1080@60p pull-down

2560x1080@60p

1920x1080@60p

2560x1080@60p

pull-down

pull-down

pull-up

pull-up

R12350
R12351
R12352

FHD_D9_SET

AG25
AH25
AG26
AH26
AG27
AH27
AG24
AH24
AF24
AD23
AE23

AF28
AE27
AE28
AD27
AD28
AC27
AF27
AG28
AF26
AC24
AA24

T23
T24
U23
U24
V23
V24

33

W23

33

W24

33

GPIO[1]

pull-up

pull-down

pull-up

IC12300

LG1614

HDMI_RXA0N
HDMI_RXA0P
HDMI_RXA1N
HDMI_RXA1P
HDMI_RXA2N
HDMI_RXA2P
HDMI_RXACN
HDMI_RXACP
HDMI_RXAHPD
HDMI_RXASCL
HDMI_RXASDA

HDMI_RXB0N
HDMI_RXB0P
HDMI_RXB1N
HDMI_RXB1P
HDMI_RXB2N
HDMI_RXB2P
HDMI_RXBCN
HDMI_RXBCP
HDMI_RXBHPD
HDMI_RXBSCL
HDMI_RXBSDA

GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]

PORES_N

SCL_M
SCL_S
SDA_M
SDA_S

SMODE[0]
SMODE[1]

SPI_CS_M
SPI_DI_M
SPI_DO_M

SPI_SCLK_M

SPI_CS_S
SPI_DI_S
SPI_DO_S

SPI_SCLK_S

TRST_N

TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]

UART_RXD
UART_TXD

XTALI
XTALO

HDMI_5V_DETA
HDMI_5V_DETB

LOCKN_D
LOCKN_Q

L_VS

M0_SCLK
M0_MOSI

M1_SCLK
M1_MOSI

+3.3V_NORMAL

R12330

3.3K
OPT

U14_RESET_Switch

AC28

R12337 33

AB26

R12338 33

AA28

R12335 33

AB25

R12336 33

AA27

P3
R3

R12356 33

AD26

R12357 33

AC25

R12358 33

AD25

R12359 33

AC26

R12331 33

AA26

R12332 33

AA25

R12333 33

AB28

R12334

AB27

T1

TCK

U2

TDI

T2

TDO

U1

TMS

R2

L3
M3
N3
N2

R1
P2

AD1
AD2

+3.3V_NORMAL

AF23
AB24

A3
C23

L2

M1
M2

N1
P1

33

I2C_SCL2

I2C_SDA2

U14_SMODE[0]
U14_SMODE[1]

U14_SPI_CS_M

U14_SPI_MISO_M
U14_SPI_MOSI_M
U14_SPI_SCLK_M
SOC_SPI1_CS
SOC_SPI1_MISO
SOC_SPI1_MOSI
SOC_SPI1_SCLK

U14_TCLK
U14_TDI
U14_TDO
U14_TMS
U14_TRST_N

U14_UART_RX_1
U14_UART_TX_1

U14_XTAL_IN
U14_XTAL_OUT

4.7K
R12314

Vx1_LOCKn_O
Vx1_LOCKn_V

R1236033

C12305

0.1uF
16V

U14_RESET_SOC

R1232933

R12315
10K

U14_SPI_CS_M

U14_HWRESET

U14_SPI_DL_MODE

U14_RESET

TXC4P/TX18P

TXC4N/TX18N

TXC3P/TX19P

TXC3N/TX19N

TXCCLKP/TX20P

TXCCLKN/TX20N

TXC2P/TX21P
TXC2N/TX21N

TXC1P/TX22P
TXC1N/TX22N
TXC0P/TX23P

TXC0N/TX23N

TXD4P/TX12P
TXD4N/TX12N
TXD3P/TX13P

TXD3N/TX13N
TXDCLKP/TX14P
TXDCLKN/TX14N

TXD2P/TX15P

TXD2N/TX15N

TXD1P/TX16P
TXD1N/TX16N

TXD0P/TX17P
TXD0N/TX17N

TXA4P/TX6P
TXA4N/TX6N
TXA3P/TX7P

TXA3N/TX7N

TXACLKP/TX8P

TXACLKN/TX8N

TXA2P/TX9P
TXA2N/TX9N

TXA1P/TX10P

TXA1N/TX10N

TXA0P/TX11P

TXA0N/TX11N

TXB4P/TX0P
TXB4N/TX0N
TXB3P/TX1P
TXB3N/TX1N

TXBCLKP/TX2P

TXBCLKN/TX2N

TXB2P/TX3P
TXB2N/TX3N

TXB1P/TX4P

TXB1N/TX4N

TXB0P/TX5P

TXB0N/TX5N

IC12300

LG1614

A27

RXA0N

A26

RXA0P

B27

RXA1N

B28

RXA1P

B26

RXA2N

B25

RXA2P

C26

RXACLKN

C25

RXACLKP

D26

RXA3N

D25

RXA3P

E26

RXA4N

E25

RXA4P

F27

RXB0N

F28

RXB0P

F26

RXB1N

F25

RXB1P

G26

RXB2N

G25

RXB2P

H26

RXBCLKN

H25

RXBCLKP

J26

RXB3N

J25

RXB3P

K27

RXB4N

K28

RXB4P

K26

RXC0N

K25

RXC0P

L26

RXC1N

L25

RXC1P

M26

RXC2N

M25

RXC2P

N26

RXCCLKN

N25

RXCCLKP

P27

RXC3N

P28

RXC3P

P26

RXC4N

P25

RXC4P

R26

RXD0N

R25

RXD0P

T26

RXD1N

T25

RXD1P

U26

RXD2N

U25

RXD2P

V27

RXDCLKN

V28

RXDCLKP

V26

RXD3N

V25

RXD3P

W26

RXD4N

W25

RXD4P

TXA0N
TXA0P
TXA1N
TXA1P
TXA2N

TXA2P
TXACLKN
TXACLKP

TXA3N

TXA3P

TXA4N

TXA4P

TXB0N

TXB0P

TXB1N

TXB1P

TXB2N

TXB2P
TXBCLKN
TXBCLKP

TXB3N

TXB3P

TXB4N

TXB4P

TXC0N

TXC0P

TXC1N

TXC1P

TXC2N

TXC2P
TXCCLKN
TXCCLKP

TXC3N

TXC3P

TXC4N

TXC4P

TXD0N

TXD0P

TXD1N

TXD1P

TXD2N

TXD2P
TXDCLKN
TXDCLKP

TXD3N

TXD3P

TXD4N

TXD4P

TXE0N

TXE0P

TXE1N

TXE1P

TXE2N

TXE2P
TXECLKN
TXECLKP

TXE3N

TXE3P

TXE4N

TXE4P

TXF0N

TXF0P

TXF1N

TXF1P

TXF2N

TXF2P
TXFCLKN
TXFCLKP

TXF3N

TXF3P

TXF4N

TXF4P

A23
B23
D22
C22
D21
C21
D20
C20
D19
C19
A19
B19

D18
C18
D17
C17
D16
C16
D15
C15
A15
B15
D14
C14

D13
C13
D12
C12
D11
C11
A11
B11
D10
C10
D9
C9

D8
C8
D7
C7
A7
B7
D6
C6
D5
C5
B4
A4

A2
B3
B1
B2
C4
C3
D4
D3
E4
E3
F4
F3

F1
F2
G4
G3
H4
H3
J4
J3
K4
K3
K1
K2

Tx_U14_0N
Tx_U14_0P
Tx_U14_1N
Tx_U14_1P
Tx_U14_2N
Tx_U14_2P

Tx_U14_3N
Tx_U14_3P

Tx_U14_4N
Tx_U14_4P
Tx_U14_5N
Tx_U14_5P
Tx_U14_6N
Tx_U14_6P

Tx_U14_7N
Tx_U14_7P

Tx_U14_8N
Tx_U14_8P
Tx_U14_9N
Tx_U14_9P
Tx_U14_10N
Tx_U14_10P
Tx_U14_11N
Tx_U14_11P

VIDEO

OSD

SPI FLASH(4MByte)

U14_SPI_CS_M

U14_SPI_MISO_M

U14_FLASH_WP

R12308
0

1/16W
5%

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R12309
10K

R12311

R12310
10K

OPT

MX25L3206EM2I-12G

CS#

SO/SIO1

33

WP#

GND

Write Protection

- HIGH : Normal Operation

- LOW : Write Protection

IC12301

1

2

3

4

8

7

6

5

VCC

HOLD#

SCLK

SI/SIO0

+3.3V_NORMAL

R12316

3.3K

C12304

0.1uF

U14_SPI_SCLK_M

U14_SPI_MOSI_M

BSD-14Y-UD-123-HD

2013.12.17

U14

IC12300

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LG1614

U14_DDR_A[0-12]

DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]

DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]
DDR_A[13]
DDR_A[14]
DDR_A[15]
DDR_BA[0]
DDR_BA[1]
DDR_BA[2]

DDR_RAS_N
DDR_CAS_N

DDR_WE_N

DDR_ODT
DDR_CKE

DDR_RST_N

DDR_U_CK

DDR_U_CK_N

DDR_D_CK

DDR_D_CK_N

DDR_ZQ_CALIB

DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]

DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]

DDR_DM[0]
DDR_DM[1]

DDR_DQS[0]

DDR_DQS_N[0]

DDR_DQS[1]

DDR_DQS_N[1]

DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]

DDR_DM[2]
DDR_DM[3]

DDR_DQS[2]

DDR_DQS_N[2]

DDR_DQS[3]

DDR_DQS_N[3]

AD13
AD15
AD11
AD9
AE18
AE10
AE17
AD10
AD17
AD12
AE19
AE16
AE15
AE12
AD16
AD14
AE9
AD18
AE13

AE7
AE8
AD8
AD7
AE14
AE11
AF17
AG17
AF8
AG8
AD19

AG5
AG12
AF4
AF11
AH4
AH12
AG4
AF12
AG11
AG6
AF10
AF5
AF9
AH6
AG10
AF6
AH10
AH7

AG7
AF7
AG9
AH9

AG14
AF20
AF13
AG21
AH13
AH21
AG13
AF21
AG20
AG15
AF19
AF14
AF18
AH15
AG19
AF15
AH19
AH16

AG16
AF16
AG18
AH18

R12400

240 1%

U14_DDR_A[0]
U14_DDR_A[1]
U14_DDR_A[2]
U14_DDR_A[3]
U14_DDR_A[4]
U14_DDR_A[5]
U14_DDR_A[6]
U14_DDR_A[7] U14_DDR_A[2]
U14_DDR_A[8]

U14_DDR_A[9]
U14_DDR_A[10]
U14_DDR_A[11]
U14_DDR_A[12]

U14_DDR_BA[0]
U14_DDR_BA[1]
U14_DDR_BA[2]

U14_DDR_RAS
U14_DDR_CAS
U14_DDR_WE
U14_DDR_ODT
U14_DDR_CKE
U14_DDR_RESET
U14_D1_CLK U14_D1_CLK
U14_D1_CLK
U14_D0_CLK
U14_D0_CLK

U14_DDR_DQ[0]
U14_DDR_DQ[1]
U14_DDR_DQ[2]
U14_DDR_DQ[3]
U14_DDR_DQ[4]
U14_DDR_DQ[5]
U14_DDR_DQ[6]
U14_DDR_DQ[7]
U14_DDR_DQ[8]
U14_DDR_DQ[9]

U14_DDR_DQ[10]
U14_DDR_DQ[11]
U14_DDR_DQ[12]
U14_DDR_DQ[13]
U14_DDR_DQ[14]
U14_DDR_DQ[15]

U14_DDR_DM[0]
U14_DDR_DM[1]

U14_DDR_DQS[0]
U14_DDR_DQS[0]
U14_DDR_DQS[1]
U14_DDR_DQS[1]

U14_DDR_DQ[16]
U14_DDR_DQ[17]
U14_DDR_DQ[18]
U14_DDR_DQ[19]
U14_DDR_DQ[20]
U14_DDR_DQ[21]
U14_DDR_DQ[22]
U14_DDR_DQ[23]
U14_DDR_DQ[24]
U14_DDR_DQ[25]
U14_DDR_DQ[26]
U14_DDR_DQ[27]
U14_DDR_DQ[28]
U14_DDR_DQ[29]
U14_DDR_DQ[30]
U14_DDR_DQ[31]

U14_DDR_DM[2]
U14_DDR_DM[3]

U14_DDR_DQS[2]
U14_DDR_DQS[2]
U14_DDR_DQS[3]
U14_DDR_DQS[3]

U14_DDR_DQ[0-15]

U14_DDR_DQ[16-31]

VDDC15_U14_DDR

U14_DDR_A[0-12]

U14_DDR_DQ[0-15]

R12402
10K

U14_DDR_RESET

U14_D1_CLK

R12401

100

U14_D1_CLK

U14_DDR_BA[0]
U14_DDR_BA[1]
U14_DDR_BA[2]

U14_D0_CLK
U14_D0_CLK

U14_DDR_CKE

U14_DDR_ODT
U14_DDR_RAS
U14_DDR_CAS

U14_DDR_WE

U14_DDR_RESET

U14_DDR_DQS[0]
U14_DDR_DQS[0]

U14_DDR_DQS[1]
U14_DDR_DQS[1]

U14_DDR_DM[0]
U14_DDR_DM[1]

U14_DDR_CKE

U14_DDR_A[0]
U14_DDR_A[1]
U14_DDR_A[2]
U14_DDR_A[3]
U14_DDR_A[4]
U14_DDR_A[5]
U14_DDR_A[6]
U14_DDR_A[7]
U14_DDR_A[8]
U14_DDR_A[9]
U14_DDR_A[10]
U14_DDR_A[11]
U14_DDR_A[12]

U14_DDR_DQ[0]
U14_DDR_DQ[1]
U14_DDR_DQ[2]
U14_DDR_DQ[3]
U14_DDR_DQ[4]
U14_DDR_DQ[5]
U14_DDR_DQ[6]
U14_DDR_DQ[7]

U14_DDR_DQ[8]
U14_DDR_DQ[9]
U14_DDR_DQ[10]
U14_DDR_DQ[11]
U14_DDR_DQ[12]
U14_DDR_DQ[13]
U14_DDR_DQ[14]
U14_DDR_DQ[15]

U14_D0_CLK

R12403

100

U14_D0_CLK

R12404
10K

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

IC12400

H5TQ1G63EFR-PBC

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
NC_7

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDC15_U14_DDR

R12405

1K 1%

R12406

1K 1%

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

U14_DDR0_VREFCA

0.1uF

C12400

U14_DDR0_VREFCA

U14_DDR0_VREFDQ

R12407

1%

240

C12401
C12402

VDDC15_U14_DDR

0.1uF

0.1uF

U14_DDR_DQ[16-31]

VDDC15_U14_DDR

R12408

1K 1%

R12409

1K 1%

C12403

U14_DDR_A[0-12]

U14_DDR0_VREFDQ

0.1uF

U14_DDR_A[0]
U14_DDR_A[1]

U14_DDR_A[3]
U14_DDR_A[4]
U14_DDR_A[5]
U14_DDR_A[6]
U14_DDR_A[7]
U14_DDR_A[8]
U14_DDR_A[9]
U14_DDR_A[10]
U14_DDR_A[11]
U14_DDR_A[12]

U14_DDR_BA[0]
U14_DDR_BA[1]
U14_DDR_BA[2]

U14_D1_CLK

U14_DDR_CKE

U14_DDR_ODT
U14_DDR_RAS
U14_DDR_CAS

U14_DDR_WE

U14_DDR_RESET

U14_DDR_DQS[2]
U14_DDR_DQS[2]

U14_DDR_DQS[3]
U14_DDR_DQS[3]

U14_DDR_DM[2]
U14_DDR_DM[3]

U14_DDR_DQ[16]
U14_DDR_DQ[17]
U14_DDR_DQ[18]
U14_DDR_DQ[19]
U14_DDR_DQ[20]
U14_DDR_DQ[21]
U14_DDR_DQ[22]
U14_DDR_DQ[23]

U14_DDR_DQ[24]
U14_DDR_DQ[25]
U14_DDR_DQ[26]
U14_DDR_DQ[27]
U14_DDR_DQ[28]
U14_DDR_DQ[29]
U14_DDR_DQ[30]
U14_DDR_DQ[31]

VDDC15_U14_DDR

R12410

1K 1%

R12411

1K 1%

U14_DDR1_VREFCA

C12404

0.1uF

IC12401

H5TQ1G63EFR-PBC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VDDC15_U14_DDR

R12412

1K 1%

R12413

1K 1%

VREFCA

VREFDQ

ZQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

U14_DDR1_VREFDQ

0.1uF

C12405

U14_DDR1_VREFCA

M8

H1

1%

L8

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

U14_DDR1_VREFDQ

R12414
240

VDDC15_U14_DDR

C12406
C12407

0.1uF

0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-124-HD

2013.12.17

U14 DDR

POWER_ON/OFF2_4

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+1.1V_U14_VDD

OPT

2.5V

ZD12500

+12V

L12500

BLM18PG121SN1D

C12500
10uF
16V

1.0V_DCDC_TI

C12504

22uF

C12543

0.1uF

C12507-*1
3300pF
50V

C12541

22uF

+1.2V_CORE

R12512
10K

1%

1/16W

16V

30V

1/16W

27K

R12513

PGOOD

VBST

NC_1

SW_1

SW_2

SW_3

SW_4

D12500

91K

R12514

RF

1

2

EN

3

4

5

6

7

8

9

C12506

0.1uF
16V

C12544

22uF

C12508
1000pF
50V

R12504 1K

R12501
2K

1/16W
5%

L12501

1uH

R12505

3.3

R12511

1/10W

5%

C12515
470pF
50V

1%

0.1uF

C12519

4.7

OPT

Vout=0.6*(1+R1/R2)

+1.5V_U14_DDR

R12506

10K

R12500

R12502

18K

R1

C12502

100pF

50V

3.6K

1%

1%

R12503
22K
1%

C12505
1uF
10V

R2

Vout=0.765*(1+R1/R2)=1.516V

R12515
39K

1/16W
5%

NC_3

GND1

GND2

[EP]

26

27

28

THERMAL

29

IC12501

TPS53513RVER

8A

10

PGND_111PGND_212PGND_313PGND_414PGND_5

POWER_ON/OFF2_3

DCDC_ROHM

IC12500

BD9D320EFJ

EN

1

FB

2

VREG

3

SS

4

3A

C12507
2200pF
50V

1.0V_DCDC_ROHM

TRIP

THERMAL

+1.1V_U14_VDD

+1.5V_U14_DDR

BLM18PG121SN1D

R1

R12516

3.3K

1/16W

1%

+12V

R2

R12517

3.9K

1/16W

1%

1%

24VO25

FB

23

GND

22

MODE

21

VREG

20

VDD

19

NC_2

18

VIN_3

17

VIN_2

16

VIN_1

15

C12521
2200pF
50V

1/16W

20K

R12518

C12538
1uF
10V

L12502

C12539
10uF
16V

C12540
10uF
16V

VDDC15_U14_DDR

R12507

R12508

+2.5V_Normal

L12507

+1.1V_U14_VDD

+1.5V_U14_DDR

DCDC_TI

IC12500-*1

TPS54327DDAR

EN

C12520

22uF
10V

VFB

VREG5

SS

ZD12501

OPT

[EP]FIN

VIN

8

BOOT

9

7

SW

6

GND

5

16V

0.1uF
C12514

NR5040T2R2N

L12504

2.2uH

C12518

22uF

10V

1

2

3

4

2.5V

THERMAL

[EP]GND

VIN

8

VBST

9

7

SW

6

GND

5

+3.3V_NORMAL

+1.1V_U14_VDD

VDDC15_U14_DDR

L12510

22uF

C12527

VREF_U14_DDR0

1K 1%

0.1uF

OPT

1K 1%

C12526

VDD25_U14_XTAL

BLM18PG121SN1D

VDDC11_U14_XTAL

L12508

BLM18PG121SN1D

VDD33_U14_XTAL

L12509

BLM18PG121SN1D

0.1uF

0.1uF

C12533

C12529

VDDC15_U14_DDR

VREF_U14_DDR1

R12509

1K 1%

R12510

1K 1%

4.7uFC12530

C12534 0.1uF

1uFC12528

C12532 0.1uF

4.7uFC12531

C12535 0.1uF

0.1uF

C12537

4th layer

0.1uF

OPT

AVDDC11_C4TX

C12536

VDD33_U14

VREF_U14_DDR0

VREF_U14_DDR1

10uFC12503

VDDC11_U14_XTAL

VDDC15_U14_DDR

VDD25_U14

VDD25_U14_XTAL

VDD33_U14_XTAL

+2.5V_Normal

VDD25_U14

L12503

BLM18PG121SN1D

AB10
AB11
AB12
AB13
AB14
AB15
AB16
AB17
AB18

AA19
AA20

AA17

AH22

K16
K17
L11
L17
M11
M12
M13
M14
M15
M17
N17
P11
R11
R18
T11
T18
U11
U12
U13
U14
U15
U16
U18
V11
V18
AE1

AE2
L12
L13
L14
L15
L16

AB9

K18
L18
M18
N18
K10
K11
K12
K13
K14
K15
L10
M10
AG1

G9
G17
L21
M21
P10
R10
R21
T10
T21
U10
U21
V10
V21

AF1

AH3

A24
A25
B24
C24
D23

IC12300

LG1614

DVDD11_1
DVDD11_2
DVDD11_3
DVDD11_4
DVDD11_5
DVDD11_6
DVDD11_7
DVDD11_8
DVDD11_9
DVDD11_10
DVDD11_11
DVDD11_12
DVDD11_13
DVDD11_14
DVDD11_15
DVDD11_16
DVDD11_17
DVDD11_18
DVDD11_19
DVDD11_20
DVDD11_21
DVDD11_22
DVDD11_23
DVDD11_24
DVDD11_25
AVDD11_PLL

DVDD11_XTAL
AVDD11_C4TX_1
AVDD11_C4TX_2
AVDD11_C4TX_3
AVDD11_C4TX_4
AVDD11_C4TX_5

DVDD15_DDR_1
DVDD15_DDR_2
DVDD15_DDR_3
DVDD15_DDR_4
DVDD15_DDR_5
DVDD15_DDR_6
DVDD15_DDR_7
DVDD15_DDR_8
DVDD15_DDR_9
DVDD15_DDR_10

AVDD25_LVRX_1
AVDD25_LVRX_2
AVDD25_LVRX_3
AVDD25_LVRX_4
AVDD25_C4TX_1
AVDD25_C4TX_2
AVDD25_C4TX_3
AVDD25_C4TX_4
AVDD25_C4TX_5
AVDD25_C4TX_6
AVDD25_C4TX_7
AVDD25_C4TX_8
AVDD25_PLL

AVDD33_HDMI_1
AVDD33_HDMI_2
DVDD33_1
DVDD33_2
DVDD33_3
DVDD33_4
DVDD33_5
DVDD33_6
DVDD33_7
DVDD33_8
DVDD33_9
DVDD33_10
DVDD33_11
DVDD33_12
DVDD33_13
DVDD33_14
DVDD33_XTAL

VREF0_DDR
VREF1_DDR

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5

+3.3V_NORMAL

D24

VSS_6

E5

VSS_7

E6

VSS_8

E7

VSS_9

E8

VSS_10

E9

VSS_11

E10

VSS_12

E11

VSS_13

E12

VSS_14

E13

VSS_15

E14

VSS_16

E15

VSS_17

E16

VSS_18

E17

VSS_19

E18

VSS_20

E19

VSS_21

E20

VSS_22

E21

VSS_23

E22

VSS_24

E23

VSS_25

E24

VSS_26

F5

VSS_27

F6

VSS_28

F7

VSS_29

F8

VSS_30

F9

VSS_31

F10

VSS_32

F11

VSS_33

F12

VSS_34

F13

VSS_35

F14

VSS_36

F15

VSS_37

F16

VSS_38

F17

VSS_39

F18

VSS_40

F19

VSS_41

F20

VSS_42

F21

VSS_43

F22

VSS_44

F23

VSS_45

F24

VSS_46

G5

VSS_47

G6

VSS_48

G7

VSS_49

G8

VSS_50

G10

VSS_51

G11

VSS_52

G12

VSS_53

G13

VSS_54

G14

VSS_55

G15

VSS_56

G16

VSS_57

G18

VSS_58

G19

VSS_59

G20

VSS_60

G21

VSS_61

G22

VSS_62

G23

VSS_63

G24

VSS_64

H5

VSS_65

H6

VSS_66

H7

VSS_67

H21

VSS_68

H22

VSS_69

H23

VSS_70

H24

VSS_71

J5

VSS_72

J6

VSS_73

J7

VSS_74

J21

VSS_75

J22

VSS_76

J23

VSS_77

J24

VSS_78

K5

VSS_79

K6

VSS_80

K7

VSS_81

K21

VSS_82

K22

VSS_83

K23

VSS_84

K24

VSS_85

L4

VSS_86

L5

VSS_87

L6

VSS_88

L7

VSS_89

L22

VSS_90

L23

VSS_91

L24

VSS_92

VDD33_U14

L12506

BLM18PG121SN1D

IC12300

LG1614

M24

VSS_100

N4

VSS_101

N5

VSS_102

N6

VSS_103

N7

VSS_104

N10

VSS_105

N11

VSS_106

N12

VSS_107

N13

VSS_108

N14

VSS_109

N15

VSS_110

N16

VSS_111

N21

VSS_112

N22

VSS_113

N23

VSS_114

N24

VSS_115

P4

VSS_116

P5

VSS_117

P6

VSS_118

P7

VSS_119

P12

VSS_120

P13

VSS_121

P14

VSS_122

P15

VSS_123

P16

VSS_124

P17

VSS_125

P18

VSS_126

P21

VSS_127

P22

VSS_128

P23

VSS_129

P24

VSS_130

R4

VSS_131

R5

VSS_132

R6

VSS_133

R7

VSS_134

R12

VSS_135

R13

VSS_136

R14

VSS_137

R15

VSS_138

R16

VSS_139

R17

VSS_140

R22

VSS_141

R23

VSS_142

R24

VSS_143

T3

VSS_144

T4

VSS_145

T5

VSS_146

T6

VSS_147

T7

VSS_148

T12

VSS_149

T13

VSS_150

T14

VSS_151

T15

VSS_152

T16

VSS_153

T17

VSS_154

T22

VSS_155

U3

VSS_156

U4

VSS_157

U5

VSS_158

U6

VSS_159

U7

VSS_160

U17

VSS_161

U22

VSS_162

V1

VSS_163

V2

VSS_164

V3

VSS_165

V4

VSS_166

V5

VSS_167

V6

VSS_168

V7

VSS_169

V12

VSS_170

V13

VSS_171

V14

VSS_172

V15

VSS_173

V16

VSS_174

V17

VSS_175

V22

VSS_176

W1

VSS_177

W2

VSS_178

W3

VSS_179

W4

VSS_180

W5

VSS_181

W6

VSS_182

W7

VSS_183

W21

VSS_184

W22

VSS_185

Y1

VSS_186

Y2

VSS_187

Y3

VSS_188

Y4

VSS_189

Y5

VSS_190

Y6

VSS_191

Y7

VSS_192

Y21

VSS_193

VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281

VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

Y22
Y23
Y25
Y26
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA9
AA10
AA11
AA12
AA13
AA14
AA15
AA16
AA18
AA21
AA22
AA23
AB1
AB2
AB3
AB4
AB5
AB6
AB7
AB8
AB19
AB20
AB21
AB22
AB23
AC1
AC2
AC3
AC4
AC5
AC6
AC7
AC8
AC9
AC10
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AD3
AD4
AD5
AD6
AD20
AD21
AD22
AD24
AE3
AE4
AE5
AE6
AE20
AE21
AE22
AE24
AE25
AE26
AF2
AF3
AF22
AF25
AG2
AG3
AG22
AG23
AH2
AH23
M4
M5
M6
M7
M16
M22
M23

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

22uF

22uF

C12545

C12546

C12510 0.1uF

C12511 0.1uF

C12501 0.1uF

10uFC12542

4th layer

22uFC12512

10uFC12513

10uFC12547

C12516 0.1uF

C12517 0.1uF

4th layer

U14 Power

22uFC12522

10uFC12523

C12524 0.1uF

C12525 0.1uF

4th layer

BSD-14Y-UD-125-HD

10uFC12548

+1.1V_U14_VDD

AVDDC11_C4TX

L12505

BLM18PG121SN1D

4.7uFC12509

2013.12.17

C12549 0.1uF

4th layer

EC97 only

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

[50P Vx1
Output wafer]

P13601

FI-RE51S-HF-J-R1500

52

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

C13601 0.1uF

C13602 0.1uF

C13603 0.1uF

C13604 0.1uF

C13605 0.1uF

C13606 0.1uF

C13607 0.1uF

C13608 0.1uF

C13609 0.1uF

C13610 0.1uF

C13611 0.1uF

C13612 0.1uF

C13613 0.1uF

C13614 0.1uF

C13615 0.1uF

C13616 0.1uF

C13617 0.1uF

C13618 0.1uF

C13619 0.1uF

C13620 0.1uF

C13621 0.1uF

C13622 0.1uF

C13623 0.1uF

C13624 0.1uF

T_CON_SYS_POWER_OFF

BURNT_DAMPING_100ohm

Tx_U14_0N

Tx_U14_0P

Tx_U14_1P

Tx_U14_1N

Tx_U14_2P

Tx_U14_2N

Tx_U14_3P

Tx_U14_3N

Tx_U14_4P

Tx_U14_4N

Tx_U14_5P

Tx_U14_5N

Tx_U14_6P

Tx_U14_6N

Tx_U14_7P

Tx_U14_7N

Tx_U14_8P

Tx_U14_8N

Tx_U14_9P

Tx_U14_9N

Tx_U14_10P

Tx_U14_10N

Tx_U14_11P

Tx_U14_11N

URSA_LOCK_V

URSA_LOCK_O

URSA9_CONNECT

FRC_FLASH_WP

URSA_RESET_SoC

T_CON_SYS_POWER_OFF

Compensation_Done

INV_CTL

POWER_ON/OFF2_1

I2C_SCL1

I2C_SDA1

BURNT_DAMPING_0ohm

R13601
0

R13601-*1
100

OSDVIDEO

+3.3V_NORMAL

10K

R13617

EL_DET_3.3V

EL_DET_3.3V_DAMPING_0ohm

EL_DET_3.3V_DAMPING_100ohm

10K

0.1uF

C13625

R13619

R13618

0

EL_DET_22V

R13616

0

R13616-*1

100

LED_R

EL_VDD_DETECT_22V

POWER_DET_1

URSA_LOCK_V

URSA_LOCK_O

Not Used net

I2CS_SDA

I2CS_SCL

+3.3V_NORMAL

10K

R13603

+3.3V_NORMAL

10K

R13602

R13605
100

R13604
100

B

B

10K

R13607

10K

R13606

R13609

10K

C

Q13602
MMBT3904(NXP)

E

R13608

10K

C

Q13601
MMBT3904(NXP)

E

+2.5V_Normal

10K

R13611

C

B

E

+2.5V_Normal

10K

R13610

C

Q13603

B

MMBT3904(NXP)

E

Q13604
MMBT3904(NXP)

Vx1_LOCKn_V

Vx1_LOCKn_O

URSA_LOCK_V

URSA_LOCK_O

1%

B

1%

B

+3.3V_NORMAL

A2[RD]

A1[GN]

C

R13612

220

E

Q13605

MMBT3906(NXP)

C

+3.3V_NORMAL

A2[RD]

A1[GN]

C

R13613

220

E

Q13606

MMBT3906(NXP)

C

22

R13614

LD13601

SAM2333

22

R13615

LD13602

SAM2333

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

2014.01.28

U14_Vx1_Output

Separation of +3.3_NORMAL(For CST)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

MAX A

L2305

BLM18PG121SN1D

Placed on SMD-TOP

C2304

C2325

10uF

10uF

16V

16V

+12V

C2326

0.1uF
16V
OPT

+3.3V_NORMAL

C2332

0.0068uF
50V

R2311

10K

L2309

PGND

VIN

AGND

FB

IC2301

BD86106EFJ

1

2

3

4

6A

9

THERMAL

[EP]

SW_2

8

SW_1

7

EN

6

R2308

6.8K

COMP

5

C2328

0.1uF
16V

Vout=0.8*(1+R1/R2)

2uH

POWER_ON/OFF2_1

C2319
10uF
10V

C2323
100uF

6.3V

C2345
47pF
50V
OPT

R2319

R2320

30K

R2323

10K

1%

1.5K

1/16W

1%

1%

R1

R2

+3.3V_NORMAL

5V

ZD2301

OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-024_02-HD

2013.12.17

HDMI

EC97 only

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V_NORMAL

L2100

BLM18PG121SN1D

VDDP

Tx_U14_0N
Tx_U14_0P
Tx_U14_1N
Tx_U14_1P
Tx_U14_2N
Tx_U14_2P
Tx_U14_3N
Tx_U14_3P

Tx_U14_4N

VIDEO

Tx_U14_4P
Tx_U14_5N
Tx_U14_5P
Tx_U14_6N
Tx_U14_6P
Tx_U14_7N
Tx_U14_7P

Tx_U14_8N
Tx_U14_8P
Tx_U14_9N

OSD

Tx_U14_9P
Tx_U14_10N
Tx_U14_10P
Tx_U14_11N
Tx_U14_11P

C2122
10uF
10V

C2123

0.1uF
16V

C2124

0.1uF
16V

C2125

0.1uF
16V

C2126

0.1uF
16V

C2111
22uF
10V

C2109

0.1uF
16V

4th Layer

C2110
10uF
10V

C2132
10uF
10V

4th Layer

C13304

0.1uF
16V

4th Layer

C2152
10uF
10V

C2131

0.1uF
16V

C2120
10uF
10V

C13302

0.1uF
16V

C2119
10uF
10V

C13305

0.1uF
16V

4th Layer

VDDC

DVDD_DDR

C2104
10uF
10V

C2114
10uF
10V

C2115

0.1uF
16V

C2116

0.1uF
16V

C2117

0.1uF
16V

C2118

0.1uF
16V

C2106
10uF
10V

AVDD_PLL

C2105
10uF
10V

C13308
22uF

VDDC

10V

C2100
10uF
10V

C2101
10uF
10V

4th Layer

L2101

BLM18PG121SN1D

L2102

BLM18PG121SN1D

4th Layer

L2104

BLM18PG121SN1D

L2105

BLM18PG121SN1D

L2106

BLM18PG121SN1D

L2107

BLM18PG121SN1D

AVDD_MOD

AVDDL_MOD

AVDDL_DRV

AVDDL_HDMI_TX_RX

IC2500

LGE7411(URSA9)

AG2

RB0N

AG1

RB0P

AH3

RB1N

AH1

RB1P

AH2

RB2N

AJ3

RB2P

AJ2

RBCKN

AK2

RBCKP

AK1

RB3N

AL1

RB3P

AM2

RB4N

AL2

RB4P

AK3

RC0N

AL3

RC0P

AK4

RC1N

AL4

RC1P

AM4

RC2N

AK5

RC2P

AM5

RCCKN

AL5

RCCKP

AK6

RC3N

AL6

RC3P

AK7

RC4N

AL7

RC4P

AM7

RD0N

AK8

RD0P

AM8

RD1N

AL8

RD1P

AK9

RD2N

AL9

RD2P

AK10

RDCKN

AL10

RDCKP

AM10

RD3N

AK11

RD3P

AM11

RD4N

AL11

RD4P

AK12

RE0N

AL12

RE0P

AK13

RE1N

AL13

RE1P

AM13

RE2N

AK14

RE2P

AM14

RECKN

AL14

RECKP

AK15

RE3N

AL15

RE3P

AK16

RE4N

AL16

RE4P

AE2

C130360.1uF
C130370.1uF
C130380.1uF
C130390.1uF
C130400.1uF
C130410.1uF
C130420.1uF
C130430.1uF

C130440.1uF
C130450.1uF
C130460.1uF
C130470.1uF
C130480.1uF
C130490.1uF
C130500.1uF
C130510.1uF

C130520.1uF
C130530.1uF
C130540.1uF
C130550.1uF
C130560.1uF
C130570.1uF
C130580.1uF
C130590.1uF

AE1
AD2
AE3
AC2
AD3
AC3
AC1

AB2
AB1
AA2
AB3

Y2

AA3

Y3
Y1

W2
W1
V2
W3
U2
V3
U3
U1

VBY1_RXM[0]
VBY1_RXP[0]
VBY1_RXM[1]
VBY1_RXP[1]
VBY1_RXM[2]
VBY1_RXP[2]
VBY1_RXM[3]
VBY1_RXP[3]

VBY1_RXM[4]
VBY1_RXP[4]
VBY1_RXM[5]
VBY1_RXP[5]
VBY1_RXM[6]
VBY1_RXP[6]
VBY1_RXM[7]
VBY1_RXP[7]

VBY1_RXM[8]
VBY1_RXP[8]
VBY1_RXM[9]
VBY1_RXP[9]
VBY1_RXM[10]
VBY1_RXP[10]
VBY1_RXM[11]
VBY1_RXP[11]

VX1_0­VX1_0+
VX1_1­VX1_1+
VX1_2­VX1_2+
VX1_3­VX1_3+
VX1_4­VX1_4+
VX1_5­VX1_5+
VX1_6­VX1_6+
VX1_7­VX1_7+
VX1_8­VX1_8+
VX1_9-

VX1_9+
VX1_10­VX1_10+
VX1_11­VX1_11+
VX1_12­VX1_12+
VX1_13­VX1_13+
VX1_14­VX1_14+
VX1_15­VX1_15+
VX1_16­VX1_16+
VX1_17­VX1_17+
VX1_18­VX1_18+
VX1_19­VX1_19+

VX1_HTDPN
VX1_LOCKN

AM17
AK17
AL18
AK18
AM19
AL19
AL20
AM20
AK22
AL21
AK23
AM22
AK24
AL23
AL25
AK25
AM26
AK26
AL27
AK27
AM28
AL28
AL29
AM29
AM31
AL30
AL32
AL31
AK31
AK32
AJ30
AJ31
AH30
AH32
AG30
AG31
AE31
AF30
AD32
AE30

AH29
AG29

C130080.1uF
C130090.1uF
C130100.1uF
C130110.1uF
C130120.1uF

C130140.1uF
C130150.1uF
C130160.1uF
C130170.1uF
C130180.1uF
C130190.1uF
C130200.1uF
C130210.1uF
C130220.1uF
C130230.1uF
C130240.1uF
C130250.1uF
C130260.1uF
C130270.1uF
C130280.1uF
C130290.1uF
C130300.1uF
C130310.1uF
C130640.1uF
C130650.1uF
C130660.1uF
C130670.1uF
C130680.1uF
C130690.1uF
C130700.1uF
C130710.1uF

R1938
10K

URSA_TX_HTPD_pulldown

LOCKAn

R1939
10K

TXDBN7_L
TXDBP7_L
TXDBN6_L
TXDBP6_L
TXDBN5_L
TXDBP5_LC130130.1uF
TXDBN4_L
TXDBP4_L
TXDBN3_L
TXDBP3_L
TXDBN2_L
TXDBP2_L
TXDBN1_L
TXDBP1_L
TXDBN0_L
TXDBP0_L
TXDAN7_L
TXDAP7_L
TXDAN6_L
TXDAP6_L
TXDAN5_L
TXDAP5_L
TXDAN4_L
TXDAP4_L
TXDAN3_L
TXDAP3_L
TXDAN2_L
TXDAP2_L
TXDAN1_L
TXDAP1_L
TXDAN0_L
TXDAP0_L

1%

B

HTPDAn

+3.3V_NORMAL

A2[RD]

A1[GN]

C

R1943

220

E

Q1901
MMBT3906(NXP)

C

22

R1952

LD1900

SAM2333

C2137
1uF
10V

C2153
10uF
10V

C13303

0.1uF
16V

C2128
1uF
10V

C2151
1uF
10V

C2127
1uF
10V

C2144

0.1uF
16V

4th Layer

C2154
10uF
10V

C2138

0.1uF
16V

C2147

0.1uF
16V

C2143

0.1uF
16V

C2142

0.1uF
16V

4th Layer

C2148

0.1uF
16V

C2145

0.1uF
16V

C13306

0.1uF
16V

C2149

0.1uF
16V

C13307

0.1uF
16V

C2150
10uF
10V

4th Layer

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

L13300

BLM18PG121SN1D

AVDDL_LVDSRX

C13300
10uF
10V

C13301

0.1uF
16V

BSD-14Y-UD-128-HD

2013.12.17

U_LVDS INPUT

EC97] REVERS Cable

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

[51P Vx1
output wafer]

51pin_Wafer

P13000

FI-RE51S-HF-J-R1500

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

OPT

R13033 10K

R13017 0

R13049 0

R13018 0

R13048 0

OPT

R13011 0

HTPDn_IN

LOCKn_IN

TXDBP7_L

TXDBN7_L

TXDBP6_L

TXDBN6_L

TXDBP5_L

TXDBN5_L

TXDBP4_L

TXDBN4_L

TXDBP3_L

TXDBN3_L

TXDBP2_L

TXDBN2_L

TXDBP1_L

TXDBN1_L

TXDBP0_L

TXDBN0_L

OPT

EL_VDD_DETECT_22V

EL_VDD_DETECT_22V

COMP_DONE_100ohm

COMP_DONE_0ohm

0

R13000

R13001 0

R13008

R13009

10K

10K

OPT

+3.3V_NORMAL

R13003
10K
OPT

R13004
10K

L/D_EN(Pin30)

+3.3V_NORMAL

R13034
10K
OPT

R13037 0

R13007

10K
OPT

- T-Con L/D Function
HIGH : Enable
LOW or NC : Disable

*LGD_120Hz: T240 module (UB98/95,D9)

L_DIM_EN

OPT

INV_ON Monitering (AC Image sticking Protection)

INV_ON Monitering

R13063
100K

RESET_IC_ROHM

IC13001

BD48K28G

INV_CTL

INV_ON Monitering

C13001

0.1uF
16V

VDD

VOUT

2

3

1

GND

100

R13000-*1

OPT

R13002 0

R13010
10K

+3.3V_NORMAL

R13064
10K
OPT

INV_ON Monitering

Compensation_Done

INV_CTL

T_CON_SYS_POWER_OFF

RESET_IC_DIODES

IC13001-*1

APX803D29

RESET

2

1

EL_VDD_DETECT_22V

not to RESET

C13002

at 8kV ESD

0.1uF
16V

+3.3V_NORMAL

IC13000

AZ1117EH-ADJTRG1

OUTIN

[41P Vx1

ADJ/GND

output wafer]

41pin_Wafer

+3.3V_NORMAL

R13040
10K

OPT

R13015 0

OPT

R13041
10K

Data_Format_0

Data Input Format[1:0]

*Mode 3 (4 Division)

+3.3V_NORMAL

R13044
10K

R13016 0

R13045

TCON_I2C_EN

G

R13055

33

S

R13059

33

D

OPT

G

D

OPT

R13061 0

TCON_I2C_EN

R13062 0

LOCKn_IN

HTPDn_IN

S

Q13004

2N7002A

Q13005
2N7002A

VCC

3

GND

10K

I2C_SDA1

I2C_SCL1

+1.8V

R1504

1.5K

R1505

4.7K

S

R221
0

URSA_TX_HTPD_Pullup

- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = High

*Mode 2 (2 Division)

- Data Format 0(Pin37) = High
Data Format 1(Pin36) = Low

OPT

OPT

Q1404

G

AO3438

D

+1.8V

R209

4.7K

URSA_TX_HTPD_Pullup

Data_Format_1

Vx1 LOCKAn/HTPDn

LOCKAn

+3.3V_NORMAL

R211

1.5K

G

URSA_TX_HTPD_Pullup

S

Q203
AO3438

URSA_TX_HTPD_Pullup

R220
0
OPT

D

R222
10K

URSA_TX_HTPD_Pullup

HTPDAn

P13001

FI-RE41S-HF-J-R1500

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

TXDAP7_L

TXDAN7_L

TXDAP6_L

TXDAN6_L

TXDAP5_L

TXDAN5_L

TXDAP4_L

TXDAN4_L

TXDAP3_L

TXDAN3_L

TXDAP2_L

TXDAN2_L

TXDAP1_L

TXDAN1_L

TXDAP0_L

TXDAN0_L

Not Used Net (EC97)

+1.8V

75

R13036

33

R13042

3D_EN
Data_Format_0
Data_Format_1
L_DIM_EN

R13035
1

C13034
10uF
10V

C13035
10uF
10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-130-HD

2013.12.17

Output_wafer

A_DDR3_DQ[0-15]

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

A_DDR3_DQ[16-31]

A_DDR3_A[0]
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]

A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]
A_DDR3_A[14]
A_DDR3_A[15]

A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]

A_DDR3_RASZ
A_DDR3_CASZ

A_DDR3_WEZ
A_DDR3_ODT
A_DDR3_CKE

A_DDR3_RESET

A_DDR3_MCLK
A_DDR3_MCLKZ

A_DDR3_CSB1
A_DDR3_CSB2

A_DDR3_DM0
A_DDR3_DM1

A_DDR3_DQS0

A_DDR3_DQS0B

A_DDR3_DQS1

A_DDR3_DQS1B

A_DDR3_DM2
A_DDR3_DM3

A_DDR3_DQS2

A_DDR3_DQS2B

A_DDR3_DQS3

A_DDR3_DQS3B

A_DDR3_DQ[0]

A_DDR3_DQ[1]

A_DDR3_DQ[2]

A_DDR3_DQ[3]

A_DDR3_DQ[4]

A_DDR3_DQ[5]

A_DDR3_DQ[6]

A_DDR3_DQ[7]

A_DDR3_DQ[8]

A_DDR3_DQ[9]

A_DDR3_DQ[10]

A_DDR3_DQ[11]

A_DDR3_DQ[12]

A_DDR3_DQ[13]

A_DDR3_DQ[14]

A_DDR3_DQ[15]

A_DDR3_DQ[16]

A_DDR3_DQ[17]

A_DDR3_DQ[18]

A_DDR3_DQ[19]

A_DDR3_DQ[21]

A_DDR3_DQ[22]

A_DDR3_DQ[23]

A_DDR3_DQ[24]

A_DDR3_DQ[25]

A_DDR3_DQ[26]

A_DDR3_DQ[27]

A_DDR3_DQ[28]

A_DDR3_DQ[29]

A_DDR3_DQ[30]

A_DDR3_DQ[31]

LGE7411(URSA9)

F14

A_DDR3_A0

B13

A_DDR3_A1

E13

A_DDR3_A2

D13

A_DDR3_A3

C14

A_DDR3_A4

F13

A_DDR3_A5

C13

A_DDR3_A6

B10

A_DDR3_A7

A12

A_DDR3_A8

C10

A_DDR3_A9

A14

A_DDR3_A10

B12

A_DDR3_A11

F15

A_DDR3_A12

C11

A_DDR3_A13

C12

A_DDR3_A14

D17

A_DDR3_A15

E14

A_DDR3_BA0

B14

A_DDR3_BA1

E15

A_DDR3_BA2

E17

A_DDR3_RASZ

C17

A_DDR3_CASZ

C16

A_DDR3_WEZ

F17

A_DDR3_ODT

C15

A_DDR3_CKE

B11

A_DDR3_RESETB

B16

A_DDR3_MCLK

A16

A_DDR3_MCLKZ

C9

A_DDR3_CSB1

A9

A_DDR3_CSB2

D23

A_DDR3_DQ0

A19

A_DDR3_DQ1

E22

A_DDR3_DQ2

B18

A_DDR3_DQ3

C23

A_DDR3_DQ4

C18

A_DDR3_DQ5

B22

A_DDR3_DQ6

A18

A_DDR3_DQ7

E19

A_DDR3_DQ8

B21

A_DDR3_DQ9

F18

A_DDR3_DQ10

C22

A_DDR3_DQ11

D20

A_DDR3_DQ12

F22

A_DDR3_DQ13

E18

A_DDR3_DQ14

D22

A_DDR3_DQ15

B19

A_DDR3_DM0

E21

A_DDR3_DM1

A21

A_DDR3_DQS0

B20

A_DDR3_DQS0B

C20

A_DDR3_DQS1

C19

A_DDR3_DQS1B

B27

A_DDR3_DQ16

A24

A_DDR3_DQ17

C27

A_DDR3_DQ18

C24

A_DDR3_DQ19

A28

A_DDR3_DQ20

E24

A_DDR3_DQ21

B28

A_DDR3_DQ22

B23

A_DDR3_DQ23

D25

A_DDR3_DQ24

E27

A_DDR3_DQ25

C25

A_DDR3_DQ26

D28

A_DDR3_DQ27

E26

A_DDR3_DQ28

E28

A_DDR3_DQ29

E25

A_DDR3_DQ30

C28

A_DDR3_DQ31

B24

A_DDR3_DM2

B26

A_DDR3_DM3

B25

A_DDR3_DQS2

A25

A_DDR3_DQS2B

D26

A_DDR3_DQS3

C26

A_DDR3_DQS3B

URSA9_NON_D9

IC2500

B_DDR3_A0
B_DDR3_A1
B_DDR3_A2
B_DDR3_A3
B_DDR3_A4
B_DDR3_A5
B_DDR3_A6
B_DDR3_A7
B_DDR3_A8

B_DDR3_A9
B_DDR3_A10
B_DDR3_A11
B_DDR3_A12
B_DDR3_A13
B_DDR3_A14
B_DDR3_A15
B_DDR3_BA0
B_DDR3_BA1
B_DDR3_BA2

B_DDR3_RASZ
B_DDR3_CASZ

B_DDR3_WEZ
B_DDR3_ODT
B_DDR3_CKE

B_DDR3_RESETB

B_DDR3_MCLK

B_DDR3_MCLKZ

B_DDR3_CSB1
B_DDR3_CSB2

B_DDR3_DQ0
B_DDR3_DQ1
B_DDR3_DQ2
B_DDR3_DQ3
B_DDR3_DQ4
B_DDR3_DQ5
B_DDR3_DQ6
B_DDR3_DQ7
B_DDR3_DQ8
B_DDR3_DQ9

B_DDR3_DQ10
B_DDR3_DQ11
B_DDR3_DQ12
B_DDR3_DQ13
B_DDR3_DQ14
B_DDR3_DQ15

B_DDR3_DM0
B_DDR3_DM1

B_DDR3_DQS0

B_DDR3_DQS0B

B_DDR3_DQS1

B_DDR3_DQS1B

B_DDR3_DQ16
B_DDR3_DQ17
B_DDR3_DQ18
B_DDR3_DQ19
B_DDR3_DQ20
B_DDR3_DQ21
B_DDR3_DQ22
B_DDR3_DQ23
B_DDR3_DQ24
B_DDR3_DQ25
B_DDR3_DQ26
B_DDR3_DQ27
B_DDR3_DQ28
B_DDR3_DQ29
B_DDR3_DQ30
B_DDR3_DQ31

B_DDR3_DM2
B_DDR3_DM3

B_DDR3_DQS2

B_DDR3_DQS2B

B_DDR3_DQS3

B_DDR3_DQS3B

B_DDR3_BA[0]
B_DDR3_BA[1]
B_DDR3_BA[2]

B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_ODT
B_DDR3_CKE
B_DDR3_RESET

B_DDR3_MCLK

B_DDR3_MCLKZ
B_DDR3_CSB1
B_DDR3_CSB2

B_DDR3_DM0
B_DDR3_DM1

B_DDR3_DQS0
B_DDR3_DQS0B
B_DDR3_DQS1
B_DDR3_DQS1B

B_DDR3_DM2
B_DDR3_DM3

B_DDR3_DQS2
B_DDR3_DQS2B
B_DDR3_DQS3
B_DDR3_DQS3B

B_DDR3_A[0-15]

B_DDR3_DQ[0-15]

B_DDR3_DQ[16-31]

B_DDR3_A[0]

H27

B_DDR3_A[1]

G31

B_DDR3_A[2]

G28

B_DDR3_A[3]

G29

B_DDR3_A[4]

H30

B_DDR3_A[5]

G27

B_DDR3_A[6]

G30

B_DDR3_A[7]

D31

B_DDR3_A[8]

F32

B_DDR3_A[9]

D30

B_DDR3_A[10]

H32

B_DDR3_A[11]

F31

B_DDR3_A[12]

J27

B_DDR3_A[13]

E30

B_DDR3_A[14]

F30

B_DDR3_A[15]

L29
H28
H31
J28

L28
L30
K30
L27
J30
E31
K31
K32
C30
C32

B_DDR3_DQ[0]

U29

B_DDR3_DQ[1]

N32

B_DDR3_DQ[2]

T28

B_DDR3_DQ[3]

M31

B_DDR3_DQ[4]

U30

B_DDR3_DQ[5]

M30

B_DDR3_DQ[6]

T31

B_DDR3_DQ[7]

M32

B_DDR3_DQ[8]

N28

B_DDR3_DQ[9]

R31

B_DDR3_DQ[10]

M27

B_DDR3_DQ[11]

T30

B_DDR3_DQ[12]

P29

B_DDR3_DQ[13]

T27

B_DDR3_DQ[14]

M28

B_DDR3_DQ[15]

T29
N31
R28

R32
P31
P30
N30

B_DDR3_DQ[16]

AA31

B_DDR3_DQ[17]

V32

B_DDR3_DQ[18]

AA30

B_DDR3_DQ[19]

V30

B_DDR3_DQ[20]

AB32

B_DDR3_DQ[21]

V28

B_DDR3_DQ[22]

AB31

B_DDR3_DQ[23]

U31

B_DDR3_DQ[24]

W29

B_DDR3_DQ[25]

AA28

B_DDR3_DQ[26]

W30

B_DDR3_DQ[27]

AB29

B_DDR3_DQ[28]

Y28

B_DDR3_DQ[29]

AB28

B_DDR3_DQ[30]

W28

B_DDR3_DQ[31]

AB30
V31
Y31

W31
W32
Y29
Y30

DDR PHY VREF

+1.5V_U_DDR

R13110
1K
1%

C13202

R13111
1K

0.1uF

1%

+1.5V_U_DDR

U_MVREFCA_B0

R13108
1K
1%

R13109

C13201

1K

0.1uF

1%

A_DDR3_CKE

+1.5V_U_DDR

R13102
1K

A_DDR3_RESET

B_DDR3_CKE

+1.5V_U_DDR

R13103
1K

B_DDR3_RESET

U_MVREFCA_A0

1000pF

C13209
1000pF

C13210

+1.5V_U_DDR

U_MVREFCA_A1

R13120
1K
1%

C13222

0.1uF

C13230

1000pF

A_DDR3_A[0]
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]

A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]

R13121
1K
1%

A_DDR3_A[15]

+1.5V_U_DDR

R13118
1K
1%

R13119
1K
1%

U_MVREFCA_B1

C13221

0.1uF

C13229
1000pF

A_DDR3_MCLK

A_DDR3_MCLKZ

A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]

56

C13233

R13122

0.01uF
56

R13123

A_DDR3_CKE

A_DDR3_CSB1

A_DDR3_ODT
A_DDR3_RASZ
A_DDR3_CASZ

A_DDR3_WEZ

A_DDR3_RESET

A_DDR3_DQS0

A_DDR3_DQS0B

A_DDR3_DQS1

A_DDR3_DQS1B

A_DDR3_DM0

A_DDR3_DQ[0-15]

R13112
1K

R13113
1K

A_DDR3_DM1

A_DDR3_DQ[0]

A_DDR3_DQ[1]

A_DDR3_DQ[2]

A_DDR3_DQ[3]

A_DDR3_DQ[4]

A_DDR3_DQ[5]

A_DDR3_DQ[6]

A_DDR3_DQ[7]

A_DDR3_DQ[8]

A_DDR3_DQ[9]

A_DDR3_DQ[10]

A_DDR3_DQ[11]

A_DDR3_DQ[12]

A_DDR3_DQ[13]

A_DDR3_DQ[14]

A_DDR3_DQ[15]

DDR_HYNIX

IC2600

H5TQ1G63EFR-RDC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

U_MVREFCA_A0

M8

H1

R13126 240

L8

ZQ

1%

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_U_DDR

+1.5V_U_DDR

A_DDR3_A[14]

K4B1G1646G-BCMA

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

DDR_SAMSUNG

IC2600-*1

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

A_DDR3_A[0]
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]

A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]
A_DDR3_A[14]
A_DDR3_A[15]

A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]

A_DDR3_MCLK

A_DDR3_MCLKZ

A_DDR3_CKE

A_DDR3_CSB2

A_DDR3_ODT
A_DDR3_RASZ
A_DDR3_CASZ

A_DDR3_WEZ

A_DDR3_RESET

DDR_VTT_URSA_1

AR13100
100

AR13102
100

AR13104

AR13106

100

100

A_DDR3_DQ[16-31]

AR13108
100

AR13110
100

A_DDR3_DQS2

A_DDR3_DQS2B

A_DDR3_DQS3

A_DDR3_DQS3B

A_DDR3_DM2
A_DDR3_DM3

AR13112
100

A_DDR3_DQ[16]

A_DDR3_DQ[17]

A_DDR3_DQ[18]

A_DDR3_DQ[19]

A_DDR3_DQ[20]

A_DDR3_DQ[21]

A_DDR3_DQ[22]A_DDR3_DQ[20]

A_DDR3_DQ[23]

A_DDR3_DQ[24]

A_DDR3_DQ[25]

A_DDR3_DQ[26]

A_DDR3_DQ[27]

A_DDR3_DQ[28]

A_DDR3_DQ[29]

A_DDR3_DQ[30]

A_DDR3_DQ[31]

DDR_HYNIX

IC2700

H5TQ1G63EFR-RDC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

U_MVREFCA_A1

M8

H1

R13134 240

L8

ZQ

1%

+1.5V_U_DDR

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_U_DDR

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A_DDR3_A[14]

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

K4B1G1646G-BCMA

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

DDR_SAMSUNG

IC2700-*1

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

DDR_VTT_URSA

DDR_VTT_URSA

+1.5V_U_DDR

C13104

0.1uF
16V

+1.5V_U_DDR

C13102

0.1uF
16V

* DDR_VTT

+1.5V_U_DDR

R13100

DDR_VTT_URSA

L13100

CIS21J121

C13110
10uF

DDR_VTT_URSA_0

L13102

BLM18PG121SN1D

C13181
1uF
25V

DDR_VTT_URSA_1

L13103

BLM18PG121SN1D

C13112
1uF
25V

Decap removed

Close to DDR Power pin

C13117

C13109

0.1uF

0.1uF
16V

16V

Close to DDR Power pin

C13107

C13115

0.1uF

1uF

16V

25V

B_DDR3_A[0]
B_DDR3_A[1]
B_DDR3_A[2]
B_DDR3_A[3]
B_DDR3_A[4]
B_DDR3_A[5]
B_DDR3_A[6]
B_DDR3_A[7]
B_DDR3_A[8]

B_DDR3_A[9]
B_DDR3_A[10]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[13]
B_DDR3_A[14]
B_DDR3_A[15]

B_DDR3_BA[0]
B_DDR3_BA[1]
B_DDR3_BA[2]

B_DDR3_MCLK

B_DDR3_MCLKZ

B_DDR3_CKE

B_DDR3_CSB2

B_DDR3_ODT
B_DDR3_RASZ
B_DDR3_CASZ

B_DDR3_WEZ

B_DDR3_RESET

DDR_VTT_URSA_0

AR13101
100

AR13103
100

AR13105

AR13107

100

100

B_DDR3_DQ[16-31]

AR13109
100

AR13111
100

B_DDR3_DQS2

B_DDR3_DQS2B

B_DDR3_DQS3

B_DDR3_DQS3B

B_DDR3_DM2
B_DDR3_DM3

AR13113
100

B_DDR3_DQ[16]

B_DDR3_DQ[17]

B_DDR3_DQ[18]

B_DDR3_DQ[19]

B_DDR3_DQ[20]

B_DDR3_DQ[21]

B_DDR3_DQ[22]

B_DDR3_DQ[23]

B_DDR3_DQ[24]

B_DDR3_DQ[25]

B_DDR3_DQ[26]

B_DDR3_DQ[27]

B_DDR3_DQ[28]

B_DDR3_DQ[29]

B_DDR3_DQ[30]

B_DDR3_DQ[31]

DDR_HYNIX

IC2900

H5TQ1G63EFR-RDC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

U_MVREFCA_B1

M8

H1

R13135 240

L8

ZQ

1%

+1.5V_U_DDR

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_U_DDR

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

B_DDR3_A[14]

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

IC2900-*1

K4B1G1646G-BCMA

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

DDR_SAMSUNG

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

+3.3V_NORMAL

C13147

0.1uF

L13101

CIS21J121

C13154

0.1uF
16V

C13150
4700pF

C13156

0.1uF
16V

C13199
10uF
10V

C13164

0.1uF
16V

C13162
10uF
10V

C13172
1uF
25V

C13170

0.1uF
16V

C13178

0.1uF
16V

C13176

0.1uF
16V

C13186

0.1uF
16V

C13184

0.1uF
16V

C13194
10uF
10V

C13192

0.1uF
16V

C13198

0.1uF
16V

C13196

0.1uF
16V

C13206

0.1uF
16V

C13204

0.1uF
16V

C13214

0.1uF
16V

C13212
1uF
25V

C13218

0.1uF
16V

C13216

0.1uF
16V

C13226
1uF
25V

C13224

0.1uF
16V

C13232

0.1uF
16V

C13100
10uF
10V

C13101
10uF
10V

B_DDR3_MCLK

B_DDR3_MCLKZ

56

C13234

0.01uF
56

B_DDR3_DQ[0-15]

B_DDR3_A[0]
B_DDR3_A[1]
B_DDR3_A[2]
B_DDR3_A[3]
B_DDR3_A[4]
B_DDR3_A[5]
B_DDR3_A[6]
B_DDR3_A[7]
B_DDR3_A[8]

B_DDR3_A[9]
B_DDR3_A[10]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[13]

B_DDR3_A[15]

R13124

R13125

B_DDR3_BA[0]
B_DDR3_BA[1]
B_DDR3_BA[2]

B_DDR3_CKE

B_DDR3_CSB1

B_DDR3_ODT
B_DDR3_RASZ
B_DDR3_CASZ

B_DDR3_WEZ

B_DDR3_RESET

B_DDR3_DQS0

B_DDR3_DQS0B

B_DDR3_DQS1

B_DDR3_DQS1B

B_DDR3_DM0

B_DDR3_DM1

B_DDR3_DQ[0]

B_DDR3_DQ[1]

B_DDR3_DQ[2]

B_DDR3_DQ[3]

B_DDR3_DQ[4]

B_DDR3_DQ[5]

B_DDR3_DQ[6]

B_DDR3_DQ[7]

B_DDR3_DQ[8]

B_DDR3_DQ[9]

B_DDR3_DQ[10]

B_DDR3_DQ[11]

B_DDR3_DQ[12]

B_DDR3_DQ[13]

B_DDR3_DQ[14]

B_DDR3_DQ[15]

DDR_HYNIX

IC2800

H5TQ1G63EFR-RDC

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_7

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

U_MVREFCA_B0

M8

H1

R13127 240

L8

ZQ

1%

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_U_DDR

+1.5V_U_DDR

B_DDR3_A[14]

K4B1G1646G-BCMA

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

DDR_SAMSUNG

IC2800-*1

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

[EP]

VIN

10

PGOOD

11

9

GND

8

EN

7

REFOUT

6

Close to REFOUT pin

C13105

0.1uF
16V

C13106

0.1uF
16V

C13146

0.1uF
16V

C13144

0.1uF
16V

C13122

1000pF

C13123
22uF

10V

C13113
10uF

C13179

0.1uF
16V

C13132

0.1uF
16V

C13128

0.1uF
16V

C13126

0.1uF
16V

IC13100

TPS51200DRCR

REFIN

1

VLDOIN

2

THERMAL

VO

3

PGND

4

VOSNS

5

C13151

C13189

0.1uF

0.1uF
16V

16V

C13158

C13174

0.1uF

0.1uF

16V

16V

C13137

0.1uF
16V

C13135

0.1uF
16V

1%

10K

R13101

10K
1%

C13111
10uF

4th layer

+1.5V_U_DDR

C13103

0.1uF
16V

+1.5V_U_DDR

C13195

0.1uF
16V

Close to DDR Power pin
Decap removed

C13116

C13108

0.1uF

0.1uF
16V

16V

Close to DDR Power pin
Decap removed

4th layer

BSD-14Y-UD-131-HD

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

2013.12.17

URSA7_DDR

Clock for URSA9

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Option Name
UB98/UC9_URSA9_crystalcap

C1903

5pF

50V

GND_1

1

2

3

C1904

5pF

50V

Option Name
UB85/95/UC97_URSA9_crystalcap

C1904-*1
8pF
50V

4

X-TAL_2

C1903-*1
8pF
50V

X-TAL_1

X1900

24MHz

GND_2

R1925

1M

XIN_URSA

XO_URSA

SW1901

JTP-1127WEM

1

+3.3V_NORMAL

2

43

D1900

100V

1N4148W

R1923

10K

OPT

C1902
22uF
10V

+3.3V_NORMAL

0

R1924

URSA Reset

R1919
10K
URSA9_RST_PULLUP

URSA_RESET

URSA_RESET_SoC

0

R1930

AF29

RESET

R3

XTALO

R4

XTALI

AJ24

I2CS_SDA

AH24

I2CS_SCL

AH26

I2CM_SDA

AG24

I2CM_SCL/VSYNC_LIKE1

B4

GPIO[0][UART2_TX]

A4

GPIO[1][UART2_RX]

B5

GPIO[2][UART1_TX]

A5

GPIO[3][UART1_RX]

AD28

SPI_CZ

AD30

SPI_CK

AC31

SPI_DI

AD29

SPI_DO

AE28

INT_R21/GPIO[41]

AE27

INT_R20/GPIO[42]

C4

IRE

AC27

GND_1

AD27

GND_2

A7

NC_1

B6

NC_2

B7

NC_3

C5

NC_4

C6

NC_5

C7

NC_6

D4

NC_7

D5

NC_8

D6

NC_9

D7

NC_10

E4

NC_11

E5

NC_12

E6

NC_13

E7

NC_14

F4

NC_15

F5

NC_16

M5

NC_17

M6

NC_18

M7

NC_19

N5

NC_20

R7

NC_21

P7

NC_22

N7

NC_23

N6

NC_24

URSA_D9

IC2500-*1

LGE7412(URSA9)

I2C_HSC_SDA/VSYNC_LIKE2
I2C_HSC_SCL/VSYNC_LIKE3

SPI1_CK/PWM2/GPIO58
SPI1_DI/PWM3/GPIO59
SPI2_CK/PWM0/GPIO56

SPI2_DI/PWM1/GPIO57
SPI3_CK/DIM10/GPIO54
SPI3_DI/DIM11/GPIO55

SPI4_CK/DIM8/GPIO52

SPI4_DI/DIM9/GPIO53

VSYNC_LIKE/PWM5/GPIO40

DIM0/GPIO[32]
DIM1/GPIO[33]
DIM2/GPIO[34]
DIM3/GPIO[35]
DIM4/GPIO[36]
DIM5/GPIO[37]
DIM6/GPIO[38]
DIM7/GPIO[39]

GPIO43/TCON0
GPIO44/TCON1
GPIO45/TCON2
GPIO46/TCON3
GPIO47/TCON4
GPIO48/TCON5
GPIO49/TCON6
GPIO50/TCON7

GPIO[18]/TCON8

GPIO[19]/TCON9
GPIO[20]/TCON10
GPIO[21]/TCON11
GPIO[22]/TCON12
GPIO[23]/TCON13

GPIO24/TCON14
GPIO25/TCON15

GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]

GPIO[9]
GPIO[10]/PWM_DIM_IN[0]
GPIO[11]/PWM_DIM_IN[1]

GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]

AG25
AH25

AH28
AJ27
AJ29
AF27
AG28
AH27
AG27
AG26

AF28

AG23
AG20
AH23
AH20
AG21
AH22
AG22
AH21

A3
B3
A2
C3
B2
B1
C2
C1

AG4
AG5
AH4
AH5
AH6
AJ4
AJ5
AJ6

AH16
AG16
Y5
Y4
AB4
AB5
AG17
AH17
AG18
AJ20
AH18
AG19
AH19
AJ21

URSA9_NON_D9

LGE7411(URSA9)

IC2500

URSA Option

URSA_OPT_0

URSA_OPT_1

URSA_BIT0

URSA_BIT1

URSA_BIT2

BIT [2/1/0]

0/0/0
0/0/1
0/1/0
0/1/1
1/0/0

1/0/1

1/1/0

1/1/1

Tx Lane

4K@120 (16lane)

4k@60 (8lane)

5k@120 (20lane)

4k@120 for OLED URSA Board

FHD@120 (4lane)

FHD@60 (2lane)

Reserved

Reserved

Rx Interface

Module Type

Tx Lane

+3.3V_NORMAL

LGD_Module

URSA_RX_LVDS

R1909 10K

OS_Module

URSA_RX_VX1

R1910 10K

10K

R1911

10K

R1912

R1913 10K

URSA_BIT0_1

URSA_BIT1_1

URSA_BIT1_0

URSA_BIT0_0

R1914 10K

R1915 10K

R1916 10K

R1917 10K

URSA_BIT2_1

URSA_BIT2_0

R1918 10K

SPI Flash

SPI_CZ

SPI_DO

FLASH_WP_URSA

R1904

R1905
U_SPI_WP_f_URSA

FRC_FLASH_WP

Chip Config

Debug/ISP ADDR
Slave (Debug Port:0XB4,ISP:0X98)
CHIP_CONF:{DIM2,DIM1,DIM0}
CHIP_CONF=3’d7:111:boot from SPI Flash

+3.3V_NORMAL

10K

R1902

10K

R1901

10K

R1900

33

1K

R1932

1K

U_SPI_WP_f_SoC

OPT

R1908

OPT

R1907

OPT

10K

R1906

10K

10K

IC1901-*1

W25Q32BVSSIG

/CS

1

DO[IO1]

2

/WP[IO2]

3

GND

4

SPI_4MB_Winbond

IC1901

MX25L3206EM2I-12G

CS#

1

SPI_4MB_MACRONIX

SO/SIO1

WP#

GND

2

3

4

DIM0

DIM1

DIM2

IC1901-*2

MX25L3235E

8

7

6

5

VCC

/HOLD[IO3]

CLK

DI[IO0]

8

7

6

5

SO/SIO1

WP/SIO2

+3.3V_NORMAL

VCC

HOLD#

SCLK

SI/SIO0

CS

1

2

3

GND

4

DEV_SPI_4MB_MACRONIX

VCC

8

HOLD/SIO3

7

SCLK

6

SI/SIO0

5

R190310K

Debugging for URSA9

I2C_S Port

P1905

12507WS-04L

URSA_DEBUG

5

WAFER-STRAIGHT

1

2

3

4

R19 22

URSA_DEBUG

R19 21

URSA_DEBUG

33

33

C1901

0.1uF
16V

W25Q32FVSSIG

CS

1

DO[IO1]

2

WP[IO2]

3

GND

4

DEV_SPI_4MB_Winbond

SCL2_+3.3V_DB

SDA2_+3.3V_DB

IC1901-*3

VCC

8

HOLDORRESET[IO3]

7

CLK

6

DI[IO0]

5

SPI_CK

SPI_DI

I2C_SCL1

I2CS_SCL

SCL2_+3.3V_DB

R1958
0

URSA_MP

R1960
0
OPT

SW1902

JS2235S

1

2

URSA_DEBUG_SW

3

TCON_I2C_EN

6

R1959
0
URSA_MP

5

R1961
0

OPT

4

+3.3V_NORMAL

1K

R1954

I2C_SDA1

I2CS_SDA

SDA2_+3.3V_DB

URSA_RESET

OPT

10K
R1955

XIN_URSA

XO_URSA

I2CS_SDA

I2CS_SCL

SPI_CZ
SPI_CK

SPI_DI
SPI_DO

33

OPT

AR13201

33

Change pin from A5 to C4

AR13200

33

R198133

R1933

URSA9 UART1_RX

AF29

RESET

R3

XTALO

R4

XTALI

AJ24

I2CS_SDA

AH24

I2CS_SCL

AH26

I2CM_SDA

AG24

I2CM_SCL/VSYNC_LIKE1

B4

GPIO[0][UART2_TX]

A4

GPIO[1][UART2_RX]

B5

GPIO[2][UART1_TX]

A5

GPIO[3][UART1_RX]

AD28

SPI_CZ

AD30

SPI_CK

AC31

SPI_DI

AD29

SPI_DO

AE28

INT_R21/GPIO[41]

AE27

INT_R20/GPIO[42]

C4

IRE

AC27

GND_1

AD27

GND_2

A7

NC_1

B6

NC_2

B7

NC_3

C5

NC_4

C6

NC_5

C7

NC_6

D4

NC_7

D5

NC_8

D6

NC_9

D7

NC_10

E4

NC_11

E5

NC_12

E6

NC_13

E7

NC_14

F4

NC_15

F5

NC_16

M5

NC_17

M6

NC_18

M7

NC_19

N5

NC_20

R7

NC_21

P7

NC_22

N7

NC_23

N6

NC_24

I2C_HSC_SDA/VSYNC_LIKE2
I2C_HSC_SCL/VSYNC_LIKE3

SPI1_CK/PWM2/GPIO58
SPI1_DI/PWM3/GPIO59
SPI2_CK/PWM0/GPIO56

SPI2_DI/PWM1/GPIO57
SPI3_CK/DIM10/GPIO54
SPI3_DI/DIM11/GPIO55

SPI4_CK/DIM8/GPIO52

SPI4_DI/DIM9/GPIO53

VSYNC_LIKE/PWM5/GPIO40

DIM0/GPIO[32]
DIM1/GPIO[33]
DIM2/GPIO[34]
DIM3/GPIO[35]
DIM4/GPIO[36]
DIM5/GPIO[37]
DIM6/GPIO[38]
DIM7/GPIO[39]

GPIO43/TCON0
GPIO44/TCON1
GPIO45/TCON2
GPIO46/TCON3
GPIO47/TCON4
GPIO48/TCON5
GPIO49/TCON6
GPIO50/TCON7

GPIO[18]/TCON8

GPIO[19]/TCON9
GPIO[20]/TCON10
GPIO[21]/TCON11
GPIO[22]/TCON12
GPIO[23]/TCON13

GPIO24/TCON14
GPIO25/TCON15

GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]

GPIO[9]
GPIO[10]/PWM_DIM_IN[0]
GPIO[11]/PWM_DIM_IN[1]

GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]

AG25
AH25

AH28
AJ27
AJ29
AF27
AG28
AH27
AG27
AG26

AF28

AG23
AG20
AH23
AH20
AG21
AH22
AG22
AH21

A3
B3
A2
C3
B2
B1
C2
C1

AG4
AG5
AH4
AH5
AH6
AJ4
AJ5
AJ6

AH16
AG16
Y5
Y4
AB4
AB5
AG17
AH17
AG18
AJ20
AH18
AG19
AH19
AJ21

OPT

R13202 33

R1934

OPT

R13203 33

OPT

R13207 33

OPT

R13208 33

URSA_OPT_0

R1935

33

L_DIM_EN

DIM0
DIM1
DIM2

URSA_OPT_1

URSA_BIT0

URSA_BIT1

URSA_BIT2

RXASCL_URSA9

Data_Format_1

Data_Format_0

RXBSCL_URSA9

RXBSDA_URSA9

R1320110K

URSA_RX_Vx1_HTPDn

R13200

10K

URSA_RX_Vx1_HTPDn

URSA9_CONNECT

URSA_LOCK_O

URSA_LOCK_V

FLASH_WP_URSA

+3.3V_NORMAL

33

RXASDA_URSA9

OPT

R1936
10K

3D_EN

R1937
10K

+3.3V_NORMAL

OPT
R13204
10K

R13205
10K

HDMI OUTPUT_1 DDC to URSA9

HDMI OUTPUT_0 DDC to URSA9

R13209

R13206

100K

100K

URSA9_Vx1_RX_HTPD_GPIO

Not Used Net (UB85/95/UC89)

Not Used Net (UB98/D9)

RXASCL_URSA9
RXASDA_URSA9

RXBSCL_URSA9
RXBSDA_URSA9

For DFT JIG

URSA9_CONNECT
URSA_LOCK_O
URSA_LOCK_V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-132-HD

2013.12.17

+1.5V_U_DDR

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

AVDD_PLL

AVDDL_LVDSRX

DVDD_DDR

AVDDL_MOD

AVDDL_DRV

VDDC

AVDDL_HDMI_TX_RX

AVDD_MOD

VDDP

URSA9_NON_D9

LGE7411(URSA9)

A6

VDDC_1

M9

VDDC_2

M10

VDDC_3

M11

VDDC_4

N9

VDDC_5

N10

VDDC_6

N11

VDDC_7

P9

VDDC_8

P10

VDDC_9

P11

VDDC_10

R9

VDDC_11

R10

VDDC_12

R11

VDDC_13

T9

VDDC_14

T10

VDDC_15

T11

VDDC_16

U9

VDDC_17

U10

VDDC_18

U11

VDDC_19

V9

VDDC_20

V10

VDDC_21

V11

VDDC_22

W9

VDDC_23

W10

VDDC_24

W11

VDDC_25

Y9

VDDC_26

L3

AVDDL_HDMITX_1

L4

AVDDL_HDMITX_2

AA9

AVDDL_RX_1

AA10

AVDDL_RX_2

AB9

AVDDL_RX_3

Y10

AVDDL_DVI_1

Y11

AVDDL_DVI_2

M14

DVDD_DDR_1

N14

DVDD_DDR_2

Y20

AVDDL_MOD_1

Y21

AVDDL_MOD_2

Y22

AVDDL_MOD_3

AA19

AVDDL_MOD_4

AA20

AVDDL_MOD_5

AA21

AVDDL_DRV_1

AA22

AVDDL_DRV_2

AB20

AVDDL_DRV_3

AB21

AVDDL_DRV_4

AB22

AVDDL_DRV_5

AC20

AVDD_MOD_1

AC21

AVDD_MOD_2

AD21

AVDD_MOD_3

AD20

AVDD_MOD_LDO

AC18

VDDP_1

AD17

VDDP_2

AD18

VDDP_3

AD11

AVDD_DVI_1

AD12

AVDD_DVI_2

AC12

AVDD_HDMITX_1

AC13

AVDD_HDMITX_2

AD15

AVDD_RX_1

AC16

AVDD_RX_2

AC17

AVDD_RX_3

AD16

AVDD_RX_4

AD14

AVDD_XTAL

AC14

AVDD_PLL_1

AC15

AVDD_PLL_2

M18

AVDD_DDR0_1

M19

AVDD_DDR0_2

M20

AVDD_DDR0_3

M21

AVDD_DDR0_4

M16

AVDD_DDR0_5

M17

AVDD_DDR0_6

P21

AVDD_DDR1_1

R21

AVDD_DDR1_2

P22

AVDD_DDR1_3

R22

AVDD_DDR1_4

N21

AVDD_DDR1_5

N22

AVDD_DDR1_6

IC2500

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29

VSS_30
VSS_31
VSS_32
VSS_33
VSS_34

VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46

VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60

VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66

VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80

URSA9_NON_D9

IC2500

LGE7411(URSA9)

A8

VSS_81

B8

VSS_82

C8

VSS_83

D8

VSS_84

E8

VSS_85

F8

VSS_86

G8

VSS_87

H8

VSS_88

J8

VSS_89

K8

VSS_90

L8

VSS_91

M8

VSS_92

N8

VSS_93

P8

AB10
AC10
AD10
AE10
AF10
AG10
AH10
AJ10

AA11
AB11
AC11
AE11
AF11
AG11
AH11
AJ11

AA12
AB12
AE12
AF12
AG12
AH12
AJ12

VSS_94

R8

VSS_95

T8

VSS_96

U8

VSS_97

V8

VSS_98

W8

VSS_99

Y8

VSS_100

AA8

VSS_101

AC8

VSS_102

AD8

VSS_103

AE8

VSS_104

AF8

VSS_105

AG8

VSS_106

AH8

VSS_107

AJ8

VSS_108

B9

VSS_109

D9

VSS_110

E9

VSS_111

F9

VSS_112

G9

VSS_113

H9

VSS_114

J9

VSS_115

K9

VSS_116

L9

VSS_117

AD9

VSS_118

AE9

VSS_119

AF9

VSS_120

AG9

VSS_121

AH9

VSS_122

AJ9

VSS_123

D10

VSS_124

E10

VSS_125

F10

VSS_126

G10

VSS_127

H10

VSS_128

J10

VSS_129

K10

VSS_130

L10

VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139

A11

VSS_140

D11

VSS_141

E11

VSS_142

F11

VSS_143

G11

VSS_144

H11

VSS_145

J11

VSS_146

K11

VSS_147

L11

VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156

D12

VSS_157

E12

VSS_158

F12

VSS_159

G12

VSS_160

H12

VSS_161

J12

VSS_162

K12

VSS_163

L12

VSS_164

M12

VSS_165

N12

VSS_166

P12

VSS_167

R12

VSS_168

T12

VSS_169

U12

VSS_170

V12

VSS_171

W12

VSS_172

Y12

VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180

G13

VSS_181

H13

VSS_182

J13

VSS_183

K13

VSS_184

L13

VSS_185

K1
T1
K2
P2
T2
AF2
K3
T3
AF3
AG3
G4
H4
J4
K4
P4
T4
U4
V4
W4
AA4
AC4
AD4
AE4
AF4
G5
H5
J5
K5
L5

P5
R5
T5
U5
V5

W5
AA5
AC5
AD5
AE5
AF5
F6
G6
H6
J6
K6
L6

P6
R6
T6
U6
V6
W6
Y6
AA6
AB6
AC6
AD6
AE6
AF6
AG6

F7
G7
H7
J7
K7
L7

T7
U7
V7
W7
Y7
AA7
AB7
AC7
AD7
AE7
AF7
AG7
AH7
AJ7

VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224

VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249

VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261

VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282

VSS_283
VSS_284

T13
R13
P13
N13
M13
U13
V13
W13
Y13
AA13
AB13
AD13
AE13
AF13
AG13
AH13
AJ13
G14
H14
J14
K14
L14
P14
R14
T14
U14
V14
W14
Y14
AA14
AB14
AE14
AF14
AG14
AH14
AJ14
A15
B15
D15

G15
H15
J15
K15
L15
M15
N15
P15
R15
T15
U15
V15
W15
Y15
AA15
AE15
AF15
AG15
AH15
AJ15
E16
F16
G16
H16
J16

L16
N16
P16
R16
T16
U16
V16
W16
Y16
AA16
AE16
AF16

AJ16
AM16
A17
B17
G17
H17
J17
K17
L17
N17
P17
R17
T17
U17
V17
W17
Y17
AA17
AB17
AE17
AF17

AJ17
AL17

URSA9_NON_D9

LGE7411(URSA9)

D18

VSS_285

G18

VSS_286

H18

VSS_287

J18

VSS_288

L18

VSS_289

N18

VSS_290

P18

VSS_291

R18

VSS_292

T18

VSS_293

U18

VSS_294

V18

VSS_295

W18

VSS_296

Y18

VSS_297

AA18

VSS_298

AB18

VSS_299

AE18

VSS_300

AF18

VSS_301

AJ18

VSS_302

F19

VSS_303

G19

VSS_304

H19

VSS_305

J19

VSS_306

K19

VSS_307

L19

VSS_308

N19

VSS_309

P19

VSS_310

R19

VSS_311

T19

VSS_312

U19

VSS_313

V19

VSS_314

W19

VSS_315

Y19

VSS_316

AB19

VSS_317

AC19

VSS_318

AD19

VSS_319

AE19

VSS_320

AF19

VSS_321

AK19

VSS_322

A20

VSS_323

E20

VSS_324

F20

VSS_325

G20

VSS_326

H20

VSS_327

J20

VSS_328

L20

VSS_329

N20

VSS_330

P20

VSS_331

R20

VSS_332

T20

VSS_333

U20

VSS_334

V20

VSS_335

W20

VSS_336

AE20

VSS_337

AF20

VSS_338

AK20

VSS_339

D21

VSS_340

F21

VSS_341

G21

VSS_342

H21

VSS_343

J21

VSS_344

K21

VSS_345

L21

VSS_346

T21

VSS_347

U21

VSS_348

V21

VSS_349

W21

VSS_350

AE21

VSS_351

AF21

VSS_352

AK21

VSS_353

G22

VSS_354

H22

VSS_355

J22

VSS_356

L22

VSS_357

M22

VSS_358

T22

VSS_359

U22

VSS_360

V22

VSS_361

W22

VSS_362

AC22

VSS_363

AD22

VSS_364

AE22

VSS_365

AF22

VSS_366

AL22

VSS_367

A23

VSS_368

E23

VSS_369

F23

VSS_370

G23

VSS_371

H23

VSS_372

J23

VSS_373

K23

VSS_374

M23

VSS_375

P23

VSS_376

T23

VSS_377

V23

VSS_378

W23

VSS_379

Y23

VSS_380

AA23

VSS_381

AB23

VSS_382

AC23

VSS_383

AD23

VSS_384

AE23

VSS_385

AF23

VSS_386

AJ23

VSS_387

AM23

VSS_388

IC2500

VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396
VSS_397
VSS_398
VSS_399
VSS_400
VSS_401
VSS_402
VSS_403
VSS_404
VSS_405
VSS_406
VSS_407
VSS_408
VSS_409
VSS_410

VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427
VSS_428
VSS_429
VSS_430
VSS_431
VSS_432
VSS_433
VSS_434
VSS_435
VSS_436
VSS_437
VSS_438
VSS_439
VSS_440
VSS_441
VSS_442
VSS_443
VSS_444
VSS_445
VSS_446
VSS_447
VSS_448
VSS_449
VSS_450
VSS_451
VSS_452
VSS_453
VSS_454
VSS_455
VSS_456
VSS_457
VSS_458
VSS_459
VSS_460
VSS_461
VSS_462
VSS_463
VSS_464
VSS_465
VSS_466
VSS_467
VSS_468
VSS_469

VSS_470
VSS_471
VSS_472
VSS_473
VSS_474
VSS_475
VSS_476
VSS_477
VSS_478
VSS_479
VSS_480
VSS_481
VSS_482
VSS_483
VSS_484
VSS_485
VSS_486
VSS_487
VSS_488
VSS_489
VSS_490
VSS_491
VSS_492
VSS_493
VSS_494
VSS_495
VSS_496
VSS_497
VSS_498
VSS_499
VSS_500
VSS_501
VSS_502
VSS_503
VSS_504
VSS_505
VSS_506
VSS_507

VSS_508
VSS_509

D24
F24
G24
H24
J24
K24
L24
M24
N24
P24
R24
T24
U24
V24
W24
Y24
AA24
AB24
AC24
AD24
AE24
AF24

AL24
F25
G25
H25
J25
K25
L25
M25
N25
P25
R25
T25
U25
V25
W25
Y25
AA25
AB25
AC25
AD25
AE25
AF25
AM25
A26
F26
G26
H26
J26
K26
L26
M26
N26
P26
R26
T26
U26
V26
W26
Y26
AA26
AB26
AC26
AD26
AE26
AF26
AJ26
AL26
D27
F27
K27
N27
P27
R27
U27
V27
W27
Y27
AA27
AB27

F28
K28
P28
U28
AC28
AK28
A29
C29
D29
E29
F29
J29
M29
R29
V29
AA29
AC29
AK29
A30
B30
AC30
AK30
AM30
A31
B31
C31
J31
L31
AD31
AF31
AH31
B32
E32
J32
L32
P32
U32
Y32

AE32
AG32

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-133-HD

2013.12.17

U_Power

EC97 only

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+12V

L13411

BLM18PG121SN1D

C13443
10uF
16V

1.0V_DCDC_TI

C13410

0.1uF

C13446-*1
3300pF
50V

+1.5V URSA DDR

POWER_ON/OFF2_1

R13424

10K

EN

R13421

R13422

18K

R1

C13444

100pF

50V

3.6K

1%

1%

R13423
22K
1%

R2

C13445
1uF
10V

Vout=0.765*(1+R1/R2)=1.516V

FB

VREG

SS

C13446
2200pF
50V

1.0V_DCDC_ROHM

DCDC_ROHM

IC13403

BD9D320EFJ

1

2

THERMAL

3

4

3A

+1.5V_U_DDR

[EP]FIN

VIN

8

9

7

6

5

BOOT

SW

GND

16V

0.1uF
C13447

NR5040T2R2N

L13412

2.2uH

C13448

22uF

10V

C13449

22uF
10V

EN

VFB

VREG5

SS

ZD13401

2.5V

OPT

DCDC_TI

IC13403-*1

TPS54327DDAR

1

2

3

4

THERMAL

[EP]GND

VIN

8

VBST

9

7

SW

6

GND

5

VDDC

ZD13400

+1.15V URSA9 Core

R13404
10K

R13402

3.3

R13403

1/10W

5%

C13404
470pF
50V

4.7

1%

1/1 6W

0.1uF

C13405

OPT

1%

1/1 6W

27K

R13 405

PGOOD

16V

30V

D13400

+3.3V_NORMAL

C13400

22uF

2.5V

C13401

22uF

C13402

0.1uF
16V

C13411
22uF

C13403
1000pF
50V

R13401 1K

R13400
2K

1/16W
5%

L13403

1uH

VBST

NC_1

SW_1

SW_2

SW_3

SW_4

91K

R13 406

RF

EN

[EP]

1

THERMAL

2

29

3

IC13402

4

TPS53513RVER

5

6

7

8

8A

9

10

PGND_111PGND_212PGND_313PGND_414PGND_5

R13407
39K

1/16W
5%

R1

R13408

4.87K

1/16W

1%

TRIP26NC_327GND128GND2

24VO25

R2

R13409

5.1K

1/16W

1%

1%

FB

23

GND

22

MODE

21

VREG

20

VDD

19

NC_2

18

VIN_3

17

VIN_2

16

VIN_1

15

R13411

C13406
2200pF
50V

100

1/16W

20K

R13410

1/16W

1%

C13407
1uF
10V

L13402

C13408
10uF
16V

+12V

C13409
10uF
16V

Vout=0.6*(1+R1/R2)

MAX 4.7A

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BSD-14Y-UD-134-HD

2013.12.17

EC97 only

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

[50P Vx1
Input wafer]

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

Close to Chip

Tx_U14_0N

Tx_U14_0P

Tx_U14_1P

Tx_U14_1N

Tx_U14_2P

Tx_U14_2N

Tx_U14_3P

Tx_U14_3N

Tx_U14_4P

Tx_U14_4N

Tx_U14_5P

Tx_U14_5N

Tx_U14_6P

Tx_U14_6N

Tx_U14_7P

Tx_U14_7N

Tx_U14_8P

Tx_U14_8N

Tx_U14_9P

Tx_U14_9N

Tx_U14_10P

Tx_U14_10N

Tx_U14_11P

Tx_U14_11N

URSA_LOCK_V

URSA_LOCK_O

URSA9_CONNECT

FRC_FLASH_WP

URSA_RESET_SoC

T_CON_SYS_POWER_OFF

Compensation_Done

INV_CTL

I2C_SCL1

I2C_SDA1

VIDEO

OSD

EL_VDD_DETECT_22V

0
R13501

MICOM_ENABLE

+12V

0

R13 502

12V_ENABLE

POWER_ON/OFF2_1

[5P 12V
Input wafer]

P13502

20037WR-05A00

1

2

3

4

5

6

+1.5V_U_DDR

330pF

330pF

OPT

OPT

C3340

C3341

VDDC

C13310
1uF
10V

4th Layer (Parallel C2150)

C13525

0.1uF
50V

+12V

4Layer

UBW2012-121F

L13501

URSA9 DDR VDD Decap (For EMI)

C3342

330pF

330pF

OPT

OPT

C3343

C3344

330pF

330pF

OPT

OPT

C3345

URSA9 EMI SMD Gasket

SMD_for_EMI

GASKET_8.0X6.0X8.5H

M13500

MDS62110216

SMD_for_EMI

GASKET_8.0X6.0X8.5H

M13501

MDS62110216

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

FI-RE51S-HF-J-R1500

P13501

BSD-14Y-UD-134-HD

2013.12.17

OLED TV Repair Guide

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

`14 years New Models

< Applicable Model >

65EC970V-ZA

65EC970T-TA

65EC9700-CA

Main PCB

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

65EC970V-ZA, 65EC970T-TA, 65EC9700-CA

Camer

Power

From PSU

(18p)

Power

To FRC (5p)

a

FRC B/D

B/T, Wifi,

IR

Main processor_Digital(LG1154D),

1

DDR Memory
eMMC Memory

HDMI switch

4

4K processor_Digital(LG1512),

7

DDR Memory
eMMC Memory

5

6

1

3

Main processor_analog(LG1152AN)

2

Audio AMP

5

7

4 2

Micom for Key/IR sensing

3

Video processor (LG1614),
DDR Memory

6

Flash Memory

FRC PCB

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

65EC970V-ZA, 65EC970T-TA, 65EC9700-CA

Power

From Main

Vx1

From Main

1

Video processor (LGE7411:URSA9),
DDR Memory

1

Flash Memory

T-CON B/D

`14Y OLED ULTRA HD Block Diagram

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Contents

0. System board over view

1. H13 Block Diagram (External)

2. H13 Block Diagram (Internal)

3. H13 Data Path Diagram

4. D14 Block Diagram (Internal)

5. D14 Block Diagram (External)

6. U14 Block Diagram (Internal)

7. U14 Block Diagram (External)

8. URSA9 Block Diagram

9. BE

10. Tuner

11. Video & Audio IN/OUT

12. Audio OUT

13. HDMI2.0 Block

14. USB / Wi-Fi / M-REMOTE / UART

15. I2C Map (H13)

16. I2C Map (MICOM)

17. GPIO (H13)

18. GPIO (U14/URSA9)

19. GPIO (MICOM)

20. Power Block

표지

`14Y OLED ULTRA HD System Board Overview

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

B/E Board

110x135

12V Power

FFC Cable

Vx1(Video/OSD)

Control

Main Board

329x185

`14Y OLED ULTRA HD Main + Back-End

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

※ Main + Back-End (Back-End IC 1 chip)

DDR3

DDR3

DDR3

DDR3

DDR3

DDR3

HDMI2.0

4K@60p to HDMI 2.0SW X 3EA

4K@30p to HDMI 2.0 SW X 1 EA(HDMI4)

4K@60p TS

From H13

24.75M

27M

4K

Decoder

D14

DDR3

DDR3

HDMI1.4 (4K@30p) or

1920X2160@60p + Audio

HDMI 2.0

SW(P)

HDMI1. 4 (4K@30p) or

1920X2160@60p

DDR3

DDR3

HDMI1.4

1920X2160@60p

1920X2160@60p

+ Audio

2:1
Mux

2:1
Mux

HDMI1. 4 (4K@30p) or

1920X2160@60p

+ Audio

Same output

1:2 Splitter

HDMI1. 4 (4K@30p) or

1920X2160@60p

+ Audio

1920X2160@60p

24M

HS-LVDS

32bit(16bitX2)

H13

4K@30p

DDR3

1920X1080@60p

24.75M

U14

DDR3

eMMC

OSD

4K@60p

1080p

OSD

URSA 9

DDR3

DDR3

24M

Vby1 16 Lane

4K@120Hz

DDR3

DDR3

Super Resolution Super Resolution Ready

H13 Block Diagram (External)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Tuner

SCART

AV1

COMP1

Logo Light

Logo Light

IR/Joy key

Logo Light

Motion-R &

USB1(USB3.0)

USB2(USB2.0)

USB3(USB2.0)

USB_CAM

HDMI1(HDCP2.2)

HDMI2(ARC)
HDMI3
HDMI4(MHL)

LAN

USB_WI-Fi

From H13D

LNB

SC_CVBS, RGB, Audio L/R

DTV/MNT_LR/V_OUT

COMP1/AV1/DVI_ L/R

HDMI_CEC

HDCP2.

2

MHL

TS output

16x4

DDR3

DIF(P/N)

CVBS

SIF

AV1_CVBS

Comp1 Y,Pb,Pr

WOL / WOW

PHY

USB redriver

USB
HUB

HDMI output

HDMI

2.0

Switch

D14

H13

LG1154AN

RMII

USB 2.0 (WIFI11ac & BT)

USB 3.0

USB 2.0

USB 2.0

2:1 Mux

1:2 Splitter

2:1 Mux

Jitter

cleaner

AUDA/D

BB_TP_DATA

CVBS

DAC_DATA

AAD_DATA

HSR_P/M

DDR3

16x2

FHD HS-LVDS

U14

H13

LG1154D

OSD HS-LVDS

Vx1 8Lane

Vx1 2Lane
OSD

SPDIF

H/P Audio L/R

I2S

DDR3

16x2

8x4

8

16x4

DDR3

Audio AMP

(4.2ch~7.2ch)

CI

eMMC

URSA9

H/P

AMP

4Gb×6 (1600)

OPTIC

H/P

SPK

CI

RS-232C

Vx1

1Gb x 4 (1600)

1Gb x 2(1600)

1Gb x 4 (1866)

H13 Block Diagram (Internal)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Tuner

HDMI

DIF

SIF

Audio L/R(4-

SCART out

Line Out

CVBS(3ch)

CVBS-Out

Component(2ch)

Analog Chip Total Pin : 183w/o Power

H13A H13D

GBB AFE

1ch@30MHz

w/ PLL

BTSC AFE

10b@18.432MHz

w/ PLL

1ch L/R

ch)

Audio-ADC

SW

24b@48KHz

Audio DAC

SW

(48KHz )

Audio DAC (48KHz)

CVBS DAC

SW SW

CVBS AFE(2-ch)

12b@54MHz

3ch Video

AFE

10b@148.5MHz

w/ LLPLL

I2Cx1
I2Cx1

Capture

Block

(3CH)

GPIOIx16

SDRAM

(MCP)

Global Baseband

V/Q, DVB-T/C ISDB-T

10x3ch

Mux

LVDS

Audio PLL

w/ DCO

AtoDPin : 79

TS (P)

I2S(External)

I2S

I2S

I2S

I2S(HPD)

Digital AMP

SPDIF

5x1ch (1ch)

Tx

DVB-CI/CI+

TS(P) TS(P)

System

Demux

AAD

(THAT)

Audio

Mux

Clear Voice II

Perceptual

Volume Control

Digital

Audio

Output

CVBS

Encoder

CVD

Y/C

CVBS

LVDS

Rx

HDMI

(1-Link)

HDMI-Rx 1.4
(1-port PHY)

3D, ARC, 4kx2k

TS(S)

Audio DSP

Multi-STD

Audio Decoder

LX4 HiFi EP

Sound DSP

Slim SPK

DivX

Bluetooth

Mux

Source Mux

TS(S)

DE

MCU

TNR

De-interlacer

Main/Sub Scaler

DDR3 Controller

DDR3 PHY

16

Digital Chip Total Pin : 491w/o Power

Video Decoder

Multi-STD

HD Decoder

(Boda950)

Video Encoder

1080p@30fps

CPU

CPU

ARMCA9 Core

Dual 1.2GHz

32KBD$

32KBI$

1MB L2 $

SRE

VCR

H3D

FRC

H3D

GPU Rogue Han

JPG/PNG Decoder

BE

MCU

PE1

LED

OSD

Output formatter

DDR3 Controller

DDR3 PHY

8

2D GFX

JPG Encoder

TrustZone

Secure Engine

48KB ROM

64KB SRAM

OTP

UART

Timer

TCON

USB2.0x3

UARTx3

GPIOx136

EMAC

SCI

SPIx2

I2Cx10

USB3.0 x1

eMMC

DMAC(8ch)

Timer

WDT

SRAM 16KB

(120Hz)

Vx1/EPI/LVDS Combo

DCO

CPLL

x2

SPLL

DPLL

DDR

DDR

PLL

PLL

PHY

Data Path Diagram

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

D14 Block Diagram (Internal)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Analog IP

2.5V

(AIP)

LDO

Serial/Parallel

TP Stream

3.3V

(I/O)

LDO

1.1V

(Core)

LDO

SPI I2C

VD0

TE PDEC

1.5V

(DDR3)

LDO

Boot
ROM

ADO

Serial Flash

SRAM ADO MCU0 MCU1 DMA

CPU Bus Interface (PL301)

VD1

VD2

H.264

HEVC1

Core1

HEVC2

H.264
Core2

H.264
(On2)

FHD

CortexM3

SDRAM

Memory Bus Interface (PL301)

Bus Architecture

UART0

WDT

UART1

VD3

VDO VCP

Added : D13 D14

Deleted : D13  D14

GPIO

MCURC

I2C

1920x2160@60p

HDMI

PHY

HDMI

Link

HDMI

1920x2160@60p

PHY

DDR3PLL

XTAL

(24.75MHz)

SSPLL

Clock/Reset Gen

DCO

DISPLL

lgm_top

DDR3 PHY (x32)

DDR3-1600

DDR3-1600

1Gbit

1Gbit

lgm_top

DDR3 PHY (x16)

x32 x32

DDR3-1600

DDR3-1600

1Gbit

1Gbit

D14 Block Diagram (External)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V

+2.5V

+1.5V

+1.15V

IC12101

DDR3

1G bit

IC12103

DDR3

1G bit

IC12100

DDR3

1G bit

IC12102

DDR3

1G bit

+3.3V

+2.5V

+1.5V

+1.15V

M0_DDR_DQ0­15_D14(16bit)
M0_DDR_DQS0­1_D14(2bit)

M0_D_CLK_D14
M0_DDR_DM0­M0_D_CLKN_D14
1_D14(2bit)

M0_DDR_A0-13_D14(14bit)
M0_DDR_BA0-2_D14(3bit)
M0_DDR_CKE_D14
M0_DDR_ODT_D14
M0_DDR_RASN_D14
M0_DDR_CASN_D14
M0_DDR_WEN_D14
M0_DDR_RESET_N_D14

M0_DDR_DQ16-31_D14(16bit)
M0_DDR_DQS2-3_D14(2bit)
M0_DDR_DM2-3_D14(2bit)

M0_U_CLK_D14
M0_U_CLKN_D14

M1_DDR_DQ0-15_D14(16bit)
M1_DDR_DQS0-1_D14(2bit)
M1_DDR_DM0-1_D14(2bit)

M1_D_CLK_D14
M1_D_CLKN_D14

M1_DDR_A0-13_D14(14bit)
M1_DDR_BA0-2_D14(3bit)
M1_DDR_CKE_D14
M1_DDR_ODT_D14
M1_DDR_RASN_D14
M1_DDR_CASN_D14
M1_DDR_WEN_D14
M1_DDR_RESET_N_D14

M1_DDR_DQ0-15_D14(16bit)
M1_DDR_DQS0-1_D14(2bit)
M1_DDR_DM0-1_D14(2bit)

M1_U_CLK_D14
M1_U_CLKN_D14

IC12000

D14

D13_STPO_CLK
D13_STPO_VAL
D13_STPO_DATA
D13_STPO_SOP
D13_STPO_ERR
SOC_SPI0_SCLK
SOC_SPI0_CS0
SOC_SPI0_MOSI

SOC_SPI0_MISO

SPI_SCLK_M
SPI_MOSI_M
SPI_CS_M/
FLASH_WP/

SPI_MISO_M

HDMI0_TX0N
HDMI0_TX0P
HDMI0_TX1N
HDMI0_TX1P
HDMI0_TX2N

HDMI0_TX2P
HDMI0_TXCN
HDMI0_TXCP

HDMI0_DDC_DA
HDMI0_DDC_CK

HDMI1_TX0N
HDMI1_TX0P
HDMI1_TX1N
HDMI1_TX1P
HDMI1_TX2N

HDMI1_TX2P
HDMI1_TXCN
HDMI1_TXCP

HDMI1_DDC_DA
HDMI1_DDC_CK

IC100

H13D

IC12002

SPI FLASH

4MByte

1920x2160@60p

IC3302

DEV_HDMI_MUX0

1920x2160@60p

IC3501

DEV_HDMI_MUX1

U14 Block Diagram (Internal)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

• MCU

 Tensilica’s 108mini

• Memory

 Unified memory architecture
 DDR3-1600MHz 32bit

• Interface

 Input

: HS-LVDS 4-link (2+2)
: HDMI1.4 2-port

 Output

: HS-LVDS 6-link (4+2)
: Vx1 12-lane (8+4)

• PKG

 23X23 FcBGA

H13D

H13D

H13D

(GPIO)

H13D
H13D

HDMI Switch
HDMI Switch

JTAG Ready

Serial Flash

RS-232C

DDR3

76

DDR I/F(32bitx1)

Digital die

800MHz

2

I2C(S)

4

SPI(S)

1

Super-Resolution

FHD3840x2160

Reset

24

24

14

14

5

4

HS LVDS Rx

2-link

HS LVDS Rx

2-link

HDMI Rx

1.4b

HDMI Rx

1.4b

JTAG

4K 2D-to-3D

SPI(M)

2

Tensilica
108m@198MHz

ROM 8KB
I$16KB D$8KB
IRAM128KB DRAM128KB

4K@60P PQ
Sharpness/Color/Contrast
UGM/Local Dimming
Gamma/WB

Separate OSD

CLK

TEST

Boot Mode

Combo Tx

HS LVDS 4-link
Vx1 8-lane

Combo Tx

HS LVDS 2-link
Vx1 4-lane

I2C(M/S)

GPIO

48

24

2

8

UART

2

4

2

Crystal

U14 Block Diagram (External)

OSD Resoultion

GPIO[0]

GPIO[1]

U
R
S
A
9

2560*1080@60p

0

0

1920*1080@60p

0

1

SMODE[0]

SMODE[1]

Normal Mode

0

0

Test Mode

Other

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

H13D

D14

HDMI

2.0

Switch

[EXT_INTR0/GPIO67]

HDMI_0_RX

2:1

U14_SPI_CS_M
U14_SPI_MOSI_M
U14_SPI_SCLK_M

1Gb (1600)

2:1

MUX

Splitter

1:2

U14_FLASH_WP

SOC_SPI1_CS
SOC_SPI1_MISO
SOC_SPI1_MSIO
SOC_SPI1_SCLK

DDR3

32bit

(16x2)

H13_CONNECT

HDMI_U14_2
RXASCL_U14
RXASDL_U14

HDMI_U14_1
RXBSCL_U14
RXBSDL_U14

Serial

Flash(4MB)

HS-LVDS 4K@30p_Video [RXA/RXB]

1080p@60p _OSD[RXC]

I2C_SCL2(M/S)
I2C_SDA2(M/S)

HDMI_1_TX

HDMI_1_RX

HDMI_Splitter

MUX

SPI

HS-LVDS

[RXA]
[RXB]
[RXC]
[RXD]

[GPIO[2]]

[I2CS_SCL_M]
[I2CS_SDA_M]

U14

[Tx_U14_0N/P~7N/P}

[PORESN]

[SMODE[0]]
[SMODE[1]]

Combo TX

[Tx_U14_0N/P~7N/P]

[Tx_U14_9N/P~11N/P

[GPIO[5/6]]

[GPIO[4]]
[GPIO[3]]

[GPIO[1]]
[GPIO[0]]

UART

X-tal

U14_XTAL_IN

U14_XTAL_OUT

4K@60p Vx1 8 Lane Video

1080p / 2160p Vx1 4Lane OSD

Vx1_LOCKn_O/V

OSD/VIDEO 에 대한 각 Lcok신호를 받음

24.75MHz

U14_RESET
(H13D GPIO9)

U14_SMODE[0]/[1]

URSA9_CONNECT

U14_FLASH_WP

FHD_D9_SET
URSA7/9_SET

U14_UART_RX_1
U14_UART_TX_1

URSA9

HDMI_0_TX

HDMI to H13

URSA9 Block Diagram

BIT[2/1/0]

UD_V x 1 Lane

0/0/0

4K@120P _16Lanes

0/0/1

4K@60P _ 8Lanes

0/1/0

5K@120P _ 20Lanes

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

U14

[GPIO[3]]

[LOCKN_D/Q]

SPI_CZ
SPI_D
O
SPI_CK

Serial

Flash(4MB)

DDR3

1Gb x 4 (1600)

4K@60p Vx1 8 Lane Video

1080p / 2160p Vx1 4 Lane OSD

URSA9_CONNECT

Vx1_LOCKn_O/V

I2CS_SDA/SCL

SPI_DI

FLASH_WP_URSA

16x4

(URSA Debug)

URSA9

LGE7410

GPIO[25]

[TXDBN0/P0~N7/P7_L]

[Tx_U14_0N/0P~7N/7P]

[Tx_U14_8N/8P~11N/11P]

[GPIO[15]]

[GPIO[16]/[17]]

[I2CS_SDA/SCL]

[TXDAN0/P0~N7/P7_L]

[SPI4_CK/DIM8/GPIO52]

[INT_R21/GPIO[41]]

[SPI4_DI/DIM9/GPIO53]

[VX1T_LOCKN]

[VX1T_HTDPN]

[GPIO[4/5]]

[RESET]

X-tal

XIN_URSA

XO_URSA

Data_Format_0/1

3D_EN
TCON_I2C_EN

L_DIM_EN

LOCKn_IN/ HTPDn_IN

URSA_RESET_SOC
(H13D GPIO[26])

24MHz

Vx1 8Lane(12Lane_5K) 41P

Vx1 8Lane 51P

H1

3

Panel

3840x2160@120

p

I2C_SCL1/SDA1

[SPI4_DI/DIM9/GPIO53]

UART2_RX
UART2_TX

GPIO[1]/[0]

DIM5/GPIO[37]
DIM6/GPIO[38]
DIM7/GPIO[39]

URSA_BIT0/1/2

B/E

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

B/E Board

4K@60P Video Vx1 8 Lane

U14

H13D

LG1154

1080P OSD Vx1 4 Lane

Lockn_V

Lockn_O

URSA9_CONNECT

URSA9

I2C_SCL1/SDA1

Burnt_Det

ELVDD_Det

OFF_RS_Done

4K@120P Vx1 16 Lane

Lockn

OLED

Module

Tuner

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

TU6800

TDJH-H251F

[FE_DEMOD1_TS_ERROR] 12

[FE_DEMOD1_TS_CLK] 14

[FE_DEMOD1_TS_SYNC] 15

[FE_DEMOD1_TS_VAL] 16

FE_DEMOD1_TS_DATA[0] 17
FE_DEMOD1_TS_DATA[1] 18
FE_DEMOD1_TS_DATA[2] 19
FE_DEMOD1_TS_DATA[3] 20
FE_DEMOD1_TS_DATA[4] 21
FE_DEMOD1_TS_DATA[5] 22
FE_DEMOD1_TS_DATA[6] 23
FE_DEMOD1_TS_DATA[7] 24

[FE_DEMOD2_TS_ERROR] 34

[FE_DEMOD2_TS_SYNC] 36

[FE_DEMOD2_TS_CLK] 37

[FE_DEMOD2_TS_VAL] 39

FE_DEMOD2_TS_DATA 40

[+3.3V_LNA_TU] 1

[+3.3V_TUNER] 11

[+3.3V_DEMOD] 26

[1.2V_DEMOD] 28

[+2.5V_DEMOD] 38

[LNB_TX] 29

[LNB_OUT] 31
[I2C_SCL4] 27
[I2C_SDA4] 30

[I2C_SCL6] 4
[I2C_SDA6] 5

[RF_SWITCH_CTL] 2

[/TU_RESET2] 45

[IF_P] 6

[IF_N] 7

TU_SIF_TU 9

TU_CVBS_TU 8

IF_AGC_TU

+3.3V_TU

D_Demod_core

+3.3V_TUNER

1.8K Ω

+2.5V_Normal

+3.3V_TUNER

1.8K Ω

LNB_TX

LNB_OUT

I2C_SCL4
I2C_SDA4

I2C_SCL6
I2C_SDA6

FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL

FE_DEMOD1_TS_DATA [0-7]

FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_VAL

FE_DEMOD2_TS_DATA

RF_SWITCH_CTL

/S2_RESET

IF_P

IF_N

TUNER_SIF

TU_CVBS

IF_AGC

FILTER

33 Ω

33 Ω

ADC_I_INP

ADC_I_INN

10 [TONECTRL]
2 [LNB]
7 [SCL]
8 [SDA]

AN8 [SCL3]
AP8 [SDA3]

AF34 [SCL5]
AF33 [SDA5]

AE35 [FE_TP_CLK]
AD36 [FE_TP_SOP]
AE36 [FE_TP_VAL]
AD35 [FE_TP_ERROR]

AF36 [FE_TP_DATA0]
AF37 [FE_TP_DATA1]
AF35 [FE_TP_DATA2]
AG37 [FE_TP_DATA3]
AG36 [FE_TP_DATA4]
AG35 [FE_TP_DATA5]
AH36 [FE_TP_DATA6]
AH35 [FE_TP_DATA7]

AP36 [STPI_ERR/GPIO 55]
AR37[STPI_SOP/GPIO 41]
AR36 [STPI_CLK/GPIO 42]
AT37 [STPI_VAL/GPIO 40]

AP37 [STPI_DATA/GPIO 54]

AL34 [GPIO26]

AJ33 [GPIO4]

U17 [ADC_I_INP]

V17 [ADC_I_INN]

LNB

IC6900

A8303SESTR-TB

H13

LG1154D

H13

LG1154AN

Video & Audio IN/OUT

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Jack Side SOC Side

CVBS 1

Phone JACK

FULL

SCART

(18P)

AV1_CVBS_IN

COMP1/AV1/DVI_L/R_IN

SC_CVBS_IN

SC_R/G/B
/CVBS_IN_SOY

H13

(LG1154AN)

AV1_CVBS_IN_SOC

[CVBS_IN3]

AUAD_L/R_CH2_IN

[AUAD_L/R_CH2_IN]

SC_CVBS_IN_SOC

[CVBS_IN2]

[PR1/Y1/PB1/SOY1_IN]

COMP1_PR_IN_SOC
COMP1_Y_IN_SOC
COMP1_PB_IN_SOC
COMP1_Y_IN_SOC_SOY

SC_L/R_IN

Component 1

Phone JACK

SPDIF OUT

H/P JACK

COMP1_Y/Pb/
Pr

SPDIF_OUT

HP_L/ROUT

AUAD_L/R_CH3_IN

COMP2_PB_IN_SOC
COMP2_Y_IN_SOC
COMP2_Y_IN_SOC_SOY
COMP2_PR_IN_SOC

[AUAD_L/R_CH3_IN]

[PB2/Y2/SOY2/PR2_IN]

[IEC958OUT]

[AUDA_OUTL/R]

Audio OUT

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

SC_L/R_IN

AV_L/R_IN

[AUAD_L/R_CH3_IN]

[AUAD_L/R_CH2_IN]

H13

LG1154

[AUD_SCART_OUTL/OUTR]

[DACSCK]

[DACLRCK]

[AUDCLK_OUT]

[DACLRCH]

[SCL2/SDA2]

[GPIO0]

[DACSLRCH/GPIO127]

SCART_Lout/Rout

AZ4580MTR

OP AMP

AUD_SCK/LRCK/ MASTER_CLK

AUD_LRCH

I2C_SCL2/SDA2

AMP_RESET_N

AUD_LRCH1

DTV/MNT_L/R_OUT

Front

NTP7514

Mid-range

NTP7514

0x56

0x54

Mute

CTRL

[TR]

MICOM

pi filter

I2S_OUT

SCART

SCART_MUTE

AUDIO L/R OUT

LPF

LPF

8P wafer

LPF

LPF

Tuner

TU_SIF

[AAD_ADC_SIF]

[PHY0_ARC_OUT_0]

[AUDA_OUTL/OUTR]

[IEC958OUT]

AMP_MUTE

HP_L/ROUT_MAI
N

SPDIF_OUT

SPDIF_OUT_ARC

MICOM

SIDE_HP_MUT
E

TPA6138A2

Headphone

AMP

LPF

H/P Jack

HDMI2.0 Block

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

HDMI1(2.0)

CEC_

REMOTE

HDMI2(2.0)

CEC_

REMOTE

HDMI3(2.0)

CEC_

REMOTE

TMDS Link

DDC_I2C

HPD_1

TMDS Link

DDC_I2C

HPD_2

SPDIF_OUT_ARC

TMDS Link

DDC_I2C

HPD3

HDCP2.2

(R9531AN)

HDMI 2.0 Switch

(MN864778)

I2C for control

reset

SPDIF_OUT_ARC

HDMI Out 0

DDC_I2C 0

HDMI Out 1
DDC_I2C 1

HDMI_MUX_SEL

H13

2:1 MUX

HDMI_splitter

1:2 splitter

HS-LVDS

4K@30p

TMDS Link

HDMI4(1.4b)

CEC_

REMOTE

DDC_I2C

HPD4 / MHL_CBUS

MHL_VBUS

MHL2.1

(SIL9617)

D14

MICOM

(R5F100GEAFB)

OCP

(TPS2553)

HDMI Out 0

DDC_I2C 0

HDMI Out
1

DDC_I2C 1

CEC_REMOTE

2:1 MUX

HDMI_U14_2
RXASCL/SDA_U1
4

HDMI_U14_1

RXBSCL/SDA_U1
4

U14

USB / WIFI / M-REMOTE / UART

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

[USB3_DP2 / DM2]

[EXT_INTR1/GPIO68]

[USB2_0_DP/DM]

[USB3_DP0/DM0]

[USB3_RX0P/0M]
[USB3_TX0P /0M]

H13

LG1154

[USB2_1_DP0/DM0]

[UART1_RXD]

[UART1_TXD]

[UART1_RTS]
[UART1_CTS]

[UART0_RXD]

[UART0_TXD]

+3.5V_ST

CAMERA_DP / DM
CAM_SLIDE_DET, CAM_TRIGGER_DET

WIFI_DP / DM

USB3_DP / DM

USB3_RX0P
USB3_RX0M
USB3_TX0P
USB3_TX0M

HUB_DP / DM

CAM Switch

GL852G-31

AP2191

+3.5V_CAM

USB

redriver

USB HUB

IC4200

CAM_CTL

USB_DP2 / DM2

USB_DP3 / DM3

M_REMOTE_RXD

M_REMOTE_TXD

M_REMOTE_RTS

M_REMOTE_CTS

USB_Camera

USB
WIFI/BT

USB1(3.0)

USB2

USB3

CAM_PWR_ON_CMD

CAM_RESET/SLEEP

WOL/WIFI_POWER_ON

MICOM
IC3000

R5F100GEAFB

SOC_TX

SOC_RX

MICOM

SOC_TX

RS-232C

SOC_RX

WIFI/BT

I2C Map (H13)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

UHD OLED

Module (0xF0, Fast)

IC2500

URSA9 (0x48, Fast)

Renesas MICOM(0x52, Slow)

EYE_I2C_SDA
EYE_I2C_SCL

HDMI SW – 0x94
HDMI Tx – 0x98
HDMI Rx – 0x92
MHL Rx – 0xE0

EDID – 0xE4

CEC – 0xC8

TCON_I2C_EN

33 Ω

IC3000

3.3KΩ

100Ω

IR / KEY/EYE

IC3206

MHL (HDMI4, Normal)

IC5600

NTP7514(Front, 0x54, Fast)

IC5800

NTP7514(Woofer, 0x56, Fast)

+3.5V_ST

33Ω

100Ω

100Ω

+3.3V_NORMAL

1.8 KΩ

+3.3V_NORMAL

1.8KΩ

+3.3V_NORMAL

1.8KΩ

IC100

H13

I2C_SDA1

I2C_SCL1

I2C_SDA_MICOM_SOC

I2C_SCL_MICOM_SOC

I2C_SDA2

I2C_SCL2

I2C_SDA4

I2C_SCL4

I2C_SDA5

I2C_SCL5

I2C_SDA6

I2C_SCL6

+3.3V_TUNER

1.8KΩ

+3.3V_NORMAL

1.8KΩ

+3.3V_LNA_TU

U14 Jig I2C_SCL5  I2C_SCL2 변경

1.8KΩ or 1.5KΩ(KOR_PIP)

33Ω

33Ω

33Ω

0Ω

100Ω

NTP7514(Height, 0x54, Fast)

33Ω

IC6900

LNB (0x10, Normal)

TUNER

(Normal)

IC102

NVRAM(0xA0, Fast)

IC3200

HDMI SW (Fast)

IC5500

TUNER

(Normal)

D14 SPI 통신
(I2C disable-1206)

IC12000

D14 (0x1E, Normal)

IC12300

U14 (0x8E, Normal)

33Ω

33Ω

I2C Map (MICOM)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

I2C_SCL_MICO

H13

LG1154D

HDMI Jack

Camera

LAN PHY

M

I2C_SDA_MICO
M

HDMI_CEC

CAM_SLEEP

WOL/ETH_POWER_ON

[P60/SCLA0]

[P61/SDAA0]

[P70/KR0/SCK21/SCL

[P75/KR5/INTP9/SCK01/SCL

MICOM

(IC3000)

R5F100GEAFB

[P74/KR4/INTP8/SI01/SD
A01]

[P30/INTP3/RTC1HZ/SCK11/SCL1
1]

[P50/INTP1/SI11/SDA11]

[P71/KR1/SI21/SDA2

21]

01]

1]

EYE_SDA

EYE_SCL

IR

+3.5V_ST

3.3k Ω

3.3k Ω

100 Ω

100 Ω

2

1

IR/Logo/Key

GPIO (H13)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

TUNER

TU6701

TDJM-H151F

Mux

IC3302, IC3501

TS3DV642A0RUAR

COMPONENT1 PHONE JACK

JK3400

PEJ038-4G6

CVBS1 PHONE JACK

JK3402

PEJ038-4Y6

HEAD PHONE JACK

JK3403

PEJ038-3B6

M_REMOTE, WIFI

P4000

SMAW200-H14S5K

51P_V by 1

P13000

FI-RE51S-HF-J-R1500

I2C Map 참조

RS-232C

IC6801

MAX3232CDR

MICOM_RENESAS

IC3000

R5F100GEAFB

CAMERA

P4200

DEV

AMP MAIN , Woofer, Height

IC5600, IC5500, IC5800

NTP7514

CI SLOT

JK700

10125901-115LF

U14

IC12300

/TU_RESET1
/TU_RESET2
RF_SWITCH_CT

HDMI_MUX_SE
L

COMP1_DET

AV1_CVBS_DET

HP_DET

M_REMOTE_RTS
M_REMOTE_RX
M_REMOTE_TX
M_RFModule_RESE

T
M_REMOTE_CTS
WIFI_DM
WIFI_DP

Compensation_Don
e

I2C_SCL/SDA1~6

SOC_RX

SOC_TX

CAM_SLIDE_DET

CAM_TRIGGER_DET

CAMARA_DP

CAMERA_DM

AMP_RESET_N_1

AUD_LRCH2

/PCM_CE1 /PCM_CE2
CAM_CD1_N
CAM_CD2_N
CAM_IREQ_N
PCM_RESET
CAM_INPACK_N
PCM_5V_CTL
CAM_WAIT_N
CAM_REG_N
EB_DATA[0-7]
EB_ADDR[0-14]
EB_BE_NO
EB_OE_N
EB_BE_NI
EB_WE_N

U14_RESET
H13_CONNECT
SOC_SPI1_CS
SOC_SPI1_MOS
I
SOC_SPI1_MIS
O
SOC_SPI1_SCL
K

AG6 [GPIO10]
AK33 [GPIO4]
AG34 [GPIO26]

AM33[GPIO3
0]

AJ6[GPIO14]

AK5[GPIO16]

AH6[GPIO12
]

AJ7 [GPIO13]
[USB2_0_DM]

AT7
[USB2_0_DP]

AU7
AM32 [GPIO29]

AR15 [SCL0/GPIO66]
AP15 [SDA0/GPIO65]
AR16 [SCL1/GPIO64]
AP16 [SDA1/GPIO79]
AP17 [SCL2/GPIO78]
AR17 [SDA2/GPIO77]
AP6 [SCL3]
AR6 [SDA3]
AH32 [SCL4]
AJ33 [SDA4]
AJ34 [SCL5]
AH33 [SDA5]

AU12 [UART0_RXD]
AT12 [UART0_TXD]

AL32[GPIO31]
W33[GPIO68]

AK32[GPIO 0]
AJ5[GPIO15]
AM6[GPIO21]

F33 [CAM_CE1_N], F34 [CAM_CE2_N]
F32 [CAM_CD1_N/GPIO76]
E32 [CAM_CD2_N/GPIO75]
F32 [CAM_IREQ_N/GPIO73]
G34 [CAM_RESET]
D33 [CAM_INPACK/GPIO74]
H32 [CAM_VCCEN_N/GPIO87]
E33 [CAM_WAIT_N/GPIO84]
D34 [CAM_REG_N/GPIO72]
EB_DATA[0-7], EB_ADDR[0-14]
H37 [GPIO80]
J36 [GPIO82]
H36 [GPIO81]
H35 [GPIO95]

AG5 [GPIO 9]
W34 [GPIO 67]
AE35 [GPIO36]
AE36 [GPIO38]
AF36 [GPIO39]
AF35 [GPIO37]

H13

IC100

LG1154D

[GPIO6] AG30

[USB2_2_DP0] L37

[USB2_2_DM0] L36

[HUB_PORT_OVER0]

[HUB_VBUS_CTRL0]

[USB3_DM0] P36

[USB3_DP0] P37
[USB3_RX0P] N36
[USB3_RX0M] N37
[USB3_TX0M] R37

[USB3_TX0P] R36

[SPK_SCLK1] AG32

[SC_CLK/GPIO130] T33

[SC_DETECT/GPIO133] U33

[SC_VCCEN/GPIO129] T32

[SC_VCC_SEL/GPIO128] V32

[SC_RST/GPIO131] V33

[SC_DATA/GPIO132] V34

[PHY0_RX0N_0] AC36
[PHY0_RX0P_0] AC37

[PHY0_RX1N_0] AB36

[PHY0_RX1P_0] AB37

[PHY0_RX2N_0] AA36

[PHY0_RX2P_0] AA37

[PHY0_RXCN_0]

[PHY0_RXCP_0]

R32

R33

L35[GPIO90]
K37[GPIO91]
K36[GPIO92]
K35[GPIO93]

[GPIO 8] AF5

[GPIO70] Y33
[SPI_CS1] AG34
[SPI_DO1] AF33

[SPI_DI1] AG33

[GPIO2] AD30

[GPIO24] AL32

[GPIO25]AL33

[GPIO28] AF30

[GPIO27] AN34

[GPIO69]W32

[GPIO17] AK6

AD36
AD37

[TRST_N0] AP9

[TMS0] AN9

[TCK0] TCK0

[TDI0] TDI0

[TDO0] AN10

[GPIO7] AH30

[GPIO3] AE30

[GPIO11] AG7

/RST_HUB

HUB_DM

HUB_DP

/USB_OCD1

USB_CTL1

USB_CTL3

USB_OCD3

USB_CTL2

USB_OCD2

USB3_DM

USB3_DP

USB3_RX0M

USB3_RX0P
USB3_TX0M
USB3_TX0P

D14_HWRESET
D13_INT
SOC_SPI0_CSO
SOC_SPI0_MOS
I
SOC_SPI0_MIS
O
SOC_SPIO_SCL
K

SMART_CARD_CLK
SMARTCARD_DET
SMARTCARD_VCC
SMARTCARD_PWR_SEL
SMARTCARD_RST
SMARTCARD_DATA

HDMI_HPD_
1

/RST_PHY

EPHY_INT

SC_DET

HDMI_RX0­HDMI_RX0+
HDMI_RX1­HDMI_RX1+
HDMI_RX2­HDMI_RX2+
HDMI_CLK­HDMI_CLK+

TRST_N0
TMS0
TCK0
TDI0
TDO0

/FRC_FLASH_W
P

MN864778_RESE
T

ITE_RESET

USB HUB

IC4200

GL852G-31

OCP USB1

IC4400

BD2242G

5V DCDC & OCP USB 2/3

IC42304

SN1302001(TPS6528RHDR)

USB1

JK4300

3SAU009S-1P35-X-H1

D14

IC12000

B-CAS
IC6300

TDA8024TT

HDMI 1/2/3/4

JK3203, JK3200, JK3201, JK3202

DAADR019A

ETHERNET PHY

IC5200

RTL8201F-VB-CG

Full Scart(18P)

JK4600

DA1R018H91E

HDMI Splitter

IC3300

PI3HDMI412ADZBE

Jtag I/F

P100

12505WS-10A00

SPL Flash (URSA)

IC1901

MX25L3206EM2I-12G

HDMI Swich

IC3200

MN864778

MHL

IC3206

IT6861E

GPIO (U14/URSA9)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

GPIO[0] : Pull Down
: No Setting
GPIO[0] Pull UP, GPIO[1] Pull Down
: 1920x1080@60p
GPIO[0] Pull UP, GPIO[1] Pull UP
: 2560x1080@60p

H13

IC100

LG1154

URSA9
IC2500

IC12301

MX25L3206EM2I-12G

SPI FLASH(4MByte)

OSD_SET

FHD_D9_SET

H13_CONNECT

URSA9_CONNECT

U14_FLASH_WP

T23 [GPO 0]

T24 [GPO 1]

U23 [GPO 2]

U24 [GPO 3]

V23 [GPIO 4]

U14

IC12300

LG1614

P1900
12507WS-04L
URSA_UART

H13D
IC100

PANEL_I2C_SCL1/SDA1

P13000

[51P Vx1 output wafer]

Chip Config

Debug/ISP ADDR

Slabe (Debug Port:0XB4,ISP:0X98)

CHIP_CONF=3’d7:111:boot from SPI Flash

URSA Option

URSA_OPT_0 : Rx Interface

(1 : LVDS, 0 : Vx1)

URSA_OPT_1 : Module Type

(1 : LGD, 0 : OS)

URSA BIT Lane
BIT [2/1/0] : Tx Lane
0 / 0 / 0 : 4K@120 (16lane)
0 / 0 / 1 : 4k@60 (8lane)
0 / 1 / 0 : 5k@120 (20lane)
0 / 1 / 1 : Reserved
1 / 0 / 0 : FHD@120 (4lane)
1 / 0 / 1 : FHD@60 (2lane)
1 / 1 / 0 : Reserved
1 / 1 / 1 : Reserved

UART2_TX

UART2_RX

URSA_RESET

TCON_I2C_EN

3D_EN

L_DIM_EN

DIM 0
DIM 1

DIM 1

URSA_OPT_0

URSA_OPT_1

URSA_BIT0

URSA_BIT1

URSA_BIT2

I2C_SCL1/SDA1

B4 GPIO[0]
[UART2_TX]

A4 GPIO[1] [UART2_RX]

AF29 RESET

AE28 INT_R21/GPIO[41]

AG27 SPI4_CK/DIM8/GPIO52

AG26 SPI4_DI/DIM9/GPIO53

AG23 DIM0/GPIO[32]
AG20 DIM1/GPIO[33]
AH23 DIM2/GPIO[34]

AH20 DIM3/GPIO[35]

AG21 DIM4/GPIO[36]

URSA9

IC2500

AH22 DIM5/GPIO[37]
AG22 DIM6/GPIO[38]

AH21 DIM7/GPIO[39]

U14
IC12300
LG1614

IC1901

SPI Flash 4MB

MX25L3206EM2I-12G

POWER_DET

EDID_WP

URSA9_CONNECT

Vx1_LOCKn_O/URSA_LOCK_

Vx1_LOCKn_V/URSA_LOCK_

O

V

FLASH_WP_URSA

AG18 GPIO[12]

AJ20 GPIO[13]

AH18 GPIO[14]

AG19 GPIO[15]

AH19 GPIO[16]

AJ21 GPIO[17]

GPIO (MICOM)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

H13

IC100

LG1154

Jtag I/F Connector

P100

12505WS-10A00

H13

P4000

T-SMAW200_H14S5K

EYE_Q_10P

P4004

12507WR-10L

12V-1.5V DCDC

IC13403

BD9D320EFJ

12V-3.3V DCDC

IC2301

BD86106EFJ

3.3V-2.5V LDO
IC2302

AP2132MP-2.5TRG1

12V-1.0V DCDC

IC2300

BD9D320EFJ

12V-1.5V DCDC

IC2303

BD9D320EFJ

12V-1.5V DCDC

IC12201

BD9D320EFJ

12V-1.5V DCDC

IC12500

BD9D320EFJ

12V-1.15V DCDC

IC13402

TPS53513RVER

12V-1.2V DCDC

IC2309

TPS53513RVER

12V-1.2V DCDC

IC12501

TPS53513RVER

12V-1.1V DCDC

IC12200

BD86106EFJ

Analog Switch

IC5201

AP2151WG-7

Analog Switch

IC4201

AP2151WG-7

I2C_SCL/SDA2
SOC_RESET

WOL/WIFI_POWER_

ON

LED_R

IR

EYE_SDA

EYE_SCL

KEY1/KEY2

LOGO_LIGHT

POWER_ON/OFF2_1

POWER_ON/OFF2_2

POWER_ON/OFF2_3

POWER_ON/OFF2_4

WOL_CTL

CAM_CTL

1 [P60/SCLA0]
2 [P61/SDAA0]

18 [P14/RxD2/SI20/SDA20]

5 [P31/TI03/TO03/INTP4]

16
[P16/TI01/TO01/INTP5]

6
[P75/KR5/INTP9/SCK01/SCL01]

10 [P71/KR1/SI21/SDA21]

11 [P70/KR0/SCK21/SCL21]

31 [P21/ANI1/AVREFM]
32 [P20/ANI0/AVREFP]

38 [P41/TI07/TO07]

33 [P130]

8 [P73/KR3/SO01]

MICOM

9 [P72/KR2/SO21]

IC3000

T-R5F100GDAFB

RENESAS

34 [P01/TO00/RXD1]

17 [P15/PCLBUZ1/SCK20/SCL20]

24 [P147/ANI18]

[P12/SO00/TXD0/TOOLTXD] 20

[P11/SI00/RXD0/TOOLRXD/SDA00]

[P10/SCK00/SCL00] 22

[P25/ANI5] 27

[P30/INTP3/RTC1HZ/SCK11/SCL11

[P50/INTP1/SI11/SDA11] 13

[P51/INTP2/SO11] 14

[P17/TI02/TO02] 15

[P140/PCLBUZ0/INTP6]
36

[P13/TXD2/SO20] 19

[P00/TI00/TXD1] 35

] 12

[P120/ANI19] 37

[P121/X1] 45

[P146] 23

[P24/ANI4] 28
[P27/ANI7] 25
[P26/ANI6] 26
[P23/ANI3] 29

[P62] 3

[P40/TOOL0] 39

[RESET] 40

[P137/INTP0] 43

21

SOC_RX/TX

AMP_MUTE

SIDE_HP_MUTE

CAM_SLEEP
CAM_RESET

CAM_PWR_ON_CMD

WOL/ETH_POWER_O

N

POWER_DET

POWER_ON/OFF1

RL_ON

INV_CTL

EDID_WP

MODEL1_OPT_0~4

SCART_MUTE

MICOM_DEBUG

MICOM_RESET

MHL_DET

H13

IC100

LG1154

RS232C 16P

IC6801

MAX3232CDR

AMP MAIN

IC5600

NTP7514

HP AMP

IC6100

TPA6138A2

USB CAMERA

P4200

DEV_CAM_WAFER

ETHERNET

IC5200

RTL8201F-VB-CG

RESET IC

IC2307

BD48K28G

24V-5.0V DCDC

IC2304

TPS65286RHDR

24P POWER

P13002

SMAW200-H24S5

51P Vx1

P13000

FI-RE51S-HF-J-R1500

HDMI SWITCH

IC3200

MN864778

OPT0 LOGO_LIGHT / NON_LOGO_LIGHT
OPT1 OLED / LCD / UHD
OPT2 EPI / NON_EPI
OPT3 H13 / H14 / M14
OPT4 GED / NON_GED

Full SCART

JK4800

DA1R018H91E

MICOM Debug

P3000

12507WS-04L

HDMI4

JK3202

DAADR019A

HDMI SW

IC3206

IT6861E

POWER S/W

IC3207

BD2242G

T-R5F100GDAFB

[P74/KR4/INTP8/SI01/SDA01]

44 [P122/X2/EXCLK]

41 [P124/XT2/EXCLKS]
42 [P123/XT1]

EL_VDD_MONITOR

HDMI_CEC

JK3203, JK3200, JK3201, JK3202

MICOM

IC3000

RENESAS

7

MICOM X-TAL

X3000

32.768KHz

RESET IC

IC2306

NCP803SN293

HDMI 1 / 2 / 3 /4

DAADR019A

VDDC15_D14

VDDC11_U14_XTAL

VDDC15_M0

H13A/D, D14, U14, URSA9

HDMI Switch

VDD_MHL IC

2:1 MUX, Splitter

D14/U14 SPI Flash 4Mb

+3.3V_TUNER

+3.3V_LNA_TU

3.3V_eMMC

BT, USB Hub

OCP USB1

B-CAS, Scart

SPDIF, HP, Component, CVBS

Woofer/Front//Height SPK Amp,

Earphone AMP

51P Vx1

SPI Flash

U_MVREFCA_A0/A1

U_MVREFCA_B0/B1

VDDC

AVDDL_MOD

AVDDL_DRV

DVDD_DDR

AVDDL_HDMI_TX_RX

AVDDL_LVDSRX

VDDC15_M0

VDDC15_M1

VDDC12_XTAL

VDD12_VTXPHY

VDD10_XTAL

VDDC10

VDDC15_D14

VREF_M0_0/1_D14

VREF_M1_1_D14

VDDC11_XTAL_D14

M0/1_0/1_VREFCA_D1

4

M0/1_0/1_VREFDQ_D1

4

VREF_M0/1_0/1_D14

VDDC15_U14_DDR

U14_DDR0/1_VREFCA

U14_DDR0/1_VREFDQ

VREF_U14_DDR0/1

VDD25_D14

VDD25_U14

VDD25_U14_XTAL

AVDD25

AVDD25_REF

VDD25_LTX

VDD25_AUD

VDD25_XTAL

VDD25_LVDS

Demod_Core

DVDD12_MHL

NVDD12_MHL

Power Block

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

LDO DCDC

12V

L2322

L2301

L2300 L2307

L1221

L1221

L1250

L1250

L1340

L1341

L2305 L2309

D14 (IC12000)
U14 (IC12300)

H13A (IC101)

H13D (IC100)

VDD_MHL (IC3206)

Tuner (TU6701)

1.2V H13D Core 8A (IC2309)

1.5V H13D DDR 3A (IC2303)

L2321

L2308

1.0V H13A Core 3A (IC2300)

1

1.1V D14 Core 6A (IC12200)

1.5V D14 DDR 3A (IC12201)

3

2

0

1.2V U14 Core 8A (IC12501)

1.5V U14 DDR 3A (IC12500)

L1221

2

L1221

4

L1250

1

L1250

4

H13D (IC100)

H13D DDR3 4Gb 6EA (IC500, IC502, IC504, IC505, IC501, IC503)

H13A (IC101)

HDMI SWITCH
(IC320000)

D14 (IC12000)

D14 DDR3 1Gb 4EA
(IC12101, IC12103,
IC12100, IC12102)

U14 (IC12300)

D14 (IC12000)

U14 DDR3 1Gb 2EA
(IC12401, IC12402)

U14 (IC12300)

2

1

1.15V URSA9 Core 8A (IC13402)

1.5V URSA9 DDR 3A (IC13403)

3.3V Normal 6A (IC2301)

L1340

3

L1341

2

URSA9 DDR3 1Gb 4EA
(IC2600, IC2700,
IC2800, IC2900)

H13D DDR3 4Gb 6EA

URSA9 (IC2500)

IC`101, IC100, IC12000, IC12300, IC2500

IC3200

IC3206

MUX : IC3302, IC3501 / Splitter : IC3300

IC12002, IC12301

TU6701
TU6701

2.5V_Normal 2A (IC2302)

IC8100
P4000, IC4200

IC4400

IC6300, JK4800

JK3401, JK3403, JK3400, JK3402

IC5500, IC5600, IC5800, IC6100

1.2V_MHL 1A (IC3205)

P13000
IC1901

1.2V_Tuner 2A (IC6500)

1.8V_URSA 1A (IC13000)

Micom

HDMI4

VDD_MHL IC

CAM

WOL/LAN

Sub(EYE_Q 10P, IR, Jo

g, WIFI)

RS232C/ LAN

Woofer NTP7514

Front NTP7514

Height NTP7514

USB 3EA

OCP USB1

HDMI

HDMI Switch

VDD_MHL IC

B-CAS/ CI Slot

Power Block

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

3.5V

24V

5V Normal & USB

6A (IC2304)

3.5V_ST Power DET
(IC2308)

2.5V_Normal 2A (IC2302)

IC3000

JK3202

IC3206

IC4201/ P4200
Ethernet (IC5200)

P4004, P4000

IC6801

JK4400, JK4302, JK4300
IC4400
JK3203, JK3200, JK3201, JK3202

IC320

IC3206

0

IC6300

LDO DCDC

1.2V_Tuner 2A (IC6500)

AMP 4.2Ch

IC5500, IC5600, IC5800

Power Block

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V_NORMAL

+2.5V_NORMAL

+1.5V_DDR

+1.2V_VDD

+3.3V_NORMAL

+2.5V_NORMAL

+1.0V_VDD

H13D
IC100

Power Seq. : 3.3V->2.5V->1.5V->1.2V Power Seq. : 3.3V -> 2.5V -> 1.0V

+3.3V_NORMAL

+2.5V_NORMAL

VDDC15_D14

+1.1V_VDD_D14

+3.3V_NORMAL

D14

H13A

IC101

+2.5V_NORMAL

+1.5V_U14_DDR

+1.1V_U14_VDD

U14

+3.3V_NORMAL

+1.5V_U_DDR

+1.15V_URSA

URSA9

Power Seq. : 3.3V -> 2.5V -> 1.5V -> 1.1V Power Seq. : 3.3V->2.5V -> 1.5V-> 1.1V Power Seq. : 3.3V -> 1.5V -> 1.15V

Interconnection – sub PCB (65EC9700)

Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

65EC9700

[PCBs]

1

Main PCB

5

7

2

1

2

PSU

3

T – CON (Main PCB Under)

4

LOGO + IR Jog Key

5

BT MOTION ASSY

6

WIFI ASSY

WIFI ASSY BT MOTION ASSY

7

4

6

3

To Main