Page 1
Internal Use Only
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED TV
SERVICE MANUAL
CHASSIS : LB41V
MODEL : 60UB850T 60UB850T-TA
60UB859Y 60UB859Y-TA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
Printed in Korea P/NO : MFL68084555 (1410-REV00)
Page 2
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ........................................................................ 3
SERVICING PRECAUTIONS .................................................................... 4
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION .............................................................. 14
BLOCK DIAGRAM .................................................................................. 22
EXPLODED VIEW .................................................................................. 24
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Only for training and service purposes
- 2 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 3
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Only for training and service purposes
- 3 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 4
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions. Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug
or other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION : A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specied otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION : This is a ammable mixture.
Unless specied otherwise in this service manual, lubrication
of contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks
are correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test xtures specied in this
service manual.
CAUTION: Do not connect the test xture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some eld-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder
ES devices.
4. Use only an anti-static type solder removal device. Some sol-
der removal devices not classied as “anti-static” can generate
electrical charges sufcient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufcient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will
be installed.
CAUTION : Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted oor can generate static electricity sufcient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within
the range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand
against the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder ows onto and around both the compo nent lead and the foil.
CAUTION : Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
Only for training and service purposes
- 4 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 5
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent at against the cir cuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION : Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
Only for training and service purposes
- 5 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 6
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
1. Application range
This specification is applied to the LED TV used LB41V
chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
4. Model General Specification
No. Item Specication Remarks
DTV & Analog
1 Market
2 Broadcasting system
3 Receiving system
5 Video Input (1EA) PAL, SECAM, NTSC
6 Component Input (1EA) Y/Cb/Cr, Y/Pb/Pr Rear (gender)
7 HDMI Input (3EA)
8 Audio Input (1EA) Component, AV, DVI
9 SPDIF out(1EA) Optical Audio out Rear (1EA)
10 Analog audio out(1EA) Headphone and External speaker out Rear (1EA)
11 USB Input(3EA) EMF, DivX HD, For SVC (download)
Asia, Oceania, Africa,
Middle East(PAL/DVB Market)
Digital : DVB-T
Analog : PAL-BG, DK, I/I’, SECAM-DK/BG/I
Digital : COFDM, QAM
Analog : Upper Heterodyne
PC / DTV format,Support HDCP
HDMI1-HDCP2.2, HDMI2-ARC, HDMI3, HDMI4-MHL
* DTV Region: Australia/ NewZealand(AU),
Singapore(SG), Malaysia(MY), Vietnam
(VN), South Africa(ZA), Iran(IR), Israel(IL)
▪ Australia/India : only PAL-BG(B)
▪ DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
4 System : PAL, SECAM, NTSC, PAL60
Rear (gender)
Side
Rear (AV Gender)
Component, AV and DVI use same jack.
Side JPEG, MP3, DivX HD
(USB 3.0 : 1EA, USB 2.0 : 2EA)
Only for training and service purposes
- 6 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 7
5. External Input Support Format
5.1. Component (Y, PB, PR)
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed
1. 720*480i 15.73 59.94 13.500 SDTV, DVD 480I(525I)
2 720*480i 15.73 60.00 13.514 SDTV, DVD 480I(525I)
3. 720*576i 15.625 50.00 13.500 SDTV, DVD 576I(625I) 50Hz
4 720*480p 31.47 59.94 27.000 SDTV 480P
5 720*480p 31.50 60.00 27.027 SDTV 480P
6 720*576p 31.25 50.00 27.000 SDTV 576P 50Hz
7 1280*720 44.96 59.94 74.176 HDTV 720P
8 1280*720 45.00 60.00 74.250 HDTV 720P
9 1280*720 45.00 50.00 74.250 HDTV 720P 50Hz
10 1920*1080 28.125 50.00 74.250 HDTV 1080I 50Hz,
11 1920*1080 33.72 59.94 74.176 HDTV 1080I
12 1920*1080 33.75 60.00 74.25 HDTV 1080I
13 1920*1080 56.25 50 148.5 HDTV 1080P
14 1920*1080 67.5 60.00 148.5 HDTV 1080P
Only for training and service purposes
- 7 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 8
5.2. HDMI : EDID DATA : Refer to adjust specification.
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks
1 640*480 31.469 59.94 25.125 SDTV 480P
2 640*480 31.5 60.00 25.125 SDTV 480P
3 720*480 15.73 59.94 13.500 SDTV, DVD 480I(525I)
Spec. out but display 4 720*480 15.75 60.00 13.514 SDTV, DVD 480I(525I)
5 720*576 15.625 50.00 13.500 SDTV, DVD 576I(625I) 50Hz
6 720*480 31.47 59.94 27 SDTV 480P
7 720*480 31.5 60.00 27.027 SDTV 480P
8 720*576 31.25 50.00 27 SDTV 576P
9 1280*720 44.96 59.94 74.176 HDTV 720P
10 1280*720 45 60.00 74.25 HDTV 720P
11 1280*720 37.5 50.00 74.25 HDTV 720P
12 1920*1080 28.125 50.00 74.25 HDTV 1080I
13 1920*1080 33.72 59.94 74.176 HDTV 1080I
14 1920*1080 33.75 60.00 74.25 HDTV 1080I
15 1920*1080 26.97 23.976 63.296 HDTV 1080P
16 1920*1080 27.00 24.000 63.36 HDTV 1080P
17 1920*1080 33.71 29.97 79.120 HDTV 1080P
18 1920*1080 33.75 30.00 79.20 HDTV 1080P
19 1920*1080 56.25 50.00 148.5 HDTV 1080P
20 1920*1080 67.432 59.94 148.350 HDTV 1080P
21 1920*1080 67.5 60.00 148.50 HDTV 1080P
22 3840*2160 53.95 23.98 296.703 UDTV 2160P Only UD Model
23 3840*2160 54 24.00 297.00 UDTV 2160P Only UD Model
24 3840*2160 56.25 25.00 297.00 UDTV 2160P Only UD Model
25 3840*2160 61.43 29.97 296.703 UDTV 2160P Only UD Model
26 3840*2160 67.5 30.00 297.00 UDTV 2160P Only UD Model
27 3840*2160 112.5 50.00 594 UDTV 2160P Only UD Model, Port3
28 3840*2160 135 59.94 593.407 UDTV 2160P Only UD Model, Port3
29 3840*2160 135 60.00 594 UDTV 2160P Only UD Model, Port3
30 4096*2160 53.95 23.98 296.703 UDTV 2160P Only UD Model
31 4096*2160 54 24.00 297 UDTV 2160P Only UD Model
32 4096*2160 56.25 25.00 297 UDTV 2160P Only UD Model
33 4096*2160 61.43 29.97 296.703 UDTV 2160P Only UD Model
34 4096*2160 67.5 30.00 297 UDTV 2160P Only UD Model
35 4096*2160 112.5 50.00 594 UDTV 2160P Only UD Model, Port3
36 4096*2160 135 59.94 593.407 UDTV 2160P Only UD Model, Port3
37 4096*2160 135 60.00 594 UDTV 2160P Only UD Model, Port3
Only for training and service purposes
- 8 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 9
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1 640*350 31.468 70.09 25.17 EGA
2 720*400 31.469 70.08 28.32 DOS
3 640*480 31.469 59.94 25.17 VESA(VGA)
4 800*600 37.879 60.31 40 VESA(SVGA)
5 1024*768 48.363 60.00 65 VESA(XGA)
6 1360*768 47.712 60.015 84.75 VESA(WXGA)
7 1152*864 54.348 60.053 80 VESA
8 1280*1024 63.981 60.020 109.00 SXGA Support to HDMI-PC
9 1920*1080 67.5 60 158.40 WUXGA(Reduced Blanking)
10 3840*2160 54 24.00 297.00 UDTV 2160P Only UD Model
11 3840*2160 56.25 25.00 297.00 UDTV 2160P Only UD Model
12 3840*2160 67.5 30.00 297.00 UDTV 2160P Only UD Model
13 4096*2160 53.95 23.98 296.703 UDTV 2160P Only UD Model
14 4096*2160 54 24 297 UDTV 2160P Only UD Model
15 4096*2160 56.25 25 297 UDTV 2160P Only UD Model
16 4096*2160 61.43 29.97 296.703 UDTV 2160P Only UD Model
17 4096*2160 67.5 30 297 UDTV 2160P Only UD Model
Only for training and service purposes
- 9 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 10
6. 3D Mode - DTV/HDMI/USB
6.1. RF Input
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remarks
1 1280*720 37.500 50 74.25 HDTV 720P 2D to 3D, Side by Side, Top & Bottom
2 1920*1080 28.125 50 74.25 HDTV 1080I 2D to 3D, Side by Side, Top & Bottom
6.2. HDMI Input
(1) HDMI 1.4/2.0 (3D Supported mode manually)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode
1 720*480 31.5 60 27.03 SDTV 480P
2 720*576 31.25 50 27 SDTV 576P
3 1280*720
4 1920*1080
5 1920*1080
3840*2160
6
4096*2160
3840*2160
7
4096*2160
45.00 60.00 74.25 HDTV 720P
37.500 50 74.25 HDTV 720P
33.75 60.00 74.25 HDTV 1080I
28.125 50.00 74.25 HDTV 1080I
27.00 24.00 74.25 HDTV 1080P
28.12 25 74.25 HDTV 1080P
33.75 30.00 74.25 HDTV 1080P
67.50 60.00 148.5 HDTV 1080P 2D to 3D, Side by Side(Half), Top & Bottom,
56.250 50 148.5 HDTV 1080P
53.95 23.976 297.00
54 24.00 296.703
56.25 25.00 297.00
61.43 29.970 297.00
67.5 30.00 296.703
112.5 50
135 60
594
HDTV 2160P
HDTV 2160P
HDTV 2160P
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Frame Sequential, Row Interleaving, Column Interleaving
2D to 3D, Side by Side(Half), Top & Bottom
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column
Interleaving
Checker Board, Single Frame Sequential, Row
Interleaving, Column Interleaving
2D to 3D,
Top & Bottom(half), Side by Side(half),
2D to 3D, Top & Bottom(half), Side by Side(half),
Port3 Only
Only for training and service purposes
- 10 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 11
(2) HDMI 1.4b (3D Supported mode automatically)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC 3D input proposed mode Proposed
31.469 / 31.5 59.94/ 60 25.125/25.2 1
1 640*480
2 720*480
3 720*576
4 720*576 15.625 50 27 21
5 1280*720
6 1920*1080
7 1920*1080
31.469 / 31.5 59.94/ 60 50.35/50.4 1 Side-by-side(Full) (SDTV 480P)
62.938/63 59.94/ 60 50.35/50.4 1
31.469 / 31.5 59.94 / 60 27.00/27.03 2,3
31.469 / 31.5 59.94 / 60 54/54.06 2,3 Side-by-side(Full) (SDTV 480P)
62.938/63 59.94 / 60 54/54.06 2,3
31.25 50 27 17,18
31.25 50 54 17,18 Side-by-side(Full) (SDTV 576P)
62.5 50 54 17,18
37.500 50 74.25 19
37.500 50 148.5 19 Side-by-side(Full) (HDTV 720P)
44.96 / 45 59.94 / 60 74.17/74.25 4
44.96 / 45 59.94 / 60 148.35/148.5 4 Side-by-side(Full) (HDTV 720P)
75 50 148.5 19
89.91/90 59.94 / 60 148.35/148.5 4
28.125 50.00 74.25 20
28.125 50.00 148.5 20 Side-by-side(Full) (HDTV 1080I)
33.72 / 33.75 59.94 / 60 74.17/74.25 5
33.72 / 33.75 59.94 / 60 148.35/148.5 5 Side-by-side(Full) (HDTV 1080I)
56.25 50.00 148.5 20
67.432/67.50 59.94 / 60 148.35/148.5 5
26.97 / 27 23.97 / 24 74.17/74.25 32
26.97 / 27 23.97 / 24 148.35/148.5 32 Side-by-side(Full) (HDTV 1080P)
28.12 25 74.25 33
28.12 25 148.5 33 Side-by-side(Full) (HDTV 1080P)
33.716 / 33.75 29.976 / 30.00 74.18/74.25 34
33.716 / 33.75 29.976 / 30.00 148.35/148.5 34 Side-by-side(Full) (HDTV 1080P)
43.94/54 23.97 / 24 148.35/148.5 32
56.25 25 148.5 33
67.432 / 67.5 29.976 / 30.00 148.35/148.5 34
56.250 50 148.5 31
67.43 / 67.5 59.94 / 60 148.35/148.50 16
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Frame packing
Field alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Frame packing
Line alternative
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)
Frame packing
Field alternative
Frame packing
Field alternative
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Frame packing
Line alternative
Frame packing
Line alternative
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
(SDTV 480P)
Secondary(SDTV 576P)
Secondary(SDTV 576P)
Secondary(SDTV 576P)
(SDTV 576P)
Secondary(SDTV 576I)
(SDTV 576I
(SDTV 576I
Secondary(SDTV 576I)
Secondary(SDTV 576I)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
(HDTV 720P)
Primary(HDTV 720P)
(HDTV 720P)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
Primary(HDTV 1080I)
(HDTV 1080I)
Primary(HDTV 1080I)
(HDTV 1080I)
Primary(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Secondary(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Primary(HDTV 1080P)
(HDTV 1080P)
Secondary(HDTV 1080P)
(HDTV 1080P)
Primary(HDTV 1080P)
(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Only for training and service purposes
- 11 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 12
(3) HDMI-PC Input (3D) (3D Supported mode manually)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1024*768 48.36 60 65 HDTV 768P
2 1360*768 47.71 60 85.5 HDTV 768P
3 1920*1080 67.500 60 148.50 HDTV 1080P
3840*2160
4
4096*2160
3840*2160
5
4096*2160
6 Others - - -
(4) Component Input (3D) (3D Supported mode manually)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1280*720 37.5 50 74.25 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom
2 1280*720 45.00 60.00 74.25 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom
3 1280*720 44.96 59.94 74.176 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom
4 1920*1080 33.75 60.00 74.25 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom
5 1920*1080 33.72 59.94 74.176 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom
6 1920*1080 28.12 50 74.25 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom
7 1920*1080 67.500 60 148.50 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
8 1920*1080 67.432 59.94 148.352 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
9 1920*1080 27.000 24.000 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
10 1920*1080 28.12 25 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
11 1920*1080 56.25 50 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
12 1920*1080 26.97 23.976 74.176 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
13 1920*1080 33.75 30.000 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
14 1920*1080 33.71 29.97 74.176 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
54 24.00 296.703
56.25 25.00 297
67.5 30.00 296.703
112.5 50 594
135 60 594
HDTV 2160P
HDTV 2160P
640*350
720*400
640*480
800*600
1152*864
2D to 3D,
Side by Side(half), Top & Bottom
2D to 3D,
Side by Side(half), 7Top & Bottom
2D to 3D,
Side by Side(half), Top & Bottom,
Checker Board, Single Frame Sequential,
Row Interleaving, Column Interleaving
2D to 3D,
Top & Bottom(half), Side by Side(half),
2D to 3D,
Top & Bottom(half), Side by Side(half),
Port3 Only
2D to 3D,
Side by Side(half), Top & Bottom
Only for training and service purposes
- 12 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 13
(5) USB, DLNA - Movie (3D) (3D supported mode manually)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 Under 704x480 - - - 2D to 3D
Over 704x480
2
interlaced
Over 704x480
3
progressive
4 Over 2160P - 24/25/30/50/60
(6) USB, DLNA -Photo (3D) (3D supported mode manually)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 Under 320x240 - - - 2D to 3D
2 Over 320x240 - - - 2D to 3D, Side by Side(Half), Top & Bottom
(7) USB, DLNA (3D) (3D supported mode automatically)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 1080p 33.75 30 74.25 Side by Side(Half), Top & Bottom, Checker Board,
2 2160p 67.5 30 297 MPO(Photo), JPS(Photo)
- - - 2D to 3D, Side by Side(Half), Top & Bottom
2D to 3D, Side by Side(Half), Top & Bottom, Checker
- 50 / 60 -
- others -
Board, Row Interleaving, Column Interleaving, Frame
Sequential
2D to 3D, Side by Side(Half), Top & Bottom, Checker
Board, Row Interleaving, Column Interleaving
2D to 3D, Side by Side(Half), Top & Bottom
USB Only
(8) Miracast, Widi (3D supported mode manually)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 1024*768p - 30/60 -
2D to 3D, Side by Side(Half), Top & Bottom 2 1280*720p - 30/60 -
3 1920*1080p - 30/60 -
4 Others - - - 2D to 3D
■ Remark: 3D Input mode
No. Side by Side Top & Bottom Checker board
1
Single Frame
Sequential
Frame Packing
Line
Interleaving
Column
Interleaving
Only for training and service purposes
- 13 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 14
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LED TV with
LB41V chassis.
2. Designation
(1) Because this is not a hot chassis, it is not necessary to
use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~, 50/60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15.
In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours.
In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
3. Automatic Adjustment
3.1. ADC Adjustment
ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate RGB
deviation.
3.1.1. Equipment & Condition
(1) USB to RS-232C Jig
(2) MSPG-925 Series Pattern Generator(MSPG-925FA,
pattern - 65)
- Resolution : 480i Comp1
1080P Comp1
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7 ± 0.1 Vp-p
- Image
3.1.2. Adjustment method
- Using RS-232, adjust items in the other shown in "3.1.3"
3.1.3. Adj. protocol
Protocol Command Set ACK
Enter adj. mode aa 00 00 a 00 OK00x
Source change
Begin adj. ad 00 10
Return adj.
result
Read adj. data
Conrm adj. ad 00 99
End adj. aa 00 90 a 00 OK90x
Ref.) ADC Adj. RS232C Protocol_Ver1.0
xb 00 04 b 00 OK04x (Adjust 480i, 1080p Comp1 )
xb 00 06 b 00 OK06x (Adjust 1920*1080 RGB)
OKx (Case of Success)
NGx (Case of Fail)
(main)
ad 00 20
(sub )
ad 00 21
(main)
000000000000000000000000007c007b006dx
(Sub)
000000070000000000000000007c00830077x
NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
3.1.4. Adj. order
- aa 00 00 [Enter ADC adj. mode]
- xb 00 04 [Change input source to Component1(480i& 1080p)]
- ad 00 10 [Adjust 480i&1080p Comp1]
- xb 00 06 [Change input source to RGB(1024*768)]
- ad 00 10 [Adjust 1920*1080 RGB]
- ad 00 90 End adj.
3.2. MAC address, ESN, Widevine, HDCP
2.0 key D/L
(1) Equipment & Condition
1) Play file: keydownload.exe
(2) Communication Port connection
1) Key Write: Com 1,2,3,4 and 115200 (Baudrate)
2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)
(3) Download process
1) Select the download items.
2) Mode check: Online Only
3) Check the test process : DETECT → MAC_WRITE →
WIDEVINE_WRITE
4) Play: START
5) Check of result: Ready, Test, OK or NG
(4) Communication Port connection
1) Connect
: PCBA Jig → RS-232C Port == PC → RS-232C Port
Only for training and service purposes
- 14 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 15
(5) Download
1) AJ/JA Models (13Y LCD TV + MAC + Widevine + ESN +
HDCP2.0)
3.3. LAN Inspection
3.3.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
3.3.2. LAN inspection solution
▪ LAN Port connection with PCB
▪ Network setting at MENU Mode of TV
▪ Setting automatic IP
▪ Setting state confirmation
-> If automatic setting is finished, you confirm IP and MAC
Address.
3.3.4. LAN PORT inspection (PING TEST)
(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.
3.4. Model name & Serial number Download
3.4.1. Model name & Serial number D/L
- Press "Power on" key of service remote control.
(Baud rate : 115200 bps)
- Connect RS232 Signal to USB Cable to USB.
- Write Serial number by use USB port.
- Must check the serial number at Instart menu.
3.4.2. Method & notice
(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0
3.3.3. LAN PORT INSPECTION(PING TEST)
Connect SET -> LAN port == PC -> LAN Port
SET PC
(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
Only for training and service purposes
- 15 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 16
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man, sometimes
model name or serial number is initialized.(Not always)
It is impossible to download by bar code scan, so It need
Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "5.Model Number D/L" like below photo.
3) Input the Factory model name or Serial number like photo.
4. Manual Adjustment
* ADC adjustment is not needed because of OTP(Auto ADC
adjustment)
4.1. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download
4.1.1. Overview
It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity
of user input. It is a realization of "Plug and Play".
4.1.2. Equipment
- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
- Adjustment remote control
4) Check the model name Instart menu. → Factory name
displayed.
5) Check the Diagnostics.(DTV country only) → Buyer
model displayed.
3.5. WIFI MAC ADDRESS CHECK
(1) Using RS232 Command
Command Set ACK
Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]
(2) Check the menu on in-start.
4.1.3. Download method
(1) Press "ADJ" key on the Adjustment remote control, then
select "12.EDID D/L", By pressing "Enter" key, enter EDID
D/L menu.
For HDMI EDID
DVI-D to HDMI or HDMI to HDMI
(2) Select "Start" button by pressing "Enter" key, HDMI1/
HDMI2/ HDMI3/ HDMI4 are writing and display OK or NG.
4.1.4. EDID DATA
▪ Reference
- HDMI1 ~ HDMI4
- In the data of EDID, bellows may be different by Input mode.
0 1 2 3 4 5 6 7 8 9 A B C D E F
0x00 00 FF FF FF FF FF FF 00 1E 6D
ⓒ
0x01
0x02 0F 50 54 A1 8 00 31 40 45 40 61 40 71 40 81 80
0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
0x04 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
0x05 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20
0x07
0x00 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21
0x01 22 15 01 29 3D 06 C0 15 07 50
0x02
0x03
0x04 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18
0x05 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D
0x06 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
ⓓ
ⓕ
10 28 10 E3 05 03 01 02 3A 80 18 71 38
ⓕ
ⓐ Product ID
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘01’ → ‘01’, Year : ‘2013’ → ‘17’
ⓓ Model Name(Hex): LGTV
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
ⓐ ⓑ
ⓓ
01
ⓕ
ⓔ1
ⓔ2
Only for training and service purposes
- 16 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 17
(1) EDID
# HDMI 1(C/S: 0zFC, 0x3C)
EDID Block 0, Bytes 0-127
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 17
60 3E 1E 53 1E 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 FC
EDID Block 1, Bytes 128-255
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 02 03 55 F1 58 10 9F 04 13 05 14 03 02 12 20 21
10 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 29 3D 06
20 C0 15 07 50 09 57 07 7C 03 0C 00 10 00 B8 3C 20
30 C0 8E 01 02 03 04 01 4F 3F FC 08 10 18 10 06 10
40 16 10 28 10 67 D8 5D C4 01 00 80 00 E3 05 03 01
50 E4 0F 00 C0 18 01 1D 80 18 71 1C 16 20 58 2C 25
60 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20 6E
70 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00 3C
EDID Block 1, Bytes 128-255
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 02 03 55 F1 58 10 9F 04 13 05 14 03 02 12 20 21
10 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 29 3D 06
20 C0 15 07 50 09 57 07 7C 03 0C 00 30 00 B8 3C 20
30 C0 8E 01 02 03 04 01 4F 3F FC 08 10 18 10 06 10
40 16 10 28 10 67 D8 5D C4 01 78 80 03 E3 05 03 01
50 E4 0F 00 C0 18 66 21 50 B0 51 00 1B 30 40 70 36
60 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 20 6E
70 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00 3A
# HDMI4 (C/S: 0xE8, 0xB0)
EDID Block 0, Bytes 0-127
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
# HDMI2 (C/S: 0xC4, 0x4A)
EDID Block 0, Bytes 0-127
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 17
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 C4
EDID Block 1, Bytes 128-255
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 02 03 55 F1 58 10 9F 04 13 05 14 03 02 12 20 21
10 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 29 3D 06
20 C0 15 07 50 09 57 07 7C 03 0C 00 20 00 B8 3C 20
30 C0 8E 01 02 03 04 01 4F 3F FC 08 10 18 10 06 10
40 16 10 28 10 67 D8 5D C4 01 78 80 03 E3 05 03 01
50 E4 0F 00 C0 18 66 21 50 B0 51 00 1B 30 40 70 36
60 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 20 6E
70 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00 4A
# HDMI3 (C/S: 0xC4, 0x3A)
EDID Block 0, Bytes 0-127
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 17
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 C4
EDID Block 1, Bytes 128-255
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 02 03 3E F1 4E 10 9F 04 13 05 14 03 02 12 20 21
10 22 15 01 29 3D 06 C0 15 07 50 09 57 07 7C 03 0C
20 00 40 00 B8 3C 20 C0 8E 01 02 03 04 01 4F 3F FC
30 08 10 18 10 06 10 16 10 28 10 E3 05 03 01 02 3A
40 80 18 71 38 2D 40 58 2C 45 00 40 84 63 00 00 1E
50 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00
60 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84
70 63 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 B0
* Checksum(HDMI 1/2/3)
Input FFh (Checksum)
HDMI1 FC 3C
HDMI2 C4 4A
HDMI3 C4 3A
HDMI4 E8 B0
Only for training and service purposes
- 17 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 18
4.3. White Balance Adjustment
4.3.1. Overview
▪ W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel's W/B deviation
(2) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one
of R/G/B is fixed at 192, and the other two is lowered to
find the desired value.
(3) Adjustment condition : normal temperature
1) Surrounding Temperature : 25 °C ± 5 °C
2) Warm-up time: About 5 Min
3) Surrounding Humidity : 20 % ~ 80 %
4.3.2. Equipment
(1) Color Analyzer: CA-210 (LED Module : CH 14)
(2) Adjustment Computer(During auto adj., RS-232C protocol
is needed)
(3) Adjustment Remote control
(4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model: 217, Pattern: 78)
-> Only when internal pattern is not available
• Color Analyzer Matrix should be calibrated using CS-100.
4.3.3. Equipment connection MAP
Color Analyzer
Probe
RS- 232C
Signal Source
* If TV internal pattern is used, not needed
Pattern Generator
4.3.4. Adj. Command (Protocol)
<Command Format>
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS STOP
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
▪ RS-232C Command used during auto-adjustment.
RS-232C COMMAND
[CMD ID DATA]
wb 00 00 Begin White Balance adjustment
wb 00 10 Gain adjustment(internal white pattern)
wb 00 1f Gain adjustment completed
wb 00 20 Offset adjustment(internal white pattern)
wb 00 2f Offset adjustment completed
wb 00 ff
End White Balance adjustment
(internal pattern disappears )
Explantion
RS-232C
Computer
RS-232C
Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. completed
*(wb 00 20(Start), wb 00 2f(end)) -> Off-set adj.
wb 00 ff -> End white balance auto-adj.
▪ Adj. Map
Cool
Medium
Warm
Command
Adj. item
R Gain j g 00 C0
G Gain j h 00 C0
B Gain j i 00 C0
R Cut
G Cut
B Cut
R Gain j a 00 C0
G Gain j b 00 C0
B Gain j c 00 C0
R Cut
G Cut
B Cut
R Gain j d 00 C0
G Gain j e 00 C0
B Gain j f 00 C0
R Cut
G Cut
(lower case ASCII)
CMD1 CMD2 MIN MAX
Data Range
(Hex.)
4.3.5. Adj. method
(1) Auto adj. method
1) Set TV in adj. mode using POWER ON key.
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable.(RS-232C to USB)
4) Select mode in adj. Program and begin adj.
5) When adj. is complete (OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
▪ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
(2) Manual adjustment. method
1) Set TV in Adj. mode using POWER ON.
2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10 cm of the surface.
3) Press ADJ key → EZ adjust using adj. R/C → 7. WhiteBalance then press the cursor to the right(key ►).
(When right key(►) is pressed 216 Gray internal pattern
will be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
5) Adjustment is performed in COOL, MEDIUM, WARM 3
modes of color temperature.
Default
(Decimal)
Only for training and service purposes
- 18 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 19
** G-fix adjustment
Adjust modes (Cool), Fix the G gain to 172 (default data)
and change the others (G/B Gain).
Adjust two modes(Medium / Warm), Fix the one of R/G/B
gain to 192 (default data) and decrease the others.
▪ If internal pattern is not available, use RF input. In EZ Adj.
menu 7.White Balance, you can select one of 2 Testpattern: ON, OFF. Default is inner(ON). By selecting OFF,
you can adjust using RF signal in 216 Gray pattern.
▪ Adjustment condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
: Color Analyzer(CA-210) probe should be within 10 cm
and perpendicular of the module surface (80° ~ 100°)
3) Aging time
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked
using no signal or Full-white pattern.
4.3.6. Reference(White balance adjusmtment coordinate
and color temperature)
▪ Luminance : 206 Gray
▪ Standard color coordinate and temperature using CS-1000
(over 26 inch)
Mode
Cool 0.271 0.270 13000K 0.0000
Medium 0.286 0.289 9300K -3
Warm 0.313 0.329 6500K 0.0000
Standard color coordinate and temperature using CA-210(CH 14)
▪
Mode
Cool 0.271±0.002 0.270±0.002 13000K 0.0000
Medium 0.286±0.002 0.289±0.002 9300K -3
Warm 0.313±0.002 0.329±0.002 6500K 0.0000
Coordinate
x y
Coordinate
x y
Temp ∆uv
Temp ∆uv
4.3.7. EDGE & IOL LED White balance table
▪ EDGE LED module change color coordinate because of
aging time.
▪ Apply under the color coordinate table, for compensated
aging time.
▪ (Normal line) Edge&ALEF LED White balance table
- gumi(Mar~Dec) & Global
Model : (normal line) LGD
Aging
web
OS
time
(Min)
1 0-2 282 289 297 308 324 348
2 3-5 281 287 296 306 323 346
3 6-9 279 284 294 303 321 343
4 10-19 277 280 292 299 319 339
5 20-35 275 277 290 296 317 336
6 36-49 274 274 289 293 316 333
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329
- gumi Winter table(Jan, Fab) - Gumi producing model use only
Model : (normal line) LGD
Aging
web
OS
time
(Min)
1 0-2 286 295 301 314 328 354
2 3-5 284 290 299 309 326 349
3 6-9 282 287 297 306 324 346
4 10-19 279 283 294 302 321 342
5 20-35 276 278 291 297 318 337
6 36-49 274 275 289 294 316 334
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329
▪ AUO, INX, Sharp, CSOT, BOE (Cool =13000 K)
webOS
spec 271 270 286 289 313 329
target 278 280 293 299 320 339
Cool Medium Warm
X y x y x y
271 270 286 289 313 329
Cool Medium Warm
X y x y x y
271 270 286 289 313 329
Cool Medium Warm
X y x y x y
Only for training and service purposes
- 19 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 20
4.4. Local Dimming Function Check
Step 1) Turn on TV.
Step 2) At the Local Dimming mode, module Edge Backlight
moving right to left Back light of IOP module moving.
Step 3) Confirm the Local Dimming mode.
Step 4) Press "exit" key.
(3) Don't wear a 3D Glasses, Check the picture like below.
4.7. Option selection per country
4.7.1. Overview
- Option selection is only done for models in AJ/JA/IL
4.7.2.Method
(1) Press "ADJ" key on the Adjustment remote control, then
select Country Group Menu.
(2) Depending on destination, select Country Group Code or
Country Group then on the lower Country option, select
US, CA, MX. Selection is done using +, - or ►◄ KEY.
4.5. Magic Motion Remote control test
- Equipment : RF Remote control for test, IR-KEY-Code
Remote control for test
- You must confirm the battery power of RF-Remote control
before test(recommend that change the battery per every lot)
- Sequence (test)
1) If you select the ‘start key(OK)’ on the Adjustment remote
control, you can pairing with the TV SET.
2) You can check the cursor on the TV Screen, when select
the "OK" key on the Adjustment remote control.
3) You must remove the pairing with the TV Set by select
‘Mute + OK Key’ on the Adjustment remote control.
4.6. 3D function test
(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])
* HDMI mode NO. 872 , pattern No.83
(1) Please input 3D test pattern like below.
(2) When 3D OSD appear automatically, then select green key.
4.8. HDMI ARC Function Inspection
(1) Test equipment
- Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
(2) Test method
1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment (HDMI1)
2) Check the sound from the TV Set
Only for training and service purposes
- 20 -
3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 21
4.10. UHD 4K Test
(1) Video Inspection(UDG-4004NS)
1) Insert the HDMI Cable to TV Set.
2) Convert to HDMI Mode using TV/AV key on ADJ remote
control
3) Inspect the sound and picture operation well.
(Color condition, Picture noise, Sound distortion etc.)
4)Inspection 2D → 3D conversion
(2) Pattern Inspection (MSPG-7100)
1) Insert the HDMI Jack to HDMI 1 Port.
2) Convert to UHD Inspection Pattern. (Use remote control)
3) Check Video and Sound.
4) Convert to 64 Gray Inspection Pattern.
5) Check Video and Sound.
6)Inspect HDMI-CEC function. (Push Play & Pause button)
(3) If there are HDMI Port 2,3 and 4, Do each pattern
Inspection.
(4) 4K Inspection.(HEVC Inspection model only)
1) Insert USB that 4K video file is saved.
2) Check that the video plays normally.
4.11. Tool Option selection
- Method : Press "ADJ" key on the Adjustment remote control,
then select Tool option.
5. GND and Internal Pressure check
5.1. Method
(1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET. (If
loose, re-insert)
(2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
6. Audio
No. Item Min Typ Max Unit
Audio practical max
1
Output, L/R (Distor-
tion=10% max Output)
Speaker
2
(8 Ω Impedance)
Measurement condition:
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms
9 10 12 W
8.10 10.8 Vrms
9 10 12 W
EQ Off
AVL Off
Clear Voice Off
EQ On
AVL On
Clear Voice On
7. USB S/W download(Service only)
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting.(Download Version High &
Power only mode, Set is automatically Download)
(3) Show the message "Copying files from memory".
(4) Updating is starting.
(5) Updating Completed, The TV will restart automatically.
5.2. Checkpoint
▪ TEST voltage
- GND: 1.5 KV / min at 100 mA
- SIGNAL: 3 KV / min at 100 mA
▪ TEST time: 1 second
▪ TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
▪ LEAKAGE CURRENT: At 0.5 mArms
Only for training and service purposes
- 21 -
(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn't
have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1) Push "IN-START" key in service remote control.
2) Select "Tool Option 1" and push "OK" key.
3) Punch in the number. (Each model has their number.)
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 22
1. External
BLOCK DIAGRAM
RS-232C
CI
SPK
H/P
OPTIC
6 (1600)
4Gbϧ
H/P AMP
H/P Audio L/R
SPDIF
CI
Audio AMP
(4.2ch~7.2ch )
I2S
H13
LG1154D
AUDA/D
CVBS
DAC_DATA
BB_TP_DATA
AAD_DATA
DDR3
eMMC
8x4
16x2
792MHz
8
Vx1
OSD HS-LVD S
FHD HS-LVDS
HSR_P/ M
800MHz
1Gb x 4 (1866)
16x4
URSA9
DDR3
TS
SIF
CVBS
Tuner
Only for training and service purposes
H13
RMII
LG1154AN
USB 3.0
USB 2.0
USB 2.0 (WIFI11ac & BT)
AV1_CVBS
Comp1 Y,Pb,Pr
DTV/MNT_LR/V_OUT
SC_C VBS, RGB, Audio L/R
LNB
COMP1/AV1/DVI_ L/R
AV1
SCART
COMP1
WOL / WOW
PHY
HDMI_CEC
LAN
USB_WI-Fi
USB1(USB 3.0)
USB3(USB 2.0)
IR/Joy key
Logo Light
USB2(USB 2.0)
Motion-R &
HDMI output
2:1 Mux
Sw itch
HDMI 2.0
HDMI1~4
- 22 -
2:1 Mux
D14
792MHz
16x4
TS output
From H13D
1Gb x 4 (1866)
DDR3
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 23
2. Internal
PHY
(120Hz)
SCI
SPIx2
EMAC
UARTx3
USB2.0x3
GPIOx136
2D GFX
GPU Rogue Han
JPG/PNG Decoder
I2Cx10
USB3.0 x1
JPG Encoder
TrustZone
eMMC
DMAC(8ch )
Secure Engine
WDT
Timer
SRAM 16K B
OTP
UART
48KB ROM
64KB SRAM
Timer
BE
MCU
Digital Chip Total Pin : 491w/o Power
32KBD$
CP U
Multi-STD
(Boda950)
HD Decoder
Video Decoder
Video Encoder
CPU
1MB L2 $
Dual 1.2GHz
ARMCA9 Core
1080p@30fps
32KBI$
x2
DCO
Vx1/EPI/LVDS Combo
CPLL
PLL
DDR
DPLL
PLL
DDR
SPLL
TCON
Output formatter
LED
OSD
8
DDR3 PHY
DDR3 Controller
PE1
VC R
SRE
FRC
H3 D
H3D
792MHz
DVB-CI/CI+
Main/Sub Scal er
LVDS
De-interlacer
TNR
Source Mux
Rx
HDMI
(1-Link)
HDMI-Rx 1.4
TS(S )
TS(S )
System
TS(P )T S(P)
Multi-ST D
LX4 HiFi EP
Audio DSP
Audio Decoder
Demux
Audio
Ͳ Ͳ͵
΅Ͳ΅
Sound DSP
Mux
Clear Voice II
DivX
Slim SPK
Perceptual
Volume Control
Bluetooth
Audio
Digital
Output
CVBS
DE
MCU
Mux
Y/C
CVD
Encoder
CVBS
(1-port PHY)
DDR3 Controller
DDR3 PHY
3D, ARC, 4kx2k
16
TS (P )
AtoDPin : 79
(MCP)
SDRAM
Global Baseb and
V/Q, DVB-T/C ISDB-T
H13A H13D
w/ PLL
GBB AFE
1ch@30MHz
Analog Chip Total Pin : 183w/o Power
DIF
Only for training and service purposes
I2S(External)
I2S
I2S(HPD)
SPDIF
Digital AM P
I2S
I2S
5x1ch (1ch)
Tx
LVDS
Mux
10x3ch
Block
Capture
w/ DCO
Audio PLL
(3CH)
GPIOIx16
1ch L/R
(48KHz )
Audio-ADC
24b@48KHz
w/ PLL
BTSC AF E
SIF
Audio DAC
SW
SW
Audio DAC (48KHz)
SCART out
Audio L/R(4-ch)
Line Out
CVBS DAC
CVBS-Out
CVBS(3ch)
Tuner
- 23 -
AFE
12b@54MHz
3ch Video
CVBS AFE(2-ch)
SW SW
Component(2ch)
w/ LLPLL
I2Cx1
I2Cx1
HDMI
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 24
400
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
570
910
900
410
503
522
521
500
501
540
504
530
121
502
LV1
120
820
AG1
A10
Set + Stand
200
Only for training and service purposes
- 24 -
A22
A2
(Option)
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 25
System Configuration
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Clock for LG1154D
MAIN Clock(24Mhz)
8pF
C100
8pF
C101
System Clock for Analog block(24Mhz)
OPT
R100 33
R101 33
OPT
T32
0.1uF
P100
12505WS-10A00
T32
1
2
3
4
5
6
7
8
9
10
11
WebOS UHD HW Option
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10
20131016 version
00
01
10
11
00
01
10
11
DVB
TW/COL
CN/HK
EU
AJJA
Resolution
Support U14
D9 Model
URSA7/URSA9
EU/CIS
T/C
T2/C/S2/ATV_EXT
T2/C
T2/C/S2/AT
Display
Reserved
BIT(0/1)
BIT2
BIT3
BIT4
BIT(6/7)
BIT8
BIT9
BIT10 Reserved
X-TAL_1
GND_1
1
2
4
3
GND_2
X-TAL_2
PLLSET1
PLLSET0
+3.3V_NORMAL
OPT
R160 10K
ATSC
North.AM.
KR
BR
High
FHD
U14
D9
URSA9
AJJA
T/C
T2/C_PIP
T2/C
T2/C/S2
High
OLED
XIN_MAIN
1M
R108
X100
24MHz
XO_MAIN
PLL SET[1:0] : internal pull up
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz)
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz)
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz)
Jtag I/F
For Main
OPT
R167
33
TRST_N0
TDI0
TDO0
TMS0
TCK0
SOC_RESET
OPT
OPT
OPT
R163 10K
R166 10K
R168 10K
+3.3V_NORMAL
URSA7/URSA9P BIT5
BIT0_1
R110 10K
BIT0_0
R109 10K
JP
JP
Low
UHD
Non_U14
Non_D9
T2/C_PIP
Low
LCD
TW/COL
T/C
T2/C
10K
BIT1_1
R112
10K
BIT1_0
R111
FHD
UHD
R114 10K
R113 10K
CN/HK
Default
U14
R116 10K
NON_U14
R115 10K
D9
NOT_D9
ATSC_PIP
ATV_SOC
ATV_EXT
R120 10K
R119 10K
KR
URSA9
BIT6_1
R124 10K
R122 10K
BIT6_0
R123 10K
R121 10K
URSA7/URSA9P
North.AM
ATSC_PIP
ATV_SOC
ATV_EXT
VSS
OP MODE[1:0]
"00" : Normal Mode
"01/10/11" : Internal Test mode
+3.3V_NORMAL
OLED
BIT7_1
R126 10K
R128 10K
R129 10K
OPT
LCD
BIT7_0
R130 10K
R127 10K
R125 10K
BR
ISDB_PIP
ISDB
NVRAM
EEPROM_RENESAS
IC102
R1EX24256BSAS0A
A0
1
A1
2
A2
A0’h
3
4
OPT
R133 33
R134 33
OPT
R131 10K
OPT
R132 10K
JP
Default
VCC
8
WP
7
SCL
6
SDA
5
OPM1
OPM0
+3.3V_LNA_TU
C103
0.1uF
D13_INT
EPHY_INT
R135
1.8K
KR_PIP_NOT
1.5K
KR_PIP
R135-*1
+3.3V_NORMAL
Write Protection
- Low : Normal Operation
- High : Write Protection
AR102
+3.3V_NORMAL
OPT
INSTANT_MODE0
+3.3V_NORMAL
R137
1.8K
R136
1.8K
R138
1.8K
KR_PIP_NOT
1.5K
KR_PIP
R136-*1
33
INSTANT boot MODE
"1 : Instant boot
"0 : normal
3.3K
R150
(internal pull down)
R164331/16W
5%
+3.3V_TUNER
R142
1.8K
R141
1.8K
I2C_SCL5
I2C_SDA5
INSTANT_BOOT
SOC_RESET
R149
10K
H13_CONNECT
+3.3V_NORMAL
R144
1.8K
R143
1.8K
EEPROM_ST
M24256-BRMN6TP
E0
1
E1
2
E2
3
VSS
4
EEPROM_ATMEL
AT24C256C-SSHL-T
A0
1
A1
2
A2
3
GND
4
BOOT_MODE0
R151
I2C_SCL_MICOM_SOC
I2C_SDA_MICOM_SOC
I2C PULL UP
R146
1.8K
R147
1.8K
R145
1.8K
IC102-*1
VCC
8
WC
7
SCL
6
SDA
5
IC102-*2
VCC
8
WP
7
SCL
6
SDA
5
+3.3V_NORMAL
BOOT MODE
"0 : EMMC
"1 : TEST MODE
3.3K
R117
OPT
3.3K
R118
XIN_MAIN
XO_MAIN
C108
0.1uF
H13A_SCL
H13A_SDA
TRST_N0
PLLSET1
PLLSET0
BOOT_MODE
CAM_TRIGGER_DET
SOC_RX
10K
SOC_TX
M_REMOTE_RX
M_REMOTE_TX
M_REMOTE_RTS
M_REMOTE_CTS
SOC_SPI1_CS
SOC_SPI1_MOSI
SOC_SPI1_MISO
U14 SPI
SOC_SPI1_SCLK
SOC_SPI0_CS0
SOC_SPI0_MOSI
SOC_SPI0_MISO
D13 SPI
SOC_SPI0_SCLK
I2C_SCL1
I2C_SDA1
I2C_SCL2_SOC
I2C_SDA2_SOC
I2C_SCL4
I2C_SDA4
I2C_SCL5
I2C_SDA5
I2C_SCL6
I2C_SDA6
I2C_SDA_MICOM
I2C_SCL_MICOM
I2C_SDA2
I2C_SCL2
R148
1.8K
I2C_SDA1
I2C_SCL1
I2C_SDA_MICOM_SOC
I2C_SCL_MICOM_SOC
I2C_SDA2_SOC
I2C_SCL2_SOC
I2C_SDA4
I2C_SCL4
I2C_SDA5
I2C_SCL5
I2C_SDA6
I2C_SCL6
OPM1
TMS0
TCK0
TDI0
TDO0
BOOT_MODE
AR100
I2C for tuner
I2C for tuner
EB_ADDR[0-14]
USB_CTL3
/USB_OCD3
/USB_OCD2
USB_CTL2
EB_BE_N1
EB_WE_N
EB_OE_N
EB_BE_N0
K35
K36
K37
L35
H35
H36
J35
J36
H37
G37
A26
XIN
560
R152
33
R102 0
0
R104
B26
XOUT
B27
XTAL_BYPASS
AT37
H13DA_XTAL
AU16
PORES_N
AD34
OPM1
AD33
OPM0
AT26
H13DA_SCL
AU26
H13DA_SDA
AP9
TRST_N0
AN9
TMS0
AP11
TCK0
AN11
TDI0
AN10
TDO0
AM10
TRST_N1
AM9
TMS1
AM11
TCK1
AM12
TDI1
AL11
TDO1
AL9
PLLSET1
AL10
PLLSET0
AE34
BOOT_MODE
Y33
EXT_INTR3/GPIO70
W32
EXT_INTR2/GPIO69
W33
EXT_INTR1/GPIO68
W34
EXT_INTR0/GPIO67
AU12
UART0_RXD
AT12
UART0_TXD
AU13
UART1_RXD
AT13
UART1_TXD
AP12
UART1_RTS
AR12
UART1_CTS
AE35
SPI_CS0/GPIO36
AE36
SPI_DO0/GPIO38
AF36
SPI_DI0/GPIO39
AF35
SPI_SCLK0/GPIO37
AG34
SPI_CS1
AF33
SPI_DO1
AG33
SPI_DI1
AG32
SPI_SCLK1
AR15
SCL0/GPIO66
AP15
SDA0/GPIO65
AR16
SCL1/GPIO64
AP16
SDA1/GPIO79
AP17
SCL2/GPIO78
AR17
SDA2/GPIO77
AP6
SCL3
AR6
SDA3
AH32
SCL4
AJ33
SDA4
AH34
SCL5
AH33
SDA5
I2C_SDA_MICOM_SOC
I2C_SCL_MICOM_SOC
I2C_SDA2_SOC
I2C_SCL2_SOC
+3.3V_NORMAL
CAM_CE1_N
CAM_CE2_N
CAM_CD1_N/GPIO76
F33
F34
D32
E32
/PCM_CE1
/PCM_CE2
CAM_CD1_N
CI
EB_CS3/GPIO93
EB_CS2/GPIO92
EB_CS1/GPIO91
EB_CS0/GPIO90
EB_WE_N/GPIO95
EB_WAIT/GPIO94
EB_OE_N/GPIO82
EB_BE_N1/GPIO81
EB_BE_N0/GPIO80
LG1154D_H13D
CAM_CD2_N/GPIO75
CAM_VS1_N/GPIO86
CAM_VS2_N/GPIO85
CAM_IREQ_N/GPIO73
CAM_RESET
CAM_INPACK/GPIO74
CAM_VCCEN_N/GPIO87
CAM_WAIT_N/GPIO84
CAM_REG_N/GPIO72
CAM_IOIS16_N/GPIO83
G32
G33
F32
G34
D33
H32
E33
D34
H33
T33
PCM_RESET
CAM_CD2_N
R153
10K
CAM_IREQ_N
CI
R154
10K
CAM_REG_N
CAM_WAIT_N
PCM_5V_CTL
R155
10K
CI
EB_ADDR[9]
EB_ADDR[14]
EB_ADDR[10]
EB_ADDR[13]
EB_ADDR[11]
EB_ADDR[12]
G36
G35
F36
F35
E36
E37
EB_ADDR15/GPIO89
EB_ADDR14/GPIO88
EB_ADDR13/GPIO103
EB_ADDR12/GPIO102
EB_ADDR11/GPIO101
EB_ADDR10/GPIO100
SC_CLK/GPIO130
SC_DETECT/GPIO133
SC_VCCEN/GPIO129
SC_VCC_SEL/GPIO128
SC_RST/GPIO131
SC_DATA/GPIO132
U33
T32
V32
V33
V34
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
SMARTCARD_VCC/SD_EMMC_CMD
SMARTCARD_DATA/SD_EMMC_CLK
SMARTCARD_CLK/SD_EMMC_DATA[0]
SMARTCARD_DET/SD_EMMC_DATA[3]
SMARTCARD_RST/SD_EMMC_DATA[2]
EB_ADDR[3]
EB_ADDR[4]
EB_ADDR[6]
EB_ADDR[8]
EB_ADDR[5]
EB_ADDR[7]
E35
D37
D36
D35
C36
C35
EB_ADDR9/GPIO99
EB_ADDR8/GPIO98
EB_ADDR7/GPIO97
EB_ADDR6/GPIO96
EB_ADDR5/GPIO111
EB_ADDR4/GPIO110
IC100
SD_CLK/GPIO125
SD_CMD/GPIO124
SD_CD_N/GPIO123
SD_WP_N/GPIO122
SD_DATA3/GPIO121
A25
C25
B25
E25
D25
E24
interface
Only SMART CARD
EB_DATA[0-7]
EB_ADDR[2]
EB_ADDR[0]
EB_DATA[6]
EB_DATA[7]
EB_ADDR[1]
B37
B36
B35
C32
B33
EB_ADDR3/GPIO109
EB_ADDR2/GPIO108
EB_ADDR1/GPIO107
EB_ADDR0/GPIO106
EB_DATA7/GPIO105
SD_DATA2/GPIO120
SD_DATA1/GPIO135
SD_DATA0/GPIO134
USB2_2_DP0
USB2_2_DM0
D24
C24
L37
L36
K34
1%
200
R157
CAMERA_DP
CAMERA_DM
EB_DATA[5]
EB_DATA[4]
A33
C33
EB_DATA6/GPIO104
EB_DATA5/GPIO119
EB_DATA4/GPIO118
USB2_2_TXRTUNE
USB2_1_DP0
M37
HUB_DP
EB_DATA[0]
EB_DATA[2]
EB_DATA[1]
EB_DATA[3]
A34
B34
C34
A36
EB_DATA3/GPIO117
EB_DATA2/GPIO116
EB_DATA1/GPIO115
EB_DATA0/GPIO114
USB2_1_DM0
USB2_1_TXRTUNE
USB2_0_DP
M36
K33
AU7
AT7
1%
200
HUB_DM
R159
WIFI_DP
EMMC_DATA[0-7]
EMMC_CMD
EMMC_CLK
EMMC_RST
Y37
Y36
W35
T36
EMMC_CLK
EMMC_CMD
EMMC_DATA7
EMMC_RESETN
USB2_0_DM
USB2_0_TXRTUNE
USB3_DP0
USB3_DM0
AP7
P37
P36
WIFI_DM
R161 200 1%
USB3_DM
USB3_DP
EMMC_DATA[7]
EMMC_DATA[4]
EMMC_DATA[6]
EMMC_DATA[5]
W36
V35
V37
V36
EMMC_DATA6
EMMC_DATA5
EMMC_DATA4
EMMC_DATA3
USB3_RX0P
USB3_RX0M
USB3_TX0P
USB3_TX0M
N36
N37
R36
R37
C105 0.1uF
C104 0.1uF
USB3_TX0P
USB3_RX0P
USB3_RX0M
USB3_TX0M
EPHY_REFCLK
EMMC_DATA[1]
EMMC_DATA[3]
EMMC_DATA[2]
EMMC_DATA[0]
U35
U36
U37
AU11
AU8
EMMC_DATA2
EMMC_DATA1
EMMC_DATA0
RMII_REF_CLK
USB3_RESREF
USB3_REFPADCLKM
USB3_REFPADCLKP
NC_1
N34
P33
P32
L32
L33
1%
200
R162
AC-coupling CAP
Place near by LG1154D
EPHY_MDIO
EPHY_MDC
EPHY_EN
EPHY_CRS_DV
AT8
AR8
AR10
RMII_MDC
RMII_MDIO
RMII_TXEN
RMII_CRS_DV
NC_2
NC_3
NC_4
M31
AJ31
EPHY_TXD1
EPHY_RXD0
EPHY_TXD0
EPHY_RXD1
AT10
AU10
AT11
AR11
RMII_TXD1
RMII_TXD0
RMII_RXD1
RMII_RXD0
GPIO23/UART2_TX
GPIO22/UART2_RX
PHY0_ARC_OUT_0
HUB_PORT_OVER0
HUB_VBUS_CTRL0
GPIO136
GPIO137
GPIO138
GPIO139
J32
J33
K32
J34
DPC_CTL
SIL9617_INT
R9531_RESET
R9531_FLASH_WP
GPIO31
GPIO30
GPIO29
GPIO28
GPIO27
GPIO26
GPIO25
GPIO24
GPIO21
GPIO20
GPIO19
GPIO18
GPIO17
GPIO16
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10
GPIO9
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
DDCD0_CK
DDCD0_DA
HPD0
PHY0_RX0N_0
PHY0_RX0P_0
PHY0_RX1N_0
PHY0_RX1P_0
PHY0_RX2N_0
PHY0_RX2P_0
PHY0_RXCN_0
PHY0_RXCP_0
AL34
AM33
AM32
AF30
AN34
AK34
AL33
AL32
AR9
AM5
AM6
AM7
AL6
AK7
AK6
AK5
AJ5
AJ6
AJ7
AH6
AG7
AG6
AG5
AF5
AH30
AG30
AN33
AK33
AE30
AD30
AN32
AK32
AC32
AC33
AB33
AE37
AC36
AC37
AB36
AB37
AA36
AA37
AD36
AD37
R32
R33
RF_SWITCH_CTL
R107 100
CAM_SLIDE_DET
Compensation_Done
/RST_PHY
HDMI_HPD_3
HDMI_HPD_2
For connecting
SIC debug tool
INSTANT_BOOT OPM0
SC_DET
AV1_CVBS_DET
AMP_RESET_N
COMP1_DET
M_RFModule_RESET
HP_DET
SIL9617_RESET
/TU_RESET1
U14_RESET
D14_HWRESET
FRC_FLASH_WP
/RST_HUB
/TU_RESET2
MN864778_RESET
AMP_RESET_N_1
AR101
3.3K
SPDIF_OUT_ARC
HDMI_RX0-
HDMI_RX0+
HDMI_RX1-
HDMI_RX1+
HDMI_RX2HDMI_RX2+
HDMI_CLK-
HDMI_CLK+
/USB_OCD1
USB_CTL1
+3.3V_NORMAL
R175
3.3K
HDMI_MUX_SEL
To surround amp
AUD_LRCH2
local dimming
I2C port
+3.3V_NORMAL
Not Used Net (UB85/95/UC89)
Not Used Net (Only OLED)
+3.3V_NORMAL
CAM_TRIGGER_DET
H13_CONNECT
SOC_SPI1_CS
SOC_SPI1_MOSI
SOC_SPI1_MISO
SOC_SPI1_SCLK
CAM_SLIDE_DET
AUD_LRCH2
AMP_RESET_N_1
U14_RESET
/RST_HUB
AMP_RESET_N_1
M_REMOTE_RX
M_REMOTE_TX
M_REMOTE_RTS
M_REMOTE_CTS
DPC_CTL
For ISP
R103
3.3K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-001-HD
2013-12-17
H13 D CHIP
Page 26
LG1154A
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LG1154D
AVDD25
VDD25_LTX
VDDC10
AVDD33_CVBS
VDD25_REF
VDD25_LTX
VDD25_AUD
VDD10_XTAL
VDD10_XTAL
AVDD33_XTAL
VSS25_REF
LG1154A
H13A_NON_BRAZIL
E11
F5
F6
F11
G5
H13
J13
P12
P13
R5
R6
N16
T13
T14
N10
N11
N12
N13
U5
N7
N8
N9
F14
M6
N6
M13
F15
F16
H15
J15
J16
K15
K16
R18
G7
G8
G9
H7
H12
J7
J12
K7
K12
L7
L12
M7
M12
T17
T18
M8
G10
G11
G12
V5
C3
D3
D4
D17
E4
F4
F7
F8
F9
F10
F12
F13
F17
F18
G4
G6
G13
G14
G15
G16
G17
G18
H4
H5
H6
H8
H9
H10
H11
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
VDD33_7
VDD33_8
VDD33_9
VDD33_10
VDD33_11
VDD33_XTAL
AVDD33_CVBS_1
AVDD33_CVBS_2
VDD25_CVBS_1
VDD25_CVBS_2
VDD25_VSB_1
VDD25_VSB_2
VDD25_REF
VDD25_COMP_1
VDD25_COMP_2
VDD25_COMP_3
VDD25_APLL
VDD25_AUD_1
VDD25_AUD_2
VDD25_AAD
LTX_LVDD_1
LTX_LVDD_2
SDRAM_VDDQ_1
SDRAM_VDDQ_2
SDRAM_VDDQ_3
SDRAM_VDDQ_4
SDRAM_VDDQ_5
VDD10_XTAL
VDDC10_1
VDDC10_2
VDDC10_3
VDDC10_4
VDDC10_5
VDDC10_6
VDDC10_7
VDDC10_8
VDDC10_9
VDDC10_10
VDDC10_11
VDDC10_12
VDDC10_13
AVDD10_CVBS
AVDD10_VSB
AVDD10_LLPLL
DVDD10_APLL_1
DVDD10_APLL_2
LTX_VDD
VSS25_REF
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
LG1154AN_H13A
AVDD33
IC101
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
IC100
LG1154D_H13D
A24
M0_DDR_VREF1
A4
M0_DDR_VREF2
A2
M1_DDR_VREF1
Y1
M1_DDR_VREF2
P26
XTAL_VDD
N26
XTAL_VDDP
M21
VDD33_1
Y30
VDD33_2
AA30
VDD33_3
AE8
VDD33_4
AF8
VDD33_5
AK13
VDD33_6
AK24
VDD33_7
AK25
VDD33_8
M22
AVDD33_USB_1
M23
AVDD33_USB_2
AK11
AVDD33_BT_USB_1
AK12
AVDD33_BT_USB_2
AF25
AVDD33_HDMI_1
AF26
AVDD33_HDMI_2
R31
SP_VQPS
AE23
VDD25_LVRX_1
AF23
VDD25_LVRX_2
AE14
VTXPHY_VDD25_1
AF14
VTXPHY_VDD25_2
N25
VDD25_DR3PLL
AD26
GPLL_AVDD25
H10
VDD15_M0_1
H11
VDD15_M0_2
H12
VDD15_M0_3
H13
VDD15_M0_4
H14
VDD15_M0_5
H15
VDD15_M0_6
H16
VDD15_M0_7
H17
VDD15_M0_8
H18
VDD15_M0_9
H19
VDD15_M0_10
H20
VDD15_M0_11
H21
VDD15_M0_12
H22
VDD15_M0_13
H23
VDD15_M0_14
H24
VDD15_M0_15
H25
VDD15_M0_16
H7
VDD15_M1_1
H8
VDD15_M1_2
J8
VDD15_M1_3
K8
VDD15_M1_4
L7
VDD15_M1_5
L8
VDD15_M1_6
M8
VDD15_M1_7
N7
VDD15_M1_8
N8
VDD15_M1_9
P8
VDD15_M1_10
R7
VDD15_M1_11
R8
VDD15_M1_12
T8
VDD15_M1_13
U8
VDD15_M1_14
V8
VDD15_M1_15
W8
VDD15_M1_16
LG1154AN_H13A_ISDB-T (LG1154AN-IT)
P17
P18
J17
N18
D18
M18
M17
U13
V14
V15
V13
U15
U14
U10
V12
V10
U11
V11
U12
E3
K3
K2
A8
B8
U7
V6
V7
T5
T6
U8
V8
V9
U9
H13A_BRAZIL
XIN_SUB
XO_SUB
VSB_AUX_XIN
XTAL_BYPASS
CLK_24M
XTAL_SEL0
XTAL_SEL1
PORES_N
OPM0
OPM1
H13A_SCL
H13A_SDA
CVBS_IN3
CVBS_IN2
CVBS_IN1
CVBS_VCM
BUF_OUT1
BUF_OUT2
REFT
REFB
ADC1_COM
ADC2_COM
ADC3_COM
SC1_SID
SC1_FB
PB1_IN
Y1_IN
SOY1_IN
PR1_IN
PB2_IN
Y2_IN
SOY2_IN
PR2_IN
VTXPHY_VDD11_1
VTXPHY_VDD11_2
VTXPHY_VDD11_3
AVDD11_DR3PLL
IC101-*1
AAD_ADC_SIF
AAD_ADC_SIFM
AUDA_VBG_EXT
AUDA_OUTL
AUDA_OUTR
AUD_SCART_OUTL
AUD_SCART_OUTR
AUAD_L_CH4_IN
AUAD_R_CH4_IN
AUAD_L_CH3_IN
AUAD_R_CH3_IN
AUAD_L_CH2_IN
AUAD_R_CH2_IN
AUAD_L_CH1_IN
AUAD_R_CH1_IN
AUAD_R_REF
AUAD_M_REF
AUAD_L_REF
AUAD_REF_PO
ADC_I_INCOM
ADC_I_INP
ADC_I_INN
VDDC11_1
VDDC11_2
VDDC11_3
VDDC11_4
VDDC11_5
VDDC11_6
VDDC11_7
VDDC11_8
VDDC11_9
VDDC11_10
VDDC11_11
VDDC11_12
VDDC11_13
VDDC11_14
VDDC11_15
VDDC11_16
VDDC11_17
VDDC11_18
VDDC11_19
VDDC11_20
VDDC11_21
VDDC11_22
VDDC11_23
VDDC11_24
VDDC11_25
VDDC11_26
VDDC11_27
VDDC11_28
VDDC11_29
VDDC11_30
VDDC11_31
VDDC11_32
VDDC11_33
VDDC11_34
VDDC11_35
AVDD11_DCO
GPLL_VDD11
H18
H17
P2
N1
N2
N3
P1
P3
R1
R2
T1
U2
U3
V2
V3
U1
T3
T2
R3
K17
ANTCON
K18
RFAGC
J18
IFAGC
U16
U17
V17
F3
GPIO0
F2
GPIO1
F1
GPIO2
G3
GPIO3
G2
GPIO4
G1
GPIO5
H3
GPIO6
H2
GPIO7
H1
GPIO8
J3
GPIO9
E18
GPIO10
E17
GPIO11
H16
GPIO12
J2
GPIO13
J1
GPIO14
K1
GPIO15
N21
N22
N23
P15
P16
P17
P18
R15
T15
T22
T23
T24
U15
U22
U23
U24
V15
V22
V23
V24
W22
W23
W24
AB15
AB24
AC15
AC24
AD15
AD16
AD17
AD18
AD21
AD22
AD23
AD24
AB14
AC14
AD14
P25
AA15
AC26
+1.1V
+1.2V_VDD
VDD12_VTXPHY
VDDC12_XTAL
+1.2V_VDD
(4)
C381 0.1uF
C217 0.1uF
+0.75V
+3.3V
+2.5V
+1.5V
VREF_M1_1
VDDC12_XTAL
VDD25_XTAL
VDD33
VDD25_LVDS
VDD25_XTAL
VREF_M0_1
VREF_M1_0
VDDC15_M0
VDDC15_M1
VREF_M0_0
+3.3V_Bypass Cap
+3.3V_NORMAL
H14
J4
J5
J6
J8
J9
J10
J11
J14
K4
K5
K6
K8
K9
K10
K11
K13
K14
L1
L2
L3
L4
L5
L6
L8
L9
L10
L11
L13
L14
L15
L16
L17
L18
M1
M2
M3
M4
M5
M9
M10
M11
M14
M15
M16
N4
N5
N14
N15
N17
P4
P5
P6
P7
P8
P9
P10
P11
P14
P15
P16
R4
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
T4
T7
T8
T9
T10
T11
T12
T15
T16
U4
U6
U18
V4
V16
+2.5V_Bypass Cap
+1.0V_Bypass Cap
L209
BLM18PG121SN1D
+2.5V_Normal
+2.5V_Normal
+1.0V_VDD
+1.0V_VDD
AVDD33
(2)
4.7uF C241
L220
BLM18PG121SN1D
L207
BLM18PG121SN1D
L211
BLM18PG121SN1D
L206
BLM18PG121SN1D
C218 0.1uF
VDD25_LTX
4.7uF C275
+3.3V_NORMAL
4.7uF C242
4.7uF C211
4.7uF C216
VDD10_XTAL
VDDC10
AVDD33_XTAL
L216
BLM18PG121SN1D
4.7uF C255
AFE 3CH Power
AVDD25
4.7uF C222
4.7uF C270
C274 0.1uF
Bottom side of chip
+2.5V_Normal
C223 0.1uF
4.7uF C239
C246 0.1uF
4.7uF C214
(1)
C259 0.1uF
BLM15BD121SN1
1uF C224
L200
BLM18PG121SN1D
C251 0.1uF
+3.3V_NORMAL
VDD25_REF
L225
L226
BLM15BD121SN1
1005 size bead
Bottom side of chip
VDD25_AUD
4.7uF
C200
AVDD33_CVBS
L222
BLM18PG121SN1D
0.1uF
C288
VSS25_REF
4.7uF
C202
C204 0.1uF
4.7uF C279
(2)
C283 0.1uF
+1.24V_Bypass Cap
+1.2V_VDD
4.7uF C297
4.7uF C351
C208 0.1uF
C209 0.1uF
Place at the bottom side
+1.2V_VDD
C300 0.1uF
+1.2V_VDD
L227
BLM18PG121SN1D
L201
BLM18PG121SN1D
VDDC12_XTAL
VDD12_VTXPHY
+3.3V_Bypass Cap
+3.3V_NORMAL
L203
BLM18PG121SN1D
+2.5V_Bypass Cap
+2.5V_Normal
L234
BLM18PG121SN1D
4.7uF C298
4.7uF C205
C210 0.1uF
C301 0.1uF
C206 0.1uF
C213 0.1uF
C219 0.1uF
OPT
C207 0.1uF
VDD33
4.7uF C201
C203 0.1uF
C212 0.1uF
C215 0.1uF
Place at the bottom side
VDD25_XTAL
4.7uF C364
C368 0.1uF
+2.5V_Normal
(1)
L238
BLM18PG121SN1D
VDD25_LVDS
4.7uF C378
Place at the bottom side
A27
B5
C5
C26
C27
D5
D26
E5
E6
E7
E8
E22
E23
E26
F7
F8
F22
F23
F24
F25
F26
F27
F31
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G25
G26
G27
G28
G29
G30
G31
H9
H26
H27
H28
H29
H30
H31
J7
J30
J31
K7
K30
K31
L30
L31
M7
M12
M13
M14
M15
M16
M17
M18
M19
M20
M24
M25
M26
M30
M32
M33
M34
N12
N13
N14
N15
N16
N17
N18
N19
N20
N24
N30
N31
N32
N33
P7
P12
P13
P14
P19
P20
P21
P22
P23
P24
P30
P31
R12
R13
R14
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R30
R34
T7
T12
T13
T14
T16
T17
T18
T19
T20
T21
T25
T26
T30
T31
T34
U7
U12
U13
U14
U16
U17
U18
U19
U20
U21
U25
U26
U30
U31
V7
V12
V13
V14
V16
V17
V18
V19
V20
V21
V25
V26
V30
V31
W5
W6
W7
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W25
W26
W30
W31
Y3
Y4
LG1154D_H13D
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
IC100
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_201
GND_202
GND_203
GND_204
GND_205
GND_206
GND_207
GND_208
GND_209
GND_210
GND_211
GND_212
GND_213
GND_214
GND_215
GND_216
GND_217
GND_218
GND_219
GND_220
GND_221
GND_222
GND_223
GND_224
GND_225
GND_226
GND_227
GND_228
GND_229
GND_230
GND_231
GND_232
GND_233
GND_234
GND_235
GND_236
GND_237
GND_238
GND_239
GND_240
GND_241
GND_242
GND_243
GND_244
GND_245
GND_246
GND_247
GND_248
GND_249
GND_250
GND_251
GND_252
GND_253
GND_254
GND_255
GND_256
GND_257
GND_258
GND_259
GND_260
GND_261
GND_262
GND_263
GND_264
GND_265
GND_266
GND_267
GND_268
GND_269
GND_270
GND_271
GND_272
GND_273
GND_274
GND_275
GND_276
GND_277
GND_278
GND_279
GND_280
GND_281
GND_282
GND_283
GND_284
GND_285
GND_286
GND_287
GND_288
GND_289
GND_290
GND_291
GND_292
GND_293
GND_294
GND_295
GND_296
GND_297
GND_298
GND_299
GND_300
GND_301
GND_302
GND_303
GND_304
GND_305
GND_306
GND_307
GND_308
GND_309
GND_310
GND_311
GND_312
GND_313
GND_314
GND_315
GND_316
GND_317
GND_318
GND_319
GND_320
GND_321
GND_322
GND_323
GND_324
GND_325
GND_326
GND_327
GND_328
GND_329
GND_330
GND_331
GND_332
GND_333
GND_334
GND_335
GND_336
GND_337
GND_338
GND_339
GND_340
GND_341
GND_342
GND_343
GND_344
GND_345
GND_346
GND_347
GND_348
GND_349
GND_350
GND_351
GND_352
GND_353
GND_354
GND_355
GND_356
GND_357
GND_358
GND_359
GND_360
GND_361
GND_362
GND_363
GND_364
GND_365
GND_366
GND_367
GND_368
Y5
Y8
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
Y31
Y35
AA8
AA12
AA13
AA14
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA26
AA31
AB6
AB8
AB12
AB13
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB25
AB26
AB30
AB31
AC8
AC12
AC13
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC25
AC30
AC31
AD8
AD12
AD13
AD19
AD20
AD25
AD31
AE12
AE13
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE24
AE25
AE26
AE31
AF12
AF13
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF24
AF31
AG8
AG31
AH8
AH31
AJ8
AJ30
AK8
AK9
AK10
AK14
AK15
AK16
AK17
AK18
AK19
AK20
AK21
AK22
AK23
AK26
AK27
AK28
AK29
AK30
AK31
AL8
AL12
AL13
AL14
AL15
AL16
AL17
AL18
AL19
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL28
AL29
AL30
AL31
AM8
AM13
AM14
AM15
AM16
AM17
AM18
AM19
AM20
AM21
AM22
AM23
AM24
AM25
AM26
AM27
AM28
AM29
AM30
AM31
AN6
AN12
AN13
AN15
AN16
AN17
AN18
AN19
AN20
AN21
AN22
AN23
AN24
AN25
AN26
AN27
AN28
AN29
AN30
AN31
GND JIG POINT
JP203
JP204
JP202
JP205
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
11/05/31
SMD TOP for EMI
SMD_GASKET_8.5T
GASKET_8.0X6.0X8.5H
M200
MDS62110209
SMD_GASKET_12.5T
GASKET_8.0X6.0X12.5H
M200-*1
MDS62110217
+1.5V_DDR
L230
BLM18PG121SN1D
22uF
C303
C302
0.1uF
C306
0.1uF
C308
0.1uF
C305
VDDC15_M1
+1.5V_Bypass Cap
VDDC15_M0
R200
OPT
OPT
OPT
0.1uF
C309
0.1uF
C311
0.1uF
C312
OPT
OPT
0.1uF
C313
OPT
0.1uF
C314
C350
0.1uF
C352
0.1uF
0.1uF
C353
0.1uF
C354
0.1uF
C355
0.1uF
C356
0.1uF
C357
0.1uF
C358
0.1uF
C359
0.1uF
C360
0.1uF
C361
0.1uF
C362
0.1uF
C363
0.1uF
C365
0.1uF
C366
0.1uF
C367
0.1uF
C369
0.1uF
C370
0.1uF
C371
0.1uF
C372
0.1uF
R201
VREF_M0_0
1K 1%
1K 1%
C296
OPT
0.1uF
VDDC15_M0
R202
R203
1K 1%
VREF_M0_1
1K 1%
OPT
C344
0.1uF
+1.5V_DDR
L228
BLM18PG121SN1D
22uF C299
C307
0.1uF
VDDC15_M1
R300
R301
VREF_M1_0
1K 1%
1K 1%
C304
OPT
0.1uF
VDDC15_M1 VDDC15_M0
VREF_M1_1
R302
1K 1%
OPT
0.1uF
R303
1K 1%
C310
BSD-14Y-UD-003-HD
2013-12-17
MAIN POWER
Page 27
Place JACK Side
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
AV1_CVBS_IN
5.5V
D404
SC_CVBS_IN
TU_CVBS
SCART_FB_DIRECT
SC_FB
SC_ID
NON_EU
R422-*1
SC_CVBS_IN_SOY
COMP1_Pb
COMP1_Y
COMP1_Pr
SC_L_IN
SC_R_IN
SCART_Lout
SCART_Rout
HP_LOUT_MAIN
HP_ROUT_MAIN
R423 100
R435
R422
75
0
SCART_FB_DIRECT
SC_B
SC_G
SC_R
C472
D406
D403
D401
5.5V
5.5V
5.5V
Near Place Scart AMP
EU
1uF 25V
C6006
EU
10K
1uF 25V
R6005
C6001
COMP1/AV1/DVI_L_IN
COMP1/AV1/DVI_R_IN
+12V
EU
R403
100K
EU
R404
100K
R430
22K
OPT
R445
22K
OPT
C405
150pF
50V
C408
150pF
50V
EU
10K
10pF
C473
50V
OPT
EU
10K
R60 06
EU
R408
100K
2.2uF
R409
100K
R6450
C400
0.01uF
OPT
C401
0.01uF
OPT
10V
L408
C402
150pF
50V
OPT
EU
10pF
50V
EU
EU
C403
EU
100
R6451
L409
OPT
C430
1uH
1uH
EU
EU
2.7K
10pF
C474
50V
OPT
10pF
C431
50V
SCART_AMP_R_FB
EU
C406
2.2uF
10V
100
+3.3V_NORMAL
R4641K1/16W
R465
390
1/16W
C410
R410
150pF
75
1%
3216
C462
R411
150pF
75
EU
1%
3216
NON_EU
R436
R436-*1
0
75
75
1%
1%
EU
R414
R412
10pF
10pF
C470
50V
50V
SCART_AMP_L_FB
SCART_Lout_SOC
SCART_Rout_SOC
CLK_54M_VTT
1%
C404
0.01uF
50V
1%
DAC_START_PULLDOWN
R466821/16W
1%
75
EU
EU
1%
R416
75
75
75
1%
1%
1%
R417
R415
R413
AUDA_OUTL
AUDA_OUTR
FOR EMI
R400
R405
R427
R424
R425
1%
R418 27K
1%
R419 27K
1%
R420 27K
1%
R421 27K
SCART_FB_BUFFER
SC_FB
Clock for H13A
MAIN Clock(24Mhz)
12pF D13_STPO_SOP
C426
12pF
C427
Place SOC Side
R434
C424 0.047uF
100
R433
C425 0.047uF
100
SC_CVBS_IN_SOY
R432
C423 0.047uF
100
C417 0.047uF
33
C418 0.047uF
33
C428 1000pF
C419 0.047uF
33
C420 0.047uF
33
C421 0.047uF
33
C429 1000pF
C422 0.047uF
33
R431
AUDIO IN
C432 4.7uF
R437 10K 1%
C433 4.7uF
R438 10K 1%
C434 4.7uF
R439 10K 1%
C435 4.7uF
R440 10K 1%
+3.3V_NORMAL
R446
4.7K
SCART_FB_BUFFER
R401
470
1/16W
5%
C
B
E
R406 1K
1/16W
1%
SCART_FB_BUFFER
MMBT3904(NXP)
Q400
SCART_FB_BUFFER
X-TAL_1
GND_1
1
2
X400
24MHz
4
3
GND_2
X-TAL_2
AV1_CVBS_IN_SOC
SC_CVBS_IN_SOC
TU_CVBS_SOC
SC_FB_SOC
SC_ID_SOC
COMP1_PB_IN_SOC
COMP1_Y_IN_SOC
COMP1_Y_IN_SOC_SOY
COMP1_PR_IN_SOC
COMP2_PB_IN_SOC
COMP2_Y_IN_SOC
COMP2_Y_IN_SOC_SOY
COMP2_PR_IN_SOC
AUAD_L_CH3_IN
AUAD_R_CH3_IN
AUAD_L_CH2_IN
AUAD_R_CH2_IN
SC_FB_BUF
1M
R441
SOC_RESET
COMP1_PB_IN_SOC
COMP1_Y_IN_SOC
COMP1_Y_IN_SOC_SOY
COMP1_PR_IN_SOC
COMP2_PB_IN_SOC
COMP2_Y_IN_SOC
COMP2_Y_IN_SOC_SOY
COMP2_PR_IN_SOC
DTV/MNT_V_OUT
ADC_I_INN
ADC_I_INP
Tuner IF Filter
BLM18PG121SN1D
HP_LOUT_AMP
XIN_SUB
XOUT_SUB
XIN_SUB
XOUT_SUB
XTAL_SEL[0]
XTAL_SEL[1]
C415
OPM[0]
0.1uF
OPM[1]
H13A_SCL
H13A_SDA
AV1_CVBS_IN_SOC
SC_CVBS_IN_SOC
TU_CVBS_SOC
DTV/MNT_V_OUT_SOC
Placed as close as possible to SOC
REFT
REFB
R447 68
R448 68
R449 68
SC_ID_SOC
SC_FB_SOC
+3.3V_NORMAL
POWER_SAVE
To ADC
HP_OUT
L400
HP_OUT
C407
0.22uF
10V
R450
C439
OPT
100pF
50V
C440 0.047uF
C441 0.047uF
C442 0.047uF
NJM2561BF1
1
VOUT
2
VSAG
3
NON_TU_W_BR/TW
R443
51
NON_TU_W_BR/TW
NON_TU_W_BR/TW
R444
51
HP_LOUT
68
IC400
Place at JACK SIDE
OP MODE Setting
& Select XTAL Input
OP MODE[0:1] : SW[2:1]
00 => Normal Operaiton Mode
/T32 Debug Mode
01 => Internal Test Purpose
10 => Internal Test Purpose
11 => Internal Test Purpose
XTAL SEL[1:0] : SW[4:3]
00 => Xtal Input
01 => CLK 24M from H13D
10 => XTAL Bypass from H13D
LG1154AN_H13A
P17
XIN_SUB
6
5
4
TU_W_BR/TW
R443-*1
220
0.01uF
0.01uF
BLM18PG121SN1D
HP_ROUT_AMP
V+
GND
VIN
C437
C438
P18
J17
N18
D18
M18
M17
E3
K3
K2
A8
B8
U13
V14
V15
V13
U15
U14
U7
V6
V7
U10
V12
T5
T6
U8
V8
V9
U9
V10
U11
V11
U12
TU_W_BR/TW
L406
OPT
HP_OUT
L401
XO_SUB
VSB_AUX_XIN
XTAL_BYPASS
CLK_24M
XTAL_SEL0
XTAL_SEL1
PORES_N
OPM0
OPM1
H13A_SCL
H13A_SDA
CVBS_IN3
CVBS_IN2
CVBS_IN1
CVBS_VCM
BUF_OUT1
BUF_OUT2
REFT
REFB
ADC1_COM
ADC2_COM
ADC3_COM
SC1_SID
SC1_FB
PB1_IN
Y1_IN
SOY1_IN
PR1_IN
PB2_IN
Y2_IN
SOY2_IN
PR2_IN
EU
C412
0.1uF
C414
EU
DTV/MNT_V_OUT_SOC
TU_W_BR/TW
R444-*1
220
HP_OUT
C409
0.22uF
10V
R453 330
C443 0.047uF
EU
C436
22pF
Placed as close as possible to IC100
IC101
0.1uF
C436-*1
100pF
IF_N
IF_P
HP_ROUT
AUD_SCART_OUTL
AUD_SCART_OUTR
AUAD_L_CH4_IN
AUAD_R_CH4_IN
AUAD_L_CH3_IN
AUAD_R_CH3_IN
AUAD_L_CH2_IN
AUAD_R_CH2_IN
AUAD_L_CH1_IN
AUAD_R_CH1_IN
100
R459
100
R460
100
R461
100
R462
H13A_NON_BRAZIL
H18
AAD_ADC_SIF
AAD_ADC_SIFM
AUDA_VBG_EXT
AUDA_OUTL
AUDA_OUTR
AUAD_R_REF
AUAD_M_REF
AUAD_L_REF
AUAD_REF_PO
ANTCON
RFAGC
IFAGC
ADC_I_INCOM
ADC_I_INP
ADC_I_INN
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
H17
P2
N1
N2
N3
P1
P3
R1
R2
T1
U2
U3
V2
V3
U1
T3
T2
R3
K17
K18
J18
U16
U17
V17
F3
F2
F1
G3
G2
G1
H3
H2
H1
J3
E18
E17
H16
J2
J1
K1
C450 0.1uF
C451 0.1uF
10uF C452
C453 2.2uF
AUDA_OUTL
AUDA_OUTR
EU
EU
AUAD_L_CH3_IN
AUAD_R_CH3_IN
AUAD_L_CH2_IN
AUAD_R_CH2_IN
AUAD_R_REF
AUAD_M_REF
AUAD_L_REF
AUAD_REF_PO
C454 0.1uF
Placed as close as possible to IC4300
AUAD_REF_PO
AUAD_L_REF
AUAD_R_REF
AUAD_M_REF
AFE 3CH REF Setting
Placed as close as possible to IC4300
C444
0.1uF
C445
0.1uF
DIMMING
PWM_DIM
PWM_DIM2
C447
OPT
1uF
25V
10K
10K
OPT
OPT
R482
R481
R479 100
R480 100
ADC_I_INP
ADC_I_INN
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10
SC_FB_BUF
OPT
R45421/10W
C446
0.1uF
+3.3V_NORMAL
10K
10K
OPT
OPT
R484
R483
C457
1000pF
OPT
R442
22K
R426
22K
EU
EU
Close to IC4300
NON_TU_W_BR/TW/CO
+2.5V_Normal
1%
R45 5
51K
C449 4.7uF
R45 6 47K 1%
5%
C448
OPT
4.7uF
10V
REFT
Must be used
REFB
NON_OLED
AR402
33
1/16W
R487
0
C458 0.01uF
1%
R45 7
51K
1%
R45 8
47K
OPM[0]
OPM[1]
XTAL_SEL[0]
XTAL_SEL[1]
TU_SIF
EU
EU
C460 0.01uF
C459
0.1uF
TU_W_BR/TW/CO
TU_W_BR/TW/CO
10uF
SCART_Lout_SOC
SCART_Rout_SOC
IF_AGC
R487-*1
10K
L407
C455
C456
4.7uF
10V
PWM2
PWM1
LG1154AN_H13A
L/DIM0_VS
L/DIM0_SCLK
L/DIM0_MOSI
LG1154A
IC101
INTR_GBB
INTR_AFE3CH
INTR_AGPIO
AUD_FS20CLK
AUD_FS21CLK
AUD_FS23CLK
AUD_FS24CLK
AUD_FS25CLK
AUDCLK_OUT_SUB
AUD_HDMI_MCLK
AUD_DAC1_LRCK
AUD_DAC1_SCK
AUD_DAC1_LRCH
AUD_DAC0_LRCK
AUD_DAC0_SCK
AUD_DAC0_LRCH
AUD_ADC_LRCK
AUD_ADC_SCK
AUD_ADC_LRCH
BB_SCL
BB_SDA
BB_TP_CLK
BB_TP_ERR
BB_TP_SOP
BB_TP_VAL
BB_TP_DATA7
BB_TP_DATA6
BB_TP_DATA5
BB_TP_DATA4
BB_TP_DATA3
BB_TP_DATA2
BB_TP_DATA1
BB_TP_DATA0
CLK_F54M
CVBS_GC2
CVBS_GC1
CVBS_GC0
CVBS_UP
CVBS_DN
FS00CLK
AUDCLK_OUT
DAC_START
DAC_DATA4
DAC_DATA3
DAC_DATA2
DAC_DATA1
DAC_DATA0
AAD_GC4
AAD_GC3
AAD_GC2
AAD_GC1
AAD_GC0
AAD_DATA9
AAD_DATA8
AAD_DATA7
AAD_DATA6
AAD_DATA5
AAD_DATA4
AAD_DATA3
AAD_DATA2
AAD_DATA1
AAD_DATA0
AAD_DATAEN
ADCO_OUT_CLK
HSR_AP0
HSR_AM0
HSR_BP0
HSR_BM0
HSR_CP0
HSR_CM0
HSR_CLKP0
HSR_CLKM0
HSR_DP0
HSR_DM0
HSR_EP0
HSR_EM0
R402 33
AR404
33
L/DIM0_VS
L/DIM0_SCLK
L/DIM0_MOSI
BPL_IN
H13A_NON_BRAZIL
E1
E2
D1
A6
B6
A5
B5
A4
C4
C18
A2
B2
B1
C2
C1
D2
B4
A3
B3
A7
B7
E8
D8
C8
E7
D7
C7
E6
D6
C6
E5
D5
C5
CLK_54M_VTT
1/16W1%
B10
C9
B9
A9
D9
E9
Close to LG1154A
B11
R492 330
A11
R407 330
D11
C11
E10
D10
C10
A10
R451 330
D13
C13
E12
D12
C12
C17
E16
D16
C16
E15
D15
C15
E14
D14
C14
E13
B18
A12
B12
A13
B13
A14
B14
A15
B15
A16
B16
A17
B17
PWM1
PWM2
BPL_IN
R467 82
DAC_START_PULLDOWN
AT16
INTR_GBB
AU17
INTR_AFE3CH
AT17
INTR_AGPIO
AT24
AUD_FS20CLK
AU24
AUD_FS21CLK
AT23
AUD_FS23CLK
AU23
AUD_FS24CLK
AT22
AUD_FS25CLK
AU36
AUD_HDMI_MCLK
AT20
AUD_DAC1_LRCK
AU20
AUD_DAC1_SCK
AT19
AUD_DAC1_LRCH
AU19
AUD_DAC0_LRCK
AT18
AUD_DAC0_SCK
AU18
AUD_DAC0_LRCH
AU22
AUD_ADC_LRCK
AT21
AUD_ADC_SCK
AU21
AUD_ADC_LRCH
AT25
BB_SCL
AU25
BB_SDA
AP23
BB_TPI_CLK
AR23
BB_TPI_ERR
AP22
BB_TPI_SOP
AR22
BB_TPI_VAL
AP21
BB_TPI_DATA7
AR21
BB_TPI_DATA6
AP20
BB_TPI_DATA5
AR20
BB_TPI_DATA4
AP19
BB_TPI_DATA3
AR19
BB_TPI_DATA2
AP18
BB_TPI_DATA1
AR18
BB_TPI_DATA0
AU28
CLK_54M
AR24
CVBS_GC2
AU27
CVBS_GC1
AT27
CVBS_GC0
AP24
CVBS_UP
AR25
CVBS_DN
AU29
FS00CLK
AT29
H13A_AUDCLK_OUT
AP27
DAC_START
AR27
DAC_DATA4
AP26
DAC_DATA3
AR26
DAC_DATA2
AP25
DAC_DATA1
AT28
DAC_DATA0
AR30
AAD_GC4
AP29
AAD_GC3
AR29
AAD_GC2
AP28
AAD_GC1
AR28
AAD_GC0
AP35
AAD_DATA9
AR35
AAD_DATA8
AP34
AAD_DATA7
AR34
AAD_DATA6
AP33
AAD_DATA5
AR33
AAD_DATA4
AP32
AAD_DATA3
AR32
AAD_DATA2
AP31
AAD_DATA1
AR31
AAD_DATA0
AP30
AAD_DATAEN
AT36
ADCO_OUT_CLK
AT30
HSR_AP
AU30
HSR_AM
AT31
HSR_BP
AU31
HSR_BM
AT32
HSR_CP
AU32
HSR_CM
AT33
HSR_CLKP
AU33
HSR_CLKM
AT34
HSR_DP
AU34
HSR_DM
AT35
HSR_EP
AU35
HSR_EM
AT14
AUD_HPDRV_LRCH
AT15
AUD_HPDRV_LRCK
AU15
NC
AUD_HPDRV_SCK
AC7
FRC_LR_O_SYNC_FLAG
AN5
L_VSOUT_LD
AR14
DIM0_SCLK
AP14
DIM0_MOSI
AN14
DIM1_SCLK
AP13
DIM1_MOSI
AF6
PWM0
AF7
PWM1
AD7
PWM2
AE6
PWM_IN
AP5
EPI_EO
AN8
EPI_VST
AP8
EPI_DPM
AR7
EPI_MCLK
AN7
EPI_GCLK
LG1154D
IC100
LG1154D_H13D
STPI0_CLK/GPIO47
STPI0_SOP/GPIO46
STPI0_VAL/GPIO45
STPI0_ERR/GPIO44
STPI0_DATA/GPIO43
STPI1_CLK/GPIO42
STPI1_SOP/GPIO41
STPI1_VAL/GPIO40
STPI1_ERR/GPIO55
STPI1_DATA/GPIO54
TPIO_DATA0/GPIO58
TPIO_DATA1/GPIO59
TPIO_DATA2/GPIO60
TPIO_DATA3/GPIO61
TPIO_DATA4/GPIO62
TPIO_DATA5/GPIO63
TPIO_DATA6/GPIO48
TPIO_DATA7/GPIO49
DACSLRCH/GPIO127
PCMI3SCK/GPIO112
PCMI3LRCK/GPIO113
DACCLFCH/GPIO126
TP_DVB_CLK
TP_DVB_SOP
TP_DVB_VAL
TP_DVB_ERR
TP_DVB_DATA0
TP_DVB_DATA1
TP_DVB_DATA2
TP_DVB_DATA3
TP_DVB_DATA4
TP_DVB_DATA5
TP_DVB_DATA6
TP_DVB_DATA7
TPI_CLK
TPI_SOP
TPI_VAL
TPI_ERR
TPI_DATA0
TPI_DATA1
TPI_DATA2
TPI_DATA3
TPI_DATA4
TPI_DATA5
TPI_DATA6
TPI_DATA7
TPIO_CLK/GPIO53
TPIO_SOP/GPIO52
TPIO_VAL/GPIO51
TPIO_ERR/GPIO50
AUDCLK_OUT
DACLRCH
DACSCK
DACLRCK
PCMI3LRCH
IEC958OUT
DACSUBMCLK
DACSUBLRCH
DACSUBSCK
DACSUBLRCK
TEST1
TEST2
TX0N
TX0P
TX1N
TX1P
TX2N
TX2P
TX3N
TX3P
TX4N
TX4P
TX5N
TX5P
TX6N
TX6P
TX7N
TX7P
TX8N
TX8P
TX9N
TX9P
TX10N
TX10P
TX11N
TX11P
TX12N
TX12P
TX13N
TX13P
TX14N
TX14P
TX15N
TX15P
TX16N
TX16P
TX17N
TX17P
TX18N
TX18P
TX19N
TX19P
TX20N
TX20P
TX21N
TX21P
TX22N
TX22P
TX23N
TX23P
TX_LOCKN
AK35
AK36
AK37
AJ35
AJ36
AH35
AH37
AH36
AG35
AG36
AM36
AL36
AL35
AL37
AM35
AN36
AN37
AN35
AP37
AP36
AR37
AR36
A28
B29
B28
C28
B32
C31
B31
A31
C30
A30
B30
C29
D30
D31
F30
E31
E30
F29
E29
F28
E28
D28
E27
D27
AD5
AD6
Y6
Y7
AC6
AC5
AA6
AB7
AB5
AU14
AA32
AA34
AA33
AB34
AE32
AE33
AT6
AU6
AT5
AU5
AT4
AU4
AU3
AU2
AT2
AT1
AR4
AR3
AP1
AP2
AP4
AP3
AN4
AN3
AM4
AM3
AL4
AL3
AK1
AK2
AK4
AK3
AJ4
AJ3
AH4
AH3
AG4
AG3
AF1
AF2
AF4
AF3
AE4
AE3
AD4
AD3
AC4
AC3
AB1
AB2
AB4
AB3
AA4
AA3
AR5
FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_DATA
D13_STPO_CLK
D13_STPO_VAL
D13_STPO_ERR
D13_STPO_DATA
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]
TPI_CLK
TPI_SOP
TPI_VAL
TPI_ERR
TPI_DATA[0]
TPI_DATA[1]
TPI_DATA[2]
TPI_DATA[3]
TPI_DATA[4]
TPI_DATA[5]
TPI_DATA[6]
TPI_DATA[7]
TPO_CLK
TPO_SOP
TPO_VAL
TPO_ERR
TPO_DATA[0]
TPO_DATA[1]
TPO_DATA[2]
TPO_DATA[3]
TPO_DATA[4]
TPO_DATA[5]
TPO_DATA[6]
TPO_DATA[7]
R495 100
R496 100
R452 100
R497 100
R498 100
URSA_RESET_SoC
AR403
33
1/16W
TXB0P/TX5P
TXB0N/TX5N
TXB1P/TX4P
TXB1N/TX4N
TXB2P/TX3P
TXB2N/TX3N
TXBCLKP/TX2P
TXBCLKN/TX2N
TXB3P/TX1P
TXB3N/TX1N
TXB4P/TX0P
TXB4N/TX0N
TXA0P/TX11P
TXA0N/TX11N
TXA1P/TX10P
TXA1N/TX10N
TXA2P/TX9P
TXA2N/TX9N
TXACLKP/TX8P
TXACLKN/TX8N
TXA3P/TX7P
TXA3N/TX7N
TXA4P/TX6P
TXA4N/TX6N
TXD0P/TX17P
TXD0N/TX17N
TXD1P/TX16P
TXD1N/TX16N
TXD2P/TX15P
TXD2N/TX15N
TXDCLKP/TX14P
TXDCLKN/TX14N
TXD3P/TX13P
TXD3N/TX13N
TXD4P/TX12P
TXD4N/TX12N
TXC0P/TX23P
TXC0N/TX23N
TXC1P/TX22P
TXC1N/TX22N
TXC2P/TX21P
TXC2N/TX21N
TXCCLKP/TX20P
TXCCLKN/TX20N
TXC3P/TX19P
TXC3N/TX19N
TXC4P/TX18P
TXC4N/TX18N
TP402
C411
10pF
50V
OPT
FE_DEMOD1_TS_DATA[1-7]
TPI_ERR
TPI_DATA[0-7]
TP400
AUD_MASTER_CLK
AUD_LRCH
AUD_LRCH1
To height amp FOR UB98/UB9
AUD_SCK
AUD_LRCK
SPDIF_OUT
+3.3V_NORMAL
Not Used Net (UB85/95/UC89)
TPO_ERR
TPO_DATA[0-7]
I2S_I/F
To front, woofer,
center amp FOR UB98/UB9
AUD_LRCH1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-004-HD
2013-12-17
MAIN AUDIO/VIDEO
Page 28
IC100
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LG1154D_H13D
M0_DDR_A[0]
M0_DDR_A[1]
M0_DDR_A[2]
M0_DDR_A[3]
M0_DDR_A[4]
M0_DDR_A[5]
M0_DDR_A[6]
M0_DDR_A[7]
M0_DDR_A[8]
M0_DDR_A[9]
M0_DDR_A[10]
M0_DDR_A[11]
M0_DDR_A[12]
M0_DDR_A[13]
M0_DDR_A[14]
M0_DDR_A[15]
M0_DDR_BA[0]
M0_DDR_BA[1]
M0_DDR_BA[2]
M0_DDR_U_CLK
M0_DDR_U_CLKN
M0_DDR_D_CLK
M0_DDR_D_CLKN
M0_DDR_RASN
M0_DDR_CASN
M0_DDR_RESET_N
M0_DDR_ZQCAL
M0_DDR_DQS[0]
M0_DDR_DQS_N[0]
M0_DDR_DQS[1]
M0_DDR_DQS_N[1]
M0_DDR_DQS[2]
M0_DDR_DQS_N[2]
M0_DDR_DQS[3]
M0_DDR_DQS_N[3]
M0_DDR_DM[0]
M0_DDR_DM[1]
M0_DDR_DM[2]
M0_DDR_DM[3]
M0_DDR_DQ[0]
M0_DDR_DQ[1]
M0_DDR_DQ[2]
M0_DDR_DQ[3]
M0_DDR_DQ[4]
M0_DDR_DQ[5]
M0_DDR_DQ[6]
M0_DDR_DQ[7]
M0_DDR_DQ[8]
M0_DDR_DQ[9]
M0_DDR_DQ[10]
M0_DDR_DQ[11]
M0_DDR_DQ[12]
M0_DDR_DQ[13]
M0_DDR_DQ[14]
M0_DDR_DQ[15]
M0_DDR_DQ[16]
M0_DDR_DQ[17]
M0_DDR_DQ[18]
M0_DDR_DQ[19]
M0_DDR_DQ[20]
M0_DDR_DQ[21]
M0_DDR_DQ[22]
M0_DDR_DQ[23]
M0_DDR_DQ[24]
M0_DDR_DQ[25]
M0_DDR_DQ[26]
M0_DDR_DQ[27]
M0_DDR_DQ[28]
M0_DDR_DQ[29]
M0_DDR_DQ[30]
M0_DDR_DQ[31]
IC100
LG1154D_H13D
M1_DDR_U_CLKN
M1_DDR_D_CLKN
M1_DDR_RESET_N
M1_DDR_DQS[0]
M1_DDR_DQS_N[0]
M1_DDR_DQS[1]
M1_DDR_DQS_N[1]
M1_DDR_DQS[2]
M1_DDR_DQS_N[2]
M1_DDR_DQS[3]
M1_DDR_DQS_N[3]
M1_DDR_DQ[10]
M1_DDR_DQ[11]
M1_DDR_DQ[12]
M1_DDR_DQ[13]
M1_DDR_DQ[14]
M1_DDR_DQ[15]
M1_DDR_DQ[16]
M1_DDR_DQ[17]
M1_DDR_DQ[18]
M1_DDR_DQ[19]
M1_DDR_DQ[20]
M1_DDR_DQ[21]
M1_DDR_DQ[22]
M1_DDR_DQ[23]
M1_DDR_DQ[24]
M1_DDR_DQ[25]
M1_DDR_DQ[26]
M1_DDR_DQ[27]
M1_DDR_DQ[28]
M1_DDR_DQ[29]
M1_DDR_DQ[30]
M1_DDR_DQ[31]
M0_DDR_CKE
M0_DDR_ODT
M0_DDR_WEN
M1_DDR_A[0]
M1_DDR_A[1]
M1_DDR_A[2]
M1_DDR_A[3]
M1_DDR_A[4]
M1_DDR_A[5]
M1_DDR_A[6]
M1_DDR_A[7]
M1_DDR_A[8]
M1_DDR_A[9]
M1_DDR_A[10]
M1_DDR_A[11]
M1_DDR_A[12]
M1_DDR_A[13]
M1_DDR_A[14]
M1_DDR_A[15]
M1_DDR_BA[0]
M1_DDR_BA[1]
M1_DDR_BA[2]
M1_DDR_U_CLK
M1_DDR_D_CLK
M1_DDR_CKE
M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_ZQCAL
M1_DDR_DM[0]
M1_DDR_DM[1]
M1_DDR_DM[2]
M1_DDR_DM[3]
M1_DDR_DQ[0]
M1_DDR_DQ[1]
M1_DDR_DQ[2]
M1_DDR_DQ[3]
M1_DDR_DQ[4]
M1_DDR_DQ[5]
M1_DDR_DQ[6]
M1_DDR_DQ[7]
M1_DDR_DQ[8]
M1_DDR_DQ[9]
DDR_VTT
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
ZQ
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
M0_DDR_VREFCA_T
M0_DDR_VREFDQ_T
J8
E1
VDDC15_M0
R559
H8
240
1%
A2
A9
D7
G2
G8
K1
K9
M1
M9
B9
C1
E2
E9
C568
C569
M0_DDR_RESET_N
A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9
B2
B8
C9
D1
D9
M1_DDR_VREFCA
M1_DDR_VREFDQ
M8
H1
L8
ZQ
NC_1
NC_2
NC_3
NC_4
R543
VDDC15_M1
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
C529
H9
J1
J9
L1
L9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
0.1uF
C530
0.1uF
AR7
56
M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8
M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15
M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2
0.1uF
0.1uF
M0_DDR_CKE
M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CASN
M0_DDR_WEN
DDR_HYNIX
IC501-*1
H5TQ4G63AFR-PBC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
240
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR3 1.5V bypass Cap - Place these caps near Memory
AR8
56
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
AR9
AR10
56
56
M0_U_CLK
M0_U_CLKN
Real USE : 1Gbit
H5TQ1G63DFR-PBC(x16)
1Gbit : T7(NC_6)
4Gbit : T7(A14)
AR11
56
M0_DDR_DQS3
M0_DDR_DQS_N3
M0_DDR_DM3
M0_DDR_DQ24
M0_DDR_DQ25
M0_DDR_DQ26
M0_DDR_DQ27
M0_DDR_DQ28
M0_DDR_DQ29
M0_DDR_DQ30
M0_DDR_DQ31
M1_DDR_A0
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8
M1_DDR_A9
M1_DDR_A10
M1_DDR_A11
M1_DDR_A12
M1_DDR_A13
M1_DDR_A14
M1_DDR_A15
M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2
M1_U_CLKN
M1_DDR_CKE
M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_RESET_N
M1_DDR_DQS2
M1_DDR_DQS_N2
M1_DDR_DQS3
M1_DDR_DQS_N3
M1_DDR_DM2
M1_DDR_DM3
M1_DDR_DQ16
M1_DDR_DQ17
M1_DDR_DQ18
M1_DDR_DQ19
M1_DDR_DQ20
M1_DDR_DQ21
M1_DDR_DQ22
M1_DDR_DQ23
M1_DDR_DQ24
M1_DDR_DQ25
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_DQ28
M1_DDR_DQ29
M1_DDR_DQ30
M1_DDR_DQ31
M1_U_CLK
AR12
56
R3104
56
H5TQ4G83AFR-PBC
K3
A0
L7
A1
L3
A2
K2
A3
L8
A4
L2
A5
M8
A6
M2
A7
N8
A8
M3
A9
H7
A10/AP
M7
A11
K7
A12/BC
N3
A13
N7
A14
J7
A15
J2
BA0
K8
BA1
J3
BA2
F7
CK
G7
CK
G9
CKE
H2
CS
G1
ODT
F3
RAS
G3
CAS
H3
WE
N2
RESET
C3
DQS
D3
DQS
B7
DM/TDQS
A7
NF/TDQS
B3
DQ0
C7
DQ1
C2
DQ2
C8
DQ3
E3
DQ4
E8
DQ5
D2
DQ6
E7
DQ7
A3
NC_1
F1
NC_2
F9
NC_3
H1
NC_4
H9
NC_5
DDR_SAMSUNG
IC503
K4B4G1646B-HCK0
N3
DDR3
A0
P7
4Gbit
A1
P3
(x16)
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC505
DDR3
4Gbit
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
NC_1
NC_2
NC_3
NC_4
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
ZQ
J8
E1
H8
ZQ
A2
A9
D7
G2
G8
K1
K9
M1
M9
B9
C1
E2
E9
A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9
B2
B8
C9
D1
D9
M1_1_DDR_VREFCA
M8
H1
L8
VDDC15_M1
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M0_1_DDR_VREFCA_T
M0_1_DDR_VREFDQ_T
R561
240
1%
M1_1_DDR_VREFDQ
R545
C561
0.1uF
C562
0.1uF
VDDC15_M0
0.1uF
C572
0.1uF
C577
DDR_HYNIX
IC503-*1
H5TQ4G63AFR-PBC
M8
N3
VREFCA
A0
P7
A1
P3
A2
N2
H1
A3
VREFDQ
P8
A4
P2
A5
R8
L8
A6
ZQ
R2
A7
T8
A8
R3
B2
A9
VDD_1
L7
D9
A10/AP
VDD_2
R7
G7
A11
VDD_3
N7
K2
A12/BC
VDD_4
T3
K8
A13
VDD_5
T7
N1
A14
VDD_6
N9
M7
VDD_7
A15
R1
VDD_8
R9
M2
VDD_9
BA0
N8
BA1
M3
BA2
A1
VDDQ_1
A8
J7
VDDQ_2
CK
K7
C1
VDDQ_3
CK
K9
C9
CKE
VDDQ_4
D2
VDDQ_5
E9
L2
VDDQ_6
CS
F1
K1
VDDQ_7
ODT
H2
240
J3
VDDQ_8
RAS
H9
K3
VDDQ_9
CAS
L3
WE
J1
NC_1
J9
T2
NC_2
RESET
L1
NC_3
L9
NC_4
F3
DQSL
G3
DQSL
A9
C7
VSS_1
DQSU
B3
B7
VSS_2
DQSU
E1
VSS_3
G8
E7
VSS_4
DML
J2
D3
VSS_5
DMU
J8
VSS_6
M1
E3
VSS_7
DQL0
M9
F7
VSS_8
DQL1
P1
F2
VSS_9
DQL2
P9
F8
VSS_10
DQL3
T1
H3
VSS_11
DQL4
T9
H8
VSS_12
DQL5
G2
DQL6
H7
DQL7
B1
VSSQ_1
B9
D7
VSSQ_2
DQU0
D1
C3
VSSQ_3
DQU1
D8
C8
VSSQ_4
DQU2
E2
C2
VSSQ_5
DQU3
E8
A7
VSSQ_6
DQU4
F9
A2
VSSQ_7
DQU5
G1
B8
VSSQ_8
DQU6
G9
A3
VSSQ_9
DQU7
DDR3 1.5V bypass Cap - Place these caps near Memory
* DDR_VTT
VDDC15_M0
DDR_VTT
R546
10K
R549
10K
L500
UBW2012-121F
C503
10uF
REFIN
VLDOIN
VOSNS
IC506
TPS51200DRCR
1
10
11
2
9
THERMAL
VO
3
PGND
8
4
7
5
6
1%
C510
1000pF
1%
C511
22uF
10V
C507
C506
10uF
10uF
[EP]
VIN
PGOOD
GND
EN
REFOUT
+3.3V_NORMAL
L501
UBW2012-121F
C514
0.1uF
C515
4700pF
DDR_VTT
C519
0.1uF
16V
C520
0.1uF
16V
C521
0.1uF
16V
C522
0.1uF
16V
F15
M0_DDR_A0
F13
M0_DDR_A1
F17
M0_DDR_A2
F19
M0_DDR_A3
E10
M0_DDR_A4
E18
M0_DDR_A5
E11
M0_DDR_A6
F18
M0_DDR_A7
F11
M0_DDR_A8
F16
M0_DDR_A9
E9
M0_DDR_A10
E12
M0_DDR_A11
E13
M0_DDR_A12
E16
M0_DDR_A13
F12
M0_DDR_A14
F14
M0_DDR_A15
E19
M0_DDR_BA0
F10
M0_DDR_BA1
E15
M0_DDR_BA2
B10
M0_U_CLK
A10
M0_U_CLKN
A19
M0_D_CLK
B19
M0_D_CLKN
E14
M0_DDR_CKE
F21
M0_DDR_ODT
E21
M0_DDR_RASN
E20
M0_DDR_CASN
F20
M0_DDR_WEN
E17
M0_DDR_RESET_N
F9
B20
A20
C19
D19
A11
B11
C10
D10
D18
C20
D9
C11
D22
C15
C23
D16
B24
B15
D23
A15
C16
D21
D17
C22
C18
C21
C17
D20
C13
D7
D13
C6
D14
D6
C14
A5
C7
D12
D8
B13
C9
C12
C8
D11
R500
240
1%
M0_DDR_DQS0
M0_DDR_DQS_N0
M0_DDR_DQS1
M0_DDR_DQS_N1
M0_DDR_DQS2
M0_DDR_DQS_N2
M0_DDR_DQS3
M0_DDR_DQS_N3
M0_DDR_DM0
M0_DDR_DM1
M0_DDR_DM2
M0_DDR_DM3
M0_DDR_DQ0
M0_DDR_DQ1
M0_DDR_DQ2
M0_DDR_DQ3
M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7
M0_DDR_DQ8
M0_DDR_DQ9
M0_DDR_DQ10
M0_DDR_DQ11
M0_DDR_DQ12
M0_DDR_DQ13
M0_DDR_DQ14
M0_DDR_DQ15
M0_DDR_DQ16
M0_DDR_DQ17
M0_DDR_DQ18
M0_DDR_DQ19
M0_DDR_DQ20
M0_DDR_DQ21
M0_DDR_DQ22
M0_DDR_DQ23
M0_DDR_DQ24
M0_DDR_DQ25
M0_DDR_DQ26
M0_DDR_DQ27
M0_DDR_DQ28
M0_DDR_DQ29
M0_DDR_DQ30
M0_DDR_DQ31
N6
M1_DDR_A0
R6
M1_DDR_A1
L6
M1_DDR_A2
J6
M1_DDR_A3
U5
M1_DDR_A4
J5
M1_DDR_A5
T5
M1_DDR_A6
K6
M1_DDR_A7
U6
M1_DDR_A8
M6
M1_DDR_A9
V5
M1_DDR_A10
R5
M1_DDR_A11
P5
M1_DDR_A12
L5
M1_DDR_A13
T6
M1_DDR_A14
P6
M1_DDR_A15
H5
M1_DDR_BA0
V6
M1_DDR_BA1
M5
M1_DDR_BA2
R2
R1
F1
F2
N5
G6
F5
G5
H6
K5
F6
E2
E1
F3
F4
P1
P2
R3
R4
G4
E3
T4
P3
C4
K3
B3
J4
A3
K2
B4
K1
J3
D4
H4
C3
G3
D3
H3
E4
M3
V4
M4
W3
L4
W4
L3
Y2
V3
N4
U4
M2
T3
N3
U3
P4
240
M1_U_CLK
M1_U_CLKN
M1_D_CLK
M1_D_CLKN
M1_DDR_CKE
M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_RESET_N
R501
1%
M1_DDR_DQS0
M1_DDR_DQS_N0
M1_DDR_DQS1
M1_DDR_DQS_N1
M1_DDR_DQS2
M1_DDR_DQS_N2
M1_DDR_DQS3
M1_DDR_DQS_N3
M1_DDR_DM0
M1_DDR_DM1
M1_DDR_DM2
M1_DDR_DM3
M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15
M1_DDR_DQ16
M1_DDR_DQ17
M1_DDR_DQ18
M1_DDR_DQ19
M1_DDR_DQ20
M1_DDR_DQ21
M1_DDR_DQ22
M1_DDR_DQ23
M1_DDR_DQ24
M1_DDR_DQ25
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_DQ28
M1_DDR_DQ29
M1_DDR_DQ30
M1_DDR_DQ31
M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8
M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15
M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2
M0_D_CLK
M0_D_CLKN
M0_DDR_CKE
M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CASN
M0_DDR_WEN
M0_DDR_RESET_N
M0_DDR_DQS0
M0_DDR_DQS_N0
M0_DDR_DM0
M0_DDR_DQ0
M0_DDR_DQ1
M0_DDR_DQ2
M0_DDR_DQ3
M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7
VDDC15_M0
R520
10K
200
R519
200
R580
VDDC15_M0
R514
1K 1%
R515
1K 1%
VDDC15_M0
R516
1K 1%
R517
1K 1%
M0_DDR_RESET_N
M0_DDR_VREFCA
0.1uF
C504
M0_DDR_VREFDQ
0.1uF
C505
M0_D_CLK
M0_D_CLKN
M0_D_CLK
M0_D_CLKN
M0_DDR_CKE
IC500
H5TQ4G83AFR-PBC
DDR3
K3
A0
4Gbit
L7
A1
L3
A2
K2
A3
L8
A4
L2
A5
M8
A6
M2
A7
N8
A8
M3
A9
H7
A10/AP
M7
A11
K7
A12/BC
N3
A13
N7
A14
J7
A15
J2
BA0
K8
BA1
J3
BA2
F7
CK
G7
CK
G9
CKE
H2
CS
G1
ODT
F3
RAS
G3
CAS
H3
WE
N2
RESET
C3
DQS
D3
DQS
B7
DM/TDQS
A7
NF/TDQS
B3
DQ0
C7
DQ1
C2
DQ2
C8
DQ3
E3
DQ4
E8
DQ5
D2
DQ6
E7
DQ7
A3
NC_1
F1
NC_2
F9
NC_3
H1
NC_4
H9
NC_5
M0_U_CLK
200
R535
M0_U_CLKN
M0_U_CLK
200
R581
M0_U_CLKN
VDDC15_M0
M0_1_DDR_VREFCA
R536
1K 1%
R537
1K 1%
C512
VDDC15_M0
M0_1_DDR_VREFDQ
R538
1K 1%
R539
1K 1%
C513
0.1uF
0.1uF
R541
10K
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
M0_DDR_VREFCA
M0_DDR_VREFDQ
J8
E1
VDDC15_M0
R558
H8
ZQ
240
1%
A2
A9
D7
G2
G8
K1
K9
M1
M9
B9
C1
E2
E9
A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9
B2
B8
C9
D1
D9
VDDC15_M0
VDDC15_M0
R550
R551
R552
R553
M0_DDR_VREFCA_T
1K 1%
1K 1%
C550
M0_DDR_VREFDQ_T
1K 1%
1K 1%
C551
0.1uF
C559
0.1uF
C560
0.1uF
0.1uF
M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8
M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15
M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2
M0_D_CLK
M0_D_CLKN
M0_DDR_CKE
M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CASN
M0_DDR_WEN
M0_DDR_RESET_N
M0_DDR_DQS1
M0_DDR_DQS_N1
M0_DDR_DM1
M0_DDR_DQ8
M0_DDR_DQ9
M0_DDR_DQ10
M0_DDR_DQ11
M0_DDR_DQ12
M0_DDR_DQ13
M0_DDR_DQ14
M0_DDR_DQ15
VDDC15_M0
R554
1K 1%
R555
1K 1%
VDDC15_M0
R556
1K 1%
R557
1K 1%
M0_1_DDR_VREFCA_T
0.1uF
C552
M0_1_DDR_VREFDQ_T
0.1uF
C553
IC502
H5TQ4G83AFR-PBC
DDR3
K3
A0
4Gbit
L7
A1
L3
A2
K2
A3
L8
A4
L2
A5
M8
A6
M2
A7
N8
A8
M3
A9
H7
A10/AP
M7
A11
K7
A12/BC
N3
A13
N7
A14
J7
A15
J2
BA0
K8
BA1
J3
BA2
F7
CK
G7
CK
G9
CKE
H2
CS
G1
ODT
F3
RAS
G3
CAS
H3
WE
N2
RESET
C3
DQS
D3
DQS
B7
DM/TDQS
A7
NF/TDQS
B3
DQ0
C7
DQ1
C2
DQ2
C8
DQ3
E3
DQ4
E8
DQ5
D2
DQ6
E7
DQ7
A3
NC_1
F1
NC_2
F9
NC_3
H1
NC_4
H9
NC_5
VDDC15_M1
R521
10K
M1_D_CLK
100
R518
M1_D_CLKN
VDDC15_M1
M1_DDR_VREFCA
R510
1K 1%
R511
1K 1%
C500
VDDC15_M1
M1_DDR_VREFDQ
R512
1K 1%
R513
1K 1%
C501
VREFCA
VREFDQ
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
M1_DDR_RESET_N
0.1uF
0.1uF
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
J8
E1
H8
ZQ
A2
A9
D7
G2
G8
K1
K9
M1
M9
B9
C1
E2
E9
A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9
B2
B8
C9
D1
D9
M1_DDR_CKE
M0_1_DDR_VREFCA
R560
240
1%
100
R530
M1_U_CLK
M1_U_CLKN
VDDC15_M1
R531
R532
VDDC15_M1
R533
R534
M0_1_DDR_VREFDQ
R540
10K
M1_1_DDR_VREFCA
1K 1%
0.1uF
1K 1%
C508
M1_1_DDR_VREFDQ
1K 1%
0.1uF
1K 1%
C509
VDDC15_M0
0.1uF
C583
0.1uF
C574
M0_DDR_RESET_N
M0_DDR_DQS_N2
Place at the bottom side
M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8
M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15
M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2
M0_U_CLK
M0_U_CLKN
M0_DDR_CKE
M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CASN
M0_DDR_WEN
M0_DDR_DQS2
M0_DDR_DM2
M0_DDR_DQ16
M0_DDR_DQ17
M0_DDR_DQ18
M0_DDR_DQ19
M0_DDR_DQ20
M0_DDR_DQ21
M0_DDR_DQ22
M0_DDR_DQ23
M1_DDR_DQS0
M1_DDR_DQS_N0
M1_DDR_DQS1
M1_DDR_DQS_N1
M1_DDR_DM0
M1_DDR_DM1
VDDC15_M1
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_RESET_N
M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15
1uF
C502
M1_DDR_A0
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8
M1_DDR_A9
M1_DDR_A10
M1_DDR_A11
M1_DDR_A12
M1_DDR_A13
M1_DDR_A14
M1_DDR_A15
M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2
M1_D_CLK
M1_D_CLKN
M1_DDR_CKE
M1_DDR_ODT
M1_DDR_WEN
M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7
M1_DDR_DQ8
M1_DDR_DQ9
1uF
C516
IC504
H5TQ4G83AFR-PBC
DDR3
K3
4Gbit
A0
L7
A1
L3
A2
K2
A3
L8
A4
L2
A5
M8
A6
M2
A7
N8
A8
M3
A9
H7
A10/AP
M7
A11
K7
A12/BC
N3
A13
N7
A14
J7
A15
J2
BA0
K8
BA1
J3
BA2
F7
CK
G7
CK
G9
CKE
H2
CS
G1
ODT
F3
RAS
G3
CAS
H3
WE
N2
RESET
C3
DQS
D3
DQS
B7
DM/TDQS
A7
NF/TDQS
B3
DQ0
C7
DQ1
C2
DQ2
C8
DQ3
E3
DQ4
E8
DQ5
D2
DQ6
E7
DQ7
A3
NC_1
F1
NC_2
F9
NC_3
H1
NC_4
H9
NC_5
DDR_SAMSUNG
K4B4G1646B-HCK0
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC501
DDR3
4Gbit
(x16)
Close to REFOUT pin
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-005-HD
2013-12-17
MAIN DDR
Page 29
PCM_RESET
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
/PCM_WAIT
/PCM_IORD
/PCM_IOWR
R701
R702
CI_IN_TS_DATA[0-7]
CI
33
CI
33
+5V_CI_ON
/PCM_CE2
10K
R709
CI
C702
0.1uF
CI
/CI_CD1
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
/PCM_CE2
CI_IN_TS_DATA[0]
CI_IN_TS_DATA[1]
CI_IN_TS_DATA[2]
CI_IN_TS_DATA[3]
CI_IN_TS_DATA[4]
CI_IN_TS_DATA[5]
CI_IN_TS_DATA[6]
CI_IN_TS_DATA[7]
CI_TS_CLK
/PCM_REG
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
/CI_CD2
C703
4.7uF
10V
CI
+5V_CI_ON
R716
CI
R717 100
CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[13]
C707
0.1uF
16V
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
CI_DATA[0-7]
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[8]
CI_ADDR[13]
CI_ADDR[14]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
/PCM_CE1
+5V_CI_ON
10K
R723
CI
/PCM_OE
/PCM_WE
/PCM_IRQA
CI_DATA[0-7]
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DATA[3]
CI_DATA[0-7]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
CI
AR712
33
CI
AR713
33
EB_DATA[0]
EB_DATA[1]
EB_DATA[2]
EB_DATA[3]
EB_DATA[4]
EB_DATA[5]
EB_DATA[6]
EB_DATA[7]
@netLa
EB_DATA[0-7]
CI_UB85/95
JK700
10125901-015LF
100
CI
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
65
66
67
68
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 60
27 61
28 62
29 63
30 64
31
32
33
34
G1 G2
69
CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
CI
C706 0.1uF
C705
12pF
50V
OPT
R721 33
CI
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_IN_TS_VAL
CI_IN_TS_CLK
CI_IN_TS_SYNC
CI_ADDR[10]
CI_ADDR[8]
CI_ADDR[14]
CI
TPO_DATA[0-7]
/CI_CD2
/CI_CD1
TPO_CLK
TPO_SOP
TPO_VAL
R703
+5V_NORMAL
10K
R705
CI
C700
0.1uF
16V
TPO_DATA[0]
TPO_DATA[1]
TPO_DATA[2]
TPO_DATA[3]
TPO_DATA[4]
TPO_DATA[5]
TPO_DATA[6]
TPO_DATA[7]
10K
CI
C701
0.1uF
16V
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[7]
CI_TS_DATA[6]
CI_TS_DATA[5]
CI_TS_DATA[4]
CI_TS_DATA[3]
CI_TS_DATA[2]
CI_TS_DATA[1]
CI_TS_DATA[0]
/PCM_WAIT
/PCM_IRQA
CI
AR701
33
AR706
CI
AR705
33
AR702
100
AR703
CI
100
AR704
CI
100
CI
AR700
100
CI
33
TPI_DATA[3]
TPI_DATA[2]
TPI_DATA[1]
TPI_DATA[0]
CI_IN_TS_DATA[0]
CI_IN_TS_DATA[1]
CI_IN_TS_DATA[2]
CI_IN_TS_DATA[3]
CI_IN_TS_DATA[4]
CI_IN_TS_DATA[5]
CI_IN_TS_DATA[6]
CI_IN_TS_DATA[7]
CI_IN_TS_CLK
CI_IN_TS_SYNC
CI_IN_TS_VAL
CAM_WAIT_N
CAM_IREQ_N
CAM_CD2_N
CAM_CD1_N
TPI_VAL
TPI_SOP
TPI_DATA[7]
TPI_DATA[6]
TPI_DATA[5]
TPI_DATA[4]
C704
12pF
50V
OPT
TPI_CLK
CI_ADDR[3]
CI_ADDR[0]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[4]
CI_ADDR[5]
CI_ADDR[6]
CI_ADDR[7]
CI_ADDR[8]
CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]
CI
AR707
33
CI
AR708
33
CI
AR709
33
EB_ADDR[3]
EB_ADDR[0]
EB_ADDR[2]
EB_ADDR[1]
EB_ADDR[4]
EB_ADDR[5]
EB_ADDR[6]
EB_ADDR[7]
EB_ADDR[8]
EB_ADDR[9]
EB_ADDR[10]
EB_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[14]
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_IORD
/PCM_IOWR
CI
AR711
33
CI
AR710
33
EB_ADDR[12]
EB_ADDR[13]
EB_ADDR[14]
CAM_REG_N
EB_OE_N
EB_WE_N
EB_BE_N1
EB_BE_N0
JK700-*1
10125901-115LF
CI_UB98/D9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 60
27 61
28 62
29 63
30 64
31
32
33
34
69
G1
CI slot body (33mm)
for UB98 / D9
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
65
66
67
68
G2
CI POWER ENABLE CONTROL
IN
EN
IC700
AP2151WG-7
5
4
+5V_CI_ON
OUT
1
CI
GND
2
FLG
3
C708
1uF
25V
R706
10K
CI
CI
PCM_5V_CTL
+5V_NORMAL
C709
0.1uF
CI
50V
R700
10K
CI
CI
R704
100
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-007-HD
2013-12-17
PCMCIA
Page 30
R2300
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
RL_ON
10K
L2304
+3.5V_ST
UBW2012-121F
PWM_DIM
C2307
0.1uF
16V
+12V
UBW2012-121F
L2303
C2306
0.1uF
UBW2012-121F
50V
’14 UHD POWER
eMMC POWER
+3.3V_NORMAL
3.3V_EMMC
L2302
BLM18PG121SN1D
C2305
0.1uF
16V
+12V
L2300
BLM18PG121SN1D
C2301
10uF
16V
1.0V_DCDC_TI
C2312-*1
3300pF
50V
C2359
0.1uF
POWER_ON/OFF2_3
+1.0V_VDD
R1
C2308
100pF
50V
+3.5V_ST
L2312
C2300
22uF
10V
R2302
R2
1%
R2306
R2338
10K
OPT
R2316
0
ST_3.5V-->3.5V
C2320
22uF
10V
RESET
RESET
C2365
0.1uF
16V
C2362
0.1uF
16V
24V-->3.48V
20V-->3.51V
12V-->3.58V
+1.5V_DDR
RESET_IC_DIODES
IC2307-*1
APX803D29
2
1
PD_20_24V_DIODES
IC2308-*1
APX803D29
2
1
POWER_DET
not to RESET
at 8kV ESD
PWR_DET_SEPARATE
POWER_DET_1
VFB
VREG5
C2321
22uF
10V
OPT
GND
GND
TPS54327DDAR
EN
SS
ZD2303
2.5V
3
3
IC2303-*1
1
2
3
4
VCC
VCC
DCDC_TI
[EP]GND
VIN
8
VBST
9
7
THERMAL
SW
6
GND
5
+12V
L2313
1
10K
R2301
2
Q2300 MMBT3906(NXP)
3
PWR ON
PDIM#1
3.5V
3.5V
GND
12V
12V
12V
GND
24V
24V
GND
P13002
SMAW200-H24S5
1
3
5
7
9
11
13
15
17
19
21
23
25
INV CTL
2
PDIM#2
4
GND
6
3.5V
8
GND
10
12V
12
12V
14
GND
16
24V
18
24V
20
24V
22
GND
24
R2309
100
PWM_DIM2
UBW2012-121F
UBW2012-121F
L2306
L2315
+12V
+3.3V_NORMAL
R2310
1K
INV_CTL
C2352
10uF
16V
C2316
0.1uF
C2354
10uF
16V
+24V
50V
C2357
10uF
16V
MLB-201209-0120P-N2
+3.3V_NORMAL
+3.5V_ST
R2333
+3.3V_NORMAL
R2341
10K
11K
R2346
EBC
1.5K
22
R2342
LD2300
Q2303
2SC3052
C2327
0.1uF
16V
L2314
MLB-201209-0120P-N2
PANEL_CTL
POWER_ON/OFF2_2
C231 7
10uF
25V
OPT
R2314
+2.5V
PANEL_POWER
C2330
C2322
0.01uF
0.1uF
50V
25V
C2331
R2318
10uF
10K
25V
R2324
1.8K
C
R2317
10K
B
Q2301
2SC3052
0
OPT
+5V_NORMAL
E
R2312
10K
C2341
0.1uF
C2337
1uF
Vout=0.6*(1+R1/R2)
AP2132MP-2.5TRG1
PG
EN
VIN
VCTRL
C2333
10uF
25V
IC2302
1
2
3
4
2A
EAN61387601
9
THERMAL
TYP 6000mA
PANEL_VCC
Q2302
AO4423
S1
D4
1
8
AO4423
S2
D3
2
7
S3
D2
3
6
G
D1
4
5
C2334
10uF
25V
OPT
[EP]
8
GND
7
ADJ
6
VOUT
5
NC
R2329
2K
OPT
T2 : Max 1.7A
else : Max 0.7A
+2.5V_Normal
1.2K
R2
R2321
R1
3.9K
R232 2
C2342
10uF
10V
R2332
C233 6
C2339
2K
10uF
0.1uF
OPT
25V
25V
OPT
Q2302-*1
AO4447A
S_1
D_4
1
8
AO4447
S_2
D_3
2
7
S_3
D_2
3
6
G
D_1
4
5
5V
OPT
ZD2302
Power_DET
PD_UHD_24V
R2327-*2
9.1K
1%
PD_UHD_24V
R2328-*2
1.6K
1%
+12V
L2301
BLM18PG121SN1D
C2302
C2360
10uF
0.1uF
16V
1.0V_DCDC_TI
C2315-*1
3300pF
50V
+12V
+3.5V_ST
PD_+12V
R2325
2.7K
1%
PD_+12V
R2326
1.2K
1%
+24V
PD_20V
PD_24V
R2327-*1
R2327
5.6K
8.2K
1%
1%
PD_20V
PD_24V
R2328
R2328-*1
1.3K
1.5K
1%
1%
Main +1.5V
POWER_ON/OFF2_3
R2303
R1
C2303
100pF
50V
R2313
R2305
18K
3.6K
1%
1%
R2307
22K
1%
R2
PD_+3.5V
R2330
0
5%
10K
C2313
1uF
10V
C2355
0.1uF
16V
C2356
0.1uF
16V
PD_20_24V
EN
FB
VREG
SS
C2315
2200pF
50V
1.0V_DCDC_ROHM
R2337
100K
RESET_IC_ROHM
IC2307
BD48K28G
VDD
3
PD_20_24V
R2336
100K
PD_20_24V_ROHM
IC2308
BD48K28G
VDD
3
DCDC_ROHM
IC2303
BD9D320EFJ
1
2
THERMAL
3
4
3A
+3.5V_ST
VOUT
2
1
GND
R2315
0
PWR_DET_MERGE
VOUT
2
1
GND
8
9
7
6
5
[EP]FIN
VIN
BOOT
SW
GND
16V
0.1uF
C2318
NR5040T2R2N
PWR_DET_SEPARATE
L2308
2.2uH
Vout=0.765*(1+R1/R2)=1.516V
LG1154A
+1.0V_VDD
DCDC_ROHM
IC2300
BD9D320EFJ
R2304
10K
11K
33K
1%
C2310
1uF
10V
EN
FB
VREG
SS
C2312
2200pF
50V
1.0V_DCDC_ROHM
[EP]FIN
VIN
1
8
16V
0.1uF
C2314
BOOT
9
2
7
THERMAL
SW
3
6
GND
4
5
3A
NR5040T2R2N
L2307
2.2uH
C2340
22uF
10V
Vout=0.765*(1+R1/R2)
C2348
22uF
10V
2.5V
ZD2300
OPT
DCDC_TI
IC2300-*1
TPS54327DDAR
[EP]GND
EN
VIN
1
8
VFB
VBST
9
2
7
THERMAL
VREG5
SW
3
6
SS
GND
4
5
POWER_ON/OFF2_4
+1.2V_VDD
OPT
2.5V
ZD2304
C2361
22uF
C2353
C2370
1000pF
50V
C2369
0.1uF
16V
L2321
1uH
C2366
22uF
22uF
+1.2V_CORE
R2359
10K
1%
91K
1/16 W
R236 1
1%
27K
1/16 W
RF
R236 0
1
PGOOD
R2358
2
EN
3
16V
0.1uF
VBST
4
C2372
NC_1
5
4.7
SW_1
6
SW_2
7
SW_3
8
SW_4
9
5%
30V
D2301
R2356 1K
R2355
2K
1/16W
5%
R2357
3.3
1/10W
C2371
470pF
50V
Vout=0.6*(1+R1/R2)
R2362
39K
1/16W
5%
[EP]
THERMAL
29
IC2309
TPS53513RVER
8A
10
PGND_111PGND_212PGND_313PGND_414PGND_5
R2368
100
1/16W
1%
R1
R2363
5.1K
1/16W
1%
TRIP26NC_327GND128GND2
R2
R2364
4.87K
1/16W
1%
1%
C2373
2200pF
50V
1/16W
20K
24VO25
FB
23
GND
22
MODE
21
VREG
20
VDD
19
NC_2
18
VIN_3
17
VIN_2
16
VIN_1
15
R2365
C2374
1uF
10V
L2322
C2375
10uF
16V
+12V
C2376
10uF
16V
+5.0V normal & USB
+24V
R234 8150K 1 %
R234 4 16K 1%
L2310
120-ohm
C2309
10uF
35V
OPT
C2311
10uF
35V
C2329
0.1uF
50V
PGND_1
PGND_2
PGND_3
1uF
25V
5%
C232 4
1/16W
0.0068uF
R234 7 16K 1%
[EP]
VIN_1
1
THERMAL
VIN_2
2
29
VIN_3
3
IC2304
4
SN1302001(TPS65286RHDR)
5
6
V7V
6A
7
9EN10
8
0
R2343
SW_OUT211SW_OUT1
MODE/SYNC
C2335
50V
10K
R2345
+5V_USB_2
POWER_ON/OFF1
+5V_USB_3
C2338
2200pF
50V
R2349
10K
COMP25RLIM26RSET127RSET228AGND
12
SW_EN213SW_EN1
USB_CTL2
22SS23FB24
21
20
19
18
17
16
15
14
NFAULT2
USB_CTL3
/USB_OCD2
R2
OPT
C2343
C2344
100pF
0.047uF
50V
25V
C2347
82pF
50V
LX_3
L2311
4.7uH
LX_2
C2346
LX_1
0.047uF
R2350
0
25V
BST
SW_IN2
SW_IN1
5%
100K
R2351
NFAULT1
Vout=0.6*(1+R1/R2)=5.1V
R1
1/16W
R2354
/USB_OCD3
1%
6.8K
1/16W
R2352
1%
51K
1/16W
R2353
C2351
22uF
10V
C2358
22uF
10V
C2350
10uF
+5V_NORMAL
C2349
1uF
5%
10V
100K
1/16W
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
POWER UP SEQUENCE
5V/3.3V->2.5V->1.5V/1.1V->1.0V
LG1154D : 3.3V->2.5V->1.5V->1.1V
LG1154AN : 3.3V->2.5V->1.0V
BSD-14Y-UD-023-HD
2013-12-17
POWER
Page 31
Renesas MICOM
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
For Debug
+3.5V_ST
MICOM_DEBUG
P3000
12507WS-04L
5
1
2
3
4
Don’t remove R3014,
not making float P40
R3013 1K
R3010 10K
MICOM_DEBUG
MICOM_DEBUG
MICOM_RESET
GP4 High/MID Power SEQUENCE
POWER_ON/OFF!
POWER_ON/OFF2_1
POWER_ON/OFF2_2
POWER_ON/OFF2_3
POWER_ON/OFF2_4
SOC_RESET
MICOM MODEL OPTION
MICOM MODEL OPTION
+3.5V_ST
MODEL_OPT_0
MODEL_OPT_1
MICOM_GED
R3000 10K
MICOM_H13/H14
R3002 10K
MICOM_EPI
R3004 10K
R3006 10K
MICOM_OLED
R3011 10K
MICOM_OLED_MAIN
R3006-*1 56K
MICOM_LOGO_LIGHT
MICOM_OLED_FRC
R3006-*2 22K
MODEL1_OPT_0
MODEL1_OPT_1
MODEL1_OPT_2
MODEL1_OPT_3
MODEL1_OPT_4
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
M14 FHD LCD
MICOM_M14
R3003 10K
R3001 10K
MICOM_NON_GED
R3007 10K
R3005 10K
MICOM_LCD/UHD
MICOM_NON_EPI
R3012 10K
MICOM_NON_LOGO_LIGHT
M14 FHD OLED
H13/H14 UHD OLED
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
0
NON LOGO
LCD / UHD
NON_EPI
M14
NON_GED
MODEL_OPT_1
1
LOGO
OLED
EPI
H13 / H14
GED
MODEL_OPT_3
0 0
1
0
1
CAM_SLEEP
For LOGO LIGHT
Need to Assign ADC port
0
1 H13/H14 UHD LCD
1
I2C_SCL_MICOM
I2C_SDA_MICOM
MODEL1_OPT_4
PANEL_CTL
WOL/WIFI_POWER_ON
IR
HDMI_CEC
POWER_ON/OFF2_2
POWER_ON/OFF2_3
EYE_SDA
EYE_SCL
CAM_SLEEP
TP3002
+3.5V_ST
P60/SCLA0
P61/SDAA0
P31/TI03/TO03/INTP4
P75/KR5/INTP9/SCK01/SCL01
P74/KR4/INTP8/SI01/SDA01
P73/KR3/SO01
P72/KR2/SO21
P71/KR1/SI21/SDA21
P70/KR0/SCK21/SCL21
P30/INTP3/RTC1HZ/SCK11/SCL11
1
2
P62
3
P63
4
5
6
7
8
9
10
11
12
P50/INTP1/SI11/SDA11
+3.5V_ST
R3018
10K
P31/TI03/TO03/INTP4
P75/KR5/INTP9/SCK01/SCL01
P74/KR4/INTP8/SI01/SDA01
P71/KR1/SI21/SDA21
P70/KR0/SCK21/SCL21
P30/INTP3/RTC1HZ/SCK11/SCL11
3.3K
AR3000
EYE_Q_10P
P120/ANI19
P41/TI07/TO07
P40/TOOL0
RESET41P124/XT2/EXCLKS
P123/XT1
P137/INTP0
P122/X2/EXCLK
P121/X1
REGC47VSS48VDD
37
38
39
40
42
43
44
45
46
IC3000-*1
R5F100GEAFB#30
MICOM_LEAD_Cu
13
14
15
16
17
18
19
20
P17/TI02/TO02
P13/TXD2/SO20
P51/INTP2/SO11
P16/TI01/TO01/INTP5
P14/RXD2/SI20/SDA20
P12/SO00/TXD0/TOOLTXD
P15/PCLBUZ1/SCK20/SCL20
21
P11/SI00/RXD0/TOOLRXD/SDA00
P140/PCLBUZ0/INTP6
36
P00/TI00/TXD1
35
P01/TO00/RXD1
34
P130
33
P20/ANI0/AVREFP
32
P21/ANI1/AVREFM
31
P22/ANI2
30
P23/ANI3
29
P24/ANI4
28
P25/ANI5
27
P26/ANI6
26
P27/ANI7
25
22
23
24
P146
P147/ANI18
P10/SCK00/SCL00
HDMI_WAUP:HDMI_INIT
MHL_DET
MHL_DET
+3.5V_ST
C3000
0.1uF
P60/SCLA0
P61/SDAA0
P62
P63
P73/KR3/SO01
P72/KR2/SO21
8pF
C3002
X3000
32.768KHz
POWER_DET_1
CAM_PWR_ON_CMD
P137/INTP0
P122/X2/EXCLK
P121/X1
43
44
45
R3019
1
10K
VDD
48
TP3009
GND
VSS
47
CAM_PWR_ON_CMD
C3001 0.47uF
REGC
46
2
3
4
5
6
7
8
IC3000
R5F100GEAFB
MICOM_LEAD_Au
9
10
11
12
13
14
15
16
17
18
P17/TI02/TO02
P51/INTP2/SO11
P16/TI01/TO01/INTP5
P50/INTP1/SI11/SDA11
P14/RXD2/SI20/SDA20
P15/PCLBUZ1/SCK20/SCL20
LED_R
POWER_DET
WOL/ETH_POWER_ON
WOL_CTL
POWER_ON/OFF1
LED_R
SOC_RESET
C3003 8pF
R3020
4.7M
MICOM_RESET
OPT
R3021 22
MICOM_RESET_22OHM
P40/TOOL0
RESET
P124/XT2/EXCLKS
P123/XT1
40
41
42
19
20
21
LOGO_LIGHT
MICOM_DEBUG
LOGO_LIGHT
C3004
0.1uF
16V
P120/ANI19
P41/TI07/TO07
37
38
39
36
35
34
33
32
31
30
29
28
27
26
25
22
23
24
+3.5V_ST
10K
R3022
R3023
P140/PCLBUZ0/INTP6
P00/TI00/TXD1
P01/TO00/RXD1
P130
P20/ANI0/AVREFP
P21/ANI1/AVREFM
P22/ANI2
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
P146
P147/ANI18
P13/TXD2/SO20
P10/SCK00/SCL00
P12/SO00/TXD0/TOOLTXD
P11/SI00/RXD0/TOOLRXD/SDA00
INV_CTL
0.1uF
C3005
SOC_TX
SOC_RX
EDID_WP
AMP_MUTE
EDID_WP
CAM_CTL
CAM_CTL
CEC_REMOTE
MICOM_RESET_SW
OPT
270K
CAM_RESET
MICOM
SW3000
JTP-1127WEM
4 3
BAT54_SUZHO
1 2
MICOM_RESET_33OHM
R3021-*1 33
R3024
27K
D3000
CAM_RESET
RL_ON
SCART_MUTE
POWER_ON/OFF2_4
POWER_ON/OFF2_1
KEY2
KEY1
MODEL1_OPT_3
MODEL1_OPT_0
SIDE_HP_MUTE
MODEL1_OPT_2
MODEL1_OPT_1
For CEC
+3.5V_ST
G
D
S
Q3000
RUE003N02
SCART_MUTE
POWER_ON/OFF2_4
R3025
120K
HDMI_CEC
BSD-14Y-UD-030-HD
2013.12.17
30
Page 32
5V_HDMI_1
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R3298
33
VA3212
Q3200
Q3201
VA3210
ESD_HDMI
5V_HDMI_4
HDMI_HPD_1
VA3204
ESD_HDMI
R3205
1K
C
R3233
1K
B
E
D3204
RCLAMP0544T.TCT
6.5VTO11.0V
1 8
2 7
3 6
4 5
D3205
RCLAMP0544T.TCT
6.5VTO11.0V
1 8
2 7
3 6
4 5
R3219
1K
C
R3245
1K
B
E
VA3213
ESD_HDMI
D3206
RCLAMP0544T.TCT
6.5VTO11.0V
1 8
2 7
3 6
4 5
D3207
RCLAMP0544T.TCT
6.5VTO11.0V
1 8
2 7
3 6
4 5
D3200
VA3215
ESD_HDMI
IP4294CZ10-TBR
1
2
3
4
5
D3201
IP4294CZ10-TBR
1
2
3
4
5
33
1/16W
VA3207
ESD_HDMI
D3202
IP4294CZ10-TBR
1
2
3
OPT
4
5
D3203
IP4294CZ10-TBR
1
2
3
OPT
4
5
R3218
4.7K
HDMI_INT_EDID
R3247
4.7K
HDMI_EXT_EDID
9
9
R3220
4.7K
HDMI_INT_EDID
R3248
4.7K
HDMI_EXT_EDID
AR3205
33
1/16W
9
9
AR3206
33
1/16W
10
9
8
OPT
7
6
10
9
8
OPT
7
6
BODY_SHIELD
BODY_SHIELD
BODY_SHIELD
BODY_SHIELD
20
05008WR-H19C.
JK3203
VA3205
ESD_HDMI
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
05008WR-H19C.
JK3200
VA3202
ESD_HDMI
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
05008WR-H19C.
JK3201
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
05008WR-H19C.
JK3202
19
HOT_PLUG_DETECT
18
VDD[+5V]
17
DDC/CEC_GND
16
SDA
15
SCL
14
RESERVED
13
CEC
12
TMDS_CLK-
11
TMDS_CLK_SHIELD
10
TMDS_CLK+
9
TMDS_DATA0-
8
TMDS_DATA0_SHIELD
7
TMDS_DATA0+
6
TMDS_DATA1-
5
TMDS_DATA1_SHIELD
4
TMDS_DATA1+
3
TMDS_DATA2-
2
TMDS_DATA2_SHIELD
1
TMDS_DATA2+
HOT_PLUG_DETECT
VDD[+5V]
DDC/CEC_GND
SDA
SCL
RESERVED
CEC
TMDS_CLK-
TMDS_CLK_SHIELD
TMDS_CLK+
TMDS_DATA0-
TMDS_DATA0_SHIELD
TMDS_DATA0+
TMDS_DATA1-
TMDS_DATA1_SHIELD
TMDS_DATA1+
TMDS_DATA2-
TMDS_DATA2_SHIELD
TMDS_DATA2+
HOT_PLUG_DETECT
VDD[+5V]
DDC/CEC_GND
SDA
SCL
RESERVED
CEC
TMDS_CLK-
TMDS_CLK_SHIELD
TMDS_CLK+
TMDS_DATA0-
TMDS_DATA0_SHIELD
TMDS_DATA0+
TMDS_DATA1-
TMDS_DATA1_SHIELD
TMDS_DATA1+
TMDS_DATA2-
TMDS_DATA2_SHIELD
TMDS_DATA2+
HOT_PLUG_DETECT
VDD[+5V]
DDC/CEC_GND
SDA
SCL
RESERVED
CEC
TMDS_CLK-
TMDS_CLK_SHIELD
TMDS_CLK+
TMDS_DATA0-
TMDS_DATA0_SHIELD
TMDS_DATA0+
TMDS_DATA1-
TMDS_DATA1_SHIELD
TMDS_DATA1+
TMDS_DATA2-
TMDS_DATA2_SHIELD
TMDS_DATA2+
CEC_REMOTE
VA3201
ESD_HDMI
CEC_REMOTE
VA3206
ESD_HDMI
CEC_REMOTE
OPT
VA3200
ADLC 5S 02 015
VA3211
ADLC 5S 02 015
CEC_REMOTE
VA3203
ESD_HDMI
MMBT3904(NXP)
R3202
100K
MMBT3904(NXP)
R3203
100K
OPT
ESD_HDMI
HDMI4 with MHL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
10
9
8
7
6
10
9
8
7
6
5V_HDMI_2
HDMI_HPD_2
OPT
OPT
5V_HDMI_3
HDMI_HPD_3
OPT
OPT
HDMI3
HDMI_HPD_4_MHL
DDC_SDA_MHL
DDC_SCL_MHL
CK-_HDMI4_JACK
CK+_HDMI4_JACK
D0-_HDMI4_JACK
D0+_HDMI4_JACK
D1-_HDMI4_JACK
D1+_HDMI4_JACK
D2-_HDMI4_JACK
D2+_HDMI4_JACK
VA3216
ESD_HDMI
DDC_SDA_1_R9531
DDC_SCL_1_R9531
CK-_HDMI1_R9531
CK+_HDMI1_R9531
D0-_HDMI1_R9531
D0+_HDMI1_R9531
D1-_HDMI1_R9531
D1+_HDMI1_R9531
D2-_HDMI1_R9531
D2+_HDMI1_R9531
HDMI1
CK-_HDMI2
CK+_HDMI2
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
DDC_SDA_3
DDC_SCL_3
CK-_HDMI3
CK+_HDMI3
D0-_HDMI3
D0+_HDMI3
D1-_HDMI3
D1+_HDMI3
D2-_HDMI3
D2+_HDMI3
AR3204
33
1/16W
VA3214
VA3209
ESD_HDMI
ESD_HDMI
5V_HDMI_2
R3206
1K
C3200
OPT
1uF
VA3208
ESD_HDMI
10V
R3207
3.9K
OPT
HDMI2 with ARC
R3260
1K
1/16W
Q3205
5%
C3234
0.1uF
16V
OPT
R3232
R3259
180K
120K
MMBT3904(NXP)
DDC_SDA_2
DDC_SCL_2
SPDIF_OUT_ARC
OPT
C3201
0.1uF
16V
B
P_XOUT
R3241
2.2M
P_XIN
P_AVDD33
510
R3225
P_AVDD33
ARC
+3.5V_ST
R3261
10K
C
E
510
R3228
+1.1V_VDD_D14
+1.1V_VDD_D14
C3272
22uF
10V
+1.1V_VDD_D14
L3200
BLM18PG121SN1D
HDMI_3.3V HDMI_3.3V
L3201
BLM18PG121SN1D
HDMI_3.3V HDMI_3.3V
L3204
BLM18PG121SN1D
+5V_NORMAL
AR3201
E
MMBT3906(NXP)
R3262
Q3206
10K
B
C
MHL_DET
(CD_SENCE)
X3200
27MHz
X-TAL_1
1
GND_13X-TAL_2
2
HDMI_1_RX2+
HDMI_1_RX2-
HDMI_1_RX1+
HDMI_1_RX1-
HDMI_1_RX0+
HDMI_1_RX0-
HDMI TX port 1 HDMI TX port 0
HDMI_1_CLK+
HDMI_1_CLK-
HDMI_0_RX2+
HDMI_0_RX2-
HDMI_0_RX1+
HDMI_0_RX1-
HDMI_0_RX0+
HDMI_0_RX0-
HDMI_0_CLK+
HDMI_0_CLK-
L3205
BLM18PG121SN1D
C3202
0.33uF
OPT
OPT
C3228 1000pF
C3229 1000pF
C3204 1000pF
P_VDD33
C3206 0.1uF
C3207 0.1uF
C3205 0.33uF
P_AVDDH33
C3221 0.33uF
C3223 0.1uF
C3225 0.1uF
DDC pull-up
5V_HDMI_1
A2CA1
MMBD6100
D3218
47K
1/16W
GND_2
4
C3214
1000pF
1000pF
C3224
C3222
OPT
P_VDD11
+1.1V_VDD_D14
1000pF
OPT
OPT
C3248
C3208 1000pF
C3216 4.7uF
C3261 0.33uF
C3260 4.7uF
DDC_SDA_1_R9531
DDC_SCL_1_R9531
C3233
20pF
20pF
OPT
OPT
C3226 1000pF
R3214
0
5V_HDMI_2
1000pF
C3227
OPT
C3263
4.7uF
10V
P_AVDDH11
C3253 1000pF
OPT
L3203
BLM18PG121SN1D
P_AVDD33
C3212 0.33uF
R3221
0
C3230 0.33uF
AR3200
47K
1/16W
P_AVDD33
1000pF
C3254
OPT
C3215 0.33uF
C3231 0.33uF
+5V_NORMAL
OPT
1000pF
C3250
C3217 0.33uF
P_PVDD33
A2CA1
MMBD6100
D3208
Test3_ANA_MON3
1000pF
C3256
C3255 1000pF
OPT
P_AVDD11
1000pF
OPT
OPT
C3251
C3258 0.33uF
0.1uF
C3232
DDC_SDA_2
DDC_SCL_2
Test1_ANA_MON1
Test2_ANA_MON2
Test3_ANA_MON3
P_AVDD11
P_VDD11
P1EXT_SWING
NC[ANA_MON3]
P0EXT_SWING
CH0ALRCLK
C3264
4.7uF
10V
OPT
OPT
C3252 1000pF
C3259 4.7uF
C3265 4.7uF
+5V_NORMAL
AR3202
47K
+5V_NORMAL
[EP]
VDD33_1
1
VDD11_1
2
P1TX2P
3
AVDD33_1
4
P1TX2M
5
P1TX1P
6
AVDD11_1
7
P1TX1M
8
P1TX0P
9
AVDD33_2
10
P1TX0M
11
P1TXCP
12
AVDD11_2
13
P1TXCM
14
15
16
P0TX2P
17
AVDD33_3
18
P0TX2M
19
P0TX1P
20
AVDD11_3
21
P0TX1M
22
P0TX0P
23
AVDD33_4
24
P0TX0M
25
P0TXCP
26
AVDD11_4
27
P0TXCM
28
29
CH0ABCLK
30
31
CH0ASD3
32
CH0ASD2
33
CH0ASD1
34
CH0ASD0
35
VDD11_2
36
P_PVDD33
P_VDD33
3.3V Power Separation
+3.3V_NORMAL
C3268
100uF
6.3V
5V_HDMI_3
A2CA1
MMBD6100
D3219
1/16W
DDC_SDA_3
DDC_SCL_3
R326 8
1.8K
R326 6
1.8K
R326 7
1.8K
R326 5
1.8K
R3269 0
R3270 0
R3271 0
R3272 0
TX1SCL
TX1SDA
TX0SCL
TX0SDA
141
142
143
144
THERMAL
145
37
38
NIRQA039NIRQA140TX1HPD41TX0HPD
VDD33_2
R3231
10K
+5V_NORMAL HDMI_3.3V
R3208
10K
S
AO3438
Q3204
C3269
22uF
10V
+3.5V_ST
5V_HDMI_4
AR3203
47K
1/16W
NC_11
140
G
A2CA1
MMBD6100
D3209
TX0SDA
TX0SCL
TX1SDA
TX1SCL
NC_7
NC_8
NC_9
NC_10
CH0AMCLK
VDD11_6
134
135
136
137
138
139
MN864778P
42
43
44
45
46
NTEST
PVDD33
P3RXCM47P3RXCP
AVDDH33_1
NC[ANA_MON2]
Test2_ANA_MON2
CK+_HDMI1
CK-_HDMI1
D
C3235
10uF
10V
+5V_NORMAL
A2CA1
MMBD6100
D3210
DDC_SCL_MHL
DDC_SDA_MHL
TX0SDA
TX0SCL
TX1SDA
TX1SCL AR3207
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
128
129
130
131
132
133
IC3200
48
49
51
52
P3RX0M50P3RX0P
P3RX1M53P3RX1P54P3RX2M55P3RX2P56P2RXCM57P2RXCP
AVDD11_5
AVDD11_6
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
10K
10K
R3244
R3243
VDD11_5
VSS
CH1ASD0
CH1ALRCLK
CH1ABCLK
LPSA1
LPSA0
121
122
123
124
125
126
127
58
59
P2RX0M60P2RX0P
AVDD11_7
D1+_HDMI1
D2-_HDMI1
D2+_HDMI1
CK-_HDMI2
D0+_HDMI2
CK+_HDMI2
D0-_HDMI2
HDMI1
R9531 +1.0V
+3.3V_NORMAL
C3240
0.1uF
16V
MN864778_RESET
P_XOUT
I2C_SCL5
I2C_SDA5
P_XIN
R3258 0
R3230 0
CEC1
HSCL0
HSDA0
SYSCLK/XI
NC/XO
RX3P5V
NRESET
114
115
116
117
118
119
120
61
62
66
67
P2RX1M63P2RX1P64P2RX2M65P2RX2P
D1-_HDMI2
D1+_HDMI2
R3279
10K
+5V_NORMAL
D2-_HDMI2
C3241
1uF
AVDDH33_2
D2+_HDMI2
HDMI2
C3243
0.1uF
VDD11_3
5V_HDMI_2
R3237
47K
AVDD11_8
Vout=0.6*(1+R1/R2)
5V_HDMI_1
R3234
0
R3235
47K
P_VDD33
CEC5
TX1ARCIN
TX0ARCIN
VDD33_4
NIRQ1
109
110
111
112
113
68
69
70
71
RX2P5V
RX1P5V72RX0P5V
VDD33_3
NC[VDDQ]
5V_HDMI_3
R3236
0
R3239
47K
IC3204
AP2132MP-2.5TRG1
1
PG
2
EN
3
VIN
4
2A
VCTRL
EAN61387601
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
R3238
0
THERMAL
9
P_VDD33
VDD11_4
AVDDH33_4
P0RX2P
P0RX2M
P0RX1P
P0RX1M
AVDD11_12
P0RX0P
P0RX0M
AVDD11_11
P0RXCP
P0RXCM
P1RX2P
P1RX2M
P1RX1P
P1RX1M
AVDD11_10
P1RX0P
P1RX0M
AVDD11_9
P1RXCP
P1RXCM
AVDDH33_3
NC[ANA_MON1]
CEC0
CEC2
CEC3
CEC4
RX0SCL
RX0SDA
RX1SCL
RX1SDA
RX2SCL
RX2SDA
RX3SCL
RX3SDA
5V_HDMI_4
R3240
0
R3242
47K
[EP]
8
GND
7
ADJ
6
VOUT
5
NC
P_AVDDH33
P_AVDDH11
else : Max 0.7A
1.8K
R2
R3280
R1
1.2K
R328 1
D2+_HDMI4_MHL
D2-_HDMI4_MHL
D1+_HDMI4_MHL
D1-_HDMI4_MHL
D0+_HDMI4_MHL
D0-_HDMI4_MHL
CK+_HDMI4_MHL
CK-_HDMI4_MHL
D2+_HDMI3
D2-_HDMI3
D1+_HDMI3
D1-_HDMI3
D0+_HDMI3
D0-_HDMI3
CK+_HDMI3
CK-_HDMI3
Test1_ANA_MON1
P_AVDDH33
+5V_NORMAL
AR3209
47K
1/16W
DDC_SCL_3
DDC_SDA_3
DDC_SCL_2
DDC_SDA_2
DDC_SCL_1
DDC_SDA_1
Solder Preform
Attach at R9531 thermal pad
CK-_HDMI1_R9531
CK+_HDMI1_R9531
D0-_HDMI1_R9531
D0+_HDMI1_R9531
D1-_HDMI1_R9531
D1+_HDMI1_R9531
D2-_HDMI1_R9531
D2+_HDMI1_R9531
+1.0V_R9531
C3262
ZD3202
10uF
2.5V
10V
OPT
HDMI4
HDMI3
+1.0V_R9531
+1.0V_R9531
L3210
BLM18PG121SN1D
L3207
BLM18PG121SN1D
L3211
BLM18PG121SN1D
HDMI_3.3V
C3203
10uF
10V
SI1012CR-T1-GE3
RAC33437501
RAC33437501
RAC33437501
RAC33437501
RAC33437501
SPI_CK_R9531
R3257
R3263 5.1
R3264
R3273 5.1
R3274
R3276 5.1
R3277
R3299 5.1
CVDD10_R9531
DVDD10_R9531
AVDD33_R9531
C3244
10uF
10V
C3257
10uF
10V
3.3V_Sil9617
L3202
BLM18PG121SN1D
C3209
0.1uF
16V
D2+_HDMI4_MHL
D2-_HDMI4_MHL
D1+_HDMI4_MHL
D1-_HDMI4_MHL
D0+_HDMI4_MHL
D0-_HDMI4_MHL
CK+_HDMI4_MHL
CK-_HDMI4_MHL
Q3203
S3200
S3201
S3202
S3203
S3204
SD0_IN_SPDIF0_IN
5.1
5.1
5.1
5.1
R9531_RESET
CVDD10_R9531
C3279
C3246
10uF
10uF
10V
10V
APLL10_R9531
C3282
0.1uF
16V
DVDD10_R9531
C3278
2.2uF
10V
C3218
0.1uF
16V
C3210
0.1uF
16V
SIL9617_RESET
SIL9617_INT
+3.3V_NORMAL
S
G
D
R3204
33
SCLK_GPIO9
RSVDL_1
CVDD10_1
AVDD10_1
AVDD33_1
RSVDNC_1
RSVDNC_2
RSVDNC_3
RSVDNC_4
RSVDNC_5
RSVDNC_6
RSVDNC_7
RSVDNC_8
RSVDNC_9
SI1012CR-T1-GE3
C3284
0.1uF
16V
C3280
0.1uF
16V
C3219
22uF
10V
C3211
0.1uF
16V
GPIO5
GPIO6
R0XCR0XC+
R0X0R0X0+
R0X1R0X1+
R0X2R0X2+
Q3202
C3288
0.1uF
16V
C3289
0.1uF
16V
+5V_NORMAL
S
D
C3245
0.1uF
16V
+3.3V_NORMAL
5V_MHL
L3208
BLM18PG121SN1D
3.3V_Sil9617
AVDD10_1
1
RSVD_1
2
THERMAL
RSVD_2
3
77
RSVD_3
4
RSVD_4
5
RSVD_5
6
RSVD_6
7
RSVD_7
8
RSVD_8
9
VDD10_1
10
TAVDD10
11
TX2P
12
TX2N
13
TX1P
14
TX1N
15
TX0P
16
TX0N
17
TXCP
18
TXCN
19
20
21
22
INT
RSVDL_1
TPWR_CI2CA
4.7K
R3210
PWRMUX_OUT_SIL9617
10K
R3201
+3.3V_NORMAL
R3200
47K
R3209
47K
AR3208
33
AVDD33_R9531
SPI_DI_R9531
RSVDNC_35
RSVDNC_36
IOVCC33
SDO_GPIO10
SDI_GPIO11
SS_GPIO8
[EP]
96
97
98
99
100
1
2
THERMAL
3
101
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
RSVDNC_1027RSVDNC_1128RSVDNC_1229RSVDNC_1330RSVDNC_1431RSVDNC_15
PWRMUX_OUT
R3252
C3266
0.1uF
16V
10K
HDMI_3.3V
CVDD10_R9531
L3215
BLM18PG121SN1D
L3213
BLM18PG121SN1D
G
C3236
0.1uF
16V
IC3206
SIL9617
23
24
25
27
RESET_N
RSVDH_128RSVDH_229RSVDL_230RSVDL_331RSVDH_332RSVDH_433RSVDL_434RSVDL_5
CD_SENSE
DSDA4[VGA]26DSCL4[VGA]
MHL_DET
5.1K R3212
R3211 47K
SPI_CS_R9531
SPI_DO_R9531
CVDD10_R9531
RSVDNC_29
RSVDNC_30
RSVDNC_31
RSVDNC_32
RSVDNC_33
RSVDNC_34
90
91
92
93
94
95
IC3202
R9531AN
32
35
CVDD10_233AVDD10_234AVDD33_2
RSVDNC_1636RSVDNC_1737RSVDNC_1838RSVDNC_1939RSVDNC_2040RSVDNC_2141RSVDNC_2242RSVDNC_23
DVDD10_R9531
AVDD33_R9531
C3292
C3294
10uF
10uF
10V
10V
XTAL_VCC33_R9531
C3293
C3290
0.1uF
10uF
16V
10V
5.1K R3215
R3213 47K
RSVDNC_28
88
89
AVDD33_R9531
C3298
0.1uF
16V
35
37
DSDA136DSCL1
CBUS_HPD1
5.1K R3216
R3222
R3223
ARCRX_TX
87
AVDD10_259VDD33_160R1XCN61R1XCP62R1X0N63R1X0P64R1X1N65R1X1P66R1X2N67R1X2P68RSVD_969RSVD_1070RSVD_1171RSVD_1272RSVD_1373RSVD_1474RSVD_1575RSVD_1676VDD33_277[EP]GND
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
R1PWR5V
5.1K R3217
D0-_HDMI1
C3299
0.1uF
16V
5V_MHL
C3249
0.1uF
16V
MHL_DET
R0X2P
R0X2N
R0X1P
R0X1N
R0X0P
R0X0N
R0XCP
R0XCN
VDD10_2
ARC
SPDIF_IN
CSCL
CSDA
PWRMUX_OUT
SBVCC5
R0PWR5V
CBUS_HPD0
DSCL0
DSDA0
+3.3V_NORMAL
47K
47K
R3224
47K
DVDD10_R9531
D1+_HDMI1
D0+_HDMI1
D1-_HDMI1
T0X1-83T0X1+84T0X2-85T0X2+86CVDD10_3
82
43
44
RESET_N
CI2CA_TPWR
C3271
0.1uF
16V
R3227
10K
+5V_NORMAL
R3226
47K
45
46
INT
DSDA047DSCL0
10K
R3283 4.7K
R3282
AVDD33_R9531
R3294
R3229
47K
D2+_HDMI1
D2-_HDMI1
DDC_SCL_1_R9531
DDC_SDA_1_R9531
Current Limit
IN
1
ZD3200
5V
GND
OPT
2
EN
3
10K
D2+_HDMI4_JACK
D2-_HDMI4_JACK
D1+_HDMI4_JACK
D1-_HDMI4_JACK
R3255
5.1
R3256 5.1
CK+_HDMI4_JACK
CK-_HDMI4_JACK
PWRMUX_OUT_SIL9617
I2C_SCL2
I2C_SDA2
HDMI_HPD_4_MHL
DDC_SCL_MHL
DDC_SDA_MHL
R3246
47K
R9531_XTAL_IN
DVDD10_R9531
CK-_HDMI1
CK+_HDMI1
TPVDD10
T0XC-78T0XC+79T0X0-80T0X0+81TDVDD10
76
77
XTALGND
75
XTALIN
74
XTALOUT
73
XTALVCC33
72
APLL10
71
RSVD_9
70
TX_HPD0
69
TX_DSCL0
68
TX_DSDA0
67
RSVDNC_27
66
RSVDNC_26
65
RSVD_8
64
RSVD_7
63
RSVD_6
62
RSVDNC_25
61
RSVD_5
60
RSVD_4
59
RSVD_3
58
RSVDNC_24
57
RSVD_2
56
RSVD_1
55
CSDA
54
CSCL
53
RSVDL_2
52
SBVCC5V
51
48
49
50
PWRMUX_OUT
R0PWR5V
CBUS_HPD0
VCC33_OUT
C3277
C3276
0.1uF
10uF
16V
10V
HDMI_HPD_1
R3254
10
R3253
C3275
5.1K
1uF
SPI FLASH (2MBit)
SPI_CS_R9531
R3275
SPI_DO_R9531
R9531_FLASH_WP
IC3207
TPS2553DBV
#MHL_OCP
33
R3249 10
5V_HDMI_1
DO[IO1]
OUT
6
ILIM
5
FAULT
4
D0+_HDMI4_JACK
D0-_HDMI4_JACK
C3213
10uF
+5V_NORMAL
C3267
18pF
50V
R3284
4.7K
R3285
4.7K
R3286
4.7K
R3287
4.7K
R3288
4.7K
R3290
4.7K
R3291
4.7K
R3292
4.7K
C3273
10uF
10V
IC3203
W25X20CLSNIG
CS
1
2
WP
3
GND
4
R3914
0
D3211
1%
20K
R3295
#MHL_OCP
TP3203
R3297
120K
X3201
27MHz
X-TAL_1
1
GND_13X-TAL_2
2
R9531_XTAL_IN
R9531_XTAL_OUT
XTAL_VCC33_R9531
APLL10_R9531
R3293 1.8K
R3296 1.8K
R3912 0
R3913 0
AVDD33_R9531
I2C_SDA2
I2C_SCL2
+5V_NORMAL
C3274
0.1uF
16V
+3.3V_NORMAL
VCC
8
HOLD
7
CLK
6
DIO[IO0]
5
5V_HDMI_4
30V
C3242
OPT
R3289
10uF
100K
10V
5V_HDMI_4
R3251
10
C3220
R3250
5.1K
1uF
10V
GND_2
4
C3270
18pF
50V
+5V_NORMAL
DDC_SDA_1
DDC_SCL_1
C3239
0.1uF
C3281
R3278
10K
0.1uF
SPI_CK_R9531
SPI_DI_R9531
BSD-14Y-UD-032-HD
2013.12.17
32 HDMI
R9531_XTAL_OUT
Page 33
SPDIF OUT
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPDIF_OUT
R3400
+3.3V_NORMAL
33
C3402
47pF
50V
VA3400
5.5V
OPT
ADUC 5S 02 0R5L
C3400
0.1uF
16V
JK3401
JSTIB15
VIN
A
VCC
B
GND
C
Fiber Optic
4
SHIELD
HP_LOUT
HP_ROUT
R3404
150
1/10W
5%
R3405
150
1/10W
5%
HP_DET
HP_OUT
R3409
100
1/16W
5%
+3.3V_NORMAL
R3406
10K
HP_OUT
VA3405
5.6V
JK3403
PEJ038-3B61
5 GND
4L
3 DETECT
1R
EAG61030015
COMPONENT 1 PHONE JACK
JK3400
PEJ038-3B6111
5 M5_GND
4 M4
3 M3_DETECT
1 M1
6 M6
EAG61030017
VA3401
5.6V
+3.3V_NORMAL
R3402
10K
OPT
C3401
18pF
R3407
100
1/16W
5%
COMP1_DET
COMP1_Y
COMP1_Pb
COMP1_Pr
CVBS 1 PHONE JACK
JK3402
PEJ038-3B611
5 M5_GND
4 M4
3 M3_DETECT
1 M1
6 M6
EAG61030016
VA3402
5.6V
VA3403
5.6V
VA3404
5.6V
+3.3V_NORMAL
R3403
330K
C3403
0.1uF
16V
for audio Hum noise (L)
C3405
0.01uF
25V
C3404
0.01uF
25V
R3408
100
1/16W
5%
AV1_CVBS_DET
COMP1/AV1/DVI_L_IN
COMP1/AV1/DVI_R_IN
AV1_CVBS_IN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
JACK HIGH/MID
BSD-14Y-UD-034-HD
2013.12.17
Page 34
UB85/95/UC97 only
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
HDMI0_DDC_DA
HDMI0_DDC_CK
TX0SDA
IC3302
D0+A
D0-A
D1+A
D1-A
D2+A
D2-A
D3+A
D3-A
NC_2
D0+B
D0-B
B1+B
B1-B
D2+B
D2-B
D3+B
D3-B
TX0SCL
SDA_B40SCL_B41SDA_A42SCL_A43[EP]GND
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
THERMAL
10
11
12
13
14
15
16
17
18
+3.3V_MUX
R3318
3.3K
VCC
1
EN
2
SCL
3
SDA
4
D0+
5
D0-
6
D1+
7
D1-
8
NC_1
9
D2+
D2D3+
D3HPD
CEC
SEL1
SEL2
TI 2:1 Mux
HDMI0_TX2P
HDMI0_TX2N
HDMI0_TX1P
HDMI0_TX1N
HDMI0_TX0P
From D13
HDMI0_TX0N
HDMI0_TXCP
HDMI0_TXCN
HDMI_0_RX2+
HDMI_0_RX2HDMI_0_RX1+
HDMI_0_RX1HDMI_0_RX0+
HDMI_0_RX0-
HDMI_0_CLK+
HDMI_0_CLK-
From MN864778
TS3DV642A0RUAR
CEC_A19HPD_A20CEC_B21HPD_B
Jitter Cleaning Repeater
PS8407_URSA9_0
ISET
+3.3V_PS8401
1K
OPT
R3354
HDMI_RX2+_URSA9_0_RP
HDMI_RX2-_URSA9_0_RP
HDMI_RX1+_URSA9_0_RP
HDMI_RX1-_URSA9_0_RP
HDMI_RX0+_URSA9_0_RP
HDMI_RX0-_URSA9_0_RP
HDMI_CLK+_URSA9_0_RP
HDMI_CLK-_URSA9_0_RP
I2C_CTL_EN
C3315
0.1uF
I2C_SCL2
I2C_SDA2
16V
0.1uF
IN_D2P
IN_D2N
HPD_SRC
IN_D1P
IN_D1N
IN_D0P
IN_D0N
I2C_CTL_EN
IN_CKP
IN_CKN
C3317
C3316
0.1uF
16V
+1.2V_PS8401
16V
[EP]GND
1
2
THERMAL
3
4
5
6
7
8
9
10
11
VDD33_112VDDRX_1
R3300
22
OPT
R3336
22
OPT
+1.2V_PS8401
+3.3V_PS8401
C3318
0.1uF
16V
41
IC3301
PS8401A
13
14
15
16
17
PRE
GND_1
EQ/I2C_ADDR0
DDCBUF/SDA_CTL
DCIN_EN/SCL_CTL
PRE
DDCBUF
DCIN_EN
EQ/I2CADDR_0
18
19
REXT
VDDRA
R3335
4.99K
1%
+1.2V_PS8401
+1.2V_PS8401
C3319
0.1uF
16V
VDDTX_232SCL_SNK33SDA_SNK34ISET35GND_236PD37VDD33_238SCL_SRC39SDA_SRC40VDDRX_2
31
30
29
28
27
26
25
24
23
22
21
20
VDDTX_1
C3320
0.1uF
16V
+1.2V_PS8401
OUT_D2P
OUT_D2N
HPD_SNK
OUT_D1P
OUT_D1N
OUT_D0P
OUT_D0N
CFG/I2C_ADDR1
OUT_CKP
OUT_CKN
HDMI_RX2+_URSA9_0
HDMI_RX2-_URSA9_0
HDMI_RX1+_URSA9_0
HDMI_RX1-_URSA9_0
HDMI_RX0+_URSA9_0
HDMI_RX0-_URSA9_0
CFG/I2C_ADDR1
HDMI_CLK+_URSA9_0
HDMI_CLK-_URSA9_0
C3322
0.1uF
16V
+5V_NORMAL
R3353
1K
HDMI OUTPUT to URSA9_0
Separation of +3.3_NORMAL (For CST)
OPT
R3500 33
OPT
R3501 33
HDMI_MUX_SEL
C3301
0.1uF
16V
+3.3V_NORMAL
OPT
R3502
10K
HDMI_RX2+_URSA9_0_RP
HDMI_RX2-_URSA9_0_RP
HDMI_RX1+_URSA9_0_RP
HDMI_RX1-_URSA9_0_RP
HDMI_RX0+_URSA9_0_RP
HDMI_RX0-_URSA9_0_RP
HDMI_CLK+_URSA9_0_RP
HDMI_CLK-_URSA9_0_RP
C3300
10uF
10V
OPT
R3503
10K
+3.3V_NORMAL
10K
R3319
1K
OPT
R3322
RXBSCL_URSA9
RXBSDA_URSA9
HDMI_RX2+_URSA9_1_RP
HDMI_RX2-_URSA9_1_RP
HDMI_RX1+_URSA9_1_RP
HDMI_RX1-_URSA9_1_RP
HDMI_RX0+_URSA9_1_RP
HDMI_RX0-_URSA9_1_RP
HDMI_CLK+_URSA9_1_RP
HDMI_CLK-_URSA9_1_RP
+3.3V_MUX
+3.3V_NORMAL
HDMI OUTPUT_0 DDC to URSA9
HDMI OUTPUT to Splitter
HDMI_1_RX2+
HDMI_1_RX2HDMI_1_RX1+
HDMI_1_RX1HDMI_1_RX0+
HDMI_1_RX0-
HDMI_1_CLK+
HDMI_1_CLK-
BLM18PG121SN1D
C3314
22uF
10V
L13413
+3.3V_MUX
HDMI1_TX2P
HDMI1_TX2N
HDMI1_TX1P
HDMI1_TX1N
HDMI1_TX0P
HDMI1_TX0N
HDMI1_TXCP
HDMI1_TXCN
PS8407_URSA9_1
ISET
+3.3V_PS8401
+1.2V_PS8401
OPT
[EP]GND
1
2
3
4
5
6
7
8
9
10
THERMAL
41
11
13
VDD33_112VDDRX_1
DCIN_EN/SCL_CTL
DCIN_EN
+3.3V_PS8401
+1.2V_PS8401
C3328
0.1uF
16V
IC3303
PS8401A
14
15
16
17
PRE
GND_1
EQ/I2C_ADDR0
DDCBUF/SDA_CTL
PRE
DDCBUF
EQ/I2CADDR_0
I2C_CTL_EN
C3307
0.1uF
I2C_SCL2
I2C_SDA2
C3327
0.1uF
16V
IN_D2P
IN_D2N
HPD_SRC
IN_D1P
IN_D1N
IN_D0P
IN_D0N
I2C_CTL_EN
IN_CKP
IN_CKN
C3308
0.1uF
16V
16V
R3331
22
R3332
22
OPT
TS3DV642A0RUAR
+1.2V_PS8401
VDDTX_232SCL_SNK33SDA_SNK34ISET35GND_236PD37VDD33_238SCL_SRC39SDA_SRC40VDDRX_2
31
30
29
28
27
26
25
24
23
22
21
18
19
20
REXT
VDDRA
VDDTX_1
R3333
4.99K
1%
C3330
0.1uF
+1.2V_PS8401
+1.2V_PS8401
C3329
0.1uF
16V
OUT_D2P
OUT_D2N
HPD_SNK
OUT_D1P
OUT_D1N
OUT_D0P
OUT_D0N
CFG/I2C_ADDR1
OUT_CKP
OUT_CKN
16V
IC3501
D0+A
38
D0-A
37
D1+A
36
D1-A
35
D2+A
34
D2-A
33
D3+A
32
D3-A
31
NC_2
30
D0+B
29
D0-B
28
B1+B
27
B1-B
26
D2+B
25
D2-B
24
D3+B
23
D3-B
22
HDMI_RX2+_URSA9_1
HDMI_RX2-_URSA9_1
HDMI_RX1+_URSA9_1
HDMI_RX1-_URSA9_1
HDMI_RX0+_URSA9_1
HDMI_RX0-_URSA9_1
CFG/I2C_ADDR1
HDMI_CLK+_URSA9_1
HDMI_CLK-_URSA9_1
TX1SDA
TX1SCL
SDA_B40SCL_B41SDA_A42SCL_A43[EP]GND
39
THERMAL
10
11
12
13
14
15
16
17
18
CEC_A19HPD_A20CEC_B21HPD_B
R3334
HDMI OUTPUT to URSA9_1
C3332
0.1uF
16V
1
2
3
4
5
6
7
8
9
+5V_NORMAL
1K
HDMI1_DDC_DA
HDMI1_DDC_CK
+3.3V_MUX
VCC
EN
SCL
SDA
D0+
D0D1+
D1NC_1
D2+
D2D3+
D3HPD
CEC
SEL1
SEL2
C3503
C3502
10uF
0.1uF
10V
16V
R3505
3.3K
HDMI_RX2+_URSA9_1_RP
HDMI_RX2-_URSA9_1_RP
HDMI_RX1+_URSA9_1_RP
HDMI_RX1-_URSA9_1_RP
HDMI_RX0+_URSA9_1_RP
HDMI_RX0-_URSA9_1_RP
HDMI_CLK+_URSA9_1_RP
HDMI_CLK-_URSA9_1_RP
+3.3V_NORMAL
HDMI_MUX_SEL
SEL2(GPIO30) Function
Low CH A (HEVC decoder) enable
High CH B (HDMI S/W) enable
I2C_CTL_EN
DDCBUF
DCIN_EN
EQ/I2CADDR_0
PRE
ISET
CFG/I2C_ADDR1
+3.3V_NORMAL
R3509
10K
+3.3V_NORMAL
C3302
10uF
10V
+3.3V_MUX
OPT
R3504 33
OPT
R3506 33
R3323
4.7K
R3324
4.7K
+3.3V_NORMAL
HDMI OUTPUT_1 DDC to URSA9
OPT
OPT
R3507
R3508
10K
10K
HDMI OUTPUT to URSA9_1
R3325
R3327
4.7K
4.7K
OPT
OPT
R3328
R3326
4.7K
4.7K
OPT
IC3304
AZ1117EH-1.2TRG1
IN
L3301
120-ohm
3
+3.3V_PS8401
1
ADJ/GND
C3323
0.1uF
2
RXASCL_URSA9
RXASDA_URSA9
R3329
4.7K
OPT
R3330
4.7K
OUT
+1.2V
+3.3V_PS8401
R3346
4.7K
OPT
R3347
4.7K
R3352
1
C3325
10uF
10V
L3302
120-ohm
R3348
4.7K
OPT
R3349
4.7K
+1.2V
C3326
10uF
10V
+1.2V_PS8401
C3324
0.1uF
R3350
4.7K
R3351
4.7K
USB NET Change: UB85/95/UC97
R4419
0
330pF
330pF
C3342
C3343
R4418
R4421
R4420
USB_DP2
0
0
USB_DP3
0
USB_DM3
4Layer
330pF
330pF
330pF
330pF
330pF
C3352
330pF
C3353
330pF
C3346
C3347
C3349
330pF
C3350
HUB_DP
HUB_DM USB_DM2
CAMERA_DP
CAMERA_DM
VDDC15_M0
C3303
VDDC15_M1
C3304
OPT
H13 DDR VDD Decap (For EMI)
330pF
330pF
330pF
C3334
C3313
C3309
330pF
330pF
330pF
C3310
C3335
C3321
330pF
C3338
330pF
C3339
EMI Shield for H13D / URSA9
H13D
EMI shield for H13D
MGJ63912901
VDDC15_D14
C3305
D14 DDR VDD Decap (For EMI)
330pF
330pF
330pF
OPT
OPT
OPT
C3331
C3311
C3336
330pF
330pF
330pF
330pF
OPT
OPT
OPT
OPT
C3340
C3348
C3344
M2322
C3351
4Layer
330pF
OPT
URSA9
EMI shield for URSA9
MGJ64103501
+1.5V_U_DDR
URSA9 DDR VDD Decap (For EMI)
330pF
330pF
330pF
C3333
C3306
C3312
M2323
C3337
330pF
C3341
330pF
4Layer
330pF
C3345
10.5T SMD bottom for ESD_UB85
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2300
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2301
MDS62110225
OPT
GASKET_8.0X6.0X10.5H
M2304
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2302
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2303
MDS62110225
OPT
GASKET_8.0X6.0X10.5H
M2309
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2305
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2306
MDS62110225
OPT
GASKET_8.0X6.0X10.5H
M2310
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2308
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2311
MDS62110225
OPT
GASKET_8.0X6.0X10.5H
M2317
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2312
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2313
MDS62110225
OPT
GASKET_8.0X6.0X10.5H
M2320
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2315
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2316
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2318
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2319
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X10.5H
M2321
MDS62110225
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X9.5H
MDS62110214
SMD_GASKET_for_ESD_UB85
GASKET_8.0X6.0X9.5H
MDS62110214
9.5T Center of B/D
M2307
M2314
8.5T SMD bottom for ESD_UB95
2.5V
ZD3300
OPT
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2300-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2301-*1
MDS62110209
OPT
GASKET_8.0X6.0X8.5H
M2304-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2302-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2303-*1
MDS62110209
OPT
GASKET_8.0X6.0X8.5H
M2309-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2306-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2307-*1
MDS62110209
OPT
GASKET_8.0X6.0X8.5H
M2310-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2308-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2311-*1
MDS62110209
OPT
GASKET_8.0X6.0X8.5H
M2317-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2312-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2313-*1
MDS62110209
OPT
GASKET_8.0X6.0X8.5H
M2320-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2314-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2315-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2318-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2319-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X8.5H
M2321-*1
MDS62110209
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X7.5H
MDS62110205
SMD_GASKET_for_ESD_UB95
GASKET_8.0X6.0X7.5H
MDS62110205
7.5T Center of B/D
M2305-*1
M2316-*1
+3.3V_NORMAL
L2305
BLM18PG121SN1D
Placed on SMD-TOP
C2304
10uF
16V
C2325
10uF
16V
+12V
C2326
0.1uF
16V
OPT
PGND
VIN
AGND
FB
IC2301
BD86106EFJ
1
2
3
4
6A
[EP]
SW_2
8
SW_1
9
7
THERMAL
EN
6
COMP
5
Vout=0.8*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R2308
6.8K
C2328
0.1uF
16V
C2332
0.0068uF
50V
R2311
10K
L2309
2uH
POWER_ON/OFF2_1
C2319
10uF
10V
C2323
6.3V
100uF
MAX A
C2345
47pF
50V
OPT
R2320
R2323
R2319
30K
10K
1.5K
1/16W
1%
1%
1%
R1
R2
+3.3V_NORMAL
5V
ZD2301
OPT
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2300-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2305-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
GASKET_8.0X6.0X10.5H
M2301-*2
MDS62110225
SMD_GASKET_for_ESD_UC97
GASKET_8.0X6.0X10.5H
M2302-*2
MDS62110225
10.5T/6T/5.5T SMD bottom for ESD_UC97
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2306-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2307-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
GASKET_8.0X6.0X10.5H
M2303-*2
MDS62110225
SMD_GASKET_for_ESD_UC97
GASKET_8.0X6.0X10.5H
M2312-*2
MDS62110225
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2308-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2311-*2
MDS62110206
10.5T 5.5T OPT 6T OPT
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2313-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2314-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2315-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2316-*2
MDS62110206
OPT
GASKET_8.0X6.0X5.5H
M2304-*2
MDS62110204
OPT
GASKET_8.0X6.0X5.5H
M2317-*2
MDS62110204
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2318-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2319-*2
MDS62110206
OPT
SMR-T-6-6.5-8
M2309-*2
MDS62110206
OPT
SMR-T-6-6.5-8
M2310-*2
MDS62110206
SMD_GASKET_for_ESD_UC97
SMR-T-6-6.5-8
M2321-*2
MDS62110206
OPT
SMR-T-6-6.5-8
M2320-*2
MDS62110206
HDMI
6T
BSD-14Y-UD-033_02-HD
2013.12.17
Page 35
UB85/95/UC97 only
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Place Near Micom
LOGO_LIGHT
+3.5V_ST
10K
R4003
10K
LOGO_LIGHT
OPT
R4000
C4000
0.1uF
16V
LOGO_LIGHT
1K
R4004
LOGO_LIGHT
C
B
E
M_RFModule_RESET
WOL/WIFI_POWER_ON
EYE_SDA
EYE_SCL
LOGO_LIGHT_WAFER
LOGO_LIGHT
AR4000
33
1/16W
Q4000
MMBT3904(NXP)
LOGO_LIGHT
IR
LED_R
R4010
100
R4011
100
LOGO_LIGHT_WAFER
+3.5V_ST
R4005
10K
5%
NON_LOGO_LIGHT
R4015
1.8K
LOGO_LIGHT
R4012
0
C4003
0.1uF
C4004
0.1uF
C4007
100pF
P4000
+3.5V_ST
5%
R4009
10K
5%
+3.5V_WOL
R4006
R4007
100
KEY1
100
KEY2
SMAW200-H18S5
C4010
C4005
3300pF
OPT
+3.5V_ST
0.1uF
Place Near Wafer
C4016
5pF
50V
D4004
5.5V
5.5V
OPT
GND
NC
WOL
SDA
SCL
GND
IR
1
3
5
7
9
11
13
15
17
19
R4001
100
R4002
100 C4015
50V
5.5V
OPT
OPT
C4009
0.1uF
16V
D4001
5.5V
OPT
BT_RESET
LED_R
D4002
2
4
6
8
10
12
14
16
18
GND
+3.5V_WOL
USB_DM
USB_DP
GND
GND
KEY1
KEY2
+3.5V_ST
GND
5.5V
OPT
D4000
RCLAMP0502BA
C4008
1000pF
50V
D4003
OPT
BLM18PG121SN1D
C4006
22uF
10V
5pF
50V
C4001
0.1uF
D4005
OPT
OPT
L4000
WIFI_DM
WIFI_DP
C4002
0.1uF
OPT
120-ohm
R4008
10K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
IR / KEY
BSD-14Y-UD-040_02-HD
2013.12.17
Page 36
/USB_OCD1
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
USB_CTL1
R4400
10K
+3.3V_NORMAL
R4401
4.7K
OCP USB1
+5V_NORMAL
C4401
0.1uF
16V
VIN
GND
C4416
22uF
10V
+5V_USB_3
C4310
10uF
10V
ZD4302
5V
USB2 (2.0)
MAX 1.0A
D4300
RCLAMP0502BA
OPT
RCLAMP0502BA
D4300-*1
RCLAMP0582B
RCLAMP0582B
3AU04S-3 85- ZC- (LG).
JK4300
1 2 3 4
USB DOWN STREAM
5
+5V_USB_2
+5V_USB_1
IC4400
BD2242G
1
2
EN
3
VOUT
6
ILIM
5
OC
4
1%
14K
R4402
+3.3V_NORMAL
R4410
4.7K
OPT
R4412
4.7K
OPT
R4414
4.7K
OPT
R4416
4.7K
OPT
USB_DM2
USB_DP2
C4414
22uF
10V
C4322
10uF
10V
USB3 (2.0)
MAX 1.0A
ZD4300
5V
RCLAMP0502BA
RCLAMP0502BA
D4302-*1
RCLAMP0582B
D4302
OPT
3AU04S-3 85- ZC- (LG).
RCLAMP0582B
JK4302
1 2 3 4
USB DOWN STREAM
5
USB_DM3
USB_DP3
+3.3V_NORMAL
C4400
1uF
USB3.0 redriver IC EQ setting
-> EQ2: Low / DE1: Low
USB3_TX0P
USB3_TX0M
USB3_RX0P
C4403
1uF
C4404
0.1uF
USB3_RX0M
C4405
0.01uF
+3.3V_NORMAL
C4406
1uF
C4407
0.1uF
C4408
1uF
C4409
0.1uF
HOST_RX1-
HOST_RX1+
GND_2
HOST_TX2-
HOST_TX2+
NC_6
[EP]GND
C4410
0.1uF
EN_RXD
NC_5
18
19
20
21
22
23
THERMAL
24
1
NC_1
NC_2
+3.3V_NORMAL
C4411
0.01uF
17
25
2
OS1
16
IC4402
3
VCC_1
DE1
DE2
+3.3V_NORMAL
VCC_2
EQ1
13
14
15
12
NC_4
11
DEVICE_TX1-
10
DEVICE_TX1+
9
GND_1
8
5
6
NC_3
DEVICE_RX2-
7
DEVICE_RX2+
SN65LVPE502A
4
EQ2
+3.3V_NORMAL
OPT
R4406
R4404
4.7K
R4407
R4405
4.7K
4.7K
OPT
4.7K
0.1uF
C4412
OPT
R4411
4.7K
C4413
0.1uF
R4413
4.7K
OPT
R4415
4.7K
OPT
R4417
4.7K
OPT
USB3_DM
USB3_DP
D4400
RCLAMP0502BA
RCLAMP0502BA
C4415
22uF
10V
OPT
D4401
RCLAMP0502BA
RCLAMP0502BA
ZD4301
C4402
10uF
10V
D4402
RCLAMP0502BA
RCLAMP0502BA
5V
+5V_USB_1
OPT
D4400-*1
RCLAMP0582B
RCLAMP0582B
USB1 (3.0)
MAX 1.2A
STDA_SSRX-
STDA_SSRX+
GND_DRAIN
STDA_SSTX-
STDA_SSTX+
D4401-*1
RCLAMP0582B
RCLAMP0582B
D4402-*1
RCLAMP0582B
RCLAMP0582B
PC2R009NJA1.
VBUS
D-
D+
GND
SHIELD
JK4400
1
2
3
4
5
6
7
8
9
10
Place under DUT Near SN65LVPE502CP PIN VCC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-044-HD
2013-12-17
USB JACK
Page 37
Full Scart(18 Pin Gender)
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
VA4801
5.6V
EU
VA4807
VA4800
20V
EU
5.5V
EU
VA4808
5.5V
OPT
VA4803
5.5V
VA4804
5.5V
EU
VA4805
5.5V
EU
VA4802
5.6V
EU
19
DA1R018H91E
JK4800
EU
SHIELD
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
AV_DET
COM_GND
SYNC_IN
SYNC_OUT
SYNC_GND
RGB_IO
R_OUT
R_GND
G_OUT
G_GND
ID
B_OUT
AUDIO_L_IN
B_GND
AUDIO_GND
AUDIO_L_OUT
AUDIO_R_IN
AUDIO_R_OUT
+3.3V_NORMAL
EU
R4801
CLOSE TO JUNCTION
10K
EU
R4802
100
1/16W
EU
5%
C4804
0.1uF
SC_CVBS_IN
R4800 75
EU
EU
VA4809
5.6V
EU
SC_FB
SC_R
SC_G
SC_B
SC_L_IN
SC_DET
DTV/MNT_V_OUT
SC_ID
VA4806
5.6V
EU
BLM18PG121SN1D
EU
EU
C4800
1000pF
50V
BLM18PG121SN1D
EU
EU
C4801
1000pF
50V
L4800
L4801
C4802
4700pF
EU
C4803
4700pF
EU
SC_R_IN
DTV/MNT_L_OUT
DTV/MNT_R_OUT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-048-HD
2013.12.17
SCART GENDER
Page 38
Ethernet Block
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LAN_JACK_POWER
JK5100
BS-R570098
LAN_UDE
12
SHIELD
10
11
D1
D2
D3
D4
1
2
3
4
5
6
7
8
9
P1[CT]
P2[TD+]
P3[TD-]
P4[RD+]
P5[RD-]
P6[CT]
P7
P8
9
P10[GND]
P11
YL_C
YL_A
GN_C
GN_A
R5100
0
C5100
C5101
0.1uF
0.01uF
16V
50V
VA5100
5.5V
EMI
C5102
0.1uF
16V
VA5101
5.5V
C5103
0.01uF
50V
VA5102
5.5V
VA5103
5.5V
EPHY_TDP
EPHY_TDN
EPHY_RDP
EPHY_RDN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
JK5100-*1
TLA-6T764
LAN_TDK
R1
1
R2
2
R3
3
R4
4
R5
5
R6
6
R7
7
R8
8
R9
9
R10[GND]
10
R11
11
YL_C
D1
YL_A
D2
GN_C
D3
GN_A
D4
12
SHIELD
BSD-14Y-UD-051-HD
LAN_VERTICAL
2012.12.17
51
Page 39
Ethernet Block
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.5V_WOL
3.3K
+3.5V_WOL
C5200
4.7uF
5V
10V
ZD5201
OPT
Place 0.1uF close to each power pins
C5201
0.1uF
16V
EPHY_RDP
EPHY_RDN
EPHY_TDP
EPHY_TDN
LAN_JACK_POWER
C5203
0.1uF
16V
Route Single 50 Ohm, Differential 100 Ohm
ET_COL/SNI
Place this cap. near IC
C5205
Place this Res. near IC
0.1uF
16V
+3.5V_WOL
R5203
3.3K
C5206
8pF
50V
R5204
2.49K 1%
GND_1
1
2
4
3
XTAL_2
C5207
8pF
50V
AVDD10OUT
+3.5V_WOL
XTAL_1
X5200
25MHz
GND_2
RSET
MDI+[0]
MDI-[0]
MDI+[1]
MDI-[1]
AVDD33_1
RXDV
3.3K
R5200
R5202 1M
OPT
[EP]
1
2
3
4
5
6
7
8
Place this cap. near IC
C5208
0.1uF
16V
+3.5V_WOL
R5218
0
DVDD10OUT
AVDD33_2
CKXTAL1
CKXTAL2
29
30
31
32
THERMAL
33
IC5200
RTL8201F-VB-CG
9
11
12
13
RXD[2]/INTB
AR5200
33
R5201 33
EPHY_INT
EPHY_RXD1
EPHY_RXD0
RXC
RXD[3]/CLK_CTL
OPT
3.3K
R5208
RXD[0]10RXD[1]
ET_RXER
ET_COL/SNI
COL28RXER/FXEN
27
14
DVDD33
C5209
33pF
EPHY_CRS_DV
EPHY_ACTIVITY
R5210 33
LED1/PHYAD[1]
CRS/CRS_DV
25
26
15
16
TXC
TXD[0]
R5209
51
C5202
Place near IC
5pF
LED0/PHYAD[0]/PMEB
24
MDIO
23
MDC
22
PHYRSTB
21
TXEN
20
TXD[3]
19
TXD[2]
18
TXD[1]
17
+3.5V_WOL
C5211
0.1uF
16V
EPHY_TXD0
R5215
3.3K
R5217
EPHY_EN
EPHY_TXD1
R5205
+3.5V_WOL
3.3K
R5212
1.5K
1/16W
EPHY_ACTIVITY
ET_RXER
1%
R5219
10K
1/16W
C5212
0.1uF
OPT
5%
WOL/ETH_POWER_ON
EPHY_MDIO
EPHY_MDC
/RST_PHY
(from SOC)
WOL POWER ENABLE CONTROL
+3.5V_ST
C5204
0.1uF
WOL_CTL
R5211 33
R5213
10K
OPT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
IN
EN
AP2191WG-7
5
4
IC5201
+3.5V_WOL
OUT
1
GND
2
FLG
3
EPHY_REFCLK
BSD-14Y-UD-052-HD
2013-12-17
ETHERNET
Page 40
AUD_OUT >> EU/CHINA_HOTEL_OPT
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
DTV/MNT_L_OUT
C6000
1uF
25V
EU
OPT
C6002
6800pF
EU
R6000 2.2K
R6002
OPT
470K
SCART_AMP_L_FB
SCART_Lout
33pF
+12V
EU
IC6000
AZ4580MTR-E1
EU
VCC
8
OUT2
7
IN2-
6
IN2+
5
OUT1
EU
R6004 33K
C6003
EU
IN1-
IN1+
1
2
3
VEE
4
L6000
EU
C6004
0.1uF
50V
SIGN60000003
EU
R6008 33K
C6005
EU
33pF
SCART_AMP_R_FB
SCART_Rout
OPT
R6010
470K
R6011
OPT
C6007
6800pF
2.2K
EU
C6008
1uF
25V
EU
DTV/MNT_R_OUT
[SCART AUDIO MUTE]
DTV/MNT_L_OUT
Q6000
MMBT3904(NXP)
DTV/MNT_R_OUT
Q6001
MMBT3904(NXP)
C
E
C
E
EU
R6013
1K
B
EU
EU
R6014
1K
B
EU
EU_SCART_MUTE_ISAHAYA
Q6002
RT1P141C-T112
E
C
B
SCART_MUTE
PDTA114ET
Q6002-*1
E
C
B
EU_SCART_MUTE_NXP
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SCART AUDIO AMP
BSD-14Y-UD-060-HD
2012.12.17
60
Page 41
EARPHONE AMP
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
HP_OUT_H13
C6104-*1
18pF
IC6100
TPA6138A2
HP_OUT_H13
C6109-*1
18pF
HP_ROUT_MAIN
HP_OUT_H13
R6103-*1
43K
1%
C6100
1uF
10V
HP_OUT
HP_ROUT_AMP
SIDE_HP_MUTE
HP_OUT
R6100
10K
C6104
180pF
R6103
33K
HP_OUT_MTK
HP_OUT_MTK
HP_OUT
R6106
43K
+3.3V_NORMAL
4.7K
R6105
HP_OUT
+INR
1
C6108
10pF
50V
C6102
1uF
10V
-INR
OUTR
GND_1
MUTE
VSS
2
3
4
5
6
CN
7
HP_OUT
HP_OUT
1%
HP_OUT
C6103
1uF
10V
+INL
14
-INL
13
12
11
10
HP_OUT
OUTL
UVP
GND_2
VDD
9
CP
8
C6106
10pF
50V
HP_OUT_MTK
HP_OUT
R6104
43K
1%
+3.3V_NORMAL
HP_OUT
HP_OUT
C6109
180pF
R6102
33K
HP_OUT_MTK
L6100
120-ohm
BLM18PG1 21S N1D
HP_OUT
C6105
1uF
10V
C6107
0.1uF
16V
HP_OUT
R6101
10K
C6101
1uF
10V
HP_OUT
HP_LOUT_AMP
HP_LOUT_MAIN
HP_OUT_H13
R6102-*1
43K
1%
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HEADPHONE AMP
BSD-14Y-UD-061-HD
2013.12.17
61
Page 42
B-CAS (SMART CARD) INTERFACE
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
JAPAN
R6300 22
+3.3V_NORMAL
2.7K
R6303
R6301
JAPAN
OPT
R6304
R6302
OPT
2.7K
JAPAN
R6305
R6306
CLKDIV1 CLKDIV2 : F_CRD_CLK
2.7K
---------------------------- 1 0 CLKIN
JAPAN
+5V_NORMAL
OPT
BLM18PG121SN1D
JAPAN
C6300
0.1uF
16V
JAPAN
L6300
SIGN63000018
JAPAN
C6301
10uF
10V
C6302
0.1uF
INT CMDVCC : STATUS
+3.3V_NORMAL
IC6300
TDA8024TT
CLKDIV1
1
CLKDIV2
2
5V/3V
3
PGND
4
S2
5
VDDP
PRES
PRES
AUX2
AUX1
CGND
6
S1
7
VUP
I/O
JAPAN
8
9
10
11
12
13
14
JAPAN
C6303
0.1uF
16V
JAPAN
16V
AUX2UC
28
AUX1UC
27
I/OUC
26
XTAL2
25
XTAL1
24
OFF
23
GND
22
VDD
21
RSTIN
20
CMDVCC
19
PORADJ
18
VCC
17
RST
16
CLK
15
C6304
0.1uF
JAPAN
16V
JAPAN
R6307 22
JAPAN
R6308 22
JAPAN
R6309 22
JAPAN
R6310 22
JAPAN
R6311 22
Place CLK C3 far from C2,C7,C4 and C8
75 ohm in I/O is for short circuit Protection
OPT
JAPAN
R6317
1.2K
L6301
JAPAN
BLM18PG121SN1D
JAPAN
C6305
0.1uF
16V
JAPAN
JAPAN
R6318
1.2K
R6315
JAPAN
C6306
0.1uF
16V
+3.3V_NORMAL
10K
R6312
1.2K
JAPAN
R6313
75
OPT
R6319
1.2K
JAPAN
R6316
1.2K
+3.3V_NORMAL
JAPAN
C6307
0.33uF
16V
JAPAN
R6314
1K
ZD6300
5V
JAPAN
SMARTCARD_DATA/SD_EMMC_CLK
SMARTCARD_CLK/SD_EMMC_DATA[0]
SMARTCARD_DET/SD_EMMC_DATA[3]
SMARTCARD_RST/SD_EMMC_DATA[2]
B-CAS SLOT
P6300
10057542-1311FLF(B CAS Slot)
VCC
C1
RST
C2
CLK
C3
RESERVED_1
C4
GND
C5
JAPAN
VPP
C6
I/O
C7
RESERVED
C8
SW1
S1
SW2
S2
ZD6301
5V
JAPAN
-------------------------------- HIGH HIGH CARD PRESENT
LOW HIGH CARD not PRESENT
SMARTCARD_VCC/SD_EMMC_CMD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
JAPAN_BCAS
BSD-14Y-UD-063-HD
2012.12.17
63
Page 43
1
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2
+3.3V_LNA_TU
RF_SWITCH_CTL_TU
L6500
BLM18PG121SN1D
C6519
0.1uF
TU_M/W_TW/BR/CO/CN
+3.3V_TU
close to TUNER
TU_M/W_TW/BR/CO/CN
R6502
C6502
10K
0.1uF
1K
R6504
TU_M/W_TW/BR/CO/CN
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
RF_SWITCH_CTL
Ground Width >= 24mils
FE_DEMOD1_2_TS_DATA[0]
FE_DEMOD1_TS_DATA[7]
Global F/E Option Name
1. TU
2. Tuner Name = TDS’S’,TDS’Q’...
3. Country Name = T,T2,S2,KR,US,BR ...
Example of Option name
TU_Q_T2 = apply TDSQ type tuner and T2 country
TU_M/W = apply TDSM&TDSW Type Tuner
13’ Tuner Type for Global
TDS’S’-G501D : T/C Half NIM Horizontal Type
TDS’Q’-G501D : T/C/S2 Combo Horizontal type
TDS’Q’-G601D : T2/C/S2 Combo Horizontal Type
TDS’Q’-G651D : T2/C/S2 Combo Vertical Type
TDS’M’-C601D : China NIM with Isolater Type
TDS’W’-J551F : Japan Dual NIM
TDS’W’-B651F : Brazil 2Tuner
TDS’W’-A651F : Taiwan 2Tuner
TDS’W’-K651F : Colombia DVB-T2 2Tuner
FE_DEMOD1_2_TS_CLK
R6511 0
TU_W_AJ
R6521 0
TU_W_Non_AJ
3
4
5
6
7
8
9
11
FE_DEMOD1_TS_ERROR
12
FE_DEMOD1_1_TS_CLK
14
FE_DEMOD1_TS_SYNC
15
FE_DEMOD1_TS_VAL
16
FE_DEMOD1_1_TS_DATA[0]
17
FE_DEMOD1_TS_DATA[1]
18
FE_DEMOD1_TS_DATA[2]
19
FE_DEMOD1_TS_DATA[3]
20
FE_DEMOD1_TS_DATA[4]
21
FE_DEMOD1_TS_DATA[5]
22
FE_DEMOD1_TS_DATA[6]
23
FE_DEMOD1_TS_DATA[7]
24
25
26
/TU_RESET1_TU
+3.3V_DEMOD_TU
27
28
D_Demod_Core
29
30
31
FE_DEMOD2_TS_ERROR
34
FE_DEMOD2_TS_SYNC
36
FE_DEMOD2_TS_CLK_TU
37
38
FE_DEMOD2_TS_VAL
39
FE_DEMOD2_TS_DATA
40
45
/TU_RESET2_TU
IF_AGC_TU
I2C_SCL6_TU
I2C_SDA6_TU
IF_P_TU
IF_N_TU
TU_CVBS_TU
TU_SIF_TU
+3.3V_TUNER
I2C_SCL4_TU
LNB_TX
I2C_SDA4_TU
LNB_OUT
+2.5V_DEMOD
TU_ALL_IntDemod
R6516 10
TU_ALL_IntDemod
TU_M
R6514 0
R6512 0
TU_W
R6513 0
TU_M // W_AJ
TU_ALL_IntDemod
C6500
close to Tuner
0.1uF
16V
C6501
15pF
50V
OPT
should be guarded by ground,Match GND VIA
R6517 10
R6522 0
TU_Non_BR/TW
C6503
15pF
TU_Non_BR/TW
50V
OPT
TU_ALL_2178B
R6518 0
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]
C6504
0.1uF
LNB_TX
TU_M/W
FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_DATA
R6503
TU_ALL_IntDemod
R6515 33
R6510 33
R6518-*1
150
TU_H/M_KR/US/TW/BR/EU
L6505
BLM18PG121SN1D
TU_M/W
C6507
16V
0.1uF
TU_W
100
TU_SIF
BLM18PG121SN1D
C6518
0.1uF
TU_JP
R6501
100
TU_W
R6515-*1
200
I2C_SCL6
TU_H/W/W_KR/US/BR/TW
R6510-*1
I2C_SDA6
200
TU_H/W/W_KR/US/BR/TW
IF_P
IF_N
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1-7]
Demod_Core
C6520
C6521
0.1uF
18pF
LNB
LNB
+2.5V_Normal
L6506
TU_JP
/TU_RESET2
C6512
15pF
50V
OPT
TU_M/W
R6520
33
LNB_OUT
IF_AGC
BLM18PG121SN1D
C6509
0.1uF
TU_M/W
I2C_SCL4
C6511
15pF
50V
OPT
TU_M/W
R6519
33
TU_M/W
L6501
BLM18PG121SN1D
C6510
0.1uF
TU_M/W
I2C_SDA4
TU_ALL_2178B
+3.3V_TU
L6503
TU_M/W
C6516
0.1uF
16V
TU_ALL_2178B
+3.3V_TU
+3.3V_TU
L6504
TU_ALL_2178B
BLM18PG121SN1D
R6505
200
E
B
MMBT3906(NXP)
C
TU_M/W_NonBr
C6505
16V
0.1uF
TU_M/W_NonBr
R6506
200
TU_ALL_2178B
Q6500
R6500
100
1608 perallel
because of derating
TU_ALL_2178B
TU_CVBS
/TU_RESET1
+3.3V_NORMAL
TU_M/W
C6517
0.1uF
16V
+5V_NORMAL
TU_M/W
C6508
1uF
TU_M/W
C6513
0.1uF
+3.3V_NORMAL
L6502
C6506
22uF
10V
85C
AP2132MP-2.5TRG1
PG
TU_M/W
EN
R6507
10K
VIN
VCTRL
BLM18PG121SN1D
C6515
0.1uF
16V
TU_M/W
IC6500
1
9
2
THERMAL
3
4
2A
EAN61387601
+3.3V_TU
8
7
6
5
Vout=0.6*(1+R1/R2)
[EP]
GND
ADJ
VOUT
NC
T2 : Max 1.7A
else : Max 0.7A
R6508
10K
1/16W
1%
R2
TU_M/W_1.2V
R1
R6509
10K
1/16W
1%
TU_M/W_1.2V
Demod_Core
R6508-*1
18K
TU_M/W_1.1V
R6509-*1
16K
TU_M/W_1.1V
TU_M/W
C6514
10uF
10V
1/16W
1/16W
1%
1%
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TUNER
BSD-14Y-UD-065-HD
2013.12.17
65
Page 44
TDJW_A151D
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
TU6800
TDJW-A151D
TU_TDJW
TU6700
TDJW-J251F
TDJM_G251D
TU6707
TDJM-G251D
TDJM_H151F
TU6701
TDJM-H151F
TDJH_H251F
TU6703
TDJH-H251F
B1[+3.3V]
1
NC_1
2
NC_2
3
SCL_RF
4
SDA_RF
5
NC_3
6
NC_4
7
M_SIF
8
M_CVBS
9
NC_5
10
B2[+3.3V]
11
NC_6
12
GROUND_1
13
M_RESET_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.2V]
28
NC_7
29
SDA_DEMOD
30
NC_8
33
M_ERROR
34
GROUND_2
35
M_SYNC
36
M_MCLK
37
NC_9
38
M_VALID
39
M_DATA
40
S_ERROR
41
S_SYNC
42
S_MCLK
43
S_VALID
44
S_RESET_DEMOD
45
S_DATA_7
46
S_DATA_0
47
S_DATA_1
48
S_DATA_2
49
S_DATA_3
50
S_DATA_4
51
S_DATA_5
52
S_DATA_6
53
A1
A1
B1
B1
FE_DEMOD1_1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
TU_GND_A
A1
A1
47
SHIELD
B1[+3.3V]
1
NC_1
2
NC_2
3
SCL_RF
4
SDA_RF
5
NC_3
6
NC_4
7
NC_5
8
NC_6
9
NC_7
10
B2[+3.3V]
11
NC_8
12
GND_1
13
M_RESET_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.2V]
28
NC_9
29
SDA_DEMOD
30
LNB
31
GND_2
32
NC_10
33
M_ERROR
34
GND_3
35
M_SYNC
36
M_MCLK
37
B5[+2.5V]
38
M_VALID
39
M_DATA
40
S_ERROR
41
S_SYNC
42
S_MCLK
43
S_VALID
44
S_RESET_DEMOD
45
S_DATA
46
B1
B1
TU_GND_B
FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_CLK_TU
+2.5V_DEMOD
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_DATA
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_SYNC
FE_DEMOD1_2_TS_CLK
FE_DEMOD1_TS_VAL
/TU_RESET2_TU
FE_DEMOD1_2_TS_DATA[0]
C6702
1000pF
630V
TU_M_EU
A1
A1
TU_GND_A
C6700
1000pF
630V
C6700-*1
3300pF
630V
TU_M/W_CN/HK/TW/BR/EU_1000pF
TU_M/W_CN/HK/TW/BR/EU_3300pF
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
B1
47
SHIELD
R6702 0 TU_H/M_KR/US/JP/EU
B1[+3.3V]
1
NC_1
2
NC_2
3
SCL_RF
4
SDA_RF
5
NC_3
6
NC_4
7
SIF
8
CVBS
9
NC_5
B2[+3.3V]
ERROR
GND_1
MCLK
SYNC
VAILD
D0
D1
D2
D3
D4
D5
D6
D7
RESET_DEMOD
B3[+3.3V]
SCL_DEMOD
B4[+1.1V]
F22_OUTPUT
SDA_DEMOD
LNB
GND_2
B1
TU_GND_A
R6703 0 TU_H/M_KR/US/JP/EU
A1
TU_GND_A
TU_GND_B
TU_GND_B
C6703
C6701
1000pF
630V
C6701-*1
3300pF
630V
TU_H/M/W_KR/US/CN/JP/TW/BR/EU/AJ_1000pF
C6705
1000pF
0.022uF
630V
630V
TU_W_AJ_22nF
TU_H/M/W_KR/US/CN/JP/TW/BR/EU/AJ
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
A1
B1
47
SHIELD
C6707
1000pF
630V
TU_W_AJ_1nF
C6707-*1
0.022uF
630V
TU_W_AJ_22nF
for tuner EMS (S4) testing
B1[+3.3V]
1
NC_1
2
M_DIF_AGC
3
SCL_RF
4
SDA_RF
5
M_DIF[P]
6
M_DIF[N]
7
S_SIF
8
S_CVBS
9
NC_2
B2[+3.3V]
S_ERROR
GND_1
S_MCLK
S_SYNC
S_VAILD
S_DATA
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
S_RESET_DEMOD
B3[+3.3V]
SCL_DEMOD
B4[+1.1V]
NC_10
SDA_DEMOD
B1
TU_GND_B
R6701
0
GND_3
TU_GND_B
+3.3V_TUNER
FE_DEMOD1_TS_ERROR
FE_DEMOD1_1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]
/TU_RESET1_TU
+3.3V_DEMOD_TU
I2C_SCL4_TU
D_Demod_Core
LNB_TX
I2C_SDA4_TU
LNB_OUT
TU6701-*1
TDJM-C351D
TDJM_C351D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
A1
B1B1A1
47
SHIELD
B1[+3.3V]
RF_SW_CTL
NC_1
SCL_RF
SDA_RF
NC_2
NC_3
SIF
CVBS
NC_4
NC_5
ERROR
GND_1
MCLK
SYNC
VAILD
D0
D1
D2
D3
D4
D5
D6
D7
RESET_DEMOD
B2[+3.3V]
SCL_DEMOD
B3[+1.1V]
NC_6
SDA_DEMOD
A1
TU_GND_A
TU6800-*1
TDJW-K151F
TDJW_K151F
47
SHIELD
1
2
3
4
5
6
7
8
9
10
11
12
13
25
26
27
28
29
30
33
34
35
36
37
38
39
40
41
42
43
44
45
46
B1B1A1
A1
B1[+3.3V]
SWITCH_CTR
NC_1
SCL_RF
SDA_RF
NC_2
NC_3
S_SIF
S_CVBS
NC_4
B2[+3.3V]
NC_5
GND_1
M_RESET_DEMOD
B3[+3.3V]
SCL_DEMOD
B4[+1.2V]
NC_6
SDA_DEMOD
NC_7
M_ERROR
GND_2
M_SYNC
M_MCLK
NC_8
M_VALID
M_DATA
S_ERROR
S_SYNC
S_MCLK
S_VALID
S_RESET_DEMOD
S_DATA
B1[+3.3V]
1
NC
2
DIF_AGC
3
SCL
4
SDA
5
DIF[P]
6
DIF[N]
7
SIF
8
CVBS
9
A1
B1
B1
+3.3V_LNA_TU
RF_SWITCH_CTL_TU
IF_AGC_TU
I2C_SCL6_TU
I2C_SDA6_TU
IF_P_TU
IF_N_TU
TU_SIF_TU
TU_CVBS_TU
47
SHIELD
TU_GND_B
TU6800-*2
TDJW-H151F
DEV_KR_T2
B1[+3.3V]
1
NC_1
2
M_DIF_AGC
3
SCL_RF
4
SDA_RF
5
M_DIF[P]
6
M_DIF[N]
7
S_SIF
8
S_CVBS
9
NC_2
10
B2[+3.3V]
11
NC_3
12
GND_1
13
RESET1_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.1V]
28
NC_4
29
SDA_DEMOD
30
NC_5
33
NC_6
34
GND_2
35
NC_7
36
NC_8
37
NC_9
38
NC_10
39
NC_11
40
ERROR
41
SYNC
42
MCLK
43
VALID
44
RESET2_DEMOD
45
DATA
46
A1
B1B1A1
47
SHIELD
TU6800-*3
TDJW-B251F
TDJW-B251F
B1[+3.3V]
1
RF_S/W_CTL
2
NC_1
3
SCL_RF
4
SDA_RF
5
NC_2
6
NC_3
7
M_SIF
8
M_CVBS
9
NC_4
10
B2[+3.3V]
11
NC_5
12
GND_1
13
M_RESET_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.1V]
28
NC_6
29
SDA_DEMOD
30
NC_7
33
M_ERROR
34
GND_2
35
M_SYNC
36
M_MCLK
37
NC_8
38
M_VALID
39
M_DATA
40
S_ERROR
41
S_SYNC
42
S_MCLK
43
S_VALID
44
S_RESET_DEMOD
45
S_DATA
46
A1
B1B1A1
47
SHIELD
54
SHIELD
TU_H/M/W_KR/US/CN/JP/TW/BR/EU/AJ_3300pF
TU_GND_A
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
TU_GND_B
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TU_SYMBOL
BSD-14Y-UD-067-HD
2013.12.17
Page 45
RS-232C Control INTERFACE
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.5V_ST
C6812
0.33uF
OPT
IC6801
MAX3232CDR
C6813
0.1uF
OPT
ZD6802
ADUC 20S 02 010L
20V
R6820
100
R6821
100
OPT
ZD6803
ADUC 20S 02 010L
20V
JK6801
SPG14-DC-0101
5
9
4
8
3
7
2
6
1
10
C6808
0.1uF
C6809
0.1uF
C6810
0.1uF
C6811
0.1uF
C1+
C1-
C2+
C2-
DOUT2
RIN2
V+
V-
1
2
3
4
5
6
7
8
EAN41348201
VCC
16
GND
15
DOUT1
14
RIN1
13
ROUT1
12
DIN1
11
DIN2
10
ROUT2
9
SOC_RX
SOC_TX
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-068-HD
2013.12.17
RS232C 68
Page 46
DVB-S2 LNB Part Allegro
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LNB_OUT
(Option:LNB)
C6900
18pF
LNB
Close to Tuner
Surge protectioin
C6901
33pF
LNB
D6900
LNB
R6900
2.2K
1W
LNB
D6901
MBR230LSFT1G
C6902
0.22uF
LNB
25V
A_GND
LNB
30V
2A
D6902
LNB
30V
C6903
0.01uF
50V
LNB
C6905
10uF
25V
LNB
close to Boost pin(#1)
C6904
0.1uF
50V
LNB
A_GND
C6906
10uF
25V
D6903
LNB_SMAB34
40V
D6903-*1
LNB_SX34
40V
LNB
A_GND
C6907
10uF
25V
LNB
D6904-*1
LNB_SX34
LNB_SMAB34
LNB
C6908 0.1uF
40V
D6904
40V
[EP]GND
VCP
1
LNB
2
NC_1
3
TDI
A8303SESTR-T
4
TDO
5
A_GND
NC_3
BOOST
19
20
THERMAL
21
IC6900
7
6
SCL9ADD
IRQ
LNB
NC_2
18
8
SDA
GNDLX
3.5A
SP-7850_15
16LX17
15
14
13
12
11
10
TONECTRL
15uH
L6900
VIN
GND
VREG
ISET
TCAP
+12V
LNB
3A
Max 1.3A
C6909
10uF
25V
LNB
A_GND
close to VIN pin(#15)
C6910
0.1uF
50V
LNB
C6912
LNB
0.1uF
LNB
C6911 0.22uF
Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A
LNB
R6903
39K
1/16W
1%
Caution!! need isolated GND
A_GND
R6904
0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LNB
R6901 33
LNB
R6902 33
I2C_SCL4
I2C_SDA4
LNB_TX
LNB
BSD-14Y-UD-069-HD
2013.12.17
69
Page 47
eMMC I/F
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R8107-*1 47K
R8106-*1 47K
AR8100
22
1/16W
EMMC_SERIAL_22
AR8101
22
1/16W
EMMC_SERIAL_22
AR8102 22
3.3V_EMMC
R8100 10K
OPT
R8101 10K
R8102 10K
C8100
0.1uF
16V
R8103 10K
C8107
10pF
OPT
50V
EMMC DATA LINE 47K PULL/UP
R8103-*1 47K
R8100-*1 47K
EMMC_DATA[0-7]
EMMC_DATA[0]
EMMC_DATA[1]
EMMC_DATA[2]
EMMC_DATA[3]
EMMC_DATA[4]
EMMC_DATA[5]
EMMC_DATA[6]
EMMC_DATA[7]
EMMC_CLK
EMMC_CMD
EMMC_RST
R8101-*1 47K
R8102-*1 47K
R8105-*1 47K
R8104-*1 47K
EMMC_SERIAL_22
eMMC serial 100 ohm option
AR8100-*1
100
1/16W
EMMC_SERIAL_100
100
100
1/16W
1/16W
EMMC_SERIAL_100
EMMC_SERIAL_100
AR8102-*1
AR8101-*1
Don’t Connect Power At VDDI
(Just Interal LDO Capacitor)
IC8100-*1
THGBM5G5A1JBAIR
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
EMMC DATA LINE
10K PULL/UP
FOR M13
R8107 10K
R8105 10K
R8106 10K
R8104 10K
DAT4
DAT5
DAT3
DAT6
10K
R8117
EMMC_CLK_BALL
EMMC_CMD_BALL
10K
R8116
EMMC_RESET_BALL
EMMC_VDDI
EMMC_VDDI
3.3V_EMMC
DAT3
DAT4
DAT5
C8104
1uF
10V
A3
A4
A5
B2
B3
B4
B5
B6
M6
M5
A6
A7
C5
E5
E8
E9
E10
F10
G3
G10
H5
J5
K6
K7
K10
P7
P10
K5
C6
M4
N4
P3
P5
E6
F5
J10
K9
C2
E7
G5
H10
K8
C4
N2
N5
P4
P6
A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C7
DU1
DU2
DU3
DU4
DU5
DU6
DU7
DU8
H26M31002GPR
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
CLK
CMD
NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119
RESET
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
VCC_1
VCC_2
VCC_3
VCC_4
VDDI
VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
NC_1
NC_2
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_24
DUMMY_1
DUMMY_2
DUMMY_3
DUMMY_4
DUMMY_5
DUMMY_6
DUMMY_7
DUMMY_8
IC8100
C8
NC_25
C9
NC_26
C10
NC_27
C11
NC_28
C12
NC_29
C13
NC_30
C14
NC_31
D1
NC_32
D2
NC_33
D3
NC_34
D4
NC_35
D12
NC_36
D13
NC_37
D14
NC_38
E1
NC_39
E2
NC_40
E3
NC_41
E12
NC_46
E13
NC_47
E14
NC_48
F1
NC_49
F2
NC_50
F3
NC_51
F12
NC_53
F13
NC_54
F14
NC_55
G1
NC_56
G2
NC_57
G12
NC_60
G13
NC_61
G14
NC_62
H1
NC_63
H2
NC_64
H3
NC_65
H12
NC_67
H13
NC_68
H14
NC_69
J1
NC_70
J2
NC_71
J3
NC_72
J12
NC_74
J13
NC_75
J14
NC_76
K1
NC_77
K2
NC_78
K3
NC_79
K12
NC_83
K13
NC_84
K14
NC_85
L1
NC_86
L2
NC_87
L3
NC_88
L12
NC_89
L13
NC_90
L14
NC_91
M1
NC_92
HYNIX_EMMC_4GB
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106
NC_107
NC_108
NC_109
NC_110
NC_111
NC_112
NC_113
NC_114
NC_115
NC_117
NC_118
NC_120
NC_121
NC_122
NC_123
DUMMY_9
DUMMY_10
DUMMY_11
DUMMY_12
DUMMY_13
DUMMY_14
DUMMY_15
DUMMY_16
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14
DU9
DU10
DU11
DU12
DU13
DU14
DU15
DU16
DAT5
DAT6
EMMC_RESET_BALL
EMMC_CMD_BALL
EMMC_CLK_BALL
M6
CLK
M5
CMD
A6
RFU_1
A7
RFU_2
C5
NC_21
E5
RFU_3
E8
RFU_4
E9
RFU_5
E10
RFU_6
F10
RFU_7
G3
RFU_8
G10
RFU_9
H5
RFU_10
J5
RFU_11
K6
RFU_12
K7
RFU_13
K10
RFU_14
P7
RFU_15
P10
RFU_16
K5
RST_N
C6
VCCQ_1
M4
VCCQ_2
N4
VCCQ_3
P3
VCCQ_4
P5
VCCQ_5
E6
VCC_1
F5
VCC_2
J10
VCC_3
K9
VCC_4
C2
VDDI
E7
VSS_1
G5
VSS_2
H10
VSS_3
K8
VSS_4
C4
VSSQ_1
N2
VSSQ_2
N5
VSSQ_3
P4
VSSQ_4
P6
VSSQ_5
A1
NC_1
A2
NC_2
A8
NC_3
A9
NC_4
A10
NC_5
A11
NC_6
A12
NC_7
A13
NC_8
A14
NC_9
B1
NC_10
B7
NC_11
B8
NC_12
B9
NC_13
B10
NC_14
B11
NC_15
B12
NC_16
B13
NC_17
B14
NC_18
C1
NC_19
C3
NC_20
C7
NC_22
TOSHIBA_EMMC_4GB
IC8100-*5
KLM4G1FE3B-B001
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M6
CLK
M5
CMD
A6
NC_3
A7
NC_4
C5
NC_23
E5
NC_42
E8
NC_43
E9
NC_44
E10
NC_45
F10
NC_52
G3
NC_58
G10
NC_59
H5
NC_66
J5
NC_73
K6
NC_80
K7
NC_81
K10
NC_82
P7
NC_116
P10
NC_119
K5
RSTN
C6
VDD_1
M4
VDD_2
N4
VDD_3
P3
VDD_4
P5
VDD_5
E6
VDDF_1
F5
VDDF_2
J10
VDDF_3
K9
VDDF_4
C2
VDDI
E7
VSS_2
G5
VSS_3
H10
VSS_4
K8
VSS_5
C4
VSS_1
N2
VSS_6
N5
VSS_7
P4
VSS_8
P6
VSS_9
A1
NC_1
A2
NC_2
A8
NC_5
A9
NC_6
A10
NC_7
A11
NC_8
A12
NC_9
A13
NC_10
A14
NC_11
B1
NC_12
B7
NC_13
B8
NC_14
B9
NC_15
B10
NC_16
B11
NC_17
B12
NC_18
B13
NC_19
B14
NC_20
C1
NC_21
C3
NC_22
C7
NC_24
C8
NC_23
C9
NC_24
C10
NC_25
C11
NC_26
C12
NC_27
C13
NC_28
C14
NC_29
D1
NC_30
D2
NC_31
D3
NC_32
D4
NC_33
D12
NC_34
D13
NC_35
D14
NC_36
E1
NC_37
E2
NC_38
E3
NC_39
E12
NC_40
E13
NC_41
E14
NC_42
F1
NC_43
F2
NC_44
F3
NC_45
F12
NC_46
F13
NC_47
F14
NC_48
G1
NC_49
G2
NC_50
G12
NC_51
G13
NC_52
G14
NC_53
H1
NC_54
H2
NC_55
H3
NC_56
H12
NC_57
H13
NC_58
H14
NC_59
J1
NC_60
J2
NC_61
J3
NC_62
J12
NC_63
J13
NC_64
J14
NC_65
K1
NC_66
K2
NC_67
K3
NC_68
K12
NC_69
K13
NC_70
K14
NC_71
L1
NC_72
L2
NC_73
L3
NC_74
L12
NC_75
L13
NC_76
L14
NC_77
M1
NC_78
M2
NC_79
M3
NC_80
M7
NC_81
M8
NC_82
M9
NC_83
M10
NC_84
M11
NC_85
M12
NC_86
M13
NC_87
M14
NC_88
N1
NC_89
N3
NC_90
N6
NC_91
N7
NC_92
N8
NC_93
N9
NC_94
N10
NC_95
N11
NC_96
N12
NC_97
N13
NC_98
N14
NC_99
P1
NC_100
P2
NC_101
P8
NC_102
P9
NC_103
P11
NC_104
P12
NC_105
P13
NC_106
P14
NC_107
IC8100-*6
THGBM5G6A2JBAIR
C8
NC_25
C9
NC_26
C10
NC_27
C11
NC_28
C12
NC_29
C13
NC_30
C14
NC_31
D1
NC_32
D2
NC_33
D3
NC_34
D4
NC_35
D12
NC_36
D13
NC_37
D14
NC_38
E1
NC_39
E2
NC_40
E3
NC_41
E12
NC_46
E13
NC_47
E14
NC_48
F1
NC_49
F2
NC_50
F3
NC_51
F12
NC_53
F13
NC_54
F14
NC_55
G1
NC_56
G2
NC_57
G12
NC_60
G13
NC_61
G14
NC_62
H1
NC_63
H2
NC_64
H3
NC_65
H12
NC_67
H13
NC_68
H14
NC_69
J1
NC_70
J2
NC_71
J3
NC_72
J12
NC_74
J13
NC_75
J14
NC_76
K1
NC_77
K2
NC_78
K3
NC_79
K12
NC_83
K13
NC_84
K14
NC_85
L1
NC_86
L2
NC_87
L3
NC_88
L12
NC_89
L13
NC_90
L14
NC_91
M1
NC_92
M2
NC_93
M3
NC_94
M7
NC_95
M8
NC_96
M9
NC_97
M10
NC_98
M11
NC_99
M12
NC_100
M13
NC_101
M14
NC_102
N1
NC_103
N3
NC_104
N6
NC_105
N7
NC_106
SAMSUNG_EMMC_4GB
N8
NC_107
N9
NC_108
N10
NC_109
N11
NC_110
N12
NC_111
N13
NC_112
N14
NC_113
P1
NC_114
P2
NC_115
P8
NC_117
P9
NC_118
P11
NC_120
P12
NC_121
P13
NC_122
P14
NC_123
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M6
CLK
M5
CMD
A6
RFU_1
A7
RFU_2
C5
NC_21
E5
RFU_3
E8
RFU_4
E9
RFU_5
E10
RFU_6
F10
RFU_7
G3
RFU_8
G10
RFU_9
H5
RFU_10
J5
RFU_11
K6
RFU_12
K7
RFU_13
K10
RFU_14
P7
RFU_15
P10
RFU_16
K5
RSTN
C6
VCCQ_1
M4
VCCQ_2
N4
VCCQ_3
P3
VCCQ_4
P5
VCCQ_5
E6
VCC_1
F5
VCC_2
J10
VCC_3
K9
VCC_4
C2
VDDI
E7
VSS_1
G5
VSS_2
H10
VSS_3
K8
VSS_4
C4
VSSQ_1
N2
VSSQ_2
N5
VSSQ_3
P4
VSSQ_4
P6
VSSQ_5
A1
NC_1
A2
NC_2
A8
NC_3
A9
NC_4
A10
NC_5
A11
NC_6
TOSHIBA_EMMC_8GB
A12
NC_7
A13
NC_8
A14
NC_9
B1
NC_10
B7
NC_11
B8
NC_12
B9
NC_13
B10
NC_14
NC_100
B11
NC_15
NC_101
B12
NC_16
NC_102
B13
NC_17
NC_103
B14
NC_18
NC_104
C1
NC_19
NC_105
C3
NC_20
NC_106
C7
NC_22
NC_107
E10
F10
G10
K10
P10
J10
H10
A10
A11
A12
A13
A14
B10
B11
B12
B13
B14
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
A3
A4
A5
B2
B3
B4
B5
B6
M6
M5
A6
A7
C5
E5
E8
E9
G3
H5
J5
K6
K7
P7
K5
C6
M4
N4
P3
P5
E6
F5
K9
C2
E7
G5
K8
C4
N2
N5
P4
P6
A1
A2
A8
A9
B1
B7
B8
B9
C1
C3
C7
C8
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14
IC8100-*2
H26M21001ECR
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
CLK
CMD
NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119
RESET
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
VCC_1
VCC_2
VCC_3
VCC_4
VDDI
VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
NC_1
NC_2
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_24
C8
NC_25
C9
NC_26
C10
NC_27
C11
NC_28
C12
NC_29
C13
NC_30
C14
NC_31
D1
NC_32
D2
NC_33
D3
NC_34
D4
NC_35
D12
NC_36
D13
NC_37
D14
NC_38
E1
NC_39
E2
NC_40
E3
NC_41
E12
NC_46
E13
NC_47
E14
NC_48
F1
NC_49
F2
NC_50
F3
NC_51
F12
NC_53
F13
NC_54
F14
NC_55
G1
NC_56
G2
NC_57
G12
NC_60
G13
NC_61
G14
NC_62
H1
NC_63
H2
NC_64
H3
NC_65
H12
NC_67
H13
NC_68
H14
NC_69
J1
NC_70
J2
NC_71
J3
NC_72
J12
NC_74
J13
NC_75
J14
NC_76
K1
NC_77
K2
NC_78
K3
NC_79
K12
NC_83
K13
NC_84
K14
NC_85
L1
NC_86
L2
NC_87
L3
NC_88
L12
NC_89
L13
NC_90
L14
NC_91
M1
NC_92
HYNIX_EMMC_2GB
KLMAG2GE4A-A001
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M6
CLK
M5
CMD
A6
RFU_1
A7
RFU_2
C5
RFU_3
E5
RFU_4
E8
RFU_5
E9
RFU_6
E10
NC_39
F10
RFU_7
G3
RFU_8
G10
RFU_9
H5
RFU_10
J5
RFU_11
K6
RFU_12
K7
RFU_13
K10
RFU_14
P7
RFU_15
P10
NC_104
K5
RESET
C6
VDD_1
M4
VDD_2
N4
VDD_3
P3
VDD_4
P5
VDD_5
E6
VDDF_1
F5
VDDF_2
J10
VDDF_3
K9
VDDF_4
C2
VDDI
E7
VSS_2
G5
VSS_3
H10
VSS_4
K8
VSS_9
C4
VSS_1
N2
VSS_5
N5
VSS_6
P4
VSS_7
P6
VSS_8
A1
NC_1
A2
NC_2
A8
NC_3
A9
NC_4
A10
NC_5
A11
NC_6
A12
NC_7
A13
NC_8
A14
NC_9
B1
NC_10
B7
NC_11
B8
NC_12
B9
NC_13
B10
NC_14
B11
NC_15
B12
NC_16
B13
NC_17
B14
NC_18
C1
NC_19
C3
NC_20
C7
NC_21
DU1
DUMMY_1
DU2
DUMMY_2
DU3
DUMMY_3
DU4
DUMMY_4
DU5
DUMMY_5
DU6
DUMMY_6
DU7
DUMMY_7
DU8
DUMMY_8
M2
NC_93
M3
NC_94
M7
NC_95
M8
NC_96
M9
NC_97
M10
NC_98
M11
NC_99
M12
NC_100
M13
NC_101
M14
NC_102
N1
NC_103
N3
NC_104
N6
NC_105
N7
NC_106
N8
NC_107
N9
NC_108
N10
NC_109
N11
NC_110
N12
NC_111
N13
NC_112
N14
NC_113
P1
NC_114
P2
NC_115
P8
NC_117
P9
NC_118
P11
NC_120
P12
NC_121
P13
NC_122
P14
NC_123
IC8100-*7
C8
NC_22
C9
NC_23
C10
NC_24
C11
NC_25
C12
NC_26
C13
NC_27
C14
NC_28
D1
NC_29
D2
NC_30
D3
NC_31
D4
NC_32
D12
NC_33
D13
NC_34
D14
NC_35
E1
NC_36
E2
NC_37
E3
NC_38
E12
NC_40
E13
NC_41
E14
NC_42
F1
NC_43
F2
NC_44
F3
NC_45
F12
NC_46
F13
NC_47
F14
NC_48
G1
NC_49
G2
NC_50
G12
NC_51
G13
NC_52
G14
NC_53
H1
NC_54
H2
NC_55
H3
NC_56
H12
NC_57
H13
NC_58
H14
NC_59
J1
NC_60
J2
NC_61
J3
NC_62
J12
NC_63
J13
NC_64
J14
NC_65
K1
NC_66
K2
NC_67
K3
NC_68
K12
NC_69
K13
NC_70
K14
NC_71
L1
NC_72
L2
NC_73
L3
NC_74
L12
NC_75
L13
NC_76
L14
NC_77
M1
NC_78
M2
NC_79
M3
NC_80
M7
NC_81
M8
NC_82
M9
NC_83
M10
NC_84
M11
NC_85
M12
NC_86
M13
NC_87
M14
NC_88
N1
SAMSUNG_EMMC_16G
NC_89
N3
NC_90
N6
NC_91
N7
NC_92
N8
NC_93
N9
NC_94
N10
NC_95
N11
NC_96
N12
NC_97
N13
NC_98
N14
NC_99
P1
NC_100
P2
NC_101
P8
NC_102
P9
NC_103
P11
RFU_16
P12
NC_105
P13
NC_106
P14
NC_107
DU9
DUMMY_9
DU10
DUMMY_10
DU11
DUMMY_11
DU12
DUMMY_12
DU13
DUMMY_13
DU14
DUMMY_14
DU15
DUMMY_15
DU16
DUMMY_16
A3
A4
A5
B2
B3
B4
B5
B6
M6
M5
A6
A7
C5
E5
E8
E9
E10
F10
G3
G10
H5
J5
K6
K7
K10
P7
P10
K5
C6
M4
N4
P3
P5
E6
F5
J10
K9
C2
C4
E7
G5
H10
K8
N2
N5
P4
P6
A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C7
IC8100-*8
H26M42002GMR
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M6
CLK
M5
CMD
A6
NC_3
A7
NC_4
C5
NC_23
E5
NC_42
E8
NC_43
E9
NC_44
E10
NC_45
F10
NC_52
G3
NC_58
G10
NC_59
H5
NC_66
J5
NC_73
K6
NC_80
K7
NC_81
K10
NC_82
P7
NC_116
P10
NC_119
K5
RESET
C6
VCCQ_1
M4
VCCQ_2
N4
VCCQ_3
P3
VCCQ_4
P5
VCCQ_5
E6
VCC_1
F5
VCC_2
J10
VCC_3
K9
VCC_4
C2
VDDI
E7
VSS_1
G5
VSS_2
H10
VSS_3
K8
VSS_4
C4
VSSQ_1
N2
VSSQ_2
N5
VSSQ_3
P4
VSSQ_4
P6
VSSQ_5
A1
NC_1
A2
NC_2
A8
NC_5
A9
NC_6
A10
NC_7
A11
NC_8
A12
NC_9
A13
NC_10
A14
NC_11
B1
NC_12
B7
NC_13
B8
NC_14
B9
NC_15
B10
NC_16
B11
NC_17
B12
NC_18
B13
NC_19
B14
NC_20
C1
NC_21
C3
NC_22
C7
NC_24
IC8100-*3
KLM2G1HE3F-B001
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
CLK
CMD
NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119
RSTN
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDDF_1
VDDF_2
VDDF_3
VDDF_4
VDDI
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
NC_1
NC_2
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_24
C8
NC_25
C9
NC_26
C10
NC_27
C11
NC_28
C12
NC_29
C13
NC_30
C14
NC_31
D1
NC_32
D2
NC_33
D3
NC_34
D4
NC_35
D12
NC_36
D13
NC_37
D14
NC_38
E1
NC_39
E2
NC_40
E3
NC_41
E12
NC_46
E13
NC_47
E14
NC_48
F1
NC_49
F2
NC_50
F3
NC_51
F12
NC_53
F13
NC_54
F14
NC_55
G1
NC_56
G2
NC_57
G12
NC_60
G13
NC_61
G14
NC_62
H1
NC_63
H2
NC_64
H3
NC_65
H12
NC_67
H13
NC_68
H14
NC_69
J1
NC_70
J2
NC_71
J3
NC_72
J12
NC_74
J13
NC_75
J14
NC_76
K1
NC_77
K2
NC_78
K3
NC_79
K12
NC_83
K13
NC_84
K14
NC_85
L1
NC_86
L2
NC_87
L3
NC_88
L12
NC_89
L13
NC_90
HYNIX_EMMC_8GB
L14
NC_91
M1
NC_92
M2
NC_93
M3
NC_94
M7
NC_95
M8
NC_96
M9
NC_97
M10
NC_98
M11
NC_99
M12
NC_100
M13
NC_101
M14
NC_102
N1
NC_103
N3
NC_104
N6
NC_105
N7
NC_106
N8
NC_107
N9
NC_108
N10
NC_109
N11
NC_110
N12
NC_111
N13
NC_112
N14
NC_113
P1
NC_114
P2
NC_115
P8
NC_117
P9
NC_118
P11
NC_120
P12
NC_121
P13
NC_122
P14
NC_123
SAMSUNG_EMMC_2GB
C8
NC_25
C9
NC_26
C10
NC_27
C11
NC_28
C12
NC_29
C13
NC_30
C14
NC_31
D1
NC_32
D2
NC_33
D3
NC_34
D4
NC_35
D12
NC_36
D13
NC_37
D14
NC_38
E1
NC_39
E2
NC_40
E3
NC_41
E12
NC_46
E13
NC_47
E14
NC_48
F1
NC_49
F2
NC_50
F3
NC_51
F12
NC_53
F13
NC_54
F14
NC_55
G1
NC_56
G2
NC_57
G12
NC_60
G13
NC_61
G14
NC_62
H1
NC_63
H2
NC_64
H3
NC_65
H12
NC_67
H13
NC_68
H14
NC_69
J1
NC_70
J2
NC_71
J3
NC_72
J12
NC_74
J13
NC_75
J14
NC_76
K1
NC_77
K2
NC_78
K3
NC_79
K12
NC_83
K13
NC_84
K14
NC_85
L1
NC_86
L2
NC_87
L3
NC_88
L12
NC_89
L13
NC_90
L14
NC_91
M1
NC_92
M2
NC_93
M3
NC_94
M7
NC_95
M8
NC_96
M9
NC_97
M10
NC_98
M11
NC_99
M12
NC_100
M13
NC_101
M14
NC_102
N1
NC_103
N3
NC_104
N6
NC_105
N7
NC_106
N8
NC_107
N9
NC_108
N10
NC_109
N11
NC_110
N12
NC_111
N13
NC_112
N14
NC_113
P1
NC_114
P2
NC_115
P8
NC_117
P9
NC_118
P11
NC_120
P12
NC_121
P13
NC_122
P14
NC_123
IC8100-*9
THGBMAG5A1JBAIR
A3
C8
DAT0
NC_23
A4
C9
DAT1
NC_24
A5
C10
DAT2
NC_25
B2
C11
DAT3
NC_26
B3
C12
DAT4
NC_27
B4
C13
DAT5
NC_28
B5
C14
DAT6
NC_29
B6
D1
DAT7
NC_30
D2
NC_31
D3
NC_32
M6
D4
CLK
NC_33
M5
D12
CMD
NC_34
D13
NC_35
D14
NC_36
A6
E1
RFU_1
NC_37
A7
E2
RFU_2
NC_38
C5
E3
NC_21
NC_39
E5
E12
RFU_3
NC_40
E8
E13
RFU_4
NC_41
E9
E14
RFU_5
NC_42
E10
F1
RFU_6
NC_43
F10
F2
RFU_7
NC_44
G3
F3
RFU_8
NC_45
G10
F12
RFU_9
NC_46
H5
F13
RFU_10
NC_47
J5
F14
RFU_11
NC_48
K6
G1
RFU_12
NC_49
K7
G2
RFU_13
NC_50
K10
G12
RFU_14
NC_51
P7
G13
RFU_15
NC_52
P10
G14
RFU_16
NC_53
H1
NC_54
H2
NC_55
K5
H3
RST_N
NC_56
H12
NC_57
H13
NC_58
C6
H14
VCCQ_1
NC_59
M4
J1
VCCQ_2
NC_60
N4
J2
VCCQ_3
NC_61
P3
J3
VCCQ_4
NC_62
P5
J12
VCCQ_5
NC_63
J13
NC_64
J14
NC_65
E6
K1
VCC_1
NC_66
F5
K2
VCC_2
NC_67
J10
K3
VCC_3
NC_68
K9
K12
VCC_4
NC_69
K13
NC_70
K14
NC_71
C2
L1
VDDI
NC_72
L2
NC_73
L3
NC_74
E7
L12
VSS_1
NC_75
G5
L13
VSS_2
NC_76
H10
L14
VSS_3
NC_77
K8
M1
VSS_4
NC_78
C4
M2
VSSQ_1
NC_79
N2
M3
VSSQ_2
NC_80
N5
M7
VSSQ_3
NC_81
P4
M8
VSSQ_4
NC_82
P6
M9
VSSQ_5
NC_83
M10
NC_84
M11
NC_85
M12
NC_86
A1
M13
NC_1
NC_87
A2
M14
NC_2
NC_88
A8
N1
NC_3
NC_89
A9
N3
NC_4
NC_90
A10
N6
NC_5
NC_91
A11
N7
NC_6
NC_92
A12
N8
NC_7
NC_93
A13
N9
NC_8
NC_94
A14
N10
NC_9
NC_95
B1
N11
NC_10
NC_96
B7
N12
NC_11
NC_97
B8
N13
NC_12
NC_98
B9
N14
NC_13
NC_99
B10
P1
NC_14
NC_100
B11
P2
NC_15
NC_101
B12
P8
NC_16
NC_102
B13
P9
NC_17
NC_103
TOSHIBA_EMMC_4GB_V4.5
B14
P11
NC_18
NC_104
C1
P12
NC_19
NC_105
C3
P13
NC_20
NC_106
C7
P14
NC_22
NC_107
A3
A4
A5
B2
B3
B4
B5
B6
M6
M5
A6
A7
C5
E5
E8
E9
E10
F10
G3
G10
H5
J5
K6
K7
K10
P7
P10
K5
C6
M4
N4
P3
P5
E6
F5
J10
K9
C2
E7
G5
H10
K8
C4
N2
N5
P4
P6
A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C7
IC8100-*4
THGBM5G7A2JBAIR
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M6
CLK
M5
CMD
A6
RFU_1
A7
RFU_2
C5
NC_21
E5
RFU_3
E8
RFU_4
E9
RFU_5
E10
RFU_6
F10
RFU_7
G3
RFU_8
G10
RFU_9
H5
RFU_10
J5
RFU_11
K6
RFU_12
K7
RFU_13
K10
RFU_14
P7
RFU_15
P10
RFU_16
K5
RSTN
C6
VCCQ_1
M4
VCCQ_2
N4
VCCQ_3
P3
VCCQ_4
P5
VCCQ_5
E6
VCC_1
F5
VCC_2
J10
VCC_3
K9
VCC_4
C2
VDDI
E7
VSS_1
G5
VSS_2
H10
VSS_3
K8
VSS_4
C4
VSSQ_1
N2
VSSQ_2
N5
VSSQ_3
P4
VSSQ_4
P6
VSSQ_5
A1
NC_1
A2
NC_2
A8
NC_3
A9
NC_4
A10
NC_5
A11
NC_6
A12
NC_7
A13
NC_8
A14
NC_9
B1
NC_10
B7
NC_11
B8
NC_12
B9
NC_13
B10
NC_14
B11
NC_15
B12
NC_16
B13
NC_17
B14
NC_18
C1
NC_19
C3
NC_20
C7
NC_22
IC8100-*10
THGBMAG6A2JBAIR
DAT0
NC_23
DAT1
NC_24
DAT2
NC_25
DAT3
NC_26
DAT4
NC_27
DAT5
NC_28
DAT6
NC_29
DAT7
NC_30
NC_31
NC_32
CLK
NC_33
CMD
NC_34
NC_35
NC_36
RFU_1
NC_37
RFU_2
NC_38
NC_21
NC_39
RFU_3
NC_40
RFU_4
NC_41
RFU_5
NC_42
RFU_6
NC_43
RFU_7
NC_44
RFU_8
NC_45
RFU_9
NC_46
RFU_10
NC_47
RFU_11
NC_48
RFU_12
NC_49
RFU_13
NC_50
RFU_14
NC_51
RFU_15
NC_52
RFU_16
NC_53
NC_54
NC_55
RST_N
NC_56
NC_57
NC_58
VCCQ_1
NC_59
VCCQ_2
NC_60
VCCQ_3
NC_61
VCCQ_4
NC_62
VCCQ_5
NC_63
NC_64
NC_65
VCC_1
NC_66
VCC_2
NC_67
VCC_3
NC_68
VCC_4
NC_69
NC_70
NC_71
VDDI
NC_72
NC_73
NC_74
VSS_1
NC_75
VSS_2
NC_76
VSS_3
NC_77
VSS_4
NC_78
VSSQ_1
NC_79
VSSQ_2
NC_80
VSSQ_3
NC_81
VSSQ_4
NC_82
VSSQ_5
NC_83
NC_84
NC_85
NC_86
NC_1
NC_87
NC_2
NC_88
NC_3
NC_89
NC_4
NC_90
NC_5
NC_91
NC_6
NC_92
NC_7
NC_93
NC_8
NC_94
NC_9
NC_95
NC_10
NC_96
NC_11
NC_97
NC_12
NC_98
NC_13
NC_99
NC_14
NC_100
NC_15
NC_101
NC_16
NC_102
NC_17
NC_103
TOSHIBA_EMMC_8GB_V4.5
NC_18
NC_104
NC_19
NC_105
NC_20
NC_106
NC_22
NC_107
TOSHIBA_EMMC_16GB
C8
C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14
C8
NC_23
C9
NC_24
C10
NC_25
C11
NC_26
C12
NC_27
C13
NC_28
C14
NC_29
D1
NC_30
D2
NC_31
D3
NC_32
D4
NC_33
D12
NC_34
D13
NC_35
D14
NC_36
E1
NC_37
E2
NC_38
E3
NC_39
E12
NC_40
E13
NC_41
E14
NC_42
F1
NC_43
F2
NC_44
F3
NC_45
F12
NC_46
F13
NC_47
F14
NC_48
G1
NC_49
G2
NC_50
G12
NC_51
G13
NC_52
G14
NC_53
H1
NC_54
H2
NC_55
H3
NC_56
H12
NC_57
H13
NC_58
H14
NC_59
J1
NC_60
J2
NC_61
J3
NC_62
J12
NC_63
J13
NC_64
J14
NC_65
K1
NC_66
K2
NC_67
K3
NC_68
K12
NC_69
K13
NC_70
K14
NC_71
L1
NC_72
L2
NC_73
L3
NC_74
L12
NC_75
L13
NC_76
L14
NC_77
M1
NC_78
M2
NC_79
M3
NC_80
M7
NC_81
M8
NC_82
M9
NC_83
M10
NC_84
M11
NC_85
M12
NC_86
M13
NC_87
M14
NC_88
N1
NC_89
N3
NC_90
N6
NC_91
N7
NC_92
N8
NC_93
N9
NC_94
N10
NC_95
N11
NC_96
N12
NC_97
N13
NC_98
N14
NC_99
P1
NC_100
P2
NC_101
P8
NC_102
P9
NC_103
P11
NC_104
P12
NC_105
P13
NC_106
P14
NC_107
IC8100-*11
THGBMAG7A2JBAIR
A3
C8
DAT0
NC_23
A4
C9
DAT1
NC_24
A5
C10
DAT2
NC_25
B2
C11
DAT3
NC_26
B3
C12
DAT4
NC_27
B4
C13
DAT5
NC_28
B5
C14
DAT6
NC_29
B6
D1
DAT7
NC_30
D2
NC_31
D3
NC_32
M6
D4
CLK
NC_33
M5
D12
CMD
NC_34
D13
NC_35
D14
NC_36
A6
E1
RFU_1
NC_37
A7
E2
RFU_2
NC_38
C5
E3
NC_21
NC_39
E5
E12
RFU_3
NC_40
E8
E13
RFU_4
NC_41
E9
E14
RFU_5
NC_42
E10
F1
RFU_6
NC_43
F10
F2
RFU_7
NC_44
G3
F3
RFU_8
NC_45
G10
F12
RFU_9
NC_46
H5
F13
RFU_10
NC_47
J5
F14
RFU_11
NC_48
K6
G1
RFU_12
NC_49
K7
G2
RFU_13
NC_50
K10
G12
RFU_14
NC_51
P7
G13
RFU_15
NC_52
P10
G14
RFU_16
NC_53
H1
NC_54
H2
NC_55
K5
H3
RST_N
NC_56
H12
NC_57
H13
NC_58
C6
H14
VCCQ_1
NC_59
M4
J1
VCCQ_2
NC_60
N4
J2
VCCQ_3
NC_61
P3
J3
VCCQ_4
NC_62
P5
J12
VCCQ_5
NC_63
J13
NC_64
J14
NC_65
E6
K1
VCC_1
NC_66
F5
K2
VCC_2
NC_67
J10
K3
VCC_3
NC_68
K9
K12
VCC_4
NC_69
K13
NC_70
K14
NC_71
C2
L1
VDDI
NC_72
L2
NC_73
L3
NC_74
E7
L12
VSS_1
NC_75
G5
L13
VSS_2
NC_76
H10
L14
VSS_3
NC_77
K8
M1
VSS_4
NC_78
C4
M2
VSSQ_1
NC_79
N2
M3
VSSQ_2
NC_80
N5
M7
VSSQ_3
NC_81
P4
M8
VSSQ_4
NC_82
P6
M9
VSSQ_5
NC_83
M10
NC_84
M11
NC_85
M12
NC_86
A1
M13
NC_1
NC_87
A2
M14
NC_2
NC_88
A8
N1
NC_3
NC_89
A9
N3
NC_4
NC_90
A10
N6
NC_5
NC_91
A11
N7
NC_6
NC_92
A12
N8
NC_7
NC_93
A13
N9
NC_8
NC_94
A14
N10
NC_9
NC_95
B1
N11
NC_10
NC_96
B7
N12
NC_11
NC_97
B8
N13
NC_12
NC_98
B9
N14
NC_13
NC_99
B10
P1
NC_14
NC_100
B11
P2
NC_15
NC_101
B12
P8
NC_16
NC_102
B13
P9
NC_17
NC_103
B14
P11
TOSHIBA_EMMC_16GB_V4.5
NC_18
NC_104
C1
P12
NC_19
NC_105
C3
P13
NC_20
NC_106
C7
P14
NC_22
NC_107
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
eMMC
BSD-14Y-UD-081-HD
2013.12.17
81
Page 48
XTAL(24.75MHz)
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
XTAL_IN
D14_HWRESET
SPI_DL_MODE
C12000
24pF
50V
TRST_N_0
TMS_0
TCK_0
TDI_0
TDO_0
AR12000
C12002 0.1uF
R12000 10K
I2C_SCL2
I2C_SDA2
24.75MHz
X-TAL_1
GND_1
33
TRST_N_0
TRST_N_1
TRST_N_2
UART_RX_0
UART_TX_0
UART_RX_1
UART_TX_1
SOC_SPI0_SCLK
SOC_SPI0_CS0
SOC_SPI0_MOSI
SOC_SPI0_MISO
SPI_SCLK_M
SPI_CS_M
SPI_MOSI_M
SPI_MISO_M
D13_STPO_CLK
D13_STPO_SOP
D13_STPO_VAL
D13_STPO_ERR
D13_STPO_DATA
+3.3V_NORMAL
R12001
1K
OPT
R12002
1K
R12004
1M
X12000
GND_2
4
1
X-TAL_2
2
3
TMS_0
TCK_0
TDI_0
TDO_0
TMS_1
TCK_1
TDI_1
TDO_1
TMS_2
TCK_2
TDI_2
TDO_2
SMODE[0]
SMODE[1:0]
- 00 : Normal Mode
- Other : Test Mode
R12022
330
C12001
24pF
50V
+3.3V_NORMAL
XTAL_IN
XTAL_OUT
R12010 33
R12011 33
R12012 33
R12013 33
R12014 33
R12015 33
R12016 33
R12018 33
R12019 33
R12020 33
R12021 33
OPT
+3.3V_NORMAL
R12005
1K
OPT
R12006
1K
R12050
0
R12023
3.3K
OPT
XTAL_OUT
B3
A3
A6
B6
B7
C6
C7
A8
H21
K22
H20
J21
J20
P19
M19
L19
N19
K19
T22
R21
T20
T21
N20
P22
P20
P21
M22
M21
N21
M20
L20
L21
K20
K21
D22
C20
D20
D21
E21
E20
F22
F21
F20
G21
G20
H22
SMODE[1]
XTALI
XTALO
PORES_N
TRST_0
TMS_0
TCK_0
TDI_0
TDO_0
TRST_1
TMS_1
TCK_1
TDI_1
TDO_1
TRST_2
TMS_2
TCK_2
TDI_2
TDO_2
UART_RXD0
UART_TXD0
UART_RXD1
UART_TXD1
SPI_SCLK_S
SPI_CS_S
SPI_MOSI_S
SPI_MISO_S
SPI_SCK_M
SPI_CS_M
SPI_MOSI_M
SPI_MISO_M
SCL_S
SDA_S
SCL_M
SDA_M
STPI_CLK
STPI_SOP
STPI_VAL
STPI_ERR
STPI_DATA[0]
STPI_DATA[1]
STPI_DATA[2]
STPI_DATA[3]
STPI_DATA[4]
STPI_DATA[5]
STPI_DATA[6]
STPI_DATA[7]
+3.3V_NORMAL
R12024
R12025
IC12000
LG1512D
OPT
SW12000
JTP-1127WEM
1 2
4 3
GPIO[7]
GPIO[6]
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]
HDMI0_DDC_CK
HDMI0_DDC_DA
HDMI0_HPD
HDMI0_REXT
HDMI0_CEC
HDMI0_DDC_CEC
HDMI0_TX0N
HDMI0_TX0P
HDMI0_TX1N
HDMI0_TX1P
HDMI0_TX2N
HDMI0_TX2P
HDMI0_TXCN
HDMI0_TXCP
HDMI1_DDC_CK
HDMI1_DDC_DA
HDMI1_HPD
HDMI1_REXT
HDMI1_CEC
HDMI1_DDC_CEC
HDMI1_TX0N
HDMI1_TX0P
HDMI1_TX1N
HDMI1_TX1P
HDMI1_TX2N
HDMI1_TX2P
HDMI1_TXCN
HDMI1_TXCP
SMODE[0]
SMODE[1]
TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]
1K
GPIO[5]
1K
GPIO[5]
- 1 : Serial Flash Boot
- 0 : Live Boot
P12007
12507WS-04L
5
JTAG1 for HEVC
P12006
12507WS-08L
1
2
3
4
5
6
7
8
9
+3.3V_NORMAL
1
2
3
4
+3.3V_NORMAL +3.3V_NORMAL
C12010
0.1uF
16V
TDI_2
TMS_2
TCK_2
TDO_2
TRST_N_2
UART1 For HEVC
R12103
4.7K
UART_RX_0
UART_TX_0
C12011
0.1uF
16V
SPI/I2C For Aardvak Interface
D14_HWRESET
C12003
0.1uF
16V
R12027
10
Y22
W20
W21
V20
V21
V22
U20
U21
C18
A18
B18
C17
B19
C19
B15
C15
B16
C16
B17
A17
B14
C14
C12
A12
B12
C11
B13
C13
B9
C9
B10
C10
B11
A11
B8
C8
A21
A20
C21
B20
B21
B22
+3.3V_NORMAL
15K
R12038 15K
R12096
R12095 15K
HDMI0_TX0N
HDMI0_TX0P
HDMI0_TX1N
HDMI0_TX1P
HDMI0_TX2N
HDMI0_TX2P
HDMI0_TXCN
HDMI0_TXCP
HDMI1_TX0N
HDMI1_TX0P
HDMI1_TX1N
HDMI1_TX1P
HDMI1_TX2N
HDMI1_TX2P
HDMI1_TXCN
HDMI1_TXCP
SMODE[0]
SMODE[1]
15K
R12097
D13_INT
R12098 15K
GPIO[5]
- 1 : Serial Flash Boot
- 0 : Live Boot
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]
FLASH_WP
GPIO[5]
GPIO[4]
GPIO[3]
GPIO[2]
GPIO[1]
GPIO[0]
+3.3V_NORMAL
R12 037 2 K
R12 036 2 K
R12041 1K
R12042 27K
R12045
1.6K 1%
Closed to D13
R12032 1K
R12099 2K
R12003 2K
R12044
1.6K 1%
Closed to D13
HDMI1_DDC_CK
HDMI1_DDC_DA
+3.3V_NORMAL
R12039 27K
HDMI0_DDC_CK
HDMI0_DDC_DA
HDMI0_DDC_CK
HDMI0_DDC_DA
HDMI1_DDC_CK
HDMI1_DDC_DA
SPI_CS_M
SPI_MISO_M
FLASH_WP
SPI FLASH(4MByte)
R12060
10K
R12062
R12054
0
R12061
10K
OPT
SO/SIO1
33
P12001
12507WS-10L
1
2
3
4
5
6
7
8
9
10
11
IC12002
MX25L3206EM2I-12G
CS#
1
2
WP#
3
GND
4
Serial Flash Boot Test
+3.3V_NORMAL
R12068
1K
R12063 0
R12064 0
R12065 0
R12066 0
R12067 0
R12069 0
R12070 0
R12071 0
R12072 0
VCC
8
HOLD#
7
SCLK
6
SI/SIO0
5
OPT
OPT
R12073
3.3K
SPI_CS_M
SPI_MOSI_M
SPI_SCLK_M
SPI_MISO_M
SPI_DL_MODE
FLASH_WP
I2C_SDA2
I2C_SCL2
+3.3V_NORMAL
SPI_SCLK_M
SPI_MOSI_M
C12005
0.1uF
UART0 For system
JTAG2 for HEVC
+3.3V_NORMAL
R12089
4.7K
C12009
0.1uF
16V
UART_TX_1
C12008
0.1uF
16V
TDI_1
TMS_1
TCK_1
TDO_1
TRST_N_1
UART_RX_1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-119-HD
2013.12.17
Page 49
VDDC15_D14
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R12101
10K
100
VDDC15_D14
R12102
1K 1%
R12130
1K 1%
IC12000
LG1512D
M1_DDR_RESET_N_D14
M1_D_CLK_D14
R12 100
M1_D_CLKN_D14
M1_DDR_VREFCA_D14
0.1uF
C12100
OPT
DDR0_A[0]
DDR0_A[1]
DDR0_A[2]
DDR0_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR0_A[7]
DDR0_A[8]
DDR0_A[9]
DDR0_A[10]
DDR0_A[11]
DDR0_A[12]
DDR0_A[13]
DDR0_A[14]
DDR0_A[15]
DDR0_BA[0]
DDR0_BA[1]
DDR0_BA[2]
DDR0_U_CK
DDR0_U_CK_N
DDR0_D_CK
DDR0_D_CK_N
DDR0_CKE
DDR0_ODT
DDR0_RAS_N
DDR0_CAS_N
DDR0_WE_N
DDR0_RST_N
DDR0_ZQ_CALIB
DDR0_DQS[0]
DDR0_DQS_N[0]
DDR0_DQS[1]
DDR0_DQS_N[1]
DDR0_DQS[2]
DDR0_DQS_N[2]
DDR0_DQS[3]
DDR0_DQS_N[3]
DDR0_DM[0]
DDR0_DM[1]
DDR0_DM[2]
DDR0_DM[3]
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[18]
DDR0_DQ[19]
DDR0_DQ[20]
DDR0_DQ[21]
DDR0_DQ[22]
DDR0_DQ[23]
DDR0_DQ[24]
DDR0_DQ[25]
DDR0_DQ[26]
DDR0_DQ[27]
DDR0_DQ[28]
DDR0_DQ[29]
DDR0_DQ[30]
DDR0_DQ[31]
M1_DDR_CKE_D14
V13
V15
V11
V9
W17
W9
W16
V10
V17
V12
W18
W15
W14
W11
V16
V14
W8
V18
W12
Y17
AA17
Y8
AA8
W13
V7
W6
W7
V8
W10
V6
AA7
Y7
AA9
AB9
AA16
Y16
AA18
AB18
AB10
AB7
AB19
AB16
AA5
AA12
Y4
Y11
AB4
AB12
AA4
Y12
AA11
AA6
Y10
Y5
Y9
AB6
AA10
Y6
AA14
Y20
Y13
AA21
AB13
AB21
AA13
Y21
AA20
AA15
Y19
Y14
Y18
AB15
AA19
Y15
100
R12 104
VDDC15_D14
R12105
1K 1%
R12106
1K 1%
M0_DDR_A0_D14
M0_DDR_A1_D14
M0_DDR_A2_D14
M0_DDR_A3_D14
M0_DDR_A4_D14
M0_DDR_A5_D14
M0_DDR_A6_D14
M0_DDR_A7_D14
M0_DDR_A8_D14
M0_DDR_A9_D14
M0_DDR_A10_D14
M0_DDR_A11_D14
M0_DDR_A12_D14
M0_DDR_A13_D14
M0_DDR_BA0_D14
M0_DDR_BA1_D14
M0_DDR_BA2_D14
M0_U_CLK_D14
M0_U_CLKN_D14
M0_D_CLK_D14
M0_D_CLKN_D14
M0_DDR_CKE_D14
M0_DDR_ODT_D14
M0_DDR_RASN_D14
M0_DDR_CASN_D14
M0_DDR_WEN_D14
M0_DDR_RESET_N_D14
R12108
240
1%
R12107
10K
M1_U_CLK_D14
M1_U_CLKN_D14
M1_1_DDR_VREFCA_D14
0.1uF
C12101
OPT
M0_DDR_DQS0_D14
M0_DDR_DQS_N0_D14
M0_DDR_DQS1_D14
M0_DDR_DQS_N1_D14
M0_DDR_DQS2_D14
M0_DDR_DQS_N2_D14
M0_DDR_DQS3_D14
M0_DDR_DQS_N3_D14
M0_DDR_DM0_D14
M0_DDR_DM1_D14
M0_DDR_DM2_D14
M0_DDR_DM3_D14
M0_DDR_DQ0_D14
M0_DDR_DQ1_D14
M0_DDR_DQ2_D14
M0_DDR_DQ3_D14
M0_DDR_DQ4_D14
M0_DDR_DQ5_D14
M0_DDR_DQ6_D14
M0_DDR_DQ7_D14
M0_DDR_DQ8_D14
M0_DDR_DQ9_D14
M0_DDR_DQ10_D14
M0_DDR_DQ11_D14
M0_DDR_DQ12_D14
M0_DDR_DQ13_D14
M0_DDR_DQ14_D14
M0_DDR_DQ15_D14
M0_DDR_DQ16_D14
M0_DDR_DQ17_D14
M0_DDR_DQ18_D14
M0_DDR_DQ19_D14
M0_DDR_DQ20_D14
M0_DDR_DQ21_D14
M0_DDR_DQ22_D14
M0_DDR_DQ23_D14
M0_DDR_DQ24_D14
M0_DDR_DQ25_D14
M0_DDR_DQ26_D14
M0_DDR_DQ27_D14
M0_DDR_DQ28_D14
M0_DDR_DQ29_D14
M0_DDR_DQ30_D14
M0_DDR_DQ31_D14
VDDC15_D14
R12109
R12110
M1_DDR_VREFDQ_D14
1K 1%
0.1uF
1K 1%
OPT
C12102
VDDC15_D14
R12112
10K
100
R12 111
VDDC15_D14
R12113
R12114
M0_DDR_CKE_D14
M0_DDR_RESET_N_D14
M0_D_CLK_D14
M0_D_CLKN_D14
M0_DDR_VREFCA_D14
1K 1%
0.1uF
1K 1%
OPT
C12103
VDDC15_D14
M1_1_DDR_VREFDQ_D14
R12115
1K 1%
R12116
1K 1%
C12104
OPT
0.1uF
100
R12 117
VDDC15_D14
R12118
1K 1%
R12119
1K 1%
R12120
10K
M0_U_CLK_D14
M0_U_CLKN_D14
M0_1_DDR_VREFCA_D14
0.1uF
OPT
C12105
IC12000
LG1512D
VDDC15_D14
R12121
1K 1%
R12122
1K 1%
DDR1_A[0]
DDR1_A[1]
DDR1_A[2]
DDR1_A[3]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR1_A[7]
DDR1_A[8]
DDR1_A[9]
DDR1_A[10]
DDR1_A[11]
DDR1_A[12]
DDR1_A[13]
DDR1_A[14]
DDR1_A[15]
DDR1_BA[0]
DDR1_BA[1]
DDR1_BA[2]
DDR1_U_CK
DDR1_U_CK_N
DDR1_D_CK
DDR1_D_CK_N
DDR1_CKE
DDR1_ODT
DDR1_RAS_N
DDR1_CAS_N
DDR1_WE_N
DDR1_RST_N
DDR1_ZQ_CALIB
DDR1_DQS[0]
DDR1_DQS_N[0]
DDR1_DQS[1]
DDR1_DQS_N[1]
DDR1_DQS[2]
DDR1_DQS_N[2]
DDR1_DQS[3]
DDR1_DQS_N[3]
DDR1_DM[0]
DDR1_DM[1]
DDR1_DM[2]
DDR1_DM[3]
DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]
DDR1_DQ[16]
DDR1_DQ[17]
DDR1_DQ[18]
DDR1_DQ[19]
DDR1_DQ[20]
DDR1_DQ[21]
DDR1_DQ[22]
DDR1_DQ[23]
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]
M0_DDR_VREFDQ_D14
0.1uF
OPT
C12106
L5
N5
J5
G5
T4
H4
R4
H5
R5
K5
U4
P4
N4
K4
P5
M5
G4
T5
L4
T3
T2
G3
G2
M4
E5
E4
F4
F5
J4
U5
F2
F3
H2
H1
R2
R3
U2
U1
J1
F1
V1
R1
D2
L2
C3
K3
C1
L1
C2
L3
K2
E2
J3
D3
H3
E1
J2
E3
N2
W3
M3
Y2
M1
Y1
M2
Y3
W2
P2
V3
N3
U3
P1
V2
P3
240
VDDC15_D14
1%
M0_1_DDR_VREFDQ_D14
R12124
1K 1%
0.1uF
R12125
1K 1%
OPT
C12107
M1_DDR_A0_D14
M1_DDR_A1_D14
M1_DDR_A2_D14
M1_DDR_A3_D14
M1_DDR_A4_D14
M1_DDR_A5_D14
M1_DDR_A6_D14
M1_DDR_A7_D14
M1_DDR_A8_D14
M1_DDR_A9_D14
M1_DDR_A10_D14
M1_DDR_A11_D14
M1_DDR_A12_D14
M1_DDR_A13_D14
M1_DDR_BA0_D14
M1_DDR_BA1_D14
M1_DDR_BA2_D14
M1_U_CLK_D14
M1_U_CLKN_D14
M1_D_CLK_D14
M1_D_CLKN_D14
M1_DDR_CKE_D14
M1_DDR_ODT_D14
M1_DDR_RASN_D14
M1_DDR_CASN_D14
M1_DDR_WEN_D14
M1_DDR_RESET_N_D14
R12123
M1_DDR_DQS0_D14
M1_DDR_DQS_N0_D14
M1_DDR_DQS1_D14
M1_DDR_DQS_N1_D14
M1_DDR_DQS2_D14
M1_DDR_DQS_N2_D14
M1_DDR_DQS3_D14
M1_DDR_DQS_N3_D14
M1_DDR_DM0_D14
M1_DDR_DM1_D14
M1_DDR_DM2_D14
M1_DDR_DM3_D14
M1_DDR_DQ0_D14
M1_DDR_DQ1_D14
M1_DDR_DQ2_D14
M1_DDR_DQ3_D14
M1_DDR_DQ4_D14
M1_DDR_DQ5_D14
M1_DDR_DQ6_D14
M1_DDR_DQ7_D14
M1_DDR_DQ8_D14
M1_DDR_DQ9_D14
M1_DDR_DQ10_D14
M1_DDR_DQ11_D14
M1_DDR_DQ12_D14
M1_DDR_DQ13_D14
M1_DDR_DQ14_D14
M1_DDR_DQ15_D14
M1_DDR_DQ16_D14
M1_DDR_DQ17_D14
M1_DDR_DQ18_D14
M1_DDR_DQ19_D14
M1_DDR_DQ20_D14
M1_DDR_DQ21_D14
M1_DDR_DQ22_D14
M1_DDR_DQ23_D14
M1_DDR_DQ24_D14
M1_DDR_DQ25_D14
M1_DDR_DQ26_D14
M1_DDR_DQ27_D14
M1_DDR_DQ28_D14
M1_DDR_DQ29_D14
M1_DDR_DQ30_D14
M1_DDR_DQ31_D14
M0_DDR_A0_D14
M0_DDR_A1_D14
M0_DDR_A2_D14
M0_DDR_A3_D14
M0_DDR_A4_D14
M0_DDR_A5_D14
M0_DDR_A6_D14
M0_DDR_A7_D14
M0_DDR_A8_D14
M0_DDR_A9_D14
M0_DDR_A10_D14
M0_DDR_A11_D14
M0_DDR_A12_D14
M0_DDR_A13_D14
M0_DDR_BA0_D14
M0_DDR_BA1_D14
M0_DDR_BA2_D14
M0_D_CLK_D14
M0_D_CLKN_D14
M0_DDR_CKE_D14
M0_DDR_ODT_D14
M0_DDR_RASN_D14
M0_DDR_CASN_D14
M0_DDR_WEN_D14
M0_DDR_RESET_N_D14
M0_DDR_DQS0_D14
M0_DDR_DQS_N0_D14
M0_DDR_DQS1_D14
M0_DDR_DQS_N1_D14
M0_DDR_DM0_D14
M0_DDR_DM1_D14
M0_DDR_DQ0_D14
M0_DDR_DQ1_D14
M0_DDR_DQ2_D14
M0_DDR_DQ3_D14
M0_DDR_DQ4_D14
M0_DDR_DQ5_D14
M0_DDR_DQ6_D14
M0_DDR_DQ7_D14
M0_DDR_DQ8_D14
M0_DDR_DQ9_D14
M0_DDR_DQ10_D14
M0_DDR_DQ11_D14
M0_DDR_DQ12_D14
M0_DDR_DQ13_D14
M0_DDR_DQ14_D14
M0_DDR_DQ15_D14
M1_DDR_A0_D14
M1_DDR_A1_D14
M1_DDR_A2_D14
M1_DDR_A3_D14
M1_DDR_A4_D14
M1_DDR_A5_D14
M1_DDR_A6_D14
M1_DDR_A7_D14
M1_DDR_A8_D14
M1_DDR_A9_D14
M1_DDR_A10_D14
M1_DDR_A11_D14
M1_DDR_A12_D14
M1_DDR_A13_D14
M1_DDR_BA0_D14
M1_DDR_BA1_D14
M1_DDR_BA2_D14
M1_D_CLK_D14
M1_D_CLKN_D14
M1_DDR_CKE_D14
M1_DDR_ODT_D14
M1_DDR_RASN_D14
M1_DDR_CASN_D14
M1_DDR_WEN_D14
M1_DDR_RESET_N_D14
M1_DDR_DQS0_D14
M1_DDR_DQS_N0_D14
M1_DDR_DQS1_D14
M1_DDR_DQS_N1_D14
M1_DDR_DM0_D14
M1_DDR_DM1_D14
M1_DDR_DQ0_D14
M1_DDR_DQ1_D14
M1_DDR_DQ2_D14
M1_DDR_DQ3_D14
M1_DDR_DQ4_D14
M1_DDR_DQ5_D14
M1_DDR_DQ6_D14
M1_DDR_DQ7_D14
M1_DDR_DQ8_D14
M1_DDR_DQ9_D14
M1_DDR_DQ10_D14
M1_DDR_DQ11_D14
M1_DDR_DQ12_D14
M1_DDR_DQ13_D14
M1_DDR_DQ14_D14
M1_DDR_DQ15_D14
H5TQ1G63EFR-PBC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC12100
H5TQ1G63EFR-PBC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
NC_7
NC_5
BA0
BA1
BA2
CK
CK
CKE
CS
ODT
RAS
CAS
WE
RESET
DQSL
DQSL
DQSU
DQSU
DML
DMU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DDR3
1Gbit
(x16)
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2
F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
IC12101
DDR3
1Gbit
(x16)
VREFCA
VREFDQ
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
NC_1
NC_2
NC_3
NC_4
NC_6
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
M8
H1
L8
ZQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M0_DDR_VREFCA_D14
M8
H1
R12127
L8
ZQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M1_DDR_VREFCA_D14
M1_DDR_VREFDQ_D14
R12126
240
1%
M0_DDR_VREFDQ_D14
VDDC15_D14
240
1%
VDDC15_D14
C12108
C12109
C12110
C12111
0.1uF
0.1uF
0.1uF
0.1uF
M0_DDR_A0_D14
M0_DDR_A1_D14
M0_DDR_A2_D14
M0_DDR_A3_D14
M0_DDR_A4_D14
M0_DDR_A5_D14
M0_DDR_A6_D14
M0_DDR_A7_D14
M0_DDR_A8_D14
M0_DDR_A9_D14
M0_DDR_A10_D14
M0_DDR_A11_D14
M0_DDR_A12_D14
M0_DDR_A13_D14
M0_DDR_BA0_D14
M0_DDR_BA1_D14
M0_DDR_BA2_D14
M0_U_CLK_D14
M0_U_CLKN_D14
M0_DDR_CKE_D14
M0_DDR_ODT_D14
M0_DDR_RASN_D14
M0_DDR_CASN_D14
M0_DDR_WEN_D14
M0_DDR_RESET_N_D14
M0_DDR_DQS2_D14
M0_DDR_DQS_N2_D14
M0_DDR_DQS3_D14
M0_DDR_DQS_N3_D14
M0_DDR_DM2_D14
M0_DDR_DM3_D14
M0_DDR_DQ16_D14
M0_DDR_DQ17_D14
M0_DDR_DQ18_D14
M0_DDR_DQ19_D14
M0_DDR_DQ20_D14
M0_DDR_DQ21_D14
M0_DDR_DQ22_D14
M0_DDR_DQ23_D14
M0_DDR_DQ24_D14
M0_DDR_DQ25_D14
M0_DDR_DQ26_D14
M0_DDR_DQ27_D14
M0_DDR_DQ28_D14
M0_DDR_DQ29_D14
M0_DDR_DQ30_D14
M0_DDR_DQ31_D14
M1_DDR_A0_D14
M1_DDR_A1_D14
M1_DDR_A2_D14
M1_DDR_A3_D14
M1_DDR_A4_D14
M1_DDR_A5_D14
M1_DDR_A6_D14
M1_DDR_A7_D14
M1_DDR_A8_D14
M1_DDR_A9_D14
M1_DDR_A10_D14
M1_DDR_A11_D14
M1_DDR_A12_D14
M1_DDR_A13_D14
M1_DDR_BA0_D14
M1_DDR_BA1_D14
M1_DDR_BA2_D14
M1_U_CLK_D14
M1_U_CLKN_D14
M1_DDR_CKE_D14
M1_DDR_ODT_D14
M1_DDR_RASN_D14
M1_DDR_CASN_D14
M1_DDR_WEN_D14
M1_DDR_RESET_N_D14
M1_DDR_DQS2_D14
M1_DDR_DQS_N2_D14
M1_DDR_DQS3_D14
M1_DDR_DQS_N3_D14
M1_DDR_DM2_D14
M1_DDR_DM3_D14
M1_DDR_DQ16_D14
M1_DDR_DQ17_D14
M1_DDR_DQ18_D14
M1_DDR_DQ19_D14
M1_DDR_DQ20_D14
M1_DDR_DQ21_D14
M1_DDR_DQ22_D14
M1_DDR_DQ23_D14
M1_DDR_DQ24_D14
M1_DDR_DQ25_D14
M1_DDR_DQ26_D14
M1_DDR_DQ27_D14
M1_DDR_DQ28_D14
M1_DDR_DQ29_D14
M1_DDR_DQ30_D14
M1_DDR_DQ31_D14
IC12103
H5TQ1G63EFR-PBC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC12102
H5TQ1G63EFR-PBC
DDR3
N3
A0
1Gbit
P7
A1
(x16)
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR3
1Gbit
(x16)
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
ZQ
ZQ
M8
H1
L8
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M0_1_DDR_VREFCA_D14
M8
H1
R12129
L8
240
1%
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
M1_1_DDR_VREFCA_D14
M1_1_DDR_VREFDQ_D14
R12128
240
1%
M0_1_DDR_VREFDQ_D14
VDDC15_D14
C12114
C12115
VDDC15_D14
C12112
C12113
0.1uF
0.1uF
0.1uF
0.1uF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-121-HD
2013.12.17
D14_DDR
Page 50
+1.1V_VDD_D14
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+12V
L12213
BLM18PG121SN1D
C12277
10uF
16V
1.0V_DCDC_TI
POWER_ON/OFF2_4
C12203
22uF
OPT
2.5V
ZD12200
C12204
0.1uF
C12280-*1
3300pF
50V
C12213
0.1uF
16V
C12212
C12205
22uF
22uF
+1.5V
R12218
18K
R1
1%
C12278
100pF
50V
+1.1V_VDD
R12204
10K
1%
0.1uF
4.7
R12203
5%
R12221
C12279
1uF
10V
1%
1/1 6W
16V
C12217
30V
10K
91K
1/1 6W
R12 206
27K
RF
R12 205
PGOOD
EN
VBST
NC_1
SW_1
SW_2
SW_3
SW_4
D12200
EN
FB
VREG
SS
C12280
2200pF
50V
1.0V_DCDC_ROHM
C12214
1000pF
50V
R12201 1K
R12200
2K
1/16W
5%
L12200
1uH
R12219
3.6K
1%
R12220
22K
1%
R2
R12202
3.3
1/10W
C12215
470pF
50V
Vout=0.765*(1+R1/R2)=1.516V
[EP]
1
THERMAL
2
29
3
IC12200
4
TPS53513RVER
5
6
7
8
8A
9
10
PGND_111PGND_212PGND_313PGND_414PGND_5
POWER_ON/OFF2_3
DCDC_ROHM
IC12201
BD9D320EFJ
1
2
THERMAL
3
4
3A
R12207
39K
1/16W
5%
9
TRIP26NC_327GND128GND2
8
7
6
5
24VO25
[EP]FIN
VIN
BOOT
SW
GND
23
22
21
20
19
18
17
16
15
FB
GND
MODE
VREG
VDD
NC_2
VIN_3
VIN_2
VIN_1
0.1uF
16V
C12281
R1
R12216
R2
R12217
C12220
2200pF
50V
L12214
2.2uH
NR5040T2R2N
C12282
22uF
4.87K
4.99K
10V
1/16W
1%
1/16W
1%
1%
VDDC15_D14
1/16W
20K
R12222
C12283
22uF
10V
C12221
1uF
10V
EN
VFB
VREG5
SS
ZD12201
2.5V
OPT
L12201
DCDC_TI
IC12201-*1
TPS54327DDAR
1
2
THERMAL
3
4
C12222
10uF
16V
9
+12V
+1.1V_Bypass Cap
+1.1V_VDD_D14
C12223
10uF
16V
0.1uF C12210
C12209 4.7uF
C12207 10uF
C12236 0.1uF
C12239 0.1uF
C12211 10uF
C12200 0.1uF
4th layer
C12230 10uF
C12227 22uF
C12225 0.1uF C12224 10uF
C12228 0.1uF
C12233 1uF
C12206 10uF
4th layer
C12226 22uF
VDDC11_XTAL_D14
L12203
BLM18PG121SN1D
1uF C12216
[EP]GND
VIN
8
VBST
7
SW
6
GND
5
+3.3V_Bypass Cap
+3.3V_NORMAL
VDD33_D14
L12205
BLM18PG121SN1D
22uF
C12218
VDD33_XTAL_D14
L12206
BLM18PG121SN1D
4.7uF C12219
+1.5V_Bypass Cap
VDDC15_D14
22uF C12250
VREF_M0_0_D14
R12208
1K 1%
VREF_M0_1_D14
R12209
1K 1%
+2.5V_Bypass Cap
+2.5V_Normal
L12210
BLM18PG121SN1D
22uF
C12253
VDD25_XTAL_D14
L12209
BLM18PG121SN1D
4.7uF C12254
0.1uF
0.1uF
C12258
C12255
C12251
0.1uF
OPT
C12252
0.1uF
OPT
VDD25_D14
C12259 0.1uF
C12256 10uF
C12257 0.1uF
C12201 10uF
4th layer
R12210
1K 1%
R12211
1K 1%
4th layer
C12208 10uF
VDDC15_D14
22uF C12264
0.1uF
C12267
VREF_M1_0_D14
R12212
1K 1%
VREF_M1_1_D14
R12213
1K 1%
0.1uF
C12268
R12214
1K 1%
C12265
0.1uF
OPT
R12215
1K 1%
C12266
0.1uF
OPT
C12202 10uF
4th layer
VREF_M0_1_D14
VREF_M1_0_D14
VREF_M1_1_D14
VDDC11_XTAL_D14
VDDC15_D14
VDDC15_D14
VDD25_D14
VDD25_XTAL_D14
VDD33_XTAL_D14
VREF_M0_0_D14
+1.1V_VDD_D14
VDD33_D14
AA22
J13
J14
J11
J12
H9
J9
J15
K9
K15
L9
L15
M9
M15
N15
P9
P10
P11
P12
P13
P15
B4
A4
T9
T10
T11
T12
T13
T14
T15
T16
T17
G7
H7
J7
K7
L7
M7
N7
P7
R7
H13
H14
H11
H12
H15
B5
F8
F12
F13
H10
H16
J16
K16
L16
M16
N16
P16
T8
A5
AB3
B1
AA1
A2
A14
B2
C4
C5
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
E6
E7
E8
E9
IC12000
LG1512D
AVDD11_HDMI0_1
AVDD11_HDMI0_2
AVDD11_HDMI1_1
AVDD11_HDMI1_2
DVDD11_1
DVDD11_2
DVDD11_3
DVDD11_4
DVDD11_5
DVDD11_6
DVDD11_7
DVDD11_8
DVDD11_9
DVDD11_10
DVDD11_11
DVDD11_12
DVDD11_13
DVDD11_14
DVDD11_15
DVDD11_16
DVDD11_PLL
DVDD11_XTAL
DVDD15_DDR0_1
DVDD15_DDR0_2
DVDD15_DDR0_3
DVDD15_DDR0_4
DVDD15_DDR0_5
DVDD15_DDR0_6
DVDD15_DDR0_7
DVDD15_DDR0_8
DVDD15_DDR0_9
DVDD15_DDR1_1
DVDD15_DDR1_2
DVDD15_DDR1_3
DVDD15_DDR1_4
DVDD15_DDR1_5
DVDD15_DDR1_6
DVDD15_DDR1_7
DVDD15_DDR1_8
DVDD15_DDR1_9
AVDD25_HDMI0_1
AVDD25_HDMI0_2
AVDD25_HDMI1_1
AVDD25_HDMI1_2
DVDD25_OTP
DVDD25_PLL
DVDD33_1
DVDD33_2
DVDD33_3
DVDD33_4
DVDD33_5
DVDD33_6
DVDD33_7
DVDD33_8
DVDD33_9
DVDD33_10
DVDD33_11
DVDD33_12
DVDD33_XTAL
VREF0_DDR0
VREF1_DDR0
VREF0_DDR1
VREF1_DDR1
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
F6
F7
F9
F10
F11
F14
F15
F16
F17
F18
F19
G6
G18
G19
H6
H18
H19
J6
J10
J18
J19
K6
K10
K11
K12
K13
K14
K18
L6
L10
L11
L12
L13
L14
L18
M6
M10
M11
M12
M13
M14
M18
N6
N9
N10
N11
N12
N13
N14
N18
P6
P14
P18
R6
R18
R19
R20
T6
T7
T18
T19
U6
U7
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
U18
U19
V4
V5
V19
W4
W5
W19
AA2
AA3
AB2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-122-HD
2013.12.17
Page 51
UB85/95/UC89 only
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.3V_NORMAL
L2100
BLM18PG121SN1D
C2106
10uF
10V
VDDP
C2111
10uF
10V
C2120
10uF
10V
C2128
1uF
10V
C2134
0.1uF
16V
C2139
0.1uF
16V
C2143
0.1uF
16V
C2145
0.1uF
16V
4st Layer
C13314
0.1uF
16V
C13315
10uF
10V
TXB0N/TX5N
TXB0P/TX5P
TXB1N/TX4N
TXB1P/TX4P
TXB2N/TX3N
TXB2P/TX3P
TXBCLKN/TX2N
TXBCLKP/TX2P
TXB3N/TX1N
TXB3P/TX1P
TXB4N/TX0N
TXB4P/TX0P
TXA0N/TX11N
TXA0P/TX11P
TXA1N/TX10N
TXA1P/TX10P
TXA2N/TX9N
TXA2P/TX9P
TXACLKN/TX8N
TXACLKP/TX8P
TXA3N/TX7N
TXA3P/TX7P
TXA4N/TX6N
TXA4P/TX6P
TXD0N/TX17N
TXD0P/TX17P
TXD1N/TX16N
TXD1P/TX16P
TXD2N/TX15N
TXD2P/TX15P
TXDCLKN/TX14N
TXDCLKP/TX14P
TXD3N/TX13N
TXD3P/TX13P
TXD4N/TX12N
TXD4P/TX12P
TXC0N/TX23N
TXC0P/TX23P
TXC1N/TX22N
TXC1P/TX22P
TXC2N/TX21N
TXC2P/TX21P
TXCCLKN/TX20N
TXCCLKP/TX20P
TXC3N/TX19N
TXC3P/TX19P
TXC4N/TX18N
TXC4P/TX18P
AK10
AL10
AM10
AK11
AM11
AL11
AK12
AL12
AK13
AL13
AM13
AK14
AM14
AL14
AK15
AL15
AK16
AL16
AG2
RB0N
AG1
RB0P
AH3
RB1N
AH1
RB1P
AH2
RB2N
AJ3
RB2P
AJ2
RBCKN
AK2
RBCKP
AK1
RB3N
AL1
RB3P
AM2
RB4N
AL2
RB4P
AK3
RC0N
AL3
RC0P
AK4
RC1N
AL4
RC1P
AM4
RC2N
AK5
RC2P
AM5
RCCKN
AL5
RCCKP
AK6
RC3N
AL6
RC3P
AK7
RC4N
AL7
RC4P
AM7
RD0N
AK8
RD0P
AM8
RD1N
AL8
RD1P
AK9
RD2N
AL9
RD2P
RDCKN
RDCKP
RD3N
RD3P
RD4N
RD4P
RE0N
RE0P
RE1N
RE1P
RE2N
RE2P
RECKN
RECKP
RE3N
RE3P
RE4N
RE4P
IC2500
LGE7411(URSA9)
VX1_0VX1_0+
VX1_1VX1_1+
VX1_2VX1_2+
VX1_3VX1_3+
VX1_4VX1_4+
VX1_5VX1_5+
VX1_6VX1_6+
VX1_7VX1_7+
VX1_8VX1_8+
VX1_9-
VX1_9+
VX1_10VX1_10+
VX1_11VX1_11+
VX1_12VX1_12+
VX1_13VX1_13+
VX1_14VX1_14+
VX1_15VX1_15+
VX1_16VX1_16+
VX1_17VX1_17+
VX1_18VX1_18+
VX1_19VX1_19+
VX1_HTDPN
VX1_LOCKN
AM17
AK17
AL18
AK18
AM19
AL19
AL20
AM20
AK22
AL21
AK23
AM22
AK24
AL23
AL25
AK25
AM26
AK26
AL27
AK27
AM28
AL28
AL29
AM29
AM31
AL30
AL32
AL31
AK31
AK32
AJ30
AJ31
AH30
AH32
AG30
AG31
AE31
AF30
AD32
AE30
AH29
AG29
C13008 0.1uF
C13009 0.1uF
C13010 0.1uF
C13011 0.1uF
C13012 0.1uF
C13013 0.1uF
C13014 0.1uF
C13015 0.1uF
C13016 0.1uF
C13017 0.1uF
C13018 0.1uF
C13019 0.1uF
C13020 0.1uF
C13022 0.1uF
C13023 0.1uF
C13024 0.1uF
C13025 0.1uF
C13026 0.1uF
C13027 0.1uF
C13028 0.1uF
C13029 0.1uF
C13030 0.1uF
C13031 0.1uF
C13064 0.1uF
C13065 0.1uF
C13066 0.1uF
C13067 0.1uF
C13068 0.1uF
C13069 0.1uF
C13070 0.1uF
C13071 0.1uF
R1938
10K
URSA_TX_HTPD_pulldown
TXDBN7_L
TXDBP7_L
TXDBN6_L
TXDBP6_L
TXDBN5_L
TXDBP5_L
TXDBN4_L
TXDBP4_L
TXDBN3_L
TXDBP3_L
TXDBN2_L
TXDBP2_L
TXDBN1_L
TXDBP1_L C13021 0.1uF
TXDBN0_L
TXDBP0_L
TXDAN7_L
TXDAP7_L
TXDAN6_L
TXDAP6_L
TXDAN5_L
TXDAP5_L
TXDAN4_L
TXDAP4_L
TXDAN3_L
TXDAP3_L
TXDAN2_L
TXDAP2_L
TXDAN1_L
TXDAP1_L
TXDAN0_L
TXDAP0_L
HTPDAn
HDMI_CLK+_URSA9_0
HDMI_CLK-_URSA9_0
HDMI_RX0+_URSA9_0
HDMI_RX0-_URSA9_0
HDMI_RX1+_URSA9_0
HDMI_RX1-_URSA9_0
HDMI_RX2+_URSA9_0
HDMI_RX2-_URSA9_0
HDMI_CLK+_URSA9_1
HDMI_CLK-_URSA9_1
HDMI_RX0+_URSA9_1
HDMI_RX0-_URSA9_1
HDMI_RX1+_URSA9_1
HDMI_RX1-_URSA9_1
HDMI_RX2+_URSA9_1
HDMI_RX2-_URSA9_1
IC2500
LGE7411(URSA9)
D1
HDMI_RXCP_0
D3
HDMI_RXCN_0
E3
HDMI_RX0P_0
D2
HDMI_RX0N_0
F3
HDMI_RX1P_0
E2
HDMI_RX1N_0
F1
HDMI_RX2P_0
F2
HDMI_RX2N_0
G1
HDMI_RXCP_1
G3
HDMI_RXCN_1
H3
HDMI_RX0P_1
G2
HDMI_RX0N_1
J3
HDMI_RX1P_1
H2
HDMI_RX1N_1
J1
HDMI_RX2P_1
J2
HDMI_RX2N_1
VDDC
C2100
10uF
10V
L2101
BLM18PG121SN1D
AVDD_MOD
L2102
BLM18PG121SN1D
C2101
10uF
10V
AVDD_PLL
C2105
10uF
10V
C2104
10uF
10V
L2104
BLM18PG121SN1D
L2105
BLM18PG121SN1D
4st Layer
C2109
0.1uF
16V
C13302
0.1uF
16V
C2151
10uF
10V
Close to Chip side
C2110
10uF
10V
VDDC
AVDDL_MOD
AVDDL_DRV
C2114
10uF
10V
C2115
0.1uF
16V
C2116
0.1uF
16V
C2119
10uF
10V
C2122
10uF
10V
C2123
0.1uF
16V
C2124
0.1uF
16V
C2127
0.1uF
16V
C2132
10uF
10V
C13311
10uF
10V
C13310
10uF
10V
Close to Chip side
4th Layer
C2133
0.1uF
16V
C2138
0.1uF
16V
C2142
0.1uF
16V
Close to Chip side
C2137
1uF
10V
C2144
0.1uF
16V
4th Layer
C13305
0.1uF
16V
C2146
0.1uF
16V
Close to Chip side
C2154
10uF
10V
Close to Chip side
4th Layer
C13304
0.1uF
16V
C2153
10uF
10V
C13306
0.1uF
16V
C2147
0.1uF
16V
C2148
0.1uF
16V
C2149
0.1uF
16V
4th Layer
C13307
0.1uF
16V
C2150
10uF
10V
C2107
10uF
10V
AE2
VBY1_RXM[0]
AE1
VBY1_RXP[0]
AD2
AE3
AC2
AD3
AC3
AC1
AB2
AB1
AA2
AB3
Y2
AA3
Y3
Y1
W2
W1
V2
W3
U2
V3
U3
U1
VBY1_RXM[1]
VBY1_RXP[1]
VBY1_RXM[2]
VBY1_RXP[2]
VBY1_RXM[3]
VBY1_RXP[3]
VBY1_RXM[4]
VBY1_RXP[4]
VBY1_RXM[5]
VBY1_RXP[5]
VBY1_RXM[6]
VBY1_RXP[6]
VBY1_RXM[7]
VBY1_RXP[7]
VBY1_RXM[8]
VBY1_RXP[8]
VBY1_RXM[9]
VBY1_RXP[9]
VBY1_RXM[10]
VBY1_RXP[10]
VBY1_RXM[11]
VBY1_RXP[11]
+3.3V_NORMAL
R1939
10K
B
22
R1952
LD1 900
SML -512 UW
R1943
220
E
Q1901
MMBT3906(NXP)
C
LOCKAn
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI_TX_DDC_CLK
HDMI_TX_DDC_SDA
HDMI_TX_DDC_CLK
HDMI_TX_DDC_SDA
HDMI_CLK+
HDMI_CLK-
HDMI_RX0+
HDMI_RX0-
HDMI_RX1+
HDMI_RX1-
HDMI_RX2+
HDMI_RX2-
HDMI OUTPUT to H13
R1996
22
N4
R1997
22
M4
N1
P1
N3
N2
M3
M2
L1
L2
HDMITX_SCL
HDMITX_SDA
HDMI_TXCP
HDMI_TXCN
HDMI_TX0P
HDMI_TX0N
HDMI_TX1P
HDMI_TX1N
HDMI_TX2P
HDMI_TX2N
GND Connection at Vx1 41pin wafer
GND_Vx1_2
(pin 8)
GND_Vx1
(pin 5,11,14)
R12900
Non_LGD_Module
R12901
Non_UB95
DVDD_DDR
L2106
BLM18PG121SN1D
C2125
C2117
0.1uF
0.1uF
16V
16V
AVDDL_HDMI_TX_RX
L2107
BLM18PG121SN1D
C2126
C2118
0.1uF
0.1uF
16V
16V
0
0
L13300
BLM18PG121SN1D
AVDDL_LVDSRX
C13300
0.1uF
16V
C13301
0.1uF
16V
C13312
4.7uF
10V
C2131
0.1uF
16V
C13308
10uF
10V
Close to Chip side
4th Layer
C2152
10uF
10V
C13303
0.1uF
16V
C13313
4.7uF
10V
Close to Chip side
C13309
10uF
10V
BSD-14Y-UD-128-02-HD
2013.12.17
U_LVDS INPUT
Page 52
[51P Vx1
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
output wafer]
51pin_Wafer
P13000
FI-RE51S-HF-J-R1500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
R13011 10K
Non_INX_Module
R13033 10K
R13006 0
3D_EN_LGD_120Hz
TXDAP7_L
TXDAN7_L
TXDAP6_L
TXDAN6_L
TXDAP5_L
TXDAN5_L
TXDAP4_L
TXDAN4_L
TXDAP3_L
TXDAN3_L
TXDAP2_L
TXDAN2_L
TXDAP1_L
TXDAN1_L
TXDAP0_L
TXDAN0_L
LOCKn_IN
HTPDn_IN
OPT
R13005 0
Non_LGD_60Hz
MLB-201209-0120P-N2
51pin_12V
C13032
10uF
25V
51pin_12V
+3.3V_NORMAL
*Pin31(BIT_SEL)
HIGH or NC : 10Bit
LOW : 8Bit
*Pin35(PCID)
High:PCID enable
3D_EN
Low or NC : PCID diable
*Pin38
Non_LGD_60Hz: T120 module(UB85)
R13001 0
OLED
R13002 0
R13009
0
Non_OLED & Non_AUO_Module
Non_OLED & Non_AUO_Module
L13000
PANEL_VCC
C13033
10uF
25V
51pin_12V
OLED
R13010
0
R13003
10K
OPT
R13004
10K
LGD_Module
EL_VDD_DETECT_22V
INV_CTL
Compensation_Done
LOCKn_IN
HTPDn_IN
+3.3V_NORMAL
R13034
10K
OPT
R13037 0
Non_AUO_Module
R13007
10K
Non_AUO_Module
L13001
BLM18PG121SN1D
OLED
+3.3V_NORMAL
+1.8V
R1505
4.7K
URSA_TX_HTPD_Pullup
+3.3V_NORMAL
R13044
10K
OPT
R13016 0
LGD_Module
R13045
10K
LGD_Module
R13040
10K
OPT
R13015 0
LGD_Module
R13041
10K
LGD_Module
R1504
1.5K
Q1404
G
AO3438
LOCKAn
D
S
+1.8V
R209
4.7K
URSA_TX_HTPD_Pullup
R221
0
L_DIM_EN
+3.3V_NORMAL
+3.3V_NORMAL
URSA_TX_HTPD_Pullup
L/D_EN(Pin30)
- T-Con L/D Function
HIGH : Enable
LOW or NC : Disable
*LGD_120Hz: T240 module (UB98/95,D9)
R13018
4.7K
OPT
R13013 0
NON_D9_I2C
R13019
4.7K
OPT
R13012 0
NON_D9_I2C
Data_Format_1
Data_Format_0
EL_VDD_DETECT_22V
Vx1 LOCKAn/HTPDn
+3.3V_NORMAL
R211
1.5K
G
URSA_TX_HTPD_Pullup
S
Q203
AO3438
R220
0
OPT
R13014 0
0
R13017
R222
10K
URSA_TX_HTPD_Pullup
D
D9_I2C_SCL
TCON_I2C_EN
D9_I2C
G
S
D
Q13004
2N7002A
R13055
OPT
33
D9_I2C_SDA
G
D9_I2C
S
D
Non_AUO_Module
Q13005
2N7002A
R13059
OPT
33
Data Input Format[1:0]
R13061 0
Non_AUO_Module
TCON_I2C_EN
R13062 0
*Mode 3 (4 Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = High
*Mode 2 (2 Division)
- Data Format 0(Pin37) = High
Data Format 1(Pin36) = Low
HTPDAn
I2C_SCL1
I2C_SDA1
[41P Vx1
output wafer]
41pin_Wafer
P13001
FI-RE41S-HF-J-R1500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
D9_I2C_SCL
D9_I2C_SDA
TXDBP11_L
TXDBN11_L
TXDBP10_L
TXDBN10_L
TXDBP9_L
TXDBN9_L
TXDBP8_L
TXDBN8_L
TXDBP7_L
TXDBN7_L
TXDBP6_L
TXDBN6_L
TXDBP5_L
TXDBN5_L
TXDBP4_L
TXDBN4_L
TXDBP3_L
TXDBN3_L
TXDBP2_L
TXDBN2_L
TXDBP1_L
TXDBN1_L
TXDBP0_L
TXDBN0_L
GND_Vx1
GND_Vx1_2
+3.3V_NORMAL
IC13000
AZ1117EH-ADJTRG1
ADJ/GND
Not Used Net (UB85/95/UC89)
TXDBP11_L
TXDBN11_L
TXDBP10_L
TXDBN10_L
TXDBP9_L
TXDBN9_L
TXDBP8_L
TXDBN8_L
GND_Vx1
GND_Vx1_2
+1.8V
OUT IN
75
R13036
33
R13042
R13035
1
C13034
10uF
10V
C13035
10uF
10V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-130-HD
2013.12.17
Output_wafer
Page 53
A_DDR3_DQ[0-15]
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A_DDR3_DQ[16-31]
A_DDR3_A[0]
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]
A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]
A_DDR3_A[14]
A_DDR3_A[15]
A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]
A_DDR3_RASZ
A_DDR3_CASZ
A_DDR3_WEZ
A_DDR3_ODT
A_DDR3_CKE
A_DDR3_RESET
A_DDR3_MCLK
A_DDR3_MCLKZ
A_DDR3_CSB1
A_DDR3_CSB2
A_DDR3_DM0
A_DDR3_DM1
A_DDR3_DQS0
A_DDR3_DQS0B
A_DDR3_DQS1
A_DDR3_DQS1B
A_DDR3_DM2
A_DDR3_DM3
A_DDR3_DQS2
A_DDR3_DQS2B
A_DDR3_DQS3
A_DDR3_DQS3B
A_DDR3_DQ[0]
A_DDR3_DQ[1]
A_DDR3_DQ[2]
A_DDR3_DQ[3]
A_DDR3_DQ[4]
A_DDR3_DQ[5]
A_DDR3_DQ[6]
A_DDR3_DQ[7]
A_DDR3_DQ[8]
A_DDR3_DQ[9]
A_DDR3_DQ[10]
A_DDR3_DQ[11]
A_DDR3_DQ[12]
A_DDR3_DQ[13]
A_DDR3_DQ[14]
A_DDR3_DQ[15]
A_DDR3_DQ[16]
A_DDR3_DQ[17]
A_DDR3_DQ[18]
A_DDR3_DQ[19]
A_DDR3_DQ[21]
A_DDR3_DQ[22]
A_DDR3_DQ[23]
A_DDR3_DQ[24]
A_DDR3_DQ[25]
A_DDR3_DQ[26]
A_DDR3_DQ[27]
A_DDR3_DQ[28]
A_DDR3_DQ[29]
A_DDR3_DQ[30]
A_DDR3_DQ[31]
LGE7411(URSA9)
F14
A_DDR3_A0
B13
A_DDR3_A1
E13
A_DDR3_A2
D13
A_DDR3_A3
C14
A_DDR3_A4
F13
A_DDR3_A5
C13
A_DDR3_A6
B10
A_DDR3_A7
A12
A_DDR3_A8
C10
A_DDR3_A9
A14
A_DDR3_A10
B12
A_DDR3_A11
F15
A_DDR3_A12
C11
A_DDR3_A13
C12
A_DDR3_A14
D17
A_DDR3_A15
E14
A_DDR3_BA0
B14
A_DDR3_BA1
E15
A_DDR3_BA2
E17
A_DDR3_RASZ
C17
A_DDR3_CASZ
C16
A_DDR3_WEZ
F17
A_DDR3_ODT
C15
A_DDR3_CKE
B11
A_DDR3_RESETB
B16
A_DDR3_MCLK
A16
A_DDR3_MCLKZ
C9
A_DDR3_CSB1
A9
A_DDR3_CSB2
D23
A_DDR3_DQ0
A19
A_DDR3_DQ1
E22
A_DDR3_DQ2
B18
A_DDR3_DQ3
C23
A_DDR3_DQ4
C18
A_DDR3_DQ5
B22
A_DDR3_DQ6
A18
A_DDR3_DQ7
E19
A_DDR3_DQ8
B21
A_DDR3_DQ9
F18
A_DDR3_DQ10
C22
A_DDR3_DQ11
D20
A_DDR3_DQ12
F22
A_DDR3_DQ13
E18
A_DDR3_DQ14
D22
A_DDR3_DQ15
B19
A_DDR3_DM0
E21
A_DDR3_DM1
A21
A_DDR3_DQS0
B20
A_DDR3_DQS0B
C20
A_DDR3_DQS1
C19
A_DDR3_DQS1B
B27
A_DDR3_DQ16
A24
A_DDR3_DQ17
C27
A_DDR3_DQ18
C24
A_DDR3_DQ19
A28
A_DDR3_DQ20
E24
A_DDR3_DQ21
B28
A_DDR3_DQ22
B23
A_DDR3_DQ23
D25
A_DDR3_DQ24
E27
A_DDR3_DQ25
C25
A_DDR3_DQ26
D28
A_DDR3_DQ27
E26
A_DDR3_DQ28
E28
A_DDR3_DQ29
E25
A_DDR3_DQ30
C28
A_DDR3_DQ31
B24
A_DDR3_DM2
B26
A_DDR3_DM3
B25
A_DDR3_DQS2
A25
A_DDR3_DQS2B
D26
A_DDR3_DQS3
C26
A_DDR3_DQS3B
IC2500
B_DDR3_A0
B_DDR3_A1
B_DDR3_A2
B_DDR3_A3
B_DDR3_A4
B_DDR3_A5
B_DDR3_A6
B_DDR3_A7
B_DDR3_A8
B_DDR3_A9
B_DDR3_A10
B_DDR3_A11
B_DDR3_A12
B_DDR3_A13
B_DDR3_A14
B_DDR3_A15
B_DDR3_BA0
B_DDR3_BA1
B_DDR3_BA2
B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_ODT
B_DDR3_CKE
B_DDR3_RESETB
B_DDR3_MCLK
B_DDR3_MCLKZ
B_DDR3_CSB1
B_DDR3_CSB2
B_DDR3_DQ0
B_DDR3_DQ1
B_DDR3_DQ2
B_DDR3_DQ3
B_DDR3_DQ4
B_DDR3_DQ5
B_DDR3_DQ6
B_DDR3_DQ7
B_DDR3_DQ8
B_DDR3_DQ9
B_DDR3_DQ10
B_DDR3_DQ11
B_DDR3_DQ12
B_DDR3_DQ13
B_DDR3_DQ14
B_DDR3_DQ15
B_DDR3_DM0
B_DDR3_DM1
B_DDR3_DQS0
B_DDR3_DQS0B
B_DDR3_DQS1
B_DDR3_DQS1B
B_DDR3_DQ16
B_DDR3_DQ17
B_DDR3_DQ18
B_DDR3_DQ19
B_DDR3_DQ20
B_DDR3_DQ21
B_DDR3_DQ22
B_DDR3_DQ23
B_DDR3_DQ24
B_DDR3_DQ25
B_DDR3_DQ26
B_DDR3_DQ27
B_DDR3_DQ28
B_DDR3_DQ29
B_DDR3_DQ30
B_DDR3_DQ31
B_DDR3_DM2
B_DDR3_DM3
B_DDR3_DQS2
B_DDR3_DQS2B
B_DDR3_DQS3
B_DDR3_DQS3B
B_DDR3_BA[0]
B_DDR3_BA[1]
B_DDR3_BA[2]
B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_ODT
B_DDR3_CKE
B_DDR3_RESET
B_DDR3_MCLK
B_DDR3_MCLKZ
B_DDR3_CSB1
B_DDR3_CSB2
B_DDR3_DM0
B_DDR3_DM1
B_DDR3_DQS0
B_DDR3_DQS0B
B_DDR3_DQS1
B_DDR3_DQS1B
B_DDR3_DM2
B_DDR3_DM3
B_DDR3_DQS2
B_DDR3_DQS2B
B_DDR3_DQS3
B_DDR3_DQS3B
B_DDR3_A[0-15]
B_DDR3_DQ[0-15]
B_DDR3_DQ[16-31]
B_DDR3_A[0]
H27
B_DDR3_A[1]
G31
B_DDR3_A[2]
G28
B_DDR3_A[3]
G29
B_DDR3_A[4]
H30
B_DDR3_A[5]
G27
B_DDR3_A[6]
G30
B_DDR3_A[7]
D31
B_DDR3_A[8]
F32
B_DDR3_A[9]
D30
B_DDR3_A[10]
H32
B_DDR3_A[11]
F31
B_DDR3_A[12]
J27
B_DDR3_A[13]
E30
B_DDR3_A[14]
F30
B_DDR3_A[15]
L29
H28
H31
J28
L28
L30
K30
L27
J30
E31
K31
K32
C30
C32
B_DDR3_DQ[0]
U29
B_DDR3_DQ[1]
N32
B_DDR3_DQ[2]
T28
B_DDR3_DQ[3]
M31
B_DDR3_DQ[4]
U30
B_DDR3_DQ[5]
M30
B_DDR3_DQ[6]
T31
B_DDR3_DQ[7]
M32
B_DDR3_DQ[8]
N28
B_DDR3_DQ[9]
R31
B_DDR3_DQ[10]
M27
B_DDR3_DQ[11]
T30
B_DDR3_DQ[12]
P29
B_DDR3_DQ[13]
T27
B_DDR3_DQ[14]
M28
B_DDR3_DQ[15]
T29
N31
R28
R32
P31
P30
N30
B_DDR3_DQ[16]
AA31
B_DDR3_DQ[17]
V32
B_DDR3_DQ[18]
AA30
B_DDR3_DQ[19]
V30
B_DDR3_DQ[20]
AB32
B_DDR3_DQ[21]
V28
B_DDR3_DQ[22]
AB31
B_DDR3_DQ[23]
U31
B_DDR3_DQ[24]
W29
B_DDR3_DQ[25]
AA28
B_DDR3_DQ[26]
W30
B_DDR3_DQ[27]
AB29
B_DDR3_DQ[28]
Y28
B_DDR3_DQ[29]
AB28
B_DDR3_DQ[30]
W28
B_DDR3_DQ[31]
AB30
V31
Y31
W31
W32
Y29
Y30
DDR PHY VREF
+1.5V_U_DDR
U_MVREFCA_A0
R13110
1K
1%
C13202
R13111
1K
0.1uF
1%
+1.5V_U_DDR
U_MVREFCA_B0
R13108
1K
1%
R13109
C13201
1K
0.1uF
1%
A_DDR3_CKE
+1.5V_U_DDR
R13102
1K
A_DDR3_RESET
B_DDR3_CKE
+1.5V_U_DDR
R13103
1K
B_DDR3_RESET
C13210
1000pF
C13209
1000pF
+1.5V_U_DDR
U_MVREFCA_A1
R13120
1K
1%
C13222
0.1uF
C13230
1000pF
A_DDR3_A[0]
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]
A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]
R13121
1K
1%
A_DDR3_A[15]
+1.5V_U_DDR
R13118
1K
1%
R13119
1K
1%
U_MVREFCA_B1
C13221
0.1uF
C13229
1000pF
A_DDR3_MCLK
A_DDR3_MCLKZ
A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]
56
C13233
R13122
0.01uF
56
R13123
A_DDR3_CKE
A_DDR3_CSB1
A_DDR3_ODT
A_DDR3_RASZ
A_DDR3_CASZ
A_DDR3_WEZ
A_DDR3_RESET
A_DDR3_DQS0
A_DDR3_DQS0B
A_DDR3_DQS1
A_DDR3_DQS1B
A_DDR3_DM0
A_DDR3_DQ[0-15]
R13112
1K
R13113
1K
A_DDR3_DM1
A_DDR3_DQ[0]
A_DDR3_DQ[1]
A_DDR3_DQ[2]
A_DDR3_DQ[3]
A_DDR3_DQ[4]
A_DDR3_DQ[5]
A_DDR3_DQ[6]
A_DDR3_DQ[7]
A_DDR3_DQ[8]
A_DDR3_DQ[9]
A_DDR3_DQ[10]
A_DDR3_DQ[11]
A_DDR3_DQ[12]
A_DDR3_DQ[13]
A_DDR3_DQ[14]
A_DDR3_DQ[15]
IC2600
H5TQ1G63EFR-RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
U_MVREFCA_A0
M8
H1
R13126 240
L8
ZQ
1%
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_U_DDR
+1.5V_U_DDR
A_DDR3_A[14]
A_DDR3_A[0]
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]
A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]
A_DDR3_A[14]
A_DDR3_A[15]
A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]
A_DDR3_MCLK
A_DDR3_MCLKZ
A_DDR3_CKE
A_DDR3_CSB2
A_DDR3_ODT
A_DDR3_RASZ
A_DDR3_CASZ
A_DDR3_WEZ
A_DDR3_RESET
DDR_VTT_URSA_1
AR13100
AR13102
AR13104
AR13106
100
100
100
100
A_DDR3_DQ[16-31]
AR13108
100
AR13110
100
A_DDR3_DQS2
A_DDR3_DQS2B
A_DDR3_DQS3
A_DDR3_DQS3B
A_DDR3_DM2
A_DDR3_DM3
AR13112
100
A_DDR3_DQ[16]
A_DDR3_DQ[17]
A_DDR3_DQ[18]
A_DDR3_DQ[19]
A_DDR3_DQ[20]
A_DDR3_DQ[21]
A_DDR3_DQ[22] A_DDR3_DQ[20]
A_DDR3_DQ[23]
A_DDR3_DQ[24]
A_DDR3_DQ[25]
A_DDR3_DQ[26]
A_DDR3_DQ[27]
A_DDR3_DQ[28]
A_DDR3_DQ[29]
A_DDR3_DQ[30]
A_DDR3_DQ[31]
IC2700
H5TQ1G63EFR-RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
U_MVREFCA_A1
M8
H1
R13134 240
L8
ZQ
1%
+1.5V_U_DDR
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_U_DDR
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A_DDR3_A[14]
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DDR_VTT_URSA
DDR_VTT_URSA
+1.5V_U_DDR
C13104
0.1uF
16V
+1.5V_U_DDR
C13102
0.1uF
16V
* DDR_VTT
+1.5V_U_DDR
R13100
10K
R13101
DDR_VTT_URSA
L13100
CIS21J121
C13110
10uF
DDR_VTT_URSA_0
L13102
BLM18PG121SN1D
C13181
1uF
25V
DDR_VTT_URSA_1
L13103
BLM18PG121SN1D
C13112
1uF
25V
Decap removed
Close to DDR Power pin
C13117
C13109
0.1uF
0.1uF
16V
16V
Close to DDR Power pin
C13107
C13115
0.1uF
1uF
16V
25V
B_DDR3_A[0]
B_DDR3_A[1]
B_DDR3_A[2]
B_DDR3_A[3]
B_DDR3_A[4]
B_DDR3_A[5]
B_DDR3_A[6]
B_DDR3_A[7]
B_DDR3_A[8]
B_DDR3_A[9]
B_DDR3_A[10]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[13]
B_DDR3_A[14]
B_DDR3_A[15]
B_DDR3_BA[0]
B_DDR3_BA[1]
B_DDR3_BA[2]
B_DDR3_MCLK
B_DDR3_MCLKZ
B_DDR3_CKE
B_DDR3_CSB2
B_DDR3_ODT
B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_RESET
DDR_VTT_URSA_0
AR13101
AR13103
AR13105
AR13107
AR13111
AR13109
100
100
100
100
B_DDR3_DQ[16-31]
100
100
B_DDR3_DQS2
B_DDR3_DQS2B
B_DDR3_DQS3
B_DDR3_DQS3B
B_DDR3_DM2
B_DDR3_DM3
AR13113
100
B_DDR3_DQ[16]
B_DDR3_DQ[17]
B_DDR3_DQ[18]
B_DDR3_DQ[19]
B_DDR3_DQ[20]
B_DDR3_DQ[21]
B_DDR3_DQ[22]
B_DDR3_DQ[23]
B_DDR3_DQ[24]
B_DDR3_DQ[25]
B_DDR3_DQ[26]
B_DDR3_DQ[27]
B_DDR3_DQ[28]
B_DDR3_DQ[29]
B_DDR3_DQ[30]
B_DDR3_DQ[31]
IC2900
H5TQ1G63EFR-RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
U_MVREFCA_B1
M8
H1
R13135 240
L8
ZQ
1%
+1.5V_U_DDR
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_U_DDR
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
B_DDR3_A[14]
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+3.3V_NORMAL
C13147
0.1uF
L13101
CIS21J121
C13154
0.1uF
16V
C13150
4700pF
C13156
0.1uF
16V
C13199
10uF
10V
C13164
0.1uF
16V
C13162
10uF
10V
C13172
1uF
25V
C13170
0.1uF
16V
C13178
0.1uF
16V
C13176
0.1uF
16V
C13186
0.1uF
16V
C13184
0.1uF
16V
C13194
10uF
10V
C13192
0.1uF
16V
C13198
0.1uF
16V
C13196
0.1uF
16V
C13206
0.1uF
16V
C13204
0.1uF
16V
C13214
0.1uF
16V
C13212
1uF
25V
C13218
0.1uF
16V
C13216
0.1uF
16V
C13226
1uF
25V
C13224
0.1uF
16V
C13232
0.1uF
16V
C13100
10uF
10V
C13101
10uF
10V
4th layer
B_DDR3_MCLK
B_DDR3_MCLKZ
56
C13234
0.01uF
56
B_DDR3_DQ[0-15]
B_DDR3_A[0]
B_DDR3_A[1]
B_DDR3_A[2]
B_DDR3_A[3]
B_DDR3_A[4]
B_DDR3_A[5]
B_DDR3_A[6]
B_DDR3_A[7]
B_DDR3_A[8]
B_DDR3_A[9]
B_DDR3_A[10]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[13]
B_DDR3_A[15]
R13124
R13125
B_DDR3_BA[0]
B_DDR3_BA[1]
B_DDR3_BA[2]
B_DDR3_CKE
B_DDR3_CSB1
B_DDR3_ODT
B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_RESET
B_DDR3_DQS0
B_DDR3_DQS0B
B_DDR3_DQS1
B_DDR3_DQS1B
B_DDR3_DM0
B_DDR3_DM1
B_DDR3_DQ[0]
B_DDR3_DQ[1]
B_DDR3_DQ[2]
B_DDR3_DQ[3]
B_DDR3_DQ[4]
B_DDR3_DQ[5]
B_DDR3_DQ[6]
B_DDR3_DQ[7]
B_DDR3_DQ[8]
B_DDR3_DQ[9]
B_DDR3_DQ[10]
B_DDR3_DQ[11]
B_DDR3_DQ[12]
B_DDR3_DQ[13]
B_DDR3_DQ[14]
B_DDR3_DQ[15]
IC2800
H5TQ1G63EFR-RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
U_MVREFCA_B0
M8
H1
R13127 240
L8
ZQ
1%
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_U_DDR
+1.5V_U_DDR
B_DDR3_A[14]
[EP]
VIN
10
PGOOD
11
9
GND
8
EN
7
REFOUT
6
Close to REFOUT pin
C13105
0.1uF
16V
C13146
0.1uF
16V
C13144
0.1uF
16V
C13122
1000pF
C13123
22uF
10V
C13179
0.1uF
16V
C13132
0.1uF
16V
C13113
10uF
C13128
0.1uF
16V
C13126
0.1uF
16V
IC13100
TPS51200DRCR
REFIN
1
VLDOIN
2
THERMAL
VO
3
PGND
4
VOSNS
5
C13151
C13189
0.1uF
0.1uF
16V
16V
C13158
C13174
C13106
0.1uF
0.1uF
0.1uF
16V
16V
16V
C13137
0.1uF
16V
C13135
0.1uF
16V
1%
10K
1%
C13111
10uF
+1.5V_U_DDR
C13103
0.1uF
16V
+1.5V_U_DDR
C13195
0.1uF
16V
4th layer
Close to DDR Power pin
Decap removed
C13116
C13108
0.1uF
0.1uF
16V
16V
Close to DDR Power pin
Decap removed
BSD-14Y-UD-131-HD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2013.12.17
URSA7_DDR
Page 54
Clock for URSA9
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Option Name
UB98/UC9_URSA9_crystalcap
C1903
5pF
50V
GND_1
1
2
3
C1904
5pF
50V
Option Name
UB85/95/UC97_URSA9_crystalcap
C1904-*1
8pF
50V
4
X-TAL_2
C1903-*1
8pF
50V
X-TAL_1
X1900
24MHz
GND_2
R1925
1M
XIN_URSA
XO_URSA
SW1901
JTP-1127WEM
1
+3.3V_NORMAL
2
4 3
D1900
100V
1N4148W
R1923
10K
OPT
C1902
22uF
10V
+3.3V_NORMAL
0
R1924
URSA Reset
R1919
10K
URSA9_RST_PULLUP
URSA_RESET
URSA_RESET_SoC
0
R1930
IC2500
LGE7411(URSA9)
URSA Option
URSA_OPT_0
URSA_OPT_1
URSA_BIT0
URSA_BIT1
URSA_BIT2
BIT [2/1/0]
0/0/0
0/0/1
0/1/0
0/1/1
1/0/0
1/0/1
1/1/0
1/1/1
4K@120 (16lane)
5k@120 (20lane)
FHD@120 (4lane)
FHD@60 (2lane)
Rx Interface
Module Type
Tx Lane
Tx Lane
4k@60 (8lane)
OLED ULTRA HD
Reserved
Reserved
+3.3V_NORMAL
LGD_Module
URSA_RX_LVDS
R1909 10K
OS_Module
URSA_RX_VX1
R1910 10K
10K
R1911
10K
R1912
R1913 10K
URSA_BIT0_1
URSA_BIT1_1
URSA_BIT1_0
URSA_BIT0_0
R1914 10K
R1915 10K
R1916 10K
R1917 10K
URSA_BIT2_1
URSA_BIT2_0
R1918 10K
SPI Flash
SPI_CZ
SPI_DO
FLASH_WP_URSA
R1904
R1905
U_SPI_WP_f_URSA
FRC_FLASH_WP
Chip Config
Debug/ISP ADDR
Slave (Debug Port:0XB4,ISP:0X98)
CHIP_CONF:{DIM2,DIM1,DIM0}
CHIP_CONF=3’d7:111:boot from SPI Flash
+3.3V_NORMAL
10K
R1902
10K
R1901
10K
R1900
33
1K
R1932
1K
U_SPI_WP_f_SoC
OPT
R1908
10K
OPT
R1907
OPT
10K
R1906
MX25L3206EM2I-12G
CS#
SO/SIO1
WP#
GND
10K
IC1901
1
SPI_4MB_MACRONIX
2
3
4
DIM0
DIM1
DIM2
/CS
DO[IO1]
/WP[IO2]
8
7
6
5
+3.3V_NORMAL
VCC
HOLD#
R1903 10K
SCLK
SI/SIO0
C1901
0.1uF
16V
GND
Debugging for URSA9
I2C_S Port
P1905
12507WS-04L
5
WAFER-STRAIGHT
1
2
3
4
R19 22
URSA_DEBUG
R19 21
URSA_DEBUG
33
SCL2_+3.3V_DB
33
SDA2_+3.3V_DB
IC1901-*1
W25Q32BVSSIG
1
2
3
4
SPI_4MB_Winbond
SPI_CK
SPI_DI
VCC
8
/HOLD[IO3]
7
CLK
6
DI[IO0]
5
I2C_SCL1
I2CS_SCL
SCL2_+3.3V_DB
R1958
0
URSA_MP
R1960
0
OPT
SW1902
JS2235S
1
2
URSA_DEBUG
3
TCON_I2C_EN
6
R1959
0
URSA_MP
5
R1961
0
OPT
4
+3.3V_NORMAL
1K
R1954
I2C_SDA1
I2CS_SDA
SDA2_+3.3V_DB
URSA_RESET
OPT
10K
R1955
XIN_URSA
XO_URSA
I2CS_SDA
I2CS_SCL
SPI_CZ
SPI_CK
SPI_DI
SPI_DO
33
OPT
AR13201
33
Change pin from A5 to C4
AR13200
33
R1981 33
R1933
URSA9 UART1_RX
AF29
RESET
R3
XTALO
R4
XTALI
AJ24
I2CS_SDA
AH24
I2CS_SCL
AH26
I2CM_SDA
AG24
I2CM_SCL/VSYNC_LIKE1
B4
GPIO[0][UART2_TX]
A4
GPIO[1][UART2_RX]
B5
GPIO[2][UART1_TX]
A5
GPIO[3][UART1_RX]
AD28
SPI_CZ
AD30
SPI_CK
AC31
SPI_DI
AD29
SPI_DO
AE28
INT_R21/GPIO[41]
AE27
INT_R20/GPIO[42]
C4
IRE
AC27
GND_1
AD27
GND_2
A7
NC_1
B6
NC_2
B7
NC_3
C5
NC_4
C6
NC_5
C7
NC_6
D4
NC_7
D5
NC_8
D6
NC_9
D7
NC_10
E4
NC_11
E5
NC_12
E6
NC_13
E7
NC_14
F4
NC_15
F5
NC_16
M5
NC_17
M6
NC_18
M7
NC_19
N5
NC_20
R7
NC_21
P7
NC_22
N7
NC_23
N6
NC_24
I2C_HSC_SDA/VSYNC_LIKE2
I2C_HSC_SCL/VSYNC_LIKE3
SPI1_CK/PWM2/GPIO58
SPI1_DI/PWM3/GPIO59
SPI2_CK/PWM0/GPIO56
SPI2_DI/PWM1/GPIO57
SPI3_CK/DIM10/GPIO54
SPI3_DI/DIM11/GPIO55
SPI4_CK/DIM8/GPIO52
SPI4_DI/DIM9/GPIO53
VSYNC_LIKE/PWM5/GPIO40
DIM0/GPIO[32]
DIM1/GPIO[33]
DIM2/GPIO[34]
DIM3/GPIO[35]
DIM4/GPIO[36]
DIM5/GPIO[37]
DIM6/GPIO[38]
DIM7/GPIO[39]
GPIO43/TCON0
GPIO44/TCON1
GPIO45/TCON2
GPIO46/TCON3
GPIO47/TCON4
GPIO48/TCON5
GPIO49/TCON6
GPIO50/TCON7
GPIO[18]/TCON8
GPIO[19]/TCON9
GPIO[20]/TCON10
GPIO[21]/TCON11
GPIO[22]/TCON12
GPIO[23]/TCON13
GPIO24/TCON14
GPIO25/TCON15
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]
GPIO[9]
GPIO[10]/PWM_DIM_IN[0]
GPIO[11]/PWM_DIM_IN[1]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
AG25
AH25
AH28
AJ27
AJ29
AF27
AG28
AH27
AG27
AG26
AF28
AG23
AG20
AH23
AH20
AG21
AH22
AG22
AH21
A3
B3
A2
C3
B2
B1
C2
C1
AG4
AG5
AH4
AH5
AH6
AJ4
AJ5
AJ6
AH16
AG16
Y5
Y4
AB4
AB5
AG17
AH17
AG18
AJ20
AH18
AG19
AH19
AJ21
OPT
R13202 33
R1934
OPT
R13203 33
OPT
R13207 33
OPT
R13208 33
URSA_OPT_0
R1935
33
L_DIM_EN
DIM0
DIM1
DIM2
URSA_OPT_1
URSA_BIT0
URSA_BIT1
URSA_BIT2
RXASCL_URSA9
Data_Format_1
Data_Format_0
RXBSCL_URSA9
RXBSDA_URSA9
R13201 10K
URSA_RX_Vx1_HTPDn
R13200
10K
URSA_RX_Vx1_HTPDn
URSA9_CONNECT
URSA_LOCK_O
URSA_LOCK_V
FLASH_WP_URSA
+3.3V_NORMAL
33
RXASDA_URSA9
OPT
R1936
10K
3D_EN
R1937
10K
+3.3V_NORMAL
OPT
R13204
10K
R13205
10K
HDMI OUTPUT_1 DDC to URSA9
HDMI OUTPUT_0 DDC to URSA9
R13209
R13206
100K
100K
URSA9_Vx1_RX_HTPD_GPIO
Not Used Net (UB85/95/UC89)
Not Used Net (UB98/D9)
RXASCL_URSA9
RXASDA_URSA9
RXBSCL_URSA9
RXBSDA_URSA9
For DFT JIG
URSA9_CONNECT
URSA_LOCK_O
URSA_LOCK_V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-132-HD
2013.12.17
Page 55
+1.5V_U_DDR
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
AVDD_PLL
AVDDL_LVDSRX
DVDD_DDR
AVDDL_MOD
AVDDL_DRV
VDDC
AVDDL_HDMI_TX_RX
AVDD_MOD
VDDP
LGE7411(URSA9)
A6
VDDC_1
M9
VDDC_2
M10
VDDC_3
M11
VDDC_4
N9
VDDC_5
N10
VDDC_6
N11
VDDC_7
P9
VDDC_8
P10
VDDC_9
P11
VDDC_10
R9
VDDC_11
R10
VDDC_12
R11
VDDC_13
T9
VDDC_14
T10
VDDC_15
T11
VDDC_16
U9
VDDC_17
U10
VDDC_18
U11
VDDC_19
V9
VDDC_20
V10
VDDC_21
V11
VDDC_22
W9
VDDC_23
W10
VDDC_24
W11
VDDC_25
Y9
VDDC_26
L3
AVDDL_HDMITX_1
L4
AVDDL_HDMITX_2
AA9
AVDDL_RX_1
AA10
AVDDL_RX_2
AB9
AVDDL_RX_3
Y10
AVDDL_DVI_1
Y11
AVDDL_DVI_2
M14
DVDD_DDR_1
N14
DVDD_DDR_2
Y20
AVDDL_MOD_1
Y21
AVDDL_MOD_2
Y22
AVDDL_MOD_3
AA19
AVDDL_MOD_4
AA20
AVDDL_MOD_5
AA21
AVDDL_DRV_1
AA22
AVDDL_DRV_2
AB20
AVDDL_DRV_3
AB21
AVDDL_DRV_4
AB22
AVDDL_DRV_5
AC20
AVDD_MOD_1
AC21
AVDD_MOD_2
AD21
AVDD_MOD_3
AD20
AVDD_MOD_LDO
AC18
VDDP_1
AD17
VDDP_2
AD18
VDDP_3
AD11
AVDD_DVI_1
AD12
AVDD_DVI_2
AC12
AVDD_HDMITX_1
AC13
AVDD_HDMITX_2
AD15
AVDD_RX_1
AC16
AVDD_RX_2
AC17
AVDD_RX_3
AD16
AVDD_RX_4
AD14
AVDD_XTAL
AC14
AVDD_PLL_1
AC15
AVDD_PLL_2
M18
AVDD_DDR0_1
M19
AVDD_DDR0_2
M20
AVDD_DDR0_3
M21
AVDD_DDR0_4
M16
AVDD_DDR0_5
M17
AVDD_DDR0_6
P21
AVDD_DDR1_1
R21
AVDD_DDR1_2
P22
AVDD_DDR1_3
R22
AVDD_DDR1_4
N21
AVDD_DDR1_5
N22
AVDD_DDR1_6
IC2500
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
IC2500
LGE7411(URSA9)
AA18
AB18
AE18
AF18
AJ18
AB19
AC19
AD19
AE19
AF19
AK19
AE20
AF20
AK20
AE21
AF21
AK21
AC22
AD22
AE22
AF22
AL22
AA23
AB23
AC23
AD23
AE23
AF23
AJ23
AM23
D18
G18
H18
J18
L18
N18
P18
R18
T18
U18
V18
W18
Y18
F19
G19
H19
J19
K19
L19
N19
P19
R19
T19
U19
V19
W19
Y19
A20
E20
F20
G20
H20
J20
L20
N20
P20
R20
T20
U20
V20
W20
D21
F21
G21
H21
J21
K21
L21
T21
U21
V21
W21
G22
H22
J22
L22
M22
T22
U22
V22
W22
A23
E23
F23
G23
H23
J23
K23
M23
P23
T23
V23
W23
Y23
A8
VSS_81
B8
VSS_82
C8
VSS_83
D8
VSS_84
E8
VSS_85
F8
VSS_86
G8
VSS_87
H8
VSS_88
J8
VSS_89
K8
VSS_90
L8
VSS_91
M8
VSS_92
N8
VSS_93
P8
AB10
AC10
AD10
AE10
AF10
AG10
AH10
AJ10
AA11
AB11
AC11
AE11
AF11
AG11
AH11
AJ11
AA12
AB12
AE12
AF12
AG12
AH12
AJ12
VSS_94
R8
VSS_95
T8
VSS_96
U8
VSS_97
V8
VSS_98
W8
VSS_99
Y8
VSS_100
AA8
VSS_101
AC8
VSS_102
AD8
VSS_103
AE8
VSS_104
AF8
VSS_105
AG8
VSS_106
AH8
VSS_107
AJ8
VSS_108
B9
VSS_109
D9
VSS_110
E9
VSS_111
F9
VSS_112
G9
VSS_113
H9
VSS_114
J9
VSS_115
K9
VSS_116
L9
VSS_117
AD9
VSS_118
AE9
VSS_119
AF9
VSS_120
AG9
VSS_121
AH9
VSS_122
AJ9
VSS_123
D10
VSS_124
E10
VSS_125
F10
VSS_126
G10
VSS_127
H10
VSS_128
J10
VSS_129
K10
VSS_130
L10
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
A11
VSS_140
D11
VSS_141
E11
VSS_142
F11
VSS_143
G11
VSS_144
H11
VSS_145
J11
VSS_146
K11
VSS_147
L11
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
D12
VSS_157
E12
VSS_158
F12
VSS_159
G12
VSS_160
H12
VSS_161
J12
VSS_162
K12
VSS_163
L12
VSS_164
M12
VSS_165
N12
VSS_166
P12
VSS_167
R12
VSS_168
T12
VSS_169
U12
VSS_170
V12
VSS_171
W12
VSS_172
Y12
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
G13
VSS_181
H13
VSS_182
J13
VSS_183
K13
VSS_184
L13
VSS_185
K1
T1
K2
P2
T2
AF2
K3
T3
AF3
AG3
G4
H4
J4
K4
P4
T4
U4
V4
W4
AA4
AC4
AD4
AE4
AF4
G5
H5
J5
K5
L5
P5
R5
T5
U5
V5
W5
AA5
AC5
AD5
AE5
AF5
F6
G6
H6
J6
K6
L6
P6
R6
T6
U6
V6
W6
Y6
AA6
AB6
AC6
AD6
AE6
AF6
AG6
F7
G7
H7
J7
K7
L7
T7
U7
V7
W7
Y7
AA7
AB7
AC7
AD7
AE7
AF7
AG7
AH7
AJ7
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
T13
R13
P13
N13
M13
U13
V13
W13
Y13
AA13
AB13
AD13
AE13
AF13
AG13
AH13
AJ13
G14
H14
J14
K14
L14
P14
R14
T14
U14
V14
W14
Y14
AA14
AB14
AE14
AF14
AG14
AH14
AJ14
A15
B15
D15
G15
H15
J15
K15
L15
M15
N15
P15
R15
T15
U15
V15
W15
Y15
AA15
AE15
AF15
AG15
AH15
AJ15
E16
F16
G16
H16
J16
L16
N16
P16
R16
T16
U16
V16
W16
Y16
AA16
AE16
AF16
AJ16
AM16
A17
B17
G17
H17
J17
K17
L17
N17
P17
R17
T17
U17
V17
W17
Y17
AA17
AB17
AE17
AF17
AJ17
AL17
IC2500
LGE7411(URSA9)
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361
VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396
VSS_397
VSS_398
VSS_399
VSS_400
VSS_401
VSS_402
VSS_403
VSS_404
VSS_405
VSS_406
VSS_407
VSS_408
VSS_409
VSS_410
VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427
VSS_428
VSS_429
VSS_430
VSS_431
VSS_432
VSS_433
VSS_434
VSS_435
VSS_436
VSS_437
VSS_438
VSS_439
VSS_440
VSS_441
VSS_442
VSS_443
VSS_444
VSS_445
VSS_446
VSS_447
VSS_448
VSS_449
VSS_450
VSS_451
VSS_452
VSS_453
VSS_454
VSS_455
VSS_456
VSS_457
VSS_458
VSS_459
VSS_460
VSS_461
VSS_462
VSS_463
VSS_464
VSS_465
VSS_466
VSS_467
VSS_468
VSS_469
VSS_470
VSS_471
VSS_472
VSS_473
VSS_474
VSS_475
VSS_476
VSS_477
VSS_478
VSS_479
VSS_480
VSS_481
VSS_482
VSS_483
VSS_484
VSS_485
VSS_486
VSS_487
VSS_488
VSS_489
VSS_490
VSS_491
VSS_492
VSS_493
VSS_494
VSS_495
VSS_496
VSS_497
VSS_498
VSS_499
VSS_500
VSS_501
VSS_502
VSS_503
VSS_504
VSS_505
VSS_506
VSS_507
VSS_508
VSS_509
D24
F24
G24
H24
J24
K24
L24
M24
N24
P24
R24
T24
U24
V24
W24
Y24
AA24
AB24
AC24
AD24
AE24
AF24
AL24
F25
G25
H25
J25
K25
L25
M25
N25
P25
R25
T25
U25
V25
W25
Y25
AA25
AB25
AC25
AD25
AE25
AF25
AM25
A26
F26
G26
H26
J26
K26
L26
M26
N26
P26
R26
T26
U26
V26
W26
Y26
AA26
AB26
AC26
AD26
AE26
AF26
AJ26
AL26
D27
F27
K27
N27
P27
R27
U27
V27
W27
Y27
AA27
AB27
F28
K28
P28
U28
AC28
AK28
A29
C29
D29
E29
F29
J29
M29
R29
V29
AA29
AC29
AK29
A30
B30
AC30
AK30
AM30
A31
B31
C31
J31
L31
AD31
AF31
AH31
B32
E32
J32
L32
P32
U32
Y32
AE32
AG32
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-133-HD
2013.12.17
U_Power
Page 56
TCON_PWR_5pin_Wafer
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
P13401
20037WR-05A00
1
2
3
4
5
6
T-con power
L13409
MLB-201209-0120P-N2
L13410
C13434
10uF
25V
MLB-201209-0120P-N2
C13435
0.1uF
25V
C13440
10uF
25V
OPT
PANEL_VCC
C13442
0.1uF
25V
+12V
L13411
BLM18PG121SN1D
C13443
10uF
16V
1.0V_DCDC_TI
C13410
0.1uF
C13446-*1
3300pF
50V
+1.5V URSA DDR
POWER_ON/OFF2_1
R13424
10K
EN
R13422
R13421
3.6K
18K
R1
C13444
100pF
50V
1%
1%
R2
R13423
22K
1%
C13445
1uF
10V
Vout=0.765*(1+R1/R2)=1.516V
FB
VREG
SS
C13446
2200pF
50V
1.0V_DCDC_ROHM
DCDC_ROHM
IC13403
BD9D320EFJ
1
2
THERMAL
3
4
3A
MAX 4.7A
+1.5V_U_DDR
[EP]FIN
VIN
8
9
7
6
5
BOOT
SW
GND
16V
0.1uF
C13447
NR5040T2R2N
L13412
2.2uH
C13448
22uF
10V
C13449
22uF
10V
EN
VFB
VREG5
SS
ZD13401
OPT
IC13403-*1
TPS54327DDAR
1
2
3
4
2.5V
DCDC_TI
THERMAL
[EP]GND
VIN
8
VBST
9
7
SW
6
GND
5
POWER_ON/OFF2_3
VDDC
OPT
ZD13400
+1.15V URSA9 Core
R13404
10K
R13402
3.3
R13403
1/10W
5%
C13404
470pF
50V
1%
0.1uF
C13405
4.7
1%
1/1 6W
27K
1/1 6W
R13 405
PGOOD
16V
30V
D13400
2.5V
C13400
22uF
C13401
22uF
C13402
0.1uF
16V
C13411
22uF
C13403
1000pF
50V
R13401 1K
R13400
2K
1/16W
5%
L13403
1uH
VBST
NC_1
SW_1
SW_2
SW_3
SW_4
91K
R13 406
RF
EN
[EP]
1
THERMAL
2
29
3
IC13402
4
TPS53513RVER
5
6
7
8
8A
9
10
PGND_111PGND_212PGND_313PGND_414PGND_5
R13407
39K
1/16W
5%
UB85/95/UC97_URSA9core
R13411-*1
C13407
1uF
10V
49.9
1/16W 1%
L13402
C13408
10uF
16V
+12V
C13409
10uF
16V
R1
R13408
4.87K
1/16W
1%
TRIP26NC_327GND128GND2
24VO25
R2
R13409
5.1K
1/16W
1%
1%
FB
23
GND
22
MODE
21
VREG
20
VDD
19
NC_2
18
VIN_3
17
VIN_2
16
VIN_1
15
R13411
C13406
2200pF
50V
0
20K
R13410
1/16W
1/16W
5%
UB98/UC9_URSA9core
Vout=0.6*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-134-HD
2013.12.17
Page 57
UB85/95/UC97 only
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Front speaker
+3.3V_NORMAL
R5613
AMP_RESET_N
100
1/16W
AUD_MASTER_CLK
NC_1
VDD_PLL
NC_2
GND
NC_3
DVDD
SDATA
WCK
BCK
SDA
R5614
4.7K
[EP]GND
1
2
3
4
5
6
7
8
9
10
C5627
1000pF
50V
VDD_IO
40
THERMAL
11
SCL
GND_IO
FAULT
From DACLRCH
AMP_MUTE
+24V
AUD_LRCH
AUD_LRCK
I2C_SDA2
I2C_SCL2
L5600
UBW2012-121F
AUD_SCK
R5600
10K
+24V_AMP
+3.3V_NORMAL
R5601
10K
C
B
Q5600
MMBT3904(NXP)
E
R5602
100
R5603
100
R5604
100
C5600
1000pF
L5601
BLM18PG121SN1D
C5626
C5603
1uF
10V
C5601
33pF
50V
50V
C5602
33pF
50V
10uF
10V
C5604
1uF
10V
C5605
0.1uF
16V
AD
CLK_I
37
38
39
41
IC5600
NTP7514
12
13
14
MONITOR_0
MONITOR_1
22000pF
I2S_AMP
50V
C5606
22000pF
PGND1A
BST1A
RESET
34
35
36
0x54
15
16
17
BST2B
PGND2B
MONITOR_2
C5607
50V
PVDD1A
OUT1A
32
33
18
19
OUT2B
PVDD2B20PVDD2A
+24V_AMP
PVDD1B
31
30
29
28
27
26
25
24
23
22
21
+24V_AMP
C5608
10uF
35V
OUT1B
PGND1B
BST1B
VDR1
NC_4
AGND
VDR2
BST2A
PGND2A
OUT2A
C5609
10uF
35V
C5624
0.1uF
50V
C5625
0.1uF
50V
C5610
22000pF
50V
C5611
22000pF
50V
C56 12
1uF
10V
C5613
1uF
10V
R5605
5.6
1/10W
C5614
390pF
50V
C5615
390pF
50V
R5606
5.6
1/10W
R5607
5.6
1/10W
C5616
390pF
50V
C5617
390pF
50V
R5608
5.6
1/10W
L5602
10uH
SP-7850_10
L5605
10uH
SP-7850_10
L5603
10uH
SP-7850_10
L5604
10uH
SP-7850_10
C5618
0.47uF
50V
C5619
0.47uF
50V
C5620
0.1uF
50V
C5621
0.1uF
50V
C5622
0.1uF
50V
C5623
0.1uF
50V
R5609
4.7K
R5610
4.7K
R5611
4.7K
R5612
4.7K
SPK_L+
SPEAKER_L
SPK_L-
SPK_R+
SPEAKER_R
SPK_R-
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
WOOFER_MUTE
I2S_AMP
SPK_L+
SPK_L-
SPK_R+
SPK_R-
4P Boxtype
WAFER-ANGLE
4
3
2
1
P5400
BSD-14Y-UD-056-02-HD
2013.12.17
Page 58
UB85/95/UC97 only
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
UB95 : Woofer Amp
UC97 : Height Amp
OPTION Selection
-.Separation Of I2S
AUD_LRCH1
From DACLRCH
WOOFER_MUTE
+24V
L5700
UBW2012-121F
UB95 : Woofer Amp(LRCH)
UC97 : Height Amp(LRCH1)
R5715
0
Height_Amp
R5716
AUD_LRCH
AUD_LRCK
AUD_SCK
I2C_SDA2
I2C_SCL2
0
Woofer_Amp
+24V_AMP_WOOFER_L
R5700
100
R5701
100
C5700
33pF
50V
C5701
33pF
50V
C5702
1uF
C5703
1uF
10V
10V
BLM18PG121SN1D
C5720
10uF
10V
+3.3V_NORMAL
L5701
C5704
0.1uF
16V
AMP_RESET_N
R5713
100
1/16W
AUD_MASTER_CLK
NC_1
VDD_PLL
NC_2
GND
NC_3
DVDD
SDATA
WCK
BCK
SDA
R5714
4.7K
[EP]GND
1
2
3
4
5
6
7
8
9
10
C5725
1000pF
50V
GND_IO
VDD_IO
40
THERMAL
11
SCL
FAULT
+3.3V_NORMAL
R57 02 4 .7K
AD
CLK_I
37
38
39
41
IC5700
NTP7514
12
13
14
MONITOR_0
MONITOR_1
22000pF
50V
C5705
22000pF
PGND1A
BST1A
RESET
34
35
36
0x56
15
16
17
BST2B
PGND2B
MONITOR_2
C5706
50V
PVDD1A
OUT1A
32
33
18
19
OUT2B
PVDD2B20PVDD2A
+24V_AMP_WOOFER_L
C5707
10uF
35V
PVDD1B
31
30
29
28
27
26
25
24
23
22
21
+24V_AMP_WOOFER_L
C5718
0.1uF
50V
OUT1B
PGND1B
BST1B
VDR1
NC_4
AGND
VDR2
BST2A
PGND2A
OUT2A
C5708
10uF
35V
C5719
0.1uF
50V
C5709
22000pF
50V
C5710
22000pF
50V
R5707
4.7K
Woofer_Amp
R5708
4.7K
Woofer_Amp
C57 11
1uF
10V
UB95
UC97
R5703
5.6
1/10W
C5712
390pF
50V
C5713
390pF
50V
R5704
5.6
1/10W
R5709
3.3
1/10W
C5726
390pF
50V
C5721
390pF
50V
R5710
3.3
1/10W
Woofer/Height_Amp
C5714
1uF
10V
Height_Amp
Height_Amp
Height_Amp
Height_Amp
L5702
10uH
SP-7850_10
L5703
10uH
SP-7850_10
L5704
10uH
Height_Amp
SP-7850_10
L5705
10uH
SP-7850_10 Height_Amp
Woofer_Amp
C5715
0.47uF
50V
Height_Amp
C5722
0.47uF
50V
C5716
0.1uF
50V
C5717
0.1uF
50V
Height_Amp
C5723
0.1uF
50V
Height_Amp
C5724
0.1uF
50V
R5705
4.7K
R5706
4.7K
R5711
4.7K
R5712
4.7K
Height_Amp
SPK_WOOFER_L+
Woofer/Height
SPK_WOOFER_L-
SPK_WOOFER_R+
Height_Amp
Height
Height_Amp
SPK_WOOFER_R-
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
I2S_WOOFER
I2S_WOOFER
SPK_WOOFER_L+
SPK_WOOFER_L-
SPK_WOOFER_R+
SPK_WOOFER_R-
WAFER-ANGLE
4
3
2
1
P5700
Height_Amp
UC97
WAFER-ANGLE
2
1
FW25001-02(SPK 2P)
P5701
Woofer_Amp
UB95
BSD-14Y-UD-057-02-HD
2013.12.17
Page 59
Page 60
LCD TV Repair Guide
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
`14 years New Models
Page 61
Main PCB
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Power
From PSU
T-CON B/D
Not Used
6
1
2
7
Main processor_Digital(LG1154D),
1
DDR Memory
eMMC Memory
Main processor_analog(LG1152AN)
2
Micom for Key/IR sensing
3
Audio
B/T Wifi
Local Key +IR
3
5
4
HDMI switch
4
Audio AMP
5
Video processor (LGE7411:URSA9),
DDR Memory
6
4K processor_Digital(LG1512),
7
DDR Memory
Page 62
Interconnection – sub PCB (XXUB85 series)
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
1 2
7
3
[PCBs]
1
Main PCB
2
PSU
3
T - CON
4
IR Jog Key ASSY
5
BT/Wifi Combo ASSY
BT/Wifi Combo ASSY IR Jog Key ASSY
5
4
7
To Main
Page 63
Contents of LCD TV Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No. Error symptom (High category) Error symptom (Mid category) Page Remarks
1
2 No video/No audio 2
3 Picture broken/ Freezing 3
4 Color error 4
5
6
7
8
9 Wrecked audio/discontinuation/noise 9
10
11
A. Video error
B. Power error
C. Audio error
No video/Normal audio 1
Vertical/Horizontal bar, residual image,
light spot, external device color error
No power 6
Off when on, off while viewing, power
auto on/off
No audio/Normal video 8
Remote control & Local switch checking
MR13 operating checking 11
5
7
10
12
13 Camera operating checking 13
14 External device recognition error 14
15 E. Noise Circuit noise, mechanical noise 15
16 F. Exterior error Exterior defect 16
D. Function error
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Wifi operating checking 12
Page 64
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Established
date
Revised date
2013.01.31
LCD TV
Error
symptom
A. Video error
No video/ Normal audio
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable, Speaker Cable, IR B/D Cable,,,)
☞ A18 ☞A1
N
Y
Check Back Light
On with naked eye
☞A18
Check Power Board 24V output
On
Normal
voltage
N
Repair Power
Board or parts
Y N Check Power
Board
24V, 12V,3.5V etc.
Replace Inverter
Y
or module
Normal
voltage
N
Repair Power
Board or parts
End
Replace T-con/Main
Y
Board or module
And Adjust VCOM
No video
Normal audio
Normal
audio
Move to No
video/No audio
1/16
※ Precaution
Always check & record S/W Version and White
Balance value before replacing the Main Board
☞A4 & A2
Replace Main Board
1
Re-enter White Balance value
Page 65
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
No Video/
No audio
☞A18
Check various
voltages of Power
Board ( 3.5V,12V,20V
or 24V…)
A. Video error
No video/ No audio
Normal
voltage?
Replace Power
Board and repair
parts
Y
N
Check and
replace
MAIN B/D
Established
date
Revised date
End
2013.01.31
2/16
2
Page 66
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
☞ A3
Check RF Signal level
Normal
Signal?
N
Check RF Cable
Connection
1. Reconnection
2. Install Booster
Normal
Picture?
Y
Close
Y
N
Error
symptom
A. Video error
Picture broken/ Freezing
Established
date
Revised date
2013.01.31
. By using Digital signal level meter
. By using Diagnostics menu on OSD
( Setting→ Quick Setting → Programmes → Programme Tuning → Manual Tuning → Check the Signal )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Check whether other equipments have problem or not.
(By connecting RF Cable at other equipment)
→ DVD Player ,Set-Top-Box, Different maker TV etc`
☞ A4
Normal
Picture?
Contact with signal distributor
or broadcaster (Cable or Air)
Y
S/W Version
N
Check
S/W Upgrade
N
SVC
Bulletin?
Y
Normal
Picture?
Y
Check
Tuner soldering
N
N
Replace
Main B/D
3/16
Y
Close
Close
3
Page 67
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
☞ A6
Check color by input
-External Input
-COMPONENT
-AV
-HDMI
☞A8
Check Test pattern
Error
symptom
Color
error?
N
Check error
color input
mode
A. Video error
☞ A7
※ Check
and replace
Y
Link Cable
(V by one)
and contact
condition
External Input/
Component
error
Color error
Color
error?
N
Check
external
device and
cable
Y
Replace Main B/D
Established
date
Revised date
External
device/Cable
normal
N
Color
error?
End
Y
2013.01.31
4/16
Y
Replace module
N
Replace Main/T-con B/D
HDMI
error
Check external
device and
cable
4
Request repair
for external
device/cable
N
External
device/Cable
normal
Y
Replace Main/T-con B/D
Page 68
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A. Video error
LCD TV
Error
symptom
Vertical / Horizontal bar, residual image,
light spot, external device color error
Vertical/Horizontal bar, residual image, light spot
☞A6
Check color condition by input
-External Input
-Component
-HDMI
☞A8
Check Test pattern
Screen
normal?
N
Replace
module
Check external
Y
device
connection
condition
Normal?
N
Request repair
for external
device
External device screen error-Color error
☞ A7
Check and
Y
replace Link
Cable
Established
date
Revised date
Screen
normal?
End
N
Y
2013.01.31
Replace Main/T-con B/D
(adjust VCOM)
For LGD panel
Replace Main B/D
For other panel
5/16
Replace
Module
N
Screen
normal?
Y
End
Check S/W Version
Check
version
S/W Upgrade
Normal
screen?
End
N
Y
N
Y
Check screen
condition by input
-External Input
-Component
-HDMI/DVI
External
Input
error
Component
error
HDMI/
DVI
5
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
Y
Y
N
N
Replace
Main /T-con
B/D
Screen
normal?
Request repair for
external device
Screen
normal?
Replace
Main/T-con
B/D
Page 69
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
☞ A17
Check
Logo LED
. Stand-By: Red or Turn On
. Operating: Turn Off
Check Power cord
was inserted properly
Error
symptom
Power LED
On?
N
Normal?
Y
Close
Y
N
※
Check ST-BY 3.5V
☞ A18
B. Power error
No power
DC Power on
by pressing Power Key
On Remote control
Normal
voltage?
Y
Y
N
Established
date
2013.01.31
Revised date
☞ A18
Y
N
Check Power
On ‘”High”
Replace Main B/D
Normal
operation?
☞ A18
Measure voltage of each output of Power B/D
N
Y
Replace Main B/D
Normal
voltage?
Replace Power B/D
OK?
Y
6/16
Replace
Power
B/D
Replace Power
B/D
6
Page 70
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Check outlet
Check A/C cord
Check for all 3- phase
power out
Error
symptom
Error?
Y
Fix A/C cord & Outlet
and check each 3
phase out
B. Power error
Off when on, off while viewing, power auto on/off
☞ A19
N
Check Power Off
Mode
☞ A18
(If Power Off mode
is not displayed)
Check Power B/D
voltage
※ Caution
Check and fix exterior
of Power B/D Part
Abnormal
Abnormal
Established
date
Revised date
CPU
1
Normal
voltage?
Replace Power B/D
Replace Main B/D
Y
N
2013.01.31
Replace Power B/D
Replace Main B/D
Normal?
N
7/16
Y
End
* Please refer to the all cases which
can be displayed on power off mode.
Status Power off List Explanation
"POWEROFF_REMOTEKEY" Power off by REMOTE CONTROL
"POWEROFF_OFFTIMER" Power off by OFF TIMER
"POWEROFF_SLEEPTIMER" Power off by SLEEP TIMER
"POWEROFF_INSTOP" Power off by INSTOP KEY
"POWEROFF_AUTOOFF" Power off by AUTO OFF
Normal
Abnormal
"POWEROFF_ONTIMER" Power off by ON TIMER
"POWEROFF_RS232C" Power off by RS232C
"POWEROFF_RESREC" Power off by Reservated Record
"POWEROFF_RECEND" Power off by End of Recording
"POWEROFF_SWDOWN" Power off by S/W Download
"POWEROFF_UNKNOWN" Power off by unknown status except listed case
"POWEROFF_ABNORMAL1" Power off by abnormal status except CPU trouble
"POWEROFF_CPUABNORMAL" Power off by CPU Abnormal
7
Page 71
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
No audio
Screen normal
Error
C. Audio error
symptom
No audio/ Normal video
☞ A20 ☞ A21+A18
Check user
menu >
Speaker off
Off
Y
Cancel OFF
Check audio B+
N
24V of Power
Board
Established
date
Revised date
Normal
voltage
Replace Power Board and repair parts
Y
N
2013.01.31
8/16
Check
Speaker
disconnection
Disconnection
Y
Replace Speaker
8
N
Replace MAIN Board
End
Page 72
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Check input
signal
-RF
-External Input
signal
Error
symptom
C. Audio error
Wrecked audio/ discontinuation/noise
Established
date
Revised date
2013.01.31
→ abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio
☞ A21+A18
Check audio
B+ Voltage (24V)
Y
Normal
voltage?
N
Replace Power B/D
Replace Main B/D
N
Y
Signal
normal?
N
Y
(When RF signal is not
received)
Request repair to external
cable/ANT provider
(In case of
External Input
signal error)
Check and fix
external device
Wrecked audio/
Discontinuation/
Noise for
all audio
Wrecked audio/
Discontinuation/
Noise only
for D-TV
Wrecked audio/
Discontinuation/
Noise only
for Analog
Wrecked audio/
Discontinuation/
Noise only
for External Input
Check and replace
speaker and
connector
Replace Main B/D
Connect and check
other external
device
Normal
audio?
9/16
End
Check and fix external device
9
Page 73
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
D. Function error
Remote control & Local switch checking
LCD TV
Error
symptom
1. Remote control(R/C) operating error
☞ A22
Check R/C itself
Operation
Check R/C Operating
When turn off light
in room
If R/C operate,
Explain the customer
cause is interference
from light in room.
operating?
Normal
N
Check & Replace
Baterry of R/C
Normal
operating?
Replace R/C
Check & Repair
Y
Cable connection
Connector solder
Y
N
Close
Normal
operating?
Y
Close
☞ A22
N
On Main B/D
Established
date
Revised date
Check B+
3.5V
Normal
Voltage?
N
☞ A18
Check 3.5v on Power B/D
Replace Power B/D or
Replace Main B/D
(Power B/D don’t have problem)
☞ A22
Y
Check IR
Output signal
2013.01.31
10/16
Replace
Main B/D
Normal
Signal?
N
Repair/Replace
IR B/D
Y
10
Page 74
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
D. Function error
LCD TV
Error
symptom
2. MR13(Magic Remocon) operating error
☞ A4
Check the
INSTART menu
RF Receiver ver
is “00.00” ?
☞ A23
Check & Repair
connection
Y
RF assy
☞ A4
RF Receiver ver
is “00.00” ?
Y
N
Check MR13
itself Operation
N
Close
MR13 operating checking
Normal
operating?
Check & Replace
Battery of MR13
Normal
operating?
Replace
MR13
Y
N
Y
N
Press the
wheel
Close
Established
date
Revised date
Is show ok
message?
Y
Close
Is show ok
message?
Close
Y
2013.01.31
Turn off/on the
N
set and press
the wheel
N
11/16
Press the back
key about 5sec
Down load the Firmware
* INSTART MENU 14.RF
Remocon Test 3. Firmware
download
* If you conduct the loop at 3times, change the M4.
11
Page 75
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
3.Wifi operating error
☞ A4
Check the
INSTART menu
Wi-Fi Mac value
is “NG”?
☞ A24
Check & Repair
connection
Y
Wifi cable
☞ A4
Wi-Fi Mac value
is “NG”?
D. Function error
Wifi operating checking
☞ A24
N
Check the Wifi wafer
N
Close
1pin
Established
Revised date
Normal
Voltage?
Y
Close
date
N
2013.01.31
12/16
Replace
Main B/D
Change the Wifi
Y
assy
12
Page 76
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
4.Camera operating error
☞ A4
Check the
INSTART menu
☞ A25
Check & Repair
Camera cable
☞ A4
D. Function error
Camera Ver.
is “NULL”?
Y
connection
Camera Ver.
is “NULL”?
Camera operating checking
☞ A25
N
Check the Camera wafer
P4200 12,13pin
N
Close
Established
Revised date
Normal
Voltage?
Y
Close
date
N
2013.01.31
13/16
Replace
Main B/D
Camera assy
Y
Change the
13
Page 77
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Check
input
signal
Error
symptom
Y
Signal
input?
N
Check and fix
external device/cable
D. Function error
External device recognition error
Check technical
information
- Fix information
- S/W Version
Technical
information?
Fix in
accordance
with technical
information
Y
N
Established
date
Revised date
External Input and
Component
Recognition error
HDMI/
DVI, Optical
Recognition error
2013.01.31
14/16
Replace Main B/D
Replace Main B/D
14
Page 78
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Identify
nose
type
Error
symptom
Circuit
noise
Mechanical
noise
※ Mechanical noise is a natural
phenomenon, and apply the 1st level
description. When the customer does not
agree, apply the process by stage.
※ Describe the basis of the description
in “Part related to nose ” in the Owner’s
Manual.
Check
location of
noise
Check location of
noise
Circuit noise, mechanical noise
E. Noise
Replace PSU
OR
Established
date
Revised date
※ When the nose is severe, replace the module
(For models with fix information, upgrade the
S/W or provide the description)
※ If there is a “Tak Tak” noise from the
cabinet, refer to the KMS fix information and
then proceed as shown in the solution manual
(For models without any fix information,
provide the description)
2013.01.31
15/16
15
Page 79
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
Zoom part with
exterior damage
F. Exterior defect
Module
damage
Cabinet
damage
Remote
controller
damage
Exterior defect
Replace module
Replace cabinet
Replace remote controller
Established
date
Revised date
2013.01.31
16/16
Stand
dent
Replace stand
16
Page 80
Contents of LCD TV Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No. Error symptom Content Page Remarks
1
A. Video error_ No video/Normal
audio
2 Check White Balance value A2
4
A. Video error_ video error /Video
lag/stop
5 LCD-TV Version checking method A4
6 Tuner Checking Part A5
A. Video error _Vertical/Horizontal bar,
7
residual image, light spot
8
A. Video error_ Color error
9 Adjustment Test pattern - ADJ Key A8
10
11 Exchange Main Board (2) A-2/5
<Appendix>
12 Exchange Power Board (PSU) A-3/5
Defected Type caused by T-Con/
Inverter/ Module
13 Exchange Module (1) A-4/5
Check LCD back light with naked eye A1
TUNER input signal strength checking
method
LCD TV connection diagram A6
Check Link Cable (EPI) reconnection
condition
Exchange Main Board (1) A-1/5
A3
A7
14 Exchange Module (2) A-5/5
Continue to the next page
Page 81
Contents of LCD TV Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Continued from previous page
No. Error symptom Content Page Remarks
16
B. Power error_ No power
17 Check power input Voltage & ST-BY 3.5V A18
18
19
20
21
22
23 Wifi operation checking method A24
24 Camera operation checking method A25 Not Used
25 E. Etc Tool option changing method A26
B. Power error_Off when on, off
while viewing
C. Audio error_ No audio/Normal
video
D. Function error
Check front display LED A17
POWER OFF MODE checking method A19
Checking method in menu when there is
no audio
Voltage and speaker checking method
when there is no audio
Remote controller operation checking
method
Motion Remote operation checking
method
A20
A21
A22
A23
Page 82
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
Content
A. Video error_No video/Normal audio
Check LCD back light with naked eye
Established
date
Revised
date
2013.01.31
A1
After turning on the power and disassembling the case, check with the naked eye,
whether you can see light from locations.
A1
Page 83
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
<ALL MODELS>
Error
symptom
Content
A. Video error_No video/Normal audio
Check White Balance value
Established
date
Revised
date
2014.02.14
A2
Ent ry me th od
Entry method
1. P ress th e A DJ b u tt o n o n th e rem o te co n trolle r f o r a d just m e n t.
1. Press the ADJ button on the remote controller for adjustment.
2. E n te r int o W h ite B a lan ce o f ite m 6 .
2. Enter into White Balance of item 10.
3. A f te r reco rding th e R, G , B (GA IN, Cut ) v a lue o f Colo r T e m p
3. After recording the R, G, B (GAIN, Cut) value of Color Temp
(C o o l/Med iu m / W a rm ), re - e n te r th e v a lue a f te r rep lacin g th e M A IN B OA RD .
(Cool/Medium/Warm), re-enter the value after replacing the MAIN BOARD.
A2
Page 84
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
<ALL MODELS>
Error
symptom
Content
A. Video error_Video error, video lag/stop
TUNER input signal strength checking method
Established
date
Revised
date
2014.02.14
A3
Quick Settings Programmes Programme Tunning
Manual Tuning
When the signal is strong, use the
attenuator (-10dB, -15dB, -20dB etc.)
A3
Page 85
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
Content
A. Video error_Video error, video lag/stop
LCD-TV Version checking method
Established
date
Revised
date
2014.02.14
A4
<ALL MODELS>
1. Checking method for remote controller for adjustment
Version
Press the IN-START with the remote
controller for adjustment
A4
Page 86
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
<ALL MODELS>
Error
symptom
Content
A. Video error_Video error, video lag/stop
TUNER checking part
Established
date
Revised
date
2014.02.14
A5
Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
2. After measuring each voltage from power supply, finally replace the MAIN BOARD.
A5
Page 87
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
<ALL MODELS>
Error
symptom
Content
A. Video error _Vertical/Horizontal bar,
residual image, light spot
LCD TV connection diagram (1)
Established
date
Revised
date
2014.02.14
A6
As the part connecting to the external input, check
the screen condition by signal
A6
Page 88
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
<ALL MODELS>
Error
symptom
Content
Check Link Cable (LVDS) reconnection condition
A. Video error_Color error
Established
date
Revised
date
2014.02.14
A7
Check the contact condition of the Link Cable, especially dust or mis insertion.
A7
Page 89
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
Content
A. Video error_Color error
Adjustment Test pattern - ADJ Key
Established
date
Revised
date
2014.02.14
A8
You can view 6 types of patterns using the ADJ Key
Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..)
4.Video error (Classification of MODULE or Main-B/D!)
A8
Page 90
Appendix : Exchange Main Board (1)
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Solder defect, CNT Broken
Solder defect, CNT Broken
Solder defect, CNT Broken
T - Con Def e ct, CN T B roke n
T - Con Def e ct, CN T B roke n
Solder defect, CNT Broken
T - Con Def e ct, CN T B roke n
Solder defect, CNT Broken
Abnormal Power Section
Solder defect, Short/Crack
Abnormal Power Section Solder defect, Short/Crack
A - 1/5
Page 91
Appendix : Exchange Main Board (2)
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Abnormal Power Section
Solder defect, Short/Crack
Abnormal Power Section
Fuse Open, Abnormal power section
Solder defect, Short/Crack
Abnormal Display
GRADATION
Noise
A - 2/5
GRADATION
Page 92
Appendix : Exchange Power Board (PSU)
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No Light
Dim Light
Dim Light
Dim Light
No picture/Sound Ok
A - 3/5
Page 93
Appendix : Exchange the Module (1)
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Panel Mura, Light leakage
Crosstalk
Panel Mura, Light leakage
Press damage
Press damage
Crosstalk
Un-repairable Cases
In this case please exchange the module.
Press damage
A - 4/5
Page 94
Appendix : Exchange the Module (2)
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Vertical Block
Source TAB IC Defect
Horizontal Block
Gate TAB IC Defect
Vertical Line
Source TAB IC Defect
Horizontal Block
Ga te T A B IC Def e ct
Gate TAB IC Defect
Vertical Block
Source TAB IC Defect
Horizontal line
Ga te T A B IC Def e ct
Gate TAB IC Defect
Un-repairable Cases
In this case please exchange the module.
Horizontal Block
Ga te T A B IC Def e ct
Gate TAB IC Defect
A - 5/5
Page 95
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
Content
B. Power error _No power
Check front Power Indicator
Established
date
Revised
date
2014.02.07
A17
ST-BY condition: On or Off
Power ON condition: Turn Off
A17
Page 96
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
Content
B. Power error _No power
Check power input voltage and ST-BY 3.5V
Check the DC 24V, 12V, 3.5V.
Established
date
Revised
date
P_main
Maker : Yeonho
28Pin SMAW200-H28S5K
28Pin map (LPB)
2014.02.05
A18
A18
Page 97
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
<ALL MODELS>
Error
symptom
Content
B. Power error _Off when on, off whiling viewing
POWER OFF MODE checking method
Established
date
Revised
date
2014.02.05
A19
Entry method
1. Press the IN-START button of the remote
controller for adjustment
2. Check the entry into adjustment item 3
A19
Page 98
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
<ALL MODELS>
Error
symptom
Content
C. Audio error_No audio/Normal video
Checking method in menu when there is no audio
Established
date
Revised
date
2014.02.05
A20
Checking method
1. Press the Setting button on the remote controller
2. Select the Sound function of the Menu
3. Select the Sound Out
4. Select TV Speaker
A20
Page 99
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Error
symptom
Content
C. Audio error_No audio/Normal video
Voltage and speaker checking method
when there is no audio
②
①
Established
date
Revised
date
2014.02.05
A21
Checking order when there is no audio
1.Check the contact condition of or 24V connector of Main Board
2. Measure the 24V input voltage supplied from Power Board
(If there is no input voltage, remove and check the connector)
3.Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the
GND and output terminal, the speaker is normal.
③
A21
Page 100
Standard Repair Process Detail Technical Manual
Copyright © 2014 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LCD TV
Front
Back
Error
symptom
Content
Remote controller operation checking method
D. Function error
Established
date
Revised
date
2014.02.07
A22
Wifi/ BT Combo
①
Checking order to check remote controller
Checking order
1.Check IR cable condition between IR & Main board.( Check picture number① and ②)
2.Check the standby 3.5V on the terminal 16 pin (③ )
3.AS checking the Pre-Amp(IR LED light) , the power is in ON condition, an Analog Tester
needle should move slowly, otherwise, it’s defective.
③
②
A22