LG 60LN54 Schematic

Page 1
Internal Use Only
LED TV
SERVICE MANUAL
CHASSIS : LB31F
MODEL : 60LN54** 60LN54**-T*
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
Printed in KoreaP/NO : MFL67704514 (1301-REV00)
Page 2
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ........................................................................ 3
SERVICING PRECAUTIONS ................................................................... 4
SPECIFICATION ...................................................................................... 6
ADJUSTMENT INSTRUCTION ............................................................... 8
TROUBLE SHOOTING .......................................................................... 14
BLOCK DIAGRAM ................................................................................. 20
EXPLODED VIEW .................................................................................. 21
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 3
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.
It will also protect the receiver and it's components from being damaged by accidental shorts of th e cir cuitry that may be inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exp ose d metallic par t. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 4
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conict between the
following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precau­tions. Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug
or other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explo­sion hazard.
2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its assemblies.
4. Unless specied otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10 % (by volume) Acetone and 90 % (by volume) isopropyl alcohol (90 % - 99 % strength) CAUTION: This is a ammable mixture. Unless specied otherwise in this service manual, lubrication of contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed.
7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last.
8. Use with this receiver only the test xtures specied in this service manual. CAUTION: Do not connect the test xture ground strap to any heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged eas­ily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some eld-effect transistors and semiconductor “chip” components. The following techniques should be used to help reduce the incidence of component dam­age caused by static by static electricity.
1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alter­natively, obtain and wear a commercially available discharg­ing wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test.
2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or expo­sure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES devices.
4. Use only an anti-static type solder removal device. Some sol­der removal devices not classied as “anti-static” can generate electrical charges sufcient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate electrical charges sufcient to damage ES devices.
6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads elec­trically shorted together by conductive foam, aluminum foil or comparable conductive material).
7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective mate­rial to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or cir­cuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replace­ment ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted oor can generate static electricity suf­cient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropri­ate tip size and shape that will maintain tip temperature within the range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wire­bristle (0.5 inch, or 1.25 cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand
against the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there only until the solder ows onto and around both the compo­nent lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 5
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent at against the cir­cuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts.
2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and solder it.
3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remain­ing on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection.
Power Output, Transistor Device Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as pos­sible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit board.
3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder.
3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed when­ever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connec­tions).
1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board.
1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly con­nected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.
Fuse and Conventional Resistor Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow stake.
2. Securely crimp the leads of replacement component around notch at stake top.
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 6
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
1. Application range
This specification is applied to the LED TV used LB31F chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
(1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C (2) Relative Humidity: 65 % ± 10 % (3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz) * Standard Voltage of each products is marked by models.
(4) Specification and performance of each parts are followed
ea ch dra wing and speci ficat ion by part number in accordance with BOM.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
4. Model General Specification
No. Item Specication Remarks
1. Market
2. Broadcasting system
3. Channel Storage ATV - 135EA, DTV - 1000EA
4. Receiving system
5. Video(Composite Input) PAL, SECAM, NTSC 4 System : PAL, SECAM, NTSC, PAL60
6. Component Input Y/Cb/Cr, Y/Pb/Pr
7. HDMI Input
8. SPDIF out SPDIF out
9 USB Input For My Media(Movie/Photo/Music List) and SVC
10 Headphone
Asia, Oceania, Africa, Middle East (PAL/DVB Market)
1) PAL/SECAM-B/G/D/K
2) PAL-I
3) NTSC-M
4) DVB-T
Analog : Upper Heterodyne Digital : COFDM(DVB-T)
HDMI1-DTV/DVI HDMI2-DTV/DVI
► DVB-T
- Guard Interval(Bitrate_Mbit/s) 1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate QPSK : 1/2, 2/3, 3/4, 5/6, 7/8 16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8 64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 7
5. Component Video Input (Y, Cb/Pb, Cr/Pr)
No. Resolution H-freq(kHz) V-freq(Hz) Porposed
1 720×480 15.73 60.00 SDTV, DVD 480i
2 720×480 15.63 59.94 SDTV, DVD 480i
3 720×480 31.47 59.94 480p
4 720×480 31.50 60.00 480p
5 720×576 15.625 50.00 SDTV, DVD 625 Line
6 720×576 31.25 50.00 HDTV 576p
7 1280×720 45.00 50.00 HDTV 720p
8 1280×720 44.96 59.94 HDTV 720p
9 1280×720 45.00 60.00 HDTV 720p
10 1920×1080 31.25 50.00 HDTV 1080i
11 1920×1080 33.75 60.00 HDTV 1080i
12 1920×1080 33.72 59.94 HDTV 1080i
13 1920×1080 56.250 50 HDTV 1080p
14 1920×1080 67.5 60 HDTV 1080p
6. HDMI Input : Refer to adjust specification about EDID data.
6.1. DTV mode
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed
1. 720*480 31.469 / 31.5 59.94 / 60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 / 45 59.94 / 60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 / 33.75 59.94 / 60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 / 27 23.97 / 24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716/33.75 29.976/30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 / 67.5 59.94 / 60 148.35/148.50 HDTV 1080P
6.2. PC mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 640*350 @70Hz 31.468 70.09 25.17 EGA
2. 720*400 @70Hz 31.469 70.08 28.321 DOS
3. 640*480 @60Hz 31.469 59.940 25.175 VESA(VGA)
4. 800*600 @60Hz 37.879 60.31 40.000 VESA(SVGA)
5. 1024*768 @60Hz 48.363 60.00 65.000 VESA(XGA)
6 1152*864 @60Hz 54.348 60.053 80.002 VESA
7. 1280*1024 @60Hz 63.981 60.020 108 VESA(SXGA) FHD only(Support to HDMI-PC)
8. 1360*768 @60Hz 47.712 60.015 85.5 VESA(WXGA)
9. 1920*1080 @60Hz 67.5 60.0 148.5
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Only for training and service purposes
WUXGA (Reduced blanking)
FHD only(Support to HDMI-PC)
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 8
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LED TV with LB31F chassis.
2. Designation
(1) Th e ad justm ent is accord ing to the order whic h is
designated and which must be followed, according to the
plan which can be changed only on agreeing. (2) Power adjustment : Free Voltage. (3) Magnetic Field Condition: Nil. (4) Input signal Unit: Product Specification Standard. (5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 °C ± 5 °C Relative humidity : 65 ± 10 % Input voltage : 100-220 V~, 50/60 Hz
(6) Adjustment equipments
: Color Analyzer(CA-210 or CA-110), Service remote control.
(7) Push the “IN STOP" key - For memory initialization.
Case1 : Software version up
1. After downloading S/W by USB , TV set will reboot automatically.
2. Push “In-stop” key.
3. Push “Power on” key.
4. Function inspection
5. After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push “In-stop” key at rst.
2. Push “Power on” key for turning it on.
→ If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
(4) Click "Connect" tab. If "Can't" is displayed, check connection
between computer, jig, and set.
(2)
(3)
Please Check the Speed : To use speed between from 200KHz to 400KHz
(5) Click "Auto" tab and set as below. (6) Click "Run". (7) After downloading, check "OK" message.
(4)
filexxx.bin
(5)
(7)...........OK
(6)
3. Main PCB check process
▪ APC - After Manual-Insert, executing APC
* Boot file Download
(1) Execute ISP program "Mstar ISP Utility" and then click
"Config" tab.
(2) Set as below, and then click "Auto Detect" and check "OK"
message. If "Error" is displayed, check connection between computer, jig, and set.
(3) Click "Read" tab, and then load download file(XXXX.bin)
by clicking "Read"
(1)
filexxx.bin
* USB DOWNLOAD(*.epk file download)
(1) Put the USB Stick to the USB socket. (2) Automatically detecting update file in USB Stick.
- If version of update file in USB Stick is lower, it will not work. But version of update file is higher, USB data will be detected automatically.
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 9
(3) Show the message "Copying files from memory".
(4) Updating is starting.
4. ADC Process
4.1. ADC
- Enter Service Mode by pushing "ADJ" key,
- Enter Internal ADC mode by pushing "►" key at "8. ADC Calibration".
<Caution> Using "P-ONLY" key of the Adjustment remote
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Tool Option5
5. Tool Option Commercial
6. Country Group
7. Area Option
8. ADC Calibration
9. White Balance
10. 10 Point WB
11. Test Pattern
12. EDID D/L
13. Sub B/C
14. Ext. Input Adjust
control, power on TV.
ADC Calibration
ADC Comp 480i
ADC Comp 1080p
ADC Type
Start
Reset
OTP
NG
NG
(5) Updating Completed, The TV will restart automatically. (6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If updated version is higher than what TV has, the TV can
lost all channel data. In this case, you have to channel recover. If all channel data is cleared, you didn’t have a DTV/ATV test on production line.
* After downloading, have to adjust Tool Option again.
(1) Push "IN-START" key in service remote control. (2) Select "Tool Option 1" and push "OK" key. (3) Punch in the number. (Each model has their number) (4) Completed selecting Tool option.
*
RS-232C Connection Method.
Connection : PCBA (USB Port) → USB to Serial Adapter (UC-232A) → RS-232C cable → PC(RS-232C port)
● Product name of USB to Serial Adapter is UC-232A.
* ADC Calibration Protocol (RS232)
NO Item CMD 1 CMD 2 Data 0
Enter Adjust MODE
ADC adjust ADC Adjust A D 1 0
Adjust ‘Mode In’
A A 0 0
When transfer the ‘Mode In’, Carry the command.
Automatically adjustment (The use of a internal pattern)
Adjust Sequence ▪ aa 00 00 [Enter Adjust Mode] ▪ xb 00 40 [Component1 Input (480i)] ▪ ad 00 10 [Adjust 480i Comp1] ▪ aa 00 90 End Adjust mode * Required equipment : Adjustment remote control.
4.2. Function Check
4.2.1. Check display and sound
■ Check Input and Signal items.
(1) TV (2) AV (CVBS) (3) COMPONENT (480i) (4) HDMI * Display and Sound check is executed by Remote control.
<Caution> Not to push the "INSTOP" key after completion if
the function inspection.
Only for training and service purposes
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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 10
5. Total Assembly line process
5.1. Adjustment Preparation
▪ W/B Equipment condition
CA210: CH14, Test signal: Inner pattern(80IRE)-LED Module
▪ Above 5 minutes H/run in the inner pattern. ("power on" key
of Adjustment remote control)
* Connecting picture of the measuring instrument
(On Automatic control) Inside Pattern is used when W/B is controlled. Connect to auto controller or push Adjustment Remote control POWER ON → Enter the mode of White-Balance, the pattern will come out.
* The spec of color temperature and coordinate.
Mode Color Temp Color coordinate Remark
Cool (C50) 13,000 K
Medium(0) 9,300 K
Warm(W50) 6,500 K
X=0.271 (±0.002) Y=0.270 (±0.002)
X=0.285 (±0.002) Y=0.293 (±0.002)
X=0.313 (±0.002) Y=0.329 (±0.002)
<Test Signal>
- Inner pattern for W/B adjust
- External white pattern
(80IRE, 204gray)
▪ W/B Table in process of aging time
- LGD / CMI Module(Normal line)
Aging time Cool Medium Warm
Color coordinate X y x y x y
Target 271 270 285 293 313 329 1 0-2 281 287 295 310 320 342 2 3-5 280 285 294 308 319 340 3 6-9 278 284 292 307 317 339 4 10-19 276 281 290 304 315 336 5 20-35 275 277 289 300 314 332 6 36-49 274 274 288 297 313 329 7 50-79 273 272 287 295 312 327 8 80-119 272 271 286 294 311 326 9 Over 120 271 270 285 293 310 325
- LGD / CMI Module(aging chamber)
Aging time Cool Medium Warm
Color coordinate X y x y x y
Target 271 270 285 293 313 329 1 0-5 280 285 294 308 319 340 2 6-10 276 280 290 303 315 335 3 11-20 272 275 286 298 311 330 4 21-30 269 272 283 295 308 327 5 31-40 267 268 281 291 306 323 6 41-50 266 265 280 288 305 320 7 51-80 265 263 279 286 304 318 8 81-119 264 261 278 284 303 316 9 Over 120 264 260 278 283 303 315
- AUO/COST/SHARP/BOE Module which cool spec is 13000K
Cool Medium Warm
X y x y x y
spec 271 270 285 293 313 329
target 275 276 289 299 317 335
Full White Pattern
RS-232C Communication
CA-210
COLOR ANALYZER TYPE : CA-210
* Auto-control interface and directions
(1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10 lux).
(2) Adhere closely the Color analyzer(CA210) to the module
less than 10 cm distance, keep it with the surface of the Module and Color analyzer's prove vertically.(80° ~ 100°).
(3) Aging time
- After aging start, keep the power on (no suspension of power supply) and heat-run over 5 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others, check the back light on.
▪ Auto adjustment Map(RS-232C)
RS-232C COMMAND [CMD ID DATA] Wb 00 00 White Balance Start Wb 00 ff White Balance End
RS-232C COMMAND
[CMD ID DATA]
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 172 192 192 192
G Gain jh Jb je 00 172 192 192 192
B Gain ji Jc jf 00 192 192 172 192
R Cut 64 64 64 128
G Cut 64 64 64 128
B Cut 64 64 64 128
MIN
<Caution>
Color Temperature : COOL, Medium, Warm. One of R Gain/G Gain/ B Gain should be kept on 0xC0, and adjust other two lower than C0.(When R/G/B Gain are all C0, it is the FULL Dynamic Range of Module)
CENTER
(DEFAULT)
MAX
Only for training and service purposes
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Page 11
* Manual W/B process using adjust Remote control.
■ Color analyzer(CA100+, CA210) should be used in the calibrated ch by CS-1000.
■ Operate the zero-calibration of the CA100+ or CA-210, then stick sensor to the module when adjusting.
■ After enter Service Mode by pushing “ADJ” key,
■ Enter White Balance by pushing “►” key at “9. White Balance”.
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Tool Option5
5. Tool Option Commercial
6. Country Group
7. Area Option
8. ADC Calibration
9. White Balance
10. 10 Point WB
11. Test Pattern
12 EDID D/L
13. Sub B/C
14. Ext. Input Adjust
■ For manual adjustment, it is also possible by the following sequence.
(1) Set TV in Adj. mode using “P-ONLY” key on remote
controller and then operate heat run longer than 15 minutes.(If not executed this step, the condition for W/B
may be different.) (2) Push “Exit” key. (3) Enter White Balance mode by pushing the ADJ key and
select “9. White Balance”. When KEY (►) is pressed,
206 Gray internal pattern will be displayed. (4) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10cm of the surface (5) Sele ct eac h it ems (R ed/Gr een/Blu e Ga in) us ing
▲/▼(CH +/-) key on Remote control. (6) Adjust R/ G/ B Gain using ◄/►(VOL +/-) key on R/C. (7) Adjust three modes all (Cool / Medium / Warm)
- For All model w/o LS345 Fix the one of R/G/B gain and change the others
- For G-FIX model Cool Mode
1) Fix the one of R/G/B gain to 192 (default data) and
decrease the others. (If G gain is adjusted over 172 and R and B gain less than 192 , Adjust is O.K.)
2) If G gain is less than 172, Increase G gain by up to
172, and then increase R gain and G gain same amount of increasing G gain.
3) If R gain or B gain is over 255, readjust G gain less
than 172, Conform to R gain is 255 or B gain is 255 Medium / Warm Mode - Fix the one of R/G/B gain to 192 (default data) and decrease the others.
(8) When adjustment is completed, exit adjustment mode
using EXIT key on Remote control.
Whit Balance
Color Temp.
R-Gain
G-Gain
B-Gain
R-Cut
G-Cut
B-Cut
Test-Pattern
Backlight
Reset To Set
Cool
172
192
192
64
64
64
ON
100
* CASE Cool
First adjust the coordinate far away from the target value(x, y).
1) x, y > target i) Decrease the R, G.
2) x, y < target i) First decrease the B gain, ii) Decrease the one of the others.
3) x > target, y < target i) First decrease B, so make y a little more than the
target.
ii) Adjust x value by decreasing the R.
4) x < target, y > target i) First decrease B, so make x a little more than the
target.
ii) Adjust x value by decreasing the G.
* After You finish all adjustments, Press “In-start” button
and compare Tool option and Area option value with its BOM, if it is correctly same then unplug the AC cable.
If it is not same, then correct it same with BOM and unplug AC cable. For correct it to the model’s module from factory JIG model.
* Push the “IN STOP" key after completing the function
inspection.
5.2. DDC EDID Write (HDMI 256Byte)
■ Connect HDMI Signal Cable to HDMI Jack.
■ Write EDID DATA to EEPROM(24C02) by using DDC2B protocol.
■ Check whether written EDID data is correct or not.
* For Service main Assembly, EDID have to be downloaded.
5.3. EDID DATA
1) All Data : HEXA Value
2) Changeable Data : *: Serial No : Controlled / Data:01 **: Month : Controlled / Data:00 ***: Year : Controlled ****: Check sum
- Auto Download
■ After enter Service Mode by pushing “ADJ” key,
■ Enter EDID D/L mode.
■ Enter “START” by pushing “OK” key.
EZ ADJUST
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Tool Option5
5. Tool Option Commercial
6. Country Group
7. Area Option
8. ADC Calibration
9. White Balance
10. 10 Point WB
11. Test Pattern
12. EDID D/L
13. Sub B/C
14. Ext. Input Adjust
EDID D/L
HDMI1 NG
HDMI2 NG
Reset
Start
EDID D/L
HDMI1 OK
HDMI2 OK
Reset
Start
Only for training and service purposes
- 11 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 12
* Edid data and Model option download (RS232)
NO Item CMD 1 CMD 2 Data 0
Enter download Mode
EDID data and Model option download
No. Item Condition Hex Data
1 Manufacturer ID GSM 1E6D
2 Version Digital : 1 01
3 Revision Digital : 3 03
Download ‘Mode In’
ADC Adjust A E 00 10
A A 0 0
When transfer the ‘Mode In’, Carry the command.
Automatically adjustment (The use of a internal pattern)
5.4. Outgoing condition Configuration
■ When pressing IN-STOP key by Service remote control, Red LED are blinked alternatively. And then automatically turn off. (Must not AC power OFF during blinking)
5.5. GND and HI-POT Test
5.5.1. GND & HI-POT auto-check preparation
(1) Check the POWER CABLE and SIGNAL CABE insertion
condition
(2) You can’t use Tuner Ground & Tuner signal line at LB31B/
LB36B/LB31F/LB31J.
[Caution]
* Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
(1) FHD 10BIT HDMI EDID DATA (60LN54 SREIRS)
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D A B 10 C 01 03 80 A0 5a 78 0A EE 91 A3 54 4C 99 26 20 0F 50 5 4 A1 08 00 31 40 45 40 61 40 71 40 81 80 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 40 45 0 0 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30 50 40 70 36 0 0 A0 5A 00 0 0 00 1E 0 0 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 D
70 D 01 E 80 02 03 22 F1 4E 10 9F 04 13 05 14 03 02 12 20 21 90 22 15 01 26 15 07 50 09 57 07 f
A0 f 01 1d 80 18 71 1c 16 20 58 2c 25 00 20 C2 B0 31 00 0 9e 01 1d 00 72 51 d0 1e 20 6e 28 55 0 0 C0 20 C2 31 00 00 1e 02 3a 80 18 71 38 2d 40 58 2c D0 45 00 A0 5a 00 00 00 1e 01 1d 00 Bc 52 d0 1e 20 E0 B8 28 55 40 C4 8e 21 00 00 1e 00 00 00 00 00 00 F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E
(2) Detail EDID Options are below
a. Product ID
Model Name HEX EDID Table DDC Function
HD/FHD Model 0001 01 00 Analog/Digital
b. Serial No: Controlled on production line. c. Month, Year: Controlled on production line:
ex) Week : '01' -> '01'
Year : '2013' -> '17' fix
d. Model Name(Hex):
cf) TV set’s model name in EDID data is below.
MODEL NAME MODEL NAME(HEX)
LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)
e. Checksum: Changeable by total EDID data.
EDID C/S data FHD-10BIT(HDMI)
Check Sum
(Hex)
Block 0 42
Block 1
DE (HDMI1) CE (HDMI2)
f. Vendor Specific
- FHD 10bit model Input Model name(HEX)
HDMI1 67030C001000B82D HDMI2 67030C002000B82D
5.5.2. GND & HI-POT auto-check
(1) Pallet moves in the station.(POWER CORD / AV CORD is
tightly inserted) (2) Connect the AV JACK Tester. (3) Controller (GWS103-4) on. (4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process(Hi-pot test). (Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next process automatically.
5.5.3. Checkpoint
(1) Test voltage
1) 3 Poles
- GND: 1.5 KV/min at 100 mA
- SIGNAL: 3 KV/min at 100 mA
2) 2 Poles
- SIGNAL: 3 KV/min at 100 mA (2) TEST time: 1 second (3) TEST POINT
1) 3 Poles
- GND Test = POWER CORD GND and SIGNAL
CABLE GND.
- Hi-pot Test = POWER CORD GND and LIVE &
NEUTRAL.
2) 2 Poles
- Hi-pot Test = Accessible Metal and LIVE & NEUTRAL. (4) LEAKAGE CURRENT: At 0.5 mArms
6. Local Dimming Function Check
Step1) Turn on TV. Step2) Press “P-only” key, enter to power only mode and
escape the “P-only” Mode by pressing “Exit” key. Step3) Press “Tilt” key, entrance to Local Dimming mode. Step4) At the Local Dimming mode, module Edge Backlight
moving Top to bottom Back light of module moving. Step5) confirm the Local Dimming mode. Step6) Press “Exit” key.
Only for training and service purposes
- 12 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 13
7. 3D function test
(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4]) * HDMI mode No. 872 , pattern No.83 (1) Please input 3D test pattern like below.
(2) When 3D OSD appear automatically, then select OK key.
(3) Don't wear a 3D Glasses, check the picture like below.
8. EYE-Q function check
Step1) Turn on TV Step 2) Press EYE key of Adj. R/C. Step 3) Cover the Eye Q sensor on the front of the using your
hand and wait for 6 seconds.
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw
Data(Sensor data, Back light)”. If after 6 seconds, R/ G/ B value is not lower than 10, replace Eye Q sensor
Step 5) Remove your hand from the Eye Q sensor and wait
for 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen, replace
Eye Q sensor.
Only for training and service purposes
- 13 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 14
1. Power-up boot check
TROUBLESHOOTING
Check stand - by Voltage.
P401 3, 5pin : +3.5V_ST
ok
Check stand - by Voltage
L404, L408 : +3.5V
ok
Check X201 clock
24 MHz
ok
Check P401 PWR_ON.
1pin : 3.3V
ok
Check Multi Voltage P401 9, 10pin : 24V
/ 13, 14, 15pin:12V
ok
Check IC402/3/7 Output Voltage
IC402 : 2.5V
IC403 : 1.15V
IC407 : 1.5V
Q403 : 3.3V
ok
Check LVDS Power Voltage
Q409 : 12V
ok
Check Mstar LVDS Output
ok
Check URSA5 LVDS Output
ok
Check DRV ON Control
P403 2 pin : High
ok
Change Module
No
No
No
No
No
No
No
No
Check 18pin Power connector
Replace L404, L408
Replace X201
Re- download software.
Replace Power Board
Replace IC402, IC403, IC407, Q403
Replace Q409
Replace Mstar(IC101) or Main Board
No
Replace URSA5(IC6101) or Main Board.
Check Power Board
okNo
Main B/D 3.5V Line
Short Check
No
Replace Mstar(IC101) or Main board
ok
Replace Power board.
Only for training and service purposes
- 14 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 15
2. Digital/Analog TV Video
Check RF Cable & Signal
ok
Check Tuner 3.3V Power
L3703
ok
Check Tuner 1.8V Power
IC3703 2 pin : 1.8V
ok
Check IF_P/N Signal
TU3700 10/11 Pin
ok
Check Mstar LVDS Output
ok
Check URSA5 LVDS Output
No
No
No
No
No
Replace L3703
Replace IC3703
Bad Tuner. Replace Tuner.
Replace Mstar(IC101) or Main Board.
Replace URSA5(IC6101) or Main Board.
3. AV Video
Check input signal format.
Is it supported?
Check AV Cable for damage
for damage or open conductor
Check JK1702, CVBS Signal Line
R1722
Check CVBS_DET Signal
Check Mstar LVDS Output
Check URSA5 LVDS Output
ok
ok
No
ok
No
ok
No
ok
No
Replace Jack
Replace R1713
Replace Mstar(IC101) or Main Board.
Replace URSA5(IC6101) or Main Board.
Only for training and service purposes
- 15 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 16
4. Component Video
Check input signal format.
Is it supported?
ok
Check Component Cable
for damage or open conductor.
ok
Check JK1702
Y/PB/PR signal Line
ok
Check COMP_DET Signal
ok
Check Mstar LVDS Output
ok
Check URSA5 LVDS Output
5. HDMI Video
No
No
No
No
Replace Jack
Replace R1712 or R1713
Replace Mstar(IC101) or Main Board.
Replace URSA5(IC6101) or Main Board.
Check input signal format.
Is it supported?
ok
Check HDMI Cable conductors for damage or open conductor.
ok
Check EDID
R832, R833, R834, R835 I2C Signal
ok
Check JK801, JK803
ok
Check HDMI_DET (HPD)
ok
Check HDMI Signal
ok
Check Mstar LVDS Output
ok
Check URSA5 LVDS Output
No
Replace the defective IC or re-download EDID data
No
Replace Jack
No
Replace R803, R801, R826, R807, R817, Q801, R819, R818, R830
No
Check other set If no problem, check signal line
No
Replace Mstar(IC101) or Main Board.
No
Replace URSA5(IC6101) or Main Board.
No
Replace Main Board
Only for training and service purposes
- 16 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 17
6. MHL Video
Check input signal format.
Is it supported?
ok
Check MHL Cable conductors
for damage or open conductor.
ok
Check MHL Signal (R214, R215)
ok
Check JK803
ok
Check CD_Sense, Cbus, Vbus
ok
Check MHL Signal
ok
Check Mstar LVDS Output
No
Replace the defective IC or re-download EDID data
No
Replace Jack
No
Replace R810, R802, R831, R830, IC802, D800
No
Check other set If no problem, check signal line
No
Replace Mstar(IC101) or Main Board.
No
Replace Main Board
ok
Check URSA5 LVDS Output
No
Replace URSA5(IC6101) or Main Board.
Only for training and service purposes
- 17 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 18
7. All Source Audio
Check the TV Speaker Menu
(Menu -> Audio -> TV Speaker)
On
Check AMP IC(IC3401) Power
24V, 3.3V
ok
Check Mstar AUDIO_MASTER_CLK
R148
ok
Check AMP I2C Line
R3406, R3407
ok
Check Mstar I2S Output
IC3401 37,38,39 Pin
ok
Check Output Signal P3401
1, 2, 3, 4 pin.
ok
Check Connector & P3401
ok
Check speaker resistance
and connector damage.
Off
No
No
No
No
No
No
No
Toggle the Menu
Replace Amp IC(IC501)
Replace Mstar(IC101) or Main Board.
Check signal line. Or replace Mstar(IC101)
Check signal line. Or replace Mstar(IC101)
Replace Audio AMP IC(IC3401)
Replace connector if found to be damaged.
Replace speaker.
Only for training and service purposes
- 18 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 19
8. Digital/Analog TV Audio
Check RF Ca ble & Signal
ok
Check Tuner 3.3V Power
L3703
ok
Check Tuner 1.8V Power
IC3703 2 pin : 1.8V
ok
Check IF_P/N Signal
TU3700 10/11 Pin
ok
Follow procedure ‘7 . All source audio’
trouble shooting guide.
9. AV Audio
Check AV Cable for damage
for damage or open conductor
ok
Check JK1702 Signal Line
R1714,R1715
No
No
No
No
Replace L3703
Replace IC3703
Bad Tuner. Repla ce Tuner.
Replace Jack
ok
Follow procedure
‘7. All source audio’
trouble shooting guide.
10. Component Audio
Check Component Cable
for damage or open conductor.
ok
Check JK1702 Signal Line
R1714,R1715
ok
Follow procedure
‘7. All source audio’
trouble shooting guide.
No
Replace Jack
Only for training and service purposes
- 19 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 20
BLOCK DIAGRAM
51P LVDS wafer
(P6401)
TXA0+/-~TXA4+/-, TXACK+/-
TXB0+/ -~TXB4+/-, TXB CK+/-
SPK_L
IC102
IC1300
(16Mbit)
Serial Flash
SPI_SCK /SDI/SD O/CS
IC1201
(1Gbit)
NAND FLASH
PCM_A[0-7],…
IC104
(2Gbit)
DDR3 SDRAM
A-MDQL[0-7], A-MDQU[0-7], …
(256Kbit)
System EEPROM
I2C_SC L/SDA
AUD_LR CH,
AUD_MASTER _CLK,
SPK_R
(IC3401)
STA380BW
AMP_SCL/ SDA
AUD_LR CK, AUD_SCK
URSA Block
(P6402)
TXC0+/ -~TXC4+/-, TXC CK+/-
TXD0+/ -~TXD4+/-, TXD CK+/-
(IC6101)
LGE7303C
URSA5
RXA0+/-~RXA4+/-, RXACK+/-
RXB0+/ -~RXB4+/-, RXB CK+/-
41P LVDS wafer
IC6201
A-MDQL[0-7], A-MDQU[0-7], …
(1Gbit)
DDR3 SDRAM
IC6102
(2Mbit)
Serial Flash
SPI_SCK /SDI/SD O/CS
(IC101)
Main SOC
M1(MSD804KKX)
USB1_OC D/CTL
SIDE_U SB_DM/D P
(IC401)
OCP IC : TPS65281
CK+/ -, D0+/-, D1+/-, D2+/-, _HDMI 4
+5V_USB
USB
(JK700)
DDC _SCL/SDA_4, HD MI_CEC, MHL _CD_SENSE
(JK803)
HDM I2(MHL)
SIDE
IF
SIF (Read y)
TU_SC L / SDA
TDSH-G501D
RF
KEY1/2, LED_R , IR, SDA, SCL
SPDIF _OUT
(P600)
Connector
DDC _SCL/SDA_2, HD MI_CEC
CK+/ -, D0+/-, D1+/-, D2+/-_H DMI2
COMP1_L /R_IN
COMP1_Y+/ AV_CVB S_IN, COMP1_Pb +/Pr +
Half NIM
HDM I1
REAR
(JK1103)
(JK802)
SPDIF (Optic)
(JK1602)
Comp 1 & AV1
Only for training and service purposes
- 20 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 21
400
521
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essenti al that these special safet y parts shoul d be replac ed with the same compo nents as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
LV1
300
540
120
LV2
530
123
810
910
900
122
200
510
200T
500
301
A10
A9
Set + Stand
Stand Base+Stand Body
A2
Only for training and service purposes
- 21 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 22
TP for NON-EU models(except EU and China)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
TP for CI slot
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_IORD PCM_A[11]
/PCM_IOWR CI_TS_DATA[1]
/PCM_CE
/PCM_IRQA
/PCM_CD
/PCM_WAIT
PCM_RST
PCM_5V_CTL
CI_DET
TP for S2
PCM_D[0]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[12]
PCM_A[13]
PCM_A[14]
TP for FE_TS_DATA
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
TP for SCART
SCART1_MUTE
SC1_IDPCM_D[1]
SC1_FB
SC1_SOG_INCI_TS_DATA[0]
DTV/MNT_VOUT
SCART1_Lout
SCART1_Rout
SC1_CVBS_IN
SC1_R+/COMP1_Pr+
SC1_G+/COMP1_Y+
SC1_B+/COMP1_Pb+
SC1/COMP1_DET
SC1/COMP1_L_IN
SC1/COMP1_R_IN
TP for Headphone
HP_LOUT
HP_ROUT
SIDE_HP_MUTE
HP_DET
S2_RESET
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
TP_NON_EN
2012.07.02 3
Page 23
L13 POWER BLOCK (POWER DETECT 2)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
FROM LIPS & POWER B/D
+3.5V_ST
MMBT3906(NXP)
Q402
3
1
2
L404
CIC21J501NE
L407
MLB-201209-0120P-N2
L402
MLB-201209-0120P-N2
R411
OPT 33K
P401
SMAW200-H18S1
PWR ON
3.5V
3.5V GND 24V GND 12V 12V GND
DRV ON
1
2
PDIM#1
3
4
PDIM#2
5
6
GND
7
8
24V
10
9
GND
11
12
12V
13
14
N.C
15
16
GND
17
18
19
.
R415 100
RL_ON
+3.5V_ST
R461 10K
+3.5V_ST
+24V
+12V
10K
OPT
R401
R462
10K
B
D401 5V
CIC21J501NE
L408
C406 0.1uF
C418 0.1uF
C404 0.1uF
R416 10K
R406
4.7K
C
Q401 MMBT3904(NXP)
E
OPT
16V
50V
16V
+3.3V_Normal
R419
1K
C
R421 10K
B
E
Q405
MMBT3904(NXP)
R412 3.9K
PWM_DIM_PULL_DOWN
*For 55LN54 Power ON Noise
R408 100
PWM2_2CH_POWER
+3.5V_ST
R426 10K
INV_CTL
PWM_DIM PWM1
PANEL_POWER
+12V
L412 120
CIS21J121
C438
0.1uF 25V
OPT
PANEL_CTL
001:AL22
R489 10K
+1.5V_DDR
+3.5V_ST
L420 BLM18PG121SN1D
C461 10uF
10V
+3.3V_Normal
R433 10K
R439
33K
R440
5.6K
1
2
3
1.5A
4
B
IC407
C
Q407 MMBT3904(NXP)
E
9
THERMAL
8
7
6
5
R430 10K
AP7173-SPG-13 HF(DIODES)
IN
PG
VCC
EN
[EP]
OUT
FB
SS
GND
C443 10uF
16V
Q409
AO3407A
S
G
C467 560pF 50V
+3.5V_ST --> 3.375V --> 3.46V
+24V --> 3.78V --> 3.92V (3.79V)
Power_DET
+12V
+3.5V_ST
D
R1
R457
4.3K
1/16W 1%
R2
R456
4.7K 1/16W 1%
R405
5.6K
PANEL_VCC
R407
5.6K
C472 22uF 10V
L410
CIC21J501NE
C476
0.1uF 16V
+1.5V_DDR
D403 5V OPT
PD_+24V
R482
8.2K 1%
PD_+24V
PD_+24V C412
0.1uF 16V
R403
1.5K 1%
+3.3V_Normal
+24V
C411
0.1uF 16V
PD_+12V
R448
2.7K
PD_+12V
R447
1.2K
1%
1%
+3.5V_ST
PD_+3.5V
R434
10K
R450
0
5%
PWR_DET_ON_SEMI
NCP803SN293
VCC
3
PD_+24V_PWR_DET_ON_SEMI
NCP803SN293
VCC
3
R438 22K
+12V --> 3.58V --> 3.82V (3.68V)
R402-*1 100
+3.5V_SOC_RESET
RESET_IC_SOC_RESET
R402 300
PD_+24V
R480 100
AO3435 Q403
D
S
G
+3.5V_ST
R463
RESET_IC_SOC_RESET
10K
BLM18PG121SN1D
C425
0.1uF 16V
R488 100K
IC408
GND
PD_+24V
R404
100K
IC409
GND
1
1
C423
2.2uF 10V
RESET
2
POWER_DET_RESET
RESET
2
FET_2.5V_AOS
C474
0.1uF
L403
POWER_DET
+3.3V_Normal
IC408-*1
APX803D29
RESET
PWR_DET_ON_DIODES
RESET
PD_+24V_PWR_DET_DIODES
C437 22uF 10V
2
1
IC409-*1
APX803D29
2
1
5V
3
GND
3
GND
D405
VCC
VCC
+5V_Normal & +5V_USB
+12V
L401
CIC21J501NE
R410
100K
CHANGE TO 16V/X5R
C405 10uF 16V
C419
4.7uF 10V
Vout=0.8*(1+R1/R2)
L406
R491
0
BST
13
14
15
16
THERMAL
1
SS
3.6uH
10FB11LX12
IC401 TPS65281RGV
17
3
2
ROSC
COMP4RLIM
R409 2K
C410 3300pF 50V
C413
0.047uF 25V
PGND
VIN
V7V
[EP]
EN
C426 100pF 50V
OPT
SW_IN
9
C420 22uF 16V
R413 16K
8
7
6
5
C421 22uF 16V
SW_OUT
AGND
FAULT
EN_SW
R445
Vout=0.8*(1+R1/R2)=1.5319
POWER_ON/OFF_1
R443 10K
+2.5V_Normal
+3.3V_Normal
+5V_Normal
R1
R452
33K
1%
C424 330pF
R453
OPT
27K
C417 10uF
10V 85C
1%
50V
R454
11K 1%
CAP_10uF_X5R
CHANGE TO 10UF/10V/X5R
+5V_Normal
C417-*1
10uF 10V
CAP_10uF_X7R
R2
R414 10K
+3.3V_Normal
+5V_USB
R417
4.7K OPT
C422
0.1uF 16V
OPT
USB1_OCD
USB1_CTL
TJ1118S-2.5
IN
3
IC402
1
GND
OUT
2
CAP_10uF_X5R
CHANGE TO 10UF/10V/X5R
C403
10uF
10V
85C
C403-*1
10uF 10V
CAP_10uF_X7R
C440
0.1uF 16V
+2.5V_Normal
D402 5V OPT
S7LR core 1.15V volt
R428 10K
VIN_3
EP[GND]
1
THERMAL
2
3
TPS54319TRE
4
5
AGND
17
IC403
VSENSE
3A
15EN16
6
C447
0.33uF 16V
7
COMP
BOOT14PWRGD
13
12
11
10
8
RT/CLK
+3.5V_ST
L413 CIC21J501NE
C430 10uF
10V
+3.3V_Normal
VIN_1
VIN_2
GND_1
GND_2
2.2K
C
Q400
B
MMBT3904(NXP)
E
C441
0.1uF 16V
L415
C488 3300pF
330K1/16W 5%
C448
3300pF
50V
3.6uH
C453 22uF 10V
PH_3
PH_2
PH_1
SS/TR
9
R432
R436 15K
C456 22uF 10V
FET_2.5V_DIODE
R1
R442 30K 1/16W 1%
R2
R441 75K 1/16W 1%
DMP2130L Q403-*1
S
G
D
C439
50V 100pF
+1.10V_VDDC
C444
0.1uF 16V
D404 5V OPT
Vout=0.827*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
Power_PD2
2012/09/19
4
Page 24
USB (SIDE)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
JK700
1234
USB DOWN STR EAM
3AU 04S-3 05-Z C-(LG )
5
C700 22uF 10V
D700 RCLAMP0502BA
OPT
+5V_USB
SIDE_USB1_DM
SIDE_USB1_DP
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
USB
12/06/20
7
Page 25
HDMI (REAR 1 / SIDE 1 MHL)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
HDMI_1
SHIELD
20
EAG59023302
JK801
CEC
HDMI_CEC
5V_HDMI_2
R823
R822
2.7K
2.7K
19
18
17
16
15
14
13
12
11
CK+
10
D0-
9
D0_GND
8
D0+
7
D1-
6
D1_GND
5
D1+
4
D2-
3
D2_GND
2
D2+
1
+5V_Normal
A2CA1 MMBD6100 D822
5V_HDMI_2
R826
1K
R803
1.8K
VA801
ESD_HDMI1_VARISTOR
R820 100
DDC_SDA_2
DDC_SCL_2
5V_DET_HDMI_2
VA802
R801
3.3K
D801
ESD_HDMI1_VARISTOR
ESD_HDMI
CEC_REMOTE_S7
5V_HDMI_4
R824
2.7K
+5V_Normal
A2CA1
MMBD6100 D824
R825
2.7K
MMBT3904(NXP)
Q801
R805 0
HDMI1_ARC
VA801-*1 1uF 10V
ESD_HDMI1_CAP
D801-*1 1uF 10V
ESD_HDMI1_CAP
+3.5V_ST
DDC_SDA_4
DDC_SCL_4
C
E
ESD_HDMI
A2CA1
MMBD6100 D825
R807
10K
B
VA803
R817
10K
VA804
ESD_HDMI
1 2 3 4 5
ESD_HDMI_SEMTECH
1 2 3 4 5
ESD_HDMI_SEMTECH
R832 100
R833 100
D826 RCLAMP0524PA
10 9 8 7 6
D827 RCLAMP0524PA
10 9 8 7 6
TMDS_CH1-
TMDS_CH1+
GND_1
TMDS_CH2-
TMDS_CH2+
TMDS_CH1-
TMDS_CH1+
GND_1
TMDS_CH2-
TMDS_CH2+
D826-*1
IP4283CZ10-TBA
1
2
3
4
5
ESD_HDMI_NXP
D828-*1
IP4283CZ10-TBA
1
2
3
4
5
ESD_HDMI_NXP
SIDE_HDMI (MHL)
5V_HDMI_4
GND
BODY_SHIELD
20
HP_DET
HPD2
DDC_SDA_2
DDC_SCL_2
HDMI_ARC HDMI_CEC
CK-_HDMI2 CK+_HDMI2
D0-_HDMI2 D0+_HDMI2
D1-_HDMI2 D1+_HDMI2
D2-_HDMI2 D2+_HDMI2
19
18
17
16
15
14
13
12
11
10
EAG62611204
9
8
7
6
5
4
3
2
1
5V
GND
DDC_DATA
DDC_CLK
NC
CE_REMOTE
CK-
CK_GND
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
R819
1.8K
VA805 ESD_HDMI
JK803
D827-*1
IP4283CZ10-TBA
TMDS_CH1-
NC_4
10
TMDS_CH1+
NC_3
9
GND_1
GND_2
8
TMDS_CH2-
NC_2
7
TMDS_CH2+
NC_1
6
10
9
8
7
6
NC_4
NC_3
GND_2
NC_2
NC_1
ESD_HDMI_NXP
IP4283CZ10-TBA
TMDS_CH1-
TMDS_CH1+
GND_1
TMDS_CH2-
TMDS_CH2+
ESD_HDMI_NXP
1
2
3
4
5
D829-*1
1
2
3
4
5
NC_4
10
NC_3
9
GND_2
8
NC_2
7
NC_1
6
NC_4
10
NC_3
9
GND_2
8
NC_2
7
NC_1
6
MHL OCP
AVDD5V_MHL
R809
10
5V_HDMI_4
C809
10uF
10V
D800
MBR230LSFT1G
30V
100K
OPT
R808
+3.3V_Normal
R806
/MHL_OCP_DET
R804 0
10K
OPT
D811
OUT_3
OUT_2
OUT_1
R818
OC
5V_DET_HDMI_4
VA806 ESD_HDMI
3.3K
D812
5.6V
IC802
BD82020FVJ
8
7
6
5
OPT
R810 0
R830 100
GND
1
IN_1
2
IN_2
3
EN
4
VA807
ESD_HDMI
1 2 3 4 5
ESD_HDMI_SEMTECH
1 2 3 4 5
ESD_HDMI_SEMTECH
C801
0.047uF 25V
+5V_Normal
R827
20K
D828 RCLAMP0524PA
10 9 8 7 6
D829 RCLAMP0524PA
10 9 8 7 6
+3.5V_ST
R811
OPT
B
C802
0.1uF
C
Q804
B
R813
10K
C
E
R834 100
R835 100
VA808 ESD_HDMI
10K
R812 10K
C
Q802
OPT
E
R802 0
R821 10K
E
B
Q805
B
OPT
+3.3V_Normal
R814
2.7K
C
E
E
C
B
Q806
Q803
OPT
R831 300K
R815
10K
R816
10K
HPD4
DDC_SDA_4
DDC_SCL_4
HDMI_CEC
CK-_HDMI4 CK+_HDMI4
D0-_HDMI4 D0+_HDMI4
D1-_HDMI4 D1+_HDMI4
D2-_HDMI4 D2+_HDMI4
MHL_CD_SENSE
/VBUS_EN
(Active Low)
MHL_OCP_EN
(Active High)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
2012/11/07
HDMI_R1_S1 8
Page 26
SPDIF
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
SPDIF OPTIC JACK
5.15 Mstar Circuit Application
SPDIF_OUT
+3.3V_Normal
ESD_SPDIF_0.1uF
C1001-*1 1uF 10V ESD_SPDIF_1uF
C1001
0.1uF 16V
SPDIF-JACK-FOXCONN
2F01TC1-CLM97-4F
GND
VCC
VIN
C1002 100pF 50V
JK1001
1
2
3
4
SHI ELD
SPDIF-JACK-SOLTEAM
JK1001-*1
JST1223-001
GND
Fiber Optic
1
VCC
2
Fib er Op tic
VINPUT
3
4
FIX_POLE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
SPDIF
2012/06/12
10
Page 27
GLOBAL tuner block except EU and China
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
RF_SWITCH_CTL
Pull-up can’t be applied because of MODEL_OPT_2
TU3700
TU3702 TDSH-G501D(B)
TUNER_ISOLATOR_DVB_1INPUT_H
1
2
3
4
5
6
7
8
9
10
11
B1
B1
B2
A1
A2
A2
B2
NC
RESET
SCL
SDA
+B1[3.3V]
SIF
+B2[1.8V]
CVBS
IF_AGC
DIF[P]
DIF[N]
A1
close to TUNER
R3705 0
C3701
0.1uF 16V
OPT
TDSS-G201D
B1
B1
TUNER_OPT
12
SHIELD
1
2
3
4
5
6
7
8
9
10
11
A1
NC_1
RESET
SCL
SDA
+B1[3.3V]
NC_2
0.1uF 16V
+B2[1.8V]
NC_3
IF_AGC
DIF[P]
DIF[N]
A1
TU_GND_A
C3702
OPT
close to TUNER
R3732 100
+3.3V_TU
R3733 100K
C3710
0.1uF 16V
HALF_NIM/IF_FILTER
R3760-*1 10
R3761 0
HALF_NIM/IF_NON_FILTER
R3760 0
HALF_NIM/IF_NON_FILTER
Close to the tuner
TUNER_RESET
HALF_NIM/IF_FILTER
R3761-*1 10
C3711 18pF 50V
C3713 18pF 50V
R3735 33
R3736 33
LNA_CTRL_1
LNA_CTRL_2
+3.3V_TU
R3740
1.8K
TU_IIC_ATSC_1.8K
OPT C3742 20pF 50V
OPT C3743 20pF 50V
R3741
1.8K TU_IIC_ATSC_1.8K
IF_P_MSTAR
IF_N_MSTAR
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils Signal to Signal Width = 12mils Ground Width >= 24mils
R3740-*1 1K TU_IIC_NON_ATSC_1K
R3741-*1 1K TU_IIC_NON_ATSC_1K
TU_SCL
TU_SDA
R3758 82
OPT
R3784 0
OPT
+3.3V_TU
TU_SIF
TU_CVBS
BR_RESET_DEMOD
FE_TS_SYNC
FE_TS_VAL_ERR
FE_TS_CLK
FE_TS_DATA[0]
FE_AGC_SPEED_CTL IF_AGC_SEL
FE_BOOSTER_CTL LNA2_CTL
DEMOD_SCL
DEMOD_SDA
GND seperation for ASIS tuner
TU_GND_A
R3714
R3715
NON_ASIA
0
0
NON_ASIA
TUNER MULTI-OPTION
TU3700-*1 TDSS-H501F(B)
TUNER_ATSC
NC_1
1
RESET
2
SCL
3
SDA
4
+B1[3.3V]
5
NC_2
6
+B2[1.8]
7
NC_3
8
IF_AGC
9
DIF[P]
10
DIF[N]
11
X
B1
A1
A1
12
SHIELD
TU_GND_A
TW_FE_LNA FILTER_SETTING
Frequence
54MHz~350MHz
350Hz~450MHz
450Hz~870MHz
CTRL_1 CTRL_2
1
0
0
0
0
1
Filter_Type
LPF
Through
HPF
+3.3V_TU
CHANGE TO
6.3V 2012 X5R
C3723 22uF
6.3V
Size change,0929
L3703
CIS21J121
C3725
0.1uF 16V
+3.3V_Normal
C3715 22uF
6.3V
CHANGE TO
6.3V 2012 X5R
C3737 100pF 50V
C3727
0.1uF 16V
C3738
0.1uF 16V
+1.8V_TU
C3716
0.1uF 16V
close to the tuner pin, add,09029
R3704 100
should be guarded by ground
+3.3V_TU
C3717
0.1uF 16V
C3707 100pF 50V
IF_AGC_MAIN
IC3703
AP1117E18G-13
3
IN1ADJ/GND
OUT 2
C3708
0.1uF 16V
+1.8V_TU
C3740
0.1uF 16V
R3766 1
C3741 10uF
10V
85C
C3741-*1
10uF 10V
CAP_X7R_MP
CAP_10uF_X5R CHANGE TO
10UF 10V X5R
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
TUNER_NON_EU
2012.06.21 14
Page 28
COMPONENT1 & AV(COMMON), AV2
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
COMP_AV1/2
JK1701
PPJ248-01
[RD3]E-LUG
7C
[RD3]C-SPRING
6C
D1700
5.6V AV2_LR_ZENER
R1700 470K AV2
C1701 1000pF 50V OPT
R1716 10K
AV2
R1718 12K AV2
AV2_R_IN
AV2
COMPONENT & AV1
COMP_AV1
JK1702
PPJ245-01
[RD2]E-LUG
7E
[RD2]C-SPRING
6E
[RD2]CONTACT
4E
[WH]C-SPRING
5D
[RD1]CONTACT
4C
[RD1]C-SPRING
6C
[RD1]E-LUG-S
8C
[RD3]CONTACT
4C
[WH2]C-SPRING
5B
[YL]CONTACT
4A
[YL]C-SPRING
6A
[YL]E-LUG
7A
[RD2]E-LUG
7H
[RD2]C-SPRING
6H
[RD2]CONTACT
4H
[WH1]C-SPRING
5G
[RD1]CONTACT
4F
[RD1]C-SPRING
6F
[RD1]E-LUG-S
8F
AV2_CVBS_ZENER_ROHM
COMP_Pr_ZENER_ROHM
D1707
D1701
5.6V AV2_LR_ZENER
D1702
5.6V OPT
D1713 AV2_CVBS_ZENER_ROHM
D1714
D1704
5.6V COMP_LR_ZENER
D1705
5.6V COMP_LR_ZENER
D1706
5.6V OPT
D1703 COMP_Pr_ZENER_ROHM
R1703
470K
R1704
470K
R1709 10K
R1701 470K AV2
+3.3V_Normal
R1705 75
+3.3V_Normal
R1708 10K AV2
R1702 75 AV2
R1712
1K
R1711 1K
AV2
C1704 1000pF 50V OPT
C1705 1000pF 50V OPT
R1714 10K
R1715 10K
COMP2_DET
C1702 1000pF 50V OPT
C1703 47pF 50V
AV2
R1717 10K
AV2
AV2_CVBS_DET
R1720 12K
R1721 12K
R1719 12K AV2
AV2_L_IN
AV2_CVBS_IN
COMP2_R_IN
COMP2_L_IN
COMP2_Pr+
D1714-*1
AV2_CVBS_ZENER_KEC
D1707-*1
COMP_Pr_ZENER_KEC
D1713-*1
AV2_CVBS_ZENER_KEC
D1703-*1 COMP_Pr_ZENER_KEC
[BL]C-SPRING
5B
[GN]CONTACT
4A
[GN]C-SPRING
6A
[GN]E-LUG
7A
[BL]C-SPRING
5E
[GN]CONTACT
4D
[GN]C-SPRING
6D
[GN]E-LUG
7D
D1710
COMP_Pb_ZENER_ROHM
D1712
COMP_Y_ZENER_ROHM
D1708 COMP_Pb_ZENER_ROHM
D1709
5.6V OPT
D1711
COMP_Y_ZENER_ROHM
R1706
75
R1707 75
+3.3V_Normal
R1710 10K
CVBS_TEST
R1723
75
+3.3V_Normal
R1713
1K
COMP2_Pb+
D1710-*1
COMP_Pb_ZENER_KEC
AV_CVBS_DET
R1722 0
CVBS_TEST
IC1700
MM1756DURE
VCC
6
PS
5
OUT
4
IN
1
GND
2
BIAS
3
COMP2_Y+/AV_CVBS_IN
CVBS_TEST
C1706
0.1uF
CVBS_TEST
4.7uF
C1708
C1707
0.1uF
CVBS_TEST
D1712-*1
COMP_Y_ZENER_KEC
DTV/MNT_VOUT
D1708-*1 COMP_Pb_ZENER_KEC
D1711-*1
COMP_Y_ZENER_KEC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
REAR_NON_EU_L
2012.08.14NC4_S7LRM 17
Page 29
ETHERNET
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
* H/W option : ETHERNET
JK2100-*1
RJ45VT-01SN002
JK2100
XRJV-01V-0-D12-080
+2.5V_Normal
ETHERNET
L2101
BLM18PG121SN1D
1
1
2
2
3
3
ETHERNET_XML_EMI
4
4
5
5
6
6
7
7
8
8
9
9
1
2
3
ETHERNET_XMULTIPLE
4
5
6
7
8
9
9
ETHERNET
C2104
0.01uF 50V
ETHERNET
ETHERNET
ETHERNET
ETHERNET
R2101
49.9
R2102
49.9
R2103
49.9
R2104
49.9
C2101
0.1uF
ETHERNET
C2102
0.1uF
ETHERNET
EPHY_TP
EPHY_TN
EPHY_RP
EPHY_RN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
LAN
2012/06/21
21
Page 30
AUDIO AMP(STA380BWEF)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
AUD_MASTER_CLK
C3401 1000pF 50V
AMP_MUTE
R3402 10K
R3401
10K
POWER_DET
+3.5V_ST
R3403
10K
B
C
Q3401 MMBT3904(NXP)
E
OPT
R3405
R3404
100
0
AUD_SCK
AUD_LRCK
AUD_LRCH
AMP_RESET
AMP_SDA
AMP_SCL
+3.3V_Normal
C3403
0.1uF 16V
C3404
2.2uF 10V
NC_13 NC_14
NC_15 VDDDIG1 GNDDIG1
FFX3A
FFX3B
EAPD/FFX4A
TWARNEXT/FFX4B
VREGFILT
AGNDPLL
MCLK
R3406 0
R3407 0
25 26 27 28 29 30 31 32 33 34 35 36
NC_12
24
IC3401
STA380BWF
39
40
38
37
SDI
PWDN
RESET
LRCKI
BICKI
41
42
INTLINE
43
SDA44SCL
49
45SA46
TESTMODE
NC_114NC_215NC_316NC_417NC_518NC_619NC_720NC_821NC_922NC_1023NC_11
13
12 GND_REG 11 VDD_REG 10 OUT1A
9 GND1 8 VCC1 7 OUT1B 6 OUT2A 5 VCC2 4 GND2 3 OUT2B
THERMA L
2 VSS_REG 1 VCC_REG
47
[EP]
GNDDIG248VDDDIG2
+3.3V_Normal
C3407
0.1uF 16V
C3409
0.1uF 16V
C3408
0.1uF 16V
C3411
0.1uF 50V
R3408
43
R3410
43
C3412 1uF 50V
R3409
C3413 330pF 50V
C3414 330pF 50V
R3411
43
43
C3415 1uF 50V
L3402
10uH
L3403
10uH
L3404
10uH
L3405
10uH
C3416
0.1uF 50V
C3417 10uF 35V
3216
C3418
0.22uF 50V
C3419
0.22uF 50V
SPK_L+
SPK_L-
SPK_R+
SPK_R-
C3420
0.22uF 50V
C3421
0.22uF 50V
C3422
0.22uF 50V
C3423
0.22uF 50V
L3401
CIS21J121
C3424 1000pF 50V
C3425 1000pF 50V
C3426 1000pF 50V
C3427 1000pF 50V
+24V
SPK_L+
SPK_L-
SPK_R+
SPK_R-
SPEAKER_L
SPEAKER_R
P3401
WAFER-ANGLE
4
3
2
1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
2012/08/29
AMP_STA380BWEF 34
Page 31
MSTART DEBUG_4PIN
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
MSTAR_DEBUG_4P
P3900
12505WS-04A00
5
JP_GND2
JP_GND3
1
2
3
4
RGB_DDC_SCL
RGB_DDC_SDA
JP_GND1
JP_GND4
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
2012/06/20
MSTAR DEBUG_4PIN 39
Page 32
RS-232C
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
PM_TXD
PM_RXD
R4001 100
R4000 100
+3.5V_ST
RS232C_DEBUG_4P
VCC
PM_RXD
GND
RM_TXD
P4000
12507WS-04L
1
2
3
4
5
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
RS232C_4P_OS
2012/06/20
40
Page 33
IR/LED and Control
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
+3.5V_ST
+3.5V_ST
CONTROL_NO_FILTER
R611 0
CONTROL_FILTER
L601
BLM18PG121SN1D
CONTROL_FILTER
L602
BLM18PG121SN1D
CONTROL_NO_FILTER
R612 0
CONTROL_FILTER
+3.5V_ST
C609
0.1uF 16V
L600
BLM18PG121SN1D
C602
0.1uF 16V
CONTROL_FILTER
C608
0.1uF 16V
C603 1000pF 50V
SENSOR_SCL
SENSOR_SDA
LED_R/BUZZ
+3.3V_Normal
DIGITAL_EYE
R608 1K
R610
1.8K
C604
100pF
50V
DIGITAL_EYE
R609 1K
R604 100
DIGITAL_EYE
R605 100
DIGITAL_EYE
D601
LED_R_Zener
OPT C605 18pF 50V
OPT C606 18pF 50V
IR_8PIN
P600
12507WR-08L
1
2
3
4
5
6
7
8
9
IR_10PIN
P601
12507WR-10L
1
2
3
4
5
6
7
8
9
10
11
R603
R602
R600
KEY1
KEY2
IR
100
R601 100
10K
10K
1%
1%
R607
3.3K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
IR/CONTROL
2012/07/18
6
Page 34
/F_RB
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
/PF_OE
/PF_CE0
/PF_CE1
PF_ALE /PF_WE /PF_WP
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
DIMMING
NAND FLASH MEMORY
OS
AR103
22
AR104
22 OS
NAND_FLASH_2G_HYNIX
EAN60708702
IC102-*1
H27U2G8F2CTR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PWM_DIM
EEPROM
M24256-BRMN6TP
E0
1
E1
2
E2
3
VSS
4
NVRAM_ST
IC104
A0’h
+3.3V_Normal
OS
R102
3.3K
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OPT C111
2.2uF
VCC
8
WC
7
SCL
6
SDA
5
C105
0.1uF
NC_29
NC_28
NC_27
NC_26
I/O7
I/O6
I/O5
I/O4
NC_25
NC_24
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
R156
R157
OPT R105 1K
OS R106 1K
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RY/BY
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
OPT
10K
100
+3.3V_Normal
C104 8pF OPT
OS
R107
1K
OPT
R108
1K
NAND_FLASH_1G_TOSHIBA
TC58NVG0S3ETA0BBBH
1
2
3
4
5
6
7
RE
8
CE
9
10
11
12
13
14
15
CLE
16
ALE
17
WE
18
WP
19
20
21
22
23
24
R111 22
R112 22
C106 8pF OPT
+3.3V_Normal
OS
R109
3.9K
OS
C101
0.1uF
EAN61508001
IC102-*2
PWM0
PWM2
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
I2C_SCL
I2C_SDA
IC102
H27U1G8F2CTR-BC
1
NAND_FLASH_1G_HYNIX
EAN35669103
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O8
44
I/O7
43
I/O6
42
I/O5
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O4
32
I/O3
31
I/O2
30
I/O1
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
I2C
NVRAM_RENESAS
IC104-*1
R1EX24256BSAS0A
A0
1
A1
2
A2
3
VSS
4
EAN62389501
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RY/BY
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
RE
8
CE
9
10
11
12
13
14
15
CLE
16
ALE
17
WE
18
WP
19
20
21
22
23
24
R140 1K
VCC
8
WP
7
SCL
6
SDA
5
+3.3V_Normal
NC_29
NC_28
NC_27
NC_26
I/O7
I/O6
I/O5
I/O4
NC_25
NC_24
CAP_10uF_X5R_OS
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
NAND_FLASH_2G_TOSHIBA
TC58NVG1S3ETA00
+3.3V_Normal
R141
1K
EAN60991001
IC102-*3
R144
R145
2.2K
2.2K
NON_OS_512k_ST
IC104-*2
M24512-RMN6TP
E0
1
E1
2
E2
3
VSS
4
C102 10uF
C103
0.1uF
EAN43349003
OS
OS 22
AR101
OS
AR102
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
85C
10V
CHANGE TO 10UF 10V X5R
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
22
NC_29
NC_28
NC_27
NC_26
I/O8
I/O7
I/O6
I/O5
NC_25
NC_24
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O4
I/O3
I/O2
I/O1
NC_19
NC_18
NC_17
NC_16
AMP_SDA AMP_SCL
I2C_SDA I2C_SCL
VCC
8
WC
7
SCL
6
SDA
5
PCM_A[0-7]
C102-*1
10uF 10V
CAP_10uF_X7R_OS
NAND_FLASH_1G_SS
EAN61857001
K9F1G08U0D-SCB0
NC_1
1
NC_2
2
NC_3
3
NC_4
4
NC_5
5
NC_6
6
R/B
7
RE
8
CE
9
NC_7
10
NC_8
11
VCC_1
12
VSS_1
13
NC_9
14
NC_10
15
CLE
16
ALE
17
WE
18
WP
19
NC_11
20
NC_12
21
NC_13
22
NC_14
23
NC_15
24
NON_OS_512k_ATMEL
IC104-*3
AT24C512C-SSHD-T
A0
1
A1
2
A2
3
GND
4
EAN43349004
IC102-*4
8
7
6
5
<CHIP Config(LED_R/BUZZ)> Boot from SPI CS1N(EXT_FLASH) 1’b0 Boot from SPI_CS0N(INT_FLASH) 1’b1
<CHIP Config> (I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
B51_no_EJ : 4’b0000 Boot from 8051 with SPI flash SB51_WOS : 4’b0001 Secure B51 without scramble SB51_WS : 4’b0010 Secure B51 with scramble MIPS_SPE_NO_EJ : 4’b0100 Boot from MIPS with SPI flash MIPS_SPI_EJ_1 : 4’b0101 Boot from MIPS with SPI flash MIPS_SPI_EJ_2 : 4’b0110 Boot from MIPS with SPI flash MIPS_WOS : 4’b1001 Secure MIPS without scramble MIPS_WS : 4’b1010 Scerur MIPS with SCRAMBLE
AUD_MASTER_CLK
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
R148
56
OPT
C112 100pF 50V
S7LR-M Multi Package
PM MODEL OPTION
VCC
WP
SCL
SDA
+3.3V_Normal
OS
OPT
R115 1K
R117 1K
R116 1K
R118 1K
LGE2121-MS (M1_L13_MS10)
C7
GPIO39
E6
GPIO40
F5
GPIO41
B6
GPIO42
E5
GPIO43
D5
GPIO44
B7
GPIO45
E7
GPIO48
F7
GPIO49
AB5
GPIO52
AB3
GPIO53
A9
GPIO54
F4
GPIO55
AB1
I2C_SCKM0/GPIO56
N6
I2C_SDAM0/GPIO57
AB2
GPIO76
AC2
GPIO77
OPT
R165 1K
R121 1K
IC101-*1
S/W_EU/AJ
OPT
R123 1K
NON_OS
R124 1K
S7LR-M_MS10
R174
10K
S/W_TW
R175
10K
OPT
R152 1K
R153 1K
LVACLKP LVACLKN LVBCLKP LVBCLKN
GPIO194 GPIO191 GPIO192 GPIO193
+3.5V_ST
R177 10K HD_LVDS_NON_EU
R176 10K HD_LVDS_EU
LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N
LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P LVB4N
LED_R/BUZZ
AUD_SCK
AUD_MASTER_CLK_0
PWM1
PWM0
AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23
V23 U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24
AE24 AD24 Y23 W24
T25 U23 T24 T23
PM_MODEL_OPT_0
PM_MODEL_OPT_1
for SYSTEM EEPROM (IC104)
RGB_DDC_SDA RGB_DDC_SCL
SCART1_MUTE
V-COM_SCL
SENSOR_SCL
PM_MODEL_OPT_0 HIGH : HD_NON_EU LOW : HD_EU HD_LVDS_pattern is different. Between EU and NON_EU
PM_MODEL_OPT_1 HIGH : S/W_NON_EU LOW : S/W_EU/AJ S/W is different. Between TW
I2C_SCL I2C_SDA
PCM_D[0-7]
PCM_A[0-14]
/PCM_REG
/PCM_OE
/PCM_WE /PCM_IORD /PCM_IOWR
/PCM_CE /PCM_IRQA
/PCM_CD /PCM_WAIT
PCM_RST
PCM_5V_CTL
/MHL_OCP_DET
MHL_OCP_EN
MODEL_OPT_6 MODEL_OPT_7
SENSOR_SCL SENSOR_SDASENSOR_SDA
USB1_OCD USB1_CTL
PM_TXD PM_RXD
LED_R/BUZZ
SCART1_MUTE
V-COM_SCL V-COM_SDAV-COM_SDA
PWM0 PWM1 PWM2
KEY1 KEY2
PCM_D[0] PCM_D[1] PCM_D[2] PCM_D[3] PCM_D[4]
PCM_D[5]
PCM_D[6] PCM_D[7]
PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7] PCM_A[8] PCM_A[9] PCM_A[10] PCM_A[11] PCM_A[12] PCM_A[13] PCM_A[14]
R136 22 R137 22
FRC_RESET
AA18 AB22 AE20 AA15 AE21 AB21
AB18 AA20 AA21
AB17
AB19 AB20 AA16 AA19 AC21 AA17
AB15 AA22 AD22 AD20
AD21 AC20
W21
Y15
W20 V20 W22
Y19
Y16
Y20
Y18 Y21 Y22
U21 V21 R20 T20 U22
D4
E4 N25 N24
B8
A8
P23 P24
D2
D1
P21 N23 P22 R21 P20
F6
H6
G5
G4
J5
J4
R23
R24 R25 T21 T22
S7LR-M_NON_MS10
IC101
MSD804KKX
PCMDATA[0]/GPIO129 PCMDATA[1]/GPIO130 PCMDATA[2]/GPIO131 PCMDATA[3]/GPIO123 PCMDATA[4]/GPIO122 PCMDATA[5]/GPIO121 PCMDATA[6]/GPIO120 PCMDATA[7]/GPIO119
PCMADR[0]/GPIO128 PCMADR[1]/GPIO127 PCMADR[2]/GPIO125 PCMADR[3]/GPIO124 PCMADR[4]/GPIO102 PCMADR[5]/GPIO104 PCMADR[6]/GPIO105 PCMADR[7]/GPIO106 PCMADR[8]/GPIO111 PCMADR[9]/GPIO113 PCMADR[10]/GPIO117 PCMADR[11]/GPIO115 PCMADR[12]/GPIO107 PCMADR[13]/GPIO110 PCMADR[14]/GPIO109
PCMREG_N/GPIO126
PCMOE_N/GPIO116 PCMWE_N/GPIO195 PCMIORD_N/GPIO114 PCMIOWR_N/GPIO112
PCMCE_N/GPIO118 PCMIRQA_N/GPIO108 PCMCD_N/GPIO133 PCMWAIT_N/GPIO103 PCM_RESET/GPIO132
PCM2_CE_N/GPIO134 PCM2_IRQA_N/GPIO135 PCM2_CD_N/GPIO138 PCM2_WAIT_N/GPIO136 PCM2_RESET/GPIO137
UART1_TX/GPIO46 UART1_RX/GPIO47 UART2_TX/GPIO68 UART2_RX/GPIO67 UART3_TX/GPIO50 UART3_RX/GPIO51
I2C_SCKM2/DDCR_CK/GPIO75 I2C_SDAM2/DDCR_DA/GPIO74
DDCA_DA/UART0_TX DDCA_CK/UART0_RX
PWM0/GPIO69 PWM1/GPIO70 PWM2/GPIO71 PWM3/GPIO72 PWM4/GPIO73 PWM_PM/GPIO197
SAR0/GPIO34 SAR1/GPIO35 SAR2/GPIO36 SAR3/GPIO37 SAR4/GPIO38
VSYNC_LIKE/GPIO146
SPI1_CK/GPIO199 SPI1_DI/GPIO200 SPI2_CK/GPIO201 SPI2_DI/GPIO202
5V_DET_HDMI_2 5V_DET_HDMI_4
AV_CVBS_DET
AV2_CVBS_DET
SC1/COMP1_DET
TUNER_RESET MODEL_OPT_0
5V_DET_HDMI_15V_DET_HDMI_1
MODEL_OPT_1
MODEL_OPT_2
BR_RESET_DEMOD
PM_UART_RX/GPIO_PM[5]/GPIO11
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
PM_SPI_CZ0/GPIO_PM[12]/GPIO0
AMP_RESET FRC_RESET
HP_DET
S2_RESET
LNA_CTRL_1 LNA_CTRL_2
SYM.D
NF_CE1Z/GPIO141
NF_WPZ/GPIO196 NF_CEZ/GPIO140 NF_CLE/GPIO139 NF_REZ/GPIO142 NF_WEZ/GPIO143 NF_ALE/GPIO144 NF_RBZ/GPIO145
GPIO_PM[0]/GPIO6
PM_UART_TX/GPIO_PM[1]/GPIO7
GPIO_PM[2]/GPIO8 GPIO_PM[3]/GPIO9
GPIO_PM[4]/GPIO10
GPIO_PM[7]/GPIO13 GPIO_PM[8]/GPIO14 GPIO_PM[9]/GPIO15
GPIO_PM[11]/GPIO17
PM_SPI_SCK/GPIO1
PM_SPI_SDI/GPIO2 PM_SPI_SDO/GPIO3
TS0CLK/GPIO90
TS0VALID/GPIO88
TS0SYNC/GPIO89
TS0DATA_[0]/GPIO80 TS0DATA_[1]/GPIO81 TS0DATA_[2]/GPIO82 TS0DATA_[3]/GPIO83 TS0DATA_[4]/GPIO84 TS0DATA_[5]/GPIO85 TS0DATA_[6]/GPIO86 TS0DATA_[7]/GPIO87
TS1CLK/GPIO101 TS1VALID/GPI99
TS1SYNC/GPIO100
TS1DATA_[0]/GPIO91 TS1DATA_[1]/GPIO92 TS1DATA_[2]/GPIO93 TS1DATA_[3]/GPIO94 TS1DATA_[4]/GPIO95 TS1DATA_[5]/GPIO96 TS1DATA_[6]/GPIO97 TS1DATA_[7]/GPIO98
AE18 AC17 AD18 AC18 AC19 AD17 AE17 AD19
H5 K6 K5 J6 K4 L6 C2 L5 M6 M5 C1 M4
A2
R147 33 D3 B2 B1
R151 33
for SERIAL FLASH
Y14 AA10 Y12
Y13 Y11 AA12 AB12 AA14 AB14 AA13 AB11
AC15 AD15 AC16
AD16 AE15 AE14 AC13 AC14 AD12 AD13 AD14
AB5 AB3
AB1
AB2 AC2
CI_TS_DATA[0] CI_TS_DATA[1] CI_TS_DATA[2] CI_TS_DATA[3] CI_TS_DATA[4] CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7]
S7LR-M_NON_MS10
IC101
MSD804KKX
SYM.A
C7
GPIO39
E6
GPIO40
F5
GPIO41
B6
GPIO42
E5
GPIO43
D5
GPIO44
B7
GPIO45
E7
GPIO48
F7
GPIO49 GPIO52 GPIO53
A9
GPIO54
F4
GPIO55 I2C_SCKM0/GPIO56
N6
I2C_SDAM0/GPIO57 GPIO76 GPIO77
R146 33
FE_TS_DATA[0] FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3] FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7]
LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N
LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P LVB4N
LVACLKP LVACLKN LVBCLKP LVBCLKN
GPIO194 GPIO191 GPIO192 GPIO193
/PF_WP
/PF_CE0
/PF_CE1 /PF_OE
/PF_WE
PF_ALE /F_RB
POWER_DET PM_TXD INV_CTL RL_ON POWER_ON/OFF_1 PM_RXD /SPI_CS /FLASH_WP SIDE_HP_MUTE PANEL_CTL PM_MODEL_OPT_0 AMP_MUTE
SPI_SCK
SPI_SDO
CI_TS_CLK CI_TS_VAL CI_TS_SYNC
CI_TS_DATA[0-7]
from CI SLOT
FE_TS_CLK FE_TS_VAL_ERR FE_TS_SYNC FE_TS_DATA[0-7]
Internal demod out
FE_TS_DATA[0]
AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23
V23 U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24
AE24 AD24 Y23 W24
T25 U23 T24 T23
+3.5V_ST
R180
4.7K
RXA0+ RXA0­RXA1+ RXA1­RXA2+ RXA2­RXA3+ RXA3­RXA4+ RXA4-
RXB0+ RXB0­RXB1+ RXB1­RXB2+ RXB2­RXB3+ RXB3­RXB4+ RXB4-
RXACK+ RXACK­RXBCK+ RXBCK-
MODEL_OPT_3 MODEL_OPT_4 MODEL_OPT_5 MODEL_OPT_8
SPI_SDI
FE_TS_DATA[0]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
2012/09/19
MAIN1_NON_EU 51
Page 35
RS-232C
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
RS232_PHONE
RS232_PHONE
RS232_PHONE
RS232_PHONE
C5302
0.1uF
C5303
0.1uF
C5304
0.1uF
C5305
0.1uF DOUT2
RIN2
C1+
C1-
C2+
C2-
V+
V-
RS232_PHONE
IC5301 MAX3232CDR
1
2
3
4
5
6
7
8
EAN41348201
HEAD_PHONE
R5309
RS232_PHONE
R5302
+3.5V_ST
OPT D5301 ADUC 20S 02 010L
RS232_PHONE
C5306
0.1uF
VCC
16
GND
15
DOUT1
14
RIN1
13
ROUT1
12
DIN1
11
DIN2
10
ROUT2
9
PM_RXD
PM_TXD
20V
HP_LOUT
HP_ROUT
HP_DET
RS232_PHONE
OPT D5302 ADUC 20S 02 010L 20V
HEAD_PHONE
C5307 10uF 16V
HEAD_PHONE
C5308 10uF 16V
+3.3V_Normal
R5306 10K
R5305 1K
HEAD_PHONE
100
R5301 100
HEAD_PHONE
OPT C5309 1000pF 50V
OPT C5310 1000pF 50V
HEAD_PHONE
R5307 1K
HEAD_PHONE
R5308
1K
0
RS232_PHONE
6M6
1M1
3M3_DETECT
4M4
5M5_GND KJA-PH-1-0177
JK5301
HEAD_PHONE
JK5301-*1
KJA-PH-0-0177
5GND
4L
3DETECT
1R
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
RS232C_PHONE
2012/06/21
53
Page 36
+1.5V_DDR +1.5V_DDR
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
+1.5V_DDR
DDR_1600_2G_SS
IC1201-*1
K4B2G1646E-BCK0
EAN61848802
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
R1201
R1202
1K 1%
0.1uF
1K 1%
C1201
A-MVREFDQ
1000pF
C1202
CLose to DDR3
DDR_1600_2G_NANYA
IC1201-*2
NT5CB128M16FP-DI
EAN61859702
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
N3
A0
VREFCA
P7
A1
P3
A2
N2
A3
VREFDQ
P8
A4
P2
A5
R8
A6
ZQ
R2
A7
T8
A8
R3
A9
VDD_1
L7
A10/AP
VDD_2
R7
A11
VDD_3
N7
A12/BC
VDD_4
T3
A13
VDD_5 VDD_6
M7
NC_6
VDD_7 VDD_8
M2
BA0
VDD_9
N8
BA1
M3
BA2
VDDQ_1
J7
CK
VDDQ_2
K7
CK
VDDQ_3
K9
CKE
VDDQ_4 VDDQ_5
L2
CS
VDDQ_6
K1
ODT
VDDQ_7
J3
RAS
VDDQ_8
K3
CAS
VDDQ_9
L3
WE
NC_1
T2
RESET
NC_2 NC_3 NC_4
F3
DQSL
NC_5
G3
DQSL
C7
DQSU
VSS_1
B7
DQSU
VSS_2 VSS_3
E7
DML
VSS_4
D3
DMU
VSS_5 VSS_6
E3
DQL0
VSS_7
F7
DQL1
VSS_8
F2
DQL2
VSS_9
F8
DQL3
VSS_10
H3
DQL4
VSS_11
H8
DQL5
VSS_12
G2
DQL6
H7
DQL7
VSSQ_1
D7
DQU0
VSSQ_2
C3
DQU1
VSSQ_3
C8
DQU2
VSSQ_4
C2
DQU3
VSSQ_5
A7
DQU4
VSSQ_6
A2
DQU5
VSSQ_7
B8
DQU6
VSSQ_8
A3
DQU7
VSSQ_9
M8
H1
L8
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
DDR_1600_1G_HYNIX
IC1201-*3
H5TQ1G63EFR-PBC
EAN61829003
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR_1600_1G_SS
IC1201-*4
K4B1G1646G-BCK0
EAN61836301
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
M7
M2 N8 M3
J7 K7 K9
L2 K1 J3 K3 L3
T2
F3 G3
C7 B7
E7 D3
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
M8
A0
VREFCA A1 A2
H1
A3
VREFDQ A4 A5
L8
A6
ZQ A7 A8
B2
A9
VDD_1
D9
A10/AP
VDD_2
G7
A11
VDD_3
K2
A12/BC
VDD_4
K8
A13
VDD_5
N1
VDD_6
N9
NC_5
VDD_7
R1
VDD_8
R9
BA0
VDD_9 BA1 BA2
A1
VDDQ_1
A8
CK
VDDQ_2
C1
CK
VDDQ_3
C9
CKE
VDDQ_4
D2
VDDQ_5
E9
CS
VDDQ_6
F1
ODT
VDDQ_7
H2
RAS
VDDQ_8
H9
CAS
VDDQ_9
WE
J1
NC_1
J9
RESET
NC_2
L1
NC_3
L9
NC_4
T7
DQSL
NC_6 DQSL
A9
DQSU
VSS_1
B3
DQSU
VSS_2
E1
VSS_3
G8
DML
VSS_4
J2
DMU
VSS_5
J8
VSS_6
M1
DQL0
VSS_7
M9
DQL1
VSS_8
P1
DQL2
VSS_9
P9
DQL3
VSS_10
T1
DQL4
VSS_11
T9
DQL5
VSS_12 DQL6 DQL7
B1
VSSQ_1
B9
DQU0
VSSQ_2
D1
DQU1
VSSQ_3
D8
DQU2
VSSQ_4
E2
DQU3
VSSQ_5
E8
DQU4
VSSQ_6
F9
DQU5
VSSQ_7
G1
DQU6
VSSQ_8
G9
DQU7
VSSQ_9
DDR_1600_1G_NANYA
IC1201-*5
NT5CB64M16DP-DH
EAN61859501
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
R1204
R1205
CLose to Saturn7M IC
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_7
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
1K 1%
0.1uF
1K 1%
C1203
C1204
1000pF
A-MVREFCA
+1.5V_DDR
A-MVREFCA
A-MVREFDQ
C120510uF10V C122710uF10V C1207 0.1uF C1208 0.1uF C1210 0.1uF C1211 0.1uF C1212 0.1uF C1213 0.1uF C1214 0.1uF C1215 0.1uF
A-MA14
DDR_1600_2G_HYNIX
IC1201
H5TQ2G63DFR-PBC
EAN61829203
M8
VREFCA
H1
VREFDQ
R1203
L8
240
1%
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
C1251
10uF10V
A10/AP
A12/BC
RESET
C1206
NC_5
DQSL DQSL
DQSU DQSU
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
1uF
1uF
1uF
1uF
C1217
C1218
0.1uF
0.1uF
C1239
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7 R7
A11
N7 T3
A13
M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
F3 G3
C7 B7
E7
DML
D3
DMU
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
C1219
A-MA0 A-MA1 A-MA2 A-MA3 A-MA4 A-MA5 A-MA6 A-MA7 A-MA8
A-MA10 A-MA10 A-MA11 A-MA12 A-MA13
A-MBA0 A-MBA1 A-MBA2
A-MCKE
A-MODT A-MRASB A-MCASB A-MWEB
A-MRESETB
A-MDQSL A-MDQSLB
A-MDQSU A-MDQSUB
A-MDML A-MDMU
A-MDQL0 A-MDQL1 A-MDQL2 A-MDQL3 A-MDQL4 A-MDQL5 A-MDQL6 A-MDQL7
A-MDQU0 A-MDQU1 A-MDQU2 A-MDQU3 A-MDQU4 A-MDQU5 A-MDQU6 A-MDQU7
C1238
R1235
56
R1236
56
R1231 10K
1uF
C1241
1%
C1209
0.01uF 50V
1%
+1.5V_DDR
A-MCK
A-MCKB
A-MA0 A-MA1 A-MA2 A-MA3 A-MA4 A-MA5 A-MA6 A-MA7 A-MA8 A-MA9A-MA9
A-MA11 A-MA12 A-MA13 A-MA14
A-MBA0 A-MBA1 A-MBA2
A-MCK A-MCKB A-MCKE
A-MODT
A-MRASB A-MCASB
A-MWEB
A-MRESETB
A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDML A-MDMU
A-MDQL0
A-MDQL1 A-MDQL2 A-MDQL3 A-MDQL4 A-MDQL5 A-MDQL6 A-MDQL7
A-MDQU0 A-MDQU1 A-MDQU2 A-MDQU3 A-MDQU4 A-MDQU5 A-MDQU6 A-MDQU7
MSD804KKX
S7LR-M_NON_MS10
A11
A_DDR3_A[0]
C14 B11 F12 C15 E12 A14 D11 B14 D12 C16 C13 A15 E11 B13
F13 B15 E13
C17 A17 B16
E14 B12 A12 C12
F11
B19 C18
B18 A18
E15 A21
D17 G15 B21 F15 B22 F14 A22 D15
G16 B20 F16 C21 E16 A20 D16 C20
A_DDR3_A[1] A_DDR3_A[2] A_DDR3_A[3] A_DDR3_A[4] A_DDR3_A[5] A_DDR3_A[6] A_DDR3_A[7] A_DDR3_A[8] A_DDR3_A[9] A_DDR3_A[10] A_DDR3_A[11] A_DDR3_A[12] A_DDR3_A[13] A_DDR3_A[14]
A_DDR3_BA[0] A_DDR3_BA[1] A_DDR3_BA[2]
A_DDR3_MCLK A_DDR3_MCLKZ A_DDR3_MCLKE
A_DDR3_ODT A_DDR3_RASZ A_DDR3_CASZ A_DDR3_WEZ
A_DDR3_RESET
A_DDR3_DQSL A_DDR3_DQSLB
A_DDR3_DQSU A_DDR3_DQSUB
A_DDR3_DQML A_DDR3_DQMU
A_DDR3_DQL[0] A_DDR3_DQL[1] A_DDR3_DQL[2] A_DDR3_DQL[3] A_DDR3_DQL[4] A_DDR3_DQL[5] A_DDR3_DQL[6] A_DDR3_DQL[7]
A_DDR3_DQU[0] A_DDR3_DQU[1] A_DDR3_DQU[2] A_DDR3_DQU[3] A_DDR3_DQU[4] A_DDR3_DQU[5] A_DDR3_DQU[6] A_DDR3_DQU[7]
SYMBOL.B
IC101
B_DDR3_A[0] B_DDR3_A[1] B_DDR3_A[2] B_DDR3_A[3] B_DDR3_A[4] B_DDR3_A[5] B_DDR3_A[6] B_DDR3_A[7] B_DDR3_A[8]
B_DDR3_A[9] B_DDR3_A[10] B_DDR3_A[11] B_DDR3_A[12] B_DDR3_A[13] B_DDR3_A[14]
B_DDR3_BA[0] B_DDR3_BA[1] B_DDR3_BA[2]
B_DDR3_MCLK B_DDR3_MCLKZ B_DDR3_MCLKE
B_DDR3_ODT B_DDR3_RASZ B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_RESET
B_DDR3_DQSL
B_DDR3_DQSLB
B_DDR3_DQSU
B_DDR3_DQSUB
B_DDR3_DQML B_DDR3_DQMU
B_DDR3_DQL[0] B_DDR3_DQL[1] B_DDR3_DQL[2] B_DDR3_DQL[3] B_DDR3_DQL[4] B_DDR3_DQL[5] B_DDR3_DQL[6] B_DDR3_DQL[7]
B_DDR3_DQU[0] B_DDR3_DQU[1] B_DDR3_DQU[2] B_DDR3_DQU[3] B_DDR3_DQU[4] B_DDR3_DQU[5] B_DDR3_DQU[6] B_DDR3_DQU[7]
B23 D25 F22 G22 E24 F21 E23 D22 D24 D21 C24 C25 F23 E21 D23
G20 F24 F20
G25 G23 F25
D20 B25 B24 A24
E20
K24 K25
J21 J20
H24 L20
L23 J24 L24 J23 M24 H23 M23 K23
G21 L22 H22 K20 H20 L21 H21 K21
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
M1_DDR (1DDR)
2012/06/21
54
Page 37
Serial Flash for SPI boot_NON_OS
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
/FLASH_WP
R5502 0
+3.5V_ST
OPT R5501 10K
MX25L6406EM2I-12G
CS
SO/SIO1
WP
GND
/SPI_CS
SPI_SDO
SFLASH_NON_OS_MX
IC1300-*1
1
2
3
4
8
7
6
5
VCC
HOLD
SCLK
SI/SIO0
+3.5V_ST
OPT
R5503
4.7K
SFLASH_NON_OS_WINBOND
IC1300
W25Q64FVSSIG
CS
1
DO[IO1]
2
WP[IO2]
3
GND
4
SFLASH_OS_WINBOND
IC1300-*2
W25Q80BVSSIG
CS
1
DO[IO1]
2
%WP[IO2]
3
GND
4
VCC
8
%HOLD[IO3]
7
CLK
6
DI[IO0]
5
VCC
8
HOLD[IO3]
7
CLK
6
DI[IO0]
5
+3.5V_ST
0.1uF
R5504 33
SFLASH_OS_MACRONIX
MX25L8006EM2I-12G
CS#
SO/SIO1
WP#
GND
C5501
SPI_SCK
SPI_SDI
IC1300-*3
1
2
3
4
8
7
6
5
VCC
HOLD#
SCLK
SI/SIO0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
S_FLASH_NON_OS
2012.06.21
55
Page 38
+1.26V_FRC
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
BLM18SG121TN1D
C6101
0.1uF
+1.26V_FRC
BLM18SG121TN1D
C6102
0.1uF
L6103
L6101
C6109 22uF 10V
FRC_VDDC10
C6112 22uF 10V
DVDD_DDR_1V
C6113
0.1uF
FRC_VDDC10
C6114 22uF 10V
Place Close to Bead
+3.3V_FRC
+3.3V_FRC
+3.3V_FRC
+3.3V_FRC
GPIO1 : HI => B8/94, LOW => B4/98 CHIP_CONF : {GPIO8, PWM1, PWM0} CHIP_CONF = 3’d5 : boot from interal SRAM CHIP_CONF = 3’d6 : boot from EEPROM CHIP_CONF = 3’d7 : boot from SPI Flash
FRC_VDD33
L6102
BLM18SG121TN1D
C6103
0.1uF
AFRC_VDD33
L6104
BLM18SG121TN1D
C6104
0.1uF
FRC_AVDD_PLL
L6105
BLM18SG121TN1D
C6105
0.1uF
FRC_AVDD_LVDS33
L6106
BLM18SG121TN1D
C6106
0.1uF
URSA5 CONFIGURATION
PWM0_CONFIG PWM1_CONFIG
GPIO[8]
GPIO[1]
URSA5 H/W OPTION
URSA_MODEL_OPT_0 URSA_MODEL_OPT_1 URSA_MODEL_OPT_2 URSA_MODEL_OPT_3
C6107
0.1uF
C6108 10uF
C6110
0.1uF
C6111 10uF
FRC_VDD33
AFRC_VDD33
FRC_AVDD_PLL
FRC_AVDD_LVDS33
+3.3V_FRC
R6103 10K
OPT
R6104 10K
+3.3V_FRC
OPT
OPT
C6115 10uF
6.3V
R6105 10K
R6106 10K
C6116 10uF
10K
R6107
10K
OPT
R6108
OPT
OPT
(VDDP)
C6117
0.1uF
R6111 10K
OPT
R6112 10K
10K
R6109
10K
R6110
OPT
C6119
0.1uF
C6118
0.1uF
OPT
R6113 10K
R6114 10K
Debugging for URSA5
P6101
12505WS-04A00
URSA5_DEBUG
1
2
URSA5_DEBUG
R6102 22
3
URSA5_DEBUG
R6101 22
4
5
SCL2_+3.3V_DB
SDA2_+3.3V_DB
C6120
0.22uF
6.3V
R6115 10K
R6116 10K
OPT
OPT
R6117 10K
R6118 10K
C6121
0.1uF
C6124
0.1uF
C6125
0.22uF
6.3V
C6122
0.1uF
C6123
0.1uF
MODEL OPTION
URSA_MODEL_OPT_1
URSA_MODEL_OPT_2
URSA_MODEL_OPT_3
SCL2_+3.3V_URSA
C6127
0.1uF
C6126
0.1uF
PIN NAME
URSA_SCL
SCL2_+3.3V_DB
C6128
0.1uF
PIN NO.
D10
D11
D12
D13
URSA5_MP
+1.5V_FRC_DDR+1.5V_FRC_DDR
C6129
0.1uF
HIGH
L/DIM_10BLOCKURSA_MODEL_OPT_0
LVDS_EXT_URSA5
RESERVED
R6119 0
R6120 0 OPT
C6130
0.22uF
6.3V
SW6101
JS2235S
1
2
URSA5_DEBUG
3
C6131
C6132
0.1uF
0.1uF
FRC_DDR3_RESETB
SCL2_+3.3V_URSA SDA2_+3.3V_URSA
LOW
L/DIM_16BLOCK
RESERVEDRESERVED
LVDS_S7M_PLUS
RESERVED
6
URSA5_MP
5
4
C6133
0.1uF
FRC_A[0-13]
FRC_BA0
FRC_BA1 FRC_BA2
FRC_MCK
FRC_MCKB
FRC_CKE
FRC_ODT FRC_RASB FRC_CASB
FRC_WEB
FRC_DQSL FRC_DQSU
FRC_DQSLB FRC_DQSUB
FRC_DQL[0-7]
FRC_DQU[0-7]
URSA_SDA
R6121 0
SDA2_+3.3V_URSA
R6122 0
OPT
SDA2_+3.3V_DB
5%
1/16W
C6134 1uF 10V
+3.3V_FRC
5%
2.2K R6123
FRC_A[0] FRC_A[1] FRC_A[2] FRC_A[3] FRC_A[4] FRC_A[5] FRC_A[6] FRC_A[7] FRC_A[8] FRC_A[9] FRC_A[10] FRC_A[11] FRC_A[12] FRC_A[13]
FRC_DML FRC_DMU
FRC_DQL[0] FRC_DQL[1] FRC_DQL[2] FRC_DQL[3] FRC_DQL[4] FRC_DQL[5] FRC_DQL[6] FRC_DQL[7]
FRC_DQU[0] FRC_DQU[1] FRC_DQU[2] FRC_DQU[3] FRC_DQU[4] FRC_DQU[5] FRC_DQU[6] FRC_DQU[7]
2.2K R6124
1/16W
R612533 R612633
P14
DDR3_A0/DDR2_NC
G15
DDR3_A1/DDR2_A8
N14
DDR3_A2/DDR2_NC
L15
DDR3_A3/DDR2_A10
H15
DDR3_A4/DDR2_A2
L14
DDR3_A5/DDR2_A3
G14
DDR3_A6/DDR2_A4
N12
DDR3_A7/DDR2_A5
G13
DDR3_A8/DDR2_A6
N13
DDR3_A9/DDR2_A9
H14
DDR3_A10/DDR2_RASZ
F15
DDR3_A11/DDR2_A11
H13
DDR3_A12/DDR2_A0
P13
DDR3_A13/DDR2_A12
M12
DDR3_BA0/DDR2_BA2
H12
DDR3_BA1/DDR2_CASZ
L13
DDR3_BA2/DDR2_A1
F16
DDR3_MCLK/DDR2_MCLK
F17
DDR3_MCLKZ/DDR2_MCLKZ
J13
DDR3_CKE/DDR2_ODT
K12
DDR3_ODT/DDR2_CKE
L12
DDR3_RASZDDR2_WEZ
K13
DDR3_CASZ/DDR2_BA1
K14
DDR3_WEZ/DDR2_BA0
M14
DDR3_RESET/DDR2_A7
N16
DDR3_DQSL/DDR2_DQSL
M17
DDR3_DQSU/DDR2_DQSU
M16
DDR3_DQSBL/DDR2_DQSBL
M15
DDR3_DQSBU/DDR2_DQSBU
J15
DDR3_DQML/DDR2_DQU5
R16
DDR3_DQMU/DDR2_DQU4
R17
DDR3_DQL0/DDR2_DQU3
H17
DDR3_DQL1/DDR2_DQL0
R15
DDR3_DQL2/DDR2_DQL6
J17
DDR3_DQL3/DDR2_DQL7
T17
DDR3_DQL4/DDR2_DQL3
H16
DDR3_DQL5/DDR2_DQL2
T15
DDR3_DQL6/DDR2_DQL1
G16
DDR3_DQL7/DDR2_DQL5
K15
DDR3_DQU0/DDR2_DQU7
N15
DDR3_DQU1/DDR2_DQML
K17
DDR3_DQU2/DDR2_DQU2
P17
DDR3_DQU3/DDR2_DQU6
L17
DDR3_DQU4/DDR2_NC
P16
DDR3_DQU5/DDR2_DQU1
K16
DDR3_DQU6/DDR2_DQU0
P15
DDR3_DQU7/DDR2_DQMU
F14
DDR3_NC/DDR2_A13
T16
DDR3_NC/DDR2_DQL4
D14
I2CM_SCL
D15
I2CM_SDA
P1
I2CS_SCL
P2
I2CS_SDA
AFRC_VDD33
+1.5V_FRC_DDR
F5
F10
G10
F11
F12
G11
G12
AVDD_1F4AVDD_2
AVDD_DDR_C_1
AVDD_DDR_C_2
AVDD_DDR_D_1
AVDD_DDR_D_2
AVDD_DDR_D_3
AVDD_DDR_D_4
VSS_1D6VSS_2D7VSS_3D8VSS_4D9VSS_5E6VSS_6E7VSS_7E8VSS_8E9VSS_9
E10
E16
DVDD_DDR_1V
FRC_AVDD_PLL
FRC_AVDD_LVDS33
D4
D5
E4
E5
M5
L4
L5
K10
L10
AVDD_PLL3.3V
AVDD_MPLL3.3V
AVDD_LPLL3.3V
AVDDL_MOD1.26V
AVDD_LVDS3.3V_1
AVDD_LVDS3.3V_2
AVDD_LVDS3.3V_3
AVDD_LVDS3.3V_4
VSS_10
VSS_11F3VSS_12F6VSS_13F7VSS_14F8VSS_15F9VSS_16G1VSS_17G2VSS_18G4VSS_19G5VSS_20G6VSS_21G7VSS_22G8VSS_23G9VSS_24
DVDD_DDR_1.26V
FRC_VDD33
FRC_VDDC10
C6135
0.1uF
K9
N5
M9
M10
VD33_1M4VD33_2N4VD33_3
DVDD_HF1.26V
G17
VDDC_1.26V_1
VDDC_1.26V_2
VSS_25H1VSS_26H2VSS_27H4VSS_28H5VSS_29H6VSS_30H7VSS_31H8VSS_32H9VSS_33
PLACE TERMINATION RESISTORS CLOSE TO URSA5
RXBCK+
RXBCK-
RXB1-
RXB1+
RXB0-
R1
RXB0+
R7
RXACLKPR6RXACLKN
N9
N10
N11
P10
VDDC_1.26V_3
VDDC_1.26V_4
VDDC_1.26V_5
R6127
100
R6128
100
R6129
100
R6130
100
R6131
100
R6132
100
P11
VDDC_1.26V_6
VDDC_1.26V_7
RXB4-
RXB4+
RXB2-
RXB2+
RXB3+
RXB3-
R3
RXB0PR4RXB0NR5RXB1PT4RXB1NU4RXB2PU3RXB2NT3RXB3PT2RXB3NU2RXB4PT1RXB4N
RXBCLKPR2RXBCLKN
RXA2-
IC6101
LGE7303C
VSS_34
VSS_35J4VSS_36J5VSS_37J6VSS_38J7VSS_39J8VSS_40J9VSS_41
H10
H11
J10
VSS_42
VSS_43
J11
J12
J14
FRC_RESET
VSS_44
VSS_45
VSS_46K4VSS_47K5VSS_48K6VSS_49K7VSS_50K8VSS_51
J16
VSS_52L6VSS_53L7VSS_54L8VSS_55
K11
+3.3V_FRC
RXACK+
RXACK-
M11
RXA0-
RXA1+
RXA1-
VSS_61
VSS_62N6VSS_63N7VSS_64N8VSS_65
M13
RXA0+
R6134
100
R6135
100
R6136
100
R6137
100
R6138
100
R6139
100
N17
R6140 33
RXA4-
RXA4+
RXA3-
RXA3+
RXA2+
RXA0PR8RXA0NR9RXA1PT8RXA1NU8RXA2PU7RXA2NT7RXA3PT6RXA3NU6RXA4PU5RXA4NT5XTALOJ1XTALI
VSS_56
VSS_57M6VSS_58M7VSS_59M8VSS_60
L11
L16
R6133 10K
10pF
C6136
X-TAL_2
GND_2
J2
R13
P9
T13
U15
R14
GPIO1
GPIO3/(LTD_DA1)
GPIO2/(S_PIF_CLK)
GPIO0/(UART_RX/S_PIF_DA0)
VSS_66P3VSS_67P4VSS_68P5VSS_69P6VSS_70P7VSS_71
VSS_72
P12
U16
C6137 10pF
2
3
GND_1
4
1
X-TAL_1
24MHz X6101
1M
R6141
K2
K1
T14
P8
U14
U13
R12
E11
N2
M1
GPIO8
VSYNC_LIKE
GPIO4/(LTD_DE)
GPIO7(3D_FLAG)
GPIO5/(LTD_CLK)
GPIO6/(LTD_DA0)
NCL9HW_RESETJ3TESTPIN_1D1TESTPIN_2D2TESTPIN_3D3TESTPIN_4E1TESTPIN_5E2TESTPIN_6E3TESTPIN_7F1TESTPIN_8F2M0_SCLK
M_S_PIF_CLK
GPIO10/(S_PIF_FC)
GPIO11/(S_PIF_CS)
GPIO9/(UART_TX/S_PIF_DA1)
GPIO[1]
N3
M3
M_S_PIF_CS
M_S_PIF_FC
M_S_PIF_DA0N1M_S_PIF_DA1
C17
[SPI FLASH(2Mbit)]
SPI_CS
SPI_DO
0
GPIO[8]
OPT
R61 42
L1
M2
L2
K3
R10
S_M_PIF_CS
S_M_PIF_FCL3SOFT_RST_L
S_M_PIF_CLK
S_M_PIF_DA0
S_M_PIF_DA1
TXA1P/OPT_N/LK3/BLUE[9]
TXA2N/OPT_P/LK2/GREEN[0]
TXACLKP/RLV0N/GREEN[3] TXACLKN/RLV0P/GREEN[2]
TXB2P/RLV4P/RED[3]/EPI_A3P
TXB2N/RLV4N/RED[2]/EPI_A3N TXBCLKP/RLV5N/RED[5]/EPI_A2P TXBCLKN/RLV5P/RED[4]/EPI_A2N
TXB3P/RLV6N/RED[7]/EPI_A1P
TXB3N/RLV6P/RED[6]/EPI_A1N/
TXB4P/RLV7N/RED[9]/EPI_A0P
TXB4N/RLV7P/RED[8]/EPI_A0N
TXDCLKP/LLV5N/BLUE[1]/EPI_B2P TXDCLKN/LLV5P/BLUE[0]/EPI_B2N
TXD3N/LLV6P/BLUE[2]/EPI_B1N TXD4P/LLV7N/BLUE[5]/EPI_B0P TXD4N/LLV7P/BLUE[4]/EPI_B0N
MOD_GPIO0/VDD_ODD/HSYNC
MOD_GPIO1/VDD_EVEN/VSYNC MOD_GPIO2/PWM13/GCLK4/LCK MOD_GPIO3/PWM14/GCLK2/LDE
M0_MOSI
M1_SCLK
M1_MOSI
M2_SCLK
M2_MOSI
M3_SCLK
M3_MOSI
D16
D17
E15
E14
E13
E12
F13
TP6101
TP6104
TP6102
TP6105
TP6103
TP6106
R6146
4.7K
R6147
33
T11
R11
U11
OP_SYNC_L
OP_SYNC_R
SOFT_RST_R
TXA0P/GCLK6/BLUE[7] TXA0N/GCLK5/BLUE[6]
TXA1N/FLK/BLUE[8]
TXA2P/GREEN[1]
TXA3P/RLV1N/GREEN[5] TXA3N/RLV1P/GREEN[4] TXA4P/RLV2N/GREEN[7] TXA4N/RLV2P/GREEN[6]
TXB0P/RLV3N/GREEN[9] TXB0N/RLV3P/GREEN[8] TXB1P/RLVCLKN/RED[1] TXB1N/RLVCLKP/RED[0]
TXC0P/SOE TXC0N/POL
TXC1P/GSP_R
TXC1N/GSP/VST TXC2P/GOE/GCLK1 TXC2N/GSC/GCLK3
TXCCLKP/LLV0N
TXCCLKN/LLV0P
TXC3P/LLV1N TXC3N/LLV1P TXC4P/LLV2N TXC4N/LLV2P
TXD0P/LLV3N
TXD0N/LLV3P TXD1P/LLVCLKN TXD1N/LLVCLKP
TXD2P/LLV4N/EPI_B3P TXD2N/LLV4P/EPI_B3N
TXD3P/LLV6N/BLUE[3]
PWM0/SCAN_BLK1 PWM1/SCAN_BLK2
LPLL_FBCLK
LPLL_OUTCLK
LPLL_REFIN
SPI_CKT9SPI_CZ
SPI_DIU9SPI_DO
U10
T10
R6143 33
R6145 33
R6144 33
SPI_DI
SPI_DO
SPI_CS
SPI_SCLK
R6148
W25X20BVSNIG
10K
CS
DO
WP
GND
URSA5_FLASH_WINBOND_2M
C8 C9 B8 A8 A7 B7 C6 C7 B6 A6 A5 B5
C4 C5 B4 A4 A3 B3 C2 C3 B2 A2 C1 B1
C16 B17 B16 A16 A15 B15 C14 C15 B14 A14 A13 B13
C12 C13 B12 A12 A11 B11 C10 C11 B10 A10 A9 B9
D10 D11 D12 D13
U12
R6149
T12
R6150
G3 E17 H3
1
2
3
4
IC6102
VCC
8
HOLD
7
CLK
6
DIO
5
TXA0P TXA0N TXA1P TXA1N TXA2P TXA2N TXACLKP TXACLKN TXA3P TXA3N TXA4P TXA4N
TXB0P TXB0N TXB1P TXB1N TXB2P TXB2N TXBCLKP TXBCLKN TXB3P TXB3N TXB4P TXB4N
TXC0P TXC0N TXC1P TXC1N TXC2P TXC2N TXCCLKP TXCCLKN TXC3P TXC3N TXC4P TXC4N
TXD0P TXD0N TXD1P TXD1N TXD2P TXD2N TXDCLKP TXDCLKN TXD3P TXD3N TXD4P TXD4N
URSA_MODEL_OPT_0 URSA_MODEL_OPT_1 URSA_MODEL_OPT_2 URSA_MODEL_OPT_3
33
PWM0_CONFIG
33
PWM1_CONFIG
+3.3V_FRC
R6151
3.3K
SPI_SCLK
SPI_DI
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
URSA5
2012. 10. 10NC4_S7LRM 61
Page 39
Close to DDR Pin
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
+1.5V_FRC_DDR
R6201
1K 1%
R6202
1K
C6201
1%
0.1uF
+1.5V_FRC_DDR
MVREFCA
+1.5V_FRC_DDR
C6203
0.1uF 16V
C6204 22uF 10V
Place Close to DDR Pin
C6205
0.1uF
+1.5V_FRC_DDR
0.1uF
C6206
DDR3 1.5V De-Cap Place near Memory
C6207
0.1uF
C6208
0.1uF
C6209
0.1uF
C6210
0.1uF
C6211
0.1uF
C6212
0.1uF
C6213
0.1uF
C6214
0.1uF
R6203
1K 1%
R6204
1K 1%
C6202
0.1uF
MVREFDQ
MVREFCA
MVREFDQ
+1.5V_FRC_DDR
R6205
240
1%
VREFCA
VREFDQ
ZQ
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
NC_1 NC_2 NC_3 NC_4 NC_6
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
IC6201
H5TQ1G63EFR-PBC
M8
H1
L8
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
J1 J9 L1 L9 T7
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
A10/AP
A11
A12/BC
NC_7
NC_5
BA0 BA1 BA2
CKE
ODT RAS CAS
RESET
DQSL DQSL
DQSU DQSU
DML DMU
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
FRC_A[0-13]
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7 R7 N7 T3
M7
M2 N8 M3
J7
CK
K7
CK
K9
L2
CS
K1 J3 K3 L3
WE
T2
F3 G3
C7 B7
E7 D3
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
FRC_A[0]
FRC_A[1]
FRC_A[2]
FRC_A[3]
FRC_A[4]
FRC_A[5] FRC_A[6] FRC_A[7] FRC_A[8] FRC_A[9]
FRC_A[10] FRC_A[11] FRC_A[12] FRC_A[13]
FRC_BA0 FRC_BA1 FRC_BA2
FRC_ODT FRC_RASB FRC_CASB FRC_WEB
FRC_DQSL FRC_DQSLB
FRC_DQSU FRC_DQSUB
FRC_DML FRC_DMU
FRC_DQL[0]
FRC_DQL[1] FRC_DQL[2] FRC_DQL[3] FRC_DQL[4]
FRC_DQL[5]
FRC_DQL[6]
FRC_DQL[7]
FRC_DQU[0]
FRC_DQU[1] FRC_DQU[2] FRC_DQU[3] FRC_DQU[4] FRC_DQU[5] FRC_DQU[6]
FRC_DQU[7]
FRC_MCK
OPT
150
R6206
FRC_DDR3_RESETB
FRC_MCKB FRC_CKE
R6207
510
+1.5V_FRC_DDR
FRC_DQL[0-7]
Place Close to DDR Pin
R6208
C6215
0.01uF 50V
56
R6209 56
FRC_MCK
FRC_MCKB
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
FRC_DQU[0-7]
NC4_S7LRM 2012. 10.10
URSA5_DDR3 62
Page 40
CORE +1.26V_FRC
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
+12V
L6302
BLM18PG121SN1D
C6302 10uF 16V
Switching freq: 700K
POWER_ON/OFF_1
R1
R6301
R6303
6.8K
1K
1%
1%
C6304
100pF
50V
OPT
R6305
10K
R2
12K
1%
+3.3V_FRC
10K R6309
R6310 330K OPT
C6306 1uF
R6308
10V
C6308 1uF 10V
TYPICAL 980mA
IC6302
VREG5
C6310 3300pF 50V
EN
VFB
SS
TPS54327DDAR
1
2
THERMAL
3
4
3A
[EP]GND
VIN
8
VBST
9
7
SW
6
GND
5
Vout=0.765*(1+R1/R2)
C6312
0.1uF 16V
+1.26V_FRC
L6304
3.6uH
LPB8040T-3R6N
C6314 22uF 10V
C6316 22uF 10V
OPT
D6301
5V
+3.3V_FRC
C6317 10uF 10V
C6318
0.1uF 16V
+1.5V_FRC
AP7173-SPG-13 HF(DIODES)
IN
PG
R6312 10K
C6319
1uF
10V
VCC
EN
IC6303
1
2
THERMAL
3
4
EAN41406705
[EP]
8
9
7
6
5
Vout=0.6*(1+R1/R2)
+1.5V of DDR&URSA5 uses same power line
TYPICAL 350mA
OUT
FB
SS
GND
C6320 560pF 50V
R1
R6313
4.3K 1%
R6314
3.9K 1%
R2
R6315 1K 1%
C6321 10uF 16V
+1.5V_FRC_DDR
C6322 10uF 16V
OPT
D6303
5V
+12V
L6301
BLM18PG121SN1D
C6301 10uF 16V
Switching freq: 700K
+3.3V_FRC
R1
R6304
R6302
220
33K
C6303
1%
27pF 50V
R2
1%
R6307
10K 1%
+12V
5%
1/16W
C6305 1uF 10V
10K
R6311
C6307 1uF 25V
TYPICAL 300mA
IC6301
VREG5
C6309 3300pF 50V
EN
VFB
SS
TPS54327DDAR
1
2
THERMAL
3
4
3A
[EP]GND
VIN
8
VBST
9
7
SW
6
GND
5
Vout=0.765*(1+R1/R2)
C6311
0.1uF 16V
L6303
3.6uH
LPB8040T-3R6N
+3.3V_FRC
C6313 22uF 10V
OPT
C6315 22uF 10V
OPT
D6302
5V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM 2012. 10. 10
URSA5_POWER
63
Page 41
LVDS (URSA)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
[51Pin LVDS Connector] (For FHD 60Hz)
FHD
P6401
FI-RE51S-HF-J-R1500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
TXA0N
TXA0P
TXA1N
TXA1P
TXA2N
TXA2P
TXACLKN
TXACLKP
TXA3N
TXA3P
TXA4N
TXA4P
TXB0N
TXB0P
TXB1N
TXB1P
TXB2N
TXB2P
TXBCLKN
TXBCLKP
TXB3N
TXB3P
TXB4N
TXB4P
LVDS_SEL
+3.3V_Normal
OPT R6401
3.3K
OPT R6402
10K
+3.3V_Normal
10Bit R6403
3.3K
OPT R6404
3.3K
PANEL_VCC
FHD L6401 120
CIS21J121
FHD
C6401
0.1uF 16V
FOR FHD REVERSE(10bit) Change in S7LR
MIRROR
RXA4+
RXA4-
RXA3+
RXA3-
RXACK+
RXACK-
RXA2+
RXA2-
RXA1+
RXA1-
RXA0+
RXA0-
RXB4+
RXB4-
RXB3+
RXB3-
RXBCK+
RXBCK-
RXB2+
RXB2-
RXB1+
RXB1-
RXB0+
RXB0-
Pol-change
RXA0+
RXA0-
RXA1+
RXA1-
RXA2+
RXA2-
RXACK+
RXACK-
RXA3+
RXA3-
RXA4+
RXA4-
RXB0+
RXB0-
RXB1+
RXB1-
RXB2+
RXB2-
RXBCK+
RXBCK-
RXB3+
RXB3-
RXB4+
RXB4-
FOR FHD REVERSE(8bit) Change in S7LR
RXA4+
RXA4-
RXA3+
RXA3-
RXACK+
RXACK-
RXA2+
RXA2-
RXA1+
RXA1-
RXA0+
RXA0-
RXB4+
RXB4-
RXB3+
RXB3-
RXBCK+
RXBCK-
RXB2+
RXB2-
RXB1+
RXB1-
RXB0+
RXB0-
MIRROR
Pol-change
RXA4+
RXA4-
RXA0+
RXA0-
RXA1+
RXA1-
RXA2+ RXA2-
RXA2-
RXACK+
RXACK-
RXA3+
RXA3-
RXB4+
RXB4-
RXB0+
RXB0-
RXB1+
RXB1-
RXB2+
RXB2-
RXBCK+
RXBCK-
RXB3+
RXB3-
RXA0-
RXA0+
RXA1-
RXA1+
RXA2-
RXA2+
RXACK-
RXACK+
RXA3-
RXA3+
RXA4-
RXA4+
RXB0-
RXB0+
RXB1-
RXB1+
RXB2-
RXB2+
RXBCK-
RXBCK+
RXB3-
RXB3+
RXB4-
RXB4+
Shift
RXA4- RXA0-
RXA4+
RXA0-
RXA0+
RXA1-
RXA1+
RXA2+
RXACK-
RXACK+
RXA3-
RXA3+
RXB4-
RXB4+
RXB0-
RXB0+
RXB1-
RXB1+
RXB2-
RXB2+
RXBCK-
RXBCK+
RXB3-
RXB3+
RXA0+
RXA1-
RXA1+
RXA2-
RXA2+
RXACK-
RXACK+
RXA3-
RXA3+
RXA4-
RXA4+
RXB0-
RXB0+
RXB1-
RXB1+
RXB2-
RXB2+
RXBCK-
RXBCK+
RXB3-
RXB3+
RXB4-
RXB4+
[41Pin LVDS Connector] (For URSA5_M120)
P6402
FI-RE41S-HF-J-R1500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
TXC0N
TXC0P
TXC1N
TXC1P
TXC2N
TXC2P
TXCCLKN
TXCCLKP
TXC3N
TXC3P
TXC4N
TXC4P
TXD0N
TXD0P
TXD1N
TXD1P
TXD2N
TXD2P
TXDCLKN
TXDCLKP
TXD3N
TXD3P
TXD4N
TXD4P
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
URSA_LVDS
2012 .10 .10
64
Page 42
MODEL OPTION
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. Only for training and service purposes
LGE Internal Use Only
IF_AGC_SEL
LNA2_CTL
RF_SWITCH_CTL
CK+_HDMI1 CK-_HDMI1 D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1 D2-_HDMI1 DDC_SDA_1 DDC_SCL_1
HPD1
R201 100
BOOSTER_OPT
R202
RF_SW_OPT
R203 R204 100 R225 100 R228 100 R230 100 R229 100 R213 100
HDMI FOR LN52
PM_MODEL_OPT_1
HDMI
CEC_REMOTE_S7
SC1_ID SC1_FB
SC1_R+/COMP1_Pr+
SC1_G+/COMP1_Y+
SC1_B+/COMP1_Pb+
SC1_SOG_IN
SC1_CVBS_IN SC1/COMP1_L_IN SC1/COMP1_R_IN
DEMOD_SCL DEMOD_SDA
COMP2
COMP2_Y+/AV_CVBS_IN
CVBS In/OUT
COMP2_Y+/AV_CVBS_IN
AV2_CVBS_IN
DTV/MNT_VOUT
+2.5V_Normal
OPT
OPT OPT OPT OPT OPT OPT
CK+_HDMI1 CK-_HDMI1 D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1 D2-_HDMI1 DDC_SDA_1 DDC_SCL_1
HPD1
CK+_HDMI4 CK-_HDMI4 D0+_HDMI4 D0-_HDMI4 D1+_HDMI4 D1-_HDMI4 D2+_HDMI4 D2-_HDMI4 DDC_SDA_4 DDC_SCL_4 HPD4
CK+_HDMI2 CK-_HDMI2 D0+_HDMI2 D0-_HDMI2 D1+_HDMI2 D1-_HDMI2 D2+_HDMI2 D2-_HDMI2 DDC_SDA_2 DDC_SCL_2 HPD2
COMP2_Pr+
COMP2_Pb+
TU_CVBS
100
0
+3.3V_Normal
1K
1K
OPT
R290
R298
1K
1K
OPT
R293
R297
+2.5V_Normal
MIU1-128M
DUALSTREAM
R222 1K
R291 1K
MIU1-NO_DDR
R294 1K
R224 1K
NON_DUALSTREAM
C203
1000pF
OPT
DVB_S
MIU0-256M
R221 1K
NON_DVB_S
MIU0-128M
R223 1K
50V
Close to MSTAR
+3.3V_Normal
M120
R206 1K
R208 1K
NON_M120
R207 1K
R209 1K
R214 2.2 R215 2.2
R237 33 R238 68 R239 R240 R241 33 R242 68
R244 33
R246 33 R249 33
AV2
R252 68
S/W_AJ
DVB_T2
R211 1K
S/W_NON_AJ
NON_DVB_T2
R212 1K
33 68
HD
R226 1K
FHD
R227 1K
C218 0.047uF C219 0.047uF C220 0.047uF C221 0.047uF C222 0.047uF C223 0.047uF C224 1000pF
C225 0.047uF
C227 0.047uF C230 0.047uF
AV2
C233 0.047uF
MODEL_OPT_0 MODEL_OPT_1 MODEL_OPT_2 MODEL_OPT_3 MODEL_OPT_4 MODEL_OPT_5 MODEL_OPT_6 MODEL_OPT_7 MODEL_OPT_8
J2
RXACKP
J3
RXACKN
K3
RXA0P
J1
RXA0N
K2
RXA1P
K1
RXA1N
L2
RXA2P
L3
RXA2N
T5
DDCDA_DA/GPIO27
T4
DDCDA_CK/GPIO26
V5
HOTPLUGA/GPIO22
R5
HOTPLUGD/GPIO25
AE9
RXCCKP
AC9
RXCCKN
AC10
RXC0P
AD9
RXC0N
AC11
RXC1P
AD10
RXC1N
AE11
RXC2P
AD11
RXC2N
AE8
DDCDC_DA/GPIO31
AD8
DDCDC_CK/GPIO30
AC8
HOTPLUGC/GPIO24
F2
RXBCKP
F3
RXBCKN
G3
RXB0P
F1
RXB0N
G2
RXB1P
G1
RXB1N
H2
RXB2P
H3
RXB2N
R6
DDCDB_DA/GPIO29
U6
DDCDB_CK/GPIO28
P5
HOTPLUGB/GPIO23
R4
CEC/GPIO5
P2
HSYNC0
R3
VSYNC0
N2
RIN0P
P3
RIN0M
N3
GIN0P
N1
GIN0M
M3
BIN0P
M2
BIN0M
M1
SOGIN0
V2
HSYNC1
V3
VSYNC1
U3
RIN1P
U2
RIN1M
T1
GIN1P
T2
GIN1M
R2
BIN1P
R1
BIN1M
T3
SOGIN1
AA2
HSYNC2
Y2
RIN2P
AA3
RIN2M
W2
GIN2P
Y3
GIN2M
V1
BIN2P
W3
BIN2M
W1
SOGIN2
AA8
CVBS0
Y4
CVBS1
W4
CVBS2
AA5
CVBS3
Y5
NC_5
AA4
NC_7
Y6
NC_6
AA1
CVBSOUT1
AB4
VCOM
MODEL OPTION
PIN NAME MODEL_OPT_0 MODEL_OPT_1
MODEL_OPT_2 MODEL_OPT_3 MODEL_OPT_4 MODEL_OPT_5
MODEL_OPT_6
MODEL_OPT_7
PIN NO.
AB3
F4 AB2 T25
U23 T24
B8
A8
LOW
FHD
S/W_NON_AJ
NON_DVB_T2 NON_M120
MIU0-128M
NON_DVB_S MIU1-NO_DDR
NON_DUALSTREAM
* Dual Stream is only Korea 3D spec
MODEL_OPT_6
MODEL_OPT_4
S7LR-M_NON_MS10
IC101
MSD804KKX
SYM.C
I2C_SCKM1/GPIO78
I2C_SDAM1/GPIO79
SPDIF_IN/GPIO150
SPDIF_OUT/GPIO151
I2S_IN_BCK/GPIO148
I2S_IN_SD/GPIO149 I2S_IN_WS/GPIO147
I2S_OUT_BCK/GPIO154 I2S_OUT_MCK/GPIO152
I2S_OUT_SD/GPIO155
I2S_OUT_WS/GPIO153
GPIO_PM[13]/GPIO19
AVDD5V_MHL
GPIO_PM[14]/GPIO20
GPIO_PM[15]/GPIO21
EARPHONE_OUTL EARPHONE_OUTR
LED1/GPIO59
LED0/GPIO58
IRIN/GPIO4
NC_8 NC_9
SIFP SIFM
IF_AGC RF_AGC
XOUT
USB0_DM USB0_DP
USB1_DM USB1_DP
AUL0 AUR0 AUL1 AUR1 AUL2 AUR2 AUL3 AUR3 AUL4 AUR4
AUOUTL2
AUOUTR2
AUVRM
AUVAG AUVRP
RP/GPIO63 TP/GPIO60
RN/GPIO66
TN/GPIO62
GPIO61 GPIO64 GPIO65
ARC0
HWRESET
AC4 AD3
AC3
IP
AE3
IM
AD4 AC5
AD2 AE2
AE6 AD6
AD1
XIN
AC1
D7 D6
E3 E2
AC12 AE12
C8 D8 D9
B10 C9 B9
C10
AB9 AA11 Y9 AA9 AA7 AB8 Y8 Y10 AC7 AD7
W6 V6 V4 Y7 W5 U5
AD5
AE5 AC6
AA6 AB6
C6 C5
A6 C4
B5 C3 A3 B3 B4
N4 T6 N5
R296
SPDIF_OPTIC
C238 C239 2.2uF C242 2.2uF C243 2.2uF
CHANGE TO X5R
L203 HEAD_PHONE5.6uH L205 HEAD_PHONE5.6uH
R210 0
HDMI1_ARC
HIGH
HD
S/W_AJ
DVB_T2
M120 MIU0-256M
DVB_S MIU1-128M
DUALSTREAM
Close to MSTAR
R288 100
HALF_NIM/EU_NON_T2
R289 100
HALF_NIM/EU_NON_T2
C250 0.1uF C251 0.1uF
ANALOG SIF
Close to MSTAR
+3.3V_Normal
HALF_NIM/EU_NON_T2
TUNER_I2C
TU_SCL TU_SDA
1M
R287
100
AV2
2.2uF AV2
TP209
C249
C253
4.7uF
C231 1uF HDMI1_ARC
C257 0.1uF
C258 0.1uF
R216 47 R218 47
L227 BLM18PG121SN1D HALF_NIM/EU_NON_T2
C282
0.1uF
GND_1
2
X201
24MHz
4
3
GND_2 X-TAL_1
X-TAL_2
SPDIF_OUT
MHL_CD_SENSE
AVDD5V_MHL
/VBUS_EN
C256
0.1uF
1uF
128M+128M
256M+128M
HALF_NIM/EU_NON_T2
HALF_NIM/EU_NON_T2
C264 1000pF OPT
50V
HALF_NIM/EU_NON_T2 R220 10K
HALF_NIM/EU_NON_T2
R219
0
C261 8pF
C262 8pF
AMP_SCL AMP_SDA COMP2_DET
L202
BLM18SG121TN1D
C263 10uF
EPHY_RP EPHY_TP
EPHY_RN
EPHY_TN
URSA_SDA URSA_SCL
URSA_SDA
URSA_SCL
IR HDMI_ARC SOC_RESET
Memory OPTION
Memory
128M
MODEL_OPT_4
PIN NO.
0
U23
0
256M
1
1
DTV_IF
IF_P_MSTAR
HALF_NIM/IF_FILTER
C287
C288 33pF
OPT
C285
0.047uF 25V
HALF_NIM/EU_NON_T2
IF_N_MSTAR
HALF_NIM/IF_FILTER C289 33pF
TU_SIF
IF_AGC_MAIN
Close to MSTAR
CI_DET
SIDE USB
SIDE_USB1_DM SIDE_USB1_DP
AV2_L_IN AV2_R_IN COMP2_L_IN COMP2_R_IN
AUDIO IN
C272
C268
4.7uF
4.7uF 10V
10V
HEAD_PHONE
HEAD_PHONE
SOC_RESET
POWER_DET_RESET
RESET_IC_SOC_RESET
RESET_IC_SOC_RESET
R266 470
C202
4.7uF 10V
+3.5V_SOC_RESET
MODEL_OPT_6
PIN NO.
0
1
0
1
AUD_SCK AUD_MASTER_CLK_0 AUD_LRCH
I2S_I/F
AUD_LRCK
AUDIO OUT
SCART1_Lout
SCART1_Rout
H/P OUT
HP_LOUT HP_ROUT
+3.5V_ST
JTP-1127WEM
C200
4.7uF 10V
R200
62K
SWICH SW200
1 2
Note
B8
Ginga
+1.10V_VDDC
C228
+3.3V_Normal
0.1uF
C255
Normal 2.5V
+2.5V_Normal
CAP_10uF_X5R
CHANGE TO 10UF 10V X5R
AVDD2P5
L211
BLM18PG121SN1D
10uF
10V
85C
C269
AVDD2P5_MOD
L229
BLM18PG121SN1D
10uF 10V
C259 0.1uF
C275
10uF 10V
L204
BLM18PG121SN1D
CHANGE TO 10UF 10V X5R
BLM18PG121SN1D
AVDD2P5:172mA
AVDD25_PGA:13mA
C291
0.1uF 16V
C280 1uF
C283 0.1uF
C277 1uF
Normal Power 3.3V
VDD33
85C
85C
10uF 10V
C204
10uF 10V
C284
CAP_10uF_X5R
CAP_10uF_X5R
CHANGE TO 10UF 10V X5R
AVDD_AU33
L208
C241
C240
0.1uF
0.1uF
C274
C273
0.1uF
0.1uF
C269-*1
10uF 10V
CAP_10uF_X7R
C209 0.1uF
VDDC 1.05V
C235 0.1uF
C245 0.1uF
C284-*1
10uF 10V
CAP_10uF_X7R
C204-*1
10uF 10V
CAP_10uF_X7R
VDDC : 2026mA
FB_CORE
FB_CORE
AVDD2P5_MOD
AVDD_NODIE
AVDD_DMPLL
AVDD_AU33
+1.5V_DDR
DDR3 1.5V
C278
10uF 10V
C252
0.1uF
AVDD_DDR0:55mA
AVDD_DDR1:55mA
+1.10V_VDDC
BLM18PG121SN1D
L228
C248
10uF
10V
C296
0.1uF
C207
0.1uF
C254
MIUVDDC
1uF
C279
0.1uF
43
R217
0.1uF
SWICH R205 100
C201
+1.5V_DDR
C266
0.1uF
STby 3.5V
+3.5V_ST
BLM18PG121SN1D
0
SOC_RESET
BLM18PG121SN1D
L206
L207
AVDD_NODIE
AVDD_DMPLL
C205
0.1uF
C286
0.1uF
MIUVDDC
AVDD2P5
VDD33
VDD33
+1.10V_VDDC
+1.10V_VDDC
AVDD25_PGA
AVSS_PGA
C260 1uF
MSD804KKX
S7LR-M_NON_MS10
K12
AVDDLV_USB
G9
VDDC_1
H9
VDDC_2
K10
VDDC_3
K11
VDDC_4
L10
VDDC_5
M12
VDDC_6
M13
VDDC_7
N12
VDDC_8
P14
VDDC_9
P15
VDDC_10
R10
VDDC_11
R14
VDDC_12
R15
VDDC_13
T10
VDDC_14
P10
NC_2
P19
FB_CORE
R16
AVDDL_MOD
L11
NC_1
M14
DVDD_DDR
W9
AVDD2P5_ADC_1
W10
AVDD2P5_ADC_2
W11
AVDD2P5_ADC_3
W12
AVDD2P5_ADC_4
Y17
AVDD25_LAN
V18
AVDD_MOD_1
U19
AVDD_MOD_2
W14
NC_3
W15
NC_4
U7
AVDD_NODIE
L7
AVDD_DVI_USB_1
M7
AVDD_DVI_USB_2
P7
AVDD3P3_MPLL
R7
AVDD_DMPLL
M19
DVDD_NODIE
V7
AVDD_AU33
W7
AVDD_EAR33
R19
VDDP_1
T19
VDDP_2
W18
AVDD_LPLL_1
W19
AVDD_LPLL_2
V19
VDDP_NAND
J17
AVDD_DDR0_D_1
K15
AVDD_DDR0_D_2
K16
AVDD_DDR0_D_3
L15
AVDD_DDR0_C
K17
AVDD_DDR1_D_1
L17
AVDD_DDR1_D_2
M17
AVDD_DDR1_D_3
L16
AVDD_DDR1_C
E9
GND_EFUSE
A23
GND_1
B17
GND_2
C23
GND_3
A5
GND_4
C11
GND_5
C19
GND_6
C22
GND_7
D14
GND_8
D18
GND_9
D19
GND_10
E17
GND_11
E18
GND_12
E19
GND_13
E22
GND_14
F8
GND_15
F17
GND_16
F18
GND_17
F19
GND_18
G8
GND_19
H8
GND_20
N22
GND_21
N21
GND_22
N20
GND_23
M22
GND_24
M21
GND_25
M20
GND_26
F10
GND_27
V15
GND_28
W16
GND_29
V8
GND_30
T18
GND_31
IC101
GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98
GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136
SYM.E
G10 G11 G12 G13 G14 G17 G18 G19 G24 H11 H12 H13 H14 H15 H16 H17 H18 H19 J9 J10 J11 J12 J13 J14 J15 J16 J18 J19 J25 K9 K13 K14 H10 K18 K19 K22 L8 L9 J8 L12 L13 L18 L19 M8 K8 M10 M11 L14 M15 M16 M18 M25 N10 N11 N13 N14 N15 N16 N17 N19 K7 P8 P9 M9 P11 P13 P16 P17 P18 P12 R8 R9 R11 R12 R13 R17 T8 T9 N7 T11 T12 T13 T14 T15 T16 T17 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 R18 V9 V10 V11 V12 V14 V17 T7 E8
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
MAIN2_NON_EU
2012.09.19
52
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