Page 1
Internal Use Only
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED TV
SERVICE MANUAL
CHASSIS : LB53V
MODEL : 55UG870T 55UG870T-TA
55UG870Y 55UG870Y-TA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
Printed in Korea P/NO : MFL68704903 (1503-REV00)
Page 2
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ........................................................................ 3
SERVICING PRECAUTIONS .................................................................... 4
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION .............................................................. 13
BLOCK DIAGRAM .................................................................................. 23
EXPLODED VIEW .................................................................................. 34
SCHEMATIC CIRCUIT DIAGRAM ........................................... APPENDIX
TROUBLE SHOOTING GUIDE ................................................. APPENDIX
Only for training and service purposes
- 2 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 3
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ .
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Only for training and service purposes
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LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 4
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions. Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug
or other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION : A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specied otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION : This is a ammable mixture.
Unless specied otherwise in this service manual, lubrication
of contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks
are correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test xtures specied in this
service manual.
CAUTION: Do not connect the test xture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some eld-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder
ES devices.
4. Use only an anti-static type solder removal device. Some sol-
der removal devices not classied as “anti-static” can generate
electrical charges sufcient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufcient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will
be installed.
CAUTION : Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted oor can generate static electricity sufcient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within
the range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand
against the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder ows onto and around both the compo nent lead and the foil.
CAUTION : Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
Only for training and service purposes
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LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 5
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent at against the cir cuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION : Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
Only for training and service purposes
- 5 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 6
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
1. Application range
This specification is applied to the LED TV used LB53V
chassis.
2. Requirement for Test
Each part is tested as below without special notice
1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC specification
- Wireless : Wireless HD Specification (Option)
4. Model General Specification
No. Item Specication Remarks
1 Market Asia, Oceania, Africa, Middle East(PAL/DVB Market)
2 Television system
3 Channel Storage ATV / DTV - 1500EA
4 Receiving system
5 Video Input RCA PAL, SECAM, NTSC 4 System : PAL, SECAM, NTSC, PAL60
6 Component Input Y/Pb/Pr
7 Head phone out
8 HDMI Input HDMI1-DTV,HDMI2-DTV, HDMI3-DTV PC(HDMI Ver. 1.4), Support HDCP
9 Audio Input DVI Audio, Component, AV1
10 SPDIF out SPDIF out
11 USB Input For My Media(Movie/Photo/Music List) or For SVC
1) PAL-BG/DK/I/I’
2) SECAM L/L’, DK, BG, I
3) DVB-T/T2, C, S/S2
Analog : Upper Heterodyne
Digital : COFDM(DVB-T) Only DVB-T Model
Digital : COFDM(DVB-T/T2) Only DVB-T2 Model
Digital : QAM
Antenna, AV1, Component, HDMI1, HDMI2, HDMI3,
USB1, USB2, USB3
► DVB-T
- Guard Interval(Bitrate_Mbit/s): 1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
► DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation :
16QAM, 64-QAM, 128-QAM and 256-QAM
► DVB-S/S2
- Symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- Viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode: 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
Only for training and service purposes
- 6 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 7
5. External Input Support Format
5.1. 2D Mode
(1) CVBS input
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed Remarks
1 720*480i 15.73 59.94 13.50 SDTV, DVD 480I(525I) NTSC-M
2 720*480i 15.73 60.00 13.51 SDTV, DVD 480I(525I) NTSC-M
3 720*576i 15.63 50.00 13.50 SDTV, DVD 576I(625I) 50Hz PAL-BDGHI
(2) Component (Y, CB/PB, CR/PR)
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed
1 720*480i 15.73 59.94 13.50 SDTV, DVD 480I(525I)
2 720*480i 15.73 60.00 13.51 SDTV, DVD 480I(525I)
3 720*576i 15.63 50.00 13.50 SDTV, DVD 576I(625I) 50Hz
4 720*480p 31.47 59.94 27.00 SDTV 480P
5 720*480p 31.50 60.00 27.03 SDTV 480P
6 720*576p 31.25 50.00 27.00 SDTV 576P 50Hz
7 1280*720 44.96 59.94 74.18 HDTV 720P
8 1280*720 45.00 60.00 74.25 HDTV 720P
9 1280*720 45.00 50.00 74.25 HDTV 720P 50Hz
10 1920*1080 28.13 50.00 74.25 HDTV 1080I 50Hz,
11 1920*1080 33.72 59.94 74.18 HDTV 1080I
12 1920*1080 33.75 60.00 74.25 HDTV 1080I
13 1920*1080 56.25 50.00 148.50 HDTV 1080P
14 1920*1080 67.50 60.00 148.50 HDTV 1080P
Only for training and service purposes
- 7 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 8
(2) HDMI (DTV)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks
1 640*480 31.47 59.94 25.13 SDTV 480P
2 640*480 31.50 60.00 25.13 SDTV 480P
3 720*480 15.73 59.94 13.50 SDTV, DVD 480I(525I)
Spec. out but display 4 720*480 15.75 60.00 13.51 SDTV, DVD 480I(525I)
5 720*576 15.63 50.00 13.50 SDTV, DVD 576I(625I) 50Hz
6 720*480 31.47 59.94 27.00 SDTV 480P
7 720*480 31.50 60.00 27.03 SDTV 480P
8 720*576 31.25 50.00 27.00 SDTV 576P
9 1280*720 44.96 59.94 74.18 HDTV 720P
10 1280*720 45.00 60.00 74.25 HDTV 720P
11 1280*720 37.50 50.00 74.25 HDTV 720P
12 1920*1080 28.13 50.00 74.25 HDTV 1080I
13 1920*1080 33.72 59.94 74.18 HDTV 1080I
14 1920*1080 33.75 60.00 74.25 HDTV 1080I
15 1920*1080 26.97 23.98 63.30 HDTV 1080P
16 1920*1080 27.00 24.00 63.36 HDTV 1080P
17 1920*1080 33.71 29.97 79.12 HDTV 1080P
18 1920*1080 33.75 30.00 79.20 HDTV 1080P
19 1920*1080 56.25 50.00 148.50 HDTV 1080P
20 1920*1080 67.43 59.94 148.35 HDTV 1080P
21 1920*1080 67.50 60.00 148.50 HDTV 1080P
22 3840*2160 53.95 23.98 297.00 UDTV 2160P
23 3840*2160 54.00 24.00 297.00 UDTV 2160P
24 3840*2160 56.25 25.00 297.00 UDTV 2160P
25 3840*2160 61.43 29.97 297.00 UDTV 2160P
26 3840*2160 67.50 30.00 297.00 UDTV 2160P
27 3840*2160 112.50 50.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0
28 3840*2160 135.00 59.94 593.41 UDTV 2160P 8 bit / YCbCr 4:2:0
29 3840*2160 135.00 60.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0
30 4096*2160 53.95 23.98 297.00 UDTV 2160P
31 4096*2160 54.00 24.00 297.00 UDTV 2160P
32 4096*2160 56.25 25.00 297.00 UDTV 2160P
33 4096*2160 61.43 29.97 297.00 UDTV 2160P
34 4096*2160 67.50 30.00 297.00 UDTV 2160P
35 4096*2160 112.50 50.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0
36 4096*2160 135.00 59.94 593.41 UDTV 2160P 8 bit / YCbCr 4:2:0
37 4096*2160 135.00 60.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0
Only for training and service purposes
- 8 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 9
(4) HDMI Input (PC)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks
1 640*350 31.47 70.09 25.17 EGA
2 720*400 31.47 70.08 28.32 DOS
3 640*480 31.47 59.94 25.17 VESA(VGA)
4 800*600 37.88 60.32 40.00 VESA(SVGA)
5 1024*768 48.36 60.00 65.00 VESA(XGA)
6 1360*768 47.71 60.02 84.75 VESA(WXGA)
7 1152*864 54.35 60.05 80.00 VESA
8 1280*1024 63.98 60.02 109.00 SXGA
9 1920*1080 67.50 60.00 158.40 WUXGA(Reduced Blanking)
10 3840*2160 54.00 24.00 297.00 UDTV 2160P
11 3840*2160 56.25 25.00 297.00 UDTV 2160P
12 3840*2160 67.50 30.00 297.00 UDTV 2160P
13 4096*2160 53.95 23.98 297.00 UDTV 2160P
14 4096*2160 54.00 24.00 297.00 UDTV 2160P
5.2. 3D Mode
(1) RF input
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed Remarks
1 1280*720 37.50 50 74.25 HDTV 720P 2D to 3D, Side by Side, Top & Bottom
2 1920*1080 28.13 50 74.25 HDTV 1080I 2D to 3D, Side by Side, Top & Bottom
(2) HDMI input
1) HDMI1.4/2.0 (3D supported mode manually)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode
1 720*480 31.50 60.00 27.03 SDTV 480P
2 720*576 31.25 50.00 27.00 SDTV 576P
3 1280*720
4 1920*1080
3840*2160
5
4096*2160
45.00 60.00 74.25 HDTV 720P
37.50 50.00 74.25 HDTV 720P
33.75 60.00 74.25 HDTV 1080I
28.13 50.00 74.25 HDTV 1080I
27.00 24.00 74.25 HDTV 1080P
28.12 25.00 74.25 HDTV 1080P
33.75 30.00 74.25 HDTV 1080P
67.50 60.00 148.50 HDTV 1080P 2D to 3D, Side by Side(Half), Top & Bottom,
56.25 50.00 148.50 HDTV 1080P
53.95 23.98 297.00
54.00 24.00 296.70
56.25 25.00 297.00
61.43 29.97 297.00
67.50 30.00 296.70
112.50 50.00 594.00 HDTV 2160P
135.00 60.00 594.00 HDTV 2160P
HDTV 2160P 2D to 3D, Top & Bottom(half), Side by Side(half)
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Frame Sequential, Row Interleaving, Column Interleaving
2D to 3D, Side by Side(Half), Top & Bottom
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column
Interleaving
Checker Board, Single Frame Sequential, Row
Interleaving, Column Interleaving
2D to 3D, Top & Bottom(half), Side by Side(half)
(8 bit, YCbCr 4:2:0)
Only for training and service purposes
- 9 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 10
2) HDMI 1.4b (3D supported mode automatically)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) VIC 3D input proposed mode Proposed
1 640*480
2 720*480
3 720*576
4 1280*720
5 1920*1080
31.47 / 31.50 59.94/ 60.00 25.13/25.20 1
31.47 / 31.50 59.94/ 60.00 50.35/50.40 1 Side-by-side(Full) (SDTV 480P)
62.94 / 63.00 59.94/ 60.00 50.35/50.40 1
31.47 / 31.50 59.94 / 60.00 27.00/27.03 2,3
31.47 / 31.50 59.94 / 60.00 54.00/54.06 2,3 Side-by-side(Full) (SDTV 480P)
62.94 /63.00 59.94 / 60.00 54.00/54.06 2,3
31.25 50.00 27.00 17,18
31.25 50.00 54.00 17,18 Side-by-side(Full) (SDTV 576P)
62.50 50.00 54.00 17,18
15.63 50.00 27.00 21
37.50 50.00 74.25 19
37.50 50.00 148.50 19 Side-by-side(Full) (HDTV 720P)
44.96 / 45.00 59.94 / 60.00 74.17/74.25 4
44.96 / 45.00 59.94 / 60.00 148.35/148.50 4 Side-by-side(Full) (HDTV 720P)
75.00 50.00 148.50 19
89.91/90.00 59.94 / 60.00 148.35/148.50 4
28.13 50.00 74.25 20
28.13 50.00 148.50 20 Side-by-side(Full) (HDTV 1080I)
33.72 / 33.75 59.94 / 60.00 74.17/74.25 5
33.72 / 33.75 59.94 / 60.00 148.35/148.50 5 Side-by-side(Full) (HDTV 1080I)
56.25 50.00 148.50 20
67.43/67.50 59.94 / 60.00 148.35/148.50 5
26.97 / 27.00 23.97 / 24.00 74.17 / 74.25 32
26.97 / 27.00 23.97 / 24.00 148.35 / 148.50 32 Side-by-side(Full) (HDTV 1080P)
28.12 25.00 74.25 33
28.12 25.00 148.50 33 Side-by-side(Full) (HDTV 1080P)
33.72 / 33.75 29.98 / 30.00 74.18/74.25 34 Side-by-side(Full)
33.72 / 33.75 29.98 / 30.00 148.35/148.50 34
43.94/54.00 23.97 / 24.00 148.35/148.50 32
56.25 25.00 148.50 33
67.43 / 67.5 29.98 / 30.00 148.35/148.50 34
56.25 50.00 148.50 31
67.43 / 67.50 59.94 / 60.00 148.35/148.50 16
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Frame packing
Field alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Frame packing
Line alternative
Top-and-Bottom
Side-by-side(half)
Frame packing
Field alternative
Frame packing
Field alternative
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Frame packing
Line alternative
Frame packing
Line alternative
Frame packing
Line alternative
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
(SDTV 480P)
Secondary(SDTV 576P)
Secondary(SDTV 576P)
Secondary(SDTV 576P)
(SDTV 576P)
Secondary(SDTV 576I)
(SDTV 576I
(SDTV 576I
Secondary(SDTV 576I)
Secondary(SDTV 576I)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
(HDTV 720P)
Primary(HDTV 720P)
(HDTV 720P)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
Primary(HDTV 1080I)
(HDTV 1080I)
Primary(HDTV 1080I)
(HDTV 1080I)
Primary(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Secondary(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
(HDTV 1080P)
Primary(HDTV 1080P)
(HDTV 1080P)
Secondary(HDTV 1080P)
(HDTV 1080P)
Primary(HDTV 1080P)
(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Only for training and service purposes
- 10 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 11
(3) HDMI-PC Input (3D) (3D supported mode manually)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1024*768 48.36 60.00 65.00 HDTV 768P 2D to 3D, Side by Side(half), Top & Bottom
2D to 3D, Side by Side(half), Top & Bottom,
2 1920*1080 67.500 60 148.50 HDTV 1080P
54.00 24.00 296.70
3 3840*2160
4 4096*2160 54 24.00 297.00 HDTV 2160P
5 Others - - -
56.25 25.00 297.00
67.50 30.00 296.70
HDTV 2160P
640*350
720*400
640*480
800*600
1152*864
Checker Board, Single Frame Sequential,
Row Interleaving, Column Interleaving
2D to 3D, Top & Bottom(half), Side by
Side(half),
2D to 3D,
Top & Bottom(half), Side by Side(half),
2D to 3D, Side by Side(half), Top & Bottom
(4) Component Input ( 3D) (3D supported mode manually)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1280*720 37.50 50.00 74.25 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom
2 1280*720 45.00 60.00 74.25 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom
3 1280*720 44.96 59.94 74.18 HDTV 720P 2D to 3D, Side by Side(half), Top & Bottom
4 1920*1080 33.75 60.00 74.25 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom
5 1920*1080 33.72 59.94 74.18 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom
6 1920*1080 28.12 50.00 74.25 HDTV 1080I 2D to 3D, Side by Side(half), Top & Bottom
7 1920*1080 67.50 60.00 148.50 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
8 1920*1080 67.43 59.94 148.35 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
9 1920*1080 27.00 24.00 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
10 1920*1080 28.12 25.00 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
11 1920*1080 56.25 50.00 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
12 1920*1080 26.97 23.98 74.18 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
13 1920*1080 33.75 30.00 74.25 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
14 1920*1080 33.71 29.97 74.18 HDTV 1080P 2D to 3D, Side by Side(half), Top & Bottom
Only for training and service purposes
- 11 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 12
(5) USB
1) Movie (3D) (3D supported mode manually)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 Under 704x480 - - - 2D to 3D
Over 704x480
2
Under 1080P
interlaced
Over 704x480
3
Under 1080P
progressive
4 Over 2160P - 24/25/30 - 2D to 3D, Side by Side(Half), Top & Bottom
2) DLNA - Photo (3D) (3D supported mode manually)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 Under 320x240 - - - 2D to 3D
2 Over 320x240 - - - 2D to 3D, Side by Side(Half), Top & Bottom
3) DLNA (3D) (3D supported mode automatically)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 1080p 33.75 30.00 74.25
2 2160p 67.50 30.00 297.00
- - - 2D to 3D, Side by Side(Half), Top & Bottom
2D to 3D, Side by Side(Half), Top & Bottom, Checker
- 50 / 60 -
Board, Row Interleaving, Column Interleaving, Frame
Sequential
- others -
2D to 3D, Side by Side(Half), Top & Bottom, Checker
Board, Row Interleaving, Column Interleaving
Side by Side(Half), Top & Bottom, Checker Board
MPO(Photo), JPS(Photo)
(6) Miracast, Widi (3D supported mode manually)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode
1 1024*768p - 30/60 -
2D to 3D, Side by Side(Half), Top & Bottom2 1280*720p - 30/60 -
3 1920*1080p - 30/60 -
4 Others - - - 2D to 3D
■ Remark: 3D Input mode
No. Side by Side Top & Bottom Checker board
1
ii.
iii.
iv.
Single Frame
Sequential
Frame
Packing
v.
vi.
Row
Interleaving
Column
Interleaving
2D to 3D
Only for training and service purposes
- 12 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 13
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LED TV with
LB53V chassis.
2. Designation
(1) Because this is not a hot chassis, it is not necessary to
use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~, 50/60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 °C.
In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours.
In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
3.2. LAN Inspection
3.2.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
3.2.2. LAN inspection solution
▪ LAN Port connection with PCB
▪ Network setting at MENU Mode of TV
▪ Setting automatic IP
▪ Setting state confirmation
- If automatic setting is finished, you confirm IP and MAC
Address.
3.2.3. WIDEVINE key Inspection
- Confirm key input data at the "IN START" MENU Mode.
3. Automatic Adjustment
3.1. MAC address D/L, CI+ key D/L(Option),
Widevine key D/L, ESN D/L, HDCP20 D/L
Connect: USB port
Communication Prot connection
▪ Com 1,2,3,4 and 115200(Baudrate)
Mode check: Online Only
▪ Check the test process
: DETECT→MAC→ESN→Widevine→CI(option)→HDCP20
▪ Play: Press Enter key
▪ Result: Ready, Test, OK or NG
▪ Printer Out (MAC Address Label)
3.3. LAN PORT INSPECTION(PING TEST)
Connect SET → LAN port == PC → LAN Port
SET PC
3.3.1. Equipment setting
(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
3.3.2. LAN PORT inspection(PING TEST)
(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.
Only for training and service purposes
- 13 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 14
3.4. Model name & Serial number Download
3.4.1. Model name & Serial number D/L
▪ Press "P-ONLY" key of service remote control.
(Baud rate : 115200 bps)
▪ Connect RS-232C Signal to USB Cable to USB.
▪ Write Serial number by use USB port.
▪ Must check the serial number at Instart menu.
3.4.2. Method & notice
(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man, sometimes
model name or serial number is initialized.(Not always)
It is impossible to download by bar code scan, so It need
Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "7.Model Number D/L" like below photo.
3) Input the Factory model name(ex 47LB650V-ZA) or Serial
number like photo.
4) Check the model name Instart menu. → Factory name
displayed. (ex 47LB650V-ZA)
5) Check the Diagnostics.(DTV country only) → Buyer
model displayed. (ex 47LB650V-ZA)
3.5. CI+ Key checking method
Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below).
=> Check the Download to CI+ Key value in LGset.
3.5.1. Check the method of CI+ Key value
(1) Check the method on Instart menu
(2) Check the method of RS232C Command
1) Into the main ass’y mode(RS232: aa 00 00)
CMD 1 CMD 2 Data 0
A A 0 0
2) Check the key download for transmitted command
(RS232: ci 00 10)
CMD 1 CMD 2 Data 0
C I 1 0
3) Result value
- Normally status for download : OKx
- Abnormally status for download : NGx
3.5.2. Check the method of CI+ key value(RS232)
1) Into the main ass’y mode(RS232: aa 00 00)
CMD 1 CMD 2 Data 0
A A 0 0
2) Check the mothed of CI+ key by command
(RS232: ci 00 20)
CMD 1 CMD 2 Data 0
C I 2 0
3) Result value
i 01 OK 1d1852d21c1ed5dcx
CI+ Key Value
Only for training and service purposes
3.6. WIFI MAC ADDRESS CHECK
(1) Using RS232 Command
H-freq(kHz) V-freq.(Hz)
Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]
(2) Check the menu on in-start
- 14 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 15
4. Manual Adjustment
4.1. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download
4.1.1. Overview
It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity
of user input. It is a realization of "Plug and Play".
4.1.2. Equipment
- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
- Adjustment remote control
4.1.3. Download method
(1) Press "ADJ" key on the Adjustment remote control, then
select "12.EDID D/L", By pressing "Enter" key, enter EDID
D/L menu.
For HDMI EDID
DVI-D to HDMI or HDMI to HDMI
(2) Select "Start" button by pressing "Enter" key, HDMI1/
HDMI2/ HDMI3 are writing and display OK or NG.
4.1.4. EDID DATA
▪ Reference
- HDMI1 ~ HDMI3
- In the data of EDID, bellows may be different by Input mode.
0 1 2 3 4 5 6 7 8 9 A B C D E F
0x00 00 FF FF FF FF FF FF 00 1E 6D
ⓒ
0x01
0x02 0F 50 54 A1 8 00 31 40 45 40 61 40 71 40 81 80
0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
0x04 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
0x05 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20
0x07
0x00 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21
0x01 22 15 01 29 3D 06 C0 15 07 50
0x02
0x03
0x04 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18
0x05 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D
0x06 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
ⓓ
ⓕ
10 28 10 E3 05 03 01 02 3A 80 18 71 38
ⓕ
ⓐ Product ID
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘01’ → ‘01’, Year : ‘2015’ → ‘19’
ⓓ Model Name(Hex): LGTV
ⓔ Checksum(LG TV): Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
ⓐ ⓑ
ⓕ
ⓓ
ⓔ1
01
ⓔ2
(1) EDID for 3D Model
1) DTS
# HDMI 1(C/S : A0 9E) - HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
40 8A 00 40 84 63 00 00 1E 02 3 A 80 18 71 38 2D 40
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 88 3C 00 0 A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0 A 20 20 20 20 20 20 20 01 A0
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 55 F1 58 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 29 3D 06
A0 C0 15 07 50 09 57 07 7C 03 0C 00 10 00 B8 3C 20
B0 C0 8E 01 02 03 04 01 4F 3F FC 08 10 18 10 06 10
C0 16 10 28 10 67 D8 5D C4 01 78 80 03 E3 05 C0 00
D0 E4 0F 00 C0 18 66 21 50 B0 51 00 1B 30 40 70 36
E0 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 20 6E
F0 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00 9E
# HDMI 1(C/S : E6 F4) - HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 46 F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50
A0 09 57 07 7C 03 0C 00 10 00 B8 3C 20 C0 8E 01 02
B0 03 04 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
C0 E5 0E 60 61 65 66 01 1D 80 18 71 1C 16 20 58 2C
D0 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20
E0 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F4
# HDMI 2(C/S : A0 8E) - HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3 A
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0 A 20 20 20 20 20 20 20 01 A0
EDID Block 1, Bytes 128-255 [80H-FFH]
Only for training and service purposes
- 15 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 16
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 55 F1 58 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 29 3D 06
A0 C0 15 07 50 09 57 07 7C 03 0C 00 20 00 B8 3C 20
B0 C0 8E 01 02 03 04 01 4F 3F FC 08 10 18 10 06 10
C0 16 10 28 10 67 D8 5D C4 01 78 80 03 E3 05 C0 00
D0 E4 0F 00 C0 18 66 21 50 B0 51 00 1B 30 40 70 36
E0 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 20 6E
F0 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00 8E
# HDMI 2(C/S : E6 E4) - HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 46 F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50
A0 09 57 07 7C 03 0C 00 20 00 B8 3C 20 C0 8E 01 02
B0 03 04 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
C0 E5 0E 60 61 65 66 01 1D 80 18 71 1C 16 20 58 2C
D0 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20
E0 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E4
# HDMI 3(C/S : E6 D4) - HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 46 F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50
A0 09 57 07 7C 03 0C 00 30 00 B8 3C 20 C0 8E 01 02
B0 03 04 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10
C0 E5 0E 60 61 65 66 01 1D 80 18 71 1C 16 20 58 2C
D0 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20
E0 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D4
* Checksum for Non 3D model (HDMI 1/2/3)
Input
HDMI Deep Color On
FFh (Checksum)
HDMI Deep Color Off
FFh (Checksum)
HDMI1 A0 9E E6 F4
HDMI2 A0 8E E6 E4
HDMI3 E6 D4 E6 D4
2) AC3
# HDMI 1(C/S : A0 A7) - HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3 A
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0 A 20 20 20 20 20 20 20 01 A0
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 52 F1 58 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 26 15 07
A0 50 09 57 07 7C 03 0C 00 10 00 B8 3C 20 C0 8E 01
B0 02 03 04 01 4F 3F FC 08 10 18 10 06 10 16 10 28
C0 10 67 D8 5D C4 01 78 80 03 E3 05 C0 00 E4 0F 00
D0 C0 18 66 21 50 B0 51 00 1B 30 40 70 36 00 40 84
E0 63 00 00 1E 01 1D 00 72 51 D0 1E 20 6E 28 55 00
F0 40 84 63 00 00 1E 00 00 00 00 00 00 00 00 00 A7
# HDMI 1(C/S : E6 FD) - HDMI UHD Deep Off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 43 F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 26 15 07 50 09 57 07
A0 7C 03 0C 00 10 00 B8 3C 20 C0 8E 01 02 03 04 01
B0 4F 3F FC 08 10 18 10 06 10 16 10 28 10 E5 0E 60
C0 61 65 66 01 1D 80 18 71 1C 16 20 58 2C 25 00 40
D0 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55
E0 00 40 84 63 00 00 1E 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FD
# HDMI 2(C/S : A0 07) - HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3 A
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0 A 20 20 20 20 20 20 20 01 A0
Only for training and service purposes
- 16 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 17
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 52 F1 58 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 26 15 07
A0 50 09 57 07 7C 03 0C 00 20 00 B8 3C 20 C0 8E 01
B0 02 03 04 01 4F 3F FC 08 10 18 10 06 10 16 10 28
C0 10 67 D8 5D C4 01 78 80 03 E3 05 C0 00 E4 0F 00
D0 C0 18 66 21 50 B0 51 00 1B 30 40 70 36 00 40 84
E0 63 00 00 1E 01 1D 00 72 51 D0 1E 20 6E 28 55 00
F0 40 84 63 00 00 1E 00 00 00 00 00 00 00 00 00 97
# HDMI 2(C/S : E6 ED) - HDMI UHD Deep off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 43 F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 26 15 07 50 09 57 07
A0 7C 03 0C 00 20 00 B8 3C 20 C0 8E 01 02 03 04 01
B0 4F 3F FC 08 10 18 10 06 10 16 10 28 10 E5 0E 60
C0 61 65 66 01 1D 80 18 71 1C 16 20 58 2C 25 00 40
D0 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55
E0 00 40 84 63 00 00 1E 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ED
# HDMI 3(C/S : E6 DD) - HDMI UHD Deep off Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6
EDID Block 1, Bytes 128-255 [80H-FFH
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 43 F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 26 15 07 50 09 57 07
A0 7C 03 0C 00 30 00 B8 3C 20 C0 8E 01 02 03 04 01
B0 4F 3F FC 08 10 18 10 06 10 16 10 28 10 E5 0E 60
C0 61 65 66 01 1D 80 18 71 1C 16 20 58 2C 25 00 40
D0 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55
E0 00 40 84 63 00 00 1E 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 DD
* Checksum (HDMI 1/2/3)
Input
HDMI Deep Color On
FFh (Checksum)
HDMI Deep Color Off
FFh (Checksum)
HDMI1 A0 A7 E6 FD
HDMI2 A0 97 E6 ED
HDMI3 E6 DD E6 DD
3) PCM
# HDMI 1(C/S : A0 19) - HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3 A
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0 A 20 20 20 20 20 20 20 01 A0
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 4F F1 58 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 23 09 57
A0 07 7C 03 0C 00 10 00 B8 3C 20 C0 8E 01 02 03 04
B0 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10 67 D8
C0 5D C4 01 78 80 03 E3 05 C0 00 E4 0F 00 C0 18 66
D0 21 50 B0 51 00 1B 30 40 70 36 00 40 84 63 00 00
E0 1E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63
F0 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 00 19
# HDMI 1(C/S : E6 6F) - HDMI UHD Deep off case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 40 F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 23 09 57 07 7C 03 0C
A0 00 10 00 B8 3C 20 C0 8E 01 02 03 04 01 4F 3F FC
B0 08 10 18 10 06 10 16 10 28 10 E5 0E 60 61 65 66
C0 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00
D0 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84
E0 63 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6F
# HDMI 2(C/S : A0 09) - HDMI UHD Deep On Case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
40 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
50 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3 A
60 3E 1E 88 3C 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0 A 20 20 20 20 20 20 20 01 A0
Only for training and service purposes
- 17 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 18
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 4F F1 58 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 23 09 57
A0 07 7C 03 0C 00 20 00 B8 3C 20 C0 8E 01 02 03 04
B0 01 4F 3F FC 08 10 18 10 06 10 16 10 28 10 67 D8
C0 5D C4 01 78 80 03 E3 05 C0 00 E4 0F 00 C0 18 66
D0 21 50 B0 51 00 1B 30 40 70 36 00 40 84 63 00 00
E0 1E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63
F0 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 00 09
# HDMI 2(C/S : E6 5F) - HDMI UHD Deep off case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 40 F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 23 09 57 07 7C 03 0C
A0 00 20 00 B8 3C 20 C0 8E 01 02 03 04 01 4F 3F FC
B0 08 10 18 10 06 10 16 10 28 10 E5 0E 60 61 65 66
C0 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00
D0 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84
E0 63 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 5F
# HDMI 3(C/S : E6 4F) - HDMI UHD Deep off case
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 01 19 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E6
EDID Block 1, Bytes 128-255 [80H-FFH
0 1 2 3 4 5 6 7 8 9 A B C D E F
80 02 03 40 F1 54 10 9F 04 13 05 14 03 02 12 20 21
90 22 15 01 5D 5E 5F 62 63 64 23 09 57 07 7C 03 0C
A0 00 30 00 B8 3C 20 C0 8E 01 02 03 04 01 4F 3F FC
B0 08 10 18 10 06 10 16 10 28 10 E5 0E 60 61 65 66
C0 01 1D 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00
D0 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84
E0 63 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 00
F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 4F
4.2. White Balance Adjustment
4.2.1. Overview
▪ W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel's W/B deviation
(2) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one
of R/G/B is fixed at 192, and the other two is lowered to
find the desired value.
(3) Adjustment condition : normal temperature
1) Surrounding Temperature : 25 °C ± 5 °C
2) Warm-up time: About 5 Min
3) Surrounding Humidity : 20 % ~ 80 %
4.2.2. Equipment
(1) Color Analyzer: CA-210 (LED Module : CH 14)
(2) Adjustment Computer(During auto adj., RS-232C protocol
is needed)
(3) Adjustment Remote control
(4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model: 204, Pattern: 49)
→ Only when internal pattern is not available
• Color Analyzer Matrix should be calibrated using CS-100.
4.2.3. Equipment connection MAP
Color Analyzer
Probe
RS- 232C
Pattern Generator
Signal Source
* If TV internal pattern is used, not needed
4.2.4. Adj. Command (Protocol)
<Command Format>
START 6E A 50 A LEN A 03 A CMD A 00 A VA L A CS STOP
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
RS-232C
Computer
RS-232C
* Checksum (HDMI 1/2/3)
Input
HDMI Deep Color On
FFh (Checksum)
HDMI1 A0 19 E6 6F
HDMI2 A0 09 E6 5F
HDMI3 E6 4F E6 4F
Only for training and service purposes
HDMI Deep Color Off
FFh (Checksum)
- 18 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 19
▪ RS-232C Command used during auto-adjustment.
RS-232C COMMAND
[CMD ID DATA]
wb 00 00 Begin White Balance adjustment
wb 00 10 Gain adjustment(internal white pattern)
wb 00 1f Gain adjustment completed
wb 00 20 Offset adjustment(internal white pattern)
wb 00 2f Offset adjustment completed
wb 00 ff
End White Balance adjustment
(internal pattern disappears)
Explanation
Ex) wb 00 00 → Begin white balance auto-adj.
wb 00 10 → Gain adj.
ja 00 ff → Adj. data
jb 00 c0
...
...
wb 00 1f → Gain adj. completed
*(wb 00 20(Start), wb 00 2f(end)) → Off-set adj.
wb 00 ff → End white balance auto-adj.
▪ Adj. Map
Cool
Medium
Warm
Command
Adj. item
R Gain j g 00 C0
G Gain j h 00 C0
B Gain j i 00 C0
R Cut
G Cut
B Cut
R Gain j a 00 C0
G Gain j b 00 C0
B Gain j c 00 C0
R Cut
G Cut
B Cut
R Gain j d 00 C0
G Gain j e 00 C0
B Gain j f 00 C0
R Cut
G Cut
(lower case ASCII)
CMD1 CMD2 MIN MAX
Data Range
(Hex.)
Default
(Decimal)
4.2.5. Adj. method
(1) Auto adj. method
1) Set TV in adj. mode using POWER ON key.
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable.(RS-232C to USB)
4) Select mode in adj. Program and begin adj.
5) When adj. is complete (OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
▪ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
(2) Manual adjustment. method
1) Set TV in Adj. mode using POWER ON.
2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10 cm of the surface.
3) Press ADJ key → EZ adjust using adj. R/C → 7. WhiteBalance then press the cursor to the right(key ►).
(When right key(►) is pressed 216 Gray internal pattern
will be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
5) Adjustment is performed in COOL, MEDIUM, WARM 3
modes of color temperature.
** G-fix adjustment
Adjust modes (Cool), Fix the G gain to 172 (default data)
and change the others (G/B Gain).
Adjust two modes(Medium / Warm), Fix the one of R/G/B
gain to 192 (default data) and decrease the others.
▪ If internal pattern is not available, use RF input. In EZ Adj.
menu 7.White Balance, you can select one of 2 Testpattern: ON, OFF. Default is inner(ON). By selecting OFF,
you can adjust using RF signal in 216 Gray pattern.
▪ Adjustment condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
: Color Analyzer(CA-210) probe should be within 10 cm
and perpendicular of the module surface (80° ~ 100°)
3) Aging time
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked
using no signal or Full-white pattern.
Only for training and service purposes
- 19 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 20
4.2.6. Reference (White balance Adj. coordinate and
color temperature)
▪ Luminance : 206 Gray
▪ Standard color coordinate and temperature using CS-1000
(over 26 inch)
Mode
Cool 0.271 0.270 13000 K 0.0000
Medium 0.286 0.289 9300 K 0.0000
Warm 0.313 0.329 6500 K 0.0000
▪
Standard color coordinate and temperature using CA-210(CH 14)
Mode
Cool 0.271 ± 0.002 0.270 ± 0.002 13000 K 0.0000
Medium 0.286 ± 0.003 0.289 ± 0.003 9300 K 0.0000
Warm 0.313 ± 0.002 0.329 ± 0.002 6500 K 0.0000
Coordinate
x y
Coordinate
x y
Temp ∆uv
Temp ∆uv
4.2.7. LED White balance table
▪ Edge & ALEF LED module change color coordinate because
of aging time.
▪ Apply under the color coordinate table, for compensated
aging time.
▪ (Normal line) White balance table
Model : (normal line) 55/65UG870*-T*(LGD)
Aging
time
(Min)
1 0-2 285 296 300 315 327 355
2 3-5 284 294 299 313 326 353
3 6-9 283 293 298 312 325 352
4 10-19 283 292 298 311 325 351
5 20-35 281 288 296 307 323 347
6 36-49 279 286 294 305 321 345
7 50-79 278 284 293 303 320 343
8 80-119 277 282 292 301 319 341
9 Over 120 271 270 286 289 313 329
Cool Medium Warm
x y x y x y
271 270 286 289 313 329
4.3. Local Dimming Function Check
(1) Turn on TV.
(2) At the Local Dimming mode, module Edge Backlight
moving right to left Back light of IOP module moving.
(3) Confirm the Local Dimming mode.
(4) Press “exit” Key.
4.4. Magic Motion Remote control test
- Equipment : RF Remote control for test, IR-KEY-Code
Remote control for test
- You must confirm the battery power of RF-Remote control
before test(recommend that change the battery per every lot)
- Sequence (test)
1) If you select the ‘start key(OK)’ on the Adjustment remote
control, you can pairing with the TV SET.
2) You can check the cursor on the TV Screen, when select
the "OK" key on the Adjustment remote control.
3) You must remove the pairing with the TV Set by select
‘Mute + OK Key’ on the Adjustment remote control.
4.5. 3D function test
(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])
* HDMI mode NO. 872 , pattern No.83
(1) Please input 3D test pattern like below.
(2) When 3D OSD appear automatically, then select green key.
▪ AUO, INX, Sharp, CSOT, BOE (Cool :13000 K)
Cool Medium Warm
x y x y x y
271 270 285 293 313 329
Target 278 280 293 299 320 339
Only for training and service purposes
- 20 -
(3) Don't wear a 3D Glasses, Check the picture like below.
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 21
4.6. Option selection per country
4.6.1. Overview
- Option selection is only done for models in AJ/JA/IL
4.6.2.Method
(1) Press "ADJ" key on the Adjustment remote control, then
select Country Group Menu.
(2) Depending on destination, select Country Group Code or
Country Group then on the lower Country option, select
US, CA, MX. Selection is done using +, - or ►◄ KEY.
4.7. HDMI ARC Function Inspection
(1) Test equipment
- Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
(2) Test method
1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment. (HDMI 2)
5. GND and Internal Pressure check
5.1. Method
(1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET. (If
loose, re-insert)
(2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
5.2. Checkpoint
▪ TEST voltage
- GND: 1.5 KV / min at 100 mA
- SIGNAL: 3 KV / min at 100 mA
▪ TEST time: 1 second
▪ TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
▪ LEAKAGE CURRENT: At 0.5 mArms
2) Check the sound from the TV Set.
3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)
4.8. Ship-out mode check (In-stop)
- After final inspection, press In-Stop key of the Adjustment
remote control and check that the unit goes to Stand-by
mode.
6. Audio
No. Item Min Typ Max Unit
Audio practical max
1
Output, L/R (Distortion
= 10 % max Output)
Speaker
2
(6 Ω Impedance)
Measurement condition:
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms
10 12 W
8.10 10.8 Vrms
10 12 W
EQ Off
AVL Off
Clear Voice Off
EQ On
AVL On
Clear Voice On
Only for training and service purposes
- 21 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 22
7.
USB S/W Download(Service only)
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is
Older, it didn't work. But your downloaded version is
Newer, USB data is automatically detecting.(Download
Version High & Power only mode, Set is automatically
Download)
(3) Show the message "Copying files from memory".
(4) Updating is starting.
(5) Updating Completed, The TV will restart automatically.
8. Tool Option selection
▪ Method: Press Adj. key on the Adjustment remote control,
then select Tool option.
Model Tool 1 Tool 2 Tool 3 Tool 4 Tool 5 Tool 6 Tool 7 Tool 9
55UG870*-T* 34534 37400 58041 64794 59558 18845 37515 1
(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more new than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didn't have a
DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1) Push "IN-START" key in service remote control.
2) Select "Tool Option 1" and push "OK" key.
3) Punch in the number. (Each model has their number.)
Only for training and service purposes
- 22 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 23
1. LM15U
BLOCK DIAGRAM
DDR3 1866 X 32
X_TAL
DDR3 1866 X 32
(512MB X 2EA)
24MHz
4b’1010
Chip Config
M)
(512MB X 2EA)
(256MB X 2EA)
DDR3 1866 X 32
C
B
A
T/C Demod
(256Kb)
EEPROM(NVRA
I2C 1
P_TS
Analog Demod
(4GB)
eMMC
51P
Vx1
I2C 6
Mstar
B-CAS
USB
(NTP7514)
MAIN Audio AMP
I2S Out
I2C 4
LM15U
HDMI
SUB
ASSY
WIFI/BT Combo
USB_WIFI
IR / KEY
LOGO LIGHT(Ready
CVBS/YPbPr
CVBS/RGB
(RENESAS
Sub Micom
SPDIF OUT
X_TAL
32.768KHz
R5F100GEAFB)
I2C 3
(HW Port)
ETHERNET
P_TS
CI Slot
T2/C/S2 W/O AD
P_TS
TUNER
Air/
Cable
P_TS
IF (+/-)
DEMOD
(T2/C/A) TUNER
DVB-S
E
A
R
R
OCP
CVBS
SMARTCARD_I/F
(S2)
(S2)
B-CAS
(JAPAN)
LNB
OCP
HDMI3
USB3 (2.0)
USB2 (2.0)
USB1 (3.0)
HDMI2(ARC)
H/P
SCART
(IN/OUT)
HDMI1
AV/COMP
LAN
OPTIC
Only for training and service purposes
- 23 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 24
1-1. LM15U(+ URSA9)
(512MB X 2EA)
DDR3 1866 X 32
(512MB X 2EA)
DDR3 1866 X 32
DDR3 1866 X 32
C
B
A
z
4b’1010
Chip Config
51P/41P
M)
(256MB X 2EA)
(256Kb)
EEPROM(NVRA
I2C 1
Vx1
(4GB)
eMMC
9
URSA
Mstar
(1Gb X 4EA)
DDR3 1866 X 32
LM15U
MAIN Audio AMP
I2S Out
I2C 4
(NTP7515)
SUB
ASSY
WIFI/BT Combo
USB_WIFI
IR / KEY
LOGO LIGHT(Ready)
X_TAL
32.768KH
(RENESAS
Sub Micom
R5F100GEAFB)
I2C 3
(HW Port)
X_TAL
24MHz
P_TS
CI Slot
P_TS
T2/C/S2 W/O AD
Air/
P_TS
Analog Demod
T/C Demod
P_TS
IF (+/-)
TUNER
Cable
R
CVBS
(S2)
DEMOD
(S2)
(T2/C/A)
TUNER
DVB-S
E
A
R
B-CAS
SMARTCARD_I/F
B-CAS
(JAPAN)
LNB
USB
OCP
OCP
USB3 (2.0)
USB2 (2.0)
USB1 (3.0)
HDMI
HDMI1
HDMI3
HDMI2 (ARC)
H/P
RS232C
CVBS/YPbPr
CVBS/RGB
SCART
(IN/OUT)
AV/COMP
ETHERNET
SPDIF OUT
LAN
OPTIC
Only for training and service purposes
- 24 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 25
2. Internal
Only for training and service purposes
- 25 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 26
3. LM15U (+ URSA9) I2C
IC6900
LNB
TUNER
TU6704
IC102
NVRAM
TUNER
TU6704
MSTAR
LM15U
I2C_SDA2(HW)
33Ω
33Ω
1.8KΩ
I2C_SDA1(HW)
+3.3V_LNA_TU
I2C_SCL1(HW)
I2C_SDA6
+3.3V_NORMAL
I2C_SCL2(HW)
I2C_SCL3 (HW)
I2C_SDA3 (HW)
33Ω
1.8KΩ
I2C_SCL6
33Ω
I2C_SDA5(HW)
I2C_SCL5(HW)
I2C_SCL7 (HW)
I2C_SDA7 (HW)
33Ω
+3.3V_TU
I2C_SDA4
1.8KΩ
I2C_SCL4
1.8KΩ
+3.3V_NORMAL
100Ω
IC5600
Only for training and service purposes
1.8KΩ
+3.3V_NORMAL
IC3000
RENESAS
NTP7515(Main AMP)
+3.3V_NORMAL
MICOM
1.8KΩ
0Ω
P7201
+3.3V_NORMAL
LCD Panel
1.8KΩ
33Ω
IC2500
URSA9
+URSA model Only
- 26 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 27
4. URSA9
V x1
8 lane 41P
(4MB)
SPI FLASH
Data_Format_0
Data_Format_1
I2C_SCL6
I2C_SDA6
HTPDn_IN
LOCKn_IN
V x1
I2C_SCL7
(+12V)
PANEL_VCC
8 lane 51P
I2CS_SCL
I2C_SDA7
LOCKn
HTPDn
Data_Format_1
XO_URSA
X-Tal
(24Mhz)
I2CS_SDA
4 Pin
I2C_S Port
Jig Download
XIN_URSA
SPI_DI
3D_EN
Data_Format_2
L_DIM_EN
IRE
SPI_DO/CK/CS
URSA9
I2CS_SCL
UART1_TX
UART2_RX
I2CS_SDA
UART2_TX
B_DDR3_DQ[31:0]
BA[2:0]/CLK/CKE
B_DDR3_A[15:0]/
DDR3 SDRAM
DDR3 SDRAM
- 1Gbit (x16)
- 1866
A_DDR3_DQ[31:0]
BA[2:0]/CLK/CKE
A_DDR3_A[15:0]/
DDR3 SDRAM
DDR3 SDRAM
- 1Gbit (x16)
- 1866
URSA9_CONNECT
5 Pin
PANEL_VCC
T-CON POWER
Switch
URSA
DEBUG
UART
URSA9 PQ
UART2_TX
UART2_RX
+1.5V_U_DDR
(URSA DDR)
DC-DC Converter
(BD9D320EFJ _3A)
Power +12V
Only for training and service purposes
SDA2_+3.3V_DB
SCL2_+3.3V_DB
UART
URSA9 SYS
IRE
UART1_TX
+1.15V (URSA)
DC-DC Converter
(TPS53513RVER _8A)
- 27 -
Vx1 VIDEO 8Lane
Vx1 OSD 4Lane
LOCKAn_OSD / LOCKAN_Video
LM15U
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 28
5. LM15U (+ URSA9) Power
LDO DCDC
URSA9
LM15U
DDR_VTT
1.5V
IC402
DDR_VTT
DDR_VTT
1.5V
IC407
LM15U
DDR_VTT
DDR3*6EA
eMMC
1.8V eMMC
1A
IC2301
LM15U
LM15U
D.Demod_
Core 2A
Tuner
IC6500
URSA9
URSA
DDR_VTT
1.5V IC13100
URSA DDR_VTT
URSA9
DDR3*4EA
H/P AMP
WIFI
Combo
NTP7515
LNB option
NVRAM
USB1
CI SLOT
USB2/3
NTP7514
MICOM
IR Ass’y
3.3V
3.5V
Only for training and service purposes
LM15U
LNB
PANEL VCC
5V NORMAL / 6A
IC2305
IC201
AVDD
3.3V NORMAL / 5A IC2302
1.5V DDR / 3A
IC2303
1.1V Core / 10A
IC2501
1.1V CPU Core / 6A IC2300
12V
- 28 -
IC13408
1.15V URSA Core / 10A
1.5V_U_DDR / 3A
IC13403
24V
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 29
6. TUNER/CI
CI Slot
VCC
+5V_CI_ON
CI 5V
Power detect
+5V_CI_ON
PCM_5V_CTL
LNB
IC6900
CI_CD1
/CI_CD1
10K Ω
CAM_CD1_N
AE3[GPIO_PM4]
LM15U
CI_CD2
CI_MISTRT
CI_MIVA_ERR
/CI_CD2
OR
GATE
AR17[PCMCD]
AP13[TS2CLK]
AP12[TS2VALID]
CI_IOWR
CI_MCLKI
PCM_CE1
EB_BE_N1
EB_BE_NO
/PCM_CE1
AM13[TS2SYNC]
AM13[PCMCEN]
AT15[PCMIOWR]
CI_IORD
CI_ADDR[0-14]
EB_DATA[0-7]
PCM_RESET
PCM_RESET
REG
CAM_WAIT_N
CAM_REG_N
CAM_WAIT_N
CAM_IREQ_N
CI_OE
CI_WE
/EB_WE_N
/EB_OE_N
CAM_IREQ_N
TS_OUT_SYNC
TS_OUT_VAL
TS_OUT_CLK
CI_TS_SYNC
CI_TS_VAL
CI_TS_CLK
TS_OUT[0-7]
TPI_DATA[0-7]
33Ω
TS_IN[0-7]
CI_MDI[0-7]
33Ω
-
EB_DATA[0-7] CI_DATA[0-7]
EB_ADDR[0-14] CI_ADDR[0-14]
TPI_CLK
TPI_SOP
TPI_VAL
TPI_DATA[0-7]
FE_DEMOD1_TS_DATA [0_7]
AT13-AT18
AU10-AR19
AR15PCMIORD]
AU11[PCMRST]
AR14[PCMREG]
AT10[PCMWAIT]
AU20[PCMIRQA]
AN17[TS1CLK]
AT21[PCMOEN]
AR11[[PCMWEN]
AN16~AP19
[TPI_DATA[0-7]]
AM14~AM15
AN16[TS1SYNC]
AM17[TS1VALID]
[TPO_DATA[0-7]]
+2.5V_NORMAL
+3.3V_NORMAL
[+3.3V_LNA_TU] 1
TDJM-G305D
+3.3V_NORMAL
+1.1V_Demod_Core
[+3.3V_TUNER] 11
[+2.5V_DEMOD] 38
[3.3V_Demod_TU] 26
A8303SESTR-TB
10 [TONECTRL]
2 [LNB]
7 [SCL]
8 [SDA]
F5[SCK2]
F6 [SDA2]
F10[SCK5]
33Ω
33 Ω
33 Ω
1.8KΩ
LNB_TX
LNB_OUT
I2C_SCL2
I2C_SDA2
[LNB_TX] 29
[LNB_OUT] 31
[I2C_SCL2_TU] 27
[I2C_SDA2_TU] 30
[1,1V_D_Demod_Core] 28
I2C_SCL5
[I2C_SCL5_TU] 4
AN11[TS0CLK]
G10[SDA5]
I2C_SDA5
[I2C_SDA5_TU] 5
AP9(TS0SYNC]
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_ERROR
[FE_DEMOD1_TS_SYNC] 15
[FE_DEMOD1_1_TS_CLK] 14
[FE_DEMOD1_TS_ERROR_TU] 12
AN9[TS0VALID]
AP10~AM9
[TS0DATA[0-7]
A15 [GPIO159]
AP1 [VIFP]
AP2 [VIFM]
ADC_I_INP
ADC_I_INN
FILTER
AN2[SIFP]
AE5[CVBS0]
AP3[IF_AGC]
A12 [GPIO62]
7]
IF_P
/TU_RESET1
RF_SWITCH_CTL
IF_N
IF_AGC
TU_CVBS
TUNER_SIF
FE_DEMOD1_TS_DATA [0-
[IF_P] 6
[IF_N] 7
[TU_SIF_TU] 8
[IF_AGC_TU] 3
[RF_SWITCH_CTL] 2
[/TU_RESET1_TU] 25
[FE_DEMOD1_TS_VAL] 16
FE_DEMOD1_TS_DATA[0] 17
FE_DEMOD1_TS_DATA[1] 18
FE_DEMOD1_TS_DATA[2] 19
FE_DEMOD1_TS_DATA[3] 20
FE_DEMOD1_TS_DATA[4] 21
FE_DEMOD1_TS_DATA[5] 22
FE_DEMOD1_TS_DATA[6] 23
FE_DEMOD1_TS_DATA[7] 24
[TU_CVBS_TU] 9
Only for training and service purposes
- 29 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 30
7. VIDEO / AUDIO IN
LM15U
SoC
Side
Jack Side
[RIN1P]
[BIN1P]
[GIN1P]
COMP1_Y
COMP1_Pr
COMP1_Pb
[CVBS1]
[LINE_IN_0L]
COMP1/AV1/DVI_L_IN
COMP1/AV1/DVI_R_IN
[LINE_IN_0R]
[CVBS2]
SC_CVBS_IN
[RIN0P,GIN0P,BIN0P]
[VSYNC0,HSYNC0]
SC_FB/ID
SC_R/G/B
[LINE_IN_1L,LINE_IN_1R]
SC_L/R_IN
[CVBS0]
[CVBSOUT1]
[LINE_IN_0L,LINE_IN_0R]
DTV/MNT_L/R_OUT
DTV/MNT_V_OUT
[SIFP,VIFP/VIFM]
TU_CVBS
TUNER_SIF, IF_P/N
[TS0CLK,TS0SYNC,TS0VALID]
FE_DEMOD1/2_TS_ERROR,CLK,SYNC,VAL
DVB EU only
SC_FB/ID
COMP1_Pb
COMP1_Y
COMP1_Pr
COMP1/AV1/DVI_L_IN
AV1_CVBS_IN AV1_CVBS_IN
COMP1/AV1/DVI_R_IN
JK3802
SC_CVBS_IN
SCART
SC_R/G/B
SC_L/R_IN
DTV/MNT_L/R_OUT
DTV/MNT_V_OUT1
TUNER_SIF, IF_P/N_TU
TU_CVBS_TU
FE_DEMOD1/2_TS_ERROR,CLK,SYNC,VAL
JK4600
Tuner
Only for training and service purposes
- 30 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 31
8. AUDIO OUT
SPEAKER_L
SPEAKER_R
SCART
JK4600
DTV/MNT_L/R_OUT
LPF
SCART_MUTE
(TR)
Mute CTRL
IC6000
OP AMP
AZ4580MTR
SCART_L/Rout
[LINE_OUT_2L]
[LINE_OUT_2R]
DVB EU only
AUD_LRCK
4P WAFER
LPF
IC1200
AUD_SCK
AUD_LRCH
[I2S_OUT_SD]
[I2S_OUT_WS]
[I2S_OUT_BCK]
LPF
NTP7515
Audio AMP
I2C_SCL4
I2C_SDA4
AMP_RESET_N
[GPIO160]
[DDCDC_DA/GPIO47]
[DDCDC_CK/GPIO46]
AMP_MUTE
LM15U
IC3000
MICOM
HEAD PHONE
SIDE_HP_MUTE
HP_LOUT / HP_ROUT
[EARPHONE_OUT_L]
JK3403
LPF
[ EARPHONE_OUT_R]
COMP1/AV1/DVI_L_IN
COMP1/AV1/DVI_R_IN
JK38 02
Only for training and service purposes
[LINE_IN_0L]
[LINE_IN_0R]
SCART
[LINE_IN_1L]
[LINE_IN_1R]
SC_L_IN / SC_R_IN
DVB EU only
JK4600
[SIFP]
TUNER_SIF
TR BUF
Tuner
[SPDIF_OUT]
SPDIF_OUT
JK3401
- 31 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 32
9. HDMI
CEC_REMOTE
Q3001
HDMI_CEC_MICOM
HDMI1
HDMI& ARC
HDMI3
RENESAS
MICOM(IC3000)
32.768kHz
X-Tal(X3000)
DDC_SCL_1
DDC_SDA_1
TMDS Link 8bits
Only for training and service purposes
DDC_SCL_2
DDC_SDA_2
HDMI_ARC
TMDS Link 8bits
DDC_SCL_3
DDC_SDA_3
MHL_DET_LM15
TMDS Link 8bits
LM15U
* TMDS Link 8bits = TMDS DATA 6bits(DATA0,1,2)+ TMDS CLK 2bits
- 32 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 33
10. USB/ WIFI/ M-REMOTE/ UART
WIFI Combo
+5V_USB_1
USB3
USB_DP1
USB_DM1
6A
USB_CTL1
/USB_OCD1
USB2.0
DCDC
IC2305
+5V_USB_2
USB2
USB_DP2
USB_DM2
/USB_OCD2
USB_CTL2
+5V_USB_3
USB1
USB_DP3
USB_DM3
SSUSB_RXP/SSUSB_RXN
USB3.0
OCP
IC4500
USB_CTL3
/USB_OCD3
SSUSB_TXP/SSUSB_TXN
RS232C_Debug(4P wafer)
RENESAS MICOM(IC3000)
WIFI_DP
WIFI_DM
M_RFModule_RESET
SOC_TX
SOC_RX
[GPIO162]
[GPIO163]
[USB_DP]
[USB_DM]
Only for training and service purposes
[TX1]
[GPIO14]
[GPIO50]
[GPIO51]
[USB2_DP]
[USB2_DM]
[USB0_DM]
[USB0_DP]
[USB_SSTX]
[USB_SSRX]
[GPIO18]
[GPIO57]
[USB1_DP]
[USB1_DM]
[RX1]
LM15U
- 33 -
LGE Internal Use Only Copyright © LG Electronics. Inc. All rights reserved.
Page 34
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
200
LV1
530
LV2
800
540
521
522
400
523
570
820
121
A22
Only for training and service purposes
A9
Stand Base
+
Stand Neck
A10
Stand+Head
120
AG1
AW1
300
- 34 -
500
910
501
900
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 35
NVRAM
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Atmel_NVRAM
IC102
AT24C256C-SSHL-T
EAN61133501
A0
1
A1
2
A2
A0’h
3
GND
4
SPI_CK_SOC
SPI_DI_SOC
SPI_DO_SOC
/SPI_CS
FRC_FLASH_SEL
FRC_FLASH_WP
TXOSD_3P
TXOSD_3N
TXOSD_2P
TXOSD_2N
TXOSD_1P
TXOSD_1N
TXOSD_0P
TXOSD_0N
COMPENSATION_DONE
FAN_ON
LM15U HW Option
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10
BIT11
BIT12
BIT13
20140701 version
BIT(0/1)
BIT4
BIT5
BIT6
TW/COL
00
CN/HK
01
10
11
Display
Resolution
Model
VCC
8
WP
7
SCL
6
SDA
5
URSA9_CONNECT
L/D_VSYNC_SOC
L/D_CLK_SOC
URSA_RESET_SoC
DVB
EU
AJJA
C103
0.1uF
LOCKAn_OSD
L/D_DI_SOC
BIT0_1
R104 10K
BIT0_0
R103 10K
ATSC
US
KR
BR/PH
Sri Lanka
Low
FHD
LM15U only
+3.3V_NORMAL
Write Protection
- Low : Normal Operation
- High : Write Protection
AR100
33
1
A1
2
A2
3
GND
4
VCC
8
WP
7
SCL
6
SDA
5
Rohm_NVRAM
I2C_SCL1
I2C_SDA1
CHIP CONFIG
IC102-*1
BR24G256FJ-3
A0
LM15U+URSA9
CHIP_CONFIG[3:0]
{LED1, SPI_DI,LED0, PWM_PM}
Value Mode Description
4’b1000 SB51_ExtSPI 51 boot from SPI
4’b1001 HEMCU_ExtSPI ARM boot from SPI
4’b1010 HEMCU_ROM_EMMC ARM boot from ROM; outer storage is eMMC
4’b1011 HEMCU_ROM_NAND ARM boot from ROM; outer storage is NAND
4’b1100 DBUS for test only
4’b0000 SB51_ExtSPI + Authentication 51 boot from SPI with ARM authentication
4’b0001 SB51_ExtSPI + Authentication HEMCU_ExtSPI + Authentication
4’b0011 HEMCU_ROM_NAND + Authentication ARM boot from ROM with authentication;
OLED LM15U_ONLY
DATA_FORMAT_1_SOC
DATA_FORMAT_0_SOC
+3.3V_NORMAL
10K
BIT1_1
R108
10K
BIT1_0
R107
BIT2_1
R110 10K
BIT2_0
R109 10K
JP
JP
High
OLED LCD
UHD
LM15U+URSA
BIT3_1
R112 10K
BIT3_0
R111 10K
BIT4_1
R116 10K
BIT4_0
R115 10K
R118 10K
OPT
R117 10K
BIT(7/8)
00
01
10
11
BIT6_1
R120 10K
BIT6_0
R119 10K
BIT7_1
R122 10K
BIT7_0
R121 10K
B/E(FRC)
URSA9
URSA11-P
URSA11
NONE
BIT8_1
R124 10K
R181 10K
NON_HDMI_EXT_EDID
BIT8_0
R123 10K
R159 10K
HDMI_EXT_EDID
OPT
R183 10K
R182 10K
+3.3V_NORMAL
OPT
OPT
R157 4.7K
R161 4.7K
R163 4.7K
R165 4.7K
OPT
OPT
R158 4.7K
R164 4.7K
R162 4.7K
R166 4.7K
+3.3V_NORMAL
OPT
R155
FRC_FLASH_SEL
OPT
OPT
R185 10K
R156 10K
R188 10K
OPT
R184 10K
R186 10K
R189 10K
EU/CIS
00
T2/C/S2 PIP
01
T2/C/S2
T/C
10
11
4.7K
FRC_FLASH_WP
AJJA
T2/C PIP
T2/C/S2
T2
LED1
SPI_DI_SOC
LED0
PWM_PM
M_RFModule_RESET
FRC_FLASH_SEL
R167
0
+3.3V_NORMAL
R126
10K
OPT
R179
10K
U_SPI_WP_f_SoC
WOL_WAKE_UP
TW/COL
T2/C PIP
T2/C
T/C
T ATSC
WOL_WAKE_UP
CN/HK BIT(2/3)
Default
URSA_RESET_SoC
COMPENSATION_DONE
AVDD_3P3
ATSC NIM+T2
ATSC+T2
ATSC PIP
PWM_DIM
PWM_DIM2
FAN_ON
AMP_RESET_N
PWM_PM
/USB_OCD2
USB_CTL2
SPI_CK_SOC
SPI_DI_SOC
SPI_DO_SOC
/SPI_CS
DDCA_CK
DDCA_DA
SOC_TX
SOC_RX
/TU_RESET2
I2C_SCL6
I2C_SDA6
DDTS_TX
DDTS_RX
/TU_RESET1
BIT0
BIT1
BIT2
BIT3
BIT4
BIT12
BIT13
I2C_SCL3
I2C_SDA3
I2C_SCL1
I2C_SDA1
CPU_VID0
CORE_VID0
LED0
R131
10K
LED1
KR
R168
WOL_WAKE_UP
North.AM
A16
PWM0/GPIO157
C15
PWM1/GPIO158
A15
PWM2/GPIO159
B15
PWM3/GPIO160
C14
PWM4/GPIO161
E4
PWM_PM/GPIO10
H6
SAR0/GPIO50
J6
SAR1/GPIO51
G5
SAR2/GPIO52
J5
SAR3/GPIO53
D1
SAR5
D2
SPI_CK/GPIO1
D3
SPI_DI/GPIO2
E2
SPI_DO/GPIO3
F1
R187 0
E3
F2
N5
P5
C9
A10
E9
F9
F10
G10
D9
M7
P6
N6
A12
A13
C12
B12
C11
B10
C10
B11
F6
F5
K6
L7
C16
B16
D5
D4
H4
H5
L5
BR
ISDB PIP Default
ISDB EXT
ISDB INT
SPI_CZ0/GPIO0
SPI_CZ1/GPIO_PM6/GPIO19
SPI_CZ2/GPIO_PM10/GPIO23
DDCA_CK/UART0_RX/GPIO11
DDCA_DA/UART0_TX/GPIO12
GPIO67/TX1
GPIO68/RX1
GPIO69/TX2
GPIO70/RX2
GPIO71/TX3
GPIO72/RX3
GPIO76/TX4
GPIO77/RX4
GPIO94/TX5
GPIO95/RX5
GPIO62
GPIO63
GPIO64
GPIO65
GPIO66
GPIO73
GPIO74
GPIO75
GPIO81/TX2
GPIO82/RX2
GPIO88/SCK0
GPIO89/SDA0
DDCR_CK/GPIO59
DDCR_DA/GPIO58
VID0/GPIO55
VID1/GPIO56
LED0/GPIO32
LED1/GPIO33
WOL/GPIO57
Default
0
OPT
IC100
LGE5331(LM15U)
JP
LVSYNC/VBY0M
LHSYNC/VBY0P
A0M/VBY_OSD_0M
A0P/VBY_OSD_0P
A1M/VBY_OSD_1M
A1P/VBY_OSD_1P
A2M/VBY_OSD_2M
A2P/VBY_OSD_2P
ACKM/VBY_OSD_3M
ACKP/VBY_OSD_3P
A4M/OSD_LOCKN
A4P/OSD_HTPDN
GPIO_PM0/GPIO13
GPIO_PM2/GPIO15
GPIO_PM3/GPIO16
GPIO_PM4/GPIO17
GPIO_PM7/GPIO20
GPIO_PM8/GPIO21
GPIO_PM9/GPIO22
GPIO_PM13/GPIO26
GPIO_PM17/GPIO30
GPIO_PM18/GPIO31
GPIO_PM1/GPIO14
GPIO_PM5/GPIO18
GPIO_PM11/GPIO24
GPIO_PM12/GPIO25
AV_LNK/GPIO9
GPIO112/SPI1_DI
GPIO111/SPI1_CK
GPIO114/SPI2_DI
GPIO113/SPI2_CK
GPIO110/VSYNC_LIKE
GPIO115/DIM0
GPIO116/DIM1
GPIO117/DIM2
GPIO118/DIM3
EXTERNAL EDID
BIT9
FOR HDMI2.0
BIT10
BIT11
BIT12
Reserved
BIT13
LDE/VBY1M
LCK/VBY1P
B0M/VBY2M
B0P/VBY2P
B1M/VBY3M
B1P/VBY3P
B2M/VBY4M
B2P/VBY4P
BCKM/VBY5M
BCKP/VBY5P
B3M/VBY6M
B3P/VBY6P
B4M/VBY7M
B4M/VBY7P
A3M/LOCKN
A3P/HTPDN
TEST
Support
Division
CI+
VID
V-BY-ONE
AB36
AB35
AC36
AC37
AD37
AD36
AD35
AE36
AF36
AF37
AF35
AG37
AG35
AH36
AH35
AJ36
AJ35
AK37
AK36
AK35
AL35
AM36
AM37
AM35
AJ33
AJ34
AJ32
AJ31
R172
10K
AD5
AD6
AE2
AE3
AF4
AG5
AG6
AH6
AJ5
AJ4
K5
L6
M5
M6
L4
J15
A18
B18
C17
B17
C18
D18
E18
F18
E17
Low
EXTERNAL
NON_Division
VID Enable VID Disable
TXVBY1_0N
TXVBY1_0P
TXVBY1_1N
TXVBY1_1P
TXVBY1_2N
TXVBY1_2P
TXVBY1_3N
TXVBY1_3P
TXVBY1_4N
TXVBY1_4P
TXVBY1_5N
TXVBY1_5P
TXVBY1_6N
TXVBY1_6P
TXVBY1_7N
TXVBY1_7P
TXOSD_0N
TXOSD_0P
TXOSD_1N
TXOSD_1P
TXOSD_2N
TXOSD_2P
TXOSD_3N
TXOSD_3P
R173
10K
HTPDAn_OSD_Pull_down
HTPDAn_Video_Pull_down
HTPDAn_Video
HTPDAn_OSD
OPT
COMP1_DET
R180 0
3D_EN
AV2_CVBS_DET
PCM_5V_CTL
5V_DET_HDMI_1
5V_DET_HDMI_2
5V_DET_HDMI_3
BIT7
BIT8
/USB_OCD3
USB_CTL3
DATA_FORMAT_0_SOC
DATA_FORMAT_1_SOC
BIT5
BIT6
L/D_DI_SOC
L/D_CLK_SOC
L/D_VSYNC_SOC
BIT11
AV1_CVBS_DET
HP_DET
SC_DET
High
NON_EXTERNAL
4_Division
New CI Path Old CI Path
EB_DATA[0-7]
EB_ADDR[0-14]
C
NXP_VBY1_LOCK_LED_TR
Q100-*1
B
MMBT3906(NXP)
E
LOCKAn_Video
HTPDAn_Video
LOCKAn_OSD
HTPDAn_OSD
+3.3V_NORMAL
LD1 00
VBY1_LOCK_LED
3.3K
R195
19- 21/R 6C-F R1S1 L/3T
VBY1_LOCK_LED
E
Q100
2N3906S-RTK
B
KEC_VBY1_LOCK_LED_TR
C
EMMC_DATA[0-7]
R175
22
R176
1K
+3.3V_NORMAL
URSA9_CONNECT
CAM_IREQ_N
CAM_CD1_N
PCM_RESET
CAM_REG_N
CAM_WAIT_N
TCON_I2C_EN
R177
10K
OPT
R178
10K
OPT
L_DIM_EN
BIT9
BIT10
EB_OE_N
EB_BE_N1
/PCM_CE1
EB_WE_N
EB_BE_N0
EMMC_CMD
EMMC_CLK
EMMC_RST
EMMC_STRB
RF_SWITCH_CTL
EB_DATA[0]
EB_DATA[1]
EB_DATA[2]
EB_DATA[3]
EB_DATA[4]
EB_DATA[5]
EB_DATA[6]
EB_DATA[7]
EB_ADDR[0]
EB_ADDR[1]
EB_ADDR[2]
EB_ADDR[3]
EB_ADDR[4]
EB_ADDR[5]
EB_ADDR[6]
EB_ADDR[7]
EB_ADDR[8]
EB_ADDR[9]
EB_ADDR[10]
EB_ADDR[11]
EB_ADDR[12]
EB_ADDR[13]
EB_ADDR[14]
EMMC_DATA[6]
EMMC_DATA[7]
EMMC_DATA[2]
EMMC_DATA[1]
EMMC_DATA[0]
EMMC_DATA[3]
EMMC_DATA[4]
EMMC_DATA[5]
R174 0
OPT
R191 0
AT13
PCMDATA[0]/GPIO152
AT9
PCMDATA[1]/GPIO153
AR13
PCMDATA[2]/GPIO154
AT17
PCMDATA[3]/GPIO124
AR16
PCMDATA[4]/GPIO125
AT16
PCMDATA[5]/GPIO126
AR21
PCMDATA[6]/GPIO127
AT18
PCMDATA[7]/GPIO128
AU10
PCMADR[0]/GPIO151
AT14
PCMADR[1]/GPIO150
AR10
PCMADR[2]/GPIO148
AT19
PCMADR[3]/GPIO147
AR18
PCMADR[4]/GPIO146
AU19
PCMADR[5]/GPIO144
AT11
PCMADR[6]/GPIO143
AT12
PCMADR[7]/GPIO142
AT20
PCMADR[8]/GPIO136
AU14
PCMADR[9]/GPIO134
AU16
PCMADR[10]/GPIO130
AR20
PCMADR[11]/GPIO132
AR12
PCMADR[12]/GPIO141
AU13
PCMADR[13]/GPIO137
AR19
PCMADR[14]/GPIO138
AU20
PCMIRQA/GPIO140
AT21
PCMOEN/GPIO131
AR15
PCMIORD/GPIO133
AU17
PCMCEN/GPIO129
AR11
PCMWEN/GPIO139
AR17
PCMCD/GPIO156
AU11
PCMRST/GPIO155
AR14
PCMREG/GPIO149
AT15
PCMIOWR/GPIO135
AT10
PCMWAIT/GPIO145
D7
NAND_ALE/GPIO194
F7
NAND_WPZ/GPIO193
G7
NAND_CEZ/EMMC_CMD/GPIO188
E6
NAND_CLE/GPIO190
F8
NAND_REZ/EMMC_CLK/GPIO191
E7
NAND_WEZ/GPIO192
E8
NAND_RBZ/EMMC_RSTN/GPIO195
D6
NAND_CEZ1/GPIO189
D8
NAND_DQS/GPIO196
A6
NAND_AD0/EMMC_D6/GPIO226
C6
NAND_AD1/EMMC_D7/GPIO225
A7
NAND_AD2/EMMC_D2/GPIO224
B7
NAND_AD3/EMMC_D1/GPIO223
C7
NAND_AD4/EMMC_D0/GPIO199
B8
NAND_AD5/EMMC_D3/GPIO198
C8
NAND_AD6/EMMC_D4/GPIO197
B9
NAND_AD7/EMMC_D5/GPIO227
AM4
PCM2_CD/GPIO123
AP4
PCM2_CE/GPIO119
AL5
PCM2_IRQA/GPIO120
AN4
PCM2_WAIT/GPIO121
AL4
PCM2_RESET/GPIO122
IC100
LGE5331(LM15U)
TS2DATA_[7]/VSENSE/GPIO210
TS1DATA_[0]/GPIO187
TS1DATA_[1]/GPIO186
TS1DATA_[2]/GPIO185
TS1DATA_[3]/GPIO184
TS1DATA_[4]/GPIO183
TS1DATA_[5]/GPIO182
TS1DATA_[6]/GPIO181
TS1DATA_[7]/GPIO180
TS1CLK/GPIO177
TS1VALID/GPIO179
TS1SYNC/GPIO178
TS0DATA_[0]/GPIO166
TS0DATA_[1]/GPIO167
TS0DATA_[2]/GPIO168
TS0DATA_[3]/GPIO169
TS0DATA_[4]/GPIO170
TS0DATA_[5]/GPIO171
TS0DATA_[6]/GPIO172
TS0DATA_[7]/GPIO173
TS0CLK/GPIO176
TS0VALID/GPIO174
TS0SYNC/GPIO175
TS2DATA_[0]/GPIO200
TS2DATA_[1]/GPIO204
TS2DATA_[2]/GPIO205
TS2DATA_[3]/GPIO206
TS2DATA_[4]/GPIO207
TS2DATA_[5]/GPIO208
TS2DATA_[6]/GPIO209
TS2CLK/GPIO203
TS2VALID/GPIO201
TS2SYNC/GPIO202
TS3DATA_[0]/GPIO211
TS3DATA_[1]/GPIO212
TS3DATA_[2]/GPIO213
TS3DATA_[3]/GPIO214
TS3DATA_[4]/GPIO215
TS3DATA_[5]/GPIO216
TS3DATA_[6]/GPIO217
TS3DATA_[7]/GPIO218
TS3CLK/GPIO221
TS3VALID/GPIO219
TS3SYNC/GPIO220
VIFP
VIFM
SIFP
SIFM
IF_AGC
TGPIO0/GPIO162
TGPIO1/GPIO163
TGPIO2/GPIO164
TGPIO3/GPIO165
AL6
AM6
AP8
AN7
AM5
AM7
AN5
AN6
AL7
AP5
AP6
AP10
AN10
AM8
AM10
AM11
AM12
AN8
AM9
AN11
AN9
AP9
AM14
AP15
AN12
AN15
AN14
AM16
AN13
AM15
AP13
AP12
AM13
AM18
AP16
AM19
AN18
AP19
AN20
AP18
AN19
AN17
AM17
AN16
AP1
AP2
AN2
AN1
AP3
AR2
AM2
AK5
AK6
/USB_OCD1
USB_CTL1
I2C_SCL7
I2C_SDA7
TPO_DATA[0]
TPO_DATA[1]
TPO_DATA[2]
TPO_DATA[3]
TPO_DATA[4]
TPO_DATA[5]
TPO_DATA[6]
TPO_DATA[7]
TPO_CLK
TPO_VAL
TPO_SOP
TPI_CLK
TPI_VAL
TPI_SOP
FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_SYNC
FE_DEMOD3_TS_DATA
FE_DEMOD3_TS_CLK
FE_DEMOD3_TS_VAL
FE_DEMOD3_TS_SYNC
TPI_DATA[0-7]
TPI_DATA[0]
TPI_DATA[1]
TPI_DATA[2]
TPI_DATA[3]
TPI_DATA[4]
TPI_DATA[5]
TPI_DATA[6]
TPI_DATA[7]
TPI_DATA[0-7]
Close to MSTAR
R140 100 C118 0.1uF
R141 100
C120 0.1uF
C121 0.1uF
ANALOG SIF
Close to MSTAR
R142
10K
TPO_DATA[0-7]
FE_DEMOD1_TS_DATA[0-7]
C119 0.1uF
R144 47
R145 47
PZ1608U121-2R0TF
R143
0
C124
1000pF
OPT
OPT
C122
100pF
R146
300
OPT
+3.3V_NORMAL
L100
C125
0.1uF
C127
0.047uF
25V
OPT
C123
33pF
DTV_IF
IF_P
IF_N
OPT
C126
33pF
TU_SIF
IF_AGC
Mstart Debug
MSTAR_DEBUG_OLD
MSTAR_DEBUG_NEW
P101
12507WS-04L
1
2
DDCA_CK
3
DDCA_DA
4
5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
P103
12505WS-04A00
1
2
3
4
5
RS232C_Debug
UART_4PIN_WAFER
P102
12507WS-04L
5
+3.5V_ST
1
2
3
4
OPT
R100 10K
R147
1.8K
R148
1.8K
+3.3V_LNA_TU
+3.3V_NORMAL
R128
1.8K
R129
1.8K
R127
1.8K
I2C_SDA_MICOM
I2C_SCL_MICOM
R130
1.8K
+3.3V_TU
SOC_RX
OPT
R101 10K
SOC_TX
I2C PULL UP
R133
1.8K
R134
1.8K
R135
1.8K
AR101
33
R136
1.8K
R106
1.8K
R125
1.8K
I2C_SDA3
I2C_SCL3
R132
1.8K
R139
1.8K
I2C_SDA7
I2C_SCL7
I2C_SDA6
I2C_SCL6
I2C_SDA1
I2C_SCL1
I2C_SDA3
I2C_SCL3
I2C_SDA4
I2C_SCL4
I2C_SDA5
I2C_SCL5
I2C_SDA2
I2C_SCL2
I2C for URSA9 (URSA9 Only)
I2C for LCD Module
I2C for NAVRAM
I2C for Micom
I2C for Main Amp / Woofer AMP
I2C for tuner
I2C for tuner&LNB
GPIO PULL UP
+3.3V_NORMAL
OPT
R171 10K
R149 10K
R153 10K
R151 10K
R152 10K
R150 10K
OPT
R160 10K
R169 10K
R154 10K
R170 10K
/TU_RESET1
RF_SWITCH_CTL
AMP_RESET_N
TCON_I2C_EN
/USB_OCD1
USB_CTL1
/USB_OCD2
USB_CTL2
M_RFModule_RESET
PCM_5V_CTL
DDTS_Debug
DDTS_Debug
P100
12507WS-04L
5
+3.3V_NORMAL
1
2
3
4
OPT
R102 10K
DDTS_RX
OPT
R105 10K
DDTS_TX
2014-12-17 LM15U
MAIN1_SYSTEM
1
Page 36
DVDD_NODIE
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C200
1uF
25V
VDDC15_M0
DVDD_DDR11
+1.1V_VDDC_CPU
+1.1V_VDDC
AVDDL_MOD11
DVDD_DDR11
AF18
AF19
AF20
AG18
AG19
AG20
AG21
AG22
AH18
AH19
AH20
AH21
AH22
AF14
AF15
AA21
AA27
AA28
AA29
AB21
AB22
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AC21
AC22
AC23
AC24
AC25
AC26
AC27
AC28
AC29
AC30
AD27
AD28
AD29
AD30
AF24
AF25
L10
L11
L12
L13
L14
M10
M11
M12
M13
M14
N10
N11
N12
N13
V12
V13
V14
W12
W13
W14
Y12
Y13
Y14
W23
Y23
W24
Y24
Y25
Y26
N14
R22
R24
P22
T24
LGE5331(LM15U)
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDC_34
VDDC_35
VDDC_36
AVDDL_PREDRV_1
AVDDL_PREDRV_2
AVDDL_MOD_1
AVDDL_MOD_2
AVDD15_MOD_1
AVDD15_MOD_2
AVDDL_USB3_1
AVDDL_USB3_2
VDDC_CPU_1
VDDC_CPU_2
VDDC_CPU_3
VDDC_CPU_4
VDDC_CPU_5
VDDC_CPU_6
VDDC_CPU_7
VDDC_CPU_8
VDDC_CPU_9
VDDC_CPU_10
VDDC_CPU_11
VDDC_CPU_12
VDDC_CPU_13
VDDC_CPU_14
VDDC_CPU_15
VDDC_CPU_16
VDDC_CPU_17
VDDC_CPU_18
VDDC_CPU_19
VDDC_CPU_20
VDDC_CPU_21
VDDC_CPU_22
VDDC_CPU_23
VDDC_CPU_24
VDDC_CPU_25
VDDC_CPU_26
VDDC_CPU_27
DVDD_NODIE
DVDD_DDR_1
DVDD_DDR_2
DVDD_DDR_C
DVDD_DDR_RX_A
DVDD_DDR_RX_B
DVDD_DDR_RX_C
IC100
AVDD_NODIE
AVDDL_MHL3_1
AVDDL_MHL3_2
AVDD3P3_MHL3_1
AVDD3P3_MHL3_2
AVDD3P3_ETH
AVDD3P3_DADC_1
AVDD3P3_DADC_2
AVDD3P3_ADC_1
AVDD3P3_ADC_2
AVDD3P3_USB_1
AVDD3P3_USB_2
AVDD3P3_USB3_1
AVDD3P3_USB3_2
AVDD_AU33
AVDD_EAR33
AVDD3P3_DMPLL
VDDP_1
VDDP_2
AVDD_MOD_1
AVDD_MOD_2
AVDD_LPLL_1
AVDD_LPLL_2
AVDD_PLL_A
AVDD_PLL_B
AVDD_PLL_C
VDDP_3318_A_CAP
VDDP_3318_C_CAP
VDDP_3318_A
VDDP_3318_C
AVDD_DDR_A_CMD_1
AVDD_DDR_A_CMD_2
AVDD_DDR_A_MCK
AVDD_DDR_A_DAT_1
AVDD_DDR_A_DAT_2
AVDD_DDR_A_DAT_3
AVDD_DDR_A_DAT_4
AVDD_DDR_B_CMD_1
AVDD_DDR_B_CMD_2
AVDD_DDR_B_MCK
AVDD_DDR_B_DAT_1
AVDD_DDR_B_DAT_3
AVDD_DDR_B_DAT_4
AVDD_DDR_B_DAT_2
AVDD_DDR_C_CMD_1
AVDD_DDR_C_CMD_2
AVDD_DDR_C_MCK
AVDD_DDR_C_DAT_1
AVDD_DDR_C_DAT_2
AVDD_DDR_C_DAT_3
AVDD_DDR_C_DAT_4
AVDD_DDR_LDO_A
AVDD_DDR_LDO_B
AVDD_DDR_LDO_C
AVDD_HDMI_5V_PA
AVDD_HDMI_5V_PC
GND_EFUSE
AVDD_DDR_VBP_A_1
AVDD_DDR_VBP_A_2
AVDD_DDR_VBN_A_1
AVDD_DDR_VBN_A_2
AVDD_DDR_VBP_B_1
AVDD_DDR_VBP_B_2
AVDD_DDR_VBN_B_1
AVDD_DDR_VBN_B_2
AVDD_DDR_VBP_C_1
AVDD_DDR_VBP_C_2
AVDD_DDR_VBN_C_1
AVDD_DDR_VBN_C_2
V7
T13
T14
L8
M8
W7
AD7
AD8
Y7
Y8
AL10
AL11
AH14
AH15
AH7
AG7
AL12
AK15
AL15
W26
Y27
Y28
Y29
U18
U19
AL18
L17
L15
G8
H7
M20
M21
N21
M22
N22
N23
N24
N25
N26
P25
R25
T25
U25
R26
AE25
AE26
AF26
AE22
AE23
AE24
AF22
N20
P24
AD25
U7
P7
P8
L20
L21
M24
M25
U27
V27
U26
V26
AD21
AD22
AD23
AD24
AVDDL_HDMI11
AVDD33
VDDC15_M0
VDDC15_M1
AVDD_PLL33
AVDD5V_MHL
C227 0.47uF
C229 0.47uF
C230 0.47uF
C231 0.47uF
C234 0.47uF
C240 0.47uF
AVDD33
AVDD_AU33
VDDP_NAND
VDDC15_M1
VDDC15_M0
VDDC15_M0
VDDC15_M1
AVDD_3P3
4.7uF
C219
C216
0.1uF
C220
4.7uF
C221
0.1uF
WOL POWER ENABLE CONTROL
+3.5V_ST
PZ1608U121-2R0TF
L204
+3.3V_NORMAL
C239
0.1uF
WOL_CTL
+3.5V_WOL
R201
1K
OPT
R202 0
1st layer
C205
0.1uF
16V
IC200
AP2151WG-7
IN
5
EN
4
0.1uF
C250
Close to chip side
IC201
AP2121N-3.3TRE1
VIN
3
1
GND
1
2
3
AVDD_3P3
C249
VOUT
2
OUT
GND
FLG
4th layer
0.1uF
AVDD_3P3
C206
1uF
10V
+3.5V_WOL
5V_HDMI_3
R203
10K
OPT
R200
10
AVDD5V_MHL
+1.1V_Bypass Cap(CLOSE TO CHIP SIDE)
+1.1V_VDDC
L226
PZ1608U121-2R0TF
2A
L202
PZ1608U121-2R0TF
2A
AVDDL_MOD11
C264
10uF
10V
+1.1V_VDDC
+1.1V_VDDC_CPU
C228
0.1uF
10uF
10V
C232
C235
C261
0.1uF
10uF
10V
C277
C275
1st layer
C263
0.1uF
10uF
10V
C276
C278
Close to chip side
0.1uF
0.1uF
0.1uF
+3.3V_Bypass Cap
+3.3V_NORMAL
C222
10uF
10V
C285
C271
10uF
10V
0.1uF
C265
DVDD_DDR11
0.1uF
C306
C310
0.1uF
PZ1608U121-2R0TF
L215
2A
0.1uF
OPT
Close to chip side
Close to chip side
AVDD_PLL33
C256
10uF
10V
0.1uF
C324
4th layer
OPT
4th layer
10uF
10V
Close to chip side
0.1uF
C320
C323
C322
10uF
10V
1st layer
0.1uF
0.1uF
C274
C286
4th layer
L205
PZ1608U121-2R0TF
2A
AVDDL_HDMI11
C210
4th layer
0.47uF
C311
C241
0.47uF
0.47uF
+1.5V_DDR
PZ1608U121-2R0TF
PZ1608U121-2R0TF
PZ1608U121-2R0TF
+1.5V_Bypass Cap
VDDC15_M0
L227
L200
C207
2A
10uF
10V
C209 0.1uF
VDDC15_M1
L201
C208
2A
10uF
10V
C218 0.1uF
1st layer
C201
10uF
10V
Close to chip side
1st layer
C202
10uF
10V
Close to chip side
C203 0.1uF C224 0.1uF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
11/05/31
C225 0.1uF
C204 0.1uF
C226 0.1uF
Close to chip side
C287 0.1uF
Close to chip side
4th layer
OPT
C314
0.47uF
4th layer
OPT
C315
0.47uF
OPT
C223
C316
10uF
10uF
10V
10V
LM15U_DDR_EMI
C317
C212
10uF
20pF
10V
50V
LM15U_DDR_EMI
LM15U_DDR_EMI
C213
20pF
50V
C214
20pF
50V
+3.3V_NORMAL
+1.8V
GND JIG POINT
OPT
L222
PZ1608U121-2R0TF
2A
L223
PZ1608U121-2R0TF
2A
JP202
JP204
JP203
JP205
VDDP_NAND
C302
10uF
10V
C304
0.1uF
L203
PZ1608U121-2R0TF
2A
L212
PZ1608U121-2R0TF
2A
LM15U POWER
Close to chip side
AVDD33
C217
10uF
10V
C238 0.1uF
C244 0.1uF
AVDD_AU33
0.1uF
C236
10uF
10V
C243
LM15U
0.1uF
C252
Close to chip side
4th layer
0.1uF
C251
C211
Close to chip side
4th layer
0.1uF
OPT
C253
Close to chip side
0.47uF
2014-08-26
02
Page 37
IC100
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE5331(LM15U)
M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8
M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15
M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2
M0_DDR_RASN
M0_DDR_CASN
M0_DDR_WEN
M0_DDR_ODT
M0_DDR_CKE
M0_DDR_RESET_N_1
M0_D_CLK
M0_D_CLKN
M0_DDR_CS1
M0_DDR_CS2
M0_DDR_DQ0
M0_DDR_DQ1
M0_DDR_DQ2
M0_DDR_DQ3
M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7
M0_DDR_DM0
M0_DDR_DQS0
M0_DDR_DQS_N0
M0_DDR_DQ8
M0_DDR_DQ9
M0_DDR_DQ10
M0_DDR_DQ11
M0_DDR_DQ12
M0_DDR_DQ13
M0_DDR_DQ14
M0_DDR_DQ15
M0_DDR_DM1
M0_DDR_DQS1
M0_DDR_DQS_N1
M0_DDR_DQ16
M0_DDR_DQ17
M0_DDR_DQ18
M0_DDR_DQ19
M0_DDR_DQ20
M0_DDR_DQ21
M0_DDR_DQ22
M0_DDR_DQ23
M0_DDR_DM2
M0_DDR_DQS2
M0_DDR_DQS_N2
M0_DDR_DQ24
M0_DDR_DQ25
M0_DDR_DQ26
M0_DDR_DQ27
M0_DDR_DQ28
M0_DDR_DQ29
M0_DDR_DQ30
M0_DDR_DQ31
M0_DDR_DM3
M0_DDR_DQS3
M0_DDR_DQS_N3
M0_DDR_RESET_N_1
F21
A_A0
C21
A_A1
E21
A_A2
F22
A_A3
B22
A_A4
E22
A_A5
A21
A_A6
D21
A_A7
C20
A_A8
E20
A_A9
B23
A_A10
B21
A_A11
D24
A_A12
F20
A_A13
B20
A_A14
E24
A_A15
E23
A_BA0
C22
A_BA1
F23
A_BA2
G26
A_RASZ
F25
A_CASZ
E25
A_WEZ
F24
A_ODT
C23
A_CKE
F19
A_RST
A24
A_MCLK
B24
A_MCLKZ
E19
A_CSB1
D19
A_CSB2
C27
A_DQ[0]
B26
A_DQ[1]
B28
A_DQ[2]
C25
A_DQ[3]
B29
A_DQ[4]
C24
A_DQ[5]
C28
A_DQ[6]
B25
A_DQ[7]
C26
A_DQM[0]
A27
A_DQS[0]
B27
A_DQSB[0]
D27
A_DQ[8]/DQU0
D30
A_DQ[9]/DQU1
E26
A_DQ[10]/DQU2
D31
A_DQ[11]/DQU3
F27
A_DQ[12]/DQU4
E30
A_DQ[13]/DQU5
D26
A_DQ[14]/DQU6
E29
A_DQ[15]/DQU7
E28
A_DQM[1]
D28
A_DQS[1]
E27
A_DQSB[1]
C32
A_DQ[16]/DQL0
C30
A_DQ[17]/DQL1
B33
A_DQ[18]/DQL2
A30
A_DQ[19]/DQL3
C33
A_DQ[20]/DQL4
C29
A_DQ[21]/DQL5
A33
A_DQ[22]/DQL6
B30
A_DQ[23]/DQL7
B31
A_DQM[2]
B32
A_DQS[2]
C31
A_DQSB[2]
E33
A_DQ[24]/DQU0
C35
A_DQ[25]/DQU1
E31
A_DQ[26]/DQU2
D35
A_DQ[27]/DQU3
D33
A_DQ[28]/DQU4
D34
A_DQ[29]/DQU5
E32
A_DQ[30]/DQU6
C34
A_DQ[31]/DQU7
B35
A_DQM[3]
A35
A_DQS[3]
B34
A_DQSB[3]
OPT
R440 0
M0_DDR_RESET_N
C
R434
NXP_DDR_RES0_TR
1K
Q400
B
MMBT3904(NXP)
M1_DDR_RESET_N_1
E
B
C
KEC_DDR_RES0_TR
Q400-*1
2N3904S
E
R435
10K
M2_DDR_RESET_N_1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
B_RASZ
B_CASZ
B_MCLK
B_MCLKZ
B_CSB1
B_CSB2
B_DQ[0]
B_DQ[1]
B_DQ[2]
B_DQ[3]
B_DQ[4]
B_DQ[5]
B_DQ[6]
B_DQ[7]
B_DQM[0]
B_DQS[0]
B_DQSB[0]
B_DQ[8]/DQU0
B_DQ[9]/DQU1
B_DQ[10]/DQU2
B_DQ[11]/DQU3
B_DQ[12]/DQU4
B_DQ[13]/DQU5
B_DQ[14]/DQU6
B_DQ[15]/DQU7
B_DQM[1]
B_DQS[1]
B_DQSB[1]
B_DQ[16]/DQL0
B_DQ[17]/DQL1
B_DQ[18]/DQL2
B_DQ[19]/DQL3
B_DQ[20]/DQL4
B_DQ[21]/DQL5
B_DQ[22]/DQL6
B_DQ[23]/DQL7
B_DQM[2]
B_DQS[2]
B_DQSB[2]
B_DQ[24]/DQU0
B_DQ[25]/DQU1
B_DQ[26]/DQU2
B_DQ[27]/DQU3
B_DQ[28]/DQU4
B_DQ[29]/DQU5
B_DQ[30]/DQU6
B_DQ[31]/DQU7
B_DQM[3]
B_DQS[3]
B_DQSB[3]
C_RASZ
C_CASZ
C_MCLK
C_MCLKZ
C_CSB1
C_CSB2
C_DQ[0]
C_DQ[1]
C_DQ[2]
C_DQ[3]
C_DQ[4]
C_DQ[5]
C_DQ[6]
C_DQ[7]
C_DQM[0]
C_DQS[0]
C_DQSB[0]
C_DQ[8]/DQU0
C_DQ[9]/DQU1
C_DQ[10]/DQU2
C_DQ[11]/DQU3
C_DQ[12]/DQU4
C_DQ[13]/DQU5
C_DQ[14]/DQU6
C_DQ[15]/DQU7
C_DQM[1]
C_DQS[1]
C_DQSB[1]
C_DQ[16]/DQL0
C_DQ[17]/DQL1
C_DQ[18]/DQL2
C_DQ[19]/DQL3
C_DQ[20]/DQL4
C_DQ[21]/DQL5
C_DQ[22]/DQL6
C_DQ[23]/DQL7
C_DQM[2]
C_DQS[2]
C_DQSB[2]
C_DQ[24]/DQU0
C_DQ[25]/DQU1
C_DQ[26]/DQU2
C_DQ[27]/DQU3
C_DQ[28]/DQU4
C_DQ[29]/DQU5
C_DQ[30]/DQU6
C_DQ[31]/DQU7
C_DQM[3]
C_DQS[3]
C_DQSB[3]
B_A10
B_A11
B_A12
B_A13
B_A14
B_A15
B_BA0
B_BA1
B_BA2
B_WEZ
B_ODT
B_CKE
B_RST
C_A10
C_A11
C_A12
C_A13
C_A14
C_A15
C_BA0
C_BA1
C_BA2
C_WEZ
C_ODT
C_CKE
C_RST
G33
B_A0
J36
B_A1
H34
B_A2
J32
B_A3
J35
B_A4
H33
B_A5
J37
B_A6
G36
B_A7
H37
B_A8
F35
B_A9
K35
H35
K34
F36
H36
L33
K33
K36
J33
M33
M32
K32
L32
L36
F37
M37
L35
F34
E37
R36
N35
R35
N36
T35
M36
T36
M35
P36
R37
P35
N32
T34
N33
T32
P33
U33
N34
T33
R33
R32
P32
Y36
V36
Y35
V37
AA36
U36
AA37
U35
V35
W35
W36
W33
AA32
U32
AA34
V33
AA33
V32
Y32
W32
Y33
W34
AM34
C_A0
AR35
C_A1
AP34
C_A2
AM33
C_A3
AT34
C_A4
AN33
C_A5
AU35
C_A6
AR36
C_A7
AU36
C_A8
AR37
C_A9
AT33
AT35
AP31
AP35
AT37
AN31
AN32
AR34
AM32
AM29
AM30
AN30
AM31
AR33
AP37
AU32
AT32
AN34
AP36
AR29
AT30
AT28
AR31
AT27
AR32
AR28
AT31
AR30
AU29
AT29
AN27
AP25
AN29
AN24
AN28
AN25
AP28
AN26
AM26
AM27
AM28
AR24
AR26
AT23
AU26
AR23
AR27
AU23
AT26
AT25
AT24
AR25
AN23
AN21
AM25
AM21
AM23
AM22
AM24
AT22
AR22
AP21
AP22
M1_DDR_A0
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8
M1_DDR_A9
M1_DDR_A10
M1_DDR_A11
M1_DDR_A12
M1_DDR_A13
M1_DDR_A14
M1_DDR_A15
M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_ODT
M1_DDR_CKE
M1_DDR_RESET_N_1
M1_D_CLK
M1_D_CLKN
M1_DDR_CS1
M1_DDR_CS2
M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7
M1_DDR_DM0
M1_DDR_DQS0
M1_DDR_DQS_N0
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15
M1_DDR_DM1
M1_DDR_DQS1
M1_DDR_DQS_N1
M1_DDR_DQ16
M1_DDR_DQ17
M1_DDR_DQ18
M1_DDR_DQ19
M1_DDR_DQ20
M1_DDR_DQ21
M1_DDR_DQ22
M1_DDR_DQ23
M1_DDR_DM2
M1_DDR_DQS2
M1_DDR_DQS_N2
M1_DDR_DQ24
M1_DDR_DQ25
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_DQ28
M1_DDR_DQ29
M1_DDR_DQ30
M1_DDR_DQ31
M1_DDR_DM3
M1_DDR_DQS3
M1_DDR_DQS_N3
M2_DDR_A0
M2_DDR_A1
M2_DDR_A2
M2_DDR_A3
M2_DDR_A4
M2_DDR_A5
M2_DDR_A6
M2_DDR_A7
M2_DDR_A8
M2_DDR_A9
M2_DDR_A10
M2_DDR_A11
M2_DDR_A12
M2_DDR_A13
M2_DDR_A14
M2_DDR_A15
M2_DDR_BA0
M2_DDR_BA1
M2_DDR_BA2
M2_DDR_RASN
M2_DDR_CASN
M2_DDR_WEN
M2_DDR_ODT
M2_DDR_CKE
M2_DDR_RESET_N_1
M2_D_CLK
M2_D_CLKN
M2_DDR_CS1
M2_DDR_CS2
M2_DDR_DQ0
M2_DDR_DQ1
M2_DDR_DQ2
M2_DDR_DQ3
M2_DDR_DQ4
M2_DDR_DQ5
M2_DDR_DQ6
M2_DDR_DQ7
M2_DDR_DM0
M2_DDR_DQS0
M2_DDR_DQS_N0
M2_DDR_DQ8
M2_DDR_DQ9
M2_DDR_DQ10
M2_DDR_DQ11
M2_DDR_DQ12
M2_DDR_DQ13
M2_DDR_DQ14
M2_DDR_DQ15
M2_DDR_DM1
M2_DDR_DQS1
M2_DDR_DQS_N1
M2_DDR_DQ16
M2_DDR_DQ17
M2_DDR_DQ18
M2_DDR_DQ19
M2_DDR_DQ20
M2_DDR_DQ21
M2_DDR_DQ22
M2_DDR_DQ23
M2_DDR_DM2
M2_DDR_DQS2
M2_DDR_DQS_N2
M2_DDR_DQ24
M2_DDR_DQ25
M2_DDR_DQ26
M2_DDR_DQ27
M2_DDR_DQ28
M2_DDR_DQ29
M2_DDR_DQ30
M2_DDR_DQ31
M2_DDR_DM3
M2_DDR_DQS3
M2_DDR_DQS_N3
OPT
R441 0
M1_DDR_RESET_N
C
R436
NXP_DDR_RES1_TR
1K
Q401
B
MMBT3904(NXP)
E
R437
10K
OPT
R442 0
M2_DDR_RESET_N
C
R438
NXP_DDR_RES2_TR
1K
B
Q402
MMBT3904(NXP)
E
R439
10K
B
B
C
KEC_DDR_RES1_TR
Q401-*1
2N3904S
E
C
KEC_DDR_RES2_TR
Q402-*1
2N3904S
E
M0_DDR_RESET_N
M0_DDR_DQS0
M0_DDR_DQS_N0
M0_DDR_DQS1
M0_DDR_DQS_N1
M0_DDR_DM0
M0_DDR_DM1
M2_DDR_RESET_N
M2_DDR_DQS0
M2_DDR_DQS_N0
M2_DDR_DQS1
M2_DDR_DQS_N1
M2_DDR_DM0
M2_DDR_DM1
M0_DDR_RASN
M0_DDR_CASN
M0_DDR_DQ10
M0_DDR_DQ11
M0_DDR_DQ12
M0_DDR_DQ13
M0_DDR_DQ14
M0_DDR_DQ15
M2_DDR_A10
M2_DDR_A11
M2_DDR_A12
M2_DDR_A13
M2_DDR_A14
M2_DDR_A15
M2_DDR_BA0
M2_DDR_BA1
M2_DDR_BA2
M2_DDR_CKE
M2_DDR_CS1
M2_DDR_ODT
M2_DDR_RASN
M2_DDR_CASN
M2_DDR_WEN
M2_DDR_DQ0
M2_DDR_DQ1
M2_DDR_DQ2
M2_DDR_DQ3
M2_DDR_DQ4
M2_DDR_DQ5
M2_DDR_DQ6
M2_DDR_DQ7
M2_DDR_DQ8
M2_DDR_DQ9
M2_DDR_DQ10
M2_DDR_DQ11
M2_DDR_DQ12
M2_DDR_DQ13
M2_DDR_DQ14
M2_DDR_DQ15
Hynix_DDR3_4Gb_29n
H5TQ4G63AFR-RDC
M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8
M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15
M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2
M0_D_CLK
M0_D_CLKN
M0_DDR_CKE
M0_DDR_CS1
M0_DDR_ODT
M0_DDR_WEN
M0_DDR_DQ0
M0_DDR_DQ1
M0_DDR_DQ2
M0_DDR_DQ3
M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7
M0_DDR_DQ8
M0_DDR_DQ9
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
+1.5V_Bypass Cap
Close to DDR Power Pin
VDDC15_M0
C402 0.1uF
C400 0.1uF
C401 0.1uF
Hynix_DDR3_4Gb_29n
H5TQ4G63AFR-RDC
M2_DDR_A0
M2_DDR_A1
M2_DDR_A2
M2_DDR_A3
M2_DDR_A4
M2_DDR_A5
M2_DDR_A6
M2_DDR_A7
M2_DDR_A8
M2_DDR_A9
M2_D_CLK
M2_D_CLKN
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
+1.5V_Bypass Cap
Close to DDR Power Pin
VDDC15_M1
C493 0.1uF
C492 0.1uF
C482 0.1uF
IC400
EAN63053201
DDR3
4Gbit
(x16)
IC405
EAN63053201
DDR3
4Gbit
(x16)
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
M0_DDR_VREFDQ
M8
H1
L8
R400
ZQ
VDDC15_M0
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
240
C410
0.1uF
C411
0.1uF
DDR3 1.5V bypass Cap - Place these caps near Memory
SS_DDR3_4Gb_25n
Hynix_DDR3_4Gb_25n
IC400-*1
IC400-*2
K4B4G1646D-BCMA
H5TQ4G63CFR_RDC
M8
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M8
N3
VREFCA
VREFCA
A0
P7
A1
P3
A2
H1
N2
H1
VREFDQ
A3
VREFDQ
P8
A4
P2
A5
R8
L8
L8
A6
ZQ
ZQ
R2
A7
T8
A8
R3
B2
B2
A9
VDD_1
VDD_1
L7
D9
D9
A10/AP
VDD_2
VDD_2
R7
G7
G7
A11
VDD_3
VDD_3
K2
N7
K2
A12/BC
VDD_4
VDD_4
K8
T3
K8
VDD_5
A13
VDD_5
T7
N1
N1
A14
VDD_6
VDD_6
N9
N9
M7
VDD_7
VDD_7
NC_5
R1
R1
VDD_8
VDD_8
R9
R9
M2
VDD_9
VDD_9
BA0
N8
BA1
M3
BA2
A1
A1
VDDQ_1
VDDQ_1
A8
A8
J7
VDDQ_2
VDDQ_2
CK
C1
C1
K7
VDDQ_3
VDDQ_3
CK
C9
C9
K9
VDDQ_4
VDDQ_4
CKE
D2
D2
VDDQ_5
VDDQ_5
E9
E9
L2
VDDQ_6
VDDQ_6
CS
F1
F1
K1
VDDQ_7
VDDQ_7
ODT
H2
H2
J3
VDDQ_8
VDDQ_8
RAS
H9
H9
K3
VDDQ_9
VDDQ_9
CAS
L3
WE
J1
J1
NC_1
NC_1
J9
J9
T2
NC_2
NC_2
RESET
L1
L1
NC_3
NC_3
L9
L9
NC_4
NC_4
T7
F3
NC_6
DQSL
G3
DQSL
A9
A9
C7
VSS_1
VSS_1
DQSU
B3
B3
B7
VSS_2
VSS_2
DQSU
E1
E1
VSS_3
VSS_3
G8
G8
E7
VSS_4
VSS_4
DML
J2
J2
D3
VSS_5
VSS_5
DMU
J8
J8
VSS_6
VSS_6
M1
M1
E3
VSS_7
VSS_7
DQL0
M9
M9
F7
VSS_8
VSS_8
DQL1
P1
P1
F2
VSS_9
VSS_9
DQL2
P9
P9
F8
VSS_10
VSS_10
DQL3
T1
T1
H3
VSS_11
VSS_11
DQL4
T9
T9
H8
VSS_12
VSS_12
DQL5
G2
DQL6
H7
DQL7
B1
B1
VSSQ_1
VSSQ_1
B9
B9
D7
VSSQ_2
VSSQ_2
DQU0
D1
D1
C3
VSSQ_3
VSSQ_3
DQU1
D8
D8
C8
VSSQ_4
VSSQ_4
DQU2
E2
E2
C2
VSSQ_5
VSSQ_5
DQU3
E8
E8
A7
VSSQ_6
VSSQ_6
DQU4
F9
F9
A2
VSSQ_7
VSSQ_7
DQU5
G1
G1
B8
VSSQ_8
VSSQ_8
DQU6
G9
G9
A3
VSSQ_9
VSSQ_9
DQU7
M0_DDR_A0
M0_DDR_A1
M0_DDR_A2
M0_DDR_A3
M0_DDR_A4
M0_DDR_A5
M0_DDR_A6
M0_DDR_A7
M0_DDR_A8
M0_DDR_A9
M0_DDR_A10
M0_DDR_A11
M0_DDR_A12
M0_DDR_A13
M0_DDR_A14
M0_DDR_A15
M0_DDR_BA0
M0_DDR_BA1
M0_DDR_BA2
M0_D_CLK
M0_D_CLKN
M0_DDR_CKE
M0_DDR_CS2
M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CASN
M0_DDR_WEN
M0_DDR_RESET_N
M0_DDR_DQS2
M0_DDR_DQS_N2
M0_DDR_DQS3
M0_DDR_DQS_N3
M0_DDR_DM2
M0_DDR_DM3
M0_DDR_DQ16
M0_DDR_DQ17
M0_DDR_DQ18
M0_DDR_DQ19
M0_DDR_DQ20
M0_DDR_DQ21
M0_DDR_DQ22
M0_DDR_DQ23
M0_DDR_DQ24
M0_DDR_DQ25
M0_DDR_DQ26
M0_DDR_DQ27
M0_DDR_DQ28
M0_DDR_DQ29
M0_DDR_DQ30
M0_DDR_DQ31
VDDC15_M0
M2_DDR_VREFDQ
M8
H1
L8
R406
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2
F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C502
C503
SS_DDR3_4Gb_25n
K4B4G1646D-BCMA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
NC_5
BA0
BA1
BA2
CK
CK
CKE
CS
ODT
RAS
CAS
WE
RESET
DQSL
DQSL
DQSU
DQSU
DML
DMU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
240
0.1uF
0.1uF
DDR3 1.5V bypass Cap - Place these caps near Memory
Hynix_DDR3_4Gb_25n
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2
F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
H5TQ4G63CFR_RDC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
NC_5
BA0
BA1
BA2
CK
CK
CKE
CS
ODT
RAS
CAS
WE
RESET
DQSL
DQSL
DQSU
DQSU
DML
DMU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
SS_DDR3_2Gb
IC405-*2
IC405-*3
K4B2G1646Q-BCMA
M8
M8
N3
VREFCA
VREFCA
A0
P7
A1
P3
A2
H1
H1
N2
VREFDQ
VREFDQ
A3
P8
A4
P2
A5
L8
R8
L8
ZQ
A6
ZQ
R2
A7
T8
A8
R3
B2
B2
A9
VDD_1
VDD_1
L7
D9
D9
A10/AP
VDD_2
VDD_2
R7
G7
G7
A11
VDD_3
VDD_3
K2
K2
N7
A12/BC
VDD_4
VDD_4
K8
K8
T3
VDD_5
VDD_5
A13
N1
N1
VDD_6
VDD_6
N9
N9
M7
VDD_7
VDD_7
NC_5
R1
R1
VDD_8
VDD_8
R9
R9
M2
VDD_9
VDD_9
BA0
N8
BA1
M3
BA2
A1
A1
VDDQ_1
VDDQ_1
A8
A8
J7
VDDQ_2
VDDQ_2
CK
C1
C1
K7
VDDQ_3
VDDQ_3
CK
C9
C9
K9
VDDQ_4
VDDQ_4
CKE
D2
D2
VDDQ_5
VDDQ_5
E9
E9
L2
VDDQ_6
VDDQ_6
CS
F1
F1
K1
VDDQ_7
VDDQ_7
ODT
H2
H2
J3
VDDQ_8
VDDQ_8
RAS
H9
H9
K3
VDDQ_9
VDDQ_9
CAS
L3
WE
J1
J1
NC_1
NC_1
J9
J9
T2
NC_2
NC_2
RESET
L1
L1
NC_3
NC_3
L9
L9
NC_4
NC_4
T7
F3
NC_6
DQSL
G3
DQSL
A9
A9
C7
VSS_1
VSS_1
DQSU
B3
B3
B7
VSS_2
VSS_2
DQSU
E1
E1
VSS_3
VSS_3
G8
G8
E7
VSS_4
VSS_4
DML
J2
J2
D3
VSS_5
VSS_5
DMU
J8
J8
VSS_6
VSS_6
M1
M1
E3
VSS_7
VSS_7
DQL0
M9
M9
F7
VSS_8
VSS_8
DQL1
P1
P1
F2
VSS_9
VSS_9
DQL2
P9
P9
F8
VSS_10
VSS_10
DQL3
T1
T1
H3
VSS_11
VSS_11
DQL4
T9
T9
H8
VSS_12
VSS_12
DQL5
G2
DQL6
H7
DQL7
B1
B1
VSSQ_1
VSSQ_1
B9
B9
D7
VSSQ_2
VSSQ_2
DQU0
D1
D1
C3
VSSQ_3
VSSQ_3
DQU1
D8
D8
C8
VSSQ_4
VSSQ_4
DQU2
E2
E2
C2
VSSQ_5
VSSQ_5
DQU3
E8
E8
A7
VSSQ_6
VSSQ_6
DQU4
F9
F9
A2
VSSQ_7
VSSQ_7
DQU5
G1
G1
B8
VSSQ_8
VSSQ_8
DQU6
G9
G9
A3
VSSQ_9
VSSQ_9
DQU7
IC405-*1
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
ZQ
VDDC15_M1
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2
F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
Hynix_DDR3_2Gb
H5TQ2G63FFR-RDC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
NC_5
BA0
BA1
BA2
CK
CK
CKE
CS
ODT
RAS
CAS
WE
RESET
DQSL
DQSL
DQSU
DQSU
DML
DMU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
IC405-*4
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
M2_DDR_A0
M2_DDR_A1
M2_DDR_A2
M2_DDR_A3
M2_DDR_A4
M2_DDR_A5
M2_DDR_A6
M2_DDR_A7
M2_DDR_A8
M2_DDR_A9
M2_DDR_A10
M2_DDR_A11
M2_DDR_A12
M2_DDR_A13
M2_DDR_A14
M2_DDR_A15
M2_DDR_BA0
M2_DDR_BA1
M2_DDR_BA2
M2_D_CLK
M2_D_CLKN
M2_DDR_CKE
M2_DDR_CS2
M2_DDR_ODT
M2_DDR_RASN
M2_DDR_CASN
M2_DDR_WEN
M2_DDR_RESET_N
M2_DDR_DQS2
M2_DDR_DQS_N2
M2_DDR_DQS3
M2_DDR_DQS_N3
M2_DDR_DM2
M2_DDR_DM3
M2_DDR_DQ16
M2_DDR_DQ17
M2_DDR_DQ18
M2_DDR_DQ19
M2_DDR_DQ20
M2_DDR_DQ21
M2_DDR_DQ22
M2_DDR_DQ23
M2_DDR_DQ24
M2_DDR_DQ25
M2_DDR_DQ26
M2_DDR_DQ27
M2_DDR_DQ28
M2_DDR_DQ29
M2_DDR_DQ30
M2_DDR_DQ31
VDDC15_M1
Hynix_DDR3_4Gb_29n
IC401
H5TQ4G63AFR-RDC
EAN63053201
N3
DDR3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
+1.5V_Bypass Cap
Close to DDR Power Pin
C412 0.1uF
C413 0.1uF
C415 0.1uF
Hynix_DDR3_4Gb_29n
H5TQ4G63AFR-RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
+1.5V_Bypass Cap
Close to DDR Power Pin
C506 0.1uF
C504 0.1uF
C505 0.1uF
4Gbit
(x16)
IC406
EAN63053201
DDR3
4Gbit
(x16)
VREFCA
VREFDQ
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
M0_1_DDR_VREFDQ
M8
H1
L8
R403
ZQ
VDDC15_M0
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
240
C440
0.1uF
C441
0.1uF
DDR3 1.5V bypass Cap - Place these caps near Memory
SS_DDR3_4Gb_25n
Hynix_DDR3_4Gb_25n
IC401-*1
IC401-*2
K4B4G1646D-BCMA
H5TQ4G63CFR_RDC
M8
N3
VREFCA
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M8
N3
VREFCA
A0
P7
A1
P3
H1
A2
VREFDQ
N2
H1
A3
VREFDQ
P8
A4
P2
L8
A5
ZQ
R8
L8
A6
ZQ
R2
A7
T8
B2
A8
VDD_1
R3
B2
D9
A9
VDD_1
VDD_2
L7
D9
G7
A10/AP
VDD_2
VDD_3
R7
G7
K2
A11
VDD_3
VDD_4
N7
K2
K8
A12/BC
VDD_4
VDD_5
T3
K8
N1
A13
VDD_5
VDD_6
T7
N1
N9
A14
VDD_6
VDD_7
N9
M7
R1
VDD_7
NC_5
VDD_8
R1
R9
VDD_8
VDD_9
R9
M2
VDD_9
BA0
N8
BA1
M3
A1
BA2
VDDQ_1
A1
A8
VDDQ_1
VDDQ_2
A8
J7
C1
VDDQ_2
CK
VDDQ_3
C1
K7
C9
VDDQ_3
CK
VDDQ_4
C9
K9
D2
VDDQ_4
CKE
VDDQ_5
D2
E9
VDDQ_5
VDDQ_6
E9
L2
F1
VDDQ_6
CS
VDDQ_7
F1
K1
H2
VDDQ_7
ODT
VDDQ_8
H2
J3
H9
VDDQ_8
RAS
VDDQ_9
H9
K3
VDDQ_9
CAS
L3
J1
WE
NC_1
J1
J9
NC_1
NC_2
J9
T2
L1
NC_2
RESET
NC_3
L1
L9
NC_3
NC_4
L9
T7
NC_4
NC_6
F3
DQSL
G3
DQSL
A9
VSS_1
A9
C7
B3
VSS_1
DQSU
VSS_2
B3
B7
E1
VSS_2
DQSU
VSS_3
E1
G8
VSS_3
VSS_4
G8
E7
J2
VSS_4
DML
VSS_5
J2
D3
J8
VSS_5
DMU
VSS_6
J8
M1
VSS_6
VSS_7
M1
E3
M9
VSS_7
DQL0
VSS_8
M9
F7
P1
VSS_8
DQL1
VSS_9
P1
F2
P9
VSS_9
DQL2
VSS_10
P9
F8
T1
VSS_10
DQL3
VSS_11
T1
H3
T9
VSS_11
DQL4
VSS_12
T9
H8
VSS_12
DQL5
G2
DQL6
H7
B1
DQL7
VSSQ_1
B1
B9
VSSQ_1
VSSQ_2
B9
D7
D1
VSSQ_2
DQU0
VSSQ_3
D1
C3
D8
VSSQ_3
DQU1
VSSQ_4
D8
C8
E2
VSSQ_4
DQU2
VSSQ_5
E2
C2
E8
VSSQ_5
DQU3
VSSQ_6
E8
A7
F9
VSSQ_6
DQU4
VSSQ_7
F9
A2
G1
VSSQ_7
DQU5
VSSQ_8
G1
B8
G9
VSSQ_8
DQU6
VSSQ_9
G9
A3
VSSQ_9
DQU7
M1_DDR_RESET_N
M1_DDR_DQS0
M1_DDR_DQS_N0
M1_DDR_DQS1
M1_DDR_DQS_N1
M1_DDR_DM0
M1_DDR_DM1
M1_DDR_A0
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8
M1_DDR_A9
M1_DDR_A10
M1_DDR_A11
M1_DDR_A12
M1_DDR_A13
M1_DDR_A14
M1_DDR_A15
M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2
M1_D_CLK
M1_D_CLKN
M1_DDR_CKE
M1_DDR_CS1
M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3
M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15
Hynix_DDR3_4Gb_29n
IC403
H5TQ4G63AFR-RDC
EAN63053201
N3
DDR3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
+1.5V_Bypass Cap
Close to DDR Power Pin
4Gbit
(x16)
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
NC_1
NC_2
NC_3
NC_4
VDDC15_M0
C444 0.1uF
C445 0.1uF
C446 0.1uF
M2_1_DDR_VREFDQ
M8
H1
L8
R407
ZQ
VDDC15_M1
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
240
C514
0.1uF
C515
0.1uF
DDR3 1.5V bypass Cap - Place these caps near Memory
SS_DDR3_4Gb_25n
Hynix_DDR3_4Gb_25n
IC406-*1
IC406-*2
K4B4G1646D-BCMA
H5TQ4G63CFR_RDC
M8
VREFCA
VREFDQ
ZQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
K4B2G1646Q-BCMA
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
SS_DDR3_2Gb
M8
N3
VREFCA
A0
P7
A1
P3
A2
H1
H1
N2
VREFDQ
A3
P8
A4
P2
A5
L8
R8
L8
A6
ZQ
R2
A7
T8
A8
R3
B2
B2
A9
VDD_1
L7
D9
D9
A10/AP
VDD_2
R7
G7
G7
A11
VDD_3
K2
K2
N7
A12/BC
VDD_4
K8
K8
T3
VDD_5
A13
T7
N1
N1
A14
VDD_6
N9
N9
M7
VDD_7
NC_5
R1
R1
VDD_8
R9
R9
M2
VDD_9
BA0
N8
BA1
M3
BA2
A1
A1
VDDQ_1
A8
A8
J7
VDDQ_2
CK
C1
C1
K7
VDDQ_3
CK
C9
C9
K9
VDDQ_4
CKE
D2
D2
VDDQ_5
E9
E9
L2
VDDQ_6
CS
F1
F1
K1
VDDQ_7
ODT
H2
H2
J3
VDDQ_8
RAS
H9
H9
K3
VDDQ_9
CAS
L3
WE
J1
J1
NC_1
J9
J9
T2
NC_2
RESET
L1
L1
NC_3
L9
L9
NC_4
T7
F3
DQSL
G3
DQSL
A9
A9
C7
VSS_1
DQSU
B3
B3
B7
VSS_2
DQSU
E1
E1
VSS_3
G8
G8
E7
VSS_4
DML
J2
J2
D3
VSS_5
DMU
J8
J8
VSS_6
M1
M1
E3
VSS_7
DQL0
M9
M9
F7
VSS_8
DQL1
P1
P1
F2
VSS_9
DQL2
P9
P9
F8
VSS_10
DQL3
T1
T1
H3
VSS_11
DQL4
T9
T9
H8
VSS_12
DQL5
G2
DQL6
H7
DQL7
B1
B1
VSSQ_1
B9
B9
D7
VSSQ_2
DQU0
D1
D1
C3
VSSQ_3
DQU1
D8
D8
C8
VSSQ_4
DQU2
E2
E2
C2
VSSQ_5
DQU3
E8
E8
A7
VSSQ_6
DQU4
F9
F9
A2
VSSQ_7
DQU5
G1
G1
B8
VSSQ_8
DQU6
G9
G9
A3
VSSQ_9
DQU7
Hynix_DDR3_2Gb
IC406-*3
IC406-*4
H5TQ2G63FFR-RDC
M8
N3
VREFCA
A0
P7
A1
P3
A2
H1
N2
VREFDQ
A3
P8
A4
P2
A5
L8
R8
ZQ
A6
R2
A7
T8
A8
R3
B2
A9
VDD_1
L7
D9
A10/AP
VDD_2
R7
G7
A11
VDD_3
K2
N7
A12/BC
VDD_4
K8
T3
VDD_5
A13
T7
N1
A14
VDD_6
N9
M7
VDD_7
NC_5
R1
VDD_8
R9
M2
VDD_9
BA0
N8
BA1
M3
BA2
A1
VDDQ_1
A8
J7
VDDQ_2
CK
C1
K7
VDDQ_3
CK
C9
K9
VDDQ_4
CKE
D2
VDDQ_5
E9
L2
VDDQ_6
CS
F1
K1
VDDQ_7
ODT
H2
J3
VDDQ_8
RAS
H9
K3
VDDQ_9
CAS
L3
WE
J1
NC_1
J9
T2
NC_2
RESET
L1
NC_3
L9
NC_4
T7
F3
NC_6
DQSL
G3
DQSL
A9
C7
VSS_1
DQSU
B3
B7
VSS_2
DQSU
E1
VSS_3
G8
E7
VSS_4
DML
J2
D3
VSS_5
DMU
J8
VSS_6
M1
E3
VSS_7
DQL0
M9
F7
VSS_8
DQL1
P1
F2
VSS_9
DQL2
P9
F8
VSS_10
DQL3
T1
H3
VSS_11
DQL4
T9
H8
VSS_12
DQL5
G2
DQL6
H7
DQL7
B1
VSSQ_1
B9
D7
VSSQ_2
DQU0
D1
C3
VSSQ_3
DQU1
D8
C8
VSSQ_4
DQU2
E2
C2
VSSQ_5
DQU3
E8
A7
VSSQ_6
DQU4
F9
A2
VSSQ_7
DQU5
G1
B8
VSSQ_8
DQU6
G9
A3
VSSQ_9
DQU7
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M1_DDR_A0
M1_DDR_A1
M1_DDR_A2
M1_DDR_A3
M1_DDR_A4
M1_DDR_A5
M1_DDR_A6
M1_DDR_A7
M1_DDR_A8
M1_DDR_A9
M1_DDR_A10
M1_DDR_A11
M1_DDR_A12
M1_DDR_A13
M1_DDR_A14
M1_DDR_A15
M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2
M1_D_CLK
M1_D_CLKN
M1_DDR_CKE
M1_DDR_CS2
M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_RESET_N
M1_DDR_DQS2
M1_DDR_DQS_N2
M1_DDR_DQS3
M1_DDR_DQS_N3
M1_DDR_DM2
M1_DDR_DM3
M1_DDR_DQ16
M1_DDR_DQ17
M1_DDR_DQ18
M1_DDR_DQ19
M1_DDR_DQ20
M1_DDR_DQ21
M1_DDR_DQ22
M1_DDR_DQ23
M1_DDR_DQ24
M1_DDR_DQ25
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_DQ28
M1_DDR_DQ29
M1_DDR_DQ30
M1_DDR_DQ31
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
Hynix_DDR3_4Gb_29n
IC404
H5TQ4G63AFR-RDC
EAN63053201
N3
DDR3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
+1.5V_Bypass Cap
Close to DDR Power Pin
4Gbit
(x16)
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
NC_1
NC_2
NC_3
NC_4
VDDC15_M0
C475 0.1uF
C476 0.1uF
C480 0.1uF
M1_DDR_VREFDQ
DDR_VTT
AR400
M8
H1
L8
R404
ZQ
VDDC15_M0
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
240
C468
0.1uF
C469
0.1uF
DDR3 1.5V bypass Cap - Place these caps near Memory
SS_DDR3_4Gb_25n
Hynix_DDR3_4Gb_25n
IC403-*1
IC403-*2
K4B4G1646D-BCMA
H5TQ4G63CFR_RDC
M8
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M8
N3
VREFCA
VREFCA
A0
P7
A1
P3
A2
H1
N2
H1
VREFDQ
A3
VREFDQ
P8
A4
P2
A5
R8
L8
L8
A6
ZQ
ZQ
R2
A7
T8
A8
R3
B2
B2
A9
VDD_1
VDD_1
L7
D9
D9
A10/AP
VDD_2
VDD_2
R7
G7
G7
A11
VDD_3
VDD_3
K2
N7
K2
A12/BC
VDD_4
VDD_4
K8
T3
K8
VDD_5
A13
VDD_5
T7
N1
N1
A14
VDD_6
VDD_6
N9
N9
M7
VDD_7
VDD_7
NC_5
R1
R1
VDD_8
VDD_8
R9
R9
M2
VDD_9
VDD_9
BA0
N8
BA1
M3
BA2
A1
A1
VDDQ_1
VDDQ_1
A8
A8
J7
VDDQ_2
VDDQ_2
CK
C1
C1
K7
VDDQ_3
VDDQ_3
CK
C9
C9
K9
VDDQ_4
VDDQ_4
CKE
D2
D2
VDDQ_5
VDDQ_5
E9
E9
L2
VDDQ_6
VDDQ_6
CS
F1
F1
K1
VDDQ_7
VDDQ_7
ODT
H2
H2
J3
VDDQ_8
VDDQ_8
RAS
H9
H9
K3
VDDQ_9
VDDQ_9
CAS
L3
WE
J1
J1
NC_1
NC_1
J9
J9
T2
NC_2
NC_2
RESET
L1
L1
NC_3
NC_3
L9
L9
NC_4
NC_4
T7
F3
NC_6
DQSL
G3
DQSL
A9
A9
C7
VSS_1
VSS_1
DQSU
B3
B3
B7
VSS_2
VSS_2
DQSU
E1
E1
VSS_3
VSS_3
G8
G8
E7
VSS_4
VSS_4
DML
J2
J2
D3
VSS_5
VSS_5
DMU
J8
J8
VSS_6
VSS_6
M1
M1
E3
VSS_7
VSS_7
DQL0
M9
M9
F7
VSS_8
VSS_8
DQL1
P1
P1
F2
VSS_9
VSS_9
DQL2
P9
P9
F8
VSS_10
VSS_10
DQL3
T1
T1
H3
VSS_11
VSS_11
DQL4
T9
T9
H8
VSS_12
VSS_12
DQL5
G2
DQL6
H7
DQL7
B1
B1
VSSQ_1
VSSQ_1
B9
B9
D7
VSSQ_2
VSSQ_2
DQU0
D1
D1
C3
VSSQ_3
VSSQ_3
DQU1
D8
D8
C8
VSSQ_4
VSSQ_4
DQU2
E2
E2
C2
VSSQ_5
VSSQ_5
DQU3
E8
E8
A7
VSSQ_6
VSSQ_6
DQU4
F9
F9
A2
VSSQ_7
VSSQ_7
DQU5
G1
G1
B8
VSSQ_8
VSSQ_8
DQU6
G9
G9
A3
VSSQ_9
VSSQ_9
DQU7
M1_1_DDR_VREFDQ
M8
H1
L8
R419
ZQ
VDDC15_M0
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
240
C490
0.1uF
C491
0.1uF
DDR3 1.5V bypass Cap - Place these caps near Memory
SS_DDR3_4Gb_25n
Hynix_DDR3_4Gb_25n
IC404-*1
IC404-*2
K4B4G1646D-BCMA
H5TQ4G63CFR_RDC
M8
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M8
N3
VREFCA
VREFCA
A0
P7
A1
P3
A2
H1
N2
H1
VREFDQ
A3
VREFDQ
P8
A4
P2
A5
R8
L8
L8
A6
ZQ
ZQ
R2
A7
T8
A8
R3
B2
B2
A9
VDD_1
VDD_1
L7
D9
D9
A10/AP
VDD_2
VDD_2
R7
G7
G7
A11
VDD_3
VDD_3
K2
N7
K2
A12/BC
VDD_4
VDD_4
K8
T3
K8
VDD_5
A13
VDD_5
T7
N1
N1
A14
VDD_6
VDD_6
N9
N9
M7
VDD_7
VDD_7
NC_5
R1
R1
VDD_8
VDD_8
R9
R9
M2
VDD_9
VDD_9
BA0
N8
BA1
M3
BA2
A1
A1
VDDQ_1
VDDQ_1
A8
A8
J7
VDDQ_2
VDDQ_2
CK
C1
C1
K7
VDDQ_3
VDDQ_3
CK
C9
C9
K9
VDDQ_4
VDDQ_4
CKE
D2
D2
VDDQ_5
VDDQ_5
E9
E9
L2
VDDQ_6
VDDQ_6
CS
F1
F1
K1
VDDQ_7
VDDQ_7
ODT
H2
H2
J3
VDDQ_8
VDDQ_8
RAS
H9
H9
K3
VDDQ_9
VDDQ_9
CAS
L3
WE
J1
J1
NC_1
NC_1
J9
J9
T2
NC_2
NC_2
RESET
L1
L1
NC_3
NC_3
L9
L9
NC_4
NC_4
T7
F3
NC_6
DQSL
G3
DQSL
A9
A9
C7
VSS_1
VSS_1
DQSU
B3
B3
B7
VSS_2
VSS_2
DQSU
E1
E1
VSS_3
VSS_3
G8
G8
E7
VSS_4
VSS_4
DML
J2
J2
D3
VSS_5
VSS_5
DMU
J8
J8
VSS_6
VSS_6
M1
M1
E3
VSS_7
VSS_7
DQL0
M9
M9
F7
VSS_8
VSS_8
DQL1
P1
P1
F2
VSS_9
VSS_9
DQL2
P9
P9
F8
VSS_10
VSS_10
DQL3
T1
T1
H3
VSS_11
VSS_11
DQL4
T9
T9
H8
VSS_12
VSS_12
DQL5
G2
DQL6
H7
DQL7
B1
B1
VSSQ_1
VSSQ_1
B9
B9
D7
VSSQ_2
VSSQ_2
DQU0
D1
D1
C3
VSSQ_3
VSSQ_3
DQU1
D8
D8
C8
VSSQ_4
VSSQ_4
DQU2
E2
E2
C2
VSSQ_5
VSSQ_5
DQU3
E8
E8
A7
VSSQ_6
VSSQ_6
DQU4
F9
F9
A2
VSSQ_7
VSSQ_7
DQU5
G1
G1
B8
VSSQ_8
VSSQ_8
DQU6
G9
G9
A3
VSSQ_9
VSSQ_9
DQU7
* DDR_VTT
VDDC15_M0
DDR_VTT
R443
10K
1/16W
1%
L400
CIS2 1J121
C417
C414
C535
10uF
10uF
10uF
25V
25V
25V
C421
10uF
10V
1%
10K
R444
1/16W
M0_DDR_A14
M0_DDR_A8
M0_DDR_A11
M0_DDR_A6
M0_DDR_A1
M0_DDR_A4
M0_DDR_A12
M0_DDR_BA1
M0_DDR_A13
M0_DDR_A9
M0_DDR_A7
M0_DDR_A2
M0_DDR_A5
M0_DDR_A3
M0_DDR_A0
M0_DDR_BA0
M0_DDR_BA2
M0_DDR_A15
M0_DDR_A10
M0_DDR_WEN
M0_DDR_CASN
M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CKE
M0_D_CLKN
M0_D_CLK
M2_DDR_A14
M2_DDR_A8
M2_DDR_A11
M2_DDR_A6
M2_DDR_A1
M2_DDR_A4
M2_DDR_A12
M2_DDR_BA1
M2_DDR_A13
M2_DDR_A9
M2_DDR_A7
M2_DDR_A2
M2_DDR_A5
M2_DDR_A3
M2_DDR_A0
M2_DDR_BA0
M2_DDR_BA2
M2_DDR_A15
M2_DDR_A10
M2_DDR_WEN
M2_DDR_CASN
M2_DDR_ODT
M2_DDR_RASN
M2_DDR_CKE
M2_D_CLKN
M2_D_CLK
AP2303MPTR-G1
VIN
GND
VREFEN
VOUT
C543
0.1uF
16V
56
AR414
56
1/16W
AR415
56
1/16W
AR416
56
1/16W
AR417
56
1/16W
AR418
56
1/16W
AR419
56
1/16W
AR420
56
1/16W
1/16W
AR401
56
1/16W
AR402
56
1/16W
AR403
56
1/16W
AR404
56
1/16W
AR405
56
1/16W
AR406
56
1/16W
DDR_VTT_1
C424 0.1uF
C425 0.1uF
C426 0.1uF
C427 0.1uF
C428 0.1uF
C429 0.1uF
C430 0.1uF
C431 0.1uF
C432 0.1uF
C433 0.1uF
C434 0.1uF
C435 0.1uF
C436 0.1uF
C437 0.1uF
C520 0.1uF
C521 0.1uF
C522 0.1uF
C523 0.1uF
C524 0.1uF
C525 0.1uF
C526 0.1uF
C527 0.1uF
C528 0.1uF
C529 0.1uF
C530 0.1uF
C531 0.1uF
C532 0.1uF
M1_DDR_A14
M1_DDR_A8
M1_DDR_A11
M1_DDR_A6
M1_DDR_A1
M1_DDR_A4
M1_DDR_A12
M1_DDR_BA1
M1_DDR_A13
M1_DDR_A9
M1_DDR_A7
M1_DDR_A2
M1_DDR_A5
M1_DDR_A3
M1_DDR_A0
M1_DDR_BA0
M1_DDR_BA2
M1_DDR_A15
M1_DDR_A10
M1_DDR_WEN
M1_DDR_CASN
M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CKE
M1_D_CLKN
M1_D_CLK
VDDC15_M0
VDDC15_M0
VDDC15_M1
1K
R405
1K
R422
1K
R420
C533 0.1uF
+3.3V_NORMAL
VDDC15_M0
M0_1_DDR_VREFDQ
R416
1K 1%
C479
0.1uF
C483
1000pF
50V
R417
1K 1%
VDDC15_M0
M1_1_DDR_VREFDQ
R414
1K 1%
C518
0.1uF
C519
1000pF
50V
R415
1K 1%
VDDC15_M1
C544
10uF
L401
10V
DDR_VTT_1
CIS2 1J121
C536
10uF
25V
R446
10K
L402
1/16W
1%
CIS2 1J121
C541
C542
10uF
10uF
1%
25V
25V
10K
1/16W
VDDC15_M0
M0_DDR_VREFDQ
R410
1K 1%
C472
0.1uF
C474
1000pF
R411
50V
1K 1%
VDDC15_M0
M1_DDR_VREFDQ
R408
1K 1%
C516
0.1uF
C517
1000pF
R409
50V
1K 1%
IC402
[EP]
NC_3
1
8
NC_2
9
2
7
THERMAL
VCNTL
3
6
NC_1
4
5
LM15U
AR407
56
1/16W
AR408
56
1/16W
AR409
56
1/16W
AR410
56
1/16W
AR411
56
1/16W
AR412
56
1/16W
AR413
56
1/16W
M0_DDR_RESET_N
M1_DDR_RESET_N
M2_DDR_RESET_N
VDDC15_M1
C537
10uF
10V
C546
0.1uF
R445
16V
R425
1K 1%
R426
1K 1%
VIN
GND
VREFEN
VOUT
DDR_VTT
C453 0.1uF
C454 0.1uF
C455 0.1uF
C456 0.1uF
C457 0.1uF
C458 0.1uF
C459 0.1uF
C460 0.1uF
C461 0.1uF
C462 0.1uF
C463 0.1uF
C464 0.1uF
C465 0.1uF
C466 0.1uF
M0_DDR_CKE
R412
56
1%
R413
56
1%
M1_DDR_CKE
M2_DDR_CKE
M2_DDR_VREFDQ
C470
0.1uF
C471
1000pF
50V
IC407
AP2303MPTR-G1
1
9
2
THERMAL
3
4
C477
0.01uF
50V
R427
56
1%
R428
56
1%
R421
56
1%
R423
56
1%
[EP]
NC_3
8
NC_2
7
VCNTL
6
NC_1
5
1K
R418
M0_D_CLK
M0_D_CLKN
1K
R433
M1_D_CLK
C497
0.01uF
50V
M1_D_CLKN
1K
R424
M2_D_CLK
C534
0.01uF
50V
M2_D_CLKN
VDDC15_M1
R431
1K 1%
R432
1K 1%
+3.3V_NORMAL
2014-12-18
M2_1_DDR_VREFDQ
C473
0.1uF
C478
1000pF
50V
L403
CIS2 1J121
C545
10uF
10V
MAIN3_DDR 4
Page 38
COMPENSATION_DONE_1
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
DPC_CTRL
12V_ON
OLED
TDI0
TDI0_1
R602
0
R603
0
OPT
+3.3V_NORMAL
Jtag I/F
JTAG
1K
R614
For Main
JTAG
1K
R616
TRST_N0
TDI0
TDO0
TMS0
TCK0
SOC_RESET
Clock for MSD808KWD
MAIN Clock(24Mhz)
5pF
C614
5pF
C615
System Clock for Analog block(24Mhz)
GND_1
2
3
X-TAL_2
X-TAL_1
1
4
GND_2
24MHz
X600
R635
1M
XIN_MAIN
XOUT_MAIN
C600
0.1uF
SW600
JS2235S
1
OPT
2
3
JTAG
6
5
4
R604
0
R605
0
OPT
TDO0
OPT
TDO0_1
JTAG
P600
12505WS-10A00
JTAG
11
1
2
3
4
5
6
7
8
9
10
JTAG
1K
R612
1K
JTAG
R609
MHL Port
TMS0
TDI0_1
D0-_HDMI3
D0+_HDMI3
D1-_HDMI3
D1+_HDMI3
D2-_HDMI3
D2+_HDMI3
CK-_HDMI3
CK+_HDMI3
DDC_SCL_3
DDC_SDA_3
HDMI_HPD_3
I2C_SCL5
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
CK-_HDMI2
CK+_HDMI2
DDC_SCL_2
DDC_SDA_2
HDMI_HPD_2
I2C_SDA5
I2C_SCL4
I2C_SDA4
CPU_VID1
CORE_VID1
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
D1+_HDMI1
D2-_HDMI1
D2+_HDMI1
CK-_HDMI1
CK+_HDMI1
DDC_SCL_1
DDC_SDA_1
HDMI_HPD_1
JTAG
R600
SPDIF_OUT
JTAG
R601
0
0
R636 0
R637 0
R607 0
R617 0
T2
RXA0N
T3
RXA0P
U2
RXA1N
U3
RXA1P
V2
RXA2N
V1
RXA2P
R3
RXACKN
T1
RXACKP
W1
DDCDA_CK/GPIO42
W2
DDCDA_DA/GPIO43
V3
HOTPLUGA/GPIO34
W3
CEC/GPIO5
N2
RXB0N
N3
RXB0P
P2
RXB1N
P3
RXB1P
R2
RXB2N
R1
RXB2P
M3
RXBCKN
N1
RXBCKP
V5
DDCDB_CK/GPIO44
V6
DDCDB_DA/GPIO45
U4
HOTPLUGB/GPIO35
W6
CEC_1/GPIO6
G2
RXC0N
G3
RXC0P
H2
RXC1N
H3
RXC1P
J2
RXC2N
J1
RXC2P
F3
RXCCKN
G1
RXCCKP
R5
DDCDC_CK/GPIO46
R6
DDCDC_DA/GPIO47
P4
HOTPLUGC/GPIO36
T6
CEC_2/GPIO7
K2
RXD0N
K3
RXD0P
L2
RXD1N
L3
RXD1P
M2
RXD2N
M1
RXD2P
J3
RXDCKN
K1
RXDCKP
T5
DDCDD_CK/GPIO48
T4
DDCDD_DA/GPIO49
U6
HOTPLUGD/GPIO37
U5
CEC_3/GPIO8
F14
SPDIF_IN/GPIO101
G14
SPDIF_OUT/GPIO102
IC100
LGE5331(LM15U)
I2S_IN_BCK/GPIO99
I2S_IN_SD/GPIO100
I2S_OUT_BCK/GPIO105
I2S_OUT_MCK/GPIO104
I2S_OUT_WS/GPIO103
I2S_OUT_SD/GPIO106
I2S_OUT_SD1/GPIO107
I2S_OUT_SD2/GPIO108
I2S_OUT_SD3/GPIO109
LINE_IN_0L
LINE_IN_0R
LINE_IN_1L
LINE_IN_1R
LINE_IN_2L
LINE_IN_2R
LINE_IN_3L
LINE_IN_3R
LINE_OUT_0L
LINE_OUT_0R
LINE_OUT_2L
LINE_OUT_2R
EARPHONE_OUT_L
EARPHONE_OUT_R
ARC0
AUVAG
AUVRM
I2S_IN_WS/GPIO98
GPIO_PM14/GPIO27
GPIO_PM15/GPIO28
GPIO_PM16/GPIO29
IC100
LGE5331(LM15U)
AG2
AG1
AG3
AH1
AH2
AH3
AJ2
AJ3
AK3
AL1
AL2
AL3
AF2
AF3
Y6
AK2
AK1
C13
0
JTAG
B14
B13
F16
F15
E16
D16
E15
D15
E14
AJ6
AH5
AH4
DPC_CTRL
12V_ON
R644 0
MHL_DET_LM15
COMPENSATION_DONE_1
/MHL_OCP
R606
2.2uF
2.2uF
2.2uF
2.2uF
C605 1uF
HP_LOUT
HP_ROUT
TCK0
C601
C602
C603
C604
JTAG
R610
22
R611
22
1K
22pF
C607
COMP1/AV1/DVI_L_IN
COMP1/AV1/DVI_R_IN
SC_L_IN
SC_R_IN
SCART_Lout
SCART_Rout
HP_LOUT
HP_ROUT
HDMI_ARC
C606
10uF
10V
+3.3V_NORMAL
R608
C608
22pF
JTAG
R613
0
R639
100
OPT
R638
100
1uF
C609
R618
22
C635
0.01uF
C636
0.01uF
L60 0
PZ1 608U 121- 2R0T F
JTAG
C611
22pF
TDO0_1
OPT
R615
22K
22K
47K
R640
R641
AUD_SCK
AUD_LRCK
AUD_LRCH
HP_LOUT_MAIN
OPT
HP_ROUT_MAIN
OPT
TRST_N0
TU_CVBS
AV1_CVBS_IN
SC_CVBS_IN
DTV/MNT_V_OUT
SC_R
SC_G
SC_B
SC_ID
SC_FB
COMP1_Pr
COMP1_Y
COMP1_Pb
C612
1000pF
OPT
R623 68
R624 33
68
R625
33
R626
R627 68
R628 33
R629 68
R630 33
68
R631
33
R632
R633 68
R634 33
R619 68
C613 0.047uF
R620 33
R621 33
R622 33
50V
C619
0.047uF
C620
0.047uF
C621
0.047uF
C622
0.047uF
C623
0.047uF
C624
0.047uF
C625
1000pF
0.047uF
C626
0.047uF
C627
0.047uF
C628
0.047uF
C629
0.047uF
C630
0.047uF
C631
1000pF
C632
C616 0.047uF
C617 0.047uF
C618 0.047uF
AB2
RIN0M
AB1
RIN0P
AA3
GIN0M
AA1
GIN0P
Y3
BIN0M
Y2
BIN0P
AA2
SOGIN0
W5
HSYNC0
W4
VSYNC0
AE1
RIN1M
AD3
RIN1P
AD1
GIN1M
AD2
GIN1P
AC2
BIN1M
AB3
BIN1P
AC3
SOGIN1
Y5
HSYNC1
Y4
VSYNC1
AC5
RIN2M
AB4
RIN2P
AB5
GIN2M
AC6
GIN2P
AA6
BIN2M
AA5
BIN2P
AB6
SOGIN2
AC4
HSYNC2
AE4
VCOM
AE5
CVBS0
AF6
CVBS1
AE6
CVBS2
AF5
CVBSOUT1
GPIO80/LED[1]
GPIO79/LED[0]
USB_SSTXP_1
USB_SSTXN_1
USB_DM_PSS_1
USB_DP_PSS_1
USB_SSRXP_1
USB_SSRXN_1
USB_SSTXP_0
USB_SSTXN_0
USB_DM_PSS_0
USB_DP_PSS_0
USB_SSRXP_0
USB_SSRXN_0
HWRESET
XOUT
IRIN
USB0_DM
USB0_DP
USB1_DM
USB1_DP
USB2_DM
USB2_DP
B1
TN
C1
TP
A2
RN
B2
RP
E5
F4
G4
AU2
XIN
AT2
K4
C5
B5
C4
B4
A4
B3
AR4
AT4
AU4
AR5
AU5
AT5
AR7
AT7
AU7
AR8
AU8
AT8
AC-coupling CAP
C633 0.1uF
C634 0.1uF
Place near by MST
EPHY_TDN
EPHY_TDP
EPHY_RDN
EPHY_RDP
0
R642
I2C_SCL2
I2C_SDA2
R643 0
SOC_RESET
XIN_MAIN
XOUT_MAIN
WIFI_DM
WIFI_DP
USB_DM2
USB_DP2
USB_DM1
USB_DP1
SSUSB_TXP
SSUSB_TXN
USB_DM3
USB_DP3
SSUSB_RXP
SSUSB_RXN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Close to Main soc
LM15U
MAIN4_EXT_IN/OUTPUT
2014-11-20
04
Page 39
AF33
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
AF34
AG8
AG9
AG10
AG11
AG12
AG13
AG16
AG17
AG23
AG24
AG25
AG26
AG27
AG28
AG29
AG30
AG31
AG32
AG33
AG34
AG36
AH8
AH9
AH10
AH11
AH12
AH13
AH16
AH17
AH23
AH24
AH25
AH26
AH27
AH28
AH29
AH30
AH31
AH32
AH33
AH34
AJ7
AJ8
AJ9
AJ10
AJ11
AJ12
AJ13
AJ14
AJ15
AJ16
AJ17
AJ18
AJ19
AJ20
AJ21
AJ22
AJ23
AJ24
AJ25
AJ26
AJ27
AJ28
AJ29
AJ30
AJ37
AK7
AK8
AK9
AK10
AK11
AK12
AK13
AK14
AK16
AK17
AK18
AK19
AK20
AK21
AK22
AK23
AK24
AK25
AK26
AK27
AK28
AK29
AK30
AK31
AK32
AK33
AK34
AL8
AL9
AL13
AL14
AL16
AL17
AL19
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL28
AL29
AL30
AL31
AL32
AL33
AL34
AL36
AM3
AM20
AN3
AN22
AN35
AN36
AN37
AP7
AP24
AP27
AP30
AP33
AR1
AR3
AR6
AR9
AT1
AT3
AT6
AT36
AU22
AU25
AU28
AU31
AU34
GND_430
GND_431
GND_432
GND_433
GND_434
GND_435
GND_436
GND_437
GND_438
GND_439
GND_440
GND_441
GND_442
GND_443
GND_444
GND_445
GND_446
GND_447
GND_448
GND_449
GND_450
GND_451
GND_452
GND_453
GND_454
GND_455
GND_456
GND_457
GND_458
GND_459
GND_460
GND_461
GND_462
GND_463
GND_464
GND_465
GND_466
GND_467
GND_468
GND_469
GND_470
GND_471
GND_472
GND_473
GND_474
GND_475
GND_476
GND_477
GND_478
GND_479
GND_480
GND_481
GND_482
GND_483
GND_484
GND_485
GND_486
GND_487
GND_488
GND_489
GND_490
GND_491
GND_492
GND_493
GND_494
GND_495
GND_496
GND_497
GND_498
GND_499
GND_500
GND_501
GND_502
GND_503
GND_504
GND_505
GND_506
GND_507
GND_508
GND_509
GND_510
GND_511
GND_512
GND_513
GND_514
GND_515
GND_516
GND_517
GND_518
GND_519
GND_520
GND_521
GND_522
GND_523
GND_524
GND_525
GND_526
GND_527
GND_528
GND_529
GND_530
GND_531
GND_532
GND_533
GND_534
GND_535
GND_536
GND_537
GND_538
GND_539
GND_540
GND_541
GND_542
GND_543
GND_544
GND_545
GND_546
GND_547
GND_548
GND_549
GND_550
GND_551
GND_552
GND_553
GND_554
GND_555
GND_556
GND_557
GND_558
GND_559
GND_560
GND_561
GND_562
GND_563
GND_564
GND_565
GND_566
GND_567
GND_568
GND_569
GND_570
GND_571
V23
GND_279
V24
GND_280
GND_281
V25
GND_282
V28
V29
GND_283
V30
GND_284
GND_285
V31
GND_572
GND_286
W8
GND_287
GND_288
GND_289
GND_290
GND_291
GND_292
GND_293
GND_294
GND_295
GND_296
GND_297
GND_298
GND_299
GND_300
GND_301
GND_302
GND_303
GND_304
GND_305
GND_306
GND_307
GND_308
GND_309
GND_310
GND_311
GND_312
GND_313
GND_314
GND_315
GND_316
GND_317
GND_318
GND_319
GND_320
GND_321
GND_322
GND_323
GND_324
GND_325
GND_326
GND_327
GND_328
GND_329
GND_330
GND_331
GND_332
GND_333
GND_334
GND_335
GND_336
GND_337
GND_338
GND_339
GND_340
GND_341
GND_342
GND_343
GND_344
GND_345
GND_346
GND_347
GND_348
GND_349
GND_350
GND_351
GND_352
GND_353
GND_354
GND_355
GND_356
GND_357
GND_358
GND_359
GND_360
GND_361
GND_362
GND_363
GND_364
GND_365
GND_366
GND_367
GND_368
GND_369
GND_370
GND_371
GND_372
GND_373
GND_374
GND_375
GND_376
GND_377
GND_378
GND_379
GND_380
GND_381
GND_382
GND_383
GND_384
GND_385
GND_386
GND_387
GND_388
GND_389
GND_390
GND_391
GND_392
GND_393
GND_394
GND_395
GND_396
GND_397
GND_398
GND_399
GND_400
GND_401
GND_402
GND_403
GND_404
GND_405
GND_406
GND_407
GND_408
GND_409
GND_410
GND_411
GND_412
GND_413
GND_414
GND_415
GND_416
GND_417
GND_418
GND_419
GND_420
GND_421
GND_422
GND_423
GND_424
GND_425
GND_426
GND_427
GND_428
GND_429
W9
W10
W11
W15
W16
W17
W18
W19
W20
W21
W22
W27
W28
W29
W30
W31
Y9
Y10
Y11
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y30
Y31
Y34
Y37
AA7
AA8
AA9
AA10
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA22
AA23
AA24
AA25
AA26
AA30
AA31
AA35
AB7
AB8
AB9
AB10
AB11
AB12
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB30
AB31
AB32
AB33
AB34
AC7
AC8
AC9
AC10
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC31
AC32
AC33
AC34
AC35
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD31
AD32
AD33
AD34
AE7
AE8
AE9
AE10
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE27
AE28
AE29
AE30
AE31
AE32
AE33
AE34
AE35
AF7
AF8
AF9
AF10
AF11
AF16
AF17
AF27
AF28
AF29
AF30
AF31
AF32
A3
GND_1
A9
GND_2
A19
GND_3
A22
GND_4
A25
GND_5
A28
GND_6
A31
GND_7
A34
GND_8
A36
GND_9
B6
GND_10
B19
GND_11
B36
GND_12
B37
GND_13
C2
GND_14
C3
GND_15
C19
GND_16
C36
GND_17
C37
GND_18
D10
GND_19
D11
GND_20
D12
GND_21
D13
GND_22
D14
GND_23
D22
GND_24
D25
GND_25
D29
GND_26
D32
GND_27
D36
GND_28
D37
GND_29
E10
GND_30
E11
GND_31
E12
GND_32
E13
GND_33
E34
GND_34
E35
GND_35
E36
GND_36
F11
GND_37
F12
GND_38
F13
GND_39
F17
GND_40
F26
GND_41
F28
GND_42
F29
GND_43
F30
GND_44
F31
GND_45
F32
GND_46
F33
GND_47
G6
GND_48
G9
GND_49
G11
GND_50
G12
GND_51
G13
GND_52
G15
GND_53
G16
GND_54
G17
GND_55
G18
GND_56
G19
GND_57
G20
GND_58
G21
GND_59
G22
GND_60
G23
GND_61
G24
GND_62
G25
GND_63
G27
GND_64
G28
GND_65
G29
GND_66
G30
GND_67
G31
GND_68
G32
GND_69
G35
GND_70
H8
GND_71
H9
GND_72
H10
GND_73
H11
GND_74
H12
GND_75
H13
GND_76
H14
GND_77
H15
GND_78
H16
GND_79
H17
GND_80
H18
GND_81
H19
GND_82
H20
GND_83
H21
GND_84
H22
GND_85
H23
GND_86
H24
GND_87
H25
GND_88
H26
GND_89
H27
GND_90
H28
GND_91
H29
GND_92
H30
GND_93
H31
GND_94
H32
GND_95
J7
GND_96
J8
GND_97
J9
GND_98
J10
GND_99
J11
GND_100
J12
GND_101
J13
GND_102
J14
GND_103
J16
GND_104
J17
GND_105
J18
GND_106
J19
GND_107
J20
GND_108
J21
GND_109
J22
GND_110
J23
GND_111
J24
GND_112
J25
GND_113
J26
GND_114
J27
GND_115
J28
GND_116
J29
GND_117
J30
GND_118
J31
GND_119
K7
GND_120
K8
GND_121
K9
GND_122
K10
GND_123
K11
GND_124
K12
GND_125
K13
GND_126
K14
GND_127
K15
GND_128
K16
GND_129
K17
GND_130
K18
GND_131
K19
GND_132
K20
GND_133
K21
GND_134
K22
GND_135
K23
GND_136
K24
GND_137
K25
GND_138
K26
GND_139
K27
GND_140
K28
GND_141
K29
GND_142
K30
GND_143
GND_144
GND_145L9GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161M9GND_162
GND_163
GND_164
GND_165
K31
L16
L18
L19
L22
L23
L24
L25
L26
L27
L28
L29
L30
L31
GND_166
L34
L37
M15
M16
M17
M18
M19
M26
LGE5331(LM15U)
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173N7GND_174N8GND_175N9GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186P9GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
M27
M28
M29
M30
M31
N15
N16
N17
N18
N19
N27
N28
N29
N30
N31
GND_194
P10
P11
P12
P13
P14
P15
P16
P17
IC100
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_201
GND_202
GND_203
GND_204
GND_205
P18
P19
P20
P21
GND_206R7GND_207R8GND_208R9GND_209
P27
P28
P29
P30
P31
P34
P37
GND_210
GND_211
GND_212
GND_213
GND_214
GND_215
GND_216
GND_217
GND_218
GND_219
GND_220
GND_221
GND_222
GND_223
GND_224
GND_225
GND_226T7GND_227T8GND_228T9GND_229
GND_230
GND_231
GND_232
GND_233
GND_234
GND_235
GND_236
GND_237
GND_238
GND_239
GND_240
GND_241
GND_242
GND_243
GND_244
GND_245
GND_246U8GND_247U9GND_248
GND_249
GND_250
GND_251
GND_252
GND_253
GND_254
GND_255
GND_256
GND_257
GND_258
GND_259
GND_260
GND_261
GND_262
GND_263
GND_264
GND_265
GND_266
GND_267V8GND_268V9GND_269
GND_270
GND_271
GND_272
GND_273
GND_274
GND_275
GND_276
GND_277
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R27
R28
R29
R30
R31
T10
T11
T12
T15
T16
T17
T18
T19
T20
T21
T22
T23
T27
T28
T29
T30
T31
U10
U11
U12
U13
U14
U15
U16
U17
U20
U21
U22
U23
U24
U28
U29
U30
U31
U34
U37
V10
V11
GND_278
V15
V16
V17
V18
V19
V20
V21
V22
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
LM15U_GND
2014-1-21
05
Page 40
CI Region
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CI SLOT
+5V_CI_ON
CI_DATA[0-7]
* Option name of this page : CI_SLOT
(because of Hong Kong)
CI TS INPUT
+5V_NORMAL
R900
10K
CI_SLOT
CLOSE TO MSTAR
CI DETECT
/CI_CD2
/CI_CD1
/CI_CD1
TPI_DATA[4]
TPI_DATA[5]
TPI_DATA[6]
TPI_DATA[7]
CI_IORD
CI_IOWR
CI_MDI[0]
CI_MDI[1]
CI_MDI[2]
CI_MDI[3]
CI_MDI[4]
CI_MDI[5]
CI_MDI[6]
CI_MDI[7]
PCM_RESET
CAM_WAIT_N
TPI_CLK
TPI_VAL
TPI_SOP
TPI_DATA[0]
TPI_DATA[1]
TPI_DATA[2]
TPI_DATA[3]
CLOSE TO MSTAR
CI_MISTRT
CI_MIVAL_ERR
CI_MCLKI
GND
REG
CI_SLOT
IC900
74LVC1G32GW
1B 5 VCC
3GND2A4 Y
OR_GATE_CI_TI
IC900-*1
SN74LVC1G32DCKR
1A5
B
2
3
CI_SLOT
R901
R902
CI_SLOT
AR900
/CI_CD2
CI_SLOT
C900
2pF
50V
+3.3V_NORMAL
OR_GATE_CI_TOSHIBA
IC900-*2
TOSHIBA ELECTRONICS KOREA CORPORATION
VCC
IN_B
1
IN_A
2
Y
GND
4
3
AR901
33
33
CI_SLOT
R906
CI_SLOT
47
CI_SLOT
47
+5V_NORMAL
VCC
5
OUT_Y
4
+5V_NORMAL
10K
CI_SLOT
GND
CI_SLOT
AR910 33
CI_SLOT
R907
10K
CI_SLOT
R908 10K
CI_SLOT
C901
0.1uF
R909
R910
100
CI_SLOT
+3.3V_NORMAL
R911
10K
CI_SLOT
C902
10uF
10V
CI_SLOT
JK900
CI_SLOT
R912
100
10K
10125901-115LF
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
65
66
67
68
69
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 60
27 61
28 62
29 63
30 64
31
32
33
34
R914
R915
C903
0.1uF
CI_SLOT
47
CI_SLOT
CI_SLOT
100
GND
G1 G2
GND
GND
GND
R913
47
CAM_CD1_N
CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DATA[0-7]
R916
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[8]
CI_ADDR[13]
CI_ADDR[14]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
10K
/PCM_CE1
CI_OE
+5V_NORMAL
R917
10K
CI_SLOT
CI_WE
GND
CI_ADDR[0-14]
CAM_IREQ_N
C904
0.1uF
CI_SLOT
CLOSE TO MSTAR
OLED_CI_SLOT
JK900-*1
10125901-015LF
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
65
66
67
68
69
CI HOST I/F
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 60
27 61
28 62
29 63
30 64
31
32
33
34
G1 G2
CI_MDI[7]
CI_MDI[6]
CI_MDI[5]
CI_MDI[4]
CI_MDI[3]
CI_MDI[2]
CI_MDI[1]
CI_MDI[0]
CI_MISTRT
CI_MIVAL_ERR
CI_MCLKI
CI_ADDR[0]
CI_ADDR[1]
CI_ADDR[2]
CI_ADDR[3]
CI_ADDR[4]
CI_ADDR[5]
CI_ADDR[6]
CI_ADDR[7]
CI_ADDR[8]
CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[14]
CI_IORD
CI_IOWR
REG
CI_OE
CI_WE
CI_DATA[0]
CI_DATA[1]
CI_DATA[2]
CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[0-7]
CI_DATA[7]
CI_SLOT
AR903 33
CI_SLOT
AR902
R918 33
R919 33
R920 100
CI_SLOT
AR908 33
AR909 33
AR913 33
CI_SLOT
AR904 33
CI_SLOT
AR905 33
33
CI_SLOT
CI_SLOT
AR906
33
CI_SLOT
AR907
33
CI_SLOT
CI_SLOT
CI_SLOT
CI_SLOT
TPO_DATA[7]
TPO_DATA[6]
TPO_DATA[5]
TPO_DATA[4]
TPO_DATA[3]
TPO_DATA[2]
TPO_DATA[1]
TPO_DATA[0]
EB_ADDR[8]
EB_ADDR[9]
EB_ADDR[10]
EB_ADDR[11]
EB_ADDR[12]
EB_ADDR[13]
EB_ADDR[14]
CAM_REG_N
EB_OE_N
EB_WE_N
EB_DATA[0]
EB_DATA[1]
EB_DATA[2]
EB_DATA[3]
EB_DATA[4]
EB_DATA[5]
EB_DATA[6]
EB_DATA[7]
EB_ADDR[0]
EB_ADDR[1]
EB_ADDR[2]
EB_ADDR[3]
EB_ADDR[4]
EB_ADDR[5]
EB_ADDR[6]
EB_ADDR[7]
EB_BE_N1
EB_BE_N0
TPO_SOP
TPO_VAL
TPO_CLK
EB_DATA[0-7]
TPO_DATA[0-7]
CI POWER ENABLE CONTROL
+5V_NORMAL
C905
0.1uF
50V
CI_SLOT
R922
PCM_5V_CTL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R921
10K
CI_SLOT
100
IN
EN
IC901
AP2151WG-7
5
CI_SLOT
4
CI_DATA[0-7]
EB_DATA[0-7]
+5V_CI_ON
OUT
1
GND
2
FLG
3
C906
1uF
25V
CI_SLOT
R923
10K
CI_SLOT
LM15U
PCMCI
2014-10-17
9
Page 41
+3.5V_ST
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R2301
1
RL_ON
+3.5V_ST
Digital Power B/D
R2300
10K
L2301
UBW2012-121F
C2302
0.1uF
16V
O
+12V
10K
C2304
0.1uF
50V
40 ~ 65
70 ~ 79
2
3
PWM_DIM
UBW2012-121F
UBW2012-121F
2
Q2300 2N3906S-RTK
KEC_RL_ON_TR
L2302
L2303
24 PIN INCH
NC
GND X
’15 UHD POWER
+3.3V - eMMC
+3.3V_NORMAL
3.3V_EMMC
L2304
PZ1608U121-2R0TF
C2308
C2309
0.1uF
22uF
16V
10V
+1.8V - LM15U, eMMC
& Vx1 pull-up
+3.3V_NORMAL
1
3
OS MODULE
L/D_CLK
L/D_DI
NXP_RL_ON_TR
Q2300-*1 MMBT3906(NXP)
100
R2304
22 PIN
GND
24V
+1.8V
PZ1608U121-2R0TF
L2305
OS MODULE
SMA W200 -H28 S5K[ MIRR OR]
P23 01
PWR _ON
1
1
PDI M#1
3
3
3.5 V
5
5
3.5 V
7
7
GND
9
9
12V
11
11
12V
13
13
12V
15
15
GND
17
17
24V
19
19
24V
21
21 22
GND
23
23 24
L/D _CLK
25
L/D _DI
27
DVDD18_EMMC
C2307
0.1uF
16V
LGE MODULE
SMA W200 -H24 S5[M IRRO R]
P23 00
INV _CTL
2
2
PDI M#2
4
4
GND
6
6
3.5 V
8
8
GND
10
10
12V
12
12
12V
14
14
GND
16
16
24V
18
18
24V
20
20
GND or 24V
22
NC or G ND
24
GND
26
L/D _VSY NC
28
25
29
.
C2312
22uF
10V
+1.8V
R2311 100
R2313
NON_DIGITAL_POWER_B/D
UBW2012-121F
UBW2012-121F
UBW2012-121F
DIGITAL_POWER_B/D
L2315
UBW2012-121F
L2316
UBW2012-121F
NON_DIGITAL_POWER_B/D
100
L2317
L2307
L2308
OS MODULE
+3.3V_NORMAL
R2314
1K
INV_CTL
L/D_VSYNC
+12V
C2316
10uF
16V
+3.3V_NORMAL
LD2300
3.3V_LED
R23 15
3.3 K
3.3V_LED
C2319
0.1uF
PWM_DIM2
50V
C2317
10uF
16V
+24V
C2318
10uF
16V
+12V
L2321
L2322
MLB-201209-0120P-N2
PANEL_CTL
+12V
L2309
PZ1608U121-2R0TF
C2324
C2322
0.1uF
10uF
16V
1.0V_DCDC_TI
C2332-*1
3300pF
50V
Switching freq: 700K
PANEL_POWER
MLB-201209-0120P-N2
C23 27
10u F
25V
OPT
C2371
10uF
10V
C2330
0.1uF
25V
R2328
10K
C2331
0.01uF
50V
R2329
R2331
1.8K
B
DDR +1.5V
R2321
R2320
C2325
100pF
50V
4.7K
18K
1%
1%
R2322
22K
1%
R2
Vout=0.765*(1+R1/R2)=1.554V
R1
10K
C
E
C2328
1uF
10V
OPT
OPT
C2335
C2367
10uF
10uF
25V
25V
Q2321
2N3904S
KEC_PANEL_CTL_TR
C
Q2321-*1
B
MMBT3904(NXP)
NXP_PANEL_CTL_TR
E
ROHM_BD9D321_1.5V_DDR_DCDC
R2326
10K
EN
FB
VREG
SS
C2332
2200pF
50V
1.0V_DCDC_ROHM
OPT
C2315
1uF
25V
POWER_ON/OFF2_3
IC2303
BD9D321EFJ
1
9
2
THERMAL
3
4
3A
AOS_PANEL_POWER_FET
IC2309
AO4447A
S_1
1
S_2
2
S_3
3
G
4
C2368
10uF
25V
OPT
[EP]
VIN
8
BOOT
7
SW
6
GND
5
8
7
6
5
D_4
D_3
D_2
D_1
0.1uF
C2336
R2359
2K
OPT
16V
L2312
2.2uH
PS064T-2R2MS
TYP 6000mA
R2360
2K
OPT
S_1
S_2
S_3
+1.5V_DDR
C2338
22uF
10V
C23 69
10u F
25V
OPT
ROHM_PANEL_POWER_FET
IC2309-*1
RRH140P03TB
1
2
3
4G5
C2339
22uF
10V
PANEL_VCC
D_4
8
D_3
7
D_2
6
D_1
VREG5
DCDC_DIODE
C2370
0.1uF
25V
TI_TPS54327_1.5V_DDR_DCDC
IC2303-*1
TPS54327DDAR
EN
1
VFB
9
2
THERMAL
3
SS
4
ZD2302
2.5V
RESET_IC_DIODES
IC2307-*1
Power_DET
+12V
PD_+12V
R2335
2.7K
1%
PD_+12V
R2336
1.2K
1%
PD_UHD_24V
R2340-*2
9.1K
1%
PD_UHD_24V
R2341-*2
1.6K
1%
PD_20V
R2340-*1
5.6K
1%
PD_20V
R2341-*1
1.3K
1%
+24V
+3.5V_ST
PD_24V
R2340
8.2K
1%
PD_24V
R2341
1.5K
1%
PD_+3.5V
R2343
0
5%
C2350
0.1uF
16V
C2351
0.1uF
16V
PD_20_24V
R2349
100K
RESET_IC_ROHM
IC2307
BD48K28G
VDD
3
PD_20_24V
R2348
100K
PD_20_24V_ROHM
IC2308
BD48K28G
VDD
3
+3.5V_ST
R2354
10K
OPT
VOUT
2
1
GND
R2355
0
PWR_DET_MERGE
R2356
VOUT
2
1
GND
0
PWR_DET_SEPARATE
ST_3.5V-->3.5V
APX803D29
RESET
2
1
PD_20_24V_DIODES
IC2308-*1
APX803D29
RESET
2
1
POWER_DET
C2364
0.1uF
16V
not to RESET
at 8kV ESD
C2365
0.1uF
PWR_DET_SEPARATE
16V
POWER_DET_1
24V-->3.48V
20V-->3.51V
12V-->3.58V
VCC
3
GND
VCC
3
GND
+5.0V normal & USB
C2347
OPT
2200pF
C2349
22SS23FB24
21
20
19
18
17
16
15
14
NFAULT2
/USB_OCD1
C2352
100pF
0.047uF
50V
25V
LX_3
LX_2
LX_1
BST
SW_IN2
SW_IN1
NFAULT1
Vout=0.6*(1+R1/R2)
5.1V:R1-51K, R2-6.8K
R23 39 1 6K 1%
R23 4215 0K 1%
RSET2
27
IC2305
6A
9EN10
SW_OUT211SW_OUT1
+5V_USB_1
POWER_ON/OFF1
50V
R2344
10K
COMP25RLIM26RSET1
12
SW_EN213SW_EN1
USB_CTL1
+5V_USB_2
USB_CTL2
+24V
[EP]GND
VIN
8
VBST
7
SW
6
GND
5
L2314
120-ohm
C2340
10uF
35V
OPT
C2341
10uF
35V
VIN_1
VIN_2
VIN_3
C2344
0.1uF
50V
PGND_1
PGND_2
PGND_3
1uF
25V
C23 43
C2346
0.0068uF
R23 37 1 6K 1 %
[EP]
AGND
28
1
THERMAL
2
29
3
4
SN1302001(TPS65286RHDR)
5
6
V7V
7
8
MODE/SYNC
50V
10K
R2338
C2357
82pF
5%
50V
L2313
4.7uH
C2355
0.047uF
25V
100K
R2350
R2
1%
R1
1%
1/16W
R2353
/USB_OCD2
1/16W
1/16W
1/16W
6.8K
51K
5%
R2351
R2352
100K
C2359
22uF
10V
C2360
1uF
10V
C2362
22uF
10V
C2363
10uF
10V
ZD2304
DCDC_DIODE
+5V_NORMAL
L2300
BLM18PG121SN1D
Placed on SMD-TOP
C2300
C2301
10uF
10uF
16V
16V
+12V
C2303
0.1uF
16V
OPT
IC2301
AZ1117EH-ADJTRG1
OUT IN
ADJ/GND
+3.3V_NORMAL
IC2302
BD86106EFJ
EAN62653301
PGND
VIN
AGND
FB
[EP]
SW_2
1
8
SW_1
9
2
7
THERMAL
EN
3
6
COMP
4
5
6A
R2302
C2305
0.1uF
16V
C2306
0.0068uF
50V
20K
R2303
10K
Vout=0.8*(1+R1/R2)
1%
1/16W
1%
1/16W
L2306
2uH
OPT
POWER_ON/OFF2_1
C2313
10uF
10V
75
33
R2307
R2308
C2314
10uF
10V
R2309
1
C2310
10uF
10V
C2342
100uF
C2311
10uF
10V
OPT
C2345
10uF
10V
MAX 2.7A
2.5V
ZD2303
DCDC_DIODE
+1.1V or +1.15V _CPU CORE
+1.1V_VDDC_CPU
+12V
L2310
PZ1608U121-2R0TF
MAX A
+3.3V_NORMAL
OPT
OPT
C2348
10uF
47pF
50V
10V
R2305
1.5K
1% C2358
R2306
30K
1%
R2310
10K
1%
R1
R2
ZD2300
DCDC_DIODE
Placed on SMD-TOP
C2323
C2321
C2320
10uF
16V
10uF
16V
0.1uF
16V
OPT
Vout=0.8*(1+R1/R2)
R1:15K/R2:56K, V=1.00V(CPU_VID0=L,CPU_VID1=L) Voltage drop 0.01V
R1:15K/R2:56K//240K, V=1.05V(CPU_VID0=H,CPU_VID1=L) Voltage drop 0.01V
R1:15K/R2:56K//240K, V=1.05V(CPU_VID0=L,CPU_VID1=H) Voltage drop 0.01V
R1:15K/R2:56K//240K//240K, V=1.10V(CPU_VID0=H,CPU_VID1=H) Voltage drop 0.01V
PGND
VIN
AGND
FB
IC2300
BD86106EFJ
EAN62653301
1
2
THERMAL
3
4
6A
L2311
C2329
0.0068uF
50V
R2325
10K
2uH
OPT
C2353
C2333
10uF
10uF
10V
10V
POWER_ON/OFF2_4
C2334
100uF
+3.3V_NORMAL
R2312
10K
CPU_VID0
D
Q2301-*1
G
2N7002K
S
DIODEDS_CPU_CORE_VID_FET
OPT
C2354
10uF
10V
R2316
0 5%
OPT
C2356
10uF
10V
R2-1.13V
R2317
20K
1%
R2318
200K
1%
G
C2337
47pF
50V
D
CPU_VID1
S
2N7002KA
Q2301
KEC_CPU_CORE_VID_FET
R2-1.13V
+3.3V_NORMAL
R2319
10K
R2323
0 5%
D
Q2302-*1
G
2N7002K
S
DIODEDS_CPU_CORE_VID_FET
R2327
20K
1%
R2330
200K
1%
G
D
R2-1.1V
S
2N7002KA
Q2302
KEC_CPU_CORE_VID_FET
R2332
15K
1%
R2333
13K
1%
R2334
43K
1%
R1
R2
5V
ZD2301
DCDC_DIODE
[EP]
SW_2
8
SW_1
9
7
EN
6
R2324
6.8K
COMP
5
C2326
0.1uF
16V
LM15 Power SEQUENCE
POWER_ON/OFF1(5V)
POWER_ON/OFF2_1(3.3V)
POWER_ON/OFF2_3(1.5V, 2.5V)
POWER_ON/OFF2_4(1.1V)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
LM15U_PWR_1_UHD
2014-00-01
07
Page 42
CORE_VID1
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.3V_NORMAL
R2516
10K
R2517
0 5%
POWER_ON/OFF2_4
OPT
C2500
0.1uF
16V
R2-3
R25 18
120 K
1%
1/1 6W
D
G
S
D
G
S
+1.1V or +1.15V _CORE
R2507
1K
R1
1%
R2
1/1 6W
1%
30K
R25 19
CORE_VID0
2N7002KA
Q2501
KEC_CORE_DCDC_FET
Q2501-*1
2N7002K
DIODES_CORE_DCDC_FET
+3.3V_NORMAL
R2500
10K
R2501
0 5%
R2-2
R25 02
120 K
1%
G
D
Q2500-*1
G
2N7002K
DIODES_CORE_DCDC_FET
S
1/1 6W
30K
1/1 6W
D
S
1/1 6W
R2505
12K
12K
R25 06
1%
R25 03
2N7002KA
Q2500
KEC_CORE_DCDC_FET
13K
R25 04
1/16W
1%
1/1 6W
1%
C2501
1uF
10V
R2-1
C2502
0.033uF
50V
R2508
100K
1/16W
1%
R2510
100
1/16W
IC2501
MP8762HGLE-Z
EN
1
FREQ
2
FB
3
SS
4
AGND
5
10A
PG
6
VCC
7
BST
8
R2509
33
1/16W
5%
1%
16
15
14
13
12
11
10
9
C2503
0.1uF
16V
SW_2
SW_1
IN_2
PGND_4
PGND_3
PGND_2
PGND_1
IN_1
1%
1/16W
R2512
220K
1/10W
5%
430K
R2511
LPBN8050T-1R0N
L2500
1.0uH
C2504
10uF
25V
C2506
330pF
50V
C2505
10uF
25V
C2507
22uF
10V
C2508
22uF
10V
L2501
+1.1V_VDDC
C2509
22uF
10V
DCDC_DIODE
+12V
2.5V
ZD2500
Vout=0.611*(1+R1/R2)
R1:13K/R2:22K, V=0.95V(CORE_VID0=L,CORE_VID1=L) Voltage drop 0.02V
R1:13K/R2:22K//150K, V=1.00V(CORE_VID0=H,CORE_VID1=L) Voltage drop 0.02V
R1:13K/R2:22K//150K, V=1.00V(CORE_VID0=L,CORE_VID1=H) Voltage drop 0.02V
R1:13K/R2:22K//150K//150K, V=1.05V(CORE_VID0=H,CORE_VID1=H) Voltage drop 0.02V
MAX 7A
POWER_ON/OFF2_3
+3.3V_NORMAL
TU_JP
C2510
0.1uF
16V
+2.5V
TU_JP
R2513
10K
TU_JP
IC2502
TU_JP
C2512
0.1uF
TJ4220GDP-ADJ
1
NC_1
2
EN2
3
VIN3
2A
4
NC4
EAN62206201
9
THERMAL
Vout=0.6*(1+R1/R2)
8
7
6
5
[EP]GND
GND
ADJ/SENSE
VOUT
NC_2
TU_JP
R2514
R25 15
22K
R2
R1
TU_JP
47K
C2513
10uF
10V
+2.5V_Normal
TU_JP
OPT
5V
ZD2501
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
LM15U_PWR_2_ALL
2014-11-26
25
Page 43
Renesas MICOM
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
For Debug
+3.5V_ST
X3000-*1
32.768KHz
EPSON_MICOM_CRYSTAL
MICOM_DEBUG
P3000
12507WS-04L
5
1
2
3
4
Don’t remove R3016,
not making float P40
R3016 1K
R3014 10K
MICOM_DEBUG
LM15 Power SEQUENCE
POWER_ON/OFF1(5V)
POWER_ON/OFF2_1(3.3V)
POWER_ON/OFF2_3(1.5V)
POWER_ON/OFF2_4(1.1V)
SOC_RESET
MICOM MODEL OPTION
+3.5V_ST
MICOM_DEBUG
MICOM_RESET
I2C_SCL_MICOM
I2C_SDA_MICOM
3D&L_DIM_EN
PANEL_CTL
WOL/WIFI_POWER_ON
HDMI_CEC_MICOM
POWER_ON/OFF2_3
EYE_SDA
EYE_SCL
+3.5V_ST
50V
50V
12pF
12pF
C3002
DAISHINKU_MICOM_CRYSTAL
HDMI_WAUP:HDMI_INIT
MHL_DET_LM15
+3.5V_ST
C3000
0.1uF
P62
P63
R3037 0
10K
GND
R3032
C3001 0.47uF
P121/X1
REGC
VSS
VDD
46
47
48
1
2
3
4
5
6
R5F100GEAFB#30
7
8
9
10
11
12
13
14
15
MHL_DET_LM15
+3.5V_ST
R3021
LCD
5%
10K
R3021-*1
1K
OLED
1/16W
P60/SCLA0
P61/SDAA0
P31/TI03/TO03/INTP4
IR
P75/KR5/INTP9/SCK01/SCL01
R3038
P74/KR4/INTP8/SI01/SDA01
100
P73/KR3/SO01
P72/KR2/SO21
P71/KR1/SI21/SDA21
P70/KR0/SCK21/SCL21
P30/INTP3/RTC1HZ/SCK11/SCL11
AR3000
3.3K
EYE_Q
C3003
X3000
32.768KHz
R3028
4.7M
OPT
POWER_DET_1
P124/XT2/EXCLKS
P123/XT1
P137/INTP0
P122/X2/EXCLK
41
42
43
44
45
IC3000
16
17
18
19
20
MICOM_RESET
R3029 33
P40/TOOL0
RESET
40
21
LOGO_LIGHT
MICOM_DEBUG
LOGO_LIGHT
WIFI_EN
C3004
0.1uF
16V
P120/ANI19
P41/TI07/TO07
37
38
39
36
35
34
33
32
31
30
29
28
27
26
25
22
23
24
+3.5V_ST
10K
MICOM_RESET_SW
SW3000
R3030
JTP-1127WEM
1%
OPT
270K
R3031
1/1 6W
1 2
4 3
P140/PCLBUZ0/INTP6
P00/TI00/TXD1
P01/TO00/RXD1
P130
P20/ANI0/AVREFP
P21/ANI1/AVREFM
P22/ANI2
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
RL_ON
SCART_MUTE
POWER_ON/OFF2_4
POWER_ON/OFF2_1
KEY2
KEY1
MODEL1_OPT_3
MODEL1_OPT_0
SIDE_HP_MUTE
MHL_EN
MODEL1_OPT_1
SCART_MUTE
POWER_ON/OFF2_4
MHL_EN
P146
MICOM MODEL OPTION
OPT
R3006 10K
R3004 10K
R3008 10K
MICOM_OLED
MICOM_LCD
R3009 10K
R3013 10K
MICOM_LOGO
R3012 10K
MICOM_NON_LOGO
MODEL1_OPT_0
MODEL1_OPT_1
MODEL1_OPT_3
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_3 LM15U
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
0
NON LOGO
LCD
P147/ANI18
P17/TI02/TO02
1
LOGO
OLED
H15
P51/INTP2/SO11
P50/INTP1/SI11/SDA11
P16/TI01/TO01/INTP5
POWER_DET
WOL_WAKE_UP
POWER_ON/OFF1
LM15U : Active high reset
P13/TXD2/SO20
P10/SCK00/SCL00
P14/RXD2/SI20/SDA20
P12/SO00/TXD0/TOOLTXD
P15/PCLBUZ1/SCK20/SCL20
P11/SI00/RXD0/TOOLRXD/SDA00
LED_R
LED_R
WOL_CTL
SOC_RESET
INV_CTL
R3015
10K
MICOM_LM15U
SOC_TX
SOC_RX
EDID_WP
AMP_MUTE
URSA_RESET_MICOM
URSA_RESET_MICOM
CEC_REMOTE
LM15U
MICOM
D3000
BAT54_SUZHO
S
For CEC
R3033
27K
G
Q3001-*1
SI1012CR-T1-GE3
D
VISHAY_CEC_FET
+3.5V_ST
G
D
S
Q3001
RUE003N02
ROHM_CEC_FET
R3034
120K
HDMI_CEC_MICOM
2014-12-30
30
Page 44
BODY_SHIELD
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
FOOSUNG_HDMI_JACK
BODY_SHIELD
FOOSUNG_HDMI_JACK
MHL
+5V_NORMAL
20
19
HOT_PLUG_DETECT
18
VDD[+5V]
17
DDC/CEC_GND
16
SDA
15
SCL
14
RESERVED
13
CEC
12
TMDS_CLK-
11
TMDS_CLK_SHIELD
10
TMDS_CLK+
9
TMDS_DATA0-
8
TMDS_DATA0_SHIELD
7
TMDS_DATA0+
6
TMDS_DATA1-
5
TMDS_DATA1_SHIELD
4
TMDS_DATA1+
3
TMDS_DATA2-
2
TMDS_DATA2_SHIELD
1
TMDS_DATA2+
DAADR019A
JK3301
20
19
HOT_PLUG_DETECT
18
VDD[+5V]
17
DDC/CEC_GND
16
SDA
15
SCL
14
RESERVED
13
CEC
12
TMDS_CLK-
11
TMDS_CLK_SHIELD
10
TMDS_CLK+
9
TMDS_DATA0-
8
TMDS_DATA0_SHIELD
7
TMDS_DATA0+
6
TMDS_DATA1-
5
TMDS_DATA1_SHIELD
4
TMDS_DATA1+
3
TMDS_DATA2-
2
TMDS_DATA2_SHIELD
1
TMDS_DATA2+
DAADR019A
JK3300
L3300
PZ1608U121-2R0TF
MHL
5V_MHL
5V_HDMI_1
MHL
C3300
0.1uF
16V
VA3300
5V_HDMI_2
HDMI_ARC
CEC_REMOTE
ESD_HDMI
VA3302
ESD_HDMI
CEC_REMOTE
VA3301
ESD_HDMI
Q3300
2N3904S
R3300
100K
KEC_HDMI_HPD_3_TR
Q3300-*1
MMBT3904(NXP)
NXP_HDMI_HPD_3_TR
R3301
100K
MMBT3904(NXP)
VA3303
NXP_HDMI_HPD_2_TR
ESD_HDMI
5V_MHL
MHL
MHL_DET_LM15
R3302
R3337
1K
33
C
OPT
1K
B
R3303
E
C
B
E
D3302
RCLAMP7534P
OPT
1
5
2
4
3
D3303
RCLAMP7534P
OPT
1
5
2
4
3
R3304
1K
C
Q3301
2N3904S
E
KEC_HDMI_HPD_2_TR
C
Q3301-*1
E
D3301
RCLAMP7534P
OPT
1
5
2
4
3
D3300
RCLAMP7534P
OPT
1
5
2
4
3
C3301
ZD3300
0.1uF
5V
OPT
16V
R3305
4.7K
NON_HDMI_EXT_EDID
VA3304
ESD_HDMI
OPT
R3338
R3307
33
R3306
1K
B
B
GND
HDMI_HPD_1
R3339
4.7K
HDMI_EXT_EDID
R3329
33
R3330 33
VA3306
ESD_HDMI
CK-_HDMI1
CK+_HDMI1
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
D1+_HDMI1
D2-_HDMI1
D2+_HDMI1
R3308
1.8K
4.7K
HDMI_HPD_2
VA3305
ESD_HDMI
CK-_HDMI2
CK+_HDMI2
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
Current Limit
IC3300
TPS2553DBV
IN
1
MHL
2
EN
3
/MHL_OCP
R3309
1.8K
DDC_SDA_1
DDC_SCL_1
5V_DET_HDMI_1
R3312
3.3K
5V_DET_HDMI_2
R3310
3.3K
VA3307
ESD_HDMI
R3331 33
R3332 33
DDC_SDA_2
DDC_SCL_2
HDMI2 with ARC
MHL
L3301
BLM31PG500SN1
50-ohm
MHL
R3311
20K
1%
D3304
30V
OPT
R3313
100K
MHL
/MHL_OCP
OUT
6
ILIM
5
FAULT
4
HDMI3
5V_HDMI_3
MHL
C3302
10uF
10V
TMDS_DATA2_SHIELD
TMDS_DATA1_SHIELD
TMDS_DATA0_SHIELD
TMDS_CLK_SHIELD
HOT_PLUG_DETECT
VA3313
ESD_5V_HDMI_3
TMDS_DATA2+
TMDS_DATA2-
TMDS_DATA1+
TMDS_DATA1-
TMDS_DATA0+
TMDS_DATA0-
TMDS_CLK+
TMDS_CLK-
RESERVED
DDC/CEC_GND
VDD[+5V]
CNPLUS_HDMI_JACK
JK3300-*1
5501-56219
1
2
3
4
5
6
7
8
9
10
11
12
CEC
13
14
SCL
15
SDA
16
17
18
19
20
BODY_SHIELD
TMDS_DATA2+
TMDS_DATA2_SHIELD
TMDS_DATA2-
TMDS_DATA1+
TMDS_DATA1_SHIELD
TMDS_DATA1-
TMDS_DATA0+
TMDS_DATA0_SHIELD
TMDS_DATA0-
TMDS_CLK+
TMDS_CLK_SHIELD
TMDS_CLK-
RESERVED
DDC/CEC_GND
VDD[+5V]
HOT_PLUG_DETECT
CNPLUS_HDMI_JACK
JK3301-*1
5501-56219
1
2
3
4
5
6
7
8
9
10
11
12
CEC
13
14
SCL
15
SDA
16
17
18
19
20
BODY_SHIELD
TMDS_DATA2+
TMDS_DATA2_SHIELD
TMDS_DATA2-
TMDS_DATA1+
TMDS_DATA1_SHIELD
TMDS_DATA1-
TMDS_DATA0+
TMDS_DATA0_SHIELD
TMDS_DATA0-
TMDS_CLK+
TMDS_CLK_SHIELD
TMDS_CLK-
RESERVED
DDC/CEC_GND
VDD[+5V]
HOT_PLUG_DETECT
CNPLUS_HDMI_JACK
JK3302-*1
5501-56219
1
2
3
4
5
6
7
8
9
10
11
12
CEC
13
14
SCL
15
SDA
16
17
18
19
20
BODY_SHIELD
BODY_SHIELD
20
19
HOT_PLUG_DETECT
18
VDD[+5V]
17
DDC/CEC_GND
16
SDA
15
SCL
14
RESERVED
13
CEC
12
TMDS_CLK-
11
TMDS_CLK_SHIELD
10
TMDS_CLK+
9
TMDS_DATA0-
8
TMDS_DATA0_SHIELD
7
TMDS_DATA0+
6
TMDS_DATA1-
5
TMDS_DATA1_SHIELD
4
TMDS_DATA1+
3
TMDS_DATA2-
2
TMDS_DATA2_SHIELD
1
TMDS_DATA2+
DAADR019A
JK3302
FOOSUNG_HDMI_JACK
EDID external EEPROM
MMBT3904(NXP)
E
Q3302-*1
C
NXP_HDMI_EXT_EDID_TR
A0
A1
A2
GND
B
ROHM_HDMI_EXT_EDID
IC3301
BR24G02FJ-3GTE2
1
2
3
4
8
7
6
5
DDC pull-up
5V_HDMI_2
AR3302
47K
1/16W
5V_HDMI_3
VA3308
ESD_HDMI
VA3312
ESD_HDMI
CEC_REMOTE
R3314
0
NON_MHL
KEC_HDMI_EXT_EDID_TR
2N3904S
VCC
WP
SCL
SDA
+5V_NORMAL
A2CA1
MMBD6100
D3305
DDC_SDA_2
DDC_SCL_2
R3315
100K
VA3309
ESD_HDMI
VA3310
5.6V
Q3302
5V_DET_HDMI_3
MHL
R3325
0
C
E
AR3 304
47K
R3324
1.8K
Q3303
2N3904S
KEC_MHL_TR
Q3303-*1
MMBT3904(NXP)
NXP_MHL_TR
5V_HDMI_1
+3.5V_ST
MHL
DDC_SDA_3
DDC_SCL_3
R3335
+3.5V_ST
MHL
R3326
10K
MHL
R3327
10K
B
C
B
E
R3328
NON_MHL
HDMI1 with MHL
+5V_NORMAL
A1
A2
MMBD6100
D3309
C
AR3305
1/16W
47K
A1
A2
MMBD6100
D3310
C
3.3K
10K
E
C
2N3906S-RTK
Q3304
KEC_MHL_TR
EDID_WP
DDC_SCL_1
DDC_SDA_1
C
Q3304-*1
B
MMBT3906(NXP)
NXP_MHL_TR
E
MHL_DET_LM15
ATMEL_HDMI_EXT_EDID
IC3301-*1
AT24C02C-SSHM-T
A0
1
A1
2
A2
3
GND
4
VCC
8
WP
7
SCL
6
SDA
5
OPT
R3316
R3336
1K
33
OPT
Q3305
2N3904S
C
E
VA3311
ESD_HDMI
R3318
1K
B
OPT
D3306
RCLAMP7534P
OPT
1
5
2
4
3
D3307
RCLAMP7534P
OPT
1
5
2
4
3
MHL
R3317
1K
C3303
0.1uF
16V
OPT
OPT
MHL
R3333 33
R3334 33
MHL
R3320
300K
MHL Spec
OPT
R3319
4.7K
HDMI_HPD_3
DDC_SDA_3
DDC_SCL_3
CK-_HDMI3
CK+_HDMI3
D0-_HDMI3
D0+_HDMI3
D1-_HDMI3
D1+_HDMI3
D2-_HDMI3
D2+_HDMI3
B
E
B
C
HDMI_EXT_EDID
R3323
4.7K
R3321
22
HDMI_EXT_EDID
R3322
22
HDMI_EXT_EDID
5V_HDMI_3
+5V_NORMAL
A2CA1
MMBD6100
D3308
1/1 6W
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
HDMI
2014-11-04
10
Page 45
COMPONENT 1 PHONE JACK
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
JK3801
PEJ038-4G6
5 M5_GND
4 M4
3 M3_DETECT
1 M1
6 M6
EAG61030012
VA3801
5.5V
VA3802
5.5V
COMP1_Pb_1
VA3803
5.5V
C3802
150pF
OPT
+3.3V_NORMAL
VA3804
5.6V
R3801
10K
1608 sizs For EMI
C3805
27pF
50V
OPT
R3802
1K
1608 sizs For EMI
0
C3804
27pF
50V
OPT
1608 sizs For EMI
0
C3803
27pF
50V
OPT
0
R3805
COMP1_DET
R3804
R3803
C3806
27pF
50V
OPT
C3807
27pF
50V
OPT
CVBS 1 PHONE JACK
C3822
R3814
0.01uF
VA3808
25V
+3.3V_NORMAL
OPT
C3824
0.1uF
50V
VA3809
5.6V
R3815
470K
1608 sizs For EMI
R3819
0
C3819
C3816
100pF
560pF
50V
50V
OPT
OPT
E
47K
Q3801
B
R3816
10K
C3823
0.01uF
25V
C
C3814
150pF
R3817
470K
OPT
FOR S2A
1uH
L3803
CM2012F1R0KT
C3815
150pF
50V
AV1_CVBS_DET
1608 sizs For EMI
R3820
0
C3817
560pF
50V
OPT
C3818
150pF
50V
C3820
100pF
50V
OPT
R3821751/4W
C3821
47pF
1%
50V
R3822
10K
R3823
COMP1/AV1/DVI_L_IN
R3825
12K
R3824
10K
0
AV1_CVBS_IN
R3826
12K
COMP1/AV1/DVI_R_IN
5.6V
COMP1_Y
R3809
C3808
100pF
R3808751/4W
R3806
75
R3807
75
1%
C3810
10pF
50V
1%
C3809
10pF
50V
1%
50V
OPT
C3811
47pF
50V
0
JK3803
PEJ038-4Y6
5 M5_GND
4 M4
3 M3_DETECT
COMP1_Pb
COMP1_Pr
EAG61030011
1 M1
6 M6
VA3806
5.5V
VA3807
5.6V
SPDIF OUT
SPDIF_OUT
RS232C
RIN1
DOUT1
DOUT1
RIN1
R3800
Solteam
JK3802-*1
JSTIB15
VIN
A
VCC
B
GND
C
Fiber Optic
4
SHIELD
foxconn
+3.3V_NORMAL
33
C3800
18pF
50V
VA3800
5.5V
OPT
ADUC 5S 02 0R5L
C3801
0.1uF
16V
JK3802
2F11TC1-EM52-4F
VIN
A
VCC
B
GND
C
Fiber Optic
4
SHIELD
HP OUT
R3810-*1
1uF
10V
R3810
150
1/10W
5%
HP_OUT
HP_OUT
R3811
150
1/10W
5%
HP_BYPASS
HP_DET
R3811-*1
1uF
10V
HP_BYPASS
HP_OUT
R3812
100
1/16W
5%
+3.3V_NORMAL
HP_OUT
R3813
10K
VA3805
5.6V
HP_OUT
1R
3 DETECT
4L
5 GND
PEJ038-3B6
JK3805
JP3814
JP3813
JP3815
1R
3 DETECT
4L
5 GND
PEJ038-3B6
JK3804
HP_LOUT_AMP
BLM18PG121SN1D
HP_ROUT_AMP
HP_OUT
L3802
BLM18PG121SN1D
HP_OUT
L3801
HP_OUT
C3812
0.22uF
10V
HP_OUT
C3813
0.22uF
10V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
JACK_COMMON_V
LM15U
JACK_COMMON_V
2014-09-06
38 01
Page 46
WIFI POWER ENABLE CONTROL
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.5V_ST
WIFI_EN
C4100
0.1uF
R4101 33
R4100
10K
OPT
C4113
0.1uF
16V
IN
EN
IC4100
AP2191WG-7
5
4
+3.5V_WIFI
OUT
1
GND
2
FLG
3
R4119
10K
OPT
P4100
+3.5V_ST
SMAW200-H18S5
C4110
+3.5V_ST
22uF
10V
R4113
0
R4114
0
C4109
5pF
50V
UG87_EMS
C4111
0.1uF
WIFI_DM
WIFI_DP
C4112
0.1uF
R4115
10K
UG87_EMS
C4108
GND
NC
WOL
SDA
SCL
GND
IR
1
3
5
7
9
11
13
15
17
19
R4111
R4112
100
100
M_RFModule_RESET
WOL/WIFI_POWER_ON
EYE_SDA
EYE_SCL
IR
LOGO_LIGHT_WAFER
LED_R
IR
AR4101
LOGO_LIGHT
R4108 0
LED_R
R4109
1.8K
OPT
C4102
0.1uF
16V
100
R4110
10K
5%
C4103
0.1uF
C4104
0.1uF
+3.5V_ST
C4105
100pF
50V
BT_RESET
LED_R
2
4
6
8
10
12
14
16
18
GND
+3.5V_WOL
USB_DM
USB_DP
GND
GND
KEY1
KEY2
+3.5V_ST
GND
D4100
RCLAMP0502BA
0.1uF
Place Near Wafer
C4107
5pF
50V
C4106
1000pF
50V
WIFI_EMI
+3.5V_ST
R4116
1%
For UG87 EMS RS
10K
1%
+3.5V_WIFI
AR4102
100
KEY1
KEY2
Place Near Micom
LOGO_LIGHT
R4102
10K
LOGO_LIGHT
C4101
0.1uF
16V
LOGO_LIGHT
IC4101
AO-R123C7G-LG
GND
G
VS
V
OUT
O
IR_PROTO
1K
R4104
LOGO_LIGHT
R4103
330
IR_PROTO
LOGO_LIGHT
B
Q4100
MMBT3904(NXP)
1/16W
5%
IR_PROTO
LOGO_LIGHT
AR4100
33
1/16W
C
E
R4105471/10W
5%
SMD bottom -> Page 135
LOGO_LIGHT_WAFER
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
IR/KEY
2014-12-25
41
Page 47
+5V_USB FOR USB3->USB1
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
/USB_OCD3
USB_CTL3
R4304
10K
+3.3V_NORMAL
R4305
4.7K
OCP USB3->USB1
+5V_NORMAL
C4300
0.1uF
16V
IC4300
BD2242G
VIN
1
GND
2
EN
3
+5V_USB_1
+5V_USB_3
USB_DM1
VOUT
6
ILIM
5
1%
OC
4
14K
R4306
USB_DP1
USB_DM2
USB_DP2
D4303
5V
D4301
+5V_USB_2
C4310
5V
10uF
C4322
10uF
10V
10V
USB1->USB3
USB_DM/DP_2.2ohm
R4300-*1
2.2
USB_DM/DP_2.2ohm
R4301-*1
2.2
USB_DM/DP_0ohm
R4300
0
USB_DM/DP_0ohm
R4301
0
C4323
22uF
10V
D4302
RCLAMP0502BA
USB_DM/DP_2.2ohm
R4302-*1
2.2
USB_DM/DP_2.2ohm
R4303-*1
2.2
USB_DM/DP_0ohm
R4302
0
USB_DM/DP_0ohm
R4303
0
C4311
22uF
10V
D4300
RCLAMP0502BA
MAX 1.0A
USB2
MAX 1.0A
1 2 3 4
JK4302
USB DOWN STREAM USB DOWN STREAM
3AU04S-305-ZC-(LG)
5
1 2 3 4
JK4300
3AU04S-305-ZC-(LG)
5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
USB_DM3
USB_DP3
SSUSB_RXP
SSUSB_RXN
SSUSB_TXP
SSUSB_TXN
USB3.0_TVS
D4304
RCLAMP0544T.TCT
6.5VTO11.0V
1 8
2 7
3 6
4 5
9
USB3.0_TVS
D4305
RCLAMP0544T.TCT
6.5VTO11.0V
1 8
2 7
3 6
4 5
9
C4312
22uF
10V
C4313
10uF
10V
ZD4302
5V
+5V_USB_3
USB3->USB1 (3.0)
MAX 1.2A
JK4301
SJ113262
VBUS
1
D-
2
D+
3
GND
4
STDA_SSRX-
STDA_SSRX+
STDA_SSTX-
STDA_SSTX+
GND_DRAIN
5
6
7
8
9
10
SHIELD
LM15U
USB3_HUB
2014-12-10
43
Page 48
Full Scart(18 Pin Gender)
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SHIELD
19
AV_DET
18
COM_GND
17
SYNC_IN
16
SYNC_OUT
15
SYNC_GND
14
RGB_IO
13
R_OUT
12
R_GND
11
G_OUT
10
G_GND
9
ID
8
B_OUT
7
AUDIO_L_IN
6
B_GND
5
AUDIO_GND
4
AUDIO_L_OUT
3
AUDIO_R_IN
2
AUDIO_R_OUT
1
DA1R018H91E
JK4600
EU
JP4613
VA4606
5.6V
EU
VA4610
5.6V
EU
VA4611
5.6V
EU
VA4607
5.5V
EU
VA4608
5.5V
EU
VA4602
5.6V
VA4603
5.5V
VA4604
5.5V
EU
VA4605
5.5V
EU
VA4600
20V
EU
VA4609
5.6V
EU
VA4601
5.6V
EU
EU
+3.3V_NORMAL
EU
CLOSE TO JUNCTION
R4601
10K
EU
R4602
100
EU
C4604
0.1uF
EU
R4614
0
68pF
OPT
C4613
SC_FB
SC_R
SC_G
SC_B
SC_ID
R4616
3.9K
Applied as default
to protect Auto AV
incase don’t using scart
DTV/MNT_L_OUT
DTV/MNT_R_OUT
EU
R4620
470K
EU
R4623
470K
EU
R4600
75
EU
R4619
10K
EU
R4622
10K
BLM18PG121SN1D
EU
C4600
1000pF
50V
BLM18PG121SN1D
EU
C4601
1000pF
50V
FOR S2A
C4605
150pF
50V
EU
EU
R4603
75
EU
R4604
75
EU
R4605
75
EU
R4607
75
EU
R4618
12K
EU
R4621
12K
EU
EU
EU
L4600
L4601
EU
L4602
1uH
EU
R4608
22
R4615
15K
SC_L_IN
SC_R_IN
EU
C4602
4700pF
C4603
4700pF
C4606
150pF
50V
EU
68pF
C4612
EU
EU
EU
EU
R4606
75
SC_DET
SC_CVBS_IN
DTV/MNT_V_OUT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SCART_JACK_V
AV2_CVBS_DET
LM15U
2014-09-18
SCART_JACK_V 46
01
Page 49
Ethernet Block
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LAN_JACK_POWER
JK5000
BS-RSD0303
R10
R11
16
SHIELD
R1
R2
R3
R4
R5
R6
R7
R8
R9
P1
P2
P3
P4
P1[CT]
P2[TD+]
P3[TD-]
P4[RD+]
P5[RD-]
P6[CT]
P7
P8
9
P10[GND]
P11
YL_C
YL_A
GN_C
GN_A
R5000
0
C5001
C5000
0.01uF
0.1uF
50V
16V
EMI
VA5000
5.5V
C5002
0.1uF
16V
VA5001
5.5V
C5003
0.01uF
50V
VA5002
5.5V
VA5003
5.5V
EPHY_TDP
EPHY_TDN
EPHY_RDP
EPHY_RDN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LAN_V
LM15U
LAN_V
2014-09-10
50 01
Page 50
AUDIO AMP(NTP7515)
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+24V_AMP
L5800
R5800
10K
C
Q5800-*1
MMBT3904(NXP)
NXP_AMP_MUTE_TR
E
AR5800
100
+3.3V_NORMAL
R5801
10K
C
B
Q5800
2N3904S
KEC_AMP_MUTE_TR
E
PZ1608U121-2R0TF
C5800
1uF
10V
C5801
1uF
10V
C5802
33pF
50V
R5804
100
1000pF
AMP_MUTE
+24V
AUD_LRCH
AUD_LRCK
I2C_SDA4
I2C_SCL4
UBW2012-121F
B
C5803
50V
+3.3V_NORMAL
L5801
C5805
0.1uF
16V
C5804
33pF
50V
AMP_RESET_N
AUD_SCK
VDD_PLL
R5805
100
1/16W
NC_1
NC_2
GND
NC_3
DVDD
SDATA
WCK
NC_4
SDA
R5806
4.7K
[EP]GND
1
2
3
4
5
6
7
8
9
10
TP5801
TP5802
C5806
1000pF
50V
GND_IO
VDD_IO
39
40
THERMAL
11
12
SCL
FAULT
RESET
AD
CLK_I
37
38
41
IC5800
NTP7515
0x54
13
14
MONITOR_0
MONITOR_1
MONITOR_2
C5808
22000pF
I2S_AMP
WOOFER_MUTE
WOOFER_MUTE
I2S_AMP
C5807
BST1A
36
15
BST2B
50V
50V
22000pF
PGND1A
35
16
PGND2B
34
17
PVDD1A
OUT1A
32
33
18
19
OUT2B
PVDD2B
+24V_AMP
C5809
10uF
35V
PVDD1B
31
30
29
28
27
26
25
24
23
22
21
20
+24V_AMP
PVDD2A
OUT1B
PGND1B
BST1B
VDR1
NC_5
AGND
VDR2
BST2A
PGND2A
OUT2A
C5810
10uF
35V
C5811
22000pF
50V
C5812
22000pF
50V
R5807
3.3
R5808
3.3
R5809
3.3
R5810
3.3
1/10W
C5813
390pF
50V
C5814
390pF
50V
1/10W
1/10W
C5815
390pF
50V
C5816
390pF
50V
1/10W
5%
5%
C5817
1uF
10V
5%
5%
SM-6045-100
GET_AMP_COIL
L5802-*1
10.0uH
TAIYO_AMP_COIL
NRS6045T100MMGK
L5802
10.0uH
TAIYO_AMP_COIL
NRS6045T100MMGK
L5805
10.0uH
GET_AMP_COIL
C5818
1uF
10V
TAIYO_AMP_COIL
NRS6045T100MMGK
L5803
10.0uH
TAIYO_AMP_COIL
NRS6045T100MMGK
L5804
10.0uH
SM-6045-100
GET_AMP_COIL
L5804-*1
10.0uH
SM-6045-100
L5805-*1
10.0uH
SM-6045-100
GET_AMP_COIL
L5803-*1
10.0uH
C5819
0.47uF
50V
C5820
0.47uF
50V
SPK_L+
SPK_L-
SPK_R+
SPK_R-
C5821
0.1uF
50V
C5822
0.1uF
50V
C5823
0.1uF
50V
C5824
0.1uF
50V
SPK_L+
R5811
4.7K
R5812
4.7K
SPK_L-
SPK_R+
R5813
4.7K
R5814
4.7K
SPK_R-
4P Box type
WAFER-ANGLE
4
3
2
1
P5800
SPEAKER_L
SPEAKER_R
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
STM_AMP
2014-10-17
58
Page 51
AMP - Woofer
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Woofer_AMP
L5900
UBW2012-121F
+24V_AMP_WOOFER
Woofer_AMP
AR5900
100
1/16W
C5900
33pF
50V
Woofer_AMP
Woofer_AMP
WOOFER_MUTE
+24V
AUD_LRCH
AUD_LRCK
I2C_SDA4
I2C_SCL4
C5901
33pF
50V
Woofer_AMP
C5902
1uF
Woofer_AMP
10V
C5903
1uF
10V
+3.3V_NORMAL
Woofer_AMP
L5901
BLM18PG121SN1D
Woofer_AMP
C5904
0.1uF
+3.3V_NORMAL
AD
CLK_I
GND_IO
37
38
39
41
NTP7515
Woofer_AMP
12
13
14
FAULT
MONITOR_0
MONITOR_1
22000pF
R5912
4.7K
50V
C5905
Woofer_AMP
22000pF
PGND1A
BST1A
RESET
35
36
IC5900
0x56
15
16
BST2B
PGND2B
MONITOR_2
C5906
50V
Woofer_AMP
34
17
OUT1A
33
18
OUT2B
+24V_AMP_WOOFER
PVDD1B
PVDD1A
31
32
30
29
28
27
26
25
24
23
22
21
19
PVDD2B20PVDD2A
Woofer_AMP
C5907
10uF
35V
OUT1B
PGND1B
BST1B
VDR1
NC_5
AGND
VDR2
BST2A
PGND2A
OUT2A
+24V_AMP_WOOFER
Woofer_AMP
C5908
10uF
35V
Woofer_AMP
Woofer_AMP
C5909
22000pF
50V
Woofer_AMP
C5910
22000pF
50V
Woofer_AMP
R5908
4.7K
Woofer_AMP
R5909
4.7K
C59 11
1uF
10V
Woofer_AMP
Woofer_AMP
Woofer_AMP
C5912
1uF
10V
Woofer_AMP
R5902
3.3
1/10W
C5913
390pF
50V
C5914
390pF
50V
R5903
3.3
1/10W
Woofer_AMP
SM-6045-100
Woofer_GET_AMP_COIL
L5902-*1
10.0uH
L5902
Woofer_TAIYO_AMP_COIL
10.0uH
NRS6045T100MMGK
L5905
10.0uH
NRS6045T100MMGK
SM-6045-100
Woofer_GET_AMP_COIL
L5905-*1
10.0uH
Woofer_TAIYO_AMP_COIL
Woofer_AMP
C5917
0.47uF
50V
Woofer_AMP
C5919
0.1uF
50V
Woofer_AMP
C5920
0.1uF
50V
R5906
4.7K
R5907
4.7K
SMAW250-04
Woofer_AMP
WAFER-ANGLE
SPK_L+_WF
Woofer_AMP
SPEAKER_L_WOOFER
Woofer_AMP
SPK_L-_WF
P5900
Woofer_AMP
Woofer_AMP
AMP_RESET_N
16V
R5910
100
1/16W
Woofer_AMP
AUD_SCK
NC_1
VDD_PLL
NC_2
GND
NC_3
DVDD
SDATA
WCK
NC_4
SDA
Woofer_AMP
R5911
4.7K
[EP]GND
1
2
3
4
5
6
7
8
9
10
C5923
1000pF
50V
VDD_IO
40
THERMAL
11
SCL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
I2S_WOOF_OUT
I2S_WOOF_OUT
SPK_L+_WF
SPK_L-_WF
4
3
2
2
1
1
FW25001-02(SPK 2P)
P5901
OPT
WAFER-ANGLE
BSD-14Y-UD-059-HD
Page 52
+12V
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EU
L6000
AUD_OUT >> EU/CHINA_HOTEL_OPT
330pF
C6009
EU
C6000
10uF
DTV/MNT_L_OUT
SCART_Lout
CLOSE TO MSTAR
Near Place Scart AMP
EU
R6019
EU
0
10K
1/16W
5%
R60 03
EU
R6018
EU
0
1/16W
10K
R6001
5%
EU
EU
R6000
2.2K
C6002
6800pF
SCART_AMP_R_FB
SCART_AMP_L_FB
OPT
220K
R6005
EU
OPT
R6002
470K
SCART_AMP_L_FB
EU
R6006
5.6K
EU
R6004 33K
C6003 33pF
EU
EU
R6020
0
1/16W
5%
IC6000
AZ4580MTR-E1
EU
VCC
8
OUT2
7
IN2-
6
IN2+
5
OPT
OPT
OUT1
1
IN1-
2
IN1+
3
VEE
4
R6007
100K
1/16W
5%
OPT
R6009
100K
1/16W
5%
OPT
R6012
100K
R6015
100K
1/16W
1/16W
5%
5%
EU
C6004
0.1uF
50V
SIGN600013
R6008 33K
C6005
EU
EU
R6021
0
1/16W
5%
EU
33pF
EU
R6016
5.6K
OPT
R6010
470K
SCART_AMP_R_FB
EU
R6017
220K
OPT
C6007
6800pF
C6012
330pF
EU
EU
C6008
R6011
2.2K
EU
10uF
DTV/MNT_R_OUT
SCART_Rout
[SCART AUDIO MUTE]
DTV/MNT_L_OUT
Q6000
MMBT3904(NXP)
DTV/MNT_R_OUT
Q6001
MMBT3904(NXP)
C
E
C
E
EU
R6013
1K
B
EU
EU
R6014
1K
B
EU
EU_SCART_MUTE_ISAHAYA
Q6002
RT1P141C-T112
E
C
B
EU_SCART_MUTE_NXP
SCART_MUTE
PDTA114ET
Q6002-*1
E
C
B
CLOSE TO MSTAR
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
UF71/7500
SCART AMP
2014-05-19
17
Page 53
EARPHONE AMP
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
IC6100
TPA6138A2
HP_ROUT_MAIN
HP_ROUT_AMP
OPT
R6107
0
SIDE_HP_MUTE
C6100
1uF
10V
R6100
10K
C6104
18pF
R6103
+3.3V_NORMAL
43K
R6105
1%
4.7K
R6106
43K
1%
C6108
10pF
50V
C6102
1uF
10V
+INR
-INR
OUTR
GND_1
MUTE
VSS
10V
+INL
14
C6106
10pF
50V
R6104
43K
1%
-INL
13
OUTL
12
UVP
11
GND_2
10
VDD
9
CP
8
C6109
18pF
1%
R6102
43K
+3.3V_NORMAL
C6105
1uF
16V
10V
C6107
0.1uF
R6101
10K
C6101
1uF
10V
OPT
R6108
0
HP_LOUT_MAIN
HP_LOUT_AMP
1
2
3
4
5
6
CN
7
C6103
1uF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
2014-11-22
HP_AMP 61
Page 54
B-CAS (SMART CARD) INTERFACE
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SMARTCARD_PWR_SEL
TPO_DATA[1]
R6300 33
JAPAN
+3.3V_NORMAL
2.7K
R6301
R6303
JAPAN
OPT
R6302
R6304
OPT
2.7K
JAPAN
R6305
R6306
CLKDIV1 CLKDIV2 : F_CRD_CLK
2.7K
---------------------------- 1 0 CLKIN
JAPAN
+5V_NORMAL
OPT
BLM18PG121SN1D
JAPAN
L6300
SIGN630005
JAPAN
C6301
10uF
10V
C6302
0.1uF
INT CMDVCC : STATUS
+3.3V_NORMAL
IC6300
TDA8024TT
CLKDIV1
1
CLKDIV2
2
5V/3V
3
PGND
4
S2
5
VDDP
PRES
PRES
AUX2
AUX1
CGND
6
S1
7
VUP
I/O
JAPAN
8
9
10
11
12
13
14
JAPAN
C6303
0.1uF
16V
JAPAN
16V
AUX2UC
28
AUX1UC
27
I/OUC
26
XTAL2
25
XTAL1
24
OFF
23
GND
22
VDD
21
RSTIN
20
CMDVCC
19
PORADJ
18
VCC
17
RST
16
CLK
15
C6304
0.1uF
JAPAN
16V
R6307 33
R6308 33
R6309 33
R6310 33
JAPAN
JAPAN
JAPAN
JAPAN
JAPAN
R6311 33
Place CLK C3 far from C2,C7,C4 and C8
75 ohm in I/O is for short circuit Protection
OPT
JAPAN
R6317
1.2K
L6301
JAPAN
BLM18PG121SN1D
JAPAN
C6305
0.1uF
16V
JAPAN
JAPAN
R6318
1.2K
R6315
JAPAN
C6306
0.1uF
16V
+3.3V_NORMAL
10K
R6312
1.2K
JAPAN
R6313
75
OPT
R6319
1.2K
JAPAN
R6316
1.2K
+3.3V_NORMAL
JAPAN
C6307
0.33uF
16V
JAPAN
R6314
1K
ZD6300
5V
JAPAN
TPO_DATA[6]
TPO_DATA[5]
TPO_DATA[3]
TPO_DATA[4]
TPO_DATA[2]
10057542-1311FLF(B CAS Slot)
RESERVED_1
RESERVED
ZD6301
5V
JAPAN
VCC
RST
CLK
GND
VPP
I/O
SW1
SW2
SMARTCARD_DATA
SMARTCARD_CLK
SMARTCARD_DET
SMARTCARD_RST
SMARTCARD_VCC
B-CAS SLOT
P6300
C1
C2
C3
C4
C5
JAPAN
C6
C7
C8
S1
S2
-------------------------------- HIGH HIGH CARD PRESENT
LOW HIGH CARD not PRESENT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
JAPAN B-CAS
2011.04.17
63
Page 55
FE_DEMOD1_TS_ERROR
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
FE_DEMOD2_TS_ERROR
Global F/E Option Name
1. TU
2. Tuner Name = TDJ’H’,TDj’M’...
3. Country Name = KR,US,BR,EU ...
Example of Option name
TU_ALL_IntDemod = All Tuner type for Internal demod
TU_M/W = apply TDSM&TDSW Type Tuner
14’ Tuner Type for Global
TDJ’H’-G101D : Half NIM for EU,AJJA
TDJ’H’-H101F : Half NIM for US, KR
TDJ’K’-T101F : Half NIM for TW
TDJ’M’-C301D,F : FULL NIM for China
TDJ’M’-B101F : Brazil NIM with Isolater Type
TDJ’M’-K101F : colombia NIM
TDJ’M’-G101D,G105D,G151D : EU Combo&Full NIM
TDJ’M’-H101F,H151F : Korea PIP tuner
TDJ’W’-A151D : AJJA T2 PIP
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
34
36
37
38
39
40
45
close to Tuner
L6500
+3.3V_LNA_TU
RF_SWITCH_CTL_TU
IF_AGC_TU
I2C_SCL5_TU
I2C_SDA5_TU
IF_P_TU
should be guarded by ground,Match GND VIA
IF_N_TU
TU_SIF_TU
TU_CVBS_TU
+3.3V_TU
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]
/TU_RESET1_TU
+3.3V_DEMOD_TU
I2C_SCL2_TU
D_Demod_Core
LNB_TX
I2C_SDA2_TU
LNB_OUT
FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_CLK
+2.5V_DEMOD
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_DATA
/TU_RESET2_TU
PZ1608U121-2R0TF
C6501
0.1uF
TU_ALL_IntDemod
C6502
0.1uF
16V
+3.3V_TUNER
close to Tuner
close to TUNER
TU_K/M/W_TW/BR/CO
TU_K/M/W_TW/BR/CO
C6504
R6503
0.1uF
10K
C6505
47pF
50V
OPT
C6503
47pF
50V
OPT
R6504
10
TU_ALL_IntDemod
R6505
10
TU_ALL_IntDemod
FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]
TU_M/W
C6507
16V
0.1uF
PZ1608U121-2R0TF
TU_M/W
C6506
0.1uF
LNB_TX
LNB_OUT
FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_DATA
R6507
TU_K/M/W_TW/BR/CO
R6506
1K
TU_ALL_IntDemod
TU_ALL
AR6500
33
C6519
33pF
TU_H/M_EU/BR/TW/CO/KR/US
C6520
33pF
TU_H/M_EU/BR/TW/CO/KR/US
TU_M_KR/EU // W_ALL
PZ1608U121-2R0TF
TU_M/W
R6501
100
TU_M_KR/EU // W_ALL
/TU_RESET1
Demod_Core
BLM18PG121SN1D
C6509
0.1uF
TU_JP
R6527
100
TU_JP
close to Tuner
TU_M/W
L6505
C6514
16V
0.1uF
TU_JP
1K
I2C_SCL5
I2C_SDA5
L6502
OPT
L6501
C6510
0.1uF
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_DATA[0-7]
TU_M/W
L6503
PZ1608U121-2R0TF
C6511
TU_M/W
0.1uF
OPT
C6512
18pF
50V
+2.5V_Normal
L6506
TU_JP
/TU_RESET2
TU_W_BR/TW
AR6500-*1
200
1/16W
IF_P
IF_N
+3.3V_TUNER
+3.3V_TUNER
OPT
C6513
18pF
50V
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
RF_SWITCH_CTL
Ground Width >= 24mils
IF_AGC
TU_ALL_2178B
R6513 0
AR6501
33
TU_M/W
I2C_SCL2
I2C_SDA2
TU_SIF
+3.3V_TUNER
TU_ALL_2178B
R6516
200
B
1608 perallel
because of derating
TU_ALL_2178B
R6517
200
E
KEC_TU_ALL_2178B_TR
Q6502
2N3906S-RTK
C
FE_DEMOD1_TS_CLK_1
FE_DEMOD1_TS_SYNC_1
FE_DEMOD1_TS_VAL_1
FE_DEMOD1_TS_DATA0_1
FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_DATA
TU_CVBS
E
NXP_TU_ALL_2178B_TR
B
Q6502-*1
MMBT3906(NXP)
C
+3.3V_NORMAL
TU_K/M/W_NON_JP
TU_K/M/W_NON_JP
TU_K/M/W_NON_JP
TU_K/M/W_NON_JP
Close to Tuner
TU_M/W
TU_JP
TU_JP
TU_JP
TU_JP
C6500
0.1uF
16V
R6502 0
R6511 0
R6512 0
R6514 0
R6515 0
R6518 0
R6520 0
R6522 0
+5V_NORMAL
TU_M/W
C6515
1uF
25V
+3.3V_NORMAL
C6517
22uF
10V
TU_M/W
IC6500
AP2132MP-2.5TRG1
R6500
10K
TU_M/W
VCTRL
PG
1
EN
2
VIN
3
2A
4
TU_M/W
C6516
0.1uF
Vout=0.6*(1+R1/R2)
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_DATA[0]
L6504
PZ1608U121-2R0TF
[EP]
GND
8
ADJ
9
7
THERMAL
VOUT
6
NC
5
+3.3V_TUNER
C6508
0.1uF
16V
FE_DEMOD3_TS_CLK
FE_DEMOD3_TS_SYNC
FE_DEMOD3_TS_VAL
FE_DEMOD3_TS_ERROR
FE_DEMOD3_TS_DATA
T2 : Max 1.7A
else : Max 0.7A
Demod_Core
R6521-*1
TU_M/W
C6518
10uF
10V
18K
R6519-*1
TU_M/W_1.2V
10K
R65 21
R65 19
10. 5K
TU_M/W_1.2V
R2
R1
TU_M/W_1.1V
16K
TU_M/W_1.1V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
TU_CIRCUIT
2014-12-30
65
Page 56
TU_K_BR
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
TU6706
TDJK-T351F
TU_H_US
TU6705
TDJH-H351F
TU_M_T2_KR
TU6704
TDJM-H451F
TU_M_EU
TU6702
TDJM-G351D
TU_W_JP
TU6703
TDJW-J252F
A1
A1
47
SHIELD
EMS Improvement
C6705
C6704
3300pF
3300pF
630V
630V
TU_GND_A
TU_GND_A
TU_GND_B
TUNER EMS GND SEPERATION
DVB ESD
Improvement
R6706
R6705
0
0
TU_AJ/EU/JP_ESD
TU_AJ/EU/JP_ESD
TU_AJ/EU/JP_ESD
4th Layer
TU_GND_A
GND A_1
GND A_2
GND A_3
GND A_4
TU_GND_B
GND B_1
GND B_2
GND B_3
GND B_4
GND B_5
R6707
0
C6706
0.022uF
630V
TU_GND_A1_22nF
C6706-*1
1000pF
630V
TU_GND_A1_1nF
EU/CIS
X
0 ohm
1 nF
22 ohm
EU/CIS
1 nF
10 ohm
1 nF
1 nF
TU_GND_A2_0ohm
R6700-*1
0.022uF
TU_GND_A2_22nF
GND_A
AJJA
X
0 ohm
1 nF
22 ohm
AJJA
1 nF
10 ohm
1 nF
1 nF
0 ohm
R6700
630V
TU_GND_A3_1nF
0
TU_GND_A4_22ohm
TU_GND_A3_22nF
TW/COL
TW/COL
C6700-*1
0.022uF
C6700
1000pF
630V
R6703
CN/HK
CN/HK
TU_GND_A
630V
22
1st layer
22 nF
22 nF
22 ohm
22 nF
22 ohm
22 nF
KR
X
KR
X
X
B[3.3V]
1
IF_AGC
3
SCL
4
SDA
5
IF[P]
6
IF[N]
7
SIF
8
CVBS
9
B1
B1
TU_GND_B2_0ohm
0 ohm
North.AM
1 nF
TU_GND_B
TU_GND_B
C6703
1000pF
630V
TU_GND_B1_1nF
R6704
22
TU_GND_B2_22ohm
C6703-*1
0.022uF
630V
TU_GND_B1_22nF
R6704-*1
0
North.AM
X
22 nF
X
22 ohm
X
X
22 nF
22 ohm
X
1 nF
R6704-*2
10
TU_GND_B2_10ohm
GND_B
BR
22 nF
22 nF
BR
22 nF
22 nF
TU_GND_A
C6707
1000pF
630V
TU_GND_B3_1nF
R6708
0
TU_GND_B5_0ohm
C6707-*1
0.022uF
630V
TU_GND_B3_22nF
JP
1 nF
0 ohm
1 nF
22 ohm
JP
X
X
1 nF
1 nF
0 ohm
A1
A1
C6708
1000pF
630V
TU_GND_B4_1nF
C6708-*1
0.022uF
630V
TU_GND_B4_22nF
R6708-*1
22
TU_GND_B5_22ohm
47
SHIELD
B1
1
2
3
4
5
6
7
8
9
+3.3V
NC
DIF_AGC
SCL_RF
SDA_RF
DIF[P]
DIF[N]
SIF
CVBS
B1
TU_GND_B
TU_GND_A
+3.3V
1
NC_1
2
DIFAGC
3
SCL_RF
4
SDA_RF
5
DIF[P]
6
DIF[N]
7
SIF
8
CVBS
9
NC_2
10
+3.3V_RF
11
ERROR
12
GND
13
MCLK
14
SYNC
15
VALID
16
DATA
17
NC_3
18
NC_4
19
NC_5
20
NC_6
21
NC_7
22
NC_8
23
NC_9
24
RESET_DEMOD
25
+3.3V_DEMOD
26
SCL_DEMOD.
27
+1.2V_DEMOD
28
NC_10
29
SDA_DEMOD
30
A1
A1
B1
B1
B1[+3.3V]
1
NC_1
2
AIF_AGC
3
SCL_RF
4
SDA_RF
5
AIF[P]
6
AIF[N]
7
SIF
8
CVBS
9
NC_2
10
B2[+3.3V]
11
ERROR
12
GROUND
13
MCKL
14
SYNC
15
VALID
16
DATA0
17
DATA1
18
DATA2
19
DATA3
20
DATA4
21
DATA5
22
DATA6
23
DATA7
24
RESET_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.2V]
28
F22_OUTPUT
29
SDA_DEMOD
30
LNB
31
GND
32
47
SHIELD
A1
A1
B1
B1
47
TU_GND_B
SHIELD
A1A1B1
TU_W_JP_RDA5817
47
SHIELD
TU6703-*1
TDJW-J351F
+3.3V_LNA
1
NC_1
2
NC_2
3
SCL_RF
4
SDA_RF
5
NC_3
6
NC_4
7
NC_5
8
NC_6
9
NC_7
10
+3.3V_RF
11
NC_8
12
GND_1
13
RESET_M_DEMOD
25
+3.3V_DEMOD
26
SCL_DEMOD
27
+1.2V_DEMOD
28
NC_9
29
SDA_DEMOD
30
LNB
31
GND_2
32
NC_10
33
M_ERROR
34
GND_3
35
M_SYNC
36
M_MCLK
37
+2.5V_DEMOD
38
M_VALID
39
M_DATA
40
S_ERROR
41
S_SYNC
42
S_MCLK
43
S_VALID
44
S_RESET_DEMOD
45
S_DATA
46
B1
TU_GND_A
TU_M_TW/CO
TU6704-*3
TDJM-K351F
B1[+3.3V]
1
NC_1
3
SCL_RF
4
SDA_RF
5
NC_2
6
NC_3
7
SIF
8
CVBS
9
NC_4
10
NC_5
11
ERROR
12
GND
13
MCLK
14
SYNC
15
VALID
16
DATA0
17
DATA1
18
DATA2
19
DATA3
20
DATA4
21
DATA5
22
DATA6
23
DATA7
24
RESET_DEMOD
25
B2[+3.3V]
26
SCL_DEMOD
27
B3[+1.2V]
28
NC_6
29
SDA_DEMOD
30
A1
B1B1A1
47
SHIELD
TU_M_AJ/JA
TU6704-*2
TDJM-G355D
B1[+3.3V]
1
NC_1
2
AIF_AGC
3
SCL_RF
4
SDA_RF
5
AIF[P]
6
AIF[N]
7
SIF
8
CVBS
9
NC_2
10
B2[+3.3V]
11
ERROR
12
GND
13
MCLK
14
SYNC
15
VALID
16
DATA0
17
DATA1
18
DATA2
19
DATA3
20
DATA4
21
DATA5
22
DATA6
23
DATA7
24
RESET_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.2V]
28
NC_3
29
SDA_DEMOD
30
A1
B1B1A1
47
SHIELD
TU_M_CN
TU6704-*1
TDJM-C451D
B1[+3.3V]
1
NC_1
2
NC_2
3
SCL_RF
4
SDA_RF
5
NC_3
6
NC_4
7
SIF
8
CVBS
9
NC_5
10
NC_6
11
ERROR
12
GROUND
13
MCLK
14
SYNC
15
VALID
16
DATA0
17
DATA1
18
DATA2
19
DATA3
20
DATA4
21
DATA5
22
DATA6
23
DATA7
24
RESET_DEMOD
25
B2[+3.3V]
26
SCL_DEMOD
27
B3[+1.2V]
28
NC_7
29
SDA_DEMOD
30
A1
B1B1A1
47
SHIELD
TU_GND_B
TU_GND_A
A1
A1
47
SHIELD
B1[+3.3V]
1
NC_1
2
NC_2
3
SCL_RF
4
SDA_RF
5
NC_3
6
NC_4
7
NC_5
8
NC_6
9
NC_7
10
B2[+3.3V]
11
NC_8
12
GND_1
13
M_RESET_DEMOD
25
B3[+3.3V]
26
SCL_DEMOD
27
B4[+1.2V]
28
NC_9
29
SDA_DEMOD
30
LNB
31
GND_2
32
NC_10
33
M_ERROR
34
GND_3
35
M_SYNC
36
M_MCLK
37
B5[+2.5V]
38
M_VALID
39
M_DATA
40
S_ERROR
41
S_SYNC
42
S_MCLK
43
S_VALID
44
S_RESET_DEMOD
45
S_DATA
46
B1
B1
TU_GND_B
+3.3V_LNA_TU
RF_SWITCH_CTL_TU
IF_AGC_TU
I2C_SCL5_TU
I2C_SDA5_TU
IF_P_TU
IF_N_TU
TU_SIF_TU
TU_CVBS_TU
+3.3V_TU
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_CLK_1
FE_DEMOD1_TS_SYNC_1
FE_DEMOD1_TS_VAL_1
FE_DEMOD1_TS_DATA0_1
FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4]
FE_DEMOD1_TS_DATA[5]
FE_DEMOD1_TS_DATA[6]
FE_DEMOD1_TS_DATA[7]
/TU_RESET1_TU
+3.3V_DEMOD_TU
I2C_SCL2_TU
D_Demod_Core
LNB_TX
I2C_SDA2_TU
LNB_OUT
FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_CLK
+2.5V_DEMOD
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_DATA
FE_DEMOD3_TS_ERROR
FE_DEMOD3_TS_SYNC
FE_DEMOD3_TS_CLK
FE_DEMOD3_TS_VAL
/TU_RESET2_TU
FE_DEMOD3_TS_DATA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
17
18
19
20
21
22
23
24
25
26
27
30
31
32
33
34
35
36
40
41
42
43
44
45
46
47
48
49
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TU_SYMBOL_V_DVB
2014-08-11
67_01
Page 57
DVB-S2 LNB Part Allegro
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LNB_OUT
(Option:LNB)
C6900
0.1uF
LNB
Close to Tuner
Surge protectioin
C6901
33pF
LNB
D6900
LNB
R6900
2.2K
1W
LNB
LNB_TSC
SS23L
D6901-*1
LNB_TSC
D6901
MBR230LSFT1G
LNB_ONSEMI
C6902
0.22uF
LNB
25V
A_GND
2A
D6902-*1
SS23L
30V
30V
30V
D6902
LNB_ONSEMI
30V
C6903
0.01uF
50V
LNB
LNB
C6905
10uF
25V
LNB
close to Boost pin(#1)
C6904
0.1uF
50V
A_GND
D6903
LNB_SMAB34
40V
D6903-*1
LNB_SX34
40V
C6906
10uF
25V
LNB
A_GND
C6907
10uF
25V
LNB
NC_1
LNB
NC_2
TDI
TDO
[EP]
1
2
3
4
5
C6908 0.1uF
THERMAL
21
IC6900-*1
DT1803
LNB_DMBT
7
SCL9ADD
SDA6IRQ
8
D6904-*1
40V
LNB_SX34
D6904
40V
LNB_SMAB34
LNB_ALLEGRO
VCP
LNB
NC_1
TDI
TDO
PGND18NC_319NC_420BOOST
16LX17
VIN
15
GND
14
VREG
13
ISET
12
TCAP
11
10
TONECTRL
LPH6050T-150M-R
A_GND
NC_2
NC_3
BOOST
[EP]GND
18
19
20
1
THERMAL
2
21
3
IC6900
A8303SESTR-T
4
LNB_ALLEGRO
5
7
8
6
SCL9ADD
SDA
IRQ
GNDLX
16LX17
10
TONECTRL
+12V
LNB
L6900
3.5A
15uH
VIN
15
GND
14
VREG
13
ISET
12
TCAP
11
+3.3V_NORMAL
OPT
3.3K
R6907
LNB
R6906
0
3A
Max 1.3A
C6909
10uF
25V
LNB
A_GND
close to VIN pin(#15)
C6910
0.1uF
50V
LNB
C6912
LNB
0.1uF
LNB
C6911 0.22uF
Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A
LNB
R6903
39K
1/16W
1%
Caution!! need isolated GND
A_GND
R6904
0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LNB
R6901 33
I2C_SCL2
LNB
R6902 33
I2C_SDA2
R6905
LNB_Tx
LNB_TX
0
0
R6908
LNB_NON_Tx
LM15U
LNB
2014-08-25
20
Page 58
+3.3V_NORMAL
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
[51P Vx1
output wafer]
P7100
SP14-11592-01-51Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
R7101 10K
R7102 10K
R7100 0
LGD_Module_3D_EN
R7123 10K
TXDAP7_L
TXDAN7_L
TXDAP6_L
TXDAN6_L
TXDAP5_L
TXDAN5_L
TXDAP4_L
TXDAN4_L
TXDAP3_L
TXDAN3_L
TXDAP2_L
TXDAN2_L
TXDAP1_L
TXDAN1_L
TXDAP0_L
TXDAN0_L
LOCKAn_IN
HTPDAn_IN
OPT
LGD_Module
L7100
MLB-201209-0120P-N2
OPT
C7100
10uF
25V
OPT
+3.3V_NORMAL
LGD_Module
*Pin31(BIT_SEL)
HIGH or NC : 10Bit
LOW : 8Bit
R7103 0
OPT
R7124
1K
LGD_Module_3D_EN
PANEL_VCC
C7101
10uF
25V
OPT
R7108 0
R7104
10K
OPT
R71051K1/16W
LOCKAn_HTPDAn_3.3VPullup
+1.8V
LOCKAn_HTPDAn_3.3VPullup
LOCKAn_HTPDAn_3.3VPullup
LOCKAn_IN
LOCKAn_HTPDAn_3.3VPullup
LOCKAn_HTPDAn_3.3VPullup
HTPDAn_IN
+3.3V_NORMAL
LGD_Module
R7106
1K
OPT
R7107
1K
5%
3D&L_DIM_EN
*Pin35(PCID)
3D_EN
High:PCID enable
Low or NC : PCID diable
LGD_Module
+3.3V_NORMAL
LGD_Module
+3.3V_NORMAL
R7111
10K
OPT
R7112
10K
R7109
10K
OPT
R7110
10K
R7125 0
LGD_Module
LGD_Module
+3.3V_NORMAL
+3.3V_NORMAL
AR7100
0
1/16W
R7115
4.7K
OPT
R7116
4.7K
OPT
LOCKAn_HTPDAn_3.3VPullup
R7128
10K
R7130
100
B
+3.3V_NORMAL
LOCKAn_HTPDAn_3.3VPullup
+1.8V
LOCKAn_HTPDAn_3.3VPullup
R7127
10K
R7129
100
B
3D&L_DIM_EN
L_DIM_EN
LGD_Module
AR7101
0
1/16W
Data_Format_1
Data_Format_0
LOCKAn_HTPDAn_3.3VPullup
R7132
10K
R7134
10K
C
Q7103
2N3904S
KEC_LOCKAn_HTPDAn_3.3VPullup_TR
E
R7131
10K
R7133
10K
C
Q7102
2N3904S
KEC_LOCKAn_HTPDAn_3.3VPullup_TR
E
B
S
Q7100
2N7002KA
R7119
33
S
Q7101
2N7002KA
R7120
33
R7136
10K
C
Q7105
B
2N3904S
KEC_LOCKAn_HTPDAn_3.3VPullup_TR
E
C
Q7103-*1
B
MMBT3904(NXP)
NXP_LOCKAn_HTPDAn_3.3VPullup_TR
E
LOCKAn_HTPDAn_3.3VPullup
R7135
10K
C
Q7104
B
2N3904S
KEC_LOCKAn_HTPDAn_3.3VPullup_TR
E
C
Q7102-*1
MMBT3904(NXP)
NXP_LOCKAn_HTPDAn_3.3VPullup_TR
E
TCON_I2C_EN
G
KEC_LGD_Module_TCON_I2C_EN_FET
R7121 0
D
LGD_Module
OPT
TCON_I2C_EN
KEC_LGD_Module_TCON_I2C_EN_FET
G
R7122 0
D
LGD_Module
OPT
Data Input Format[1:0]
*Mode 1 (NON Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = Low
*Mode 3 (4 Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = High
LOCKAn
C
B
E
HTPDAn
C
B
E
D
DIODES_LGD_Module_TCON_I2C_EN_FET
Q7100-*1
G
2N7002K
S
I2C_SCL6
D
DIODES_LGD_Module_TCON_I2C_EN_FET
Q7101-*1
G
2N7002K
S
I2C_SDA6
Q7105-*1
MMBT3904(NXP)
NXP_LOCKAn_HTPDAn_3.3VPullup_TR
Q7104-*1
MMBT3904(NXP)
NXP_LOCKAn_HTPDAn_3.3VPullup_TR
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
Vx1 51P
2014-08-27
21
Page 59
[41P Vx1
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
output wafer]
P7200
SP14-11592-01-41Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
1
2
3
4
5
6
7
8
9
TXDBP7_L
TXDBN7_L
TXDBP6_L
TXDBN6_L
TXDBP5_L
TXDBN5_L
TXDBP4_L
TXDBN4_L
TXDBP3_L
TXDBN3_L
TXDBP2_L
TXDBN2_L
TXDBP1_L
TXDBN1_L
TXDBP0_L
TXDBN0_L
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
UF71/7500
Vx1 41P
14/07/19
22
Page 60
eMMC I/F
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
DVDD18_EMMC
3.3v power delete, 131120
10K
1/16W
AR8104
EMMC_DATA[0-7]
EMMC_DATA[0]
EMMC_DATA[1]
EMMC_DATA[2]
EMMC_DATA[3]
EMMC_DATA[4]
EMMC_DATA[5]
EMMC_DATA[6]
EMMC_DATA[7]
EMMC_CLK
EMMC_CMD
EMMC_RST
AR8100
0
1/16W
R8104 0
R8105 0
R8106 0
R8107 0
AR8102
0 1/16W
C8107
10pF
OPT
50V
C8100
0.1uF
OPT
16V
Don’t Connect Power At VDDI
(Just Interal LDO Capacitor)
10K
1/16W
DAT3
AR8103
DAT4
DAT5
DAT6
10K
R8117
EMMC_CLK_BALL
EMMC_CMD_BALL
10K
R8116
DVDD18_EMMC
EMMC_RESET_BALL
Bottom
OPT
C8108
0.1uF
16V
EMMC_VDDI
EMMC_VDDI
eMMC V5.0 GND
3.3V_EMMC
OPT
C8109
2.2uF
10V
C8102
0.1uF
16V
EMMC_STRB
C8105
0.1uF
16V
C8103
2.2uF
10V
DAT3
DAT4
DAT7
DAT5
C8106
2.2uF
10V
Bottom
OPT
C8111
4.7uF
10V
DAT6
OPT
C8101
1uF
10V
DVDD18_EMMC
DAT7
10K
R8103
pattern 0.2mm
C8104
2.2uF
10V
THGBMBG5D1KBAIL
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M6
CLK
M5
CMD
A6
VSS_1
A7
RFU_2
C5
NC_21
E5
RFU_4
E8
RFU_5
E9
VSF_1
E10
VSF_2
F10
VSF_3
G3
RFU_9
G10
RFU_10
H5
DS
J5
VSS_5
K6
RFU_13
K7
RFU_14
K10
RFU_15
P7
RFU_16
P10
RFU_17
K5
RSTN
C6
VCCQ_1
M4
VCCQ_2
N4
VCCQ_3
P3
VCCQ_4
P5
VCCQ_5
E6
VCC_1
F5
VCC_2
J10
VCC_3
K9
VCC_4
C2
VDDI
E7
VSS_2
G5
VSS_3
H10
VSS_4
K8
VSS_6
C4
VSSQ_1
N2
VSSQ_2
N5
VSSQ_3
P4
VSSQ_4
P6
VSSQ_5
A1
NC_1
A2
NC_2
A8
NC_3
A9
NC_4
A10
NC_5
A11
NC_6
A12
NC_7
A13
NC_8
A14
NC_9
B1
NC_10
B7
NC_11
B8
NC_12
B9
NC_13
B10
NC_14
B11
NC_15
B12
NC_16
B13
NC_17
B14
NC_18
C1
NC_19
C3
NC_20
C7
NC_22
IC8100
C8
NC_23
C9
NC_24
C10
NC_25
C11
NC_26
C12
NC_27
C13
NC_28
C14
NC_29
D1
NC_30
D2
NC_31
D3
NC_32
D4
NC_33
D12
NC_34
D13
NC_35
D14
NC_36
E1
NC_37
E2
NC_38
E3
NC_39
E12
NC_40
E13
NC_41
E14
NC_42
F1
NC_43
F2
NC_44
F3
NC_45
F12
NC_46
F13
NC_47
F14
NC_48
G1
NC_49
G2
NC_50
G12
NC_51
G13
NC_52
G14
NC_53
H1
NC_54
H2
NC_55
H3
NC_56
H12
NC_57
H13
NC_58
H14
NC_59
J1
NC_60
J2
NC_61
J3
NC_62
J12
NC_63
J13
NC_64
J14
NC_65
K1
NC_66
K2
NC_67
K3
NC_68
K12
NC_69
K13
NC_70
K14
NC_71
L1
NC_72
L2
NC_73
L3
NC_74
L12
NC_75
L13
NC_76
L14
NC_77
M1
NC_78
M2
NC_79
M3
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106
NC_107
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14
EMMC5.0_4G_TOSHIBA
DAT5
EMMC_STRB
EMMC_RESET_BALL
EMMC_CLK_BALL
EMMC_CMD_BALL
DAT6
THGBMBG6D1KBAIL
A3
DAT0
A4
DAT1
A5
DAT2
B2
DAT3
B3
DAT4
B4
DAT5
B5
DAT6
B6
DAT7
M6
CLK
M5
CMD
A6
VSS_1
A7
RFU_2
C5
NC_21
E5
RFU_4
E8
RFU_5
E9
VSF_1
E10
VSF_2
F10
VSF_3
G3
RFU_9
G10
RFU_10
H5
DS
J5
VSS_5
K6
RFU_13
K7
RFU_14
K10
RFU_15
P7
RFU_16
P10
RFU_17
K5
RSTN
C6
VCCQ_1
M4
VCCQ_2
N4
VCCQ_3
P3
VCCQ_4
P5
VCCQ_5
E6
VCC_1
F5
VCC_2
J10
VCC_3
K9
VCC_4
C2
VDDI
E7
VSS_2
G5
VSS_3
H10
VSS_4
K8
VSS_6
C4
VSSQ_1
N2
VSSQ_2
N5
VSSQ_3
P4
VSSQ_4
P6
VSSQ_5
A1
NC_1
A2
NC_2
A8
NC_3
A9
NC_4
A10
NC_5
A11
NC_6
A12
NC_7
A13
NC_8
A14
NC_9
B1
NC_10
B7
NC_11
B8
NC_12
B9
NC_13
B10
NC_14
B11
NC_15
B12
NC_16
B13
NC_17
B14
NC_18
C1
NC_19
C3
NC_20
C7
NC_22
IC8100-*1
C8
NC_23
C9
NC_24
C10
NC_25
C11
NC_26
C12
NC_27
C13
NC_28
C14
NC_29
D1
NC_30
D2
NC_31
D3
NC_32
D4
NC_33
D12
NC_34
D13
NC_35
D14
NC_36
E1
NC_37
E2
NC_38
E3
NC_39
E12
NC_40
E13
NC_41
E14
NC_42
F1
NC_43
F2
NC_44
F3
NC_45
F12
NC_46
F13
NC_47
F14
NC_48
G1
NC_49
G2
NC_50
G12
NC_51
G13
NC_52
G14
NC_53
H1
NC_54
H2
NC_55
H3
NC_56
H12
NC_57
H13
NC_58
H14
NC_59
J1
NC_60
J2
NC_61
J3
NC_62
J12
NC_63
J13
NC_64
J14
NC_65
K1
NC_66
K2
NC_67
K3
NC_68
K12
NC_69
K13
NC_70
K14
NC_71
L1
NC_72
L2
NC_73
L3
NC_74
L12
NC_75
L13
NC_76
L14
NC_77
M1
NC_78
M2
NC_79
M3
NC_80
M7
NC_81
EMMC5.0_8G_TOSHIBA
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106
NC_107
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14
A3
A4
A5
B2
B3
B4
B5
B6
M6
M5
A7
E5
G3
K6
K7
E8
E9
E10
F10
G10
K10
P10
H5
K5
C6
M4
N4
P3
P5
E6
F5
J10
K9
C2
C4
N2
N5
P4
P6
A6
E7
G5
H10
J5
K8
A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C5
IC8100-*2
H26M41103HPR
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
CLK
CMD
RFU_1
RFU_2
RFU_3
RFU_4
RFU_5
VSF_1
VSF_2
VSF_3
VSF_4
VSF_5
VSF_6
VSF_7
DS
RSTN
VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5
VCC_1
VCC_2
VCC_3
VCC_4
VDDI
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
C7
NC_22
C8
NC_23
C9
NC_24
C10
NC_25
C11
NC_26
C12
NC_27
C13
NC_28
C14
NC_29
D1
NC_30
D2
NC_31
D3
NC_32
D4
NC_33
D12
NC_34
D13
NC_35
D14
NC_36
E1
NC_37
E2
NC_38
E3
NC_39
E12
NC_40
E13
NC_41
E14
NC_42
F1
NC_43
F2
NC_44
F3
NC_45
F12
NC_46
F13
NC_47
F14
NC_48
G1
NC_49
G2
NC_50
G12
NC_51
G13
NC_52
G14
NC_53
H1
NC_54
H2
NC_55
H3
NC_56
H12
NC_57
H13
NC_58
H14
NC_59
J1
NC_60
J2
NC_61
J3
NC_62
J12
NC_63
J13
NC_64
J14
NC_65
K1
NC_66
K2
NC_67
K3
NC_68
K12
NC_69
K13
NC_70
K14
NC_71
L1
NC_72
L2
NC_73
L3
NC_74
L12
NC_75
L13
NC_76
L14
NC_77
M1
NC_78
M2
NC_79
M3
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106
NC_107
NC_108
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P7
P8
P9
P11
P12
P13
P14
EMMC5.0_8G_HYNIX
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LM15U
eMMC
2014-11-17
81
Page 61
RS-232C Control INTERFACE
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.5V_ST
RS232C
R6820
100
RS232C
R6821
100
DOUT1
RIN1
RS232C
RS232C
RS232C
RS232C
C6808
0.1uF
C6809
0.1uF
C6810
0.1uF
C6811
0.1uF
C1+
C1-
C2+
C2-
DOUT2
RIN2
V+
V-
RS232C
IC6801
MAX3232CDR
1
2
3
4
5
6
7
8
EAN41348201
OPT
ZD6802
ADUC 20S 02 010L
RS232C
C6813
0.1uF
VCC
16
GND
15
DOUT1
14
RIN1
13
ROUT1
12
DIN1
11
DIN2
10
ROUT2
9
SOC_RX
SOC_TX
20V
OPT
ZD6803
ADUC 20S 02 010L
20V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
UF71/7500
RS232C
2014-05-19
22
Page 62
URSA9 VIDEO/OSD LOCKn
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R12902 10K
LOCKAn_Video
+3.3V_NORMAL
LOCKAn_Video
+3.3V_NORMAL
L2190
BLM18PG121SN1D
C2190
10uF
10V
VDDP
C2145
0.1uF
16V
4st Layer
C13314
0.1uF
16V
C13315
10uF
10V
AK10
AL10
AM10
AK11
AM11
AL11
AK12
AL12
AK13
AL13
AM13
AK14
AM14
AL14
AK15
AL15
AK16
AL16
AG2
RB0N
AG1
RB0P
AH3
RB1N
AH1
RB1P
AH2
RB2N
AJ3
RB2P
AJ2
RBCKN
AK2
RBCKP
AK1
RB3N
AL1
RB3P
AM2
RB4N
AL2
RB4P
AK3
RC0N
AL3
RC0P
AK4
RC1N
AL4
RC1P
AM4
RC2N
AK5
RC2P
AM5
RCCKN
AL5
RCCKP
AK6
RC3N
AL6
RC3P
AK7
RC4N
AL7
RC4P
AM7
RD0N
AK8
RD0P
AM8
RD1N
AL8
RD1P
AK9
RD2N
AL9
RD2P
RDCKN
RDCKP
RD3N
RD3P
RD4N
RD4P
RE0N
RE0P
RE1N
RE1P
RE2N
RE2P
RECKN
RECKP
RE3N
RE3P
RE4N
RE4P
IC2500
LGE7411(URSA9)
VX1_0VX1_0+
VX1_1VX1_1+
VX1_2VX1_2+
VX1_3VX1_3+
VX1_4VX1_4+
VX1_5VX1_5+
VX1_6VX1_6+
VX1_7VX1_7+
VX1_8VX1_8+
VX1_9-
VX1_9+
VX1_10VX1_10+
VX1_11VX1_11+
VX1_12VX1_12+
VX1_13VX1_13+
VX1_14VX1_14+
VX1_15VX1_15+
VX1_16VX1_16+
VX1_17VX1_17+
VX1_18VX1_18+
VX1_19VX1_19+
VX1_HTDPN
VX1_LOCKN
AM17
AK17
AL18
AK18
AM19
AL19
AL20
AM20
AK22
AL21
AK23
AM22
AK24
AL23
AL25
AK25
AM26
AK26
AL27
AK27
AM28
AL28
AL29
AM29
AM31
AL30
AL32
AL31
AK31
AK32
AJ30
AJ31
AH30
AH32
AG30
AG31
AE31
AF30
AD32
AE30
AH29
AG29
C13008 0.1uF
C13009 0.1uF
C13010 0.1uF
C13011 0.1uF
C13012 0.1uF
C13013 0.1uF
C13014 0.1uF
C13015 0.1uF
C13016 0.1uF
C13017 0.1uF
C13018 0.1uF
C13019 0.1uF
C13020 0.1uF
C13021 0.1uF
C13022 0.1uF
C13023 0.1uF
C13024 0.1uF
C13025 0.1uF
C13026 0.1uF
C13027 0.1uF
C13028 0.1uF
C13029 0.1uF
C13030 0.1uF
C13031 0.1uF
C13064 0.1uF
C13065 0.1uF
C13066 0.1uF
C13067 0.1uF
C13068 0.1uF
C13069 0.1uF
C13070 0.1uF
C13071 0.1uF
R1938
10K
URSA_TX_HTPD_pulldown
LOCKAn_OSD
TXDBN7_L
TXDBP7_L
TXDBN6_L
TXDBP6_L
TXDBN5_L
TXDBP5_L
TXDBN4_L
TXDBP4_L
TXDBN3_L
TXDBP3_L
TXDBN2_L
TXDBP2_L
TXDBN1_L
TXDBP1_L
TXDBN0_L
TXDBP0_L
TXDAN7_L
TXDAP7_L
TXDAN6_L
TXDAP6_L
TXDAN5_L
TXDAP5_L
TXDAN4_L
TXDAP4_L
TXDAN3_L
TXDAP3_L
TXDAN2_L
TXDAP2_L
TXDAN1_L
TXDAP1_L
TXDAN0_L
TXDAP0_L
HTPDAn
10K
R12903
LOCKAn_OSD
+3.3V_NORMAL
22
R12904
VBY1_LOCK_LED
3.3 K
R12 905
E
Q12900
VBY1_LOCK_LED
MMBT3906(NXP)
VBY1_LOCK_LED
B
C
LD1 2900
SML -512 UW
VBY1_LOCK_LED
IC2500
LGE7411(URSA9)
D1
HDMI_RXCP_0
D3
HDMI_RXCN_0
E3
HDMI_RX0P_0
D2
HDMI_RX0N_0
F3
HDMI_RX1P_0
E2
HDMI_RX1N_0
F1
HDMI_RX2P_0
F2
HDMI_RX2N_0
G1
HDMI_RXCP_1
G3
HDMI_RXCN_1
H3
HDMI_RX0P_1
G2
HDMI_RX0N_1
J3
HDMI_RX1P_1
H2
HDMI_RX1N_1
J1
HDMI_RX2P_1
J2
HDMI_RX2N_1
+1.1V_U_VDDC
C2191
10uF
10V
L2101
BLM18PG121SN1D
AVDD_MOD
L2102
BLM18PG121SN1D
C2198
10uF
10V
AVDD_PLL
C2105
10uF
10V
C2193
10uF
10V
L2104
BLM18PG121SN1D
L2105
BLM18PG121SN1D
Close to Chip side
4st Layer
C2192
0.1uF
16V
C13302
0.1uF
16V
C2151
10uF
10V
Close to Chip side
4th Layer
C2142
0.1uF
16V
C13306
0.1uF
16V
Close to Chip side
+1.1V_U_VDDC
C2132
10uF
10V
C13311
10uF
10V
C13310
10uF
10V
AVDDL_MOD
AVDDL_DRV
C2194
10uF
10V
C2115
0.1uF
16V
C2116
0.1uF
16V
C2122
10uF
10V
C2137
1uF
10V
C2144
0.1uF
16V
4th Layer
C13305
0.1uF
16V
C2147
C2146
0.1uF
0.1uF
16V
16V
Close to Chip side
C2154
10uF
10V
Close to Chip side
4th Layer
C13304
0.1uF
16V
C2153
10uF
10V
C2148
0.1uF
16V
C2149
0.1uF
16V
4th Layer
C13307
0.1uF
16V
C2150
10uF
10V
C2196
10uF
10V
AE2
AE1
AD2
AE3
AC2
AD3
AC3
AC1
AB2
AB1
AA2
AB3
Y2
AA3
Y3
Y1
W2
W1
V2
W3
U2
V3
U3
U1
VBY1_RXM[0]
VBY1_RXP[0]
VBY1_RXM[1]
VBY1_RXP[1]
VBY1_RXM[2]
VBY1_RXP[2]
VBY1_RXM[3]
VBY1_RXP[3]
VBY1_RXM[4]
VBY1_RXP[4]
VBY1_RXM[5]
VBY1_RXP[5]
VBY1_RXM[6]
VBY1_RXP[6]
VBY1_RXM[7]
VBY1_RXP[7]
VBY1_RXM[8]
VBY1_RXP[8]
VBY1_RXM[9]
VBY1_RXP[9]
VBY1_RXM[10]
VBY1_RXP[10]
VBY1_RXM[11]
VBY1_RXP[11]
R1939
10K
Wafer_side_VBY1_LOCK_LED
LOCKAn
+3.3V_NORMAL
22
R1952
Wafer_side_VBY1_LOCK_LED
LD1 900
SML -512 UW
Wafer_side_VBY1_LOCK_LED
R19 43
3.3 K
E
Q1901
MMBT3906(NXP)
B
C
Wafer_side_VBY1_LOCK_LED
OSD
VIDEO
TXOSD_3N
TXOSD_3P
TXOSD_2N
TXOSD_2P
TXOSD_1N
TXOSD_1P
TXOSD_0N
TXOSD_0P
TXVBY1_7N
TXVBY1_7P
TXVBY1_6N
TXVBY1_6P
TXVBY1_5N
TXVBY1_5P
TXVBY1_4N
TXVBY1_4P
TXVBY1_3N
TXVBY1_3P
TXVBY1_2N
TXVBY1_2P
TXVBY1_1N
TXVBY1_1P
TXVBY1_0N
TXVBY1_0P
C12900 0.1uF
C12901 0.1uF
C12902 0.1uF
C12903 0.1uF
C12904 0.1uF
C12905 0.1uF
C12906 0.1uF
C12907 0.1uF
C12908 0.1uF
C12909 0.1uF
C12910 0.1uF
C12911 0.1uF
C12912 0.1uF
C12913 0.1uF
C12914 0.1uF
C12915 0.1uF
C12916 0.1uF
C12917 0.1uF
C12918 0.1uF
C12919 0.1uF
C12920 0.1uF
C12921 0.1uF
C12922 0.1uF
C12923 0.1uF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
N4
M4
N1
P1
N3
N2
M3
M2
L1
L2
HDMITX_SCL
HDMITX_SDA
HDMI_TXCP
HDMI_TXCN
HDMI_TX0P
HDMI_TX0N
HDMI_TX1P
HDMI_TX1N
HDMI_TX2P
HDMI_TX2N
L2106
BLM18PG121SN1D
L2107
BLM18PG121SN1D
L13300
BLM18PG121SN1D
DVDD_DDR
C2117
0.1uF
16V
AVDDL_HDMI_TX_RX
C2118
0.1uF
16V
AVDDL_LVDSRX
C13300
0.1uF
16V
C2126
0.1uF
16V
C13301
0.1uF
16V
Close to Chip side
4th Layer
C13312
4.7uF
10V
C2152
10uF
10V
C13303
0.1uF
16V
Close to Chip side
C2131
0.1uF
16V
C13308
10uF
10V
C13309
10uF
10V
U_LVDS INPUT
C13313
4.7uF
10V
BSD-14Y-UD-128-02-HD
2013.12.17
Page 63
A_DDR3_DQ[0-15]
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
A_DDR3_DQ[16-31]
A_DDR3_A[0]
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]
A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]
A_DDR3_A[14]
A_DDR3_A[15]
A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]
A_DDR3_RASZ
A_DDR3_CASZ
A_DDR3_WEZ
A_DDR3_ODT
A_DDR3_CKE
A_DDR3_RESET
A_DDR3_MCLK
A_DDR3_MCLKZ
A_DDR3_CSB1
A_DDR3_CSB2
A_DDR3_DM0
A_DDR3_DM1
A_DDR3_DQS0
A_DDR3_DQS0B
A_DDR3_DQS1
A_DDR3_DQS1B
A_DDR3_DM2
A_DDR3_DM3
A_DDR3_DQS2
A_DDR3_DQS2B
A_DDR3_DQS3
A_DDR3_DQS3B
DDR_VTT_URSA
DDR_VTT_URSA
+1.5V_U_DDR
C13104
0.1uF
16V
+1.5V_U_DDR
C13102
0.1uF
16V
+1.5V_U_DDR
C13103
0.1uF
16V
F14
B13
E13
D13
C14
F13
C13
B10
A12
C10
A14
B12
F15
C11
C12
D17
E14
B14
E15
E17
C17
C16
F17
C15
B11
B16
A16
A_DDR3_DQ[0]
D23
A_DDR3_DQ[1]
A19
A_DDR3_DQ[2]
E22
A_DDR3_DQ[3]
B18
A_DDR3_DQ[4]
C23
A_DDR3_DQ[5]
C18
A_DDR3_DQ[6]
B22
A_DDR3_DQ[7]
A18
A_DDR3_DQ[8]
E19
A_DDR3_DQ[9]
B21
A_DDR3_DQ[10]
F18
A_DDR3_DQ[11]
C22
A_DDR3_DQ[12]
D20
A_DDR3_DQ[13]
F22
A_DDR3_DQ[14]
E18
A_DDR3_DQ[15]
D22
B19
E21
A21
B20
C20
C19
A_DDR3_DQ[16]
B27
A_DDR3_DQ[17]
A24
A_DDR3_DQ[18]
C27
A_DDR3_DQ[19]
C24
A_DDR3_DQ[20]
A28
A_DDR3_DQ[21]
E24
A_DDR3_DQ[22]
B28
A_DDR3_DQ[23]
B23
A_DDR3_DQ[24]
D25
A_DDR3_DQ[25]
E27
A_DDR3_DQ[26]
C25
A_DDR3_DQ[27]
D28
A_DDR3_DQ[28]
E26
A_DDR3_DQ[29]
E28
A_DDR3_DQ[30]
E25
A_DDR3_DQ[31]
C28
B24
B26
B25
A25
D26
C26
* DDR_VTT
DDR_VTT_URSA
L13100
CIS21J121
C13110
10uF
DDR_VTT_URSA_0
L13102
BLM18PG121SN1D
C13181
1uF
25V
DDR_VTT_URSA_1
L13103
BLM18PG121SN1D
C13112
1uF
25V
Decap removed
Close to DDR Power pin
C13109
C13117
0.1uF
0.1uF
16V
16V
Close to DDR Power pin
C13107
C13115
0.1uF
1uF
16V
25V
Close to DDR Power pin
Decap removed
C13116
C13108
0.1uF
0.1uF
16V
16V
LGE7411(URSA9)
A_DDR3_A0
A_DDR3_A1
A_DDR3_A2
A_DDR3_A3
A_DDR3_A4
A_DDR3_A5
A_DDR3_A6
A_DDR3_A7
A_DDR3_A8
A_DDR3_A9
A_DDR3_A10
A_DDR3_A11
A_DDR3_A12
A_DDR3_A13
A_DDR3_A14
A_DDR3_A15
A_DDR3_BA0
A_DDR3_BA1
A_DDR3_BA2
A_DDR3_RASZ
A_DDR3_CASZ
A_DDR3_WEZ
A_DDR3_ODT
A_DDR3_CKE
A_DDR3_RESETB
A_DDR3_MCLK
A_DDR3_MCLKZ
C9
A_DDR3_CSB1
A9
A_DDR3_CSB2
A_DDR3_DQ0
A_DDR3_DQ1
A_DDR3_DQ2
A_DDR3_DQ3
A_DDR3_DQ4
A_DDR3_DQ5
A_DDR3_DQ6
A_DDR3_DQ7
A_DDR3_DQ8
A_DDR3_DQ9
A_DDR3_DQ10
A_DDR3_DQ11
A_DDR3_DQ12
A_DDR3_DQ13
A_DDR3_DQ14
A_DDR3_DQ15
A_DDR3_DM0
A_DDR3_DM1
A_DDR3_DQS0
A_DDR3_DQS0B
A_DDR3_DQS1
A_DDR3_DQS1B
A_DDR3_DQ16
A_DDR3_DQ17
A_DDR3_DQ18
A_DDR3_DQ19
A_DDR3_DQ20
A_DDR3_DQ21
A_DDR3_DQ22
A_DDR3_DQ23
A_DDR3_DQ24
A_DDR3_DQ25
A_DDR3_DQ26
A_DDR3_DQ27
A_DDR3_DQ28
A_DDR3_DQ29
A_DDR3_DQ30
A_DDR3_DQ31
A_DDR3_DM2
A_DDR3_DM3
A_DDR3_DQS2
A_DDR3_DQS2B
A_DDR3_DQS3
A_DDR3_DQS3B
+1.5V_U_DDR
10K
1%
R13100
C13113
C13111
10uF
10uF
C13179
0.1uF
16V
C13132
0.1uF
16V
C13128
0.1uF
16V
C13126
0.1uF
16V
C13158
0.1uF
16V
C13189
0.1uF
16V
IC2500
10K
1%
R13101
C13151
0.1uF
16V
C13174
0.1uF
16V
C13135
0.1uF
16V
B_DDR3_RESETB
VIN
C13114
10uF
GND
10V
VREFEN
VOUT
C13118
0.1uF
C13106
0.1uF
16V
C13137
0.1uF
16V
B_DDR3_A0
B_DDR3_A1
B_DDR3_A2
B_DDR3_A3
B_DDR3_A4
B_DDR3_A5
B_DDR3_A6
B_DDR3_A7
B_DDR3_A8
B_DDR3_A9
B_DDR3_A10
B_DDR3_A11
B_DDR3_A12
B_DDR3_A13
B_DDR3_A14
B_DDR3_A15
B_DDR3_BA0
B_DDR3_BA1
B_DDR3_BA2
B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_ODT
B_DDR3_CKE
B_DDR3_MCLK
B_DDR3_MCLKZ
B_DDR3_CSB1
B_DDR3_CSB2
B_DDR3_DQ0
B_DDR3_DQ1
B_DDR3_DQ2
B_DDR3_DQ3
B_DDR3_DQ4
B_DDR3_DQ5
B_DDR3_DQ6
B_DDR3_DQ7
B_DDR3_DQ8
B_DDR3_DQ9
B_DDR3_DQ10
B_DDR3_DQ11
B_DDR3_DQ12
B_DDR3_DQ13
B_DDR3_DQ14
B_DDR3_DQ15
B_DDR3_DM0
B_DDR3_DM1
B_DDR3_DQS0
B_DDR3_DQS0B
B_DDR3_DQS1
B_DDR3_DQS1B
B_DDR3_DQ16
B_DDR3_DQ17
B_DDR3_DQ18
B_DDR3_DQ19
B_DDR3_DQ20
B_DDR3_DQ21
B_DDR3_DQ22
B_DDR3_DQ23
B_DDR3_DQ24
B_DDR3_DQ25
B_DDR3_DQ26
B_DDR3_DQ27
B_DDR3_DQ28
B_DDR3_DQ29
B_DDR3_DQ30
B_DDR3_DQ31
B_DDR3_DM2
B_DDR3_DM3
B_DDR3_DQS2
B_DDR3_DQS2B
B_DDR3_DQS3
B_DDR3_DQS3B
IC13100
AP2303MPTR-G1
1
2
3
4
C13105
0.1uF
16V
C13146
0.1uF
16V
C13144
0.1uF
16V
H27
G31
G28
G29
H30
G27
G30
D31
F32
D30
H32
F31
J27
E30
F30
L29
H28
H31
J28
L28
L30
K30
L27
J30
E31
K31
K32
C30
C32
U29
N32
T28
M31
U30
M30
T31
M32
N28
R31
M27
T30
P29
T27
M28
T29
N31
R28
R32
P31
P30
N30
AA31
V32
AA30
V30
AB32
V28
AB31
U31
W29
AA28
W30
AB29
Y28
AB28
W28
AB30
V31
Y31
W31
W32
Y29
Y30
[EP]
NC_3
8
NC_2
9
7
THERMAL
VCNTL
6
NC_1
5
C13123
10uF
10V
C13122
10uF
10V
Close to DDR
C13156
0.1uF
16V
C13154
0.1uF
16V
B_DDR3_A[0]
B_DDR3_A[1]
B_DDR3_A[2]
B_DDR3_A[3]
B_DDR3_A[4]
B_DDR3_A[5]
B_DDR3_A[6]
B_DDR3_A[7]
B_DDR3_A[8]
B_DDR3_A[9]
B_DDR3_A[10]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[13]
B_DDR3_A[14]
B_DDR3_A[15]
B_DDR3_DQ[0]
B_DDR3_DQ[1]
B_DDR3_DQ[2]
B_DDR3_DQ[3]
B_DDR3_DQ[4]
B_DDR3_DQ[5]
B_DDR3_DQ[6]
B_DDR3_DQ[7]
B_DDR3_DQ[8]
B_DDR3_DQ[9]
B_DDR3_DQ[10]
B_DDR3_DQ[11]
B_DDR3_DQ[12]
B_DDR3_DQ[13]
B_DDR3_DQ[14]
B_DDR3_DQ[15]
B_DDR3_DQ[16]
B_DDR3_DQ[17]
B_DDR3_DQ[18]
B_DDR3_DQ[19]
B_DDR3_DQ[20]
B_DDR3_DQ[21]
B_DDR3_DQ[22]
B_DDR3_DQ[23]
B_DDR3_DQ[24]
B_DDR3_DQ[25]
B_DDR3_DQ[26]
B_DDR3_DQ[27]
B_DDR3_DQ[28]
B_DDR3_DQ[29]
B_DDR3_DQ[30]
B_DDR3_DQ[31]
B_DDR3_BA[0]
B_DDR3_BA[1]
B_DDR3_BA[2]
B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_ODT
B_DDR3_CKE
B_DDR3_RESET
B_DDR3_MCLK
B_DDR3_MCLKZ
B_DDR3_CSB1
B_DDR3_CSB2
B_DDR3_DM0
B_DDR3_DM1
B_DDR3_DQS0
B_DDR3_DQS0B
B_DDR3_DQS1
B_DDR3_DQS1B
B_DDR3_DM2
B_DDR3_DM3
B_DDR3_DQS2
B_DDR3_DQS2B
B_DDR3_DQS3
B_DDR3_DQS3B
+3.3V_NORMAL
L13101
CIS21J121
C13125
0.1uF
16V
C13124
0.1uF
16V
C13164
0.1uF
16V
C13162
10uF
10V
B_DDR3_A[0-15]
B_DDR3_DQ[0-15]
B_DDR3_DQ[16-31]
C13119
10uF
10V
C13172
1uF
25V
C13170
0.1uF
16V
C13178
0.1uF
16V
C13176
0.1uF
16V
C13186
0.1uF
16V
C13184
0.1uF
16V
DDR PHY VREF
+1.5V_U_DDR
+1.5V_U_DDR
+1.5V_U_DDR
R13102
1K
A_DDR3_RESET
+1.5V_U_DDR
R13103
1K
C13194
10uF
10V
C13196
C13192
0.1uF
0.1uF
16V
16V
R13110
1K
1%
R13111
1K
1%
R13108
1K
1%
R13109
1K
1%
B_DDR3_RESET
C13198
0.1uF
16V
U_MVREFCA_A0
C13131
0.1uF
U_MVREFCA_B0
C13138
0.1uF
A_DDR3_CKE
B_DDR3_CKE
C13133
0.1uF
16V
C13130
0.1uF
16V
C13136
1000pF
C13134
1000pF
C13139
0.1uF
16V
C13148
1uF
25V
+1.5V_U_DDR
U_MVREFCA_A1
R13120
1K
1%
R13121
1K
1%
C13143
0.1uF
C13147
1000pF
A_DDR3_A[0]
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]
A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]
A_DDR3_A[15]
+1.5V_U_DDR
R13118
1K
1%
R13119
1K
1%
U_MVREFCA_B1
C13142
0.1uF
C13145
1000pF
A_DDR3_MCLK
A_DDR3_MCLKZ
A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]
56
C13233
R13122
0.01uF
56
R13123
A_DDR3_CKE
A_DDR3_CSB1
A_DDR3_ODT
A_DDR3_RASZ
A_DDR3_CASZ
A_DDR3_WEZ
A_DDR3_RESET
A_DDR3_DQS0
A_DDR3_DQS0B
A_DDR3_DQS1
A_DDR3_DQS1B
A_DDR3_DM0
A_DDR3_DQ[0-15]
R13112
1K
R13113
1K
A_DDR3_DM1
A_DDR3_DQ[0]
A_DDR3_DQ[1]
A_DDR3_DQ[2]
A_DDR3_DQ[3]
A_DDR3_DQ[4]
A_DDR3_DQ[5]
A_DDR3_DQ[6]
A_DDR3_DQ[7]
A_DDR3_DQ[8]
A_DDR3_DQ[9]
A_DDR3_DQ[10]
A_DDR3_DQ[11]
A_DDR3_DQ[12]
A_DDR3_DQ[13]
A_DDR3_DQ[14]
A_DDR3_DQ[15]
B_DDR3_A[0]
B_DDR3_A[1]
B_DDR3_A[2]
B_DDR3_A[3]
B_DDR3_A[4]
B_DDR3_A[5]
B_DDR3_A[6]
B_DDR3_A[7]
B_DDR3_A[8]
B_DDR3_A[9]
B_DDR3_A[10]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[13]
B_DDR3_A[15]
B_DDR3_BA[0]
B_DDR3_MCLK
B_DDR3_MCLKZ
B_DDR3_BA[1]
B_DDR3_BA[2]
56
C13234
R13124
0.01uF
56
R13125
B_DDR3_CKE
B_DDR3_CSB1
B_DDR3_ODT
B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_RESET
B_DDR3_DQS0
B_DDR3_DQS0B
B_DDR3_DQS1
B_DDR3_DQS1B
B_DDR3_DM0
B_DDR3_DM1
C13140
0.1uF
16V
C13149
0.1uF
16V
C13141
1uF
25V
C13150
0.1uF
16V
C13152
0.1uF
16V
C13100
10uF
10V
C13101
10uF
10V
C13120
10uF
10V
C13121
0.1uF
16V
C13127
10uF
10V
C13129
0.1uF
16V
B_DDR3_DQ[0-15]
4th layer
H5TQ1G63EFR-RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B_DDR3_DQ[0]
B_DDR3_DQ[1]
B_DDR3_DQ[2]
B_DDR3_DQ[3]
B_DDR3_DQ[4]
B_DDR3_DQ[5]
B_DDR3_DQ[6]
B_DDR3_DQ[7]
B_DDR3_DQ[8]
B_DDR3_DQ[9]
B_DDR3_DQ[10]
B_DDR3_DQ[11]
B_DDR3_DQ[12]
B_DDR3_DQ[13]
B_DDR3_DQ[14]
B_DDR3_DQ[15]
URSA_DDR_Hynix
IC2600
URSA_DDR_Hynix
IC2800
H5TQ1G63EFR-RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
U_MVREFCA_A0
M8
H1
R13126 240
L8
ZQ
1%
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_U_DDR
+1.5V_U_DDR
A_DDR3_A[14]
URSA_DDR_Nanya
IC2600-*1
NT5CB64M16FP-EK
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_7
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
U_MVREFCA_B0
M8
VREFCA
H1
VREFDQ
R13127 240
L8
ZQ
1%
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_U_DDR
+1.5V_U_DDR
B_DDR3_A[14]
URSA_DDR_Nanya
IC2800-*1
NT5CB64M16FP-EK
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_7
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
A_DDR3_A[0]
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]
A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]
A_DDR3_A[14]
A_DDR3_A[15]
A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]
A_DDR3_MCLK
A_DDR3_MCLKZ
A_DDR3_CKE
A_DDR3_CSB2
A_DDR3_ODT
A_DDR3_RASZ
A_DDR3_CASZ
A_DDR3_WEZ
A_DDR3_RESET
URSA_DDR_Samsung
IC2600-*2
K4B1G1646G-BCMA
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B_DDR3_A[0]
B_DDR3_A[1]
B_DDR3_A[2]
B_DDR3_A[3]
B_DDR3_A[4]
B_DDR3_A[5]
B_DDR3_A[6]
B_DDR3_A[7]
B_DDR3_A[8]
B_DDR3_A[9]
B_DDR3_A[10]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[13]
B_DDR3_A[14]
B_DDR3_A[15]
B_DDR3_BA[0]
B_DDR3_BA[1]
B_DDR3_BA[2]
B_DDR3_MCLK
B_DDR3_MCLKZ
B_DDR3_CKE
B_DDR3_CSB2
B_DDR3_ODT
B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_RESET
URSA_DDR_Samsung
IC2800-*2
K4B1G1646G-BCMA
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR_VTT_URSA_1
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
DDR_VTT_URSA_0
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
AR13100
AR13101
URSA_DDR_Hynix
AR13102
AR13106
AR13104
100
100
100
100
A_DDR3_DQ[16-31]
100
100
100
100
AR13107
AR13103
AR13105
B_DDR3_DQ[16-31]
AR13108
100
AR13109
100
AR13110
100
A_DDR3_DQS2
A_DDR3_DQS2B
A_DDR3_DQS3
A_DDR3_DQS3B
A_DDR3_DM2
A_DDR3_DM3
AR13111
100
B_DDR3_DQS2
B_DDR3_DQS2B
B_DDR3_DQS3
B_DDR3_DQS3B
B_DDR3_DM2
B_DDR3_DM3
AR13112
100
A_DDR3_DQ[16]
A_DDR3_DQ[17]
A_DDR3_DQ[18]
A_DDR3_DQ[19]
A_DDR3_DQ[20]
A_DDR3_DQ[21]
A_DDR3_DQ[22]
A_DDR3_DQ[23]
A_DDR3_DQ[24]
A_DDR3_DQ[25]
A_DDR3_DQ[26]
A_DDR3_DQ[27]
A_DDR3_DQ[28]
A_DDR3_DQ[29]
A_DDR3_DQ[30]
A_DDR3_DQ[31]
AR13113
100
B_DDR3_DQ[16]
B_DDR3_DQ[17]
B_DDR3_DQ[18]
B_DDR3_DQ[19]
B_DDR3_DQ[20]
B_DDR3_DQ[21]
B_DDR3_DQ[22]
B_DDR3_DQ[23]
B_DDR3_DQ[24]
B_DDR3_DQ[25]
B_DDR3_DQ[26]
B_DDR3_DQ[27]
B_DDR3_DQ[28]
B_DDR3_DQ[29]
B_DDR3_DQ[30]
B_DDR3_DQ[31]
IC2700
H5TQ1G63EFR-RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
URSA_DDR_Hynix
IC2900
H5TQ1G63EFR-RDC
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VREFCA
VREFDQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
U_MVREFCA_A1
M8
H1
R13134 240
L8
ZQ
1%
+1.5V_U_DDR
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_U_DDR
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A_DDR3_A[14]
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
K4B1G1646G-BCMA
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC2700-*1
NT5CB64M16FP-EK
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
URSA_DDR_Samsung
IC2700-*2
URSA_DDR_Nanya
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_7
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
U_MVREFCA_B1
M8
H1
R13135 240
L8
ZQ
1%
+1.5V_U_DDR
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_U_DDR
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
B_DDR3_A[14]
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
URSA_DDR_Samsung
IC2900-*2
K4B1G1646G-BCMA
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
IC2900-*1
NT5CB64M16FP-EK
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
URSA_DDR_Nanya
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_7
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
+1.5V_U_DDR
C13195
0.1uF
16V
Close to DDR Power pin
Decap removed
4th layer
BSD-14Y-UD-131-HD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2013.12.17
URSA7_DDR
Page 64
+3.3V_NORMAL
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2
4 3
D1900
1N4148W
+3.3V_NORMAL
OPT
SELECT
6
VCC
5
A
4
R1920 0
+3.3V_NORMAL
+3.3V_NORMAL
OPT
C1996
22uF
10V
100V
R1923
10K
FRC_FLASH_SEL
SPI_DI
Clock for URSA9
LM14_URSA9_crystalcap
C1992
5pF
50V
GND_1
2
3
C1993
5pF
50V
X-TAL_2
SPI Flash
SPI_DO_URSA9
SPI_DO_SOC
High : B1
Low : B0
B1
GND
B0
X-TAL_1
1
X1900
24MHz
4
GND_2
OPT
IC1900
NLASB3157DFT2G
1
2
3
R1900 0
R1925
1M
+3.3V_NORMAL
SELECT
6
VCC
5
A
4
XIN_URSA
XO_URSA
FRC_FLASH_SEL
SPI_DO
SPI_DI_URSA9
SPI_DI_SOC
SPI_4MB_MACRONIX
SW1901
JTP-1127WEM
1
IC1902
NLASB3157DFT2G
B1
1
GND
2
B0
3
IC1901
MX25L3235E
SPI_CZ_URSA9
SPI_DO
FLASH_WP_URSA
FRC_FLASH_WP
R1904
R1905
OPT
R1932
33
1K
OPT
R1901
CS
GND
1
2
3
4
10K
SO/SIO1
WP/SIO2
1K
VCC
8
HOLD/SIO3
7
SCLK
6
SI/SIO0
5
C1995
0.1uF
16V
R1903 10K
Debugging for URSA9
I2C_S Port
P1905
12507WS-04L
URSA_DEBUG_Wafer
I2C_SCL7
I2CS_SCL
SCL2_+3.3V_DB
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
5
R1958
0
URSA_MP
R1960
0
OPT
WAFER-STRAIGHT
1
2
3
4
SW1902
JS2235S
1
2
URSA_DEBUG_SW
3
R19 22
33
URSA_DEBUG_Wafer
R19 21
33
URSA_DEBUG_Wafer
6
5
4
SCL2_+3.3V_DB
SDA2_+3.3V_DB
I2C_SDA7
R1959
0
URSA_MP
I2CS_SDA
R1961
0
OPT
SDA2_+3.3V_DB
UART PQ/System Debug
+3.3V_NORMAL
URSA9_PQ_DEBUG
P1906
12507WS-04L
5
1
2
3
4
R13226
10K
URSA9_PQ_DEBUG
33
URSA9_PQ_DEBUG
33
URSA9_PQ_DEBUG
C1998
0.1uF
16V
URSA9_PQ_DEBUG
+3.3V_NORMAL
0
R1924
CS
DO[IO1]
WP[IO2]
GND
R13222
R13223
URSA Reset
OPT
R1919
10K
OPT
0
R1930
0
R13221
SPI_CK_URSA9
SPI_CK_SOC
SPI_4MB_Winbond
IC1901-*1
W25Q32FVSSIG
VCC
1
8
HOLD_OR_RESET[IO3]
7
2
CLK
6
3
DI[IO0]
4
5
SPI_CK
SPI_DI
URSA_UART2_RX
URSA_UART2_TX
URSA_RESET
URSA_RESET_SoC
URSA_RESET_MICOM
OPT
IC1903
NLASB3157DFT2G
B1
1
GND
2
B0
3
R1926 0
URSA9_SYS_DEBUG
12507WS-04L
+3.3V_NORMAL
SELECT
6
VCC
5
A
4
P1907
1
2
3
4
5
Chip Config
Debug/ISP ADDR
Slave (Debug Port:0XB4,ISP:0X98)
CHIP_CONF:{DIM2,DIM1,DIM0}
CHIP_CONF=3’d7:111:boot from SPI Flash
+3.3V_NORMAL
FRC_FLASH_SEL
SPI_CK
+3.3V_NORMAL
R13227
10K
URSA9_SYS_DEBUG
33
URSA9_SYS_DEBUG
33
URSA9_SYS_DEBUG
C1997
0.1uF
16V
URSA9_SYS_DEBUG
10K
R1902
10K
R1991
10K
R1990
URSA_UART2_TX
URSA_UART2_RX
R13224
R13225
URSA_EMI
URSA_EMI
C1900
0.01uF
25V
I2CS_SDA
I2CS_SCL
C1901
0.01uF
25V
URSA_UART1_TX
URSA_UART1_RX
URSA_UART1_RX
URSA_UART1_TX
10K
OPT
R1908
10K
OPT
R1907
OPT
URSA_EMI
C1902
0.01uF
25V
10K
R1906
URSA_RESET
XIN_URSA
XO_URSA
C1990
47pF
50V
OPT
Near URSA9 on forth layer
URSA_Noise_KR_US
C13000
0.01uF
C13002
0.01uF
URSA_Noise_KR_US
SPI_CZ_URSA9
SPI_CK_URSA9
SPI_DI_URSA9
SPI_DO_URSA9
C13003
0.01uF
URSA_Noise_KR_US
Near URSA9 on forth layer
AR13201
C1991
47pF
50V
OPT
URSA_Noise_KR_US
C13001
0.01uF
Change pin from A5 to C4
AR13200
33
URSA9 UART1_RX
33
R1927
DIM0
DIM1
DIM2
0
URSA9 Option
DIV_BIT [1/0]
0/0 NON DIVISION
0/1
1/0
1/1
URSA_OPT_4
BIT [2/1/0]
0/0/0
0/0/1
0/1/0
0/1/1
1/0/0
1/0/1
1/1/1
AF29
RESET
R3
XTALO
R4
XTALI
AJ24
I2CS_SDA
AH24
I2CS_SCL
AH26
I2CM_SDA
AG24
I2CM_SCL/VSYNC_LIKE1
B4
GPIO[0][UART2_TX]
A4
GPIO[1][UART2_RX]
B5
GPIO[2][UART1_TX]
A5
GPIO[3][UART1_RX]
AD28
SPI_CZ
AD30
SPI_CK
AC31
SPI_DI
AD29
SPI_DO
AE28
INT_R21/GPIO[41]
AE27
INT_R20/GPIO[42]
C4
IRE
AC27
GND_1
AD27
GND_2
A7
NC_1
B6
NC_2
B7
NC_3
C5
NC_4
C6
NC_5
C7
NC_6
D4
NC_7
D5
NC_8
D6
NC_9
D7
NC_10
E4
NC_11
E5
NC_12
E6
NC_13
E7
NC_14
F4
NC_15
F5
NC_16
M5
NC_17
M6
NC_18
M7
NC_19
N5
NC_20
R7
NC_21
P7
NC_22
N7
NC_23
N6
NC_24
MODULE DIVISION
2 DIVISION
4 DIVISION
8 DIVISION
HIGH:URSA_PRINT_OFF
LOW:URSA_PRINT_ON
Tx Lane
4K@120 (16lane)
4k@60 (8lane)
5k@120 (20lane)
OLED ULTRA HD
FHD@120 (4lane)
FHD@60 (2lane)
Reserved 1/1/0
Reserved
IC2500
LGE7411(URSA9)
I2C_HSC_SDA/VSYNC_LIKE2
I2C_HSC_SCL/VSYNC_LIKE3
SPI1_CK/PWM2/GPIO58
SPI1_DI/PWM3/GPIO59
SPI2_CK/PWM0/GPIO56
SPI2_DI/PWM1/GPIO57
SPI3_CK/DIM10/GPIO54
SPI3_DI/DIM11/GPIO55
SPI4_CK/DIM8/GPIO52
SPI4_DI/DIM9/GPIO53
VSYNC_LIKE/PWM5/GPIO40
GPIO[10]/PWM_DIM_IN[0]
GPIO[11]/PWM_DIM_IN[1]
URSA_OPT_6
URSA_OPT_5
DIV_BIT0
DIV_BIT1
URSA_OPT_4
URSA_OPT_0
URSA_OPT_1
URSA_BIT0
URSA_BIT1
URSA_BIT2
DIM0/GPIO[32]
DIM1/GPIO[33]
DIM2/GPIO[34]
DIM3/GPIO[35]
DIM4/GPIO[36]
DIM5/GPIO[37]
DIM6/GPIO[38]
DIM7/GPIO[39]
GPIO43/TCON0
GPIO44/TCON1
GPIO45/TCON2
GPIO46/TCON3
GPIO47/TCON4
GPIO48/TCON5
GPIO49/TCON6
GPIO50/TCON7
GPIO[18]/TCON8
GPIO[19]/TCON9
GPIO[20]/TCON10
GPIO[21]/TCON11
GPIO[22]/TCON12
GPIO[23]/TCON13
GPIO24/TCON14
GPIO25/TCON15
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]
GPIO[9]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
Division Type
Module Type
Rx Interface
Tx Lane
AG25
AH25
AH28
AJ27
AJ29
AF27
AG28
AH27
AG27
AG26
AF28
AG23
AG20
AH23
AH20
AG21
AH22
AG22
AH21
A3
B3
A2
C3
B2
B1
C2
C1
AG4
AG5
AH4
AH5
AH6
AJ4
AJ5
AJ6
AH16
AG16
Y5
Y4
AB4
AB5
AG17
AH17
AG18
AJ20
AH18
AG19
AH19
AJ21
OPT
OPT
R13210 10K
R13207 10K
R13211 10K
R13208 10K
C13200 0.01uF
C13201 0.01uF
URSA_EMI
URSA_EMI
URSA_Noise_KR_US
C1904
0.01uF
25V
URSA_EMI
URSA_Noise_KR_US
Div_BIT1_1
Div_BIT0_1
R13202 10K
Div_BIT0_0
R13212 10K
URSA_OPT_0
DIV_BIT0
DIV_BIT1
URSA_OPT_4
URSA_OPT_5
URSA_OPT_6
URSA_RELEASE
R13213 10K
Div_BIT1_0
URSA_DEBUG
R13214 10K
C1905 0.01uF
C1906 0.01uF
URSA_EMI
URSA_EMI
Module Division OPT
URSA_Noise_KR_US
URSA_Noise_KR_US
DIM0
DIM1
DIM2
URSA_OPT_1
URSA_BIT0
URSA_BIT1
URSA_BIT2
Near URSA9 on forth layer
C13004
0.01uF
R13201 10K
OPT
R13200
10K
OPT
C13202
0.01uF
25V
C13203
0.01uF
25V
URSA_Noise_KR_US
LGD_Module
URSA_RX_LVDS
R1909 10K
R13215 10K
OS_Module
R13216 10K
URSA_RX_VX1
R1910 10K
C1909 0.01uF
C1907 0.01uF
URSA_EMI
URSA_EMI
URSA_L/D_ctrl
URSA_L/D_ctrl
C13204
C13206
5pF
5pF
URSA_Noise_KR_US
50V
50V
URSA_L/D_ctrl
C13205
5pF
50V
+3.3V_NORMAL
OPT
R13204
10K
R13205
10K
URSA_EMI
URSA_EMI
C1908
0.01uF
25V
URSA_Noise_KR_US
C13005
R13206
0.01uF
100K
URSA9_Vx1_RX_HTPD_GPIO
C1903
0.01uF
25V
URSA_EMI
10K
R1911
R1913 10K
R1915 10K
URSA_BIT0_1
URSA_BIT1_1
10K
URSA_BIT1_0
URSA_BIT0_0
R1916 10K
C1911 0.01uF
C1913 0.01uF
R1914 10K
URSA_EMI
33
URSA_EMI
C1912
0.01uF
25V
R13209
100K
C1915 0.01uF
URSA_EMI
L/D_CLK
L/D_DI
L/D_VSYNC
Data_Format_1
Data_Format_0
R1912
R132001 33
R132002
R13203 33
C1910
0.01uF
25V
URSA9_CONNECT
LOCKAn_OSD
LOCKAn_Video
FLASH_WP_URSA
BSD-14Y-UD-132-HD
2013.12.17
R1917 10K
URSA_BIT2_1
URSA_BIT2_0
R1918 10K
C1916 0.01uF
URSA_EMI
URSA_EMI
For DFT JIG
R13201-*1
0.01uF
25V
URSA_Noise_KR_US
R13200-*1
0.01uF
25V
URSA_Noise_KR_US
Page 65
+1.5V_U_DDR
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
AVDD_PLL
AVDDL_LVDSRX
DVDD_DDR
AVDDL_MOD
AVDDL_DRV
+1.1V_U_VDDC
AVDDL_HDMI_TX_RX
AVDD_MOD
VDDP
LGE7411(URSA9)
A6
VDDC_1
M9
VDDC_2
M10
VDDC_3
M11
VDDC_4
N9
VDDC_5
N10
VDDC_6
N11
VDDC_7
P9
VDDC_8
P10
VDDC_9
P11
VDDC_10
R9
VDDC_11
R10
VDDC_12
R11
VDDC_13
T9
VDDC_14
T10
VDDC_15
T11
VDDC_16
U9
VDDC_17
U10
VDDC_18
U11
VDDC_19
V9
VDDC_20
V10
VDDC_21
V11
VDDC_22
W9
VDDC_23
W10
VDDC_24
W11
VDDC_25
Y9
VDDC_26
L3
AVDDL_HDMITX_1
L4
AVDDL_HDMITX_2
AA9
AVDDL_RX_1
AA10
AVDDL_RX_2
AB9
AVDDL_RX_3
Y10
AVDDL_DVI_1
Y11
AVDDL_DVI_2
M14
DVDD_DDR_1
N14
DVDD_DDR_2
Y20
AVDDL_MOD_1
Y21
AVDDL_MOD_2
Y22
AVDDL_MOD_3
AA19
AVDDL_MOD_4
AA20
AVDDL_MOD_5
AA21
AVDDL_DRV_1
AA22
AVDDL_DRV_2
AB20
AVDDL_DRV_3
AB21
AVDDL_DRV_4
AB22
AVDDL_DRV_5
AC20
AVDD_MOD_1
AC21
AVDD_MOD_2
AD21
AVDD_MOD_3
AD20
AVDD_MOD_LDO
AC18
VDDP_1
AD17
VDDP_2
AD18
VDDP_3
AD11
AVDD_DVI_1
AD12
AVDD_DVI_2
AC12
AVDD_HDMITX_1
AC13
AVDD_HDMITX_2
AD15
AVDD_RX_1
AC16
AVDD_RX_2
AC17
AVDD_RX_3
AD16
AVDD_RX_4
AD14
AVDD_XTAL
AC14
AVDD_PLL_1
AC15
AVDD_PLL_2
M18
AVDD_DDR0_1
M19
AVDD_DDR0_2
M20
AVDD_DDR0_3
M21
AVDD_DDR0_4
M16
AVDD_DDR0_5
M17
AVDD_DDR0_6
P21
AVDD_DDR1_1
R21
AVDD_DDR1_2
P22
AVDD_DDR1_3
R22
AVDD_DDR1_4
N21
AVDD_DDR1_5
N22
AVDD_DDR1_6
IC2500
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
IC2500
LGE7411(URSA9)
AA18
AB18
AE18
AF18
AJ18
AB19
AC19
AD19
AE19
AF19
AK19
AE20
AF20
AK20
AE21
AF21
AK21
AC22
AD22
AE22
AF22
AL22
AA23
AB23
AC23
AD23
AE23
AF23
AJ23
AM23
D18
G18
H18
J18
L18
N18
P18
R18
T18
U18
V18
W18
Y18
F19
G19
H19
J19
K19
L19
N19
P19
R19
T19
U19
V19
W19
Y19
A20
E20
F20
G20
H20
J20
L20
N20
P20
R20
T20
U20
V20
W20
D21
F21
G21
H21
J21
K21
L21
T21
U21
V21
W21
G22
H22
J22
L22
M22
T22
U22
V22
W22
A23
E23
F23
G23
H23
J23
K23
M23
P23
T23
V23
W23
Y23
A8
VSS_81
B8
VSS_82
C8
VSS_83
D8
VSS_84
E8
VSS_85
F8
VSS_86
G8
VSS_87
H8
VSS_88
J8
VSS_89
K8
VSS_90
L8
VSS_91
M8
VSS_92
N8
VSS_93
P8
AB10
AC10
AD10
AE10
AF10
AG10
AH10
AJ10
AA11
AB11
AC11
AE11
AF11
AG11
AH11
AJ11
AA12
AB12
AE12
AF12
AG12
AH12
AJ12
VSS_94
R8
VSS_95
T8
VSS_96
U8
VSS_97
V8
VSS_98
W8
VSS_99
Y8
VSS_100
AA8
VSS_101
AC8
VSS_102
AD8
VSS_103
AE8
VSS_104
AF8
VSS_105
AG8
VSS_106
AH8
VSS_107
AJ8
VSS_108
B9
VSS_109
D9
VSS_110
E9
VSS_111
F9
VSS_112
G9
VSS_113
H9
VSS_114
J9
VSS_115
K9
VSS_116
L9
VSS_117
AD9
VSS_118
AE9
VSS_119
AF9
VSS_120
AG9
VSS_121
AH9
VSS_122
AJ9
VSS_123
D10
VSS_124
E10
VSS_125
F10
VSS_126
G10
VSS_127
H10
VSS_128
J10
VSS_129
K10
VSS_130
L10
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
A11
VSS_140
D11
VSS_141
E11
VSS_142
F11
VSS_143
G11
VSS_144
H11
VSS_145
J11
VSS_146
K11
VSS_147
L11
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
D12
VSS_157
E12
VSS_158
F12
VSS_159
G12
VSS_160
H12
VSS_161
J12
VSS_162
K12
VSS_163
L12
VSS_164
M12
VSS_165
N12
VSS_166
P12
VSS_167
R12
VSS_168
T12
VSS_169
U12
VSS_170
V12
VSS_171
W12
VSS_172
Y12
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
G13
VSS_181
H13
VSS_182
J13
VSS_183
K13
VSS_184
L13
VSS_185
K1
T1
K2
P2
T2
AF2
K3
T3
AF3
AG3
G4
H4
J4
K4
P4
T4
U4
V4
W4
AA4
AC4
AD4
AE4
AF4
G5
H5
J5
K5
L5
P5
R5
T5
U5
V5
W5
AA5
AC5
AD5
AE5
AF5
F6
G6
H6
J6
K6
L6
P6
R6
T6
U6
V6
W6
Y6
AA6
AB6
AC6
AD6
AE6
AF6
AG6
F7
G7
H7
J7
K7
L7
T7
U7
V7
W7
Y7
AA7
AB7
AC7
AD7
AE7
AF7
AG7
AH7
AJ7
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
T13
R13
P13
N13
M13
U13
V13
W13
Y13
AA13
AB13
AD13
AE13
AF13
AG13
AH13
AJ13
G14
H14
J14
K14
L14
P14
R14
T14
U14
V14
W14
Y14
AA14
AB14
AE14
AF14
AG14
AH14
AJ14
A15
B15
D15
G15
H15
J15
K15
L15
M15
N15
P15
R15
T15
U15
V15
W15
Y15
AA15
AE15
AF15
AG15
AH15
AJ15
E16
F16
G16
H16
J16
L16
N16
P16
R16
T16
U16
V16
W16
Y16
AA16
AE16
AF16
AJ16
AM16
A17
B17
G17
H17
J17
K17
L17
N17
P17
R17
T17
U17
V17
W17
Y17
AA17
AB17
AE17
AF17
AJ17
AL17
IC2500
LGE7411(URSA9)
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361
VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396
VSS_397
VSS_398
VSS_399
VSS_400
VSS_401
VSS_402
VSS_403
VSS_404
VSS_405
VSS_406
VSS_407
VSS_408
VSS_409
VSS_410
VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427
VSS_428
VSS_429
VSS_430
VSS_431
VSS_432
VSS_433
VSS_434
VSS_435
VSS_436
VSS_437
VSS_438
VSS_439
VSS_440
VSS_441
VSS_442
VSS_443
VSS_444
VSS_445
VSS_446
VSS_447
VSS_448
VSS_449
VSS_450
VSS_451
VSS_452
VSS_453
VSS_454
VSS_455
VSS_456
VSS_457
VSS_458
VSS_459
VSS_460
VSS_461
VSS_462
VSS_463
VSS_464
VSS_465
VSS_466
VSS_467
VSS_468
VSS_469
VSS_470
VSS_471
VSS_472
VSS_473
VSS_474
VSS_475
VSS_476
VSS_477
VSS_478
VSS_479
VSS_480
VSS_481
VSS_482
VSS_483
VSS_484
VSS_485
VSS_486
VSS_487
VSS_488
VSS_489
VSS_490
VSS_491
VSS_492
VSS_493
VSS_494
VSS_495
VSS_496
VSS_497
VSS_498
VSS_499
VSS_500
VSS_501
VSS_502
VSS_503
VSS_504
VSS_505
VSS_506
VSS_507
VSS_508
VSS_509
D24
F24
G24
H24
J24
K24
L24
M24
N24
P24
R24
T24
U24
V24
W24
Y24
AA24
AB24
AC24
AD24
AE24
AF24
AL24
F25
G25
H25
J25
K25
L25
M25
N25
P25
R25
T25
U25
V25
W25
Y25
AA25
AB25
AC25
AD25
AE25
AF25
AM25
A26
F26
G26
H26
J26
K26
L26
M26
N26
P26
R26
T26
U26
V26
W26
Y26
AA26
AB26
AC26
AD26
AE26
AF26
AJ26
AL26
D27
F27
K27
N27
P27
R27
U27
V27
W27
Y27
AA27
AB27
F28
K28
P28
U28
AC28
AK28
A29
C29
D29
E29
F29
J29
M29
R29
V29
AA29
AC29
AK29
A30
B30
AC30
AK30
AM30
A31
B31
C31
J31
L31
AD31
AF31
AH31
B32
E32
J32
L32
P32
U32
Y32
AE32
AG32
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-133-HD
2013.12.17
U_Power
Page 66
TCON_PWR_5pin_Wafer
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
P7203
20037WR-05A00
1
2
3
4
5
6
T-con power
TCON_PWR_5pin_Wafer
C7203
C7202
0.1uF
10uF
25V
25V
TCON_PWR_5pin_Wafer
TCON_PWR_5pin_Wafer
L7201
MLB-201209-0120P-N2
L7202
MLB-201209-0120P-N2
TCON_PWR_5pin_Wafer
C7204
10uF
25V
OPT
PANEL_VCC
C7205
0.1uF
25V
TCON_PWR_5pin_Wafer
+12V
L13411
BLM18PG121SN1D
C13443
10uF
16V
C13410
0.1uF
+1.5V URSA DDR
POWER_ON/OFF2_1
R13424
10K
EN
R1
C13444
R13421
330pF
R13422
18K
4.7K
1%
1%
50V
R2
R13423
22K
1%
C13445
1uF
10V
Vout=0.765*(1+R1/R2)=1.516V
C13446
2200pF
50V
FB
VREG
SS
R13425
390K
IC13403
BD9D321EFJ
1
2
THERMAL
3
4
3A
MAX 4.7A
+1.5V_U_DDR
[EP]
VIN
8
9
7
6
5
BOOT
SW
GND
0.1uF
C13447
16V
L13412
2.2uH
C13448
22uF
10V
C13449
22uF
10V
2.5V
DCDC_DIODE
+1.15V URSA9 Core
R13410
100
1/16W
IC13408
MP8762HGLE-Z
EN
1
2
FB
3
SS
4
10A
5
PG
6
VCC
7
BST
8
1%
C13411
POWER_ON/OFF2_3
OPT
C13400
0.1uF
16V
R13401
R13402
R13403
R13404
1K
FREQ
R1
18K
1/16W
1%
10K
1/16W
1%
R2
C13401
0.033uF
AGND
50V
10K
1/16W
1%
R13407
100K
C13405
1/16W
1uF
1%
10V
R13409
33
1/16W
5%
0.1uF
16V
R13413
C13417
220K
1/10W
5%
R13412
LPBN8050T-1R0N
L13415
1.0uH
C13414
10uF
25V
330pF
50V
C13416
10uF
25V
C13419
22uF
2.5V
10V ZD13401
ZD13418
DCDC_DIODE
C13425
22uF
10V
L13420
+1.1V_U_VDDC
C13426
22uF
10V
+12V
1%
430K
1/16W
SW_2
16
SW_1
15
IN_2
14
PGND_4
13
PGND_3
12
PGND_2
11
PGND_1
10
IN_1
9
Vout=0.611*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BSD-14Y-UD-134-HD
2013.12.17
Page 67
UG87 ONLY
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SMD Top Side for Covershield 8.5T CLIP Top Side for Covershield
SMD_65UG87_TOP
M13505
MDS62110209
SMD_EMI
M13509
MDS62110209
M13510
MDS62110221
OPT
M13511
MDS62110209
SMD_EMI
M13512
MDS62110209
OPT
M13500
EAG64250901
OPT
M13502
EAG64250901
CLIP_EMI
CLIP 1 - PUSH TYPE
SMD bottom for ESD
SMD_BOT_3_10.5T
GASKET_8.0X6.0X10.5H
M4101
MDS62110225
SMD_BOT_3_8.5T
GASKET_8.0X6.0X8.5H
M4101-*1
MDS62110209
SMD_BOT_9_10.5T
GASKET_8.0X6.0X10.5H
M4107
MDS62110225
SMD_BOT_4_10.5T
GASKET_8.0X6.0X10.5H
M4102
MDS62110225
SMD_BOT_4_9.5T
GASKET_8.0X6.0X9.5H
M4102-*1
MDS62110214
SMD_BOT_1
GASKET_8.0X6.0X10.5H
M4109
MDS62110225
SMD_BOT_5_10.5T
GASKET_8.0X6.0X10.5H
MDS62110225
SMD_BOT_5_9.5T
GASKET_8.0X6.0X9.5H
MDS62110214
SMD_BOT_10_10.5T
GASKET_8.0X6.0X10.5H
MDS62110225
M4103
M4103-*1
M4110
CLIP_EMI
M13507
EAG64250901
SMD_65UG87_TOP
M13508
MDS62110209
SMD_BOT_6_10.5T
GASKET_8.0X6.0X10.5H
M4104
MDS62110225
SMD_BOT_6_9.5T
GASKET_8.0X6.0X9.5H
M4104-*1
MDS62110214
SMD_BOT_2
GASKET_8.0X6.0X10.5H
M4112
MDS62110225
SMD_BOT_7_10.5T
GASKET_8.0X6.0X10.5H
M4105
MDS62110225
SMD_BOT_11_10.5T
GASKET_8.0X6.0X10.5H
M4114
MDS62110225
SMD_BOT_8_10.5T
GASKET_8.0X6.0X10.5H
M4106
MDS62110225
HDMI1
HDMI1_BOT_SMD_10.5T
GASKET_8.0X6.0X10.5H
M4100
MDS62110225
HDMI1_BOT_SMD_8.5T
GASKET_8.0X6.0X8.5H
M4100-*1
MDS62110209
USB3
USB3_BOT_SMD_10.5T
GASKET_8.0X6.0X10.5H
M4111
MDS62110225
SMD Top for EMI 3.5T
M13514
MDS62110213
HDMI3_BOT_SMD_11.5T
GASKET_8.0X6.0X11.5H
M4100-*3
MDS62110228
HDMI1_BOT_SMD_9.5T
GASKET_8.0X6.0X9.5H
M4100-*2
MDS62110214
USB1_BOT_SMD_11.5T
GASKET_8.0X6.0X11.5H
M4111-*2
MDS62110228
OPT
MDS62110213
HDMI2
HDMI2_BOT_SMD_10.5T
GASKET_8.0X6.0X10.5H
HDMI2_BOT_SMD_8.5T
GASKET_8.0X6.0X8.5H
USB2 USB1
USB2_BOT_SMD_10.5T
GASKET_8.0X6.0X10.5H
M13515
M4108
MDS62110225
M4108-*1
MDS62110209
M4113
MDS62110225
OPT
GASKET_8.0X6.0X11.5H
HDMI2_BOT_SMD_11.5T
GASKET_8.0X6.0X11.5H
M4108-*2
MDS62110228
HDMI2_BOT_SMD_9.5T
GASKET_8.0X6.0X9.5H
M4108-*3
MDS62110214
USB2_BOT_SMD_11.5T
M4113-*2
MDS62110228
HDMI3
HDMI3_BOT_SMD_8.5T
GASKET_8.0X6.0X8.5H
M4115
MDS62110209
USB1_BOT_SMD_8.5T
GASKET_8.0X6.0X8.5H
M4116
MDS62110209
HDMI3_BOT_SMD_10.5T
GASKET_8.0X6.0X10.5H
M4115-*1
MDS62110225
HDMI3_BOT_SMD_9T
GASKET_8.0X6.0X9.0H
M4115-*2
MDS62110226
SMD_BOT_12_10.5T
GASKET_8.0X6.0X10.5H
M4117
MDS62110225
SMD_BOT_13_10.5T
GASKET_8.0X6.0X10.5H
M4118
MDS62110225
SMD_BOT_14_10.5T
GASKET_8.0X6.0X10.5H
M4119
MDS62110225
SMD_BOT_15_10.5T
GASKET_8.0X6.0X10.5H
M4120
MDS62110225
SMD_BOT_16_10.5T
GASKET_8.0X6.0X10.5H
M4121
MDS62110225
SMD_BOT_17_10.5T
GASKET_8.0X6.0X10.5H
M4122
MDS62110225
USB3_BOT_SMD_8.5T
GASKET_8.0X6.0X8.5H
M4111-*1
MDS62110209
OPT
GASKET_3.0X4.0X3.5H
M13805
MDS62110213
USB3_BOT_SMD_9.5T
GASKET_8.0X6.0X9.5H
M4111-*3
MDS62110214
SMD_TU_BOT_10.5T
GASKET_8.0X6.0X10.5H
M13806
MDS62110225
SMD_TU_BOT_9.5T
GASKET_8.0X6.0X9.5H
M13806-*1
MDS62110214
USB2_BOT_SMD_8.5T
GASKET_8.0X6.0X8.5H
M4113-*1
MDS62110209
SMD_TU_BOT_10.5T
GASKET_8.0X6.0X10.5H
M13807
MDS62110225
SMD_TU_BOT_9.5T
GASKET_8.0X6.0X9.5H
M13807-*1
MDS62110214
USB1_BOT_SMD_10.5T
GASKET_8.0X6.0X10.5H
M4116-*1
MDS62110225
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
UG87 ONLY
14.12.01
135 02
Page 68
Page 69
Trouble shooting guide
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Page 70
Main PCB
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
49/55UF85/86
Power
From PSU
T-CON B/D
2
3
1
Main processor_(LM15U),
1
DDR Memory
eMMC Memory
2
Micom for Key/IR sensing
Audio AMP
3
Audio
Local Key +IR
B/T Wifi
<SIZE: 254X183>
Page 71
Main PCB
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
60/65UF85/86
4
T-CON B/D
Power
From PSU
2
3
1
Main processor_(LM15U),
1
DDR Memory
eMMC Memory
2
Micom for Key/IR sensing
Audio AMP
3
FRC IC_(URSA9)
4
DDR memory
Audio
Local Key +IR Local Key +IR
B/T Wifi
<SIZE: 300X183>
Page 72
Main PCB
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
55/65UG87
4
T-CON B/D
Power
From PSU
B/T Wifi
Local Key +IR Local Key +IR
Audio
3
2
1
Main processor_(LM15U),
1
DDR Memory
eMMC Memory
2
Micom for Key/IR sensing
Audio AMP
3
FRC IC_(URSA9)
4
DDR memory
<SIZE: 300X183>
Page 73
Interconnection – sub PCB UF85 series
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
[PCBs]
1
Main PCB
7
3
1 2
6
5
4
BT/Wifi Combo ASSY IR Jog Key ASSY
2
PSU
3
T - CON
4
IR Jog Key ASSY
5
BT/Wifi Combo ASSY
6
To Main
Page 74
Interconnection – sub PCB UG87 series
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
7
1 2
[PCBs]
1
Main PCB
2
PSU
T - CON
3
BT/Wifi Combo ASSY
4
5
IR Jog Key ASSY
BT/Wifi Combo ASSY IR Jog Key ASSY
3
5
6
4
6
To Main
Page 75
Contents of Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No. Error symptom (High category) Error symptom (Mid category) Page Remarks
1
2 No video/No audio 2
3 Picture broken/ Freezing 3
4 Color error 4
5
6
7
8
9 Wrecked audio/discontinuation/noise 9
10
11
A. Video error
B. Power error
C. Audio error
No video/Normal audio 1
Vertical/Horizontal bar, residual image,
light spot, external device color error
No power 6
Off when on, off while viewing, power
auto on/off
No audio/Normal video 8
Remote control & Local switch checking
MR15 operating checking 11
10
5
7
12
13 Camera operating checking 13
14 External device recognition error 14
15 E. Noise Circuit noise, mechanical noise 15
16 F. Exterior error Exterior defect 16
D. Function error
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Wifi operating checking 12
Page 76
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
A. Video error
No video/ Normal audio
Established
date
Revised date
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable, Speaker Cable, IR B/D Cable,,,)
☞ A18 ☞A1
N
Y
Check Back Light
On with naked eye
☞A18
Check Power Board 24V output
On
Normal
voltage
N
Repair Power
Board or parts
Y N Check Power
Board
24V, 12V,3.5V etc.
Replace Inverter
Y
or module
Normal
voltage
N
Repair Power
Board or parts
End
Replace T-con/Main
Y
Board or module
And Adjust VCOM
No video
Normal audio
Normal
audio
Move to No
video/No audio
1/16
※ Precaution
Always check & record S/W Version and White
Balance value before replacing the Main Board
☞A4 & A2
Replace Main Board
1
Re-enter White Balance value
Page 77
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
No Video/
No audio
☞A18
Check various
voltages of Power
Board ( 3.5V,12V,
24V…)
A. Video error
No video/ No audio
Normal
voltage?
Replace Power
Board and repair
parts
Y
N
Check and
replace
MAIN B/D
Established
date
Revised date
End
2/16
2
Page 78
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
☞ A3
Check RF Signal level
Normal
Signal?
N
Check RF Cable
Connection
1. Reconnection
2. Install Booster
Normal
Picture?
Y
Close
Y
N
Error
symptom
A. Video error
Picture broken/ Freezing
Established
date
Revised date
. By using Digital signal level meter
. By using Diagnostics menu on OSD
( Advanced→ Channels→ Channel Tuning→ Manual Tuning → Check the Signal )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Check whether other equipments have problem or not.
(By connecting RF Cable at other equipment)
→ DVD Player ,Set-Top-Box, Different maker TV etc`
☞ A4
Normal
Picture?
Contact with signal distributor
or broadcaster (Cable or Air)
Y
S/W Version
N
Check
SVC
Bulletin?
S/W Upgrade
Normal
Picture?
Y
N
Y
N
Check
Tuner soldering
N
Replace
Main B/D
3/16
Y
Close
Close
3
Page 79
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
☞A6
Check color by input
-External Input
-COMPONENT
-AV
-HDMI
☞A8
Check Test pattern
Error
symptom
Color
error?
N
Check error
color input
mode
A. Video error
☞ A7
※ Check
and replace
Y
Link Cable
(V by one)
and contact
condition
External Input/
Component
error
Color error
Check external
device and
cable
Color
error?
N
Y
Replace Main B/D
Established
date
Revised date
External
device/Cable
normal
Color
error?
End
Y
4/16
Y
Replace module
N
Replace Main/T-con B/D
HDMI
error
Check external
device and
cable
4
N
Request repair
for external
device/cable
N
External
device/Cable
normal
Y
Replace Main/T-con B/D
Page 80
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
Vertical / Horizontal bar, residual image,
A. Video error
light spot, external device color error
Vertical/Horizontal bar, residual image, light spot
☞A6
Check color condition by input
-External Input
-Component
-HDMI
☞A8
Check Test pattern
Screen
normal?
N
Replace
module
Check external
Y
device
connection
condition
Normal?
N
Request repair
for external
device
External device screen error-Color error
☞ A7
Check and
Y
replace Link
Cable
Established
date
Revised date
Screen
normal?
End
N
Y
Replace Main/T-con B/D
(adjust VCOM)
For LGD panel
Replace Main B/D
For other panel
5/16
Replace
Module
N
Screen
normal?
Y
End
Check S/W Version
Check
version
S/W Upgrade
Normal
screen?
End
N
Y
N
Y
Check screen
condition by input
-External Input
-Component
-HDMI/DVI
External
Input
error
Component
error
HDMI/
DVI
5
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
Screen
normal?
Request repair for
external device
Screen
normal?
N
Y
Y
N
Replace
Main/T-con
B/D
Replace
Main /T-con
B/D
Page 81
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
☞ A17
Check
Logo LED
. Stand-By: Red or Turn On
. Operating: Turn Off
Check Power cord
was inserted properly
Error
symptom
Power LED
On?
N
Normal?
Y
Close
Y
N
※
Check ST-BY 3.5V
☞ A18
B. Power error
No power
DC Power on
by pressing Power Key
On Remote control
Normal
voltage?
Y
Y
N
Established
date
Revised date
☞ A18
Y
N
Check Power
On ‘”High”
Replace Main B/D
Normal
operation?
☞ A18
Measure voltage of each output of Power B/D
N
Y
Replace Main B/D
Normal
voltage?
Replace Power B/D
OK?
Y
6/16
Replace
Power
B/D
Replace Power
B/D
6
Page 82
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Check outlet
Check A/C cord
Check for all 3- phase
power out
Error
symptom
Error?
Y
Fix A/C cord & Outlet
and check each 3
phase out
B. Power error
Off when on, off while viewing, power auto on/off
☞ A19
N
Check Power Off
Mode
☞ A18
(If Power Off mode
is not displayed)
Check Power B/D
voltage
※ Caution
Check and fix exterior
of Power B/D Part
Abnormal
Abnormal
Established
date
Revised date
CPU
1
Normal
voltage?
Replace Power B/D
Replace Main B/D
Y
N
Replace Power B/D
Replace Main B/D
Normal?
N
7/16
Y
End
* Please refer to the all cases which
can be displayed on power off mode.
Status Power off List Explanation
"POWEROFF_REMOTEKEY" Power off by REMOTE CONTROL
"POWEROFF_OFFTIMER" Power off by OFF TIMER
"POWEROFF_SLEEPTIMER" Power off by SLEEP TIMER
"POWEROFF_INSTOP" Power off by INSTOP KEY
"POWEROFF_AUTOOFF" Power off by AUTO OFF
Normal
Abnormal
"POWEROFF_ONTIMER" Power off by ON TIMER
"POWEROFF_RS232C" Power off by RS232C
"POWEROFF_RESREC" Power off by Reservated Record
"POWEROFF_RECEND" Power off by End of Recording
"POWEROFF_SWDOWN" Power off by S/W Download
"POWEROFF_UNKNOWN" Power off by unknown status except listed case
"POWEROFF_ABNORMAL1" Power off by abnormal status except CPU trouble
"POWEROFF_CPUABNORMAL" Power off by CPU Abnormal
7
Page 83
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No audio
Screen normal
Error
C. Audio error
symptom
No audio/ Normal video
☞ A20 ☞ A21+A18
Check user
menu >
Speaker off
Off
Y
Cancel OFF
Check audio B+
N
24V of Power
Board
Established
date
Revised date
Normal
voltage
Replace Power Board and repair parts
Y
N
8/16
Check
Speaker
disconnection
Disconnection
Y
Replace Speaker
8
N
Replace MAIN Board
End
Page 84
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Check input
signal
-RF
-External Input
signal
Error
symptom
C. Audio error
Wrecked audio/ discontinuation/noise
Established
date
Revised date
→ abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio
☞ A21+A18
Check audio
B+ Voltage (24V)
Y
Normal
voltage?
N
Replace Power B/D
Replace Main B/D
N
Y
Signal
normal?
N
Y
(When RF signal is not
received)
Request repair to external
cable/ANT provider
(In case of
External Input
signal error)
Check and fix
external device
Wrecked audio/
Discontinuation/
Noise for
all audio
Wrecked audio/
Discontinuation/
Noise only
for D-TV
Wrecked audio/
Discontinuation/
Noise only
for Analog
Wrecked audio/
Discontinuation/
Noise only
for External Input
Check and replace
speaker and
connector
Replace Main B/D
Connect and check
other external
device
Normal
audio?
9/16
End
Check and fix external device
9
Page 85
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
Remote control & Local switch checking
1. Remote control(R/C) operating error
☞ A22
Check R/C itself
Operation
Check R/C Operating
When turn off light
in room
If R/C operate,
Explain the customer
cause is interference
from light in room.
operating?
Normal
Check & Replace
Y
N
Baterry of R/C
Normal
operating?
Replace R/C
Check & Repair
Cable connection
Connector solder
Y
Close
N
D. Function error
☞ A22
Normal
operating?
Close
N
Y
Check B+
3.5V
On Main B/D
☞ A18
Check 3.5v on Power B/D
(Power B/D don’t have problem)
Established
date
Revised date
Normal
Voltage?
Replace Power B/D or
Replace Main B/D
Y
N
☞ A22
Check IR
Output signal
10/16
Replace
Main B/D
Normal
Signal?
N
Repair/Replace
IR B/D
Y
10
Page 86
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
D. Function error
MR13 operating checking
2. MR15(Magic Remote control) operating error
☞ A4
N
Check the
INSTART menu
RF Receiver ver.
is “00.00”?
☞ A23
Check & Repair
connection
Y
RF assy
☞ A4
RF Receiver ver
is “00.00”?
Y
Check MR15
itself Operation
N
Close
Check & Replace
Battery of MR15
Normal
operating?
N
Normal
operating?
N
Replace
MR13
Y
Y
Press the
wheel
Close
Established
date
Revised date
Is show ok
message?
Y
Close
Is show ok
message?
Close
Y
Turn off/on the
N
set and press
the wheel
N
11/16
Press the back
key about 5sec
Down load the Firmware
* INSTART MENU 14.RF
Remote control Test 3.
Firmware download
* If you conduct the loop at 3times, change the M4.
11
Page 87
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
3. Wifi operating error
☞ A4
Check the
INSTART menu
Wi-Fi Mac value
is “NG”?
☞ A24
Check & Repair
Y
Wifi cable
connection
☞ A4
Wi-Fi Mac value
is “NG”?
D. Function error
Wifi operating checking
☞ A24
N
N
Check the Wifi wafer
1pin
Close
Established
Revised date
Normal
Voltage?
Y
Close
date
N
12/16
Replace
Main B/D
Change the Wifi
Y
assy
12
Page 88
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
4. Camera operating error
☞ A4
Check the
INSTART menu
Camera Ver.
Change the
Camera module
is “NULL”?
Y
D. Function error
Camera operating checking
☞ A25
N
Reconnect the
Camera module
Established
date
Revised date
Normal
operation?
Y
Close
N
13/16
Replace
Main B/D
13
Page 89
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Check
input
signal
Error
symptom
Y
Signal
input?
N
Check and fix
external device/cable
D. Function error
External device recognition error
Check technical
information
- Fix information
- S/W Version
Technical
information?
Fix in
accordance
with technical
information
Y
External Input
N
And Component
Recognition error
HDMI/DVI,
Optical Recognition
error
Established
date
Revised date
14/16
Replace Main B/D
Replace Main B/D
14
Page 90
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Identify
nose
type
Error
symptom
Circuit
noise
Mechanical
noise
Circuit noise, mechanical noise
Check location
of noise
Check location of
noise
E. Noise
※ Mechanical noise is a natural
phenomenon, and apply the 1st level
description. When the customer does not
agree, apply the process by stage.
※ Describe the basis of the description
in “Part related to nose ” in the Owner’s
Manual.
Replace PSU
OR
Established
date
Revised date
※ When the nose is severe, replace the module
(For models with fix information, upgrade the
S/W or provide the description)
※ If there is a “Tak Tak” noise from the
cabinet, refer to the KMS fix information and
then proceed as shown in the solution manual
(For models without any fix information,
provide the description)
15/16
15
Page 91
Standard Repair Process
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
Zoom part with
exterior damage
Module
damage
Cabinet
damage
Remote
control
damage
F. Exterior defect
Exterior defect
Replace module
Replace cabinet
Replace remote control
Established
date
Revised date
16/16
Stand
dent
Replace stand
16
Page 92
Contents of Standard Repair Process Detail Technical Manual
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No. Error symptom Content Page Remarks
1
A. Video error_ No video/Normal
audio
2 Check White Balance value A2
4
A. Video error_ video error /Video
lag/stop
5 TV Version checking method A4
6 Tuner Checking Part A5
A. Video error _Vertical/Horizontal bar,
7
residual image, light spot
8
A. Video error_ Color error
9 Adjustment Test pattern - ADJ Key A8
10
11 Exchange Main Board (2) A-2/5
<Appendix>
12 Exchange Power Board (PSU) A-3/5
Defected Type caused by T-Con/
Inverter/ Module
13 Exchange Module (1) A-4/5
Check LCD back light with naked eye A1
TUNER input signal strength checking
method
TV connection diagram A6
Check Link Cable (EPI) reconnection
condition
Exchange Main Board (1) A-1/5
A3
A7
14 Exchange Module (2) A-5/5
Continue to the next page
Page 93
Contents of Standard Repair Process Detail Technical Manual
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Continued from previous page
No. Error symptom Content Page Remarks
16
B. Power error_ No power
17 Check power input Voltage & ST-BY 3.5V A18
18
19
20
21
22
23 Wifi operation checking method A24
B. Power error_ Off when on, off
while viewing
C. Audio error_ No audio/Normal
video
D. Function error
Check front display LED A17
POWER OFF MODE checking method A19
Checking method in menu when there is
no audio
Voltage and speaker checking method
when there is no audio
Remote control operation checking
method
Motion Remote operation checking
method
A20
A21
A22
A23
Page 94
Standard Repair Process Detail Technical Manual
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
Content
<ALL MODELS>
A. Video error_No video/Normal audio
Check LCD back light with naked eye
Established
date
Revised
date
A1
After turning on the power and disassembling the case, check with the naked eye,
whether you can see light from locations.
A1
Page 95
Standard Repair Process Detail Technical Manual
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
Content
<ALL MODELS>
A. Video error_No video/Normal audio
Check White Balance value
Established
date
Revised
date
A2
Entry method
1. Press the ADJ button on the remote control for adjustment.
2. Enter into White Balance of item 10.
3. After recording the R, G, B (GAIN, Cut) value of Color Temp
(Cool/Medium/Warm), re-enter the value after replacing the MAIN BOARD.
A2
Page 96
Standard Repair Process Detail Technical Manual
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
Content
<ALL MODELS>
A. Video error_Video error, video lag/stop
TUNER input signal strength checking method
Established
date
Revised
date
Advanced Channels Channel Tuning
Manual Tuning
When the signal is strong,
use the attenuator (-10dB, -
15dB, -20dB etc.)
A3
Page 97
Standard Repair Process Detail Technical Manual
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
Content
A. Video error_Video error, video lag/stop
TV Version checking method
Established
date
Revised
date
A4
<ALL MODELS>
1. Checking method for remote control for adjustment
Version
v
Press the IN-START with the remote
control for adjustment
A4
Page 98
Standard Repair Process Detail Technical Manual
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
Content
<ALL MODELS>
A. Video error_Video error, video lag/stop
TUNER checking part
Established
date
Revised
date
A5
Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
2. After measuring each voltage from power supply, finally replace the MAIN BOARD.
A5
Page 99
Standard Repair Process Detail Technical Manual
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Error
symptom
Content
<ALL MODELS>
A. Video error _Vertical/Horizontal bar,
residual image, light spot
TV connection diagram (1)
Established
date
Revised
date
A6
As the part connecting to the external input, check
the screen condition by signal
A6
Page 100
Standard Repair Process Detail Technical Manual
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
<ALL MODELS>
Error
symptom
Content
Check Link Cable(VX1) reconnection condition
A. Video error_Color error
Established
date
Revised
date
A7
Check the contact condition of the Link Cable, especially dust or mis insertion.
A7