LED LCD TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : LD03E
MODEL: 42LE8500/850N 42LE8500/850N-ZA
MODEL: 42LE8800/8900 42LE8800/8900-ZA
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
Printed in Korea P/NO : MFL62863022 (1002-REV00)
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LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 7
BLOCK DIAGRAM...................................................................................14
EXPLODED VIEW .................................................................................. 15
SVC. SHEET ...............................................................................................
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LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1
*Base on Adjustment standard
IMPORTANT SAFETY NOTICE
0.15 uF
Ω
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LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
4. Module General Specification
1. Application range
This specification is applied to the LCD TV used LD03E
chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC :CE, IEC
No. Item Specification Remark
1 Display Screen Device 107 cm(42 inch) wide color display module LCD
2 Aspect Ratio 16:9
3 LCD Module 107 cm(42 inch) TFT LCD FHD
4 Operating Environment Temp. : 0 deg ~ 50 deg
Humidity : 20 % ~ 90 %
5 Storage Environment Temp. : -20 deg ~ 60 deg
Humidity : 10 ~ 90 %
6 Input Voltage AC 100-240V~, 50 / 60Hz
7 Power Consumption Power on (White)
LGD Typ : 90.3 LCD (Module) + Backlight(EDGE LED)
8 Module Size 973.2(H) x 566.2(V) x 23.5 mm(D) With inverter
8 Pixel Pitch 0.4845 (H) x 0.4845 (V)
9 Back Light LED(EDGE), LGE(IOP)
10 Display Colors 1.06 B(true) colors
11 Coating 3H
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LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Module optical specification
1) Standard Test Condition (The unit has been ‘ON’)
2) Stable for approximately 60 minutes in a dark environment at 25 ºC.
3) The values specified are at approximate distance 50 cm from the LCD surface.
No. Item Specification Min. Typ. Max. Remark
1. Viewing Angle [CR>10] Right/Left/Up/Down 89/89/89/89 CR > 10
2. Luminance Luminance (cd/m
2
) 360 450
Variation 1.3 MAX /MIN
3. Contrast Ratio CR 1000 1400
4. CIE Color Coordinates White Wx 0.279
Wy 0.292
RED Xr 0.636
Yr Typ. 0.335 Typ.
Green Xg -0.03 0.291 +0.03
Yg 0.603
Blue Xb 0.146
Yb 0.061
6. Component Video Input (Y, C
B/P B, C R/P R)
No.
Specification
Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
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LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No.
Specification
Proposed Remarks
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA
Input 848*480
60Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1280*1024 63.595 60.0 108.875 SXGA FHD model
8. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
7. RGB (PC)
8. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*1024 63.595 60.0 108.875 SXGA HDCP/FHD model
8. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P
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LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD TV with
LD03E chassis.
2. Designation
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ºC ± 5 ºC of temperature and 65 % ±10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~ 50 / 60Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15.
In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours
In case of keeping module is in the circumstance of below 20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
3. Automatic Adjustment
3.1. ADC Adjustment
(1) Overview
ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate
RGB deviation.
(2) Equipment & Condition
1) Jig (RS-232C protocol)
2) MSPG-925 Series Pattern Generator(MSPG-925FA,
pattern - 65)
- Resolution : 480i Comp1
1080P Comp1
1920*1080 RGB
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7±0.1 Vp-p
- Image
(3) Adjustment
1) Adjustment method
- Using RS-232, adjust items listed in 3.1 in the other
shown in “3.1.(3).3)”
2) Adj. protocol
Ref.) ADC Adj. RS232C Protocol_Ver1.0
3) Adj. order
- aa 00 00 [Enter ADC adj. mode]
- xb 00 04 [Change input source to Component1(480i&1080p)]
- ad 00 10 [Adjust 480i Comp1]
- xb 00 06 [Change input source to RGB(1024*768)]
- ad 00 10 [Adjust 1024*768 RGB]
- ad 00 90 End adj.
3.2. MAC Address
(1) Equipment & Condition
- Play file: Serial.exe
- MAC Address edit
- Input Start / End MAC address
(2) Download method
1) Communication Prot connection
Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port
Protocol Command Set ACK
Enter adj. mode aa 00 00 a 00 OK00x
Source change xb 00 40 b 00 OK40x (Adjust 480i, 1080p Comp1 )
xb 00 60 b 00 OK60x (Adjust 1920*1080 RGB)
Begin adj. ad 00 10
Return adj. result OKx (Case of Success)
NGx (Case of Fail)
Read adj. data (main) (main)
ad 00 20 000000000000000000000000007c007b006dx
(sub) (Sub)
ad 00 21 000000070000000000000000007c00830077x
Confirm adj. ad 00 99 NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
End adj. aa 00 90 a 00 OK90x
PCBA
PC(RS-232C)
RS-232C Por t
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LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2) MAC Address Download
- Com 1,2,3,4 and 115200(Baud rate)
- Port connection button click(1)
- Load button click(2) for MAC Address write.
- Start MAC Address write button(3)
- Check the OK Or NG
3.3. LAN
(1) Equipment & Condition
A Each other connection to LAN Port of IP Hub and Jig
(2) LAN inspection solution
A LAN Port connection with PCB
A Network setting at MENU Mode of TV
A setting automatic IP
A Setting state confirmation
-> If automatic setting is finished, you confirm IP and
MAC Address.
3.4. LAN PORT INSPECTION(PING TEST)
Connect SET -> LAN port == PC -> LAN Port
(1) Equipment setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2
(2) LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program.
2) Connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) Remove LAN CABLE
3.5. V-COM Adjust(Only LGD(M+S) Module)
- Why need Vcom adjustment?
A The Vcom (Common Voltage) is a Reference Voltage of
Liquid Crystal Driving.
-> Liquid Crystal need for Polarity Change with every frame.
Row Li ne
Column Li ne
CLC
CST
Pane l
S
Y
S
T
E
M
Gat e Driv e IC
So urce D r iv e I C
Circuit Block
Tim i ng
Cont r o ll er
Po w er
Blo ck
V
COM
Gamma
Ref er ence V o ltage
Gamm a Reference
Volta ge
Data (R,G ,B) & C on tro l signal
Cont rol si gnal
Data (R,G,B ) &
Cont rol si gnal
In t er fa ce
TFT
Po w er I np ut
Power Input
Da ta I n pu t
Da ta I n pu t
V
COM
Liquid
Crys tal
V
COM
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LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- Adjust sequence
A Press the PIP key of the ADJ remote control. (This PIP
key is hot key to enter the VCOM adjusting mode)
(Or After enter Service Mode by pushing “ADJ” key, then
Enter V-Com Adjust mode by pushing “G ” key at “10. VCom”)
A As pushing the right or the left button on the remote
control, And find the V-COM value Which is no or
minimized the Flicker.
(If there is no flicker at default value, Press the exit key
and finish the VCOM adjustment.)
A Push the OK key to store value. Then the message
“Saving OK” is pop.
A Press the exit key to finish VCOM adjustment.
3.6. Model name & serial number download
(1) Model name & Serial number D/L
A Press “Power on” key of service remote control.(Baud
rate : 115200 bps)
A Connect RS232 Signal Cable to RS-232 Jack.
A Write Serial number by use RS-232.
A Must check the serial number at Instart menu.
(2) Method & notice
A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C.Serial number D/L must be conformed when it is
produced in production line, because serial number D/L
is mandatory by D-book 4.0
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man,
sometimes model name or serial number is initialized.(Not
always)
There is impossible to download by bar code scan, so It
need Manual download.
a. Press the ‘instart’ key of ADJ remote control.
b. Go to the menu ‘5.Model Number D/L’ like below photo.
c. Input the Factory model name(ex 42LD450-ZA) or Serial
number like photo.
d. Check the model name Instart menu -> Factory name
displayed (ex 42LE7500-ZA)
e. Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 42LE7500-ZA)
3.7. CI+ Key Download method
(1) Download Procedure
1) Press "Power on" button of a service R/C.(Baud rate :
115200 bps)
2) Connect RS232-C Signal Cable.
3) Write CI+ Key through RS-232-C.
4) Check whether the key was downloaded or not at ‘In
Start’ menu. (Refer to below).
=> Check the Download to CI+ Key value in LGset.
1. check the method of CI+ Key value
a. check the method on Instart menu
b. check the method of RS232C Command
1) into the main ass’y mode (RS232 : aa 00 00)
2) check the key download for transmitted command
(RS232 : ci 00 10)
3) result value
- normally status for download : OKx
- abnormally status for download : NGx
2. Check the method of CI+ Key value (RS232)
1) into the main ass’y mode (RS232 : aa 00 00)
2) Check the method of CI+ key by command (RS232 :
ci 00 20)
3) Result value
i 01 OK 1d1852d21c1ed5dcx
[Visual Adjust and control the Voltage level]
CMD 1 CMD 2 Data 0
AA00
CMD 1 CMD 2 Data 0
CI10
CMD 1 CMD 2 Data 0
AA00
CMD 1 CMD 2 Data 0
CI20
CI+ key Value
- 10 -
LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4. Manual Adjustment
4.1. ADC(GP2) Adjustment
4.1.1. Overview
ADC adjustment is needed to find the optimum black level and
gain in Analog-to-Digital device and to compensate RGB
deviation.
4.1.2. Equipment & Condition
(1) Adjust Remocon
(2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern
Generator
- Resolution :
480i, 720*480 (MSPG-925FA -> Model: 209, Pattern: 65)
- 480i
1080p, 1920*1080 (MSPG-925FA -> Model: 225, Pattern:
65) - 1080p
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level: 0.7 ± 0.1 Vp-p
- Image
(3) Must use standard cable
4.1.3. Adjust method
(1) ADC 480i, 1080p Comp1
1) Check connected condition of Comp1 cable to the equipment
2) Give a 480i, 1080p Mode, Horizontal 100% Color Bar
Pattern to Comp1.
(MSPG-925FA -> Model: 209, Pattern: 65) - 480i
(MSPG-925FA -> Model: 225, Pattern: 65) - 1080p
3) Change input mode as Component1 and picture mode
as “Standard”
4) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select 7. External ADC ->
1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.
5) If ADC calibration is successful, “ADC RGB Success” is
displayed.
If ADC calibration is failure, “ADC RGB Fail” is displayed.
6) If ADC calibration is failure, after recheck ADC pattern or
condition retry calibration Error message refer to 5).
(2) ADC 1920*1080 RGB
1) Check connected condition of Component & RGB cable
to the equipment
2) Give a 1920*1080 Mode, 100 % Horizontal Color Bar
Pattern to RGB port.
(MSPG-925 Series -> model:126 , pattern:65 )
3) Change input mode as RGB and picture mode as “Standard”.
4) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select 7. External ADC ->
1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.
5) If ADC calibration is successful, “ADC RGB Success” is
displayed.
If ADC calibration is failure, “ADC RGB Fail” is displayed.
6) If ADC calibration is failure, after recheck ADC pattern or
condition retry calibration Error message refer to 5).
4.2. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download
(1) Overview
It is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of “Plug and Play”.
(2) Equipment
- Adjust remote control
- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
(3)Download method
1) Press Adj. key on the Adj. R/C, then select “10.EDID
D/L”, By pressing Enter key, enter EDID D/L menu.
2) Select [Start] button by pressing Enter key, HDMI1 /
HDMI2 / HDMI3 / HDMI4 / RGB are Writing and display
OK or NG.
(4) EDID DATA
A HDMI
A RGB
A Reference
- HDMI1 ~ HDMI4 / RGB
- In the data of EDID, bellows may be different by S/W or
Input mode.
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
For HDMI EDID For Analog EDID
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C0x0D 0x0E 0x0F
0x00 00 FF FF FF FF FF FF 00 1E 6D
ⓐⓑ
0x01 ⓒ 01 03 80 10 09 78 0A EE 91 A3 54 4C 99 26
0x02 0F 50 54 A1 08 00 71 4F 81 80 01 01 01 01 01 01
0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20
0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
0x07 ⓓ 01 ⓔ
0x00 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
0x01 22 15 01 26 15 07 50 09 57 07 67 ⓕ
0x02 ⓕ E3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C
0x03 25 00 A0 5A 00 00 00 9E 01 1D 00 80 51 D0 0C 20
0x04 40 80 35 00 A0 5A 00 00 00 1E 02 3A 80 18 71 38
0x05 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 66 21 50 B0
0x06 51 00 1B 30 40 70 36 00 A0 5A 00 00 00 1E 00 00
0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 ⓔ
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C0x0D 0x0E 0x0F
0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐⓑ
0x01 ⓒ 01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26
0x02 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20
0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
0x07 ⓓ 00 ⓔ
- 11 -
LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ⓐ Product ID
ⓑ Serial No. : Controlled on product line
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘01’ -> ‘01’
Year : ‘2010’ -> ‘14’
ⓓ Model Name(Hex):
ⓔ Checksum: Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
4.3. White Balance Adjustment
4.3.1 Overview
(1) W/B adj. Objective & How-it-works
(2) Objective: To reduce each Panel’s W/B deviation
(3) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.
(4) Adj. condition : normal temperature
1) Surrounding Temperature : 25 ºC ± 5 ºC
2) Warm-up time: About 5 Min
3) Surrounding Humidity : 20 % ~ 80 %
4.3.2 Equipment
1) Color Analyzer: CA-210 (LED Module : CH 14)
2) Adj. Computer(During auto adj., RS-232C protocol is
needed)
3) Adjust Remocon
4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model:217, Pattern:78)
-> Only when internal pattern is not available
A Color Analyzer Matrix should be calibrated using CS-1000
4.3.3. Equipment connection MAP
4.3.4. Adj. Command (Protocol)
<Command Format>
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
A RS-232C Command used during auto-adj.
Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. completed
*(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj.
wb 00 ff -> End white balance auto-adj.
A Adj. Map
Model Name HEX EDID Table DDC Function
42LE8*** 0001 01 00 Analog
42LE8*** 0001 01 00 Digital
MODEL MODEL NAME(HEX)
all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
INPUT MODEL NAME(HEX)
HDMI1 67 03 0C 00 10 00 B8 2D
HDMI2 67 03 0C 00 20 00 B8 2D
HDMI3 67 03 0C 00 30 00 B8 2D
HDMI4 67 03 0C 00 40 00 B8 2D
HDMI5 67 03 0C 00 50 00 B8 2D
Color Analyzer
Comp uter
Pattern Generator
RS- 232C
RS-232C
RS-232C
Probe
Signal Source
* If TV internal pattern is used, not needed
RS-232C COMMAND Explanation
[CMD ID DATA]
wb 00 00 Begin White Balance adj.
wb 00 10 Gain adj.(internal white pattern)
wb 00 1f Gain adj. completed
wb 00 20 Offset adj.(internal white pattern)
wb 00 2f Offset adj. completed
wb 00 ff End White Balance adj.(Internal pattern disappears)
ITEM Command Data Range Default
(Hex.) (Decimal)
Cmd 1 Cmd 2 Min Max
Cool R-Gain j g 00 C0
G-Gain j h 00 C0
B-Gain j i 00 C0
R-Cut
G-Cut
B-Cut
Medium R-Gain j a 00 C0
G-Gain j b 00 C0
B-Gain j c 00 C0
R-Cut
G-Cut
B-Cut
Warm R-Gain j d 00 C0
G-Gain j e 00 C0
B-Gain j f 00 C0
R-Cut
G-Cut
- 12 -
LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.3.5. Adj. method
(1) Auto adj. method
1) Set TV in adj. mode using POWER ON key.
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable (RS-232C)
4) Select mode in adj. Program and begin adjustment.
5) When adj. is complete (OK Sing), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
A W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
(2) Manual adj. method
1) Set TV in Adj. mode using POWER ON
2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10cm of the surface.
3) Press ADJ key -> EZ adjust using adj. R/C -> 7. WhiteBalance then press the cursor to the right (KEY G ).
(When KEY(G ) is pressed 216 Gray internal pattern will
be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
5) Adj. is performed in COOL, MEDIUM, WARM 3 modes
of color temperature.
A If internal pattern is not available, use RF input. In EZ
Adj. menu 7.White Balance, you can select one of 2
Test-pattern: ON, OFF. Default is inner(ON). By
selecting OFF, you can adjust using RF signal in 216
Gray pattern.
A Adj. condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
: Color Analyzer (CA-210) probe should be within
10cm and perpendicular of the module surface (80°~
100°)
3) Aging time
- After Aging Start, Keep the Power ON status during
5 Minutes.
- In case of LCD, Back-light on should be checked
using no signal or Full-white pattern.
4.3.6. Reference (White Balance Adj. coordinate
and temperature)
A Luminance : 216 Gray
A Standard color coordinate and temperature using CS-1000
(over 26 inch)
A Standard color coordinate and temperature using CA-
210(CH 9)
4.4. EYE-Q function check
Step 1) Turn on TV
Step 2) Press EYE key of Adj. R/C
Step 3) Cover the Eye Q II sensor on the front of the using
your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw
Data (Sensor data, Back light)”. If after 6 seconds,
R/G/B value is not lower than 10, replace Eye Q II
sensor.
Step 5) Remove your hand from the Eye Q II sensor and wait
for 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen,
replace Eye Q II sensor.
4.5. Local Dimming Function Check
Step 1) Turn on TV.
Step 2) Press Tilt key of Adj. R/C.
Step 3) Confirm under the screen.
Mode Color Coordination Temp ∆UV
xy
COOL 0.269 0.273 13000K 0.0000
MEDIUM 0.285 0.293 9300K 0.0000
WARM 0.313 0.329 6500K 0.0000
Mode Color Coordination Temp ∆UV
xy
COOL 0.269 ± 0.002 0.273 ± 0.002 13000K 0.0000
MEDIUM 0.285 ± 0.002 0.293 ± 0.002 9300K 0.0000
WARM 0.313 ± 0.002 0.329 ± 0.002 6500K 0.0000
- 13 -
LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.6. Option selection per country
(1) Overview
- Option selection is only done for models in Non-EU
- Applied model: LD03D/03E Chassis applied EU model
(2) Method
1) Press ADJ key on the Adj. R/C, then select Country
Group Menu
2) Depending on destination, select Country Group Code
04 or Country Group EU then on the lower Country
option, select US, CA, MX. Selection is done using +, or
GF KEY.
4.7. Tool Option selection
- Method : Press Adj. key on the Adj. R/C, then select Tool
option.
4.8. Ship-out mode check(In-stop)
After final inspection, press IN-STOP key of the Adj. R/C and
check that the unit goes to Stand-by mode.
After final inspection, Always turn on the Mechanical S/W.
5. GND and Internal Pressure check
5.1. Method
1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)
2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
5.2. Checkpoint
• TEST voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
• TEST time: 1 second
• TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
• LEAKAGE CURRENT: At 0.5mArms
6. Audio
Measurement condition:
1. RF input: Mono, 1KHz sine wave signal, 100% Modulation
2. CVBS, Component: 1KHz sine wave signal 0.4Vrms
3. RGB PC: 1KHz sine wave signal 0.7Vrms
7. USB S/W Download (option, Service only)
1) Put the USB Stick to the USB socket
2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting
3) Show the message “Copying files from memory”
4) Updating is starting.
5) Updating Completed, The TV will restart automatically
6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1. Push "IN-START" key in service remote control.
2. Select "Tool Option 1" and Push “OK” button.
3. Punch in the number. (Each model has their number.)
MODEL Tool 1 Tool 2 Tool 3 Tool 4 Tool 5
42LE8*** 24896 31795 64572 22958 2067
No. Item Min. Typ. Max. Unit
1. Audio practical max 9.0 10.0 12.0 W EQ Off
Output, L/R AVL Off
(Distortion=10% 8.5 8.9 9.8 Vrms Clear Voice Off
max Output)
2. Speaker (8Ω 10.0 15.0 W EQ On
Impedance) AVL On
Clear Voice On
- 14 -
LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
- 15 -
LGE Internal Use Only Copyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
300
200
400
540
530
840
830
920
710
810
120
580
820
510
500
511 330
560
310
910
521
800
LV1
LV2
900
A2
A5
A21
A10
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
SOC_RESET
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
NVRAM
+3.3V_NORMAL
4.7K
R1025
NC
R1032
E1
0
E2
VSS
Boot Strap
NAND_DATA[0-7]
NAND_ALE
NAND_CLE
RESET
+3.3V_NORMAL
R1027
10K
R1030 0
+3.3V_NORMAL
VCC
8
WP
7
SCL
6
SDA
5
C103
0.1uF
C171
8pF
OPT
+3.3V_NORMAL
R1000
R1036
OPT
R1040
OPT
R1039
R1037
OPT
R1002
OPT
R1034
R1006
OPT
R158
OPT
R157
OPT
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
IC102
M24M01-HRMN6TP
1
2
A8’h
3
4
Default Res. of all NAND pin is Pull-down
NAND_DATA[0]
NAND_DATA[1]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[6]
NAND_DATA[7]
NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash
1 : Boot From NAND Flash
NAND_IO[1] : NAND Block 0 Write (DNS)
0 : Enable Block 0 Write
1 : Disable Block 0 Write
NAND_IO[3:2] : NAND ECC (1, DNS)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
NAND_IO[6:5] : Xtal Bias Control (1, DNS)
00 : 1.2mA (Fundmental Recommand)
01 : 1.8mA
10 : 2.4mA (3rd over tune Recommand)
11 : 3.0mA
NAND_IO[7] : MIPS Frequency (DNS)
0 : 405MHz
1 : 378MHz
NAND_ALE : I2C Level (DNS)
0 : 3.3V Switching
1 : 5V Switching
NAND_CLE
0 : Enable D2CDIFF AC (DNS)
1 : Disabe D2CDIFF AC
R1026 22
R1028 22
C167
8pF
OPT
OPT
R1008
2.7K
R1005
2.7K
R169
2.7K
OPT
R1004
2.7K
R1003
2.7K
R1035
2.7K
OPT
R1007
2.7K
R1038
2.7K
R156
2.7K
R1001
2.7K
SYS_RESETb
SCL3_3.3V
SDA3_3.3V
SMD GASKET
6.5T_GAS
MDS62110206
5.5T_GAS
MDS62110204
7.5T_GAS
MDS62110205
9.5T_GAS
MDS61887710
GAS1
GAS1-*1
GAS1-*2
GAS1-*3
9.5T_GAS
GAS2
MDS62110206
OPT
GAS2-*3
9.5T_GAS
MDS61887710
GAS3
MDS62110206
OPT
GAS3-*3
9.5T_GAS
MDS61887710
GAS4
MDS62110206
OPT
GAS4-*3
9.5T_GAS
MDS61887710
GAS5
6.5T_GAS
MDS62110206
OPT
5.5T_GAS
7.5T_GAS
GAS5-*3
9.5T_GAS
MDS61887710
GAS6
6.5T_GAS
MDS62110206
GAS6-*1
5.5T_GAS
MDS62110204
GAS6-*2
7.5T_GAS
MDS62110205
GAS6-*3
MDS61887710
GAS7
MDS62110206
GAS7-*1
MDS62110204
GAS7-*2
MDS62110205
9.5T_GAS
MDS62110206
OPT
MDS61887710
GAS8
GAS8-*3
GAS9
MDS62110206
OPT
MDS62110204
55LD650_5.5T
MDS62110204
55LD650_5.5T
GAS9-*3
9.5T_GAS
MDS61887710
GAS1-*4
GAS3-*4
From wireless_I2C to micom I2C
+3.3V_NORMAL
10K
OPT
R173
G
Q103
WIRELESS_SDA
WIRELESS_SCL
FDV301N
D
OPT
R123 0
R124
S
G
Q104
FDV301N
D
S
OPT
WIRELESS
0
WIRELESS
SDA2_3.3V
SCL2_3.3V
* I2C MAP
* NAND FLASH MEMORY 4Gbit (512M for BB)
+3.3V_NORMAL
IC101
NAND04GW3B2DN6E
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VDD_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
FLASH_WP
NAND_RBb
NAND_REb
NAND_CEb
NAND_CLE
NAND_ALE
NAND_WEb
Open Drain
+3.3V_NORMAL
R136
4.7K
C
Q101
B
KRC103S
E
R134 2.7K
C114
0.1uF
R191 2.7K
C116
4700pF
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
VDD_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
1
NAND FLASH
2
3
4
5
6
RB
7
R
8
E
9
10
11
12
13
14
15
CL
16
AL
17
W
18
WP
19
20
21
22
23
24
NAND_CEb
NAND_ALE
NAND_REb
NAND_CLE
NAND_WEb
NAND_RBb
* I2C_0 :
* I2C_1 :
* I2C_2 :
* I2C_3 :
NAND_DATA[7]
NAND_DATA[6]
NAND_DATA[5]
NAND_DATA[4]
+3.3V_NORMAL
C136 10uF
NAND_DATA[3]
NAND_DATA[2]
NAND_DATA[1]
NAND_DATA[0]
CI_A[0-13]
EBI_CS
/CI_WAIT
EBI_WE
NAND_DATA[0-7]
10V
C115
0.1uF
+3.3V_NORMAL
R1045
4.7K
EBI_RW
EBI_CS
+3.3V_NORMAL
R194 4.7K
NAND_DATA[0-7]
CI_A[3]
CI_A[4]
CI_A[2]
CI_A[1]
CI_A[0]
CI_A[5]
CI_A[6]
CI_A[8]
CI_A[9]
CI_A[13]
CI_A[12]
CI_A[11]
CI_A[10]
CI_A[7]
22
22
R193 4.7K
NAND_DATA[0-7]
R116
R122
R117
R127
22
22
R140
NAND_DATA[0]
NAND_DATA[1]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[6]
NAND_DATA[7]
LNA2_CTL/BOSTER_CTL
EBI_ADDR3
EBI_ADDR4
EBI_ADDR2
EBI_ADDR1
EBI_ADDR0
EBI_ADDR5
EBI_ADDR6
EBI_ADDR8
EBI_ADDR9
EBI_ADDR13
EBI_ADDR12
EBI_ADDR11
EBI_ADDR10
EBI_ADDR7
EBI_TAB
EBI_WE1B
EBI_CLK_IN
EBI_CLK_OUT
EBI_RWB
EBI_CS0B
NAND_DATA0
NAND_DATA1
NAND_DATA2
NAND_DATA3
NAND_DATA4
NAND_DATA5
NAND_DATA6
NAND_DATA7
NAND_CS0B
NAND_ALE
NAND_REB
NAND_CLE
NAND_WEB
NAND_RBB
SF_MISO
SF_MOSI
SF_SCK
SF_CSB
/CI_SEL
IC100
R181 100
LGE3556C (C0 VERSION)
J23
J24
H25
H24
H23
J25
F26
H28
J26
H27
G26
J27
J28
F27
G24
H26
G27
33
G28
K23
G25
U24
T26
T27
U26
U27
V26
V27
V28
T24
R23
T23
T25
R24
U25
W24
U23
V23
V24
IF_AGC_SEL
RF_SWITCH_CTL
BT_ON/OFF
GPIO_00
GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06
GPIO_07
GPIO_08
GPIO_09
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
SGPIO_00
SGPIO_01
SGPIO_02
SGPIO_03
SGPIO_04
SGPIO_05
SGPIO_06
SGPIO_07
R1012 100
R1019 100
R1024 100
BCM BT MODULE
22
R130
N26
L26
N25
L25
K27
K28
K24
K26
K25
DEMOD_RESET
AA27
AA28
AA26
L1
L3
L2
Y25
Y26
M27
AA25
R25
N28
N27
AH18
P23
M23
AD19
AE19
M4
M5
L23
BCM_AVC_DEBUG_TX1
Y28
Y27
BCM_AVC_DEBUG_RX1
G2
G3
G5
G6
G4
L24
P25
L5
K4
K1
L27
M26
N23
R28
R27
R26
P28
P27
K6
K5
P26
M3
M2
M1
L4
L6
W27
W28
W26
W25
J2
J1
K3
K2
GIP
OLED
R118 1K
NON_OLED
NON_GIP
R119 1K
OPT
0
22
1K
R1029
22
R111
BT_MUTE
R199
1K
R106
100
R1048
R109 100
R110 100
R107
R108
0
R1033
R1046
R132
R1050
R161 100
R133
R103 0
R129
22
R160 100
22
R102
22
R1049
22
R1051
LOCAL DIMMING
+3.3V_NORMAL
FHD
R1017 1K
R1013 1K
R1009 1K
EXTERNEL FRC/T_CON FRC
HD
R1021 1K
R1023 1K
R1010 1K
NO FRC/INTERNER FRC
R1047
R192 0
R114 1K
R113
R1042
1K
100
100
R1044
22
22
22
100
22
DDR_512MB
R1022 1K
R1011 1K
MINI_LVDS/NO LOCAL_D
DDR_256MB
LVDS/LOCAL_D
R1015 1K
R1014 1K
100
FRC
R1020 1K
NO_FRC
R1018 1K
INTERRUPT PIN
POWER_DET
INTERRUPT PIN
DC DC
INTERRUPT PIN
ERROR_OUT
MODEL_OPT_4
MODEL_OPT_5
SIDE_AV_DET
CI_5V_CTL
HDMI_HPD_4
DEMOD_RESET
PWM_DIM
HDMI_HPD_3
MODEL_OPT_1
DSUB_DET
BT_RESET
/RST_HUB
SC_RE1
SC_RE2
CI_MOD_RESET
MODEL_OPT_0
DD
HDMI_HPD_2
HDMI_HPD_1
5V_HDMI_1
EPHY_ACTIVITY
EPHY_LINK
/CI_CD1
M_REMOTE_TX
M_REMOTE_RX
VREG_CTRL
TUNER_RESET
DTV_ATV_SELECT
5V_HDMI_2
AV_CVBS_DET
FE_TS_VAL_ERR
5V_HDMI_3
5V_HDMI_4
MODEL_OPT_2
SCART1_DET
SIDE_COMP_DET
RF_SWITCH_CTL_CHB RF_SWITCH_CTL_CHB
RGB_DDC_SCL
FRC_RESET
RGB_DDC_SDA
COMP2_DET
LG5111_RESET
HP_DET
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
For CI
DEMOD_RESET
DD
R105 56
IR_IN
R1041 12K
IR_IN
BB Add.
For CI
R115 1.8K
External Demod.
R1052
4.7K
17page:M_RFMODULE_RESET
15page:TW_9910_RESET
15page:CHB_RESET
28page : ISDB Demod
17page : Motion Remocon
EMI
C173
C180
22uF
100pF
16V
50V
M_REMOTE_TX
17page : Motion Remocon
M_REMOTE_RX
17page : Motion Remocon
CI_OUTCLK
/CI_CD2
/CI_IREQ
MODEL_OPT_6
MODEL_OPT_3
SIDE_COMP_DET
+3.3V_NORMAL
LG5111_RESET
1.2K
17page : Motion Remocon
BCM_RX
BCM_TX
AUD_MASTER_CLK
A_DIM
For CI
WIRELESS_DL_RX
WIRELESS_DL_TX
15page : CHB_SUB_TUNER
1.2K
1.2K
R187
R184
R183
MODEL OPTION
PIN NAME
MODEL_OPT_0
MODEL_OPT_1 AA26
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
*MODEL_OPT_0 & MODEL_OPT_4
REFER TO THIS OPTION
MODEL_OPT_0
LOW
HIGH
HIGH
LOW
EXT IRQ
GPIO_00, GPIO_01, GPIO_02,
GPIO_11, GPIO_11, GPIO_39
IR_INT : GPIO_23
IR1_IN : GPIO_25
IR2_IN : GPIO_29
IR_OUT : GPIO_26
PWM0 : GPIO_24
PWM1 : GPIO_09
+3.3V_NORMAL
1.2K
1.2K
R180
PIN NO.
MODEL_OPT_4
LOW
LOW
HIGH
HIGH
1.2K
1.2K
R176
R171
R177
N28
R26
K1
L25
K27
K4
HIGH
URSA3
MAIN_MINI_LVDSHDMAIN_LVDS
DDR-256M
FHD
FRC
GIP
OLED
NO FRC
URSA3 Internal
URSA3 External
PWIZ Pannel T-con
with LG FRC
FOR ESD 12V Pattern
+12V
C178
C179
0.1uF
0.1uF
50V
50V
1.2K
R170
SCL0_3.3V
SDA0_3.3V
SCL1_3.3V
SDA1_3.3V
SCL2_3.3V
SDA2_3.3V
SCL3_3.3V
SDA3_3.3V
LOW
NON_URSA3
DDR-512M
NON_FRC
NON-GIP
NON_OLED
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM (EUROBBTV)
BCM3556 & NAND FLASH
2009.06.18
1
Route INCM between associated
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
left and right signals of same channel
The INCM trace ends at the
same point where the connector
ground connects to the board ground
(thru-hole connector pin).
Place test points, resistors
near audio connector.
Connect the other side of
the resistor to GND as close
as possible to the ground
connection of the associated
audio connector.
BROAD BAND STUDIO
1
2
3
4
+3.3V_NORMAL
C2028
A2.5V A1.2V
041:B5
041:B5
002:J6
002:J6
041:B5
041:B5
002:J7
041:B5
041:B5
002:J6
009:I3
009:I3
002:J7
P200
TJC2508-4A
R200
1.5K
R201
4.7uF
BLM18PG121SN1D
L212
REAR_AV_L_IN
REAR_AV_R_IN
REAR_AV_LR_INCM
COMP2_L_IN
COMP2_R_IN
COMP2_LR_INCM
SC1_L_IN
SC1_R_IN
SC1_LR_INCM
SIDE_AV_L_IN
SIDE_AV_R_IN
SIDE_AV_LR_INCM
PC_L_IN
PC_R_IN
PC_LR_INCM
1.5K
CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
A3.3V
L202
BLM18PG121SN1D
R220 : BCM recommened resistor 562 ohm
DTV/MNT_V_OUT
A3.3V
C201
100pF
C2026
4.7uF
R204 51
R214 51
R215 51
R228 51
R229 51
R230 51
R231 51
R232 51
R233 51
R234 51
A1.2V
BLM18PG121SN1D
L200
R209
3.9K
R210
120
BLM18PG121SN1D
C244
0.1uF
16V
C206 0.015uF
C210 0.015uF
C211 0.015uF
C232 0.015uF
C220 0.015uF
C221 0.015uF
C224 0.015uF
C225 0.015uF
C226 0.015uF
C227 0.015uF
A2.5V
C20 2 0.1 uF
BLM18PG121SN1D
L210
R264 0
FE_TS_DATA_CLK
FE_TS_SERIAL
FE_TS_SYNC
045:V14
A1.2V
A2.5V
0
R2360R237
75
1%
R238
C20 9 0 .1uF
C20 7 0 .1uF
C208 4.7uF
C20 3 0.1 uF
EPHY_RDN
EPHY_RDP
EPHY_TDN
EPHY_TDP
L209
C2020
C2021
0.1uF
4.7uF
0
0.047uF
C279 0.047uF
C277
C2027 0.047uF
R265
C296 0.047uF
4.7uF
C212
D3.3V
C247
C298 0.047uF
C299 0.047uF
0.1uF
C215
0.1uF
C213
0.01uF
0.1uF
C252 0.047uF
0.1uF
C214
BT_DM
BT_DP
SIDE_USB_DM
SIDE_USB_DP
R266
R235
2.7K
2.7K
R218
240
4.7uF
C2018
C253 0.047uF
C256 0.047uF
C254 0.047uF
TP4021
TP4022
TP4023
CI_A[14]
CI_OUTDATA[0]
CI_OUTDATA[1]
CI_OUTDATA[2]
CI_OUTDATA[3]
CI_OUTDATA[4]
CI_OUTDATA[5]
CI_OUTDATA[6]
CI_OUTDATA[7]
CI_OUTSTART
CI_OUTVALID
0.1uF
C219
C223
R220 560
1K
R219
C222
0.1uF
LGE3556C (C0 VERSION)
D23
PKT0_CLK
C24
PKT0_DATA
B26
PKT0_SYNC
A25
RMX0_CLK
B25
RMX0_DATA
A26
RMX0_SYNC
G23
POD2CHIP_MCLKI
D25
POD2CHIP_MDI0
D24
POD2CHIP_MDI1
C25
POD2CHIP_MDI2
E27
POD2CHIP_MDI3
E26
POD2CHIP_MDI4
D28
POD2CHIP_MDI5
D27
POD2CHIP_MDI6
D26
POD2CHIP_MDI7
E23
POD2CHIP_MISTRT
E24
POD2CHIP_MIVAL
F25
CHIP2POD_MCLKO
C27
CHIP2POD_MDO0
C26
CHIP2POD_MDO1
B28
CHIP2POD_MDO2
B27
CHIP2POD_MDO3
A27
CHIP2POD_MDO4
F24
CHIP2POD_MDO5
F23
CHIP2POD_MDO6
E25
CHIP2POD_MDO7
C28
CHIP2POD_MOSTRT
A28
CHIP2POD_MOVAL
AC18
VDAC_AVDD2P5
AF20
VDAC_AVDD1P2
AG20
VDAC_AVDD3P3_1
AG21
VDAC_AVDD3P3_2
AF19
VDAC_AVSS_1
AD20
VDAC_AVSS_2
AE20
VDAC_AVSS_3
AH22
VDAC_RBIAS
AH20
VDAC_1
AG19
VDAC_2
AH21
VDAC_VREG
M25
BSC_S_SCL
M24
BSC_S_SDA
R6
USB_AVSS_1
T6
USB_AVSS_2
R7
USB_AVSS_3
T7
USB_AVSS_4
T8
USB_AVSS_5
R3
USB_AVDD1P2
U3
USB_AVDD1P2PLL
T4
USB_AVDD2P5
T3
USB_AVDD2P5REF
R4
USB_AVDD3P3
U4
USB_RREF
V1
USB_DM1
V2
USB_DP1
U1
USB_DM2
U2
USB_DP2
T5
USB_MONCDR
R5
USB_MONPLL
R1
USB_PWRFLT_1
R2
USB_PWRFLT_2
T2
USB_PWRON_1
T1
USB_PWRON_2
P6
EPHY_VREF
P5
EPHY_RDAC
P3
EPHY_RDN
P2
EPHY_RDP
N3
EPHY_TDN
N2
EPHY_TDP
P1
EPHY_AVDD1P2
P4
EPHY_AVDD2P5
N4
EPHY_PLL_VDD1P2
N1
EPHY_AGND_1
N5
EPHY_AGND_2
P7
EPHY_AGND_3
AE6
AUDMX_LEFT1
AD7
AUDMX_RIGHT1
AF6
AUDMX_INCM1
AH4
AUDMX_LEFT2
AG5
AUDMX_RIGHT2
AG4
AUDMX_INCM2
AG6
AUDMX_LEFT3
AF7
AUDMX_RIGHT3
AE7
AUDMX_INCM3
AH5
AUDMX_LEFT4
AG7
AUDMX_RIGHT4
AH6
AUDMX_INCM4
AD8
AUDMX_LEFT5
AF8
AUDMX_RIGHT5
AE8
AUDMX_INCM5
AH7
AUDMX_LEFT6
AH8
AUDMX_RIGHT6
AG8
AUDMX_INCM6
AF5
AUDMX_AVSS_1
AB9
AUDMX_AVSS_2
AA10
AUDMX_AVSS_3
AB10
AUDMX_AVSS_4
AA11
AUDMX_AVSS_5
AB11
AUDMX_AVSS_6
AC8
AUDMX_LDO_CAP
AE5
AUDMX_AVDD2P5
IC100
VCXO_PLL_AUDIO_TESTOUT
PLL_MAIN_MIPS_EREF_TESTOUT
A2.5V
LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_CLK_P
LVDS_TX_0_CLK_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA4_N
LVDS_TX_1_CLK_P
LVDS_TX_1_CLK_N
LVDS_PLL_VREG
LVDS_TX_AVDDC1P2
LVDS_TX_AVDD2P5_1
LVDS_TX_AVDD2P5_2
LVDS_TX_AVSS_1
LVDS_TX_AVSS_2
LVDS_TX_AVSS_3
LVDS_TX_AVSS_4
LVDS_TX_AVSS_5
LVDS_TX_AVSS_6
LVDS_TX_AVSS_7
LVDS_TX_AVSS_8
LVDS_TX_AVSS_9
LVDS_TX_AVSS_10
LVDS_TX_AVSS_11
CLK54_AVDD1P2
CLK54_AVDD2P5
CLK54_AVSS
CLK54_XTAL_N
CLK54_XTAL_P
CLK54_MONITOR
PM_OVERRIDE
VCXO_AGND_1
VCXO_AGND_2
VCXO_AGND_3
VCXO_AVDD1P2
RESET_OUTB
RESETB
NMIB
TMODE_0
TMODE_1
TMODE_2
TMODE_3
SPI_S_MISO
POR_OTP_VDD2P5
POR_VDD1P2
EJTAG_TCK
EJTAG_TDI
EJTAG_TDO
EJTAG_TMS
EJTAG_TRSTB
EJTAG_CE0
EJTAG_CE1
PLL_MAIN_AVDD1P2
PLL_MAIN_AGND
PLL_RAP_AVD_TESTOUT
PLL_RAP_AVD_AVDD1P2
PLL_RAP_AVD_AGND
BYP_CPU_CLK
BYP_DS_CLK
BYP_SYS216_CLK
BYP_SYS175_CLK
B4
A4
C6
B6
B3
A3
A1
A2
D5
D6
C5
B5
B1
B2
C2
C3
D1
D2
E1
E2
E3
E4
D3
D4
F5
F1
F4
F2
C1
F3
C4
A5
E5
E6
D7
E7
F7
G7
H7
AD27
AD28
AD26
AC26
AC27
AE25
Y23
AA23
AB24
AC24
AF25
AF24
P24
F6
N24
J5
J4
J6
J3
V25
AH3
AB8
H4
H3
H2
H1
G1
H6
H5
AB26
AC25
AB27
M6
N6
N7
AA24
Y24
AE24
AD25
OPT
C228
10uF
C233
0.1uF
4.7K
R221
L211
BLM18PG121SN1D
C231
10uF
R240
390
OPT
TP is Necessory
0.1 uF
C23 6
A1.2V
0.1 uF
C20 12
C235
4.7uF
+3.3V_NORMAL
A2.5V
1K
R249
C23 8
0.1 uF
R222 1K
R262 1K
LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_CLK_N
LVDS_TX_1_CLK_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA0_P
LVDS_TX_0_CLK_N
LVDS_TX_0_CLK_P
0.1 uF
0.1 uF
4.7uF
C29 5
C242
C23 9
A2.5V
C25 1
0.1 uF
L203
BLM18PG121SN1D
C234
0.1uF
C241
4.7uF
4.7uF
C2013
A1.2V
BLM18PG121SN1D
BLM18PG121SN1D
C240
C23 7
0.1 uF
013:E7;035:AK20
013:E7;035:AK19
013:E7;035:AK19
013:E7;035:AK19
013:E7;035:AK17
013:E7;035:AK17
013:E7;035:AK17
013:E7;035:AK16
013:E7;035:AK16
013:E7;035:AK16
013:E7;035:AK18
013:E7;035:AK18
013:F7;035:AK15
013:F7;035:AK14
013:F7;035:AK14
013:F7;035:AK14
013:F7;035:AK12
013:F7;035:AK12
013:E7;035:AK12
013:E7;035:AK11
013:E7;035:AK11
013:E7;035:AK11
013:E7;035:AK13
013:E7;035:AK13
54MHz_XTAL_N
54MHz_XTAL_P
SYS_RESETb
L204
L207
4.7uF
002:I1
002:I2
A1.2V
001:A6;001:B7
A1.2V
A1.2V
+3.3V_NORMAL
OPT
R224
2.7K
R226
2.7K
A1.2V
A2.5V
R225
2.7K
R227
2.7K
54MHz X-TAL
54MHz_XTAL_N
54MHz_XTAL_P
When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF
When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF
C230
12pF
3
12pF
C229
33pF
C257
L208
1008LS-272XJLC
R243
604
R212
R211
22
2 1
X903
54MHz
22
VIDEO INCM
PLACE NEAR BCM CHIP
R248
34
R244
34
R245
34
R24634R247
34
C2011 0.1uF
R260
34
C2023 0.1uF
R261
34
C258 0.1uF
C2019 0.1uF
C261 0.1uF
R250
34
C262 0.1uF
C2015 0.1uF
C2016 0.1uF
C264 0.1uF
R251
34
Near Q1705
Near J1500
Near J1603
Near P1600
OPT
Near J1500
Near J1501
Run Along TUNER_CVBS_IF_P Trace
Run Along SC1_R,SC_G,SC_B Trace
Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace
Run Along DSUB_R Trace
Run Along DSUB_G Trace
Run Along DSUB_B Trace
Run Along SC1_CVBS_IN Trace
Run Along SC2_CVBS_IN Trace
TU_CVBS_INCM
003:A3
SC1_RGB_INCM
003:A4
REAR_AV_CVBS_INCM
003:A3
COMP2_VID_INCM
R_VID_INCM
003:A5
G_VID_INCM
003:A5
B_VID_INCM
003:A5
SC1_CVBS_INCM
SIDE_AV_CVBS_INCM
003:A3
003:A3
AUDIO INCM
PLACE NEAR Jacks
Near J1501
Near J1600
Near J1603
Near J1500
R256
R258
R259
R257
5.1
Route Between SC2_L_IN & SC2_R_IN
5.1
Route Between AV1_L_IN & AV1_R_IN
5.1
Route Between COMP1_L_IN & COMP1_R_IN
5.1
Route Between SC1_L_IN & SC1_R_IN
PLACE NEAR BCM CHIP
SIDE_AV_LR_INCM
0.15uF
C2014
0.15uF
C2024
0.15uF
C265
0.15uF
C2022
0.47uF
C271
0.47uF
C2017
C2025
0.47uF
0.47uF
C270
002:C6
REAR_AV_LR_INCM
COMP2_LR_INCM
002:C6
SC1_LR_INCM
002:C6
002:C6
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
C217
10uF
Near J1602
Near Q1704
5.1
R252
BCM3556 AUD_IN/LVDS
Route Between PC_L_IN & PC_R_IN
Route Along With TUNER_SIF_IF_N
BCM (EUROBBTV)
0.15uF
C269
0.47uF
C2010
TU_SIF_INCM
2009.06.18
2
PC_LR_INCM
002:C6
003:A3
Place here for common circuit with ATSC
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+1.8V_HDMI +1.8V_AMP
L111
BLM18PG121SN1D
C2008
0.1uF
16V
L112
CIC21J501NE
C288
1000pF
D1.2V
C290
0.01uF
C245
4.7uF
C255
1000pF
C377
0.01uF
C375
0.1uF
C263
4.7uF
C373
1000pF
C267
0.01uF
D1.2V
A3.3V +3.3V_NORMAL
C2007
0.1uF
16V
C243
0.1uF
4.7uF
1000pF
C382
0.01uF
C381
0.1uF
C380
10uF
C379
10uF
C286
33uF
C287
100uF
FOR ESD
C383
1000pF
C246
0.01uF C250
C378
0.1uF
C376
4.7uF C249
C259
1000pF
C374
0.01uF
C366
0.1uF
C266
4.7uF
C289
0.1uF
D3.3V
C291
10uF
COMPONENT
COMP2_Y
COMP2_Pr
COMP2_Pb
COMP2_VID_INCM
SC1_RGB(EU)/COMPNENT1[NON_EU]
COMP1_Y ==>
COMP1_Pr ==>
COMP1_Pb ==>
SIDE COMPONENT
SC1_G
SC1_R
SC1_B
SC1_RGB_INCM
SIDE_COMP_Y
SIDE_COMP_Pr
SIDE_COMP_Pb
SIDE_COMP_INCM
CVBS
TU_SIF
26page : TUNER(HALF NIM)
TU_IF_AGC_1
TU_IF_AGC_2
TU_IF_N_1
TU_IF_P_1
TU_IF_N_1
TU_IF_P_1
DSUB
R195 10
TU_SIF_INCM
DSUB_R
R_VID_INCM
DSUB_G
G_VID_INCM
DSUB_B
B_VID_INCM
1%
82
OPT
1%
R120
C104
75
OPT
1%
OPT
R13 5
C105
NON_EU
SIDE_COMP_Y
SIDE_COMP_Pr
SIDE_COMP_Pb
SIDE_COMP_INCM
TU_CVBS
REAR_AV_CVBS
SC1_CVBS_IN
SIDE_AV_CVBS
TU_CVBS_INCM
REAR_AV_CVBS_INCM
SC1_CVBS_INCM
SIDE_AV_CVBS_INCM
SC1_FB
75
1%
R312
1%
R31 5 75
NON_EU
R196
10
1%
R128
OPT
CONNECT NEAR BCM CHIP
TU_IF_AGC_1
TU_IF_AGC_2
75
1%
R131
1%
R31 3 75
0
OPT
120
R3056
R135-*1
R2112
R3055
240
EU
0.1uF
C106
C4020
0.1uF
C293
0.01uF
C2005
0.01uF
D3.3V
D1.8V
C294
0.1uF
C2006
0.01uF
C365
0.1uF
C272
0.1uF
C357
10uF
10V
DVSS_1
DVSS_2
DVSS_3
DVSS_4
DVSS_5
DVSS_6
DVSS_7
DVSS_8
DVSS_9
DVSS_10
DVSS_11
DVSS_12
DVSS_13
DVSS_14
DVSS_15
DVSS_16
DVSS_17
DVSS_18
DVSS_19
DVSS_20
DVSS_21
DVSS_22
DVSS_23
DVSS_24
DVSS_25
DVSS_26
DVSS_27
DVSS_28
DVSS_29
DVSS_30
DVSS_31
DVSS_32
DVSS_33
DVSS_34
DVSS_35
DVSS_36
DVSS_37
DVSS_38
DVSS_39
DVSS_40
DVSS_41
DVSS_42
DVSS_43
DVSS_44
DVSS_45
DVSS_46
DVSS_47
DVSS_48
DVSS_49
DVSS_50
DVSS_51
DVSS_52
DVSS_53
DVSS_54
DVSS_55
DVSS_56
DVSS_57
DVSS_58
DVSS_59
DVSS_60
DVSS_61
C275
0.1uF
C356
0.1uF
16V
IC100
0.1uF
C348
0.1uF
16V
DVSS_62
DVSS_63
DVSS_64
DVSS_65
DVSS_66
DVSS_67
DVSS_68
DVSS_69
DVSS_70
DVSS_71
DVSS_72
DVSS_73
DVSS_74
DVSS_75
DVSS_76
DVSS_77
DVSS_78
DVSS_79
DVSS_80
DVSS_81
DVSS_82
DVSS_83
DVSS_84
DVSS_85
DVSS_86
DVSS_87
DVSS_88
DVSS_89
DVSS_90
DVSS_91
DVSS_92
DVSS_93
DVSS_94
DVSS_95
DVSS_96
DVSS_97
DVSS_98
DVSS_99
DVSS_100
DVSS_101
DVSS_102
DVSS_103
DVSS_104
DVSS_105
DVSS_106
DVSS_107
DVSS_108
DVSS_109
DVSS_110
DVSS_111
DVSS_112
DVSS_113
DVSS_114
DVSS_115
DVSS_116
DVSS_117
0.1uF
C274
0.1uF
C363
C364
0.1uF
0.1uF
16V
16V
16V
LGE3556C (C0 VERSION)
AD5
AD6
J7
K7
L7
M7
AB7
AC7
G8
D9
AA9
G10
A11
L11
M11
N11
P11
R11
T11
U11
V11
D12
G12
L12
M12
N12
P12
R12
T12
U12
V12
L13
M13
N13
P13
R13
T13
U13
V13
G14
L14
M14
N14
P14
R14
T14
U14
V14
L15
M15
N15
P15
R15
T15
U15
V15
A16
G16
L16
M16
N16
C276
C320
P16
R16
T16
U16
V16
AA16
D17
L17
M17
N17
P17
R17
T17
U17
V17
AA17
AC19
G18
L18
M18
N18
P18
R18
T18
U18
V18
D20
G20
H20
A21
E21
F21
G21
E22
F22
G22
H22
J22
K22
L22
M22
N22
P22
R22
T22
U22
V22
W22
Y22
AA22
W23
AB23
F28
M28
T28
AC28
16V
C278
4.7uF
C319
0.1uF
16V
C280
4.7uF
LGE3556C (C0 VERSION)
AG28
DS_AGCI_CTL
AH28
DS_AGCT_CTL
AA21
EDSAFE_AVSS_1
A1.2V
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
AB22
EDSAFE_AVSS_2
AF26
EDSAFE_AVSS_3
AF27
EDSAFE_AVSS_4
AF28
EDSAFE_AVSS_5
AG27
EDSAFE_AVDD2P5
AE26
EDSAFE_DVDD1P2
AE28
EDSAFE_IF_N
AE27
EDSAFE_IF_P
AD24
PLL_DS_AGND
AB19
PLL_DS_AVDD1P2
AB25
PLL_DS_TESTOUT
AB18
SD_V5_AVDD1P2
AC17
SD_V5_AVDD2P5
AB17
SD_V5_AVSS
AD14
SD_V1_AVDD1P2
AD16
SD_V1_AVDD2P5
AB15
SD_V1_AVSS_1
AC15
SD_V1_AVSS_2
AD13
SD_V2_AVDD1P2
AE13
SD_V2_AVDD2P5
AC13
SD_V2_AVSS_1
AB14
SD_V2_AVSS_2
AC14
SD_V2_AVSS_3
AC12
SD_V3_AVDD1P2
AD12
SD_V3_AVDD2P5
AB13
SD_V3_AVSS_1
AA14
SD_V3_AVSS_2
AC11
SD_V4_AVDD1P2
AD11
SD_V4_AVDD2P5
AB12
SD_V4_AVSS
AD10
SD_R
AC10
SD_INCM_R
AE9
SD_G
AF9
SD_INCM_G
AH9
SD_B
AG9
SD_INCM_B
AG15
SD_Y1
AE15
SD_PR1
AF15
SD_PB1
AH15
SD_INCM_COMP1
AG16
SD_Y2
AF16
SD_PR2
AH17
SD_PB2
AH16
SD_INCM_COMP2
AG14
SD_Y3
AE14
SD_PR3
AF14
SD_PB3
AH14
SD_INCM_COMP3
AH10
SD_L1
AG10
SD_C1
AE10
SD_INCM_LC1
AE11
SD_L2
AF11
SD_C2
AH11
SD_INCM_LC2
AH13
SD_L3
AE12
SD_C3
AF12
SD_INCM_LC3
AD9
SD_CVBS1
AG11
SD_CVBS2
AG12
SD_CVBS3
AF13
SD_CVBS4
AC9
SD_INCM_CVBS1
AF10
SD_INCM_CVBS2
AH12
SD_INCM_CVBS3
AG13
SD_INCM_CVBS4
AF17
SD_SIF1
AG17
SD_INCM_SIF1
AD15
SD_FB
AE16
SD_FS
AE17
SD_FS2
AB16
PLL_VAFE_AVDD1P2
AA15
PLL_VAFE_AVSS
AC16
PLL_VAFE_TESTOUT
AG3
RGB_HSYNC
AF4
RGB_VSYNC
A2.5V
BLM18PG121SN1D
L102
C113
0.1uF
BLM18PG121SN1D
L104
BLM18PG121SN1D
L105
C117
1000pF
NON_EU
R2112-*1
12 5%
EU
L106
BLM18PG121SN1D
C121
0.1uF
RGB_HSYNC
RGB_VSYNC
C172
4.7uF
C119
0.1uF
C120
1000pF
NON_EU
R141-*1
5%
62
C118
0.01uF
C110
C124
C125
C100
C140
4.7uF
C144
0.1uF
C122
4.7uF
C123
0.01uF
C127
C128
C129
C130
C131
C132
C133
C134
C135
C174
C175
C176
SC1_ID
A1.2V
L103
BLM18PG121SN1D
A1.2V
C111
0.1uF
47pF
C169 47pF
C101
NON_EU
ONLY USE NON_EU
FOR COMP 1
82 1%
75
82
OPT
1%
R166
R165
C177
R2113
18 1%
R2114
12
R2115
0
12
A2.5V
A2.5V
R4020
R137
10K
10K
R139
12K
R4021
12K
R2117
0
OPT
47pF
C170
75
1%
R167
R100
R142
R143
R141 1%
0
R2116
C112
0.1uF
1%
62
OPT
62
75
A2.5V
A1.2V
IC100
I2S_CLK_IN
I2S_CLK_OUT
I2S_DATA_IN
I2S_DATA_OUT
I2S_LR_IN
I2S_LR_OUT
AUD_LEFT0_N
AUD_LEFT0_P
AUD_AVDD2P5_0
AUD_AVSS_0_1
AUD_AVSS_0_2
AUD_AVSS_0_3
AUD_AVSS_0_4
AUD_AVSS_0_5
AUD_RIGHT0_N
AUD_RIGHT0_P
AUD_LEFT1_N
AUD_LEFT1_P
AUD_RIGHT1_N
AUD_RIGHT1_P
AUD_AVDD2P5_1
AUD_AVSS_1_1
AUD_AVSS_1_2
AUD_AVSS_1_3
AUD_LEFT2_N
AUD_LEFT2_P
AUD_RIGHT2_N
AUD_RIGHT2_P
AUD_AVDD2P5_2
AUD_AVSS_2_1
AUD_AVSS_2_2
AUD_SPDIF
SPDIF_AVDD2P5
SPDIF_AVSS
SPDIF_IN_N
SPDIF_IN_P
HDMI_RX_0_CEC_DAT
HDMI_RX_0_HTPLG_IN
HDMI_RX_0_HTPLG_OUT
HDMI_RX_0_DDC_SCL
HDMI_RX_0_DDC_SDA
HDMI_RX_0_RESREF
HDMI_RX_0_CLK_N
HDMI_RX_0_CLK_P
HDMI_RX_0_DATA0_N
HDMI_RX_0_DATA0_P
HDMI_RX_0_DATA1_N
HDMI_RX_0_DATA1_P
HDMI_RX_0_DATA2_N
HDMI_RX_0_DATA2_P
HDMI_RX_0_VDD3P3
HDMI_RX_0_VDD1P2
HDMI_RX_0_VDD2P5
HDMI_RX_0_AVSS_1
HDMI_RX_0_AVSS_2
HDMI_RX_0_AVSS_3
HDMI_RX_0_AVSS_4
HDMI_RX_0_AVSS_5
HDMI_RX_0_AVSS_6
HDMI_RX_0_PLL_AVSS
HDMI_RX_0_PLL_DVDD1P2
HDMI_RX_0_PLL_DVSS
HDMI_RX_1_CEC_DAT
HDMI_RX_1_HTPLG_IN
HDMI_RX_1_HTPLG_OUT
HDMI_RX_1_DDC_SCL
HDMI_RX_1_DDC_SDA
HDMI_RX_1_RESREF
HDMI_RX_1_CLK_N
HDMI_RX_1_CLK_P
HDMI_RX_1_DATA0_N
HDMI_RX_1_DATA0_P
HDMI_RX_1_DATA1_N
HDMI_RX_1_DATA1_P
HDMI_RX_1_DATA2_N
HDMI_RX_1_DATA2_P
HDMI_RX_1_VDD3P3
HDMI_RX_1_VDD1P2
HDMI_RX_1_VDD2P5
HDMI_RX_1_AVSS_1
HDMI_RX_1_AVSS_2
HDMI_RX_1_AVSS_3
HDMI_RX_1_AVSS_4
HDMI_RX_1_AVSS_5
HDMI_RX_1_AVSS_6
HDMI_RX_1_AVSS_7
HDMI_RX_1_AVSS_8
HDMI_RX_1_AVSS_9
HDMI_RX_1_PLL_AVSS
HDMI_RX_1_PLL_DVDD1P2
HDMI_RX_1_PLL_DVSS
AE18
AF18
AD17
AH19
AD18
AG18
AG26
AH26
AF23
AA20
AB21
AC22
AC23
AD23
AH25
AG25
AH23
AG23
AG24
AH24
AE22
AB20
AC21
AE23
AF21
AE21
AF22
AG22
AD21
AC20
AD22
AH2
AC6
AE4
AF3
AH1
AG1
AA6
AA5
AB3
Y6
AC4
AC1
AC2
AD1
AD2
AE1
AE2
AF1
AF2
AD3
AE3
AC3
AD4
AB5
AB6
AG2
AB4
AA7
Y8
AC5
W8
AA3
V4
U6
V5
V3
W4
W2
W3
Y1
Y2
AA2
AA1
AB2
AB1
Y3
Y4
W5
W1
U5
W6
U7
V7
W7
U8
V8
Y5
V6
AA4
Y7
BT_LOUT_N
BT_LOUT_P
BT_ROUT_N
BT_ROUT_P
R2036
1K
R309
OPT
C150
0.1uF
10K
R152 499
R2037
R153 499
C145
4.7uF
10K
OPT
C158
1000pF
R310 10K
R2035
0
R2038 10K
SPDIF_OUT
+5V_NORMAL
R307 0
R308 0
C153
0.1uF
C151
0.01uF
10K
R2039
C146
4.7uF
C159
1000pF
C147
0.01uF
HP_ROUT_N
HP_ROUT_P
C148
0.01uF
SCART1_Lout_N
SCART1_Lout_P
SCART1_Rout_N
SCART1_Rout_P
C149
0.01uF
HDMI_CLKHDMI_CLK+
HDMI_RX0HDMI_RX0+
HDMI_RX1-
HDMI_RX1+
HDMI_RX2HDMI_RX2+
C160
0.1uF
C165
10uF
D3.3V
C154
0.1uF
C152
0.01uF
AUD_SCK
AUD_LRCH
AUD_LRCK
HP_LOUT_N
HP_LOUT_P
C155
0.1uF
C156
0.1uF
C157
0.1uF
BLM18PG121SN1D
L107
C161
0.1uF
BLM18PG121SN1D
L108
C166
10uF
C162
10uF
C163
10uF
C164
10uF
HDMI_SCL
HDMI_SDA
A3.3V
BLM18PG121SN1D
L109
A1.2V
A3.3V
BLM18PG121SN1D
L110
A1.2V
FOR ESD
C384
33uF
10V
A2.5V
A2.5V
C3006
0.1uF
16V
A2.5V
A2.5V
C248
1000pF
C216
0.1uF
C281
1000pF
R205
C2003
0.1uF
C268
1000pF
A3.3V
20
C370
C371
0.1uF
0.01uF
C284
C283
C282
1000pF
D1.2V
1000pF
0.01uF
LGE3556C (C0 VERSION)
H8
VDDC_1
J8
VDDC_2
K8
VDDC_3
L8
VDDC_4
M8
VDDC_5
N8
VDDC_6
P8
VDDC_7
R8
VDDC_8
AA8
VDDC_9
H9
VDDC_10
H10
VDDC_11
H11
VDDC_12
H12
VDDC_13
H13
VDDC_14
H14
VDDC_15
H15
VDDC_16
H16
VDDC_17
H17
VDDC_18
H18
VDDC_19
H19
VDDC_20
H21
VDDC_21
J21
VDDC_22
K21
VDDC_23
L21
VDDC_24
M21
VDDC_25
N21
VDDC_26
P21
VDDC_27
R21
VDDC_28
T21
VDDC_29
U21
VDDC_30
V21
VDDC_31
W21
VDDC_32
Y21
VDDC_33
AH27
AA12
AA13
AA18
AA19
AB28
E28
L28
U28
G11
G13
A14
G15
G17
A19
G19
A9
G9
AGC_VDDO
VDDO_1
VDDO_2
VDDO_3
VDDO_4
VDDO_5
VDDO_6
VDDO_7
VDDO_8
DDRV_1
DDRV_2
DDRV_3
DDRV_4
DDRV_5
DDRV_6
DDRV_7
DDRV_8
DDRV_9
D3.3V
D1.8V
C369
4.7uF
IC100
C292
1000pF
C285
0.01uF
C318
0.1uF
D1.8V
C297
C2004
4.7uF
33uF
D1.8V
C304
0.1uF
16V
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EUROBBTV
BCM3556 VIDEO IN
2009.06.18
3
LGE3556C (C0 VERSION)
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
IC100
DDR_PLL_TEST
DDR_VDDP1P8_1
DDR_VDDP1P8_2
DDR_BVDD0
DDR_BVDD1
DDR_BVSS0
DDR_BVSS1
DDR_PLL_LDO
DDR01_CKE
DDR_COMP
DDR01_ODT
DDR_EXT_CLK
DDR0_CLK
DDR0_CLKB
DDR1_CLK
DDR1_CLKB
DDR01_A00
DDR01_A01
DDR01_A02
DDR01_A03
DDR0_A04
DDR0_A05
DDR0_A06
DDR01_A07
DDR01_A08
DDR01_A09
DDR01_A10
DDR01_A11
DDR01_A12
DDR01_A13
DDR1_A04
DDR1_A05
DDR1_A06
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_CASB
DDR0_DQ00
DDR0_DQ01
DDR0_DQ02
DDR0_DQ03
DDR0_DQ04
DDR0_DQ05
DDR0_DQ06
DDR0_DQ07
DDR0_DQ08
DDR0_DQ09
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR1_DQ00
DDR1_DQ01
DDR1_DQ02
DDR1_DQ03
DDR1_DQ04
DDR1_DQ05
DDR1_DQ06
DDR1_DQ07
DDR1_DQ08
DDR1_DQ09
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15
DDR0_DM0
DDR0_DM1
DDR1_DM0
DDR1_DM1
DDR0_DQS0
DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B
DDR1_DQS0
DDR1_DQS0B
DDR1_DQS1
DDR1_DQS1B
DDR01_RASB
DDR_VREF0
DDR_VREF1
DDR01_WEB
* DDR_VTT
C425
C426
22uF
10V
22uF
10V
C417
10uF
10V
DDR1_VREF0
DDR0_VREF0
C412
C411
0.1uF
0.1uF
16V
16V
DDR_VTT
R414 0
R415 0
A6
A24
B7
B24
F20
B23
B17
C22
E16
C23
B12
C12
A13
A12
B15
E14
A15
D15
E13
E12
F13
C14
F14
B14
D14
C13
D13
B13
F15
C15
D16
F16
B16
E15
A17
A8
B11
B8
D11
E11
C8
C11
C9
D8
E10
E9
F11
F12
E8
D10
F8
C18
C20
A18
B21
C21
B18
B20
D18
E18
D21
F18
E20
A22
F17
B22
E17
A10
C10
A20
F19
B10
B9
F10
F9
B19
C19
E19
D19
C16
A7
A23
C17
C7
D22
C406
0.1uF
C423
10uF
10V
C419
10uF
10V
A1.2V
R411 0
OPT
D1.8V
R412 240
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]
C415
0.1uF
C413
0.1uF
16V
C414
D1.8V
D1.8V
C403 0.1uF
C404 0.1uF
DDR01_CKE
1%
C402
C405
1uF
470pF
R418
0.1uF 16V
C408
C407
1uF
470pF
BD35331F-E2
10K
GND
1
EN
2
VTTS
3
VREF
4
DDR01_ODT
DDR0_CLK
DDR0_CLKb
DDR1_CLK
DDR1_CLKb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_CASb
DDR0_DM0
DDR0_DM1
DDR1_DM0
DDR1_DM1
DDR0_DQS0
DDR0_DQS0b
DDR0_DQS1
DDR0_DQS1b
DDR1_DQS0
DDR1_DQS0b
DDR1_DQS1
DDR1_DQS1b
DDR01_RASb
DDR01_WEb
IC404
004:C7;004:C4
004:C7;004:C4
004:F7;004:F4
004:F7;004:F4
004:E6
004:E3
004:H6
004:H3
004:E6
004:E6
004:E3
004:E3
004:H6
004:H6
004:H3
004:H3
VTT
8
VTT_IN
7
VCC
6
VDDQ
5
C422
1uF
10V
DDR01_A[0-3]
DDR0_A[4-6]
DDR01_A[7-13]
DDR1_A[4-6]
DDR0_DQ[8-15]
DDR1_DQ[8-15]
C400
C401
1uF
470pF
D3.3V
R417
220
DDR0_DQ[0-7]
DDR1_DQ[0-7]
C410
C409
1uF
470pF
C416
10uF
10V
004:A7;004:C4
004:A7;004:C4
004:A7;004:C7
004:A7;004:C7
004:A7;004:C7;004:F7;004:F4
DDR0_VREF0
DDR1_VREF0
D1.8V
C418
C420
1uF
0.1uF
10V
16V
DDR0_CLK
DDR0_CLKb
DDR01_CKE
DDR01_RASb
DDR01_CASb
DDR01_WEb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR0_A[4-6]
DDR01_ODT
DDR0_CLK
DDR0_CLKb
DDR01_CKE
DDR01_RASb
DDR01_CASb
DDR01_WEb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR0_A[4-6]
DDR01_ODT
R406
NT5TU128M8DE_BD
100
1%
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
E8
F8
F2
F7
G7
F3
G8
G2
G3
G1
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
F9
CK
CK
CKE
RAS
CAS
WE
CS
BA0
BA1
NC_1/BA2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
NC_2/A14
NC_3/A15
ODT
NT5TU128M8DE_BD
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
NC_1/BA2
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
F9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
NC_2/A14
NC_3/A15
ODT
C440
470pF
IC400
IC401
C441
0.047uF
C442
0.1uF
DM/RDQS
NU/RDQS
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
DM/RDQS
NU/RDQS
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VSS_1
VSS_2
VSS_3
VSS_4
VREF
VDDL
VSSDL
VDD_1
VDD_2
VDD_3
VDD_4
VSS_1
VSS_2
VSS_3
VSS_4
VREF
VDDL
VSSDL
C445
C446
C444
C443
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS
DQS
10uF
C8
C2
D7
D3
D1
D9
B1
B9
B7
A8
B3
A2
A9
C1
C3
C7
C9
A1
L1
E9
H9
A7
B2
B8
D2
D8
A3
E3
J1
K9
E2
E1
E7
470pF
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
0.047uF
0.1uF
D1.8V
DDR0_VREF0
C449
0.1uF
Close to IC
C8
DDR0_DQ[9]
DQ0
C2
DDR0_DQ[8]
DQ1
D7
DDR0_DQ[12]
DQ2
D3
DDR0_DQ[13]
DQ3
D1
DDR0_DQ[15]
DQ4
D9
DDR0_DQ[11]
DQ5
B1
DDR0_DQ[10]
DQ6
B9
DDR0_DQ[14]
DQ7
B7
DQS
A8
DQS
B3
A2
A9
C1
C3
C7
C9
A1
L1
E9
H9
A7
B2
B8
D2
D8
A3
E3
J1
K9
E2
E1
E7
D1.8V
DDR0_VREF0
C450
0.1uF
Close to IC
C447
10uF
DDR0_DQS0
DDR0_DQS0b
DDR0_DM0
C452
470pF
DDR0_DQS1
DDR0_DQS1b
DDR0_DM1
C453
470pF
C451
C448
10uF
22uF
DDR0_DQ[0-7]
004:B6;004:F3;004:I7
DDR0_DQ[8-15]
C456
C457
C455
C454
10uF
0.1uF
004:A7;004:F4
004:A7;004:F4
004:A4
004:A4
004:A4
004:A7;004:C5;004:C2;004:F2;004:I4;004:I6
004:A4
004:A4
004:A4
004:B6;004:F6;004:I7
C458
10uF
470pF
0.047uF
004:B6
DDR1_CLK
DDR1_CLKb
DDR01_CKE
DDR01_RASb
DDR01_CASb
DDR01_WEb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR1_A[4-6]
DDR01_ODT
DDR1_CLK
DDR1_CLKb
DDR01_CKE
DDR01_RASb
DDR01_CASb
DDR01_WEb
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR1_A[4-6]
DDR01_ODT
C459
0.1uF
C460
R407
100
1%
0.047uF
C461
470pF
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[11]
DDR01_A[12]
DDR01_A[13]
IC402
NT5TU128M8DE_BD
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
NC_1/BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_2/A14
L7
NC_3/A15
F9
ODT
IC403
NT5TU128M8DE_BD
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
NC_1/BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_2/A14
L7
NC_3/A15
F9
ODT
DM/RDQS
NU/RDQS
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSS_1
VSS_2
VSS_3
VSS_4
VREF
VDDL
VSSDL
DM/RDQS
NU/RDQS
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSS_1
VSS_2
VSS_3
VSS_4
VREF
VDDL
VSSDL
C477
C471
C470
C472
C469
0.047uF
004:A4
004:A3
004:A4
C468
0.1uF
004:B5
10uF
470pF
DDR01_A[0-3,7-13]
DDR1_A[4-6]
DDR0_A[4-6]
C465
C462
470pF
DDR1_DQ[0-7]
C8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS
DQS
DDR1_DQ[0]
C2
DDR1_DQ[1]
D7
DDR1_DQ[5]
D3
DDR1_DQ[3]
D1
DDR1_DQ[4]
D9
DDR1_DQ[2]
B1
DDR1_DQ[6]
B9
DDR1_DQ[7]
B7
A8
B3
A2
A9
C1
C3
C7
C9
A1
L1
E9
H9
A7
B2
B8
D2
D8
A3
E3
J1
K9
E2
E1
E7
D1.8V
DDR1_VREF0
DDR1_DQS0
DDR1_DQS0b
DDR1_DM0
C463
470pF
C466
0.1uF
0.047uF
0.1uF
C473
10uF
C474
10uF
C475
22uF
DDR01_RASb
DDR01_CASb
DDR01_BA1
DDR01_BA0
DDR01_BA2
DDR01_WEb
DDR01_CKE
DDR01_ODT
DDR01_RASb
DDR01_BA1
Close to IC
DDR01_BA0
DDR01_BA2
DDR01_WEb
DDR01_CKE
DDR01_ODT
DDR1_DQ[8-15]
004:B5
C8
DDR1_DQ[9]
DQ0
C2
DDR1_DQ[8]
DQ1
D7
DDR1_DQ[12]
DQ2
D3
DDR1_DQ[13]
DQ3
D1
DDR1_DQ[15]
DQ4
D9
DDR1_DQ[14]
DQ5
B1
DDR1_DQ[10]
DQ6
B9
DDR1_DQ[11]
DQ7
B7
DQS
A8
DQS
B3
A2
A9
C1
C3
C7
C9
A1
L1
E9
H9
A7
B2
B8
D2
D8
A3
E3
J1
K9
E2
E1
E7
D1.8V
DDR1_VREF0
DDR1_DQS1
DDR1_DQS1b
DDR1_DM1
C464
470pF
C467
0.1uF
004:A3
004:A3
004:A4
C476
10uF
DDR01_A[2]
DDR01_A[0]
DDR1_A[6]
DDR01_A[12]
DDR01_A[9]
DDR01_A[7]
DDR1_A[5]
DDR1_A[4]
DDR01_A[11]
DDR01_A[8]
DDR01_A[13]
DDR01_A[3]
DDR01_A[1]
DDR01_A[10]
DDR01_A[2]
DDR01_A[0]
DDR0_A[6]
DDR01_A[3]
DDR01_A[1]
DDR01_A[10]
DDR01_A[12]
DDR01_A[9]
DDR01_A[7]
DDR0_A[5]
DDR0_A[4]
DDR01_A[11]
DDR01_A[8]
DDR01_A[13]
0.1uF
C478
0.047uF
75
AR400
R408 75
R409 75
75
AR401
AR402
75
AR403
75
AR404
R410 75
75
AR405
75
AR406
75
AR407
75
AR408
75
AR409
R404 75
470pF
C479
C481
C480
10uF
DDR_VTT
75
DDR_VTT
0.1uF
SI
C482
0.047uF
SI
C485
0.1uF
C486
0.1uF
C487
0.1uF
C488
0.1uF
C489
0.1uF
C490
0.1uF
C499
0.1uF
C421
0.1uF
PI
C491
0.1uF
C483
0.1uF
C484
0.1uF
C492
0.1uF
C493
0.1uF
C494
0.1uF
C496
0.1uF
C497
0.1uF
C498
0.1uF
C495
470pF
Close to IC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HONG YEON HYUK
BCM (EUROBBTV) 2009.06.18
DDR Memory
4
New Item Development
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EARPHONE BLOCK
HP_LOUT
OPT
C902
1000pF
HP_ROUT
50V
OPT
C903
1000pF
50V
MMBT3904-(F)
MMBT3904-(F)
OPT
Q900
Q901
C
B
E
C
OPT
B
E
B
B
E
OPT
MMBT3904-(F)
Q903
C
HP_DET
E
OPT
MMBT3904-(F)
Q902
C
+3.3V_NORMAL
R917
R912
1K
+3.5V_ST
R914
OPT
10K
10K
SIDE_HP_MUTE
JK901
KJA-PH-0-0177
5 GND
4L
3 DETECT
1R
COMPONENT
PPJ234-01
JK900
[GN]E-LUG
6A
[GN]O-SPRING
5A
[GN]CONTACT
4A
[BL]E-LUG-S
7B
[BL]O-SPRING
5B
[RD]E-LUG-S
7C
[RD]O-SPRING_1
5C
[WH]O-SPRING
5D
[RD]CONTACT
4E
[RD]O-SPRING_2
5E
[RD]E-LUG
6E
+3.3V_NORMAL
R902
10K
D900
5.6V
D903
5.1V
D910
5.1V
D904
5.5V
5.5V
D905
D901
5.6V
D902
5.6V
C931
100pF
50V
C932
27pF
50V
C933
27pF
50V
C934
27pF
50V
R907
470K
R961
470K
R903
1K
C935
C936
Rear CVBS
COMP2_DET
L904
270nH
C904
27pF
50V
L903
270nH
C906
27pF
50V
L902
270nH
C905
27pF
50V
25V
1uF
25V
1uF
R910
0
R909
0
C939
100pF
50V
C937
100pF
50V
COMP2_Y
COMP2_Pb
COMP2_Pr
COMP2_L_IN
COMP2_R_IN
REAR_AV
JK902
PPJ233-01
[RD]E-LUG
5C
[RD]O-SPRING
4C
[RD]CONTACT
3C
[WH]C-LUG
4B
[YL]CONTACT
3A
[YL]O-SPRING
4A
[YL]E-LUG
5A
REAR_AV
D907
5.6V
REAR_AV
D906
5.5V
D908
5.6V
REAR_AV
REAR_AV
R920
470K
REAR_AV
R957
0
D909
5.6V
REAR_AV
R921
470K
REAR_AV
REAR_AV
C909
47pF
50V
+3.3V_NORMAL
REAR_AV
C910
100pF
50V
C941
25V
1uF
REAR_AV
C940
25V
1uF
REAR_AV
REAR_AV
R925
10K
REAR_AV
R926
1K
R928
0
REAR_AV
REAR_AV
R927
0
C916
100pF
50V
REAR_AV
REAR_AV
C915
100pF
50V
REAR_AV_CVBS
AV_CVBS_DET
REAR_AV_R_IN
REAR_AV_L_IN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
ETC SUB BOARD I/F
2009.06.18 EUROBBTV
9
VERTICAL_NIM
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
TU2701-*1
TDFR-G155D
31
SHIELD
CN_VERTICAL_LGS8G85
31
SHIELD
31
SHIELD
31
SHIELD
RF_S/W_CNTL
1
BST_CNTL
2
+B1[5V]
3
NC[RF_AGC]
4
AS
5
SCL[A_DEMOD]
6
SDA[A_DEMOD]
7
NC(IF_TP)
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
2.5V
16
SCL[D_DEMOD]
17
SDA[D_DEMOD]
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
D5
28
D6
29
D7
30
TU2701-*2
TDFR-C155D
RF_S/W_CNTL
1
BST_CNTL
2
+B1[+5V]
3
NC[RF_AGC]
4
NC_1
5
SCLT
6
SDAT
7
NC_2
8
SIF
9
NC_3
10
VIDEO
11
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
RESET
15
NC_4
16
SCL
17
SDA
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
D5
28
D6
29
D7
30
CN_HORIZONTAL_LGS8G85
TU2701-*3
TDFR-C135D
RF_S/W_CNTL
1
BST_CNTL
2
+B1[+5V]
3
NC[RF_AGC]
4
NC_1
5
SCLT
6
SDAT
7
NC_2
8
SIF
9
NC_3
10
VIDEO
11
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
RESET
15
+B4[2.5V]
16
SCL
17
SDA
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
D5
28
D6
29
D7
30
EU_VERTICAL_NIM_T2
TU2701-*4
TDFR-G055D
RF_S/W_CNTL
1
BST_CNTL
2
+B1[5V]
3
NC[RF_AGC]
4
AS
5
SCL[A_DEMOD]
6
SDA[A_DEMOD]
7
NC(IF_TP)
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
2.5V
16
SCL[D_DEMOD]
17
SDA[D_DEMOD]
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
D5
28
D6
29
D7
30
CAN H-NIM/NIM TUNER for EU
31
SHIELD
EU_HORIZONTAL_NIM_T2
TU2701-*5
TDFR-G035D
RF_S/W_CNTL
1
BST_CNTL
2
+B1[5V]
3
NC[RF_AGC]
4
NC_1
5
SCLT
6
SDAT
7
NC(IF_TP)
8
SIF
9
NC_2
10
VIDEO
11
GND
12
+B2[1.2V]
13
+B3[3.3V]
14
RESET
15
+B4[2.5V]
16
SCL[D_DEMOD]
17
SDA[D_DEMOD]
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
D5
28
D6
29
D7
30
HORIZONTAL_NIM
31
SHIELD
TU2701
TDFR-G135D
close to TUNER
RF_S/W_CNTL
1
BST_CNTL
2
+B1[5V]
3
NC[RF_AGC]
4
AS
5
SCL[A_DEMOD]
6
SDA[A_DEMOD]
7
NC(IF_TP)
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
2.5V
16
SCL[D_DEMOD]
17
SDA[D_DEMOD]
18
ERR
19
SYNC
20
VALID
21
MCL
22
D0
23
D1
24
D2
25
D3
26
D4
27
D5
28
D6
29
D7
30
C2701
0.1uF
16V
R2700 0
C2702
0.1uF 16V
C2700
100pF
50V
C2733
0.1uF
16V
R2754 0
OPT
close to TUNER
+1.2V_TU
C2703
0.1uF
16V
R2701 0
CN
RF_SWITCH_CTL
+5V_TU
C2706
C2704
0.1uF
100pF
16V
50V
+3.3V_TU
C2705
100pF
50V
C2707
0.1uF
16V
R2757
CN
R2717
CN
R2716
CN
R2711
CN
CN
R2709
CN
R2708
R2707
CN
R2710
CN
R2705
CN
R2706
CN
R2704
CN
R2703
CN
Close to the tuner
R2720 0
+2.5V_TU
EU
0
EU
0
EU
0
EU
0
EU
0
EU
0
EU
0
EU
0
EU
0
EU
0
EU
0
EU
0
C2708
0.1uF
16V
OPT
R2757-*1
47
R2717-*1
47
R2716-*1
47
R2711-*1
47
R2709-*1
47
R2708-*1
47
R2707-*1
47
R2710-*1
47
R2705-*1
47
R2706-*1
47
R2704-*1
47
R2703-*1
47
Q2700
2SC3052
OPT
R2721
100
C2709
10uF
10V
OPT
C
B
E
+3.3V_TU
R2722 0
CN
OPTION : RF AGC
R2724
10K
OPT
R2723
100K
TUNER_RESET
C2710
0.1uF
16V
C2711
10pF
50V
FE_TS_ERR
FE_TS_SYNC
FE_TS_VAL
FE_TS_DATA_CLK
0
EU
R2725
IF_AGC_SEL
C2712
18pF
50V
R2728 33
R2729 33
C2713
10pF
50V
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
C2714
18pF
50V
33
R2726
33
R2727
FE_TS_SERIAL
SCL2_3.3V
SDA2_3.3V
FE_TS_DATA[0-7]
R2736 0
SCL0_3.3V
SDA0_3.3V
R2738
0
C2718
0.01uF
25V
+5V_TU
E
C
L2700
BLM18PG121SN1D
Q2701
ISA1530AC1
B
+5V_TU
R2739
200
B
+5V_TU
R2702
200
B
R2740
2.2K
Q2703
2SC3052
R2743
4.7K
R2741
200
E
Q2702
ISA1530AC1
C
R2712
200
E
Q2705
ISA1530AC1
C
+3.3V_NORMAL
C2722
0.1uF
16V
+5V_NORMAL
C2721
0.1uF
16V
R2742
10K
C
B
E
+5V_TU
R2746
L2702
CIC21J501NE
C2724
0.1uF
16V
L2701
BLM18PG121SN1D
C2725
0.1uF
16V
R2755
10K
LNA2_CTL/BOSTER_CTL
470
E
B
Q2704
C
TU_CVBS
ATV_OUT
+3.3V_TU
C2728
22uF
10V
+5V_TU
C2727
22uF
10V
C2729
22uF
10V
R2749
82
ISA1530AC1
C2734
0.1uF
TU_SIF
CIC21J501NE
60mA
16V
200mA
L2703
+3.3V_TU
C2715
22uF
10V
CN
R2713-*1
56K
1/8W
1%
FE_TS_VAL
FE_TS_ERR
EU
R2713
75K
1/8W
1%
R2
MP2212DN
FB
1
GND
2
IN
3
BS
4
+3.3V_TU
C2719
0.1uF
16V
IC2701
3A
R2718
10
1/10W
AZ2940D-2.5TRE1
VIN
C2716
100pF
50V
8
7
6
5
R2719 0
1%
IC2700
1
$0.11
2
IC2702
NL17SZ08DFT2G
1 5
2
3
CN
R2731-*1
0
1/16W
5%
EU
R2731
1%
22K
Close to IC
EN/SYNC
SW_2
SW_1
VCC
C2717
1uF
10V
VOUT
3
GND
+3.3V_TU
4
CN
R2756-*1
30K
1/10W
1%
EU
R2756
18K
1%
R1
10K
R2732
NR8040T3R6N
C2720
0.1uF
16V
Vout=0.8*(1+R1/R2)
+2.5V_TU
R2744
1
C2723
10uF
10V
POWER_ON/OFF2_2
L2704
3.6uH
C2726
0.1uF
16V
C2736
0.1uF
16V
R2758
47
C2730
22uF
10V
FE_TS_VAL_ERR
+1.2V_TU
C2731
0.1uF
C2735
22uF
10V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
27
USB2 OPTION
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.3V_USB
C2201
1uF
10V
+3.3V_NORMAL
C2202
0.1uF
L2201
BLM18PG121SN1D
USB_DM1
USB_DP1
USB_DM2
USB_DP2
C2203
0.1uF
C2204
0.1uF
+3.3V_USB
C2205
0.1uF
USBDN1_DM
USBDN1_DP
USBDN2_DM
USBDN2_DP
VDDA33_1
NC_1
NC_2
NC_3
NC_4
VSS
1
2
3
4
5
6
7
8
9
C2206
1uF
C2207
R2201
12K
RBIAS
VDD33PLL
35
36
THERMAL
37
10
11
TEST
VDDA33_2
10V
0.1uF
C2208
15pF
C2210
15pF
R2202
1%
1M
X2201
24MHz
1/10W 1%
XTAL2
XTAL1/CLKIN
VDD18PLL
32
33
34
IC2201
USB2512A_AEZG
12
13
14
VDD18
OCS1_N
PRTPWR1
SIDE_USB_DP
SIDE_USB_DM
VDDA33_3
USBUP_DM
USBUP_DP
29
30
31
15
17
OCS2_N
VDD33CR16PRTPWR2
R2203
100K
SUSP_IND/LOCAL_PWR/NON_REM0
28
VBUS_DET
27
RESET_N
26
HS_IND/CFG_SEL1
25
SCL/SMBCLK/CFG_SEL0
24
VDD33
23
SDA/SMBDATA/NON_REM1
22
NC_8
21
NC_7
20
NC_6
19
18
R2204
NC_5
100K
C2212
0.1uF
R2205
100K
R2209
100K
R2210
100K
R2206
+3.3V_USB
OPT
100K
R2211 100K
0
0
+3.3V_USB
C2215
0.1uF
OPT
R2212 100K
R2213 100K
R2207
OPT
R2208
OPT
R2214
0
OPT
OPT
OPT
+3.3V_USB
SCL2_3.3V
SDA2_3.3V
/RST_HUB
USB / DVR Ready
L2202
MLB-201209-0120P-N2
120-ohm
C2218
100uF
KJA-UB-4-0004
P2201
1 2 3 4
USB D OWN STRE AM
5
16V
D2201
CDS3C05HDMI1
5.6V
USB
L2203
MLB-201209-0120P-N2
120-ohm
C2219
100uF
KJA-UB-4-0004
P2202
1 2 3 4
USB D OWN STRE AM
16V
NC
OUT_2
OUT_1
FLG
R2225 0
D2203
CDS3C05HDMI1
5.6V
IC2203
AP2191SG-13
NC
8
OUT_2
7
OUT_1
6
FLG
5
EAN60921001
R2227 0
IC2202
AP2191SG-13
8
7
6
5
EAN60921001
GND
1
IN_1
2
IN_2
3
EN
4
GND
1
IN_1
2
IN_2
3
EN
4
+3.3V_NORMAL
R2220
4.7K
OPT
USB_CTL1
+3.3V_NORMAL
R2221
4.7K
OPT
USB_CTL2
USB_DM2
USB_DM1
USB_DP1
R2223
2.7K
R2226
2.7K
/USB_OCD1
C2221
10uF
10V
040:J6
C2220
10uF
10V
+5V_USB
/USB_OCD2
+5V_USB
C2223
0.1uF
C2222
0.1uF
C2213
0.1uF
C2209
USB_CTL1
/USB_OCD1
C2211
0.1uF
1uF
10V
USB_CTL2
/USB_OCD2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
USB
C2214
4.7uF
USB_DP2
D2202
5
CDS3C05HDMI1
5.6V
D2204
CDS3C05HDMI1
5.6V
40
[SCART2 PIN 8]
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EU_SCART [OPT]
SC_RE1
SC_RE2
11
PPJ-230-01
JK4101
CN
FIX-TER
10
9
8
7
6
5
4
13
R4152
4.7K
EU
EU
R4154
1K
EU
R4155
1K
[GN]GND
[GN]G
[GN]C_DET
[BL]B
[RD]R
[WH]L_IN
[RD]R_IN
[RD]MONO
R4156
10K
B
+5V_NORMAL
L4105
EU
EU
+12V
EU
C4134
C4119
0.1uF
16V
0.1uF
16V
EU
EU
EU
R4163
10K
NLASB3157DFT2G
SELECT
6
VCC
5
A
4
Selece = High ==> A = B1
Selece = Low ==> A = B0
IC4101
EU
DTV_ATV_SELECT
B1
1
GND
2
B0
3
75
R4178
ATV_OUT
DTV/MNT_V_OUT
1%
Audio Out Amp
EU_SCART [OPT]
R4139
68K
C4121
33pF
EU
R4146
EU
DTV/MNT_L_OUT
OPT
C4120
0.1uF
16V
OPT
R4140
68K
OPT
R4141
68K
C4122
33pF
OPT
R4142
68K
OPT
SCART1_Lout_N
SCART1_Lout_P
SCART1_Rout_P
SCART1_Rout_N
DTV/MNT_R_OUT
Q4106
2SC3052
Q4107
2SC3052
EU
+12V
EU
OPT
C4123
10uF
16V
5.6K
EU
EU
C4124
10uF
16V
1/16W
1/16W
EU
EU
EU
R4151
2K
EU
R4153
2K
R4144 5.6K
1K
6800pF
EU
5.6K
5.6K
EU
R4143
R4145
1K
EU
C4126
50V
EU
R4148
R4147
EU
C4125
6800pF
50V
EU
R4149
33K
C4127
33pF
EU
EU
R4150
33K
C4128 33pF
EU
RT1P141C-T112
Q4109
EU
3
1
2
R4176
10K
R4177
10K
EU
EU
EU
C4130
0.1uF
IC4100
LM324D
1
1
2
2
3
3
4
4
5
5
6
6
7
7
14
14
13
13
12
12
11
11
10
10
9
9
8
8
SCART1_MUTE
+3.3V_NORMAL
D4107
5.6V
OPT
D4101
30V
D4100
5.6V
OPT
OPT
D4102
5.6V
OPT
D4103
30V
OPT
D4104
30V
OPT
D4106
30V
OPT
L4100
BLM18PG121SN1D
EU
D4105
5.6V
OPT
L4101
BLM18PG121SN1D
EU
D4108
5.6V
OPT
D4109
5.6V
OPT
EU
EU
0
CN
R6166
+12V
R4157
EU
C
EU
Q4108
2SC3052
E
R4160
0
EU
0
EU
B
R4159
EU
12K
C
EU
Q4110
B
2SC3052
E
22
21
20
19
18
17
16
15
14
13
12
11
10
PSC008-01
JK4100
EU
C
EU
Q4111
2SC3052
E
AV_DET
COM_GND
SYNC_IN
SYNC_OUT
SYNC_GND2
SYNC_GND1
RGB_IO
R_OUT
RGB_GND
R_GND
D2B_OUT
G_OUT
D2B_IN
G_GND
9
ID
8
B_OUT
7
AUDIO_L_IN
6
B_GND
5
AUDIO_GND
4
AUDIO_L_OUT
3
AUDIO_R_IN
2
AUDIO_R_OUT
1
REC_8
R4168
0
EU
EU
R4164
12
R4104
75
1%
R4108
R4101
0
75
1%
D4110
R4102
30V
75
1%
OPT
R4103
470K
R4100
470K
R4105
0
EU
1/16W
5%
C4100
1000pF
50V
EU
R4107
0
1/16W
5%
C4101
1000pF
50V
For Frequency Response
C4105
25V
1uF
C4104
25V
1uF
EU
EU
C4107
4700pF
50V
C4108
4700pF
50V
EU
EU
R4115
62
EU
R4112
75
R4111
EU
75
1%
R4116
0
C4112
100pF
50V
R4113
0
C4111
100pF
50V
SC1_R
SC1_G
SC1_B
C4113
47pF
50V
EU
R4123
0
EU
C4114
100uF
16V
EU
R4122
22
OPT
D4111
30V
SC1_L_IN
SC1_R_IN
DTV/MNT_L_OUT
DTV/MNT_R_OUT
C4115
220pF
50V
OPT
002:C6
041:F4;041:G2
041:F3;041:G2
C4116
0.1uF
16V
R4126
10K
R4128
R4129
EU
0
R4127
15K
D4112
EU
R4130
3.9K
SCART1_DET
EU
E
ISA1530AC1
REC_8
Q4104
R4131
OPT
0
B
C
EU
R4133
390
EU
R4132
390
Rf
Gain=1+Rf/Rg
SC1_CVBS_IN
SC1_FB
EU
30V
SC1_ID
EU
R4135
470
EU
EU
Q4105
R4136
2SC3052
R4134
180
47K
EU
R4137
15K
DTV/MNT_L_OUT
DTV/MNT_R_OUT
C4117
47uF
16V
B
EU
C
E
Rg
C4118
0.1uF
16V
EU
R4138
0
+12V
1K
EU
EARPHONE BLOCK
EARPHONE AMP
HP_LOUT_N
HP_LOUT_P
HP_ROUT_N
HP_ROUT_P
4.7K
R300
OPT
R4169
C4135
1uF
10V
C4136
1uF
10V
C4137
1uF
10V
C4138
1uF
10V
OPT
R4171
R4170
4.7K
INL-
INL+
INR+
INR-
+3.3V_NORMAL
L4102
10uH
C4142
C4140
0.1uF
10uF
16V
10V
C4139
Close to the IC
1uF
10V
VDD
SGND
OUTL
16
1
2
3
4
EAN60724701
5
OUTR
15
IC4102
TPA6132A2
6G07G18
13EN14
HPVSS
12
11
10
C4141
2.2uF
10V
C4143
2.2uF
10V
HPVDD
CPP
C4144
2.2uF
PGND
10V
CPN
9
R4172
100K
OPT
R4119
0
1/16W
R4173
0
1/16W
Q4117
2SC3052
L4104
BG2012B080TF
C4146
0.22uF
16V
+3.3V_NORMAL
R4109
4.7K
C
E
L4103
BG2012B080TF
C4145
0.22uF
16V
HP_LOUT
OPT
R4174
0
R4175
1K
B
SIDE_HP_MUTE
HP_ROUT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
ETC SUB BOARD I/F
2009.06.18 EUROBBTV
41
BLUETOOTH FOR BCM
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
11
10
9
8
7
6
5
4
3
2
1
D1899
CDS3C05HDMI1
5.6V
BCM BT MODULE
R1898
0
BCM BT MODULE
R1899
0
BCM BT MODULE
BT_ON/OFF
BCM BT MODULE
C1899
22uF
10V
D1898
CDS3C05HDMI1
5.6V
BCM BT MODULE
R1889
10
BCM BT MODULE
BCM BT MODULE
R1896
27
BCM BT MODULE
R1897
27
BCM BT MODULE
BT_RESET
VREG_CTRL
BLUETOOTH
G
S
D
Q1801
RTR030P02
BCM BT MODULE
R1887
BCM BT MODULE
R1888
4.7K
BCM BT MODULE
47K
C
B
2SC3052
Q1800
E
BCM BT MODULE
BT_DM
BT_DP
+3.3V_NORMAL
C1108
1uF
R1886
47K
BCM BT MODULE
OPT
L1899
500
12507WR-10L
P1895
BCM BT MODULE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
43
016:G13;016:AJ2
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
016:T13;016:AJ2
016:H12
016:T12
016:G13
016:T13
CI CONTROL BUFFER
/CI_CE1
/CI_CE2
/CI_WE
/CI_IOWR
/CI_OE
/CI_IORD
C4500
D3.3V
0.1uF
CI POWER ENABLE CONTROL
+5V_NORMAL
0.1uF
C4506
16V
R4512
AR4515
10K
D3.3V
IC4500
MC74LCX541DTR2G
VCC
1
20
16V
OE2
19
2
O0
18
3
O1
17
4
O2
16
5
O3
15
6
O4
14
7
O5
8
13
O6
9
12
O7
10
11
OE1
D0
D1
D2
D3
D4
D5
D6
D7
GND
10K
R4503
EBI_CS
007:E7;007:E6;016:AL23
NAND_WEb
EBI_WE
NAND_REb
NAND_ALE
007:E6
007:C3;007:E6
/CI_SEL
007:H5
007:C2;007:E5
007:C2;007:E6
AR4517
10K
AR4501
10K
AR4504
10K
CI_A[0]
CI_A[1]
CI_A[2]
CI_A[3]
CI_A[4]
CI_A[5]
CI_A[6]
CI_A[7]
CI_A[8]
CI_A[9]
CI_A[10]
CI_A[11]
CI_A[12]
CI_A[13]
CI_A[0-13]
007:E7;016:C13
CI_5V_CTL
007:E6
016:F16
[GP27] 007:H7
EBI_RW
CI_D[0-7]
10K
OPT
R4513
10K
B
R4514
CI_D[0]
CI_D[1]
CI_D[2]
CI_D[3]
CI_D[4]
CI_D[5]
CI_D[6]
CI_D[7]
22K
C
E
R4526
2.2K
Q4500
2SC3052
C4509
4.7uF
16V
DIR
A0
A1
A2
A3
A4
A5
A6
A7
GND
S
1
2
3
4
5
6
7
8
9
10
Q4501
RSR025P03
G
IC4501
74LVC245A
D
20
19
18
17
16
15
14
13
12
11
D3.3V
VCC
OE
B0
B1
B2
B3
B4
B5
B6
B7
0.1uF
C4507
NAND_DATA[0]
NAND_DATA[1]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[6]
NAND_DATA[7]
16V
C4508
47uF
16V
+5V_CI_Vs
C4510
0.1uF
16V
EBI_CS
007:E7;007:E6;016:K26
NAND_DATA[0-7]
CI_A[0-14]
016:AG22
CI_A[10]
CI_A[11]
CI_A[9]
CI_A[8]
CI_A[13]
CI_A[14]
CI_A[12]
CI_A[7]
CI_A[6]
CI_A[5]
CI_A[4]
CI_A[3]
CI_A[2]
CI_A[1]
CI_A[0]
CI_D[0-7]
33
AR4518
AR4509
33
33
AR4506
AR4513
33
/CI_CE1
/CI_OE
/CI_WE
/CI_IREQ
[GP39]
007:H5;016:AJ3
[GP41] 016:AJ3
CI_D[3]
CI_D[4]
CI_D[5]
CI_D[6]
CI_D[7]
CI_D[0]
CI_D[1]
CI_D[2]
AR4511
33
AR4507
33
/CI_IOIS16
C4501
R4501 47
R4502 47
R4500 47
0.1uF
+5V_CI_Vs
R4510
R4509
100
C4505
0.1uF
AR4502 33
AR4512 33
R4511 47
AR4514 33
AR4520 33
100
C4504
0.1uF
P4500
10067972-000LF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
0
100
17
18
19
20
21
22
23
24
25
26 60
27 61
28 62
29 63
30 64
31
32
33
34
R4505
C4502
16V
0.1uF
R4504
G1 G2
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
R4507 100
R4506
OPT
016:AL9
100
C4503
0.1uF
/CI_INPACK
R4508 0
65
66
67
68
69
/CI_CD1
CI_OUTDATA[4]
CI_OUTDATA[5]
CI_OUTDATA[6]
CI_OUTDATA[7]
007:G6;016:AJ2
CI_MOD_RESET
/CI_WAIT
CI_OUTVALID
CI_OUTSTART
CI_OUTDATA[0]
CI_OUTDATA[1]
CI_OUTDATA[2]
CI_OUTDATA[3]
[GP38]
007:H6;016:AJ3
/CI_CE2
/CI_VS1
/CI_IORD
/CI_IOWR
[GP49]
007:E6;016:AJ3
CI_OUTCLK
/CI_CD2
007:H5;016:AJ2
CI_OUTCLK,CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
016:H25;016:AJ2
016:AJ3
[GP26]
016:H24
016:H25
AR4516
AR4505 33
AR4519
33
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
33
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
FE_TS_DATA[0-7]
FE_TS_SYNC
FE_TS_VAL_ERR
DVB-CI PULL-DOWN (Near CI Slot)
/CI_INPACK
016:O9
External Demod.
DVB-CI PULL-UP (Near CI Slot)
+5V_NORMAL
10K
/CI_IOIS16
/CI_IREQ
/CI_VS1
/CI_WAIT
CI_OUTCLK
/CI_CD1
/CI_CD2
/CI_CE1
/CI_CE2
CI_MOD_RESET
R4515
R4517 10K
R4516 10K
10K
R4520
OPT
OPT
R4519 10K
R4521 10K
R45 18 2 2K
OPT
R4524 10K
R4523 10K
R4522 10K
R4525 10K
FE_TS_DATA_CLK
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EUROBBTV
CI
2009.06.18
45
[LEFT FFC Connector]
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
(60Pin Mini-LVDS)
P7400
104060-6017
MINI_LVDS
1 GND
2 GMA1
3 GMA3
4 GMA4
5 GMA6
6 GMA7
7 GMA9
8 GMA10
9 GMA12
10 GMA13
11 GMA15
12 GMA16
13 GMA18
14 GND
15 OPT_N
16 H_CONV
17 VST_IN
18 POL
19 SOE
20 GND
21 LV0+
22 LV023 LV1+
24 LV125 LV2+
26 LV227 LVCLK+
28 LVCLK29 LV3+
30 LV331 LV4+
32 LV433 LV5+
34 LV535 GND
36 VCC
37 VCC
38 GND
39 HALF_VDD
40 HALF_VDD
41 VDD
42 VDD
43 GND
44 VCOM_IN
45 VCOM_FB
46 GND
47 VST
48 VSS
49 VGH_EVEN
50 VGH_ODD
51 VGI_P
52 VGI_N
53 CLK6
54 CLK5
55 CLK4
56 CLK3
57 CLK2
58 CLK1
59 Z_OUT
60 GND
61
.
R7401
R7400
GMA1
GMA3
GMA4
GMA6
GMA7
GMA9
GMA10
GMA12
GMA13
GMA15
GMA16
GMA18
H_CONV
GSP/GVST_I
POL
SOE
RXD1RXD1+
RXD0RXD0+
RXC4RXC4+
RXC3RXC3+
RXC2RXC2+
RXC1RXC1+
RXC0RXC0+
GIP
0
GIP
0
VCC_LCM
C7400
0.1uF
16V
MINI_LVDS
VCOML
VCOMLFB
VST
VDD_EVEN
VDD_ODD
VGI_P
VGI_N
CLK6
CLK5
CLK4
CLK3
CLK2
CLK1
Z_OUT
R7402
3.3K
MINI_LVDS
HVDD
C7401
10uF
16V
MINI_LVDS
VGL_I
R7403
VCC_LCM
R7404
3.3K
NON_GIP
C7402
0.01uF
50V
MINI_LVDS
To reduce
Audible Noise
NON_GIP
0
VCC_LCM
Mini LVDS
[Right FFC Connector]
(60Pin Mini-LVDS)
VDD_LCM
2012
C7403
1uF
50V
MINI_LVDS
VGL
(-5V)
C7404
0.1uF
50V
MINI_LVDS
P7401
104060-6017
MINI_LVDS
61
.
1 GND
2 Z_OUT
3 CLK1
4 CLK2
5 CLK3
6 CLK4
7 CLK5
8 CLK6
9 VGI_N
10 VGI_P
11 VGH_ODD
12 VGH_EVEN
13 VSS
14 VST
15 GND
16 VCOM_FB
17 VCOM_IN
18 GND
19 VDD
20 VDD
21 HALF_VDD
22 HALF_VDD
23 GND
24 VCC
25 VCC
26 GND
27 RV0+
28 RV029 RV1+
30 RV131 RV2+
32 RV233 RVCLK+
34 RVCLK35 RV3+
36 RV337 RV4+
38 RV439 RV5+
40 RV541 GND
42 SOE
43 POL
44 VST_IN
45 H_CONV
46 OPT_N
47 GND
48 GMA18
49 GMA16
50 GMA15
51 GMA13
52 GMA12
53 GMA10
54 GMA9
55 GMA7
56 GMA6
57 GMA4
58 GMA3
59 GMA1
60 GND
NON_GIP
NON_GIP
R7406 0
R7405 0
R7409
NON_GIP
NON_GIP
R7407 0
R7408 0
NON_GIP
NON_GIP
R7411 0
R7410 0
GIP
0
VCOMRFB
VCOMR
RXA1RXA1+
RXA0RXA0+
RXB4RXB4+
RXB3RXB3+
RXB2RXB2+
RXB1RXB1+
RXB0RXB0+
SOE
POL
GSP/GVST_I
H_CONV
GMA18
GMA16
GMA15
GMA13
GMA12
GMA10
GMA9
GMA7
GMA6
GMA4
GMA3
GMA1
R7412 0
VCC_LCM
MINI_LVDS
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
VGI_N
VGI_P
VDD_ODD
VDD_EVEN
VST
C7405
0.1uF
16V
MINI_LVDS
R7413
3.3K
MINI_LVDS
Z_OUT
R7414
R7415
R7416
R7417
VGL_I
R7418
R7419
To reduce
Audible Noise
C7406
1uF
50V
MINI_LVDS
VCC_LCM
C7407
0.01uF
50V
MINI_LVDS
0
0
0
0
0
0
HVDD
NON_GIP
NON_GIP
NON_GIP
NON_GIP
NON_GIP
NON_GIP
VGH_M
(+25V)
VDD_LCM
MINI_LVDS
C7409
10uF
16V
MINI_LVDS
(-5V)
C7408
0.1uF
50V
VGL
GSC/GCLK3_I
GOE/GCLK1_I
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
COMMON
URSA3 120Hz MINI_LVDS
09/10/xx
74
LVDS
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
[51Pin LVDS Connector]
(For FHD 60/120Hz)
PANEL_VCC
L7700
500
R7700 0
NON_LGD_22
R7701 0
NON_LGD_22
NON_SCAN
R7702 0
FHD_120Hz
R7706 0
R7707 0
R7708 0
R7709 0
R7703 33
R7704 33
R7705 33
P7700
TF05-51S
FHD_120Hz
52
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
C7700
10uF
25V
OPT
LD60_SCAN
FHD_OPC
LD60_SCAN
FHD_OPC
240Hz
240Hz
240Hz
C7701
1000pF
50V
RXA4-
RXA4+
RXA3-
RXA3+
RXACK-
RXACK+
RXA2-
RXA2+
RXA1-
RXA1+
RXA0-
RXA0+
RXB4-
RXB4+
RXB3-
RXB3+
RXBCK-
RXBCK+
RXB2-
RXB2+
RXB1-
RXB1+
RXB0-
RXB0+
SCAN_BLK2
OPC_EN
SCAN_BLK1/OPC_OUT
PWM_DIM
FRC_RESET
SCL3_3.3V
SDA3_3.3V
C7702
0.1uF
50V
R7710
10K
8BIT
BIT_SEL
10BIT
8BIT GND
R7708-*1 0
FHD_OPC
+3.3V_NORMAL
HIGH
GND(NC)
R7711
3.3K
JEIDA
R7712
10K
VESA
LVDS_SEL
OPEN
JEIDA
VESA
[41Pin LVDS Connector]
(For FHD 120Hz)
P7701
TF05-41S
FHD_120Hz
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
RXD4-
RXD4+
RXD3-
RXD3+
RXDCK-
RXDCK+
RXD2-
RXD2+
RXD1-
RXD1+
RXD0-
RXD0+
RXC4-
RXC4+
RXC3-
RXC3+
RXCCK-
RXCCK+
RXC2-
RXC2+
RXC1-
RXC1+
RXC0-
RXC0+
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TP7700
OPC_OUT
35
RL_ON
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C8000
100uF
C8001
100uF
+3.5V_ST
16V
+12V
25V
PANEL_CTL
1:AK10
R8000
PIN No
FROM LIPS & POWER B/D
+3.5V_ST
10K
C8003
0.1uF
<OS MODULE PIN MAP>
C
Q8000
B
2SC3052
E
L8003
MLB-201209-0120P-N2
C8004
0.1uF
16V
L8002
MLB-201209-0120P-N2
50V
LGD
INV_ON
18
V4:VBR-A
20
V5:NC
PWM_DIM
22
Err_out
24
+12V
L8000
CIC21J501NE
OPT
R8002
10K
R8001
47K
+12V
500
L8001
C8002
10uF
25V
C8005
0.1uF
50V
CMO(09)
B
RT1P141C-T112
Q8002
R8004
4.7K
C8006
0.1uF
16V
400Hz_MD_MDSI
3
1
2
0
0
R8076
R8005
MO_MOSI
M2_MOSI
400Hz_MD_MDSI/42_47_LOCAL DIMMING
AUO
C
E
R8003
22K
NC
Q8001
2SC3052
INV_ON
Err_out
A-DIM
PWM_DIM
C8008
0.01uF
25V
A-DIM
PWM_DIM
INV_ON
+5V_USB
MP8706EN-C247-LF-Z
SW_1
SW_2
C8007
0.1uF
R8006
22
0
R8007
NON_SCAN_LIPS
R8008
22K
IN
1
2
3
BST
4
GND/P.DIM2
R8085
0
SCAN_LIPS
R80090SCAN
SCAN_BLK2
SHARP
INV_ON
Err_out
PWM_DIM
GND
C8009
0.1uF
50V
R8010
10K
R8011
1.8K
C
B
E
IC8000
3A
L8004
3.6uH
NR8040T3R6N
PWR ON
24V
GND
GND
3.5V
3.5V
GND
GND
12V
12V
12V
C8010
10uF
25V
Q8003
2SC3052
NORMAL_26~52
P8000
FW20020-24S
24V
1
2
2
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21 22
23
23 24
SLIM_32~52
SMAW200-H24S2
OPT
C8011
0.1uF
16V
OPT
C8012
1uF
25V
OPT
C8013
4.7uF
50V
GND
8
VCC
7
FB
6
EN/SYNC
5
10
10
12
12
14
14
16
16
18
18
20
20
22
24
25
P8001
R8084
0
SCAN_PSU
C8014
1uF
50V
4
4
6
6
8
8
24V
GND
GND
3.5V
3.5V
GND
GND/V-sync
INV ON
A.DIM
P.DIM1
Err OUT
Q8004
AO3407A
S
G
R8012
10K
POWER_ON/OFF2_1
R8013
10K
+5V_USB
MLB-201209-0120P-N2
R8015
LD650/LD750
0
SHARP
R8014
D
OPT
C8015
1uF
25V
OPT
C8016
100pF
50V
Vout=(1+R1/R2)*0.8
L8005
C8018
0.1uF
50V
R8082 0
400Hz_VSYNC
NON_CMO
R8019
100
0
R8018
100
CMO
R8021
AUO
0
R8020
NON_SCAN_PSU
0
PANEL_POWER
MAX 1500mA
1%
R8016
33K
R1
1%
R8017
6.2K
R2
R8023
6.8K
OPT
0
SCAN_PSU
R8022
0
C8017
0.1uF
OPT
R8024
AUO/SHARP
R8025
OPT
C8019
100pF
50V
+24V
400Hz_VSYNC/42_47_LOCAL DIMMING
C8024
68uF
35V
400Hz_MO_SCLK/42_47_LOCAL DIMMING
V_SYNC
R8077 0
R8028 0
400Hz_MO_SCLK
+3.3V_NORMAL
R8026
1K
C
R8032
10K
B
Q8005
2SC3052
E
R8029
CMO
0
R8030
AUO
0
R8031
0
LGD_IOP
A_DIM_LGD
R8027
R8083
0
PWM_NON_OPC
R8033
C8021
0
1uF
SCAN/FHD_OPC
25V
R8034
OPT
0
HD_OPC
R8035
+3.3V_NORMAL
0
0
0
LGD
PANEL_VCC
C8022
0.1uF
50V
+5V_USB
C8023
C8020
0.1uF
22uF
16V
10V
L_VS
R_VS
MO_SCLK
M2_SCLK
MO_MOSI
M2_MOSI
R8078
0
R_VS
400Hz_VSYNC
R8036
0
L_VS
M2_SCLK
MO_SCLK
INV_CTL
R8039
10K
OPT
A_DIM
PWM_DIM
SCAN_BLK1/OPC_OUT
OPC_OUT
OPT
R8037
4.7K
ERROR_OUT
C8069
0.1uF
C8025
0.1uF
16V
+12V
L8007
CIC21J501NE
C8028
C8030
10uF
10uF
25V
25V
Vout=0.8*(1+R1/R2)
BCM core 1.2V volt
AGND
1
SS
15
2
PGND_1
3
SW_1
4
IN_1
5
NC
6
BS
7
MP2208DL-LF-Z
C8032
0.1uF
THERMAL
IC8001
+3.5V_ST
L8006
C8027
0.1uF
C8026
0.1uF
MLB-201209-0120P-N2
C8029
22uF
16V
BCM DDR 1.8V
+3.5V_ST
L8008
CIC21J501NE
Placed on SMD-TOP
C8031
C IN
22uF
10V
+5V_NORMAL
IC8003
AOZ1072AI
PGND
1
VIN
2
C8068
0.1uF
AGND
16V
3
FB
4
ESD
D8000
5.6V
Vout=0.9*(1+R1/R2)
IC8002
MP2108DQ
25V
BST
1
VIN
2
3A
LX
3
PGND
4
SGND
5
14
13
12
11
10
9
8
C8033
1uF
10V
EP
FB
EN/SYNC
PGND_2
SW_2
IN_2
POK
VCC
R8040
100K
R8041
C8034
10
C8035
22uF
0.01uF
LX_2
2A
L8009
2uH
C8036
0.1uF
R8042
0
R8044
R8045
0
NON_ESD
R8043
470K
1%
8
LX_1
7
EN
6
COMP
5
10K
ESD
R8045-*1
100K
R8046
20K
1%
R1 R2
C8037
22uF
10V
OPT
R8047
NR8040T3R6N
POWER_ON/OFF2_2
R8050
10K
12K
R8049
POWER_ON/OFF2_1
3.9K
D1.2V
R8048
910K
1%
C8041
22uF
10V
Vout=0.8*(1+R1/R2)
Replaced Part
10K
C8038
0.01uF
25V
R8052
RUN
10
VREF
9
COMP
8
FB
7
SS
6
L8010
3.6uH
2200pF
C8040
L8011
BLM18PG121SN1D
C8043
22uF
10V
L8012
3.6uH
NR8040T3R6N
C8042
0.01uF
25V
C8039
3300pF
50V
R8051
6.8K
MAX 350mA
1%
R8053
47K
R1
1%
5.6K
R8054
OPT
C8046
100pF
50V
1%
R2
R8055
10K
A1.2V
C8045
0.1uF
16V
Max 1100 mA
POWER_ON/OFF1
OPT
50V
100pF
C8044
R2
R8056
10K
1/10W
1%
MAX 3.1A
R1
R8057
10K
1%
C8047
22uF
10V
C8048
22uF
10V
+5V_NORMAL
C8049
C8066
0.1uF
22uF
16V
10V
D1.8V
Placed on SMD-TOP
C8050
0.1uF
15V-->3.6V
20V-->3.5V
24V-->3.48V
12V-->3.58V
ST_3.5V-->3.5V
Power_DET
+3.5V_ST
OPT
R8080
14K 1%
+12V
L8013
CIC21J501NE
C8051
C8052
0.1uF
22uF
25V
50V
C8053
10uF
16V
R8058
20K
C8054
2200pF
50V
+3.3V_NORMAL
500
0.1uF
L8014
C8055
+12V
+3.5V_ST
12K
1%
PD_+12V
5.1K
1/16W
5%
POWER 20V
R8061
24K 1%
POWER 20V
R8062
5.1K 5%
R80671K1%
R8064-*1
27K
POWER 24V
R8061-*1
24K 1%
POWER 24V
R8062-*1
4.3K 1%
R8063
R8064
NON_PD_+3.5V
+24V
+3.3V_NORMAL
R8060
10K
OPT
3.9K
R8066
LX
7
COMP
VIN
3
AGND
2
1
PGND
EN
6
IC8005
FB
4
AOZ1024DI
5
A2.5V
IC8004
SC4215ISTRT
1
NC_1
R8059
10K
OPT
C8056
0.1uF
Vout=0.8*(1+R1/R2)
NC_2
2
EN
3
VIN
4
PD_+3.5V
1%
PD_+3.5V
R8068
100K
IC8007
NCP803SN293
VCC
3
GND
R8079
100K
IC8008
NCP803SN293
VCC
3
1
GND
POWER_ON/OFF2_2
L8015
3.6uH
R8069
R8070
R8071
8
GND
7
ADJ
6
VO
5
NC_3
2
1
RESET
2
MAX 2.3A
1%
27K
1%
4.7K
1%
10K
VOUT : 2.533V
RESET
C8057
22uF
10V
C8058
R8081
100
NON_PD_+3.5V
R8074
100
C8059
22uF
10V
R8073
18K
R2
1%
R8072
39K
R1
1%
10uF
16V
+3.5V_ST
R8075
10K
OPT
not to RESET at 8kV ESD
+3.3V_NORMAL
L8016
CIC21J501NE
C8063
C8067
0.1uF
10uF
16V
10V
A2.5V
C8061
10uF
16V
POWER_DET
ESD
C8065
0.1uF
16V
500
C8062
0.1uF
L8017
D3.3V
C8064
0.1uF
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM (EUROBBTV)
POWER
15
12505WS-12A00
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.5V_ST
EEPROM for Micom
IC8100
M24C16-WMN6T
1
1
2
47K
R81 00
2
3
3
4
4
MICOM MODEL OPTION
AMP_RESET_N
PANEL_CTL
OPC_EN
P8100
1
2
3
4
5
6
7
8
9
10
11
12
R8104 10K
13
8
7
6
5
R8102 100
R8103 100
R8101 100
OPC
+3.5V_ST
+3.5V_ST
R8108
R8105
R8106
R8107
8
7
6
5
R81 13 2 2
R81 15 2 2
R81 16 2 2
R81 18 2 2
R81 19 2 2
10K
10K
10K
10K
PDP/3D
R8109 10K
LCD/OLED
R8110 10K
R8117
22
R8114
22
+3.5V_ST
TOUCH_KEY
R8111 10K
TACT_KEY
R8112 10K
R8122 4.7K
LOGO_BUZZ
R8120 10K
PWM_LED
R8121 10K
OLED/3D
R8123 10K
LCD/PDP
R8124 10K
for Debugger
MICOM_RESET
NEC_ISP_Tx
NEC_ISP_Rx
OCD1A
OCD1B
FLMD0
NEC_ISP_Tx
NEC_ISP_Rx
OCD1A
OCD1B
+3.5V_ST
C8100
0.1uF
R8125 4.7K
MODEL1_OPT_0
MODEL1_OPT_1
MODEL1_OPT_2
MODEL1_OPT_3
NEC_EEPROM_SCL
NEC_EEPROM_SDA
PIN NAME
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_0
MODEL_OPT_3
MODEL_OPT_1
MODEL_OPT_2
MODEL OPTION
PIN NO.
8
11
30
31
0
0
LOW
0
HIGH
OLED/3D
LOGO_BUZZ
TOUCH_KEY
PDP/3D
PDP LCD
0
1
LOW_SMALL
0
+3.5V_ST
OPT
R8126
10K
LOW
LCD/PDP
PWM_LED
TACT_KEY
LCD/OLED
OLED
1
0
TBD
1 0
0 1
SCL1_3.3V
SDA1_3.3V
NEC_EEPROM_SCL
NEC_EEPROM_SDA
HDMI_CEC
POWER_ON/OFF2_1
AMP_MUTE
MODEL1_OPT_0
SOC_RESET
INV_CTL
MODEL1_OPT_1
OCD1B
3D
1
1
HIGH
1
1
GND
50V
15pF
C8101
C8102
10MHz
X8100
10Mhz Crystal Ready
22
R8127
22
R8128
P33/TI51/TO51/INTP4
R8129 22
R8130 22
R8131 22
R8132 22
R8133 22
R8134 22
R8135 22
R8136 22
P32/INTP3/OCD1B
NON_M-REMOTE
50V
15pF
R8138
+3.5V_ST
C8103
0.1uF
P62/EXSCL0
0
P60/SCL0
P61/SDA0
P63
P75
P74
P73/KR3
P72/KR2
P71/KR1
P70/KR0
+3.5V_ST
R8139
10K
OPT
FLMD0
47K
OPT
R8143 10K
R8140
GND
C8104 0.1uF
P122/X2/EXCLK/OCD0B
P121/X1/OCD0A
REGC
VSS
VDD
44
45
46
47
48
1
2
3
4
5
6
7
8
IC8101
UPD78F0513AGA-GAM-AX
NEC_MICOM
9
10
11
12
13
14
15
16
P30/INTP1
P31/INTP2/OCD1A
NON_M-REMOTE
R81 42 22
OCD1A
P15/TOH0
P17/TI50/TO50
P16/TOH1/INTP5
22
22
TACT_KEY
R81 45
R81 44
IR
POWER_DET
LED_B/LG_LOGO
0
R8146
22p F
C81 05
X8101
32.768KHz
R8175
4.7M
P123/XT1
FLMD0
42
43
17
18
19
P14/RXD6
P13/TXD6
LED_R/BUZZ
NEC_ISP_Rx
MICOM_DOWNLOAD
C8106 27pF
WIRELESS_PWR_EN
WIRELESS_DETECT
MICOM_RESET
22
R8180
R8178 22
P120/INTP0/EXLVI
P41
P40
RESET
P124/XT2/EXCLKS
37
38
39
40
41
20
21
22
23
24
AVSS
AVREF
P12/SO10
P11/SL10/RXD0
P10/SCK10/TXD0
22
22
R8181 10K
R81 79
R81 77
R8182 10K
22
R81 76
NEC_ISP_Tx
NEC_RXD
NEC_TXD
POWER_ON/OFF2_2
R8183 10K
+3.5V_ST
47K
SW8100
R8184
JTP-1127WEM
C8108
4 3
0.1uF
R8185
20K
P140/PCL/INTP6
36
P00/TI000
35
P01/TI010/TO00
34
P130
33
P20/ANI0
32
ANI1/P21
31
ANI2/P22
30
ANI3/P23
29
ANI4/P24
28
ANI5/P25
27
ANI6/P26
26
ANI7/P27
25
+3.5V_ST
C8107 1uF
+3.5V_ST
OPT
OPT
OPT
1 2
R8186 20K
1/16W
1%
1/16W
1%
R8187 22
R8188 22
R8189 10K
R8192 22
R8194 22
R8195 22
R81 96 2 2
R8190 22
R8193 22
R8191 22
SCART1_MUTE
C
Q8100
B
2SC3052
E
FOR ATSC Assy
EDID_WP
RL_ON
SCART1_MUTE
WIRELESS_SW_CTRL
FLASH_WP
MODEL1_OPT_3
MODEL1_OPT_2
POWER_ON/OFF1
MICOM_DOWNLOAD
SIDE_HP_MUTE
KEY2
KEY1
TP8100
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP2_Saturn7M
MICOM
Ver. 1.4
5
+3.5V_ST
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EYEQ
R8225
50V
R8227 1.5K
R8224
100
C8212
100pF
LED_R/BUZZ
100
EYEQ
R8226
100
TACT_KEY
50V
IR & KEY
KEY1
KEY2
+3.5V_ST
R8202
Q8200
2SC3052
47K
R8203
C
B
E
R8201
0
OPT
R8200
IR
22
+3.5V_ST
R8205
47K
R8206
3.3K
+3.5V_ST
OPT
COMMERCIAL
IR_OUT
COMMERCIAL
R8207
22
R8204
47K
10K
C
B
Q8201
E
2SC3052
R8211
10K
1%
R8209
100
R8210
100
COMMERCIAL_EU
Q8202
2SC3052
COMMERCIAL_EU
R8213
10K
1%
BLM18PG121SN1D
BLM18PG121SN1D
+3.5V_ST
R8214
47K
C
B
E
COMMERCIAL_EU
R8212
0
COMMERCIAL_US
L8200
L8201
+3.5V_ST
R8216
10K
C8206
0.1uF
R8218
COMMERCIAL
Q8204
2SC3052
COMMERCIAL
C8207
0.1uF
L8202
BLM18PG121SN1D
C8208
0.1uF
+3.5V_ST
47K
C
B
COMMERCIAL
E
16V
R8220
47K
D8200
5.6V
AMOTECH
D8201
AMOTECH
C8209
1000pF
50V
+3.3V_NORMAL
5.6V
LED_B/LG_LOGO
L8203
BLM18PG121SN1D
C8210
0.1uF
16V
NEC_EEPROM_SCL
NEC_EEPROM_SDA
C8211
1000pF
Zener Diode is
WIRELESS
IR_PASS
R8208
WIRELESS
+3.5V_ST
R8215
47K
WIRELESS
22
R8217
C
Q8203
B
2SC3052
WIRELESS
WIRELESS
E
+3.5V_ST
R8219
47K
WIRELESS
10K
Q8205
2SC3052
WIRELESS
R8221
47K
C
B
WIRELESS
E
close to wafer
C8213
1000pF
50V
OPT
C8214
1000pF
50V
OPT
R8287
LD650/LD750
D8206
5.6V
AMOTECH
R8276
1.5K
D8204
CDS3C05HDMI1
5.6V
D8205
CDS3C05HDMI1
5.6V
10K
OPT
R8280
10K
P8200
12507WR-12L
1
2
3
4
5
6
7
8
9
10
11
12
13
ETHERNET CONNECT
R8283
EPHY_LINK
0
R8284
0
R8285
0
OPT
C8221
10pF
50V
R8286
0
OPT
C8218
10pF
50V
EPHY_TDP
EPHY_TDN
EPHY_RDP
EPHY_RDN
EPHY_ACTIVITY
OPT
C8220
10pF
50V
OPT
C8222
10pF
50V
D8210
5.6V
D8208
D8207
5.6V
5.6V
D8209
D8211
D8212
5.6V
5.6V
5.6V
C8216
1000pF
50V
1000pF
C8217
A2.5V
L8204
CIC21J501NE
D3.3V
R8281 510
R8282 510
JK8200
XRJV-01V-D12-180
1
2
3
4
5
6
7
8
D1
D2
D3
D4
9
RS232C
+3.5V_ST
C8200 0.33uF
C8201
0.1uF
C8202
0.1uF
C8203
0.1uF
C8204
0.1uF
DOUT2
RIN2
C1+
C1-
C2+
C2-
V+
V-
IC8200
MAX3232CDR
1
2
3
4
5
6
7
8
EAN41348201
C8205
0.1uF
VCC
16
GND
15
DOUT1
14
RIN1
13
ROUT1
12
DIN1
11
DIN2
10
ROUT2
9
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+3.5V_ST
4.7K
OPT
R8222
4.7K
OPT
R8223
D8202
CDS3C30GTH
30V
IR_OUT
D8203
CDS3C30GTH
30V
R8273 0
R8272
R8274
R8275
R8277
100
R8278
100
0
0
0
OPT
R8279
Trace impedance : 100 ohm differenctial impedance to GND plane
10
5
9
P8201
4
8
3
7
2
6
1
0
SPG09-DB-009
BCM_RXD1
NEC_RXD
BCM_TXD1
NEC_TXD
5 mils trace width with 7 mils air gap on P/N pair.
Adjacent TX/RX differential pairs should be separated by more than
15 mils to each other
SHIELD
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
20
JK8302
EAG59023302
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HP_DET
5V
GND
DDC_DATA
DDC_CLK
NC
CE_REMOTE
CK-
CK_GND
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
R8302
D8302
5.5V
1K
* HDMI CEC
E
C
KRC104S
Q8307
B
DDC_SDA_4
DDC_SCL_4
E
C
B
R8321
4.7K
GND
D8311
5.5V
ESD
HDMI_HPD_4
5V_HPD4
5V_HDMI_4
CEC_REMOTE
CK-_HDMI4
CK+_HDMI4
D0-_HDMI4
D0+_HDMI4
D1-_HDMI4
D1+_HDMI4
D2-_HDMI4
D2+_HDMI4
CEC_REMOTE
R8326
D8312
MMBD301LT1G
+3.5V_ST
22K
G
SBD
Q8308
BSS83
+3.3V_HDMI
R8349
27K
HDMI_CEC
+3.3V_NORMAL
E
KRC104S
Q8302
JP8304
JP8305
E
C
Q8305
B
DDC_SDA_1
DDC_SCL_1
C
GND
OPT
KRC104S
GND
R8307
0
R8308
0
R8311
4.7K
HDMI_HPD_1
B
5V_HPD1
5V_HDMI_1
D8305
5.5V
OPT
GND
CEC_REMOTE
CK-_HDMI1
CK+_HDMI1
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
D1+_HDMI1
D2-_HDMI1
D2+_HDMI1
JACK_GND
GND
20
JK8303
EAG42463001
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HP_DET
5V
GND
DDC_DATA
DDC_CLK
NC
CE_REMOTE
CK-
CK_GND
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
ESD
D8313
CDS3C05HDMI1
D8308
5.5V
ESD
R8316
1K
5.6V
D8314
CDS3C05HDMI1
GND
GND
KRC104S
GND
Q8306
JP8306
R8317
0
R8318
JP8307
0
ESD
5.6V
+3.3V_HDMI
L8300
BLM18PG121SN1D
C8324
0.1uF
YKF45-7058V
SHIELD
20
JK8300
EAG59023302
HDMI_3
YKF45-7058V
SHIELD
20
JK8301
EAG59023302
YKF45-7058V
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
19
18
17
16
15
14
13
12
11
10
HP_DET
GND
DDC_DATA
DDC_CLK
CE_REMOTE
CK-
CK_GND
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
9
8
7
6
5
4
3
2
1
5V
NC
HP_DET
5V
GND
DDC_DATA
DDC_CLK
NC
CE_REMOTE
CK-
CK_GND
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
5V_HDMI_1
A1CA2
5V_HDMI_3
A1CA2
R8314
47K
R8315
47K
GND
C8308
DDC_SDA_1
DDC_SCL_1
DDC_SDA_3
DDC_SCL_3
SIDE_HDMI_PORT4
+5V_NORMAL
5V_HDMI_2
R8319
47K
HDMI_3
+5V_NORMAL
R8320
47K
A1CA2
HDMI_3
D8309
5V_HDMI_4
A1CA2
R8322
47K
HDMI_3
R8323
47K
5V_HPD2
5V_HPD4
D8310
EDID Pull-up
DDC_SDA_2
DDC_SCL_2
DDC_SDA_4
DDC_SCL_4
HDMI1
HDMI_HPD_1
DDC_SDA_1
DDC_SCL_1
CK-_HDMI1
CK+_HDMI1
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
D1+_HDMI1
D2-_HDMI1
D2+_HDMI1
+5V_NORMAL
+5V_NORMAL
+1.8V_HDMI
C8302
0.1uF
R8325
1.8K
R8324
1.8K
16V
C8300
0.1uF
5V_HDMI_1
R8327
C8301
0.1uF
16V
0.1uF
C8305
0.1uF
C8307
0.1uF
HDMI_CLK-
HDMI_CLK+
HDMI_SDA
HDMI_SCL
OPT
R8328
0
0
C8303
C8304
0.1uF
0.1uF
16V
16V
HDMI_RX1-
HDMI_RX0+
HDMI_RX0-
33
R8330
R8329 33
R8331 33
VSS_1
OUT_C+
OUT_C-
VDDO[3V3]
OUT_DDC_CLK
OUT_DDC_DAT
VSS_2
VDDDC[1V8]_1
RXA_HPD
RXA_5V
RXA_DDC_DAT
RXA_DDC_CLK
RXA_C-
RXA_C+
VDDH[3V3]_1
RXA_D0RXA_D0+
VSS_3
RXA_D1RXA_D1+
VDDH[3V3]_2
RXA_D2RXA_D2+
VDDH[1V8]_1
AUX_5V
HDMI_RX1+
R8332 33
5V_HDMI_2
HDMI2
HDMI_RX2-
HDMI_RX2+
33
R8334 33
R8333
OUT_D0-
100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
VSS_427TEST1
C8306
0.1uF
16V
R8335
0.1uF
OUT_D1+
OUT_D1-
VSS_1299OUT_D0+
97
98
28
29
RXB_5V
RXB_HPD
RXB_DDC_DAT
OPT
0
HDMI_HPD_2
C8310
0.1uF
C8309
0.1uF
OUT_D2-
VDDO[1V8]
94
95
96
TDA19997
30
31
32
RXB_C-33RXB_C+
RXB_DDC_CLK
DDC_SCL_2
DDC_SDA_2
CK-_HDMI2
CK+_HDMI2
C8311
D2-_HDMI4
D2+_HDMI4
VDDH[3V3]_8
RXD_D2-
RXD_D2+
VDDDC[1V8]_3
VSS_1193OUT_D2+
89
90
91
92
IC8300
34
35
37
VSS_5
RXB_D0-36RXB_D0+
RXB_D1-39RXB_D1+
VDDH[3V3]_3
D0+_HDMI2
D0-_HDMI2
D1-_HDMI4
D1+_HDMI4
RXD_D1+
87
88
38
40
VDDH[3V3]_4
D1+_HDMI2
D1-_HDMI2
D0-_HDMI4
D0+_HDMI4
RXD_D0-
RXD_D0+
VSS_1086RXD_D1-
83
84
85
41
43
VSS_6
RXB_D2-42RXB_D2+
D2-_HDMI2
D2+_HDMI2
CK+_HDMI4
CK-_HDMI4
RXD_C-
RXD_C+82VDDH[3V3]_7
80
81
44
45
46
CDEC_DDC
VDDDC[1V8]_2
VDDDC[1V8]_4
R8337
DDC_SDA_4
DDC_SCL_4
R8339
RXD_HPD
RXD_5V
RXD_DDC_DAT
RXD_DDC_CLK
77
78
79
47
48PD49
TEST2
I2C_SDA50I2C_SCL
R8336 0
22
R8338
0
SDA2_3.3V
HDMI4
HDMI_HPD_4
5V_HDMI_4
C8312
0.1uF
16V
0
OPT
Place close
to TDA9996
76
VDDH[1V8]_2
75
R12K
74
VSS_9
73
RXC_D2+
72
RXC_D2-
71
VDDH[3V3]_6
70
RXC_D1+
69
RXC_D1-
68
VSS_8
67
RXC_D0+
66
RXC_D0-
65
VDDH[3V3]_5
64
RXC_C+
63
RXC_C-
62
RXC_DDC_CLK
61
RXC_DDC_DAT
60
RXC_5V
59
RXC_HPD
58
CEC
57
VSS_7
56
VDDS[3V3]
55
CDEC_STBY
54
INT_N/MUTE
53
RXE_DDC_DAT
52
RXE_DDC_CLK
51
0
R8343
C8313
0.1uF
16V
22
R8340
SCL2_3.3V
R8344
12K
OPT
C8314
0.1uF
16V
C8316
0.1uF
16V
5V_HDMI_3
R8345
0
OPT
R8346 0
C8315
0.1uF
C8319
0.1uF
C8320
0.1uF
C8321
0.1uF
C8322
0.1uF
+1.8V_HDMI
C8318
0.1uF
16V
C8317
0.1uF
16V
Ready for TDA19997
OPT
R8347
4.7K
OPT
OPT
4.7K
R8348
C8323
0.1uF
16V
D2+_HDMI3
D2-_HDMI3
D1+_HDMI3
D1-_HDMI3
D0+_HDMI3
D0-_HDMI3
CK+_HDMI3
CK-_HDMI3
DDC_SCL_3
DDC_SDA_3
HDMI_HPD_3
+3.3V_HDMI
HDMI3
KJA-ET-0-0032
GND
D8300
5.5V
GND
OPT
HDMI_3
KRC104S
GND
HDMI_3
R8303
0
R8304
0
HDMI_3
GND
R8305
0
R8306
0
Q8300
JP8300
JP8301
GND
KRC104S
JP8302
JP8303
Q8301
HDMI_3
R8300
1K
GND
D8301
5.5V
OPT
R8301
1K
GND
UI_HW_PORT1
E
HDMI_3
KRC104S
Q8303
E
C
B
C
DDC_SDA_2
DDC_SCL_2
UI_HW_PORT3
E
KRC104S
Q8304
E
C
B
C
DDC_SDA_3
DDC_SCL_3
UI_HW_PORT2
R8309
4.7K
R8310
4.7K
+5V_NORMAL
HDMI_HPD_2
B
HDMI_3
5V_HPD2
5V_HDMI_2
D8303
5.5V
OPT
GND
CEC_REMOTE
CK-_HDMI2
CK+_HDMI2
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
HDMI_HPD_3
B
5V_HPD3
5V_HDMI_3
D8304
5.5V
OPT
GND
CEC_REMOTE
CK-_HDMI3
CK+_HDMI3
D0-_HDMI3
D0+_HDMI3
D1-_HDMI3
D1+_HDMI3
D2-_HDMI3
D2+_HDMI3
5V_HPD1
5V_HPD3
D8306
R8312
47K
+5V_NORMAL
D8307
R8313
47K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LEE GI YOUNG
BCM (EUROBBTV)
HDMI
2009.06.18
8
SPDIF_OUT
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.3V_NORMAL
R8400
1K
D8400
30V
OPT
C8400
0.1uF
16V
JP8401
JP8400
JP8402
VINPUT
JK8400
JST1223-001
GND
1
VCC
2
3
Fib er O pti c
4
FIX_POLE
RGB PC
RGB_HSYNC
RGB_VSYNC
BCM Reference
DSUB_B
DSUB_G
DSUB_R
R8401
22
R8402
22
D0A
D0B
D1A
D1B
GND
IC8401-*1
IC8400
74F08D
1
2
Q0
3
4
5
Q1
6
7
+5V_NORMAL
VCC
14
D3B
13
12
11
10
9
8
R8403
75
PEJ027-01
C8401
0.1uF
D3A
Q3
D2B
D2A
Q2
R8406
22
R8405
22
R8404
75
RGB AUDIO IN
JK8401
3
6A
7A
4
5
7B
6B
R8407
75
E_SPRING
T_TERMINAL1
B_TERMINAL1
R_SPRING
T_SPRING
B_TERMINAL2
T_TERMINAL2
R1EX24002ASAS0A
A0
1
A1
2
A2
3
DEV
VSS
4
RGB_EDID_RENESAS
IC8401
M24C02-RMN6T
E0
1
E1
2
E2
3
VSS
4
0IMMR00014A
RGB_EDID_ST
OPT
50V
22pF
30V
D8401
ADUC30S03010L_AMODIODE
C8402
30V
D8403
ADUC30S03010L_AMODIODE
D8402
D8404
D8405
30V
30V
30V
VCC
8
WP
7
SCL
6
SDA
5
VCC
8
WC
7
SCL
6
SDA
5
OPT
50V
22pF
C8403
L8408
RGB_BEAD
L8409
RGB_BEAD
L8410
RGB_BEAD
BCM Reference
L8408-*1 0
RGB_0OHM
L8409-*1 0
RGB_0OHM
L8410-*10
RGB_0OHM
D8406
AMOTECH
5.6V
D8407
AMOTECH
5.6V
0.1uF
C8404
60-ohm
60-ohm
60-ohm
R8411
470K
R8412
470K
16V
R84 13
18pF 50V
C8405
CDS3C05HDMI1
D8409
ENKMC2838-T112
C
R8414
2.7K
2.7 K
R8415
22
R8417
18pF 50V
C8406
OPT
D8408
5.6V
GND_2
RED2GREEN3BLUE4GND_15DDC_G ND
GREEN _GND
RED_G ND
11
6
1
C8407
1uF
R8416
22
0
DDC_D ATA
12
7
SPG09 -DB-01 0
25V
C8408
1uF
25V
+5V_NORMAL
A1
A2
H_SYN C
BLUE_ GND
13
8
P8400
NC10SYNC_ GND
9
V_SYN C
14
R8418
0
R8420
10K
R8421
R8419
0
R8422
100
0
OPT
D8410
CDS3C05HDMI1
5.6V
OPT
0
R8423
DDC_C LOCK
15
SHILE D
16
PC_R_IN
PC_L_IN
EDID_WP
RGB_DDC_SCL
RGB_DDC_SDA
+3.3V_NORMAL
R8424
10K
OPT
D8411
5.6V
ADMC5M03200L_AMODIODE
RGB IN
1K
R8425
C8409
100pF
50V
DSUB_DET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
ETC SUB BOARD I/F
2009.06.18 EUROBBTV
9
(New Item Developmen H:9.2mm)
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SIDE_AV
PPJ235-01
JK8500
SIDE_AV
5A
[YL]E-LUG
4A
[YL]O-SPRING
3A
[YL]CONTACT
4B
[WH]O-SPRING
3C
[RD]CONTACT
4C
[RD]O-SPRING
5C
[RD]E-LUG
D8503
SIDE_AV
SIDE_AV
D8501
SIDE_AV
D8502
5.6V
SIDE_AV
D8500
5.6V
5.6V
5.5V
+3.3V_NORMAL
R8500
470K
SIDE_AV
R8501
470K
SIDE_AV
SIDE_AV
R8503
SIDE_AV
R8502
2.7K
C8500
100pF
50V
SIDE_AV
0
SIDE_AV
C8501
SIDE_AV
C8502
R8504
1K
SIDE_AV
1uF 25V
1uF 25V
C8503
47pF
50V
SIDE_AV
SIDE_AV
R85 05
0
SIDE_AV
R85 06
0
SIDE_AV
SIDE_AV
C8504
100pF
C8505
100pF
SIDE_AV_CVBS
SIDE_AV_DET
SIDE_AV_L_IN
SIDE_AV_R_IN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SIDE_AV
WIRELESS READY MODEL
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
JK8700
KJA-PH-3-0168
Wireless power
+24V
C8700
0.1uF
50V
R8702
10K
MC14053BDR2G
Y1
1
Y0
2
Z1
3
Z
4
Z0
5
INH
6
VEE
7
VSS
8
WIRELESS_DL_RX
WIRELESS_TX
BCM_TX
WIRELESS_PWR_EN
WIRELESS
R8700
0
R8701
WIRELESS
0
R8705
2.2K
B
NON_WIRELESS
0
R8703
IC8700
WIRELESS
R8704
22K
C
Q8700
E
16
15
14
13
12
11
10
9
C8701
2.2uF
S
G
Q8701
AO3407A
VDD
Y
X
X1
X0
A
B
C
D
MLB-201209-0120P-N2
C8702
0.01uF
50V
+3.5V_ST
WIRELESS
R8707
0
BCM_TXD1
BCM_RXD1
R8708
WIRELESS
R8706
0
NON_WIRELESS
L8700
C8704
10uF
35V
0
WIRELESS_DETECT
WIRELESS_SCL
WIRELESS_SDA
C8705
10uF
WIRELESS_RX
35V
WIRELESS_TX
IR_PASS
C8703
0.1uF
WIRELESS_DL_TX
WIRELESS_RX
+3.5V_ST
BCM_RX
OPT
OPT
4.7K
R8711
WIRELESS_SW_CTRL
47K
R8712
+3.3V_NORMAL
R8714
10K
R8713 1K
VCC[24V/20V/17V]_1
VCC[24V/20V/17V]_2
VCC[24V/20V/17V]_3
VCC[24V/20V/17V]_4
VCC[24V/20V/17V]_5
VCC[24V/20V/17V]_6
INTERRUPT
TP8700
TP8701
I2C_SCL
I2C_SDA
UART_RX
UART_TX
DETECT
GND_1
RESET
GND_2
GND_3
GND_4
GND_5
GND_6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
IR
18
19
20
21
SHIELD
RS232C & Wireless
WIRELESS_SW_CTRL
LOW
SELECT PIN
X1/Y1/Z1
STATUS
WIRELESS Dongle connect --> WIRELESS RS232 HIGH
WIRELESS Dongle Dis_con --> S7 RS232 X0/Y0/Z0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
12
+24V
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
L8803
MLB-201209-0120P-N2
+24V_AMP
C8827
0.1uF
50V
+3.3V_NORMAL
C8800
0.1uF
16V
IC8800
AP1117E18G-13
Vd=1.4V
3IN1
2
OUT
ADJ/GND
AUD_LRCH
AUD_LRCK
AUD_SCK
SDA1_3.3V
SCL1_3.3V
R8800
1
+1.8V_AMP
L8800
BLM18PG121SN1D
OPT
C8801
10uF
10V
C8802
10uF
10V
+1.8V_AMP
+1.8V_AMP
C8803
0.1uF
16V
AMP_RESET_N
AUD_MASTER_CLK
L8801
BLM18PG121SN1D
C8804
0.1uF
16V
OPT
C8805
10uF
10V
R8801 100
R8802 100
R8803 100
R8804 100
R8805 100
C8808
1000pF
50V
C8806
100pF
0.1uF
50V
C8807
16V
120 mA
C8809
33pF
50V
C8811
0.1uF
C8810
1000pF
50V
R8806
3.3K
+3.3V_NORMAL
L8802
BLM18PG121SN1D
C8812
33pF
50V
C8813
47pF
50V
EMI
C88 16
1uF 25V
+1.8V_AMP
OPT
C8815
10uF
10V
C8814
47pF
50V
EMI
C8819
22000pF
BST1A
VDR1A
/RESET
DGND_1
GND_IO
CLK_I
VDD_IO
DGND_PLL
AGND_PLL
AVDD_PLL
DVDD_PLL
C8818
0.1uF
C8817
47pF
50V
EMI
CCFL = 20V
Edge_LED 32~47 Inch = 20V
55 Inch & IOP Module = 24V
+24V_AMP
D8800
C8833
0.1uF
50V
R8811
10K
1N4148W
100V
OPT
D8801
1N4148W
100V
OPT
D8802
1N4148W
100V
OPT
D8803
1N4148W
100V
OPT
C8834
10uF
35V
EMI
R8809
3.3
EMI
C8830
22000pF
50V
R8810
Q8800
2SC3052
10K
C8831
0.1uF
50V
POWER_DET
+3.5V_ST
C
E
C8832
0.01uF
50V
+24V_AMP
B
C8820
0.1uF
50V
50V
PGND1B_2
OUT1B_1
OUT1B_2
PVDD1B_1
PVDD1B_2
PVDD1A_1
PVDD1A_2
OUT1A_1
OUT1A_2
PGND1A_1
PGND1A_2
EP_PAD
46
47
48
49
50
51
52
53
54
55
56
1
THERMAL
2
57
3
AD
4
5
6
IC8801
7
8
EAN60969601
9
10
LF
11
NTP-7000
12
13
GND
14
15
16
17
18
22
25
26
WCK19BCK20SDA21SCL
DVDD
SDATA
DGND_2
16V
VDR2B27BST2B
/FAULT
MONITOR023MONITOR124MONITOR2
C88 22
1uF
25V
C8821
1000pF
50V
0.1uF
50V
C8823
22000pF
50V
C8825
1uF
25V
VDR1B44BST1B45PGND1B_1
43
28
PGND2B_1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
10uF
35V
NC
VDR2A
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
PVDD2A_2
PVDD2A_1
PVDD2B_2
PVDD2B_1
OUT2B_2
OUT2B_1
PGND2B_2
R8808 100
C88 28
R8807
0
OPT
1uF 25V
C8829
22000pF
50V
C8826
C8824
R8812
12
C8835
390pF
50V
C8836
390pF
50V
R8813
12
R8814
12
C8837
390pF
50V
C8838
390pF
50V
R8815
12
AMP_MUTE
R8819
12
R8817
12
R8818
12
R8816
12
L8805
AD-9060
2S
1S 1F
15uH
L8804
AD-9060
2S
1S 1F
15uH
R8820
C8841
2F
2F
C8839
0.47uF
50V
C8840
0.47uF
50V
0.1uF
50V
C8842
0.1uF
50V
C8843
0.1uF
50V
C8844
0.1uF
50V
SPK_L+
SPK_L-
SPK_R+
SPK_R-
4.7K
R8821
4.7K
R8822
4.7K
R8823
4.7K
R8824
0
R8825
0
R8826
0
R8827
0
SPK_L+
SPEAKER_L
SPK_L-
SPK_R+
SPEAKER_R
SPK_R-
WAFER-ANGLE
4
3
2
1
P8800
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
KIM JONG HYUN
BCM (EUROBBTV)
NTP7000
2009.06.18
38
+1.5V_MEMC
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
L8900
C8902
10uF
10V
D1.5V_DDR3
C8904
0.1uF
16V
D1.5V_DDR3
C8908
10uF
C8913
Close to DDR Power Pin
DDR3 1.5V By CAP - Place these Caps near Memory
0.1uF
C8914
0.1uF
C8915
0.1uF
C8916
0.1uF
C8917
0.1uF
C8918
0.1uF
C8919
0.1uF
C8920
0.1uF
C8921
C8922
0.1uF
0.1uF
C8923
0.1uF
C8924
0.1uF
C8925
0.1uF
C8926
0.1uF
C8927
0.1uF
C8928
0.1uF
C8929
0.1uF
C8930
0.1uF
+3.3V_MEMC
FRC_DQL[5]
FRC_DQL[7]
FRC_DQL[3]
FRC_DQL[1]
FRC_A[9]
FRC_A[2]
FRC_A[0]
FRC_BA2
FRC_DQL[0]
FRC_DQL[2]
FRC_DQL[6]
FRC_DQL[4]
FRC_DQU[7]
FRC_DQU[1]
FRC_DQU[5]
FRC_DQU[3]
FRC_DMU
FRC_DQSL
FRC_DQSLB
FRC_DML
FRC_DQSU
FRC_DQSUB
FRC_DQU[2]
FRC_DQU[6]
FRC_DQU[0]
FRC_DQU[4]
FRC_A[3]
FRC_A[5]
FRC_A[7]
FRC_DDR3_RESETB
FRC_CASB
FRC_ODT
FRC_WEB
FRC_BA0
FRC_RASB
FRC_MCLK
FRC_MCLKB
FRC_CKE
FRC_A[8]
FRC_A[6]
FRC_A[4]
FRC_BA1
FRC_A[10]
FRC_A[12]
FRC_A[1]
FRC_A[11]
D1.5V_DDR3
R8900
R8904
AR8900
10
AR8901
10
AR8902
10
AR8903
10
R8909
10
R8910
10
R8913
10
R8914
10
R8911
10
R8912
10
AR8904
10
AR8906
10
AR8905
10
R8915
10
R8916
10
R8917
10
R8918
10
AR8908
10
AR8907
10
C8942
22uF
10V
+3.3V_MEMC
+1.26V_MEMC
C8943
0.1uF
16V
C8944
0.1uF
16V
+12V
L8902
D1.5V_DDR3
1K 1%
0.1uF
1K 1%
C8903
C8901
1000pF
OPT
MVREFDQ
R8919
R8920
1K 1%
0.1uF
1K 1%
C8910
C8909
1000pF
OPT
MVREFCA
CIC21J501NE
C8932
10uF
25V
C8934
10uF
25V
Vout=0.8*(1+R1/R2)
DDR3_DQL[5]
DDR3_DQL[7]
DDR3_DQL[3]
DDR3_DQL[1]
DDR3_A[9]
DDR3_A[2]
DDR3_A[0]
DDR3_BA2
DDR3_DQL[0]
DDR3_DQL[2]
DDR3_DQL[6]
DDR3_DQL[4]
DDR3_DQU[7]
DDR3_DQU[1]
DDR3_DQU[5]
DDR3_DQU[3]
DDR3_DMU
DDR3_DQSL
DDR3_DQSLB
DDR3_DML
DDR3_DQSU
DDR3_DQSUB
DDR3_DQU[2]
DDR3_DQU[6]
DDR3_DQU[0]
DDR3_DQU[4]
DDR3_A[3]
DDR3_A[5]
DDR3_A[7]
DDR3_RESETB
DDR3_CASB
DDR3_ODT
DDR3_WEB
DDR3_BA0
DDR3_RASB
DDR3_MCLK
DDR3_MCLKB
DDR3_CKE
DDR3_A[8]
DDR3_A[6]
DDR3_A[4]
DDR3_BA1
DDR3_A[10]
DDR3_A[12]
DDR3_A[1]
DDR3_A[11]
MVREFCA
MVREFDQ
D1.5V_DDR3
R8921
240
1%
IC8900
H5TQ1G63BFR-12C
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
A10/AP
A12/BC
RESET
DQSL
DQSL
DQSU
DQSU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D1.5V_DDR3
DDR3_A[0-12]
DDR3_DQL[0-7]
DDR3_DQU[0-7]
+12V
L8901
C8931
10uF
25V
URSA3 DDR3 1.5V
+3.3V_MEMC
L8903
CIC21J501NE
C8935
10uF
16V
URSA3 CORE 1.26V
C8933
10uF
25V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A13
A15
BA0
BA1
BA2
CK
CK
CKE
CS
ODT
RAS
CAS
WE
DML
DMU
DDR3_A[1]
P7
DDR3_A[2]
P3
DDR3_A[3]
N2
DDR3_A[4]
P8
DDR3_A[5]
P2
DDR3_A[6]
R8
DDR3_A[7]
R2
DDR3_A[8]
T8
DDR3_A[9]
R3
DDR3_A[10]
L7
DDR3_A[11]
R7
DDR3_A[12]
N7
T3
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2
F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
DDR3_BA0
DDR3_BA1
DDR3_BA2
DDR3_ODT
DDR3_RASB
DDR3_CASB
DDR3_WEB
DDR3_RESETB
DDR3_DQSL
DDR3_DQSLB
DDR3_DQSU
DDR3_DQSUB
DDR3_DML
DDR3_DMU
DDR3_DQL[0]
DDR3_DQL[1]
DDR3_DQL[2]
DDR3_DQL[3]
DDR3_DQL[4]
DDR3_DQL[5]
DDR3_DQL[6]
DDR3_DQL[7]
DDR3_DQU[0]
DDR3_DQU[1]
DDR3_DQU[2]
DDR3_DQU[3]
DDR3_DQU[4]
DDR3_DQU[5]
DDR3_DQU[6]
DDR3_DQU[7]
DDR3_MCLK
150
OPT
R8922
DDR3_MCLKB
DDR3_CKE
R8923
10K
DDR3_A[0]
N3
Vout=0.8*(1+R1/R2)
IC8903
AOZ1072AI
PGND
1
VIN
2
AGND
2A
3
FB
4
IC8901
AP1117EG-13
ADJ/GND
IC8902
AOZ1072AI
PGND
1
VIN
2
AGND
2A
3
FB
4
L8905
R8928
9.1K
R8925
10K
NR8040T3R6N
3.6uH
POWER_ON/OFF2_2
2200pF
C8937
R8933
27K
4.7K
R8934
R8935
10K
1%
1%
OPT
C8940
100pF
50V
1%
R1
R2
LX_2
8
LX_1
7
EN
6
COMP
5
+1.5V_MEMC
1074 mA
OUT IN
R8936
R8930
3.3K
3.9K
R8931
R8932
12K
1%
1%
OPT
C8939
100pF
50V
1%
1
C8946
0.1uF
16V
C8941
R1
22uF
10V
R2
1%
270
R8927
C8938
22uF
R8929
56
1%
L8904
LX_2
8
LX_1
7
EN
6
COMP
5
3.6uH
NR8040T3R6N
POWER_ON/OFF2_1
R8926
10K
6.2K
3300pF
R8924
C8936
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
COMMON
URSA3 DDR & Power
2009.09.11
89
FRC_SPI_CZ
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
FRC_SPI_DO
Serial Flash
IC9000
R9000 10
R9001 10
R9002 10K
MX25L4005CM2I-12G
CS#
WP#
GND
URSA3_FLASH_MACRONIX
VCC
8
1
HOLD#
SO
7
2
SCLK
6
3
SI
5
4
EAN61009401
+3.3V_MEMC
C90 28
R9005 10
R9006 10
C9038
C9039
22pF
22pF
X9000
12MHz
R9029
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_CLK_N
LVDS_TX_1_CLK_P
IC9000-*1
W25X40BVSSIG
VCC
CS
8
1
WP
GND
GND
2
3
4
W25X40VSSIG
CS
DO
WP
IC9000-*2
1
2
3
4
EAN35097301
HOLD
7
CLK
6
DI[IO0]
5
VCC
8
HOLD
7
CLK
6
DIO
5
DO[IO1]
0.1 uF
URSA3_FLASH_WINBOND_NEW
FRC_SPI_CK
FRC_SPI_DI
URSA3_FLASH_WINBOND_OLD
R9017
100
R9018
100
R9019
100
R9020
100
R9021
100
R9022
100
LVDS_TX_1_DATA2_P
LVDS_TX_0_CLK_P
LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA4_P
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_CLK_N
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA3_P
1M
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_N
R9023
100
R9024
100
R9025
100
R9026
100
R9027
100
R9028
100
FRC_CONF0
H_CONV
0
URSA3
R9030
FRC_CONF1
FRC OPTION
+3.3V_MEMC
URSA3_MIRROR
100
100
URSA3_NON_MIRROR
R9032
R9031
R9033
4.7K
R9034
4.7K
K14
T10
R10
R9
U10
R9035
4.7K
URSA3_MINI_LVDS
R9036
4.7K
URSA3_LVDS
LOW
NON_MIRROR
LVDS
GIP
SCAN_OFF
LD
R9052
4.7K
URSA3_NON_GIP
R9053
4.7K
URSA3_GIP
HIGH
MIRROR
MINI_LVDS
NON_GIP
SCAN_ON
NON_LD
R9054
4.7K
R9056
4.7K
URSA3_SCANNING_ON
URSA3_NON_LOCAL_DIMMING
R9055
4.7K
R9057
4.7K
URSA3_SCANNING_OFF
URSA3_LOCAL_DIMMING
FRC_CONF0
R9037 0
MINI_LVDS
FRC_SPI_CK
FRC_SPI_CZ
FRC_SPI_DI
FRC_SPI_DO
DPM_A
R9041
820
FRC_RESET
SW9000
JTP-1127WEM
1 2
+3.3V_MEMC
4 3
100
R9042
+3.3V_MEMC
+3.3V_MEMC
+3.3V_MEMC
+1.5V_MEMC
+1.26V_MEMC
L9004
CIC21J501NE
L9000
CIC21J501NE
L9001
CIC21J501NE
L9002
CIC21J501NE
L9003
CIC21J501NE
AVDD_PLL
AVDD_MEMPLL
C9000
10uF
VDDP
AVDD_DDR
VDDC
C9004
10uF
C9001
10uF
C9002
10uF
C9003
10uF
C9009
0.1uF
C9005
0.1uF
C9006
10uF
C9007
10uF
C9008
10uF
+3.3V_MEMC
+3.3V_MEMC
C9010
0.1uF
C9011
0.1uF
C9012
0.1uF
12505WS-04A00
P9000
L9005
L9006
5
CIC21J501NE
CIC21J501NE
C9013
0.1uF
C9014
0.1uF
C9015
0.1uF
1
2
3
4
AVDD
AVDD_LVDS
C9016
0.1uF
C9017
0.1uF
C9018
0.1uF
B2
FRC_A[0-12]
C9029
C9024
C9019
10uF
10uF
C9025
C9020
10uF
10uF
C9026
C9021
0.1uF
0.1uF
C9027
C9022
0.1uF
0.1uF
C9023
0.1uF
22
R9003
R9004
URSA3_SCL
URSA3_SCL
URSA3_SDA
22
0.1uF
C9030
0.1uF
URSA3_SDA
C9031
0.1uF
C9032
0.1uF
C9033
0.1uF
C9034
0.1uF
C9035
0.1uF
22
22
22
22
FRC_BA0
FRC_BA1
FRC_BA2
FRC_MCLK
FRC_MCLKB
FRC_CKE
FRC_ODT
FRC_RASB
FRC_CASB
FRC_WEB
FRC_DDR3_RESETB
FRC_DQSL
FRC_DQSU
FRC_DQSLB
FRC_DQSUB
FRC_DML
FRC_DMU
FRC_DQL[0-7]
FRC_DQU[0-7]
R9009
R9010
SCL3_3.3V
SDA3_3.3V
SCL1_3.3V
SDA1_3.3V
R9007
R9008
OPT
OPT
FRC_A[0]
FRC_A[1]
FRC_A[2]
FRC_A[3]
FRC_A[4]
FRC_A[5]
FRC_A[6]
FRC_A[7]
FRC_A[8]
FRC_A[9]
FRC_A[10]
FRC_A[11]
FRC_A[12]
FRC_DQL[0]
FRC_DQL[1]
FRC_DQL[2]
FRC_DQL[3]
FRC_DQL[4]
FRC_DQL[5]
FRC_DQL[6]
FRC_DQL[7]
FRC_DQU[0]
FRC_DQU[1]
FRC_DQU[2]
FRC_DQU[3]
FRC_DQU[4]
FRC_DQU[5]
FRC_DQU[6]
FRC_DQU[7]
R9011 100
R9012 100
R9013
R9014
R9015
R9016
E2
DDR3_A0/DDR2_NC
U6
DDR3_A1/DDR2_A6
E3
DDR3_A2/DDR2_A7
G2
DDR3_A3/DDR2_A1
R4
DDR3_A4/DDR2_CASZ
G1
DDR3_A5/DDR2_A10
U5
DDR3_A6/DDR2_A0
F3
DDR3_A7/DDR2_A5
T5
DDR3_A8/DDR2_A2
F1
DDR3_A9/DDR2_A9
R6
DDR3_A10/DDR2_A11
R5
DDR3_A11/DDR2_A4
T6
DDR3_A12/DDR2_A8
G3
DDR3_BA0/DDR2_BA2
U4
DDR3_BA1/DDR2_ODT
E1
DDR3_BA2/DDR2_A12
U1
DDR3_MCLK/DDR2_MCLK
U2
DDR3_MCLKZ/DDR2_MCLKZ
T4
DDR3_CKE/DDR2_RASZ
H2
DDR3_ODT/DDR2_BA1
J1
DDR3_RASZ/DDR2_WEZ
H3
DDR3_CASZ/DDR2_CKE
H1
DDR3_WEZ/DDR2_BA0
F2
DDR3_RESET/DDR2_A3
M3
DDR2_DQS0/DDR3_DQS0
N2
DDR2_DQS1/DDR3_DQS1
N1
DDR2_DQSB0/DDR3_DQSB0
N3
DDR2_DQSB1/DDR3_DQSB1
R2
DDR2_DQ7/DDR3_DQM0
K3
DDR2_DQ11/DDR3_DQM1
K2
DDR2_DQ6/DDR3_DQ0
R3
DDR2_DQ0/DDR3_DQ1
K1
DDR2_DQ1/DDR3_DQ2
T1
DDR2_DQ2/DDR3_DQ3
J2
DDR2_DQ4/DDR3_DQ4
T3
DDR2_NC/DDR3_DQ5
J3
DDR2_DQ3/DDR3_DQ6
T2
DDR2_DQ5/DDR3_DQ7
P2
DDR2_DQ8/DDR3_DQ8
L3
DDR2_DQ14/DDR3_DQ9
R1
DDR2_DQ13/DDR3_DQ10
L1
DDR2_DQ12/DDR3_DQ11
P1
DDR2_DQ15/DDR3_DQ12
L2
DDR2_DQ9/DDR3_DQ13
P3
DDR2_DQ10/DDR3_DQ14
M1
DDR2_DQM1/DDR3_DQ15
M2
DDR2_DQM0/DDR3_NC
C9
I2CM_SDA
D9
P7
N8
P9
N10
I2CM_SCL
I2CM_SDA2_L
I2CM_SCL2_L
I2CM_SDA2_R
I2CM_SCL2_R
100
100
100
100
RE0PA4RE0NB4RE1PC3RE1NC4RE2PB3RE2NA3RE3PC1RE3NC2RE4PB1RE4N
RECKPA2RECKN
AVDD_1F8AVDD_2F9AVDD_DDR_1L5AVDD_DDR_2L6AVDD_DDR_3L7AVDD_DDR_4L8AVDD_DDR_5M7AVDD_DDR_6M8AVDD_LVDS_1
AVDD
AVDD_DDR
VDDC
Separate DVDD_DDR Power
A1
AVDD_LVDS_2
G12
H12
AVDD_LVDS
L9007
CIC21J501NE
B6
RO0PA8RO0NB8RO1PC7RO1NC8RO2PB7RO2NA7RO3PC5RO3NC6RO4PB5RO4N
ROCKPA6ROCKN
A5
B9
K14
J13
H14
G13
F14
E13
D4
XTALOA9XTALI
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[8]D3GPIO[9]
IC9001
LGE7378A[FRC_TCON_URSA3]
URSA3
AVDD_LVDS_3
AVDD_LVDS_4
AVDD_MEMPLLM6AVDD_PLL_1
AVDD_PLL_2
DVDD_DDR[1.26V]
VDD_EVEN
VDD_ODD
VDDC_1F6VDDC_2F7VDDC_3G5VDDC_4G6VDDC_5G7VDDC_6H5VDDC_7H6VDDC_8J6VDDP_1
F11
AVDD_MEMPLL
C9036
10uF
J5
F12
AVDD_PLL
C9037
0.1uF
E16
E17
GVDD_ODD
GVDD_EVEN
VDDC
J12
K12
VDDP_2K5VDDP_3K6VDDP_4
G11
VDDP
F4
GPIO[10]E4GPIO[12]D5GPIO[13]D7GPIO[14]
VDDP_5
VSS_1
M10
M11
C10
C12
R7
U8
U7
M_S_PIF_CS
M_S_PIF_CLK_1
M_S_PIF_CLK_2
VSS_2
VSS_3G8VSS_4G9VSS_5
G10
T8
T7
M_S_PIF_FC
M_S_PIF_DA1
VSS_6H7VSS_7H8VSS_8H9VSS_9
U14
U15
R13
T13
T14
S_M_PIF_CS
S_M_PIF_FC
S_M_PIF_CLK
S_M_PIF_DA0
S_M_PIF_DA1
VSS_10
VSS_11J4VSS_12J7VSS_13J8VSS_14J9VSS_15
H10
H11
SCAN_BLK2
SCAN_BLK1/OPC_OUT
T10
T11
LTD_CLK_L
LTD_CLK_R
VSS_16
J10
J11
R10
U11
U12
LTD_DA0_L
LTD_DA0_R
LTD_DA1_LR9LTD_DA1_R
VSS_17K7VSS_18K8VSS_19K9VSS_20
K10
U10
R11
LTD_DE_L
VSS_21
K11
LTD_DE_R
OP_SYNC_LU9OP_SYNC_R
VSS_22L9VSS_23
VSS_24
L10
L11
R12
PLL_LOCK_LT9PLL_LOCK_R
VSS_25M9VSS_26N4VSS_27P6A10
LD_SCAN
R9038
LD_SCAN
R9039
T12
A10
100
100
U13
P13
SPI_CK
SOFT_RST_LR8SOFT_RST_R
A11
A12
B10
B11
A11
A12
B10
B11
N14
SPI_CZ
B12
B12
N12
N13
SPI_DI
C11
C11
D11
FRC_PWM1
FRC_PWM0
M14
C13
REXT
RESET
SPI_DO
A0P/RV0+
A0M/RV0A1P/RV1+
A1M/RLV1-
A2P/RV2+
A2M/RV2ACKP/R3+
ACKM/RV3-
A3P/RV4+
A3M/RV4A4P/RV5+
A4M/RV5-
B0P/RV6+
B0M/RV6B1P/RV7+
B1M/RV7B2P/RV8+
B2M/RV8-
BCKP/WPWM
BCKM/OPT_P
B3P/OPT_N
B3M/FLK
B4P/GCLK6
B4M/GLCK5
C0P/LV0+
C0M/LV0C1P/LV1+
C1M/LV1C2P/LV2+
C2M/LV2CCKP/LV3+
CCKM/LV3-
C3P/LV4+
C3M/LV4-
C4P/LV5+
C4M/LV5-
D0P/LV6+
D0M/LV6-
D1P/LV7+
D1M/LV7-
D2P/LV8+
D2M/LV8-
DCKP/GOE
DCKM/GSC/GCLK3
D3P/GSP_R
D3M/GSP
D4P/SOE
D4M/POL
GCLK4
GCLK2
I2CS_SDA
I2CS_SCL
PWM0
PWM1
LPLL_FBCLK
LPLL_OUTCLK
LPLL_REFIN
D11
TESTPIN
VB1_TEST
L13
F10
R9040
0
B14
A14
C14
C15
A15
B15
B16
A16
A17
B17
C16
C17
D16
D17
D15
E15
F16
F17
F15
G15
G17
G16
H16
H17
H15
J15
J17
J16
K16
K17
K15
L15
L17
L16
M16
M17
M15
N15
N17
N16
P15
R15
R17
R16
T16
T17
T15
U17
P16
P17
D1
D2
P14
R14
B13
U16
A13
RXB0+
RXB0RXB1+
RXB1RXB2+
RXB2RXBCK+
RXBCKRXB3+
RXB3RXB4+
RXB4-
RXA0+
RXA0RXA1+
RXA1RXA2+
RXA2RXACK+
RXACKRXA3+
RXA3RXA4+
RXA4-
RXC0+
RXC0RXC1+
RXC1RXC2+
RXC2RXCCK+
RXCCKRXC3+
RXC3RXC4+
RXC4-
RXD0+
RXD0RXD1+
RXD1RXD2+
RXD2RXDCK+
RXDCKRXD3+
RXD3RXD4+
RXD4-
GCLK4
GCLK2
URSA3_SDA
URSA3_SCL
FRC_PWM0
FRC_PWM1
OPT
0
FRC_CONF0
FRC_CONF1
FRC_PWM1
FRC_PWM0
V_SYNC
d5: boot from internal SRAM
d6: boot from EEPROM
d7: boot from SPI Flash
R9043
I2C ADR: GPIO1: HI:B8 LOW:B4
CHIP_CONF: {GPIO8, PWM1, PWM0}
CHIP_CONF= 3
CHIP_CONF= 3
CHIP_CONF= 3
+3.3V_MEMC
1K
OPT
R9044
1K
R9045
1K
R9046
1K
OPT
R9047
R9048 1K
R9050 1K
OPT
OPT
R9049 1K
R9051 1K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
COMMON
URSA3 (NO L.D.)
2009.09.11
90
[LEVEL Shift Block]
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C9102
OPT
OPT
GVDD_ODD_I
GVDD_EVEN_I
GSP/GVST_I
GCLK6_I
GCLK5_I
GCLK4_I
GSC/GCLK3_I
GCLK2_I
GOE/GCLK1_I
C9101
0.22uF
(+25V)
50V
GIP
[P-GAMMA Block]
Slave Address : 0xE8h
(AO Pin - GND)
D9103
R9165
18K
1%
OPT
R9166
15K
1%
C9136
27pF 50V
NON_GIP
1
2
3
4
5
6
7
8
9
10
11
CTL
R9168
FLK
10K
GIP
12
DRVN13AGND
MMSD4148T1G
C9134
OPT
C9135
OPT
IC9103
MAX17113ETL+
MINI_LVDS
DEV
EAN60924401
14
16
FBN15REF
DEL1
REF
VGL_FB
100V
C9138
C9139
1uF 50V
17
FB218BST19LX220LX2
C9137
0.1uF
50V
GIP
C9137-*1
2200pF
50V
NON_GIP
VCC_LCM
(+3.3V)
R9108
100
GIP
R9109
3K
GIP
FLK
EP[VGOFF]
A9
1
THERMAL
A8
2
29
A7
3
R9110
22
GIP
4
5
6
7
IC9101
MAX17119DS
EAN60987201
9A110
8
A2
C9104
1uF
50V
GIP
GIP
DEV
GON111GOFF12GON2
R9111
10
GIP
VGL
(-5V)
A6
A5
A4
A3
VGH
R9105
22
GIP
GND24RE25FLK326FLK227FLK128VSENSE
23
13Y114
YDCHG
22
Y2
DISCHG
R9113
10K
GIP
Y9
21
Y8
20
Y7
19
Y6
18
Y5
17
Y4
16
Y3
15
R9114
R9115
C9107
1uF
50V
GIP
OPT
OPT
R9116
10
10
GIP
GIP
VGH
(+25V)
VDD_ODD
VDD_EVEN
VST
CLK6
CLK5
CLK4
CLK3
CLK2
CLK1
[POWER Block]
* Voltage Target
VDD_LCM = 16.25V
VGH = 28.50V
VGL = -5.35V
VGH
(+25V)
4.7uF/50V(3216)
R9125
18K
MINI_LVDS
C9112
4.7uF
50V
R9124
18K
GIP
47k-ohm
NCP18WB473F10RB
Value should
be checked
D9100
MMSD4148T1G
100V
R9129
56K 1%
TH9000
TCON_42_FHD
R9130
220K 1%
TCON_42_FHD
R9131
11K 1%
TCON_42_FHD
R9156
150K
1%
TCON_42_FHD
33K
0
0
0
0
R9155
510
NON_GIP
NON_GIP
OPT
R9151
0
TCON_42_FHD
GIP
GIP
NON_GIP
R9158
0
GIP
D9102
KDS226
C
AC
A
R9157
75K
1%
GPGND
THR
DRVP
GND2
SRC
GON
DRN
MODE
DLP
FBP
NON_GIP
C9127
1uF
50V
TCON_42_FHD
C9128
1000pF
50V
GIP
R9167
0
R9168-*1
VGH
(+25V)
R9152
R9153
R9154
R9150
R9148
NON_GIP
C9125 68pF
C9126 0.047uF
VGH_FB
R9149
0
NON_GIP
C9128-*1
470pF
50V
NON_GIP
NON_GIP
NON_GIP
VCC_LCM
(+3.3V)
VDD_LCM
(+16V)
R9146
33K
NON_GIP
R9147
R9147-*1
2.7K
0
NON_GIP
C9122
0.47uF
C9118
10uF
16V
25V
GIP
R9148-*1
0
GIP
R9155-*1
0
GIP
C9123
1uF
10V
REF
TCON_42_FHD
R9144
1%
27K
VGL_FB
R9145
1%
150K
TCON_42_FHD
VGH_M
(+25V)
510
C9124
1uF
50V
EN2
OPT
VGH_FB
C9116
1uF
50V
R9132
0
R9133
10
GIP
R9133-*1
200
NON_GIP
GIP
C9117
1uF
50V
R9134
10
R9134-*1
200
NON_GIP
VGL
(-5V)
D9101
KDS226
C
A
VDD_LCM
(+16V)
R9135
3.6K
AC
EN2
0.1uF
To reduce
50V
Audible noise
C9141
47uF
25V
D9106 MBRA340T3G
D9104 MBRA340T3G
R9169
2.2
PGND32LX133LX134SW135SW036FB137COMP38PGOOD39CRST40AGND
31
PGND
30
EN2
29
VL
28
DEL2
27
EN1
26
FSEL
25
VIN
24
IN2
23
IN2
22
OUT
21
C9140
0.1uF
50V
D9105
MBRA340T3G
40V
DPM
C9144
0.1uF
50V
L9101
22UH
2.8A
R9170
C9145
1000pF
C9143
0.1uF
50V
10
To reduce
Audible noise
360
R9194
360
OPT
C9154
OPT
C9155
22uF
25V
VCC_LCM
(+3.3V)
C9153
100uF
25V
PANEL_VCC
(+12V)
R9181
5.1K
C9148
22uF
25V
C9149
22uF
10V
PANEL_VCC
R9173
1K
R9174
OPT
EN2
C9150
1uF
50V
C9145-*1
560pF
50V
NON_GIP
(+12V)
R9180
C9152
1uF
10V
C9151
0.1uF
50V
C9142
1uF
50V
L9102
22UH
2.8A
50V
GIP
EN2
R9171
0
C9147
1uF
50V
C9146
150pF
50V
R9172
1K
C9162
22uF
25V
VDD_LCM
(+16V)
R9182
9.1K
1/8W
CHECK Value!!
C9100
0.1uF
50V
VCC_LCM
(+3.3V)
SDA3_3.3V
VCOM
VCOM_FB0
VCOM
R9100
33
AGND_AMP
SDA
A0
DVDD
VCOM
SCL3_3.3V
33
R9103
EP[GND]
1
THERMAL
2
21
IC9100
3
MAX9668ETP+
4
MINI_LVDS
5
7
6
VCOM_FB
AVDD_AMP
OPT
TCON_42_FHD
R9101 1K
R9104 1K
1%
VCOMRFB
VCOMLFB
VCOM_FB0
TCON_42_FHD
1%
R9102
1K
R9106
0
R9107
0
GMA16
DEV
C9103
0.1uF
50V
GMA15
8
AVDD_1
AVDD_2
NC_218GMA719GMA820SCL
16
17
9
NC_110GMA1
15
14
13
12
11
VCOMR
VCOML
GMA6
GMA5
GMA4
GMA3
GMA2
VDD_LCM
To reduce
Audible noise
1uF/50V(2012)
C9106
1uF
50V
MINI_LVDS
C9105
0.1uF
50V
For P-Gamma Data Download
P9100
12505WS-03A00
(+16V)
R9112
10
1/8W
GMA13
GMA12
GMA7
GMA6
GMA4
GMA3
1
2
3
4
SCL3_3.3V
SDA3_3.3V
[HVDD Block]
VDD_LCM
(+16V)
OPT
BLM18PG121SN1D
10uF/25V(3216)
C9108
47K
OPT
10uF
25V
R9118
10K
OPT
R9196 24K
D9107 100V
MMSD4148T1G
VDD_LCM
(+16V)
R9117
EN2
PANEL_VCC
(+12V)
L9104
MINI_LVDS
PANEL_VCC
R9119
20K
R9120
7.5K
L9103
BLM18PG121SN1D
MINI_LVDS
C9109
10uF
25V
C9110
1uF
25V
PGND_1
VIN_1
VIN_2
EN
1
DEV
2
IC9102
3
TPS62110RSAR
MINI_LVDS
4
EAN60985901
5
6
LBO
SYNC8VINA
6.8uH/1.8A
(6x6x2mm)
SW_115SW_216PGND_2
7
LBI
L9100
6.8uH
DEV
MINI_LVDS
R9121
0
GIP
13PG14
12
11
10
9
R9122
10
GND_2
GND_1
FB
AGND
C9111
R9123
1M
NON_GIP
TCON_42_FHD
1uF
50V
R1
C9113
R9126
510K
TCON_42_FHD
22pF
50V
R2
R9127
R9128
150K
200K
Vo = 1.153*(1+R1/R2)
C9114
22uF
16V
TCON_42_FHD
C9115
10uF
16V
HVDD
R9193
6.2K
OPT
R9195
6.2K
OPT
Signal Name Change
RXA3-
RXD4-
RXD4+
DISCHG
10
VGH
(+25V)
VGL
(-5V)
(-5V)
VGL
R9137
R9136
NON_GIP
R9139 0
0
R9138
0
VCC_LCM
(+3.3V)
NON_GIP
GIP
R9140 0
GIP
R9141
0
R9142
0
OPT
R9143
3.3K
GIP
C9119
15pF
50V
C9120
15pF
50V
C9121
15pF
50V
FLK
VGI_P
VGI_N
VGL_I
POL
SOE
RXD3-
RXD3+
RXDCK+
RXDCK-
GVDD_ODD
GVDD_EVEN
GSP_R
R9159
0
R9160
0
NON_GIP
R9161
0
R9162
0
R9163
0
GIP
R9164
0
GIP
VCC_LCM
(+3.3V)
C9129
15pF
50V
NON_GIP
R9197
3.3K
NON_GIP
C9130
15pF
50V
NON_GIP
C9131
15pF
50V
NON_GIP
C9132
15pF
50V
C9133
15pF
50V
OPT
OPT
GSP/GVST_I
GOE/GCLK1_I
GSC/GCLK3_I
GVDD_ODD_I
GVDD_EVEN_I
GCLK2
GCLK4
RXA4-
RXA4+
DPM_A
R9175
0
GIP
R9176
0
GIP
R9177
0
R9178
0
R9179
GCLK2_I
C9156
15pF
50V
OPT
C9157
15pF
50V
GIP
GIP
0
C9158
15pF
50V
C9159
15pF
50V
C9160
15pF
50V
GCLK4_I
OPT
GCLK5_I
OPT
GCLK6_I
OPT
DPM
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
COMMON
T-Con (NO L.D.)
09/09/10
91
32_FHD
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
VGH
R9129-*1
22K
1%
TCON_32_FHD
R9131-*1
11K
1%
TCON_32_FHD
R9130-*1
220K
1%
TCON_32_FHD
VGL
R9144-*1
51K
1%
TCON_32_FHD
R9145-*1
270K
1%
TCON_32_FHD
37_FHD
VGH
R9129-*2
47K
1%
TCON_37_FHD
R9131-*2
12K
1%
TCON_37_FHD
R9130-*2
220K
1%
TCON_37_FHD
VGL
R9144-*2
20K
1%
TCON_37_FHD
R9145-*2
150K
1%
TCON_37_FHD
42_FHD
VGH
91 or 95
Sheet
VGL
91 or 95
Sheet
VDD
R9156-*1
150K
1%
TCON_32_FHD
R9157-*1
27K
1%
TCON_32_FHD
VCOM FEED BACK
R9101-*1
1K
1%
TCON_32_FHD
R9102-*1
1K
1%
TCON_32_FHD
47_FHD
VGH
R9129-*3
51K
1%
TCON_47_FHD
R9131-*3
11K
1%
TCON_47_FHD
VDD
R9156-*3
180K
1%
TCON_47_FHD
R9157-*3
75K
1%
TCON_47_FHD
R9165 OPEN
R9166-*1
24K
1%
TCON_32_FHD
R9104-*1
1K
1%
TCON_32_FHD
R9130-*3
220K
1%
TCON_47_FHD
R9165 OPEN
R9166-*3
20K
1%
TCON_47_FHD
HVDD
R9126-*1
510K
1%
TCON_32_FHD
R9127-*1
150K
1%
TCON_32_FHD
VGL
R9144-*3
51K
1%
TCON_47_FHD
R9145-*3
270K
1%
TCON_47_FHD
HVDD
R9126-*3
510K
1%
TCON_47_FHD
R9127-*3
150K
1%
TCON_47_FHD
R9128-*1
200K
1%
TCON_32_FHD
R9128-*3
220K
1%
TCON_47_FHD
VDD
R9156-*2
910K
1%
TCON_37_FHD
R9157-*2
56K
1%
TCON_37_FHD
VCOM FEED BACK
R9101-*2
1K
1%
TCON_37_FHD
R9102-*2
1.5K
5%
TCON_37_FHD
55_FHD
VGH
R9129-*4
510K
1%
TCON_55_FHD
R9131-*4
27K
1%
TCON_55_FHD
VDD
R9156-*4
150K
1%
TCON_55_FHD
R9157-*4
75K
1%
TCON_55_FHD
R9165-*2
470K
1%
TCON_37_FHD
R9166-*2
56K
1%
TCON_37_FHD
R9104-*2
1K
1%
TCON_37_FHD
R9130-*4
68K
1%
TCON_55_FHD
R9165 OPEN
R9166-*4
15K
1%
TCON_55_FHD
HVDD
R9126-*2
470K
1%
TCON_37_FHD
R9127-*2
91K
1%
TCON_37_FHD
VGL
R9144-*4
27K
1%
TCON_55_FHD
R9145-*4
150K
1%
TCON_55_FHD
HVDD
R9126-*4
180K
1%
TCON_55_FHD
R9127-*4
68K
1%
TCON_55_FHD
R9128 OPEN
R9128-*4
56K
1%
TCON_55_FHD
VDD
91 or 95
Sheet
VCOM FEED BACK
91 or 95
Sheet
HVDD
91 or 95
Sheet
VCOM FEED BACK
R9101-*3
1K
1%
TCON_47_FHD
R9102-*3
1K
1%
TCON_47_FHD
R9104-*3
1K
1%
TCON_47_FHD
VCOM FEED BACK
R9101 OPEN
R9102-*4
0
5%
TCON_55_FHD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
R9104 OPEN
Common
T-Con Power Option
09/12/15
98