LG 50PX950-AA Schematic

PLASMA TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : PA02B
MODEL : 50PX950 50PX950-AA
Internal Use Only
Printed in Korea
P/NO : MFL63289209(1008-REV00)
- 2 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION..................................................................................................6
BLOCK DIAGRAM....................................................................................................................11
EXPLODED VIEW ..................................................................................................................12
SVC. SHEET ................................................................................................................................
- 3 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.
It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument's exposed METALLIC PARTS
Good Earth Ground such as WATER PIPE, CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF
- 4 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement
.
V Application Range
This spec is applied to PDP TV used PA02B Chassis.
V Specification
Each part is tested as below without special appointment. (1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5 (2) Relative Humidity: 65 % ± 10 % (3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
SBOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.
V Test Method
(1) Performance : LGE TV test method followed. (2) Demanded other specification
Safety: CE, IEC specification EMC : CE, IEC
V Module Specification
(1) 50” 3D FHD
50PX950-AA Australia, New Zealand LG
Model Name Market Place Brand
Model Name
50PX950-AA
Remark
Safety : IEC/ EN60065, EMI : CISPR13
Market
Australia, New Zealand
No Item Specification Remark
1 Display Screen Device 127 cm (50 inch) wide Color Display Module PDP 2 Aspect Ratio 16:9 3 PDP Module PDP50R103##,
RGB Closed (Well) Type, Glass Filter (43%) 3D module Pixel Format: 1920 horiz. By 1080 ver.
4 Operating Environment 1) Temp. : 0 deg ~ 40 deg
2) Humidity : 20 % ~ 80% LGE SPEC
5 Storage Environment 3) Temp. : -20 deg ~ 60 deg
4) Humidity : 10 % ~ 90 %
6 Input Voltage AC 100 V ~ 240 V, 50 / 60 Hz Maker LG
- 5 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
V Model General Specification
No Item Specification Remark
1 Market 50/60PX950-AA New Zealand, Austrailia *DTV Region:
Australia/New Zealand(AU),
2 Broadcasting system 1) PAL/SECAM-B/G/D/K Australia, India : only PAL
2) PAL-I/II, Singapore : Except NTSC M
3) NTSC M ATV market : Except DVB-T
4) DVB-T
3 Receiving system Analog : Upper Heterodyne
Digital : COFDM 4 Video Input (2EA) PAL, SECAM, NTSC 5 Component Input (2EA) Y/Cb/Cr, Y/ Pb/Pr 6 RGB Input RGB-PC Analog (D-Sub 15Pin) 7 HDMI Input (4EA) HDMI-PC HDMI1/DVI 1,2,3,4
HDMI-DTV Upper 70 tool, But under 60 tool HDMI 3EA. 8 Audio Input (5 EA) RGB/DVI Audio, Component, AV L/R Input 9 SPDIF Out(1 EA) SPDIF Out
10 USB(2.0) For SVC, S/W Download, X-Studio, DivX 11 Bluetooth Bluetooth Phone(JPEG, MP3), Profile : A2DP,BIP,FTP,GAVDP,HSP, OPP
Bluetooth Headset(mono, stereo) Only 50/60PK*50R-TA
12 Ethernet LAN
- 6 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This spec sheet is applied to all of the PA02B chassis.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative humidity if there is no specific designation.
(4) The input voltage of the receiver must keep 100 V ~ 240
V, 50 / 60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over 15 °C
- In case of keeping module is in the circumstance of 0 °C, it should be placed in the circumstance of above 15 °C for 2 hours
- In case of keeping module is in the circumstance of below
-20 °C, it should be placed in the circumstance of above 15 °C for 3 hours,.
O After RGB Full White in HEAT-RUN Mode, the receiver
must be operated prior to the adjustment.
O Enter into HEAT-RUN MODE
1) Press the POWER ON KEY on R/C for adjustment.
2) OSD display and screen display PATTERN MODE.
- Set is activated HEAT run without signal generator in this mode.
- Single color pattern ( WHITE ) of HEAT RUN MODE uses to check panel.
- Caution : If you turn on a still screen more than 20 minutes (Especially digital pattern, cross hatch pattern), an after image may be occur in the black level part of the screen.
3. MAC Address.
* Connect TV SET and PC which download MAC Address
Writing program by RS232C-Cable
(1) Start “MAC+CIKeyl.exe”Program and Click (3) Button to
connect TV and PC. (2) Click (4) to download MAC Address. (3) When download succeed, you can see “OK” on (6)
* Each Chassis has it’ own MAC Address. Please be careful of
download.
3-2. Ping TEST
* This test is to check Network operation. (1) Press "Po w e r on" butt o n of a s e rvice R/C.(Baud rate :
115200 bps) (2) Connect RS232-C Signal Cable. (3). Connect LAN cable to MAIN PCB Assembly. (4) When network operates normally, you can see “OK”.
3-3. ADC Adjustment
O Auto-control adjustment protocol(RS-232C)
(1) Adjustment of RGB
1) Convert to PC in Input-source.
2) Signal equipment displays Output Voltage: 700 mVp-p
Impress Resolution XGA (1920 x 1080 @ 60Hz)
Model : 225 in Pattern Generator Pattern : 65 in Pattern Generator
(MSPG-925 SERISE)
3) Adjust by commanding AUTO_COLOR_ADJUST
(2) COMPONENT input ADC
V Convert to Component in Input-source. V Signal equipment displays
Impress Resolution 480i
MODEL: 209 in Pattern Generator(480i Mode) PATTERN : 65 in Pattern Generator
(MSPG-925 SERISE)
Impress Resolution 1080i
MODEL: 225 in Pattern Generator(1080P Mode) PATTERN: 65 in Pattern Generator
(MSPG-925 SERISE)
3-4. Insert Tool OPTION
and Model Name download.
(1) Press IN_START key on R/C to insert Tool OPTION (2) On the “ Tool Option ”, Insert Tool Option by a number key (3) Press the ENTER(
V)
(4) Press ENTER(
V) again.
(5) Select “OK to Download” by using
F/G(VOL +/-) and press
G(VOL +)
1) 50/60PX950-AA
3-5. EDID(The Extended Display
Identification Data) download
(1) Press the ADJ KEY on R/C and enter EZ ADJUST. (2) Select “5.EDID D/L” by using
D/E(CH +/-) and press
ENTER(
V).
(3) Select “Start” and press navigation key(
G).
(4) EDID download is executed automatically. (5) Press EXIT key on R/C
* Caution
- Never connect HDMI & D-sub Cable when the user download EDID .
V Use the proper cables below for EDID Writing.
* Edid data and Model option download(RS232)
* EDID DATA
(1) Analog RGB
- 7 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Model Tool Tool Tool Tool Tool
Name Value 1 Value 2 Value 3 Value 4 Value 5 50PX950-AA 37536 31831 54920 24940 2866 60PX950-AA 49824
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
(2) HDMI 1
a. Vender ID
3-6. Confirmation
(1) Press ‘InStart’ Key on Factory SVC Remote Controller.
And MUST check ADC & EDID ADJ status is OK.
4. SET assembly adjustment method
* Caution : Each PCB assembly must be checked by check JIG
set. (Because power PCB Assembly damages to PDP Module, especially be careful)
4-1.POWER PCB Assembly Voltage
adjustment (Va/Vs Voltage Adjustment)
Test equipment : D.M.M 1EA Connection Diagram for Measuring : refer to fig.4 Adjustment method
(1) Va adjustment
1) Connect + terminal of D. M.M. to Va pin of P811, connect -terminal to GND pin of P811.
2) After turning VR901,voltage of D.M.M adjustment as same as Va voltage which on label of panel right/top (deviation; ±0.5V)
(2) Vs adjustment
1) Connect + terminal of D. M..M. to Vs pin of P811, connect -terminal to GND pin of P811.
2) After turning VR951, voltage of D.M.M adjustment as same as Vs voltage which on label of panel right/top ( deviation ; ±0.5V)
4-2. Download Serial number (RS-232C)
V Press “Power on” key of service R/C.
(Baud rate : 115200 bps)
V Connect RS232 Signal Cable to RS-232 Jack. V Write Serial number by use RS-232. V Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below ‘6.SET INFORMATION’).
4-3. Adjustment of White Balance
Required Equipment
O Remote controller for adjustment O Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same
produc: CH 10 (PDP)
* Please adjust CA-210, CA-100+ by CS-1000 before
measuring
O Auto W/B adjustment instrument(only for Auto adjustment) O 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B
EQUIPMENT.
Before Adjust of White Balance, Please press POWER ONLY key
Adjust Process will start by execute RS232C Command.
O Color temperature standards according to CSM and Module
O CS-1000/CA-100+/CA-210(CH 10) White balance
adjustment coordinates and color temperature.
* Manual W/B process (using adjusts Remote control)
Please Adjust in AV 1 MODE, Turn off Energy Saving Mode.
(1) Enter ‘PICTURE RESET’ on Picture Mode, then turn off
Fresh Contrast and Fresh colour in Advanced Control (2) After enter Service Mode by pushing “ADJ” key, (3) Enter White Pattern off of service mode, and change off ->
on. (4) Enter “W/B ADJUST” by pushing “
G” key at “3. W/B
ADJUST”.
INOUT HEX HDMI1 10 HDMI2 20 HDMI3 30 HDMI4 40
INOUT C/S
RGB 3E HDMI1 C62C HDMI2 C61C HDMI3 C60C
HDM4 C6FC
CSM PLASMA
Cool 11000K
Medium 9300K
Warm 6500K
CSM
Color Coordinate
Temp ±Color Coordinate
xy
Cool 0.276 0.283 11000K 0.002
Medium 0.285 0.293 9300K 0.002
Warm 0.313 0.329 6500K 0.002
- 9 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
* Gain Max Value is 192. So, Never make any Gain Value over
192 and please fix one Value on 192, between R, G and B.
* Auto-control interface and directions
(1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10ux).
(2) Measure and adjust after sticking the Color Analyzer (CA-
100+, CA210 ) to the side of the module.
(3) Aging time
After aging start, keep the Power on (no suspension of power supply) and heat-run over 5 minutes
4-4. Serial number download & Model
name D/L and Check Tool Option.
(1) Press "Power on" button of a service R/C.(Baud rate :
115200 bps)
(2) Connect RS232-C Signal Cable and start ‘Option Check
Program Ver3.8’ (3) Scan serial Number and press ‘F5’ button. (4) Check ‘OK’ on program (1) program. (5) Press ‘In start’ button on SVC R/C, check Serial Number
and Model Name.
4-5. Checking the EYE-Q Operation.
(1) Press the EYE Key on the adjustment remote controller. (2) Check the Sensor DATA ( It must be under 10) and keep
the data longer than 1.5s (3) Check ‘OK’
(Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12) * IF you press IN-STAP Button, change Green Eye-check OSD.
4-6. Ping TEST
* This test is to check Network operation.
(1) Connect LAN cable from Computer to TV Set (2) When network operates normally, you can see “OK” on
Computer
5. 3D Function Test
(Pattern Generator MSPG-3233, HDMI mode NO. 371 ,
pattern No. 81)
(1) Please input 3D test pattern like below
(2) Enter 3D mode , then select side by side
(If you don’t wear a 3D Glasses, you will see the picture like below)
(3) Put on the 3D Glasses, And block the right side of Glasses
(LEFT:OPEN[TEST], RIGHT:CLOSED) And check the middle sides of picture , RED -> normal , others -> abnormal
(4) Put on the 3D Glasses, And block the right side of Glasses
(LEFT:CLOSED, RIGHT:OPEN[TEST]) And check the middle sides of picture , BLUE -> normal , others -> abnormal
Min Tpy Max R-GAIN 0 192 192 G-GAIN 0 192 192
B-GAIN 0 192 192
- 10 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
6. 2D to 3D convert inspection
(1) Input Combination Pattern like below in HDMI Input
(2) Enter the Swap Button(Yellow Color) like below.
* When you enter the swap button. Depth value is set to
Maximum value(20) automatically
Enter the ETC Key Before using the swap button
(3) Check the separated line in the SET
7. Set Information (Serial No & Model name)
7-1. Check the serial number
& Model Name
(1) Push the menu button in DTV mode. (2) Check the Serial Number
Select the STATION -> Diagnostics -> To set
8. SW Download Guide.
* Before put a *.epk to USB Stick make ‘LG_DTV’ folder in USB.
Then, put *.epk file to ‘LG_DTV’ folder and Turn on TV
(1) Put the USB Stick to the USB socket (2) Automatically detecting update file in USB Stick
* If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB data is automatically detecting.
(3) Show the message “Copying files from memory” (4) Updating is staring. (5) Updating Completed, The TV will restart automatically.
After turn on TV, Please press ‘IN-STOP’ button on ADJ Remote-control. * IF you don’t have ADJ R/C, enter ‘Factory Reset’ in
OPTION MENU.
(6) When TV turn on, check the Updated version on
Diagnostics MENU.
- 11 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
- 12 -
LGE Internal Use Only
EXPLODED VIEW
Copyright ©2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
305
570
207
203
202
303
602
501
560
400
208
580
300
120
200
209
601
520
604
204
201
206
205
240
301
302
304
590
521
900
910
310
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
LV1
A12
LV2
A10
A9
A13
A21
A2
A7
NAND FLASH MEMORY 4G BIT FOR BBTV
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
IC102-*1
TC58NVG2S3ETA00
NC_1
NC_29
1
C105
VCC
8
WP
7
SCL
6
SDA
5
NC_2
2
NC_3
3
NC_4
4
NC_5
5
NC_6
6
RY/BY
7
RE
8
CE
9
NC_7
10
NC_8
11
VCC_1
12
VSS_1
13
NC_9
14
NC_10
15
CLE
16
ALE
17
WE
18
WP
19
NC_11
20
NC_12
21
NC_13
22
NC_14
23
TOSHIBA_4G_NAND
48
NC_28
47
NC_27
46
NC_26
45
I/O8
44
I/O7
43
I/O6
42
I/O5
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O4
32
I/O3
31
I/O2
30
I/O1
29
NC_19
28
NC_18
27
NC_17
26
NC_1624NC_15
25
NAND_DATA[0-7]
NAND_RB
NAND_RE
NAND_CE
NAND_CLE
NAND_ALE
NAND_WE
FLASH_WP
SYSTEM EEPROM
B
BCM REVIEW
2.7KR4
2.7KR5
C
Q100 KRC103S
E
4.7KR3
IC106
M24M01-HRMN6TP
NC
1
E1
2
STM_1M_EEPROM
E2
3
VSS
A8’h‘
4
D3.3V
10K
R8
Open Drain
C101
VCC
8
WP
7
SCL
6
SDA
5
0.1uF
D3.3V
VDD_1
VSS_1
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
+3.3V_MULTI
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
RB
CL
AL
W
WP
R
E
NAND04GW3B2DN6E
1
NUMONYX_4G_NAND
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
C102
0.1uF
22R18
22R19
IC102
READY
R20 0
R21 10K
SCL0_3.3V
SDA0_3.3V
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
FLASH_WP
NC_29
NC_28
NC_27
NC_26
I/O7
I/O6
I/O5
I/O4
NC_25
NC_24
NC_23
VDD_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
NAND_DATA[7]
NAND_DATA[6]
NAND_DATA[5]
NAND_DATA[4]
D3.3V
C104
10uF 6.3V
0.1uF
NAND_DATA[3]
NAND_DATA[2]
NAND_DATA[1]
NAND_DATA[0]
GND
AT24C1024BN-SH-T
NC
1
A1
2
A2
3
4
IC106-*1
ATMEL_1M_EEPROM
RESET
+3.3V_MULTI
SW102
SKHMPWE010
12
FOR DEBUG
5
43
10K
R9
RESETB_BCM3556
0
R89
C103
0.1uF
READY
16V
RESET_OUTB
UART BYPASS(WIRED OR)
BCM_RX RS232C_RXD
NEC_RXD
BCM_TX RS232C_TXD
NEC_TXD
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Boot Strap
22R73
22R72
NAND_DATA[0-7]
NAND_ALE
NAND_CLE
MODEL OPTION
IF_AGC_SEL
BT_ON/OFF
0R75
0R74
NAND_DATA[0]
NAND_DATA[1]NAND_DATA[1]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[6]NAND_DATA[6]
NAND_DATA[7]
MODEL OPTION
PIN NAME
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
PIN NO.
G19
C5
F7
B6
E18
D18
D3.3V
R46
2.7K
READY
R58
READY
READY
2.7K
R55
2.7K
R56
2.7K
R59
2.7K
R60
2.7K
R57
2.7K
R61
2.7K
R62
2.7K
R63
2.7K
R47
2.7K
READY
R50
2.7K
READY
R48
2.7K
R41
2.7K
READY
R42
2.7K
READY
R43
2.7K
R44
2.7K
READY
R45
2.7K
READY
R49
2.7K
D3.3V
1K
1K
1K
1K
FHD
AUS
R51
R53
READY
1K
AUS
R64
R66
R68
READY
100R37
100R40
1K
1K
1K
EU
READY
R65
R67
R69
READY
1K
1K
HD
READY
R52
R54
LOWHIGH
FRC
BRAZIL&AUS
NO FRC
EURO
NOT USE
FHD
XGA
EURO&AUS
HD
WXGA
BRAZIL
NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash 1 : Boot From NAND Flash
NAND_IO[1] : NAND Block 0 Write (0)
NAND_IO[3:2] : NAND ECC (1,0)
NAND_IO[6:5] : Xtal Bias Control (1,0)
NAND_IO[7] : MIPS Frequency (0)
NAND_CLE
0 : Enable D2CDIFF AC (Dns)
1 : Disable D2CDIFF AC
0 : Enable Block 0 Write 1 : Disable Block 0 Write
00 : No ECC 01 : 1 ECC Bit 10 : 4 ECC Bit 11 : 8 ECC Bit
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
00 : 1.2mA 01 : 1.8mA
10 : 2.4mA (Recommand)
11 : 3.0mA
0 : 405MHz 1 : 378MHz
NAND_ALE : I2C Level (0)
0 : 3.3V Switching
1 : 5V Switching
1K
R70
READY
MODEL_OPT_0 MODEL_OPT_1 MODEL_OPT_2 MODEL_OPT_3
MODEL_OPT_4 MODEL_OPT_5
1K
READY
R71
PDP CHASSIS OPTION
MODEL_OPT_1
MODEL_OPT_5 0
BRAZIL
D3.3V
4.7K
R82
NAND_DATA[0-7]
NAND_CE
NAND_ALE
NAND_RE
NAND_CLE
NAND_WE
NAND_RB
D3.3V
2.7KR78
NAND_DATA[0] NAND_DATA[1] NAND_DATA[2] NAND_DATA[3]
2.7KR80
NAND_DATA[4] NAND_DATA[5] NAND_DATA[6] NAND_DATA[7]
D3.3V
1.2KR83
1.2K
R84
1.2KR85
READY
1.2K
R86
EURO
AUSTRALIA
1
0
1
1
1
* I2C MAP
* I2C_1 : TUNER, NVRAM
* I2C_2 : NEC_SUBMICOM, (USB_HUB)
* I2C_3 : HDMISW, AMP, WIRELESS * I2C_4 : MODULE
R88
1.2KR87
1.2K
READY
LGE3556CP (C0 3D PIP)
J23
J24 H25 H24 H23
J25
F26
H28
J26 H27 G26
J27
J28
F27 G24 H26
R96
G27
33
G28 K23 G25
U24 T26 T27 U26 U27 V26 V27 V28 T24 R23 T23 T25 R24 U25
W24
U23 V23 V24
SCL0_3.3V SDA0_3.3V
SCL2_3.3V SDA2_3.3V
SCL3_3.3V SDA3_3.3V
NEC SUB MICOM
RESET_NEC
NEC_ISP_TXD
NEC_ISP_RXD
OCD1A
AT24C16BN-SH-B
NC_1
NC_2
NC_3
GND
ATMEL_16K_EEPROM
OCD1B
IC104-*1
1
2
3
4
R79
47K
ISP Port for SUB MICOM
+3.3V_NEC_ST
FOR DEBUG
10K R11
FLMD0
FOR DEBUG
10K R91
CHECK PIN!!
VCC
8
WP
7
SCL
6
SDA
5
IC104
M24C16-WMN6T
0IMMRSG036B
NC/E0
1
NC
NC/E1
2
E1
1/10W
5%
NC/E2
3
E2
VSS
4
GND
STM_16K_EEPROM
P102
12505WS-12A00
FOR DEBUG
1
2
3
4
5
6
7
8
9
10
11
12
SCL1_3.3V
SDA1_3.3V NEC_EEPROM_SCL NEC_EEPROM_SDA
+3.3V_NEC_ST
VCC
8
VCC
WC
WC
7
SCL
6
SCL
SDA
5
SDA
13
LED_WHITE
MODEL1_OPT_3
MODEL1_OPT_0
RESETB_BCM3556
FLASH_WP
MODEL1_OPT_1
C107
0.1uF
16V
R97 R98
NEC CONFIGURATION
+3.3V_NEC_ST
MICOM MODEL OPTION
AMP_RESET_N
DISP_EN
ERROR_DET
MODEL PWM OPTION
**PK50 : LED_RED
PK70 : LED_RED/LED_BLUE
PK90 : LED_RED/LED_BLUE/LED_BREADING
MODEL OPTION
PIN NAME
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
R26
10K
READY
READY
R23
10K
R24
10K
READY
R25
10K
READY
+3.3V_NEC_ST
10K
R29
READY
LED_PK70 100R27 100R28
0
R77
10K
READY
R30
LED_PK50/LED_PK90
8
11
30
31
HIGH
PK90 PK50/PK70
NOT USE
NOT USE
PK70
PK50/PK90
PIN NO. LOW
10K
R31
10K
R32
NEC_ISP_TXD
NEC_ISP_RXD
OCD1A
OCD1B
10K
R33
READY
10K
READY
R34
10K
R35
LED_PK90
10K
R36
LED_PK50/LED_PK70
MODEL1_OPT_0 MODEL1_OPT_1 MODEL1_OPT_2 MODEL1_OPT_3
IC100
N26
EBI_ADDR3 EBI_ADDR4 EBI_ADDR2 EBI_ADDR1 EBI_ADDR0 EBI_ADDR5 EBI_ADDR6 EBI_ADDR8 EBI_ADDR9 EBI_ADDR13 EBI_ADDR12 EBI_ADDR11 EBI_ADDR10 EBI_ADDR7 EBI_TAB EBI_WE1B EBI_CLK_IN EBI_CLK_OUT EBI_RWB EBI_CS0B
NAND_DATA0 NAND_DATA1 NAND_DATA2 NAND_DATA3 NAND_DATA4 NAND_DATA5 NAND_DATA6 NAND_DATA7 NAND_CS0B NAND_ALE NAND_REB NAND_CLE NAND_WEB NAND_RBB
SF_MISO SF_MOSI SF_SCK SF_CSB
GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08 GPIO_09 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39 GPIO_40 GPIO_41 GPIO_42 GPIO_43 GPIO_44 GPIO_45 GPIO_46 GPIO_47 GPIO_48 GPIO_49 GPIO_50 GPIO_51 GPIO_52 GPIO_53 GPIO_54 GPIO_55 GPIO_56
GPIO_57 SGPIO_00 SGPIO_01 SGPIO_02 SGPIO_03 SGPIO_04 SGPIO_05 SGPIO_06 SGPIO_07
C108
12pF
50V
C111
L26 N25 L25 K27 K28 K24 K26 K25 AA27 AA28 AA26 L1 L3 L2 Y25 Y26 M27 AA25 R25 N28 N27 AH18 P23 M23 AD19 AE19 M4 M5 L23 Y28 Y27 G2 G3 G5 G6 G4 L24 P25 L5 K4 K1 L27 M26 N23 R28 R27 R26 P28 P27 K6 K5 P26 M3 M2 M1 L4 L6 W27 W28 W26 W25 J2 J1 K3 K2
12pF
10MHz
50V
X100
FPGA_D/L
R132
R134
R135
R145
R180
100
R114
R136
0
100K
+3.3V_NEC_ST
C110
0.1uF
READY
C109
0.1uF
P60/SCL0
22 22
1
P61/SDA0
2
P62/EXSCL0
3
P63
4
P33/TI51/TO51/INTP4
5
P75
6
UPD78F0513AGA-GAM-AX
P74
7
P73/KR3
8
P72/KR2
9
P71/KR1
10
P70/KR0
11 12
13
REGC47VSS48VDD
46
14
15
P121/X1/OCD0A
45
16
5V_ON
OCD1B
R110
10K
10K
10K
R104
R101
10K
R109
R105 R106
P32/INTP3/OCD1B
P30/INTP1
P17/TI50/TO50
P16/TOH1/INTP5
P31/INTP2/OCD1A
NEC_EEPROM_SCL
22
NEC_EEPROM_SDA
22
OCD1A
IR_NEC
HDMI_CEC
LED_BREATHING
BCM GPIO & NEC MICOM & FLASH & SYS EEPROM
BCM GPIO/NEC MICOM/FLASH/SYS EEPROM
22
R160
R150
22
100R137 100R138
READY
R122
R123
22
0R179
READY
0
READY
0
0
READY
FLMD0
009:E3;009:F1
RTC_TXC
50V 22pF C112
RTC_TXC
32.768KHz X101
R10
4.7M
RTC_TXC
P123/XT1
FLMD044P122/X2/EXCLK/OCD0B
42
43
IC105
17
18
19
P15/TOH0
P13/TXD6
P14/RXD6
22R146
22R142
LED_RED
NEC_ISP_TXD
NEC_ISP_RXD
READY
READY
0R121
READY
IR_INT
IR_IN
0R178
100
100
COMP1_DET
USB2_CTL SCL0_3.3V SDA0_3.3V SCL1_3.3V SDA1_3.3V SCL2_3.3V SDA2_3.3V SCL3_3.3V SDA3_3.3V
RTC_TXC
50V 27pF C113
20
21
22
P12/SO10
P10/SCK10/TXD0
P11/SL10/RXD0
AC_DET
NEC_RXD
0
0
R184
R185
IIC1<->2 SWAP
+3.3V_NEC_ST
RTC_KSD
X101-*1
32.768KHz
WIRELESS_DETECT
WIRELESS_PWR_EN
P120/INTP0/EXLVI
P4139P4040RESET41P124/XT2/EXCLKS
37
38
36 35 34 33 32 31 30 29 28 27 26 25
23
24
+3.3V_NEC_ST
AVSS
AVREF
C114
0.1uF
16V
4.7K
R163
4.7K
R164
NEC_TXD
USB1_OCD
MODEL_OPT_4 MODEL_OPT_5
SIDEAV_DET
HPD4
FLMD0
HPD3
USB2_OCD
MODEL_OPT_1
DSUB_DET BT_RESET /RST_HUB
BCM_RX BCM_TX
MODEL_OPT_0
AUD_MASTER_CLK
HPD1
HPD2
USB1_CTL
EPHY_ACTIVE_Y
EPHY_LINK
MOD_ROM_TX
MOD_ROM_RX
VREG_CTR
TUNER_RESET
5V_HDMI_1
AV1_DET
MODEL_OPT_3
5V_HDMI_3 5V_HDMI_4
MODEL_OPT_2
COMP2_DET
FLASH_WP
DDC_SCL DDC_SDA
USB_EN
LCD_HP_DET
10K
R165
RTC_KSD
50V
15pF
C112-*1
100K
R166
P140/PCL/INTP6 P00/TI000 P01/TI010/TO00 P130 P20/ANI0 ANI1/P21 ANI2/P22 ANI3/P23 ANI4/P24 ANI5/P25 ANI6/P26 ANI7/P27
READY READY
SW100
12
JTP-1127WEM
FOR DEBUG
C1
0.1uF 50V
RTC_KSD
1%
LCD : ERROR OUT(PANEL)
For CI
LCD : MICOM_DOWNLOAD(FLMD0)
LCD : PWM_DIM
R103
0
/3D_FPGA_RESET
L/R_DETECT
R161
0
5V_HDMI_2
R107
0
E_TCK
LCD : AV_CVBS_DET
R112
0
E_TMS
READY
0R186 0R187
READY
R115
0
USB_OCP
LCD : FRC_RESET
43
RESET_NEC
50V
15pF
C113-*1
1%
009:E3;009:F1
120KR176
C
Q101EB 2SC3052
RL_ON
FLMD0
10KR170
SUB_SCL SUB_SDA
MODEL1_OPT_2
INSTANT_BOOT
10KR174 22R168
KEY2
22R169
KEY1
08/10/28
E_TDO
WIRELESS_DL_RX
WIRELESS_DL_TX
E_TDI
KEY1
EDID_WP
1 13
+3.3V_MULTI
BROAD BAND STUDIO
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
FOR DEBUG
P200
TJC2508-4A
1
2
3
4
REAR_AV_L_IN
REAR_AV_R_IN
COMP2_L_IN
COMP2_R_IN
COMP1_L_IN COMP1_R_IN
D3.3V
C200
FOR DEBUG
USB HUB
TP201
TP200
TP204
SIDE_LIN SIDE_RIN
TP203
PC_L_IN PC_R_IN
TP202
AUDIO INCM-TP PLACE NEAR JACKS
4.7uF
A2.5V
BLM18PG121SN1D
R208
1.5K
A3.3V
USB_DM
USB_DP
1.5K
R226
L201
BLM18PG121SN1D
C202 100pF
BT_DM BT_DP
L200
C201
4.7uF
51R220 51R221
5.1R222 51R209 51R210
5.1R211 51R212 51R213
5.1R223 51R214 51R215
5.1R224 51R216 51R217
5.1R218
A1.2V
0.015uFC213
0.015uFC214
0.15uFC215
0.015uFC206
0.015uFC220
0.15uFC222
0.015uFC207
0.015uFC208
0.15uFC225
0.015uFC209
0.015uFC210
0.15uFC227
0.015uFC211
0.015uFC212
0.15uFC216
C203
0.1uF 16V
A2.5V
BLM18PG121SN1D
R238:BCM recommened resistor 562 ohm
R227
3.9K
0.1uFC219
0.1uFC218
BLM18PG121SN1D
BLM18PG121SN1D
L203
0.047uF
0.047uF
0.47uFC238
C240
C242
C235
0.1uFC221
L204
0.047uF
0.47uFC244
0.47uFC230
R228 120
A1.2V
0.047uF
C232
L202
4.7uF
4.7uFC223
C224
0.1uF
0.047uF
C265
C231
C237
0.1uF
C233
0.01uF
0.1uFC226
0.047uF
0.47uFC267
C266
A3.3V
C228
0.1uF
4.7uF
EPHY_RDN
0.047uF
C268
A1.2V
0.1uF
C236
EPHY_RDP
EPHY_TDN EPHY_TDP
0.047uF
0.47uFC270
C269
A2.5V
L210
BLM18PG121SN1D
0.1uF
C241
D3.3V
R235
R236 240
0.1uF
C234
0.047uF
0.047uF
C271
C272
L211
BLM18PG121SN1D
C243
R285
2.7K
2.7K
R237
1K
4.7uF
C239
C273
0.1uF
560R238
AC18
AF20 AG20 AG21
AF19 AD20
AE20 AH22 AH20 AG19
AH21
AA10
AB10 AA11
AB11
A2.5V
D23 C24 B26 A25 B25 A26
G23 D25 D24 C25 E27 E26 D28 D27 D26 E23 E24
F25 C27 C26 B28 B27 A27
F24
F23 E25 C28 A28
M25 M24
AE6
AD7
AF6
AH4 AG5 AG4 AG6
AF7 AE7
AH5 AG7 AH6 AD8
AF8 AE8
AH7 AH8 AG8
AF5
AB9
AC8
AE5
PKT0_CLK PKT0_DATA PKT0_SYNC RMX0_CLK RMX0_DATA RMX0_SYNC
POD2CHIP_MCLKI POD2CHIP_MDI0 POD2CHIP_MDI1 POD2CHIP_MDI2 POD2CHIP_MDI3 POD2CHIP_MDI4 POD2CHIP_MDI5 POD2CHIP_MDI6 POD2CHIP_MDI7 POD2CHIP_MISTRT POD2CHIP_MIVAL CHIP2POD_MCLKO CHIP2POD_MDO0 CHIP2POD_MDO1 CHIP2POD_MDO2 CHIP2POD_MDO3 CHIP2POD_MDO4 CHIP2POD_MDO5 CHIP2POD_MDO6 CHIP2POD_MDO7 CHIP2POD_MOSTRT CHIP2POD_MOVAL
VDAC_AVDD2P5 VDAC_AVDD1P2 VDAC_AVDD3P3_1 VDAC_AVDD3P3_2
VDAC_AVSS_1 VDAC_AVSS_2 VDAC_AVSS_3 VDAC_RBIAS VDAC_1 VDAC_2
VDAC_VREG
BSC_S_SCL BSC_S_SDA
R6
USB_AVSS_1
T6
USB_AVSS_2
R7
USB_AVSS_3
T7
USB_AVSS_4
T8
USB_AVSS_5
R3
USB_AVDD1P2
U3
USB_AVDD1P2PLL
T4
USB_AVDD2P5
T3
USB_AVDD2P5REF
R4
USB_AVDD3P3
U4
USB_RREF
V1
USB_DM1
V2
USB_DP1
U1
USB_DM2
U2
USB_DP2
T5
USB_MONCDR
R5
USB_MONPLL
R1
USB_PWRFLT_1
R2
USB_PWRFLT_2
T2
USB_PWRON_1
T1
USB_PWRON_2
P6
EPHY_VREF
P5
EPHY_RDAC
P3
EPHY_RDN
P2
EPHY_RDP
N3
EPHY_TDN
N2
EPHY_TDP
P1
EPHY_AVDD1P2
P4
EPHY_AVDD2P5
N4
EPHY_PLL_VDD1P2
N1
EPHY_AGND_1
N5
EPHY_AGND_2
P7
EPHY_AGND_3
AUDMX_LEFT1 AUDMX_RIGHT1 AUDMX_INCM1 AUDMX_LEFT2 AUDMX_RIGHT2 AUDMX_INCM2 AUDMX_LEFT3 AUDMX_RIGHT3 AUDMX_INCM3 AUDMX_LEFT4 AUDMX_RIGHT4 AUDMX_INCM4 AUDMX_LEFT5 AUDMX_RIGHT5 AUDMX_INCM5 AUDMX_LEFT6 AUDMX_RIGHT6 AUDMX_INCM6 AUDMX_AVSS_1 AUDMX_AVSS_2 AUDMX_AVSS_3 AUDMX_AVSS_4 AUDMX_AVSS_5 AUDMX_AVSS_6 AUDMX_LDO_CAP AUDMX_AVDD2P5
LGE3556CP (C0 3D PIP)
IC100
LVDS_TX_0_DATA0_P LVDS_TX_0_DATA0_N LVDS_TX_0_DATA1_P LVDS_TX_0_DATA1_N LVDS_TX_0_DATA2_P LVDS_TX_0_DATA2_N LVDS_TX_0_DATA3_P LVDS_TX_0_DATA3_N LVDS_TX_0_DATA4_P LVDS_TX_0_DATA4_N
LVDS_TX_0_CLK_P
LVDS_TX_0_CLK_N LVDS_TX_1_DATA0_P LVDS_TX_1_DATA0_N LVDS_TX_1_DATA1_P LVDS_TX_1_DATA1_N LVDS_TX_1_DATA2_P LVDS_TX_1_DATA2_N LVDS_TX_1_DATA3_P LVDS_TX_1_DATA3_N LVDS_TX_1_DATA4_P LVDS_TX_1_DATA4_N
LVDS_TX_1_CLK_P
LVDS_TX_1_CLK_N
LVDS_PLL_VREG
LVDS_TX_AVDDC1P2 LVDS_TX_AVDD2P5_1 LVDS_TX_AVDD2P5_2
LVDS_TX_AVSS_1 LVDS_TX_AVSS_2 LVDS_TX_AVSS_3 LVDS_TX_AVSS_4 LVDS_TX_AVSS_5 LVDS_TX_AVSS_6 LVDS_TX_AVSS_7 LVDS_TX_AVSS_8
LVDS_TX_AVSS_9 LVDS_TX_AVSS_10 LVDS_TX_AVSS_11
CLK54_AVDD1P2 CLK54_AVDD2P5
CLK54_XTAL_N
CLK54_XTAL_P
CLK54_MONITOR
VCXO_AGND_1 VCXO_AGND_2 VCXO_AGND_3
VCXO_AVDD1P2
VCXO_PLL_AUDIO_TESTOUT
POR_OTP_VDD2P5
PLL_MAIN_AVDD1P2
PLL_MAIN_MIPS_EREF_TESTOUT
PLL_MAIN_AGND
PLL_RAP_AVD_TESTOUT PLL_RAP_AVD_AVDD1P2
PLL_RAP_AVD_AGND
BYP_SYS216_CLK BYP_SYS175_CLK
CLK54_AVSS
PM_OVERRIDE
RESET_OUTB
TMODE_0 TMODE_1 TMODE_2 TMODE_3
SPI_S_MISO
POR_VDD1P2
EJTAG_TCK
EJTAG_TDI EJTAG_TDO EJTAG_TMS
EJTAG_TRSTB
EJTAG_CE0 EJTAG_CE1
BYP_CPU_CLK
BYP_DS_CLK
RESETB
NMIB
B4 A4 C6 B6 B3 A3 A1 A2 D5 D6 C5 B5 B1 B2 C2 C3 D1 D2 E1 E2 E3 E4 D3 D4 F5 F1 F4 F2 C1 F3 C4 A5 E5 E6 D7 E7 F7 G7 H7
AD27 AD28 AD26 AC26 AC27 AE25 Y23
AA23 AB24 AC24 AF25 AF24
P24 F6 N24 J5 J4 J6 J3 V25 AH3 AB8
H4 H3 H2 H1 G1 H6 H5
AB26 AC25 AB27 M6 N6 N7
AA24 Y24 AE24 AD25
C246
10uF
C247
D3.3V
4.7K
R240
READY
0.1uF
C248
R239
390
READY
10uF
1K
54MHz_XTAL_N 54MHz_XTAL_P
BLM18PG121SN1D
BLM18PG121SN1D
R281
C251
1K R241 1K R242
LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_CLK_P
LVDS_TX_0_CLK_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA4_N
LVDS_TX_1_CLK_P
LVDS_TX_1_CLK_N
0.1uF
0.1uF
4.7uF
C252
C254
C257
L206
C250
4.7uF
RESET_OUTB RESETB_BCM3556
A2.5V
L205
C249
0.1uF
C255
0.1uF
4.7uF
C258
C253
0.1uF
A1.2V
0.1uF
A1.2V
C259
C260
4.7uF
A1.2V
A2.5VA1.2V
0.1uF C256
L207
BLM18PG121SN1D
L208
BLM18PG121SN1D
C261
0.1uF
4.7uF
A2.5V
A1.2V
A1.2V
READY
R243
2.7K
R244
2.7K
D3.3V
READY
R245
2.7K
R246
2.7K
LVDS
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
FHD
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
54MHz X-TAL
C262
54MHz_XTAL_N
54MHz_XTAL_P
+3.3V_MULTI
4.7K
R232
4.7K
R230
PC_SER_CLK
MDL_SCL
DISP_EN MDL_SDA
+3.3V_MULTI
4.7K
R234
R250
4.7K
MOD_ROM_TX_MOD
MOD_ROM_RX_MOD
PC_SER_DATA
100
FHD
9
8
7
6
5
4
3
2
1
R253
FHD
R251
0
R252
0
R254
0
R280
0
0R294 0R289
L212
CB4532UK121E
R255
27K
LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA2_P
LVDS_TX_1_CLK_N
LVDS_TX_1_CLK_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA0_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_CLK_N
LVDS_TX_0_CLK_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA0_P
L/R_DETECT
/3D_FPGA_RESET
+5V_MULTI
3D_SYNC_OUT
E_TDI
E_TMS
E_TDO
E_TCK
FPGA_D/L
R247
L209
604
CASE 1 : R = 0 ohm --> CL = 8 pF
CASE 2 : R = 22 Ohm --> CL = 22pF
22
R249
33pF
1008LS-272XJLC
22
R248
005:B6
005:B6
005:B6
005:B6
X200
54MHz
21
3
SCL3_3.3V
SDA3_3.3V
MOD_ROM_RX
MOD_ROM_TX
C263 12pF
12pF
C264
22 R283
22 R284
22 R259
22 R274
MDL_SCL
002:G4
MDL_SDA
MOD_ROM_RX_MOD
MOD_ROM_TX_MOD
002:G4
002:G4
002:G4
C245 10uF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TF05-51S
P201
BCM AUS DVR
BCM AUDIO/LVDS
08/10/27
2 13
TU_IF_AGC_BCM
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
A3.3V
3.9K R394
R397 2K
R396 200
C3000
0.1uF
C3001
4.7uF
C3002 1000pF
C3003
0.01uF
C3004
0.1uF
C3005
10uF
C3006
10uF
D1.2V
C3007 33uF
C3009 1000pF
C3010
0.01uF
C3013
0.1uF
C3016
4.7uF
C3019 1000pF
C3022
0.01uF
C3025
0.1uF
C3028
4.7uF
C3031 1000pF
D1.2V
C3034
0.01uF
C3036
4.7uF
C3039 1000pF
C3042
0.01uF
C3045
0.1uF
C3048
4.7uF
C3051 1000pF
C3054
0.01uF
C3057
0.1uF
D3.3V
C3059
10uF
Place BCM IC Side
COMPONENT
COMP2_Y
COMP2_Pr COMP2_Pb
COMP INCM-TP PLACE NEAR JACKS
CVBS
IF FILTER OPTION
DSUB RGB INCM-TP PLACE NEAR JACKS
DSUB
009:G4
009:G4
009:G5
R300
34
SC RGB INCM-TP PLACE NEAR JACKS
CVBS INCM-TP PLACE NEAR JACKS
TU_SIF
3.9K
0.01uF
R395
C397
DSUB_R
DSUB_G
DSUB_B
75
10pF
R301
C300
READY
SC1_RGB
CONNECT NEAR BCM CHIP
R303
0.1uF
C396
TU_IF_N_BCM
TU_IF_P_BCM
A1.2V
C306
0.1uF
R315
34
R316
34
R314
34
READY
READY
10pFC304
75
75
10pF
R317
C303
34 34 34
34
REAR_AV_IN
SIDEAV_CVBS_IN
A2.5V
R318 10K
R319
12K
R320
75
R32375R325
TU_CVBS
R321
10K
12K
R322
C305
75
75
R305
COMP1_Y COMP1_Pr
COMP1_Pb
R307
34
R311 R312 R313
R310
A2.5V
0.1uF C301
240
R306
C302
0.1uF
120
R304
A2.5V
A1.2V
BLM18PG121SN1D
C307
0.1uF
READY
75R324
10pF
C308
READY
10pF
0.01uF C315
0.01uF C316
BLM18PG121SN1D
L300
C309
0.1uF
L301
A2.5V
BLM18PG121SN1D
BLM18PG121SN1D
75
R330
R308
1%
18
12R309
R359
12
L303
L304 C312 1000pF
R326
751% R327
62
A1.2V
L302
BLM18PG121SN1D
C311
0.1uF
C317
C310
4.7uF
0.1uF
C318 1000pF
62 R328
C313
0.01uF
RGB_HSYNC RGB_VSYNC
C324 C325
C327 C328 C329 C330 C331
C314
4.7uF
C332 C333 C334 C335 C336
C337 C338
C339 C340 C341 C342 C343 C344
C345
C347
0.1uF C319
4.7uF
C320
0.01uF
+5V_MULTI
510 R333
A1.2V
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
READY
R332
LGE3556CP (C0 3D PIP)
510
AG28
DS_AGCI_CTL
AH28
DS_AGCT_CTL
AA21
EDSAFE_AVSS_1
AB22
EDSAFE_AVSS_2
AF26
EDSAFE_AVSS_3
AF27
EDSAFE_AVSS_4
AF28
EDSAFE_AVSS_5
AG27
EDSAFE_AVDD2P5
AE26
EDSAFE_DVDD1P2
AE28
EDSAFE_IF_N
AE27
EDSAFE_IF_P
AD24
PLL_DS_AGND
AB19
PLL_DS_AVDD1P2
AB25
PLL_DS_TESTOUT
AB18
SD_V5_AVDD1P2
AC17
SD_V5_AVDD2P5
AB17
SD_V5_AVSS
AD14
SD_V1_AVDD1P2
AD16
SD_V1_AVDD2P5
AB15
SD_V1_AVSS_1
AC15
SD_V1_AVSS_2
AD13
SD_V2_AVDD1P2
AE13
SD_V2_AVDD2P5
AC13
SD_V2_AVSS_1
AB14
SD_V2_AVSS_2
AC14
SD_V2_AVSS_3
AC12
SD_V3_AVDD1P2
AD12
SD_V3_AVDD2P5
AB13
SD_V3_AVSS_1
AA14
SD_V3_AVSS_2
AC11
SD_V4_AVDD1P2
AD11
SD_V4_AVDD2P5
AB12
SD_V4_AVSS
AD10
SD_R
AC10
SD_INCM_R
AE9
SD_G
AF9
SD_INCM_G
AH9
SD_B
AG9
SD_INCM_B
AG15
SD_Y1
AE15
SD_PR1
AF15
SD_PB1
AH15
SD_INCM_COMP1
AG16
SD_Y2
AF16
SD_PR2
AH17
SD_PB2
AH16
SD_INCM_COMP2
AG14
SD_Y3
AE14
SD_PR3
AF14
SD_PB3
AH14
SD_INCM_COMP3
AH10
SD_L1
AG10
SD_C1
AE10
SD_INCM_LC1
AE11
SD_L2
AF11
SD_C2
AH11
SD_INCM_LC2
AH13
SD_L3
AE12
SD_C3
AF12
SD_INCM_LC3
AD9
SD_CVBS1
AG11
SD_CVBS2
AG12
SD_CVBS3
AF13
SD_CVBS4
AC9
SD_INCM_CVBS1
AF10
SD_INCM_CVBS2
AH12
SD_INCM_CVBS3
AG13
SD_INCM_CVBS4
AF17
SD_SIF1
AG17
SD_INCM_SIF1
AD15
SD_FB
AE16
SD_FS
AE17
SD_FS2
AB16
PLL_VAFE_AVDD1P2
AA15
PLL_VAFE_AVSS
AC16
PLL_VAFE_TESTOUT
AG3
RGB_HSYNC
AF4
RGB_VSYNC
IC100
I2S_CLK_IN
I2S_CLK_OUT
I2S_DATA_IN
I2S_DATA_OUT
I2S_LR_OUT
AUD_LEFT0_N
AUD_LEFT0_P
AUD_AVDD2P5_0
AUD_AVSS_0_1 AUD_AVSS_0_2 AUD_AVSS_0_3 AUD_AVSS_0_4 AUD_AVSS_0_5 AUD_RIGHT0_N AUD_RIGHT0_P
AUD_LEFT1_N
AUD_LEFT1_P AUD_RIGHT1_N AUD_RIGHT1_P
AUD_AVDD2P5_1
AUD_AVSS_1_1 AUD_AVSS_1_2 AUD_AVSS_1_3
AUD_LEFT2_N
AUD_LEFT2_P AUD_RIGHT2_N AUD_RIGHT2_P
AUD_AVDD2P5_2
AUD_AVSS_2_1 AUD_AVSS_2_2
AUD_SPDIF
SPDIF_AVDD2P5
SPDIF_AVSS
SPDIF_IN_N
SPDIF_IN_P
HDMI_RX_0_CEC_DAT
HDMI_RX_0_HTPLG_IN
HDMI_RX_0_HTPLG_OUT
HDMI_RX_0_DDC_SCL HDMI_RX_0_DDC_SDA
HDMI_RX_0_RESREF
HDMI_RX_0_CLK_N
HDMI_RX_0_CLK_P
HDMI_RX_0_DATA0_N
HDMI_RX_0_DATA0_P
HDMI_RX_0_DATA1_N
HDMI_RX_0_DATA1_P
HDMI_RX_0_DATA2_N
HDMI_RX_0_DATA2_P
HDMI_RX_0_VDD3P3 HDMI_RX_0_VDD1P2 HDMI_RX_0_VDD2P5 HDMI_RX_0_AVSS_1 HDMI_RX_0_AVSS_2 HDMI_RX_0_AVSS_3 HDMI_RX_0_AVSS_4 HDMI_RX_0_AVSS_5 HDMI_RX_0_AVSS_6
HDMI_RX_0_PLL_AVSS
HDMI_RX_0_PLL_DVDD1P2
HDMI_RX_0_PLL_DVSS
HDMI_RX_1_CEC_DAT
HDMI_RX_1_HTPLG_IN
HDMI_RX_1_HTPLG_OUT
HDMI_RX_1_DDC_SCL HDMI_RX_1_DDC_SDA
HDMI_RX_1_RESREF
HDMI_RX_1_CLK_N
HDMI_RX_1_CLK_P
HDMI_RX_1_DATA0_N
HDMI_RX_1_DATA0_P
HDMI_RX_1_DATA1_N
HDMI_RX_1_DATA1_P
HDMI_RX_1_DATA2_N
HDMI_RX_1_DATA2_P
HDMI_RX_1_VDD3P3 HDMI_RX_1_VDD1P2 HDMI_RX_1_VDD2P5 HDMI_RX_1_AVSS_1 HDMI_RX_1_AVSS_2 HDMI_RX_1_AVSS_3 HDMI_RX_1_AVSS_4 HDMI_RX_1_AVSS_5 HDMI_RX_1_AVSS_6 HDMI_RX_1_AVSS_7 HDMI_RX_1_AVSS_8 HDMI_RX_1_AVSS_9
HDMI_RX_1_PLL_AVSS
HDMI_RX_1_PLL_DVDD1P2
HDMI_RX_1_PLL_DVSS
I2S_LR_IN
AE18 AF18 AD17 AH19 AD18 AG18 AG26 AH26 AF23 AA20 AB21 AC22 AC23 AD23 AH25 AG25 AH23 AG23 AG24 AH24 AE22 AB20 AC21 AE23 AF21 AE21 AF22 AG22 AD21 AC20 AD22 AH2 AC6 AE4 AF3 AH1
AG1 AA6 AA5 AB3 Y6 AC4 AC1 AC2 AD1 AD2 AE1 AE2 AF1 AF2 AD3 AE3 AC3 AD4 AB5 AB6 AG2 AB4 AA7 Y8 AC5 W8
AA3 V4 U6 V5 V3 W4 W2 W3 Y1 Y2 AA2 AA1 AB2 AB1 Y3 Y4 W5 W1 U5 W6 U7 V7 W7 U8 V8 Y5 V6 AA4 Y7
R344 1K
R345
499 R346
499 R343
READY
C350
0.1uF
10K
C351
4.7uF
R350
SPDIF_OUT
+5V_MULTI
C352 1000pF
10K
10KR351
C354
0.1uF
10K
R353
A3.3V
BLM18PG121SN1D
C355
4.7uF
AUD_SCK
AUD_LRCH
AUD_LRCK
22 R355 22 R356
C356
0.01uF
D3.3V
10K
R354
L307
C357 1000pF
C360
0.01uF
C359
0.01uF
C361
0.01uF
HDMI0_RXC-_BCM HDMI0_RXC+_BCM HDMI0_RX0-_BCM HDMI0_RX0+_BCM HDMI0_RX1-_BCM HDMI0_RX1+_BCM HDMI0_RX2-_BCM HDMI0_RX2+_BCM
C362
0.1uF
C364
10uF
C363
0.1uF
C365
0.01uF
C368
0.1uF
C367
0.1uF
C369
0.1uF
BLM18PG121SN1D
L305
C370
0.1uF
C372
10uF
C374
10uF
C373
10uF
C375
10uF
HDMI_SCL HDMI_SDA
008:AA19 008:AB19 008:AB19 008:AB19 008:AC19 008:AC19 008:AC19 008:AD19
A1.2V
A3.3V
BLM18PG121SN1D
A2.5V
BLM18PG121SN1D
L306
L308
A1.2V
A2.5V
A2.5V
008:AA19 008:AA19
A2.5V
C378
0.1uF 16V
C3011 1000pF
C3012
0.1uF
C3014 1000pF
C389
R363
0.1uF
C3015 1000pF
A3.3V
20
C3018
0.01uF
C3020
C3017
1000pF
1000pF
D1.2V
LGE3556CP (C0 3D PIP)
H8
J8
K8
L8 M8 N8
P8
R8
AA8
H9
H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H21
J21
K21 L21
M21
N21
P21 R21 T21 U21 V21
W21
Y21
AH27
D3.3V
AA12 AA13 AA18 AA19
E28 L28 U28
AB28
D1.8V
A9
G9 G11 G13 A14 G15 G17 A19 G19
C3021
0.1uF
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32 VDDC_33
AGC_VDDO
VDDO_1 VDDO_2 VDDO_3 VDDO_4 VDDO_5 VDDO_6 VDDO_7 VDDO_8
DDRV_1 DDRV_2 DDRV_3 DDRV_4 DDRV_5 DDRV_6 DDRV_7 DDRV_8 DDRV_9
C3024
4.7uF
C3023
0.01uF
IC100
C3027 1000pF
C3026
0.01uF
C3030
0.01uF
C3029
0.01uF
D3.3V
D1.8V
C3032
0.1uF
C3033
0.01uF
C3035
0.1uF
D1.8V
C3047
C3038
0.1uF
C3040
0.1uF
C3044
0.1uF
0.1uF
C3050
4.7uF
C3053
4.7uF
C3056
4.7uF
C3060 33uF
D1.8V
C3043
C3041
C3037
0.1uF
0.1uF 16V
16V
16V
AD5 AD6
J7 K7 L7 M7
AB7 AC7
G8 D9
AA9
G10 A11 L11
M11
N11
P11 R11 T11 U11 V11 D12 G12 L12
M12
N12
P12 R12 T12 U12 V12 L13
M13
N13
P13 R13 T13 U13 V13 G14 L14
M14
N14
P14 R14 T14 U14 V14 L15
M15
N15
P15 R15 T15 U15 V15 A16 G16 L16
M16
N16
C3046
10uF
0.1uF
10V
16V
IC100
LGE3556CP (C0 3D PIP)
DVSS_1 DVSS_2 DVSS_3 DVSS_4 DVSS_5 DVSS_6 DVSS_7 DVSS_8 DVSS_9 DVSS_10 DVSS_11 DVSS_12 DVSS_13 DVSS_14 DVSS_15 DVSS_16 DVSS_17 DVSS_18 DVSS_19 DVSS_20 DVSS_21 DVSS_22 DVSS_23 DVSS_24 DVSS_25 DVSS_26 DVSS_27 DVSS_28 DVSS_29 DVSS_30 DVSS_31 DVSS_32 DVSS_33 DVSS_34 DVSS_35 DVSS_36 DVSS_37 DVSS_38 DVSS_39 DVSS_40 DVSS_41 DVSS_42 DVSS_43 DVSS_44 DVSS_45 DVSS_46 DVSS_47 DVSS_48 DVSS_49 DVSS_50 DVSS_51 DVSS_52 DVSS_53 DVSS_54 DVSS_55 DVSS_56 DVSS_57 DVSS_58 DVSS_59 DVSS_60 DVSS_61
C3049
0.1uF 16V
DVSS_62 DVSS_63 DVSS_64 DVSS_65 DVSS_66 DVSS_67 DVSS_68 DVSS_69 DVSS_70 DVSS_71 DVSS_72 DVSS_73 DVSS_74 DVSS_75 DVSS_76 DVSS_77 DVSS_78 DVSS_79 DVSS_80 DVSS_81 DVSS_82 DVSS_83 DVSS_84 DVSS_85 DVSS_86 DVSS_87 DVSS_88 DVSS_89 DVSS_90 DVSS_91 DVSS_92 DVSS_93 DVSS_94 DVSS_95 DVSS_96 DVSS_97 DVSS_98
DVSS_99 DVSS_100 DVSS_101 DVSS_102 DVSS_103 DVSS_104 DVSS_105 DVSS_106 DVSS_107 DVSS_108 DVSS_109 DVSS_110 DVSS_111 DVSS_112 DVSS_113 DVSS_114 DVSS_115 DVSS_116 DVSS_117
C3052
0.1uF
P16 R16 T16 U16 V16 AA16 D17 L17 M17 N17 P17 R17 T17 U17 V17 AA17 AC19 G18 L18 M18 N18 P18 R18 T18 U18 V18 D20 G20 H20 A21 E21 F21 G21 E22 F22 G22 H22 J22 K22 L22 M22 N22 P22 R22 T22 U22 V22 W22 Y22 AA22 W23 AB23 F28 M28 T28 AC28
C3058
C3055
0.1uF
16V
16V
0.1uF
C3061
0.1uF 16V
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM VIDEO IN & MAIN POWER
08/10/xx
BCM VIDEO IN/BCM POWER 3 1 3
IC100
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
LGE3556CP (C0 3D PIP)
DDR_BVDD0 DDR_BVDD1
DDR_BVSS0 DDR_BVSS1
DDR_PLL_TEST
DDR_PLL_LDO
DDR01_CKE
DDR01_ODT
DDR_EXT_CLK
DDR0_CLKB
DDR1_CLKB
DDR01_CASB
DDR0_DQS0
DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B
DDR1_DQS0
DDR1_DQS0B
DDR1_DQS1 DDR1_DQS1B DDR01_RASB
DDR_VREF0
DDR_VREF1
DDR01_WEB
DDR_VDDP1P8_1 DDR_VDDP1P8_2
* DDR_VTT
C402
C485
100uF
100uF
16V
16V
DDR0_VREF0
C400
0.1uF 16V
DDR_COMP
DDR0_CLK
DDR1_CLK
DDR01_A00 DDR01_A01 DDR01_A02 DDR01_A03
DDR0_A04 DDR0_A05
DDR0_A06 DDR01_A07 DDR01_A08 DDR01_A09 DDR01_A10 DDR01_A11 DDR01_A12 DDR01_A13
DDR1_A04
DDR1_A05
DDR1_A06 DDR01_BA0 DDR01_BA1 DDR01_BA2
DDR0_DQ00 DDR0_DQ01 DDR0_DQ02 DDR0_DQ03 DDR0_DQ04 DDR0_DQ05 DDR0_DQ06 DDR0_DQ07 DDR0_DQ08 DDR0_DQ09 DDR0_DQ10 DDR0_DQ11 DDR0_DQ12 DDR0_DQ13 DDR0_DQ14 DDR0_DQ15 DDR1_DQ00 DDR1_DQ01 DDR1_DQ02 DDR1_DQ03 DDR1_DQ04 DDR1_DQ05 DDR1_DQ06 DDR1_DQ07 DDR1_DQ08 DDR1_DQ09 DDR1_DQ10 DDR1_DQ11 DDR1_DQ12 DDR1_DQ13 DDR1_DQ14 DDR1_DQ15
DDR0_DM0 DDR0_DM1 DDR1_DM0 DDR1_DM1
DDR_VTT
DDR1_VREF0
C401
0.1uF 16V
R400 0
R401 0
A6 A24 B7 B24 F20 B23 B17 C22 E16 C23 B12 C12 A13 A12 B15 E14 A15 D15 E13 E12 F13 C14 F14 B14 D14 C13 D13 B13 F15 C15 D16 F16 B16 E15 A17 A8 B11 B8 D11 E11 C8 C11 C9 D8 E10 E9 F11 F12 E8 D10 F8 C18 C20 A18 B21 C21 B18 B20 D18 E18 D21 F18 E20 A22 F17 B22 E17 A10 C10 A20 F19 B10 B9 F10 F9 B19 C19 E19 D19 C16 A7 A23 C17 C7 D22
C403 10uF 10V
C404
0.1uF
A1.2V
READY
DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15]
DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15]
D1.8V
0.1uF C408
0.1uF C409
0
R403
R406
DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3]
DDR0_A[4] DDR0_A[5]
DDR0_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9]
DDR01_A[10] DDR01_A[11] DDR01_A[12] DDR01_A[13]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9]
DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[2] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[5] DDR1_DQ[6] DDR1_DQ[7] DDR1_DQ[8] DDR1_DQ[9]
READY
C406
0.1uF
C407
0.1uF 16V
C405 10uF 10V
C486
0.1uF 16V
C416
D1.8V
D1.8V
C423
C422
C424
470pF
IC401
0.047uF
0.1uF
DM/RDQS
NU/RDQS
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5
VDD_1 VDD_2 VDD_3 VDD_4
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5
VSSDL
VSS_1 VSS_2 VSS_3 VSS_4
VREF
VDDL
10uF
C8
DQ0
C2
DQ1
D7
DQ2
D3
DQ3
D1
DQ4
D9
DQ5
B1
DQ6
B9
DQ7
B7
DQS
A8
DQS
B3 A2
A9 C1 C3 C7 C9 A1 L1 E9 H9
A7 B2 B8 D2 D8 A3 E3 J1 K9
E2 E1 E7
C421
240
1%
DDR01_CKE
DDR01_ODT
DDR0_CLK
DDR0_CLKb
DDR1_CLK
DDR1_CLKb
DDR01_BA0 DDR01_BA1 DDR01_BA2
DDR01_CASb
004:C7;004:C4 004:C7;004:C4 004:F7;004:F4 004:F7;004:F4
DDR01_A[0-3]
DDR0_A[4-6]
DDR01_A[7-13]
DDR1_A[4-6]
DDR0_DQ[0-15]
004:A7;004:C4
004:A7;004:C4
DDR0_CLK
DDR0_CLKb DDR01_CKE
DDR01_RASb DDR01_CASb DDR01_WEb
DDR01_BA0 DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR0_A[4-6]
DDR01_ODT
R410
NT5TU128M8DE_BD
NANYA_1G_DDR2
1%
100
DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR0_A[4] DDR0_A[5] DDR0_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12] DDR01_A[13]
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
NC_1/BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_2/A14
L7
NC_3/A15
F9
ODT
C425
470pF
DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7]
C426
0.047uF
C427
0.1uF
D1.8V
DDR0_VREF0
C430
0.1uF
C428
22uF
DDR0_DQS0
DDR0_DQS0b
DDR0_DM0
470pF
C433
C429
10uF
C432
10uF
22uF
DDR0_DQ[0-7]
004:A4 004:A4 004:A4
004:B6;004:F3;004:I7
0.1uF
004:A7;004:F4
004:A7;004:F4
DDR01_A[0-3,7-13]
C435
C436
Close to IC
DDR1_DQ[0-15]
DDR0_DM0
READY
0.1uF 16V
C488
0.1uF 16V
1uF
GND
EN
VTTS
VREF
DDR01_RASb
READY
C410
C411
C412
470pF
470pF
IC400
BD35331F-E2
1
2
3
4
DDR0_DM1 DDR1_DM0 DDR1_DM1 DDR0_DQS0
DDR0_DQS0b
DDR0_DQS1
DDR0_DQS1b
DDR1_DQS0
DDR1_DQS0b
DDR1_DQS1
DDR1_DQS1b
C413
1uF
R402 10K
004:E6 004:E3 004:H6 004:H3 004:E6 004:E6 004:E3 004:E3 004:H6 004:H6 004:H3 004:H3
DDR01_WEb
VTT
8
VTT_IN
7
VCC
6
VDDQ
5
1uF
C419
2.2uF 10V
R412 220
C414
470pF
+3.3V_ST
C415
470pF
C420 10uF 10V
DDR0_VREF0
C417
1uF
C478
0.1uF 16V
C418
DDR1_VREF0
D1.8V
C477 10uF 10V
004:A7;004:C7
004:A7;004:C7
004:A7;004:C7;004:F7;004:F4
DDR0_CLK
DDR0_CLKb DDR01_CKE
DDR01_RASb DDR01_CASb DDR01_WEb
DDR01_BA0 DDR01_BA1
DDR01_BA2
DDR01_A[0-3,7-13]
DDR0_A[4-6]
DDR01_ODT
C479
0.1uF 16V
DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR0_A[4] DDR0_A[5] DDR0_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12] DDR01_A[13]
E8 F8 F2
F7
G7
F3
G8
G2 G3 G1
H8 H3 H7
J2 J8 J3
J7 K2 K8 K3 H2 K7
L2 L8
L3 L7
F9
IC403
NT5TU128M8DE_BD
NANYA_1G_DDR2
CK CK CKE
RAS CAS WE CS
BA0 BA1 NC_1/BA2
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13
NC_2/A14 NC_3/A15
ODT
DM/RDQS
NU/RDQS
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5
VDD_1 VDD_2 VDD_3 VDD_4
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5
VSSDL
VSS_1 VSS_2 VSS_3 VSS_4
VREF
VDDL
DDR0_DQ[8-15]
C8
DDR0_DQ[9]
DQ0
C2
DDR0_DQ[8]
DQ1
D7
DDR0_DQ[12]
DQ2
D3
DDR0_DQ[13]
DQ3
D1
DDR0_DQ[15]
DQ4
D9
DDR0_DQ[11]
DQ5
B1
DDR0_DQ[10]
DQ6
B9
DDR0_DQ[14]
DQ7
B7
DQS
A8
DQS
B3 A2
A9 C1 C3 C7 C9 A1 L1 E9 H9
A7 B2 B8 D2 D8 A3 E3 J1 K9
E2 E1 E7
D1.8V
DDR0_DQS1
DDR0_DQS1b
DDR0_DM1
DDR0_VREF0
C431
0.1uF
C434
470pF
004:A4 004:A4 004:A4
DDR01_A[0-3,7-13]
Close to IC
C439
C438
C437
004:B6
0.047uF
470pF
DDR1_CLK
DDR1_CLKb DDR01_CKE
DDR01_RASb DDR01_CASb DDR01_WEb
DDR01_BA0 DDR01_BA1
10uF
DDR01_BA2
DDR1_A[4-6]
004:A7;004:C5;004:C2;004:F2;004:I4;004:I6
DDR01_ODT
DDR1_CLK
DDR1_CLKb DDR01_CKE
DDR01_RASb DDR01_CASb DDR01_WEb
DDR01_BA0 DDR01_BA1 DDR1_DQS1
DDR01_BA2
DDR1_A[4-6]
004:B6;004:F6;004:I7
DDR01_ODT
C440
0.1uF
R411
C441
100
0.047uF
C442
470pF
1%
DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR1_A[4] DDR1_A[5] DDR1_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12] DDR01_A[13]
DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR1_A[4] DDR1_A[5] DDR1_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12] DDR01_A[13]
IC402
NT5TU128M8DE_BD
NANYA_1G_DDR2
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
NC_1/BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_2/A14
L7
NC_3/A15
F9
ODT
IC404
NT5TU128M8DE_BD
NANYA_1G_DDR2
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
NC_1/BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_2/A14
L7
NC_3/A15
F9
ODT
DM/RDQS NU/RDQS
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5
VDD_1 VDD_2 VDD_3 VDD_4
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5
VSSDL
DM/RDQS NU/RDQS
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5
VDD_1 VDD_2 VDD_3 VDD_4
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5
VSSDL
VSS_1 VSS_2 VSS_3 VSS_4
VREF
VDDL
VSS_1 VSS_2 VSS_3 VSS_4
VREF
VDDL
C8 C2 D7 D3 D1 D9 B1 B9
B7 A8 B3 A2
A9 C1 C3 C7 C9 A1 L1 E9 H9
A7 B2 B8 D2 D8 A3 E3 J1 K9
E2 E1 E7
C8 C2 D7 D3 D1 D9 B1 B9
B7 A8 B3 A2
A9 C1 C3 C7 C9 A1 L1 E9 H9
A7 B2 B8 D2 D8 A3 E3 J1 K9
E2 E1 E7
DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[5] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[2] DDR1_DQ[6]
DDR1_DQ[9]
DDR1_DQ[8] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[15] DDR1_DQ[14] DDR1_DQ[10] DDR1_DQ[11]
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DQS DQS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DQS DQS
C446
C443
470pF
DDR1_DQ[0-7]
DDR1_DQS0
DDR1_DQS0b
DDR1_DM0
D1.8V
DDR1_VREF0
C447
C444
0.1uF
470pF
Close to IC
DDR1_DQS1b
DDR1_DM1
D1.8V
DDR1_VREF0
C448
C445
0.1uF
470pF
Close to IC
C449
0.1uF
0.047uF
004:B5
004:A4 004:A3 004:A4
DDR1_DQ[8-15]
004:B5
004:A3 004:A3 004:A4
C450
10uF
C451
C453
C452
470pF
0.1uF
0.047uF
DDR01_A[0-3,7-13]
DDR1_A[4-6]
DDR0_A[4-6]
SS MEMORY MULTI
C454
10uF
SI
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_1
L7
NC_2
F9
ODT0
SS_1G_DDR2
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_1
L7
NC_2
F9
ODT0
SS_1G_DDR2
C455
K4T1G084QE-HCF8
K4T1G084QE-HCF8
22uF
DDR01_CKE
DDR01_CKE
IC401-*1
DM/RDQS NU/RDQS
IC403-*1
DM/RDQS NU/RDQS
C456
22uF
DDR01_RASb
DDR01_CASb
DDR01_BA1 DDR01_BA0 DDR01_BA2 DDR01_WEb
DDR01_ODT
DDR01_RASb
DDR01_BA1
DDR01_BA0 DDR01_BA2 DDR01_WEb
DDR01_ODT
C8
DQ0
C2
DQ1
D7
DQ2
D3
DQ3
D1
DQ4
D9
DQ5
B1
DQ6
B9
DQ7
B7
DQS
A8
DQS
B3 A2
A9
VDDQ_1
C1
VDDQ_2
C3
VDDQ_3
C7
VDDQ_4
C9
VDDQ_5
A1
VDD_1
L1
VDD_2
E9
VDD_3
H9
VDD_4
A7
VSSQ_1
B2
VSSQ_2
B8
VSSQ_3
D2
VSSQ_4
D8
VSSQ_5
A3
VSS_1
E3
VSS_2
J1
VSS_3
K9
VSS_4
E2
VREF
E1
VDDL
E7
VSSDL
C8
DQ0
C2
DQ1
D7
DQ2
D3
DQ3
D1
DQ4
D9
DQ5
B1
DQ6
B9
DQ7
B7
DQS
A8
DQS
B3 A2
A9
VDDQ_1
C1
VDDQ_2
C3
VDDQ_3
C7
VDDQ_4
C9
VDDQ_5
A1
VDD_1
L1
VDD_2
E9
VDD_3
H9
VDD_4
A7
VSSQ_1
B2
VSSQ_2
B8
VSSQ_3
D2
VSSQ_4
D8
VSSQ_5
A3
VSS_1
E3
VSS_2
J1
VSS_3
K9
VSS_4
E2
VREF
E1
VDDL
E7
VSSDL
C457
10uF
SI
DDR01_A[2] DDR01_A[0] DDR0_A[6] DDR01_A[3] DDR01_A[1] DDR01_A[10]
DDR01_A[12] DDR01_A[9] DDR01_A[7] DDR0_A[5] DDR0_A[4] DDR01_A[11] DDR01_A[8] DDR01_A[13]
SS_1G_DDR2
SS_1G_DDR2
C458
0.1uF
DDR01_A[2] DDR01_A[0] DDR1_A[6]
DDR01_A[12] DDR01_A[9]DDR1_DQ[7] DDR01_A[7] DDR1_A[5] DDR1_A[4] DDR01_A[11] DDR01_A[8] DDR01_A[13] DDR01_A[3] DDR01_A[1] DDR01_A[10]
IC402-*1
K4T1G084QE-HCF8
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_1
L7
NC_2
F9
ODT0
IC404-*1
K4T1G084QE-HCF8
E8
CK
F8
CK
F2
CKE
F7
RAS
G7
CAS
F3
WE
G8
CS
G2
BA0
G3
BA1
G1
BA2
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
L3
NC_1
L7
NC_2
F9
ODT0
C459
0.047uF
C460
470pF
10uF
0.1uF
C463
0.047uF
C476
470pF
C462
C461
DDR_VTT
PI
C466
0.1uF
C467
0.1uF
75R413
75R414
C468
0.1uF
C469
75
0.1uF
C470
0.1uF
C471
0.1uF
C481
0.1uF
C484
0.1uF
75R415
SI
C472
0.1uF
C464
0.1uF
C465
0.1uF
C473
0.1uF
C474
0.1uF
75R416
C475
0.1uF
C482
0.1uF
C483
0.1uF
C480
0.1uF
AR401
AR402
AR400
AR403
AR404
AR405
AR406
AR407
AR408
AR409
75
75
75
75
DDR_VTT
75
75
75
75
75
SI
C8
DQ0
C2
DQ1
D7
DQ2
D3
DQ3
D1
DQ4
D9
DQ5
B1
DQ6
B9
DQ7
B7
DQS
A8
DQS
B3
DM/RDQS
A2
NU/RDQS
A9
VDDQ_1
C1
VDDQ_2
C3
VDDQ_3
C7
VDDQ_4
C9
VDDQ_5
A1
VDD_1
L1
VDD_2
E9
VDD_3
H9
VDD_4
A7
VSSQ_1
B2
VSSQ_2
B8
VSSQ_3
D2
VSSQ_4
D8
VSSQ_5
A3
VSS_1
E3
VSS_2
J1
VSS_3
K9
VSS_4
E2
VREF
E1
VDDL
E7
VSSDL
C8
DQ0
C2
DQ1
D7
DQ2
D3
DQ3
D1
DQ4
D9
DQ5
B1
DQ6
B9
DQ7
B7
DQS
A8
DQS
B3
DM/RDQS
A2
NU/RDQS
A9
VDDQ_1
C1
VDDQ_2
C3
VDDQ_3
C7
VDDQ_4
C9
VDDQ_5
A1
VDD_1
L1
VDD_2
E9
VDD_3
H9
VDD_4
A7
VSSQ_1
B2
VSSQ_2
B8
VSSQ_3
D2
VSSQ_4
D8
VSSQ_5
A3
VSS_1
E3
VSS_2
J1
VSS_3
K9
VSS_4
E2
VREF
E1
VDDL
E7
VSSDL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM AUS DVR
DDR2 MEMORY INTERFACE
08/06/xx
4 13
POWER B/D
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
POWER Wafer 24P
C504
16V
READY
R501 10K
CURRENT: MAX 6A
EAM38058401
CB4532UK121E
C505
0.1uF 16V
R503 100
R504 100
L501
JP1107
RL_ON
READY
R537
10K
P_+5V
C503
10uF
6.3V
READY
5V_ON
100uF
+5V_ST
READY
R500 10K
Stand-by (5VST --> +3.3V)
+5V_ST
IC500 EAN58801701
C500 10uF
6.3V
C502
0.1uF 16V
VIN
AP2121N-3.3TRE1
VOUT
2
3
1
GND
C506 10uF
6.3V
P500 SMAW200-H18S1
1 3 5 7 9 11 13 15 17
19
+3.3V_ST
C509
0.1uF 16V
2 4 6 8
JP1106
10 12 14 16 18
MLB-201209-0120P-N2
L503 EAM44020101 CB3216PA501E
CURRENT: MAX 3A
L504 0LCML00003B MLB-201209-0120P-N2
+3.3V_MULTI
CURRENT: MAX 3A
0LCML00003B
R512 100
C511
0.1uF 16V
READY
R511
L505
10K
C514
0.1uF 50V
C515
0.1uF 16V
AC_DET
+3.3V_NEC_ST
ERROR_DET
C517
10uF
6.3V
READY
P_17V
C516 47uF 25V
+5V_ST
C518
100uF
16V
FRC DDR 1.5V & Multi 5V Switch
+5V_ST
P_+5V R517 10K
RL_ON
R514 10K
C
B
Q500 2SC3052
E
Multi Power(5V -->2.5V)
+5V_MULTI
READY
C520 10uF
6.3V
C521
0.1uF 16V
INPUT
IC503
0IPMG78346A
AZ1085S-ADJTR/E1
3
1
ADJ/GND
9101%R531
R2
66.51%R532
OUTPUT
2
R533 1K
1%
R1
V0 = 1.25(1+R2/R1)
BCM3556 core 2.5V
C526
C525
0.1uF
10uF
16V
6.3V
P_+5V
A2.5V
L509 0LCML00003B MLB-201209-0120P-N2
C533 47uF 16V
0.1uF
C531
Q501 EBK60706901 AO4813
1S2
2G2
3S1
4G1
4.4A
16V
L516 0LCML00003B MLB-201209-0120P-N2
C540
0.1uF 16V
+5V_MULTI
C548 100uF 16V
8 D2_2
7 D2_1
6 D1_2
5 D1_1
L510 0LCML00003B MLB-201209-0120P-N2
C535
0.1uF 16V
Multi Power(5V -->3.3V)
+5V_MULTI
+5V_USB
C549 100uF 16V
L518
MLB-201209-0120P-N2
120-ohm
L515
MLB-201209-0120P-N2
120-ohm
C561
0.1uF 16V
C552
0.1uF 16V
A3.3V
C555 10uF
6.3V
D3.3V
C566 10uF
6.3V
Instant Boot (5V -->1.8V_DDR)
100pF
50V
C507
Placed on SMD-TOP
C IN
C501 22uF 10V
+5V_ST
CIC21J501NE
L500
C3063
0.1uF 16V
5.6K
R502
IC501
MP2212DN
FB
1
R2
1%
GND
2
IN
3
BS
4
3A
R505
8
7
6
5
10
1/10W
1%
R507
7.5K1%
EN/SYNC
SW_2
SW_1
VCC
Vout=0.8*(1+R1/R2)
R1
C508 1uF
10V
R506
4.7
NR8040T3R6N
C510
0.1uF 50V
3.6uH
L502
R509
R2
+3.3V_USB_HUB
C556
0.1uF 16V
C554
0.1uF 16V
C562 22uF 10V
+3.3V_MULTI
L520 EAP51195601 CBC3225T330KR
C567 100uF 16V
C569
0.1uF 16V
+5V_TU
MLB-201209-0120P-N2
L1307
MLB-201209-0120P-N2
C3066
0.1uF 16V
+5V_MULTI
120-ohm L519
C551 10uF
6.3V
33K1%R528
R1
6.2K1%R529
Instant Boot (5V -->BCM3556 CORE 1.2V)
R520
10K
3.9K
EP
AGND
1
SS
PGND_1
SW_1
IN_1
NC
BS
MP2208DL-LF-Z
C524
0.1uF
2
3
4
5
6
7
+5V_ST
L1305
C522
0.1uF
C519
0.1uF
CIC21J501NE
C523 22uF 16V
10K
INSTANT_BOOT
C512 22uF
10V
Placed on SMD-TOP
C513
0.1uF
CIC21J501NE
D1.8V
L1304
IC502
THERMAL
FB
14
EN/SYNC
15
13
PGND_2
12
SW_2
11
IN_2
10
POK
R515
9
100K
R516
VCC
8
10
C528
C530
1uF
22uF
10V
D500
L507
2uH
C532
0.1uF
R518 27
Vout=0.8*(1+R1/R2)
5.6V R526
100K
R519 470K
R530
1%
R1 R2
C534 22uF 16V
R538
30K
1%
READY
R534
910K 1%
C553 22uF
16V
INSTANT_BOOT
READY
C557 22uF 16V
C558
0.1uF 16V
D1.2V
A1.2V
L1306
CIC21J501NE
P_17V
L511
C539 10uF 25V
C3064
0.1uF 50V
READY
C536 10uF
6.3V
INPUT
C544
0.1uF 16V
MP8706EN-C247-LF-Z
IN
SW_1
SW_2
0.1uFC542 BST
R522
47
IC505 0IPMG78341A
AZ1085S-3.3TR/E1
MAX 3A
3
1
ADJ/GND
IC504
1
2
3A
3
4
L514 10uH
NR8040T100M
OUTPUT
2
C565
100uF 16V
GND
8
C550 1uF
VCC
50V
7
6
5
FB
EN/SYNC
R524 10K
R525
10K
Vout=(1+R1/R2)*0.8
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM AUS DVR
SMPS POWER
08/10/xx
5 13
CAN H-NIM/NIM TUNER for EU
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
TU600 TDTJ-S001D
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC[IF_TP]
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
19
SHIELD
READY
close to TUNER
0
R605
READY
+3.3V_TU
4.7K
R1324
0.1uF 16V
C602 100pF 50V
C608
0.1uF 16V
+3.3V_TU
R1323
C607
TU_IF_N_BCM
TU_IF_P_BCM
4.7K
close to TUNER
+1.2V_TU
C616
0.1uF 16V
C600 62pF 50V
+5V_TU
C604
0.1uF 16V
READY
C601 62pF 50V
L603
16V
C603 100pF 50V
C3062
0.1uF 16V
C609
100uF
270nHL604
270nH
R608
+3.3V_TU
16V
C613 100uF 16V
0
READY
C697 20pF 50V
C610
0.1uF
R617 100
TU_IF_AGC_BCM
C698 20pF 50V
SCL0_3.3V
SDA0_3.3V
+3.3V_TU
16V
R622 100K
C612
0.1uF
C615
0.1uF 16V
READY
TUNER_RESET
Q600EB
2SC3052
READY
C619 10uF 10V
READY
C
R600 200
+5V_TU
B
1/8W
E
C
OPTION : RF AGC
R621 10K
READY
R602 200
1/8W
Q602
ISA1530AC1
IF_AGC_SEL
TU_CVBS
R626
4.7K
+5V_TU
R625
470
B
R616 82
E
ISA1530AC1
Q604
C
TU_SIF
P1103
12507WR-04L
5
+5V_MULTI
L1102
1
2
3
4
MLB-201209-0120P-N2
D1112
5.5V
R1160 0
C1137
27pF 50V
OPT
3D_SYNC_OUT
3D SYNC_IR EMITTER
+3.3V_TU
AZ1117H-ADJTRE1(EH11A)
C617
0.1uF 16V
INPUT
3
OUTPUT
IC600
2
1
ADJ/GND
R623
1.2K
V_OUT=V_REF(1+R2/R1)
READY
USB TO IR EMITTER
NC
IC1103
AP2191SG-13
8
7
$0.11
6
5
READY
+3.3V_MULTI
GND
1
IN_1
2
IN_2
3
EN
4
READY
R1158
2.7K
USB_EN
+5V_MULTI
READY C1136
0.1uF 16V
+3.3V_MULTI
SWITCH ADDED
READY
R1155
C1135 27pF
50V
READY
10K
+1.2V_TU
R613
10
R2
GND
R1
C618
C621
0.1uF
10uF
16V
10V
+3.3V_MULTI
C606
0.1uF 16V
L602
CIC21J501NE
C611
0.1uF 16V
+3.3V_TU
C620 22uF
10V
C699
100uF 16V
USB-STRAIGHT
JK1101
KJA-UB-0-0037
READY
USB_OCP
1
2
3
4
5
R1161
4.7K
READY
D1111
READY
5.5V
READY
R1157 0
3D_SYNC_OUT
OUT_2
OUT_1
FLG
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61354901
TUNER
11 13
AMP
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
Separate DGND AND AVSS
R705 0
AVSS
This parts are Located
on AVSS area.
C710
C708
0.047uF 25V
4700pF
R712
470
AVSS
4700pF
C712
R713
C713
P_17V
L704
0LCML00003B
MLB-201209-0120P-N2
+17V_AMP
+3.3V_MULTI
AVSS
470
22K
2200pFC714
0.047uF R714
1uFC716
C719
0.033uF
C724 100uF 25V
+17V_AMP
C727
100uF 25V
50V
C721
0.1uF 50V
L703
120-ohm
L702
120-ohm
+3.3V_AU_AVDD
+3.3V_DVDD
001:Z13
AUD_MASTER_CLK
011:I17;001:V10
AUD_LRCK
AUD_SCK
AUD_LRCH
004:E17;001:Y15
004:M17;001:Y14
AC_DET
001:O19
AMP_RESET_N
READY
SDA2_3.3V SCL2_3.3V
R742 22pF
READY
R700
PULL DOWN
0
+3.3V_DVDD
R703
22K
+3.3V_AU_AVDD
AVSS
R702 1K
READY
R741 22pF
READY
R704
33
1000pF
READY
C701 10uF 16V
C700 1000pF 50V
READY
+3.3V_DVDD
C702
R739 22pF
READY
R706 2K
PLL_FLTP
AVSS
PLL_FLTM
VR_ANA
10
11
AVDD
R709 200
TESTOUT
0
R710
READY
1/16W
MCLK
5%
1%
OSC_RES
1%
18K
DVSS_1
R711
C704
0.01uF
VR_DIG
PDN
C703
0.1uF
C705
4.7uF 10V
LRCLK
SCLK
SDIN
SDA
SCL
R740 22pF
READY
33R707 33R708
+3.3V_DVDD
C709 10uF 16V
13 14 15 16 17 18 19 20 21 22 23 24
C711
0.01uF
12
26STEST
25RESET
27DVDD
OC_ADJ
7
8NC9
TAS5709PHPR
IC700
28DVSS_2
29GND
30AGND
C715
0.1uF
BST_A
SSTIMER
GVDD_OUT_1
5
6
31VREG
32GVDD_OUT_2
33BST_D
25V
1uF
C717
PVDD_A_2
3
4
34PVDD_D_1
C718
PVDD_A_1
OUT_A
1
2
48 47 46 45 44 43 42 41 40 39 38 37
35PVDD_D_2
36OUT_D
0.033uF 50V
PGND_AB_2 PGND_AB_1 OUT_B PVDD_B_2 PVDD_B_1 BST_B BST_C PVDD_C_2 PVDD_C_1 OUT_C PGND_CD_2 PGND_CD_1
C720
0.1uF 50V
C722
100uF 25V
C726
0.1uF 50V
C725
0.1uF 50V
+17V_AMP
C723 100uF 25V
50V
0.033uF
C731
50V
0.033uF C730
L701 AD-9060
2S
1S 1F
EAP61008401
L700 AD-9060
2S
1S 1F
EAP61008401
C740
0.01uF
C733
0.47uF
C734
0.1uF
C735
0.1uF
C736
0.1uF
C737
0.1uF 50V
2F
2F
C732
0.47uF
R717
3.3
R718
3.3 C741
0.01uF
C738
0.01uF
R715
3.3
R716
3.3 C739
0.01uF
50V
WAFER-ANGLE
SPK_L+
4
SPK_L-
3
SPK_R+
2
SPK_R-
1
P703
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EAX61354901
AUDIO AMP
7 13
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