LG 50PX950 Schematic

PLASMA TV

SERVICE MANUAL

CAUTION

BEFORE SERVICING THE CHASSIS,

READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CHASSIS : PB01B

MODEL : 50PX950 50PX950-SA

North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com

Asia/Oceania http://biz.lgservice.com

Internal Use Only

Printed in Korea

P/NO : MFL66279702(1008-REV00)

- 2 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

CONTENTS

CONTENTS ............................................................................................................................... 2

SAFETY PRECAUTIONS...........................................................................................................3

SPECIFICATION.........................................................................................................................4

ADJUSTMENT INSTRUCTION..................................................................................................6

BLOCK DIAGRAM ...................................................................................................................14

EXPLODED VIEW ...................................................................................................................15

SVC. SHEET ................................................................................................................................

- 3 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

SAFETY PRECAUTIONS

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in

the Schematic Diagram and Exploded View.

It is essential that these special safety parts should be replaced with the same components as recommended in this manual to

prevent X-RADIATION, Shock, Fire, or other Hazards.

Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the

servicing of a receiver whose chassis is not isolated from the AC

power line. Use a transformer of adequate power rating as this

protects the technician from accidents resulting in personal injury

from electrical shocks.

It will also protect the receiver and it's components from being

damaged by accidental shorts of the circuitry that may be

inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this monitor is blown, replace it

with the specified.

When replacing a high wattage resistor (Oxide Metal Film

Resistor, over 1W), keep the resistor 10mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Due to high vacuum and large surface area of picture tube,

extreme care should be used in handling the Picture Tube.

Do not lift the Picture tube by it's Neck.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect

an electrical jumper across the two AC plug prongs. Place the

AC switch in the on position, connect one lead of ohm-meter to

the AC plug prongs tied together and touch other ohm-meter

lead in turn to each exposed metallic parts such as antenna

terminals, phone jacks, etc.

If the exposed metallic part has a return path to the chassis, the

measured resistance should be between 1MΩ and 5.2MΩ.

When the exposed metal has no return path to the chassis the

reading must be infinite.

An other abnormality exists that must be corrected before the

receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor

between a known good earth ground (Water Pipe, Conduit, etc.)

and the exposed metallic parts.

Measure the AC voltage across the resistor using AC voltmeter

with 1000 ohms/volt or more sensitivity.

Reverse plug the AC cord into the AC outlet and repeat AC

voltage measurements for each exposed metallic part. Any

voltage measured must not exceed 0.75 volt RMS which is

corresponds to 0.5mA.

In case any measurement is out of the limits specified, there is

possibility of shock hazard and the set must be checked and

repaired before it is returned to the customer.

Leakage Current Hot Check circuit

1.5 Kohm/10W

To Instrument's

exposed

METALLIC PARTS

Good Earth Ground

such as WATER PIPE,

CONDUIT etc.

AC Volt-meter

IMPORTANT SAFETY NOTICE

0.15uF

- 4 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application Range

(1) This spec sheet is applied all of PDP TV with PB01B chassis.

2. Specification

Each part is tested as below without special appointment.

(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 °C ± 5 °C

(2) Relative Humidity : 65 % ± 10 %

(3) Power Voltage : Standard input voltage (100 V - 240 V ~ 50 / 60 Hz)

* Standard Voltage of each product is marked by models

(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with

BOM.

(5) The receiver must be operated for about 5 minutes prior to the adjustment.

3. Test Method

(1) Performance : LGE TV test method followed.

(2) Demanded other specification

Safety: UL, CSA, IEC specification, CE

EMC : FCC, ICES, IEC specification, CE

Model Name Market Brand

50PX950-SA Brazil LG

Model Name Market Appliance

50PX950-SA Brazil Safety : IEC/EN60065

- 5 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

4. General Specification

No Item Specification Model Remark

1. Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N PX950

2) NTSC / PAL-M / PAL-N Analog model

2. Available Channel 1) VHF : 02~13 PX950

2) UHF : 14~69

3) DTV : 07-69 (VHF high/UHF)

4) CATV : 02~135

1) VHF : 02~13 Analog model

2) UHF : 14~69

3) CATV : 02~135

3. Input Voltage 1)AC 100 V ~ 240 V 50 / 60 Hz

4. Market BRAZIL PX950

Latin America

5. Screen Size 127 cm (50 inch) Wide(1920 X1080) 50PX950-SA

152 cm (60 inch) Wide(1920 X 1080) 60PX950-SA

6. Aspect Ratio 16:9

7. Tuning System FS

8. Module PDP50R103## (1920 X 1080) 50PX950-SA

PDP60R103## (1920 X 1080) 60PX950-SA

9. Operating Environment 1) Temp : 0 deg ~ 40 deg

2) Humidity : ~ 80 %

10. Storage Environment 1) Temp : -20 deg ~ 60 deg

2) Humidity : 0 % ~ 90 %

- 6 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

ADJUSTMENT INSTRUCTION

1. Application Range

This spec. sheet applies to PB01B Chassis applied PDP TV

all models manufactured in TV factory.

2. Specification

(1) Because this is not a hot chassis, it is not necessary to use

an isolation transformer. However, the use of isolation

transformer will help protect test instrument.

(2) Adjustment must be done in the correct order. But it is

flexible when its factory local problem occurs.

(3) The adjustment must be performed in the circumstance of

25 cC ± 5 cC of temperature and 65 % ± 10 % of relative

humidity if there is no specific designation.

(4) The input voltage of the receiver must keep 100 V - 240 V,

50 / 60 Hz.

(5) Before adjustment, execute Heat-Run for 5 minutes.

V After Receive 100% Full white pattern (06CH) then

process Heat-run

(or “8. Test pattern” condition of Ez-Adjust status)

V How to make set white pattern

1) Press Power ON button of Service Remocon

2) Press ADJ button of Service remocon. Select “10.

Test pattern” and, after select “White” using

navigation button, and then you can see 100% Full

White pattern.

* In this status you can maintain Heat-Run useless any

pattern generator

* Notice: if you maintain one picture over 20 minutes

(Especially sharp distinction black with white pattern –

13Ch, or Cross hatch pattern – 09Ch) then it can

appear image stick near black level.

3. Adjustment items

3-1. PCB Assembly adjustment

(1) Adjust 480i Comp1

(2) Adjust 1080p Comp1/RGB

- If it is necessary, it can adjustment at Manufacture Line

- You can see set adjustment status at “9. ADJUST

CHECK” of the “In-start menu”

3-2. Set Assembly Adjustment

(1) EDID (The Extended Display Identification Data )

(2) Color Temperature (White Balance) Adjustment

(3) Make sure RS-232C control

(4) Selection Factory output option

4. PCB Assembly Adjustment

4-1. Using RS-232C

- Adjust 3 items at 3-1 PCB assembly adjustments

“ (3) Adjustment sequence” one after the order.

(1) Adjustment protocol

(2) Necessary items before Adjustment items

O Pattern Generator : (MSPG-925FA)

O Adjust 480i Comp1

(MSPG-925FA:model :209, pattern :65) – Comp1 Mode

O Adjust 1080p Comp1

(MSPG-925FA:model :225 , pattern :65) – Comp1 Mode

O Addjust RGB (MSPG-925FA:model :225 , pattern :65)

– RGB-PC Mode

* If you want more information then see the below Adjustment

method (Factory Adjustment)

(3) Adjustment sequence

O aa 00 00: Enter the ADC Adjustment mode.

O xb 00 40: Change the mode to Component1 (No actions)

O ad 00 10: Adjust 480i Comp

O ad 00 10: Adjust 1080p comp

O xb 00 60: Change to RGB-PC mode(No action)

O ad 00 10: Adjust 1080p RGB

O xb 00 90: Endo of Adjustmennt

< See ADC Adjustment RS232C Protocol_Ver1.0 >

Order Command Set response

1. Inter the aa 00 00 a 00 OK00x

Adjustment

mode

2. Change the XB 00 40 b 00 OK40x (Adjust 480i Comp1 )

Source XB 00 60 (Adjust 1080p Comp1)

b 00 OK60x (Adjust 1080p RGB)

3. Start ad 00 10

Adjustment

4. Return the OKx ( Success condition )

Response NGx ( Failed condition )

5. Read data ( main ) (main : component1 480i, RGB 1080p)

Adjustment ad 00 20 00000000000000000000000007c007b006dx

data ( main ) (main : component1 480i, RGB 1080p)

ad 00 30 000000070000000000000000007c00830077x

6. Confirm ad 00 99 NG 03 00x (Failed condition)

Adjustment NG 03 01x (Failed condition)

NG 03 02x (Failed condition)

OK 03 03x (Success condition)

7. End of ad 00 90 d 00 OK90x

Adjustment

5. Factory Adjustment

PB01A : USE EXTERNAL ADC(BCM) : using instrument.

PB02A : USE INTERNAL ADC(S7) : using internal pattern.

5-1. Auto Adjust Component

480i/1080p RGB 1080p

(1) Summary : Adjustment component 480i/1080i and RGB

1080p is Gain and Black level setting at Analog

to Digital converter, and compensate the RGB

deviation

(2) Using instrument

1) Adjustment remocon, 801GF(802B, 802F, 802R) or

MSPG925FA pattern generator

(It can output 480i/1080i horizontal 100 % color bar

pattern signal, and its output level must setting

0.7 V ± 0.1 V p-p correctly)

* You must make it sure its resolution and pattern cause every

instrument can have different setting

2) Adjustment method 480i Comp1, Adjust 1080p

Comp1/RGB (Factory adjustment)

O ADC 480i Component1 adjustment -

- Check connection of Component1

- MSPG-925FA Ë Model: 209, Pattern 65

O Set Component 480i mode and 100% Horizontal

Color Bar Pattern(HozTV31Bar), then set TV set to

Component1 mode and its screen to “NORMAL”

O ADC 1080p Component1 / RGB adjustment

- Check connection both of Component1 and RGB

- MSPG-925FA Ë Model: 225, Pattern 65

O Set Component 1080p mode and 100% Horizontal

Color Bar Pattern(HozTV31Bar), then set TV set to

Component1 mode and its screen to “NORMAL”

O After get each the signal, wait more a second and

enter the “IN-START” with press IN-START key of

Service remocon. After then select “7. External ADC”

with navigator button and press “Enter”.

O After Then Press key of Service remocon “Right

Arrow(VOL+)”

O You can see “ADC Component1 Success”

O Component1 1080p, RGB 1080p Adjust is same

method.

O Component 1080p Adjustment in Component1 input

mode

O RGB 1080p adjustment in RGB input mode

O If you success RGB 1080p Adjust. You can see “ADC

RGB-DTV Success”

Caution : Set Volume 0 after adjustment

5-2. Use Internal ADC(S7)

- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC

Calibration(START)

5-3. EDID(The Extended Display

Identification Data) / DDC(Display Data

Channel) download

(1) Summary

1) It is established in VESA, for communication between

PC and Monitor without order from user for building user

condition. It helps to make easily use realize “Plug and

Play” function.

2) For EDID data write, we use DDC2B protocol.

5-4. Auto Download

(1) After enter Service Mode by pushing “ADJ” key,

(2) Enter EDID D/L mode.

(3) Enter “START” by pushing “OK” key.

Caution

- Never connect HDMI & D-sub Cable when the user

downloading .

- Use the proper cables below for EDID Writing.

- 7 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

< Adjustment pattern : 480i / 1080p 60Hz Pattern >

* Edid data and Model option download(RS232)

5-5. Manual Download

(1) Write HDMI EDID data

1) Using instruments

- Jig. (PC Serial to D-Sub connection) for PC, DDC

adjustment.

- S/W for DDC recording (EDID data write and read)

- D-sub jack

- Additional HDMI cable connection Jig.

2) Preparing and setting.

- Set instruments and Jig. Like pic.5), then turn on PC

and Jig.

- Operate DDC write S/W (EDID write & read)

- It will operate in the DOS mode.

- EDID data (Model name = LG TV)

- 2010 EDID DATA CHECK SUM.

- 8 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

BLOCK(0) BLOCK(1)

HD HDMI1 3B 2C

HDMI2 3B 1C

HDMI3 3B 0C

RGB A3

FHD HDMI1 3B 2C

HDMI2 3B 1C

HDMI3 3B 0C

HDMI4 3B FC

RGB A3

< For write EDID data, setting Jig and another instruments >

* See Working Guide if you want more information about EDID

communication.

5-6. Adjustment Color Temperature

(White balance)

(1) Using Instruments

1) Color Analyzer: CA-210 (CH 9)

- Using LCD color temperature, Color Analyzer (CA-

210) must use CH 9, which Matrix compensated

(White, Red, Green, Blue compensation) with CS-

2100. See the Coordination bellowed one.

2) Auto-adjustment Equipment (It needs when Auto-

adjustment – It is availed communicate with RS-232C :

Baud rate: 115200)

3) Video Signal Generator MSPG-925F 720p, 216Gray

(Model: 217, Pattern 78)

(2) Connection Diagram (Auto Adjustment)

1) Using Inner Pattern

2) Using HDMI input

(3) White Balance Adjustment

- If you can’t adjust with inner pattern, then you can adjust

it using HDMI pattern. You can select option at “Ez-Adjust

Menu – 7. White Balance” there items “NONE, INNER,

HDMI”. It is normally setting at inner basically. If you can’t

adjust using inner pattern you can select HDMI item, and

you can adjust.

- In manual Adjust case, if you press ADJ button of service

remocon, and enter “Ez-Adjust Menu – 7. White Balance”,

then automatically inner pattern operates. (In case of

“Inner” originally “Test-Pattern. On” will be selected in The

“Test-Pattern. On/Off”.

O Connect all cables and equipments like Pic.5)

O Set Baud Rate of RS-232C to 115200. It may set

115200 orignally.

O Connect RS-232C cable to set

O Connect HDMI cable to set

V RS-232C COMMAND(Commonly apply)

- 9 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

RS-232C COMMAND

[CMD ID DATA] Meaning

wb 00 00 White Balance adjustment start.

wb 00 10 Start of adjust gain

(Inner white pattern)

wb 00 1f End of gain adjust

wb 00 20 Start of offset adjust

(Inner white pattern)

wb 00 2f End of offset adjust

wb 00 ff End of White Balance adjust

(Inner pattern disappeared)

< Connection Diagram for Adjustment White balance >

O wb 00 00”: Start Auto-adjustment of white balance.

O “wb 00 10”: Start Gain Adjustment (Inner pattern)

O “jb 00 c0” :

O …

O “wb 00 1f”: End of Adjustment

* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-

end)

O “wb 00 ff”: End of white balance adjustment (inner

pattern disappear)

V Adjustment Mapping information

O When Color temperature (White balance) Adjustment

(Automatically)

- Press “Power only key” of service remocon and

operate automatically adjustment.

- Set BaudRate to 115200.

O You must start “wb 00 00” and finish it “wb 00 ff”.

O If it needs, then adjustment “Offset”.

(4) White Balance Adjustment (Manual adjustment)

1) Test Equipment: CA-210

- Using PDP color temperature, Color Analyzer (CA-

210) must use CH 10, which Matrix compensated

(White, Red, Green, Blue compensation) with CS-

2100. See the Coordination bellowed one.

2) Manual adjustment sequence is like bellowed one.

- Turn to “Ez-Adjust” mode with press ADJ button of

service remocon.

- Select “10.Test Pattern” with CH+/- button and press

enter. Then set will go on Heat-run mode. Over 30

minutes set let on Heat-run mode.

- Let CA-210 to zero calibration and must has gap more

10cm from center of PDP module when adjustment.

- Press “ADJ” button of service remocon and select

“7.White-Balance” in “Ez-Adjust” then press “

G” button

of navigation key. (When press “

G” button then set will

go to full white mode)

- Adjust at three mode (Cool, Medium, Warm)

- If “cool” mode

Let B-Gain to 192 and R, G, B-Cut to 64 and then

control R, G gain adjustment High Light adjustment.

- If “Medium” and “Warm” mode Let R-Gain to 192 and

R, G, B-Cut to 64 and then control G, B gain

adjustment High Light adjustment.

- All of the three mode

Let R-Gain to 192 and R, G, B-Cut to 64 and then

control G, B gain adjustment High Light adjustment.

- With volume button (+/-) you can adjust.

- After all adjustment finished, with Enter (_ key) turn to

Ez-Adjust mode. Then with ADJ button, exit from

adjustment mode

* Attachment: White Balance adjustment coordination and color

temperature.

O Using CS-1000 Equipment.

- COOL : T=11000K, _uv=0.000, x=0.276 y=0.283

- MEDIUM : T=9300K, _uv=0.000, x=0.285 y=0.293

- WARM : T=6500K, _uv=0.000, x=0.313 y=0.329

O Using CA-210 Equipment. (10 CH)

- Contras value : 216 Gray

- Brighness spec.

6. Test of RS-232C control.

- Press In-Start button of Service Remocon then set the “4.Baud

Rate” to 115200. Then check RS-232C control and

7. Selection of Country option.

- Selection of country option is allowed only North American

model (Not allowed Korean model). It is selection of Country

about Rating and Time Zone.

(1) Models: All models which PB82C Chassis (See the first

page.)

(2) Press “In-Start” button of Service Remocon, then enter the

“Option” Menu with “PIP CH-“ Button

(3) Select one of these three (USA, CANADA, MEXICO)

defends on its market using “Vol. +/-“button.

Caution : Don’t push The INSTOP KEY after completing the

function inspection

Caution : Inspection only PAL M

- 10 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

Color Test Color Coordination

temperature Equipment x y

COOL CA-210 0.276±0.002 0.283±0.002

MEDIUM CA-210 0.285±0.002 0.293±0.002

WARM CA-210 0.313±0.002 0.329±0.002

Item Min Typ Max Unit Remark

White 49 60 - cd/m - 100%Window White

average Pattern

brightness - 100IRE(255Gray)

- Picture: Vivid(Medium )

Brightness -20 +20 % - 85IRE(216Gray) 100%

uniformity Window White Pattern

- Picture: Vivid(Medium)

RS-232C COMMAND

CENTER

[CMD ID DATA] MIN (DEFAULT) MAX

Cool Mid Warm Cool Mid Warm

R Gain jg Ja jd 00 184 192 192 192

G Gain jh Jb je 00 187 183 159 192

B Gain ji Jc jf 00 192 161 95 192

R Cut 64 64 64 127

G Cut 64 64 64 127

B Cut 64 64 64 127

8. MAC Address and ESN Key Write

8-1. Equipment & Condition

- Play file: Serial.exe

- MAC Address edit

- Input Start / End MAC address

8-2. Download method

(1) Communication Prot connection

Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port

(2) MAC Address Download

- Com 1,2,3,4 and 115200(Baudrate)

- Port connection button click(1)

- Load button click(2) for MAC Address write.

- Start MAC Address write button(3)

- Check the OK Or NG

8-3. Equipment & Condition

- Each other connection to LAN Port of IP Hub and Jig

8-4. MAC Address

- Push “IN-START” Key in service remote controller.

- Check ESN KEY only north America model

8-5. LAN PORT INSPECTION(PING TEST)

- LAN Port connection with PCB

- Network setting at MENU Mode of TV

- setting automatic IP

- Setting state confirmation

-> If automatic setting is finished, you confirm IP and MAC

Address.

- remove LAN CABLE

9. GND and ESD Testing

9-1. Prepare GND and ESD Testing.

- Check the connection between set and power cord

9-2. Operate GND and ESD auto-test.

(1) Fully connected (Between set and power cord) set enter

the Auto-test sequence.

(2) Connect D-Jack AV jack test equipment.

(3) Turn on Auto-controller(GWS103-4)

(4) Start Auto GND test.

(5) If its result is NG, then notice with buzzer.

(6) If its result is OK, then automatically it turns to ESD Test.

(7) Operate ESD test

(8) If its result is NG, then notice with buzzer.

(9) If its result is OK, then process next steps. Notice it with

Good lamp and STOPER Down.

9-3. Check Items.

(1) Test Voltage

GND: 1.5KV/min at 100mA

Signal: 3KV/min at 100mA

(2) Test time: just 1 second.

(3) Test point

GND test: Test between Power cord GND and Signal cable

metal GND.

ESD test: Test between Power cord GND and Live and

neutral.

(4) Leakage current: Set to 0.5mA(rms)

- 11 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

10. POWER PCB Ass’y Voltage

Adjustment

(Va/Vs Voltage Adjustment)

(1)Test equipment : D.M.M 1EA

(2) Connection Diagram for Measuring : refer to fig.1

10-1. Adjustment method

(1) Vs adjustment (refer fig.1)

1) Connect + terminal of D.M.M. to Vs pin of

P812(42”:P811), connect -terminal to GND pin of

P812(42”:P811)

2) After turning VR901, voltage of D.M.M adjustment as

same as Vs voltage which on label of panel left/top (

deviation ; ±0.5V)

(2) Va adjustment (refer fig.1)

1) After receiving 100% Full White Pattern, HEAT RUN.

2) Connect + terminal of D.M.M. to Va pin of

P812(42”:P811), connect -terminal to GND pin of

P811(42”:P812).

3) After turning VR502,voltage of D.M.M adjustment as

same as Va voltage which on label of panel left/top

(deviation; ±0.5V)

11. Default Service option.

11-1. ADC-Set.

V R-Gain adjustment Value (default 128)

V G-Gain adjustment Value (default 128)

V B-Gain adjustment Value (default 128)

V R-Offset adjustment Value (default 128)

V G-Offset adjustment Value (default 128)

V B-Offset adjustment Value (default 128)

11-2. White balance. Value.

11-3. Temperature Threshold

V Threshold Down Low 20

V Threshold Up Low 23

V Threshold Down High 70

V Threshold Up High 75

12. USB DOWNLOAD

(*.epk file download)

V Put the USB Stick to the USB socket

V Press Menu key, and move OPTION

V Press “FAV” Press 7 times.

- 12 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

< fig.1 : 50 FHD Power PCB Assy Voltage adjustment >

CENTER (DEFAULT)

Cool Mid Warm

R Gain 192 192 192

G Gain 192 192 192

B Gain 192 192 192

R Cut 64 64 64

G Cut 64 64 64

B Cut 64 64 64

V Select download file (epk file)

V After download is finished, remove the USB stick.

V Press “IN-START” key of ADJ remote control, check the

S/W version.

CAUTION

- DO NOT REMOVE USB MEMORY CARD FROM USB PORT

WHEN YOU FIND BELOW DESCRIPTION

- " Do not remove the memory card from the port! "

- 13 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

- 14 -

LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

BLOCK DIAGRAM

- 15 -

LGE Internal Use Only

EXPLODED VIEW

Copyright ©2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

305

207

203

202

303

602

501

400

208

580

300

120

200

209

601

520

604

204

201

206

205

240

301

302

304

590

560

521

900

910

310

570

Except LGEAZ

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These

parts are identified by in the Schematic Diagram and EXPLODED VIEW.

It is essential that these special safety parts should be replaced with the same components as

recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.

Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

A10

A9

LV1

A12

A22

A7

A21

A2

A13

LV2

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM GPIO/NEC MICOM/FLASH/SYS EEPROM

08/10/28

EAX63347201

NAND_DATA[0]

NAND_DATA[2]

NAND_DATA[3]

NAND_DATA[4]

NAND_DATA[5]

NAND_DATA[7]

NAND_DATA[6]NAND_DATA[6]

NAND_DATA[1]NAND_DATA[1]

NAND_DATA[5]

NAND_DATA[2]

NAND_DATA[6]

NAND_DATA[3]

NAND_DATA[0]

NAND_DATA[7]

NAND_DATA[4]

NAND_DATA[1]

NAND_DATA[1]

NAND_DATA[5]

NAND_DATA[4]

NAND_DATA[2]

NAND_DATA[3]

NAND_DATA[6]

NAND_DATA[0]

NAND_DATA[7]

WIRELESS_DL_RX

WIRELESS_DL_TX

D3.3V

D3.3V

NAND_DATA[0-7]

D3.3V

NAND_ALE

NAND_CLE

R63

2.7K

R41

2.7K

R39

2.7K

READY

R57

2.7K

READY

R56

2.7K

READY

R40

2.7K

READY

R45

2.7K

READY

R42

2.7K

R44

2.7K

R43

2.7K

READY

C10

0.1uF

C13

0.1uF

NAND_CLE

NAND_RB

D3.3V

NAND_DATA[0-7]

NAND_ALE

NAND_CE

D3.3V

NAND_RE

C12

10uF 6.3V

D3.3V

NAND_WE

R14 4.7K

R23 0

SW10

SKHMPWE010

12

4 3

5

R22

10K

SYS_RESET

R19 0

READY

D3.3V

D3.3V

IC103

KIA7029AF

2

G

3

O

1

I

D3.3V

R17

10K

READY

SOC_RESET

SUB_SDA

R1170

R104 10K

+3.3V_NEC_ST

EDID_WP

NEC_ISP_RXD

NEC_RXD

C21

0.1uF

16V

R156

100K

RL_ON

IC701

UPD78F0513AGA-GAM-AX

1

P60/SCL0

2

P61/SDA0

3

P62/EXSCL0

4

P63

5

P33/TI51/TO51/INTP4

6

P75

7

P74

8

P73/KR3

9

P72/KR2

10

P71/KR1

11

P70/KR0

12

P32/INTP3/OCD1B

13

P31/INTP2/OCD1A

14

P30/INTP1

15

P17/TI50/TO50

16

P16/TOH1/INTP5

17

P15/TOH0

18

P14/RXD6

19

P13/TXD6

20

P12/SO10

21

P11/SL10/RXD0

22

P10/SCK10/TXD0

23

AVREF

24

AVSS

25

ANI7/P27

26

ANI6/P26

27

ANI5/P25

28

ANI4/P24

29

ANI3/P23

30

ANI2/P22

31

ANI1/P21

32

P20/ANI0

33

P130

34

P01/TI010/TO00

35

P00/TI000

36

P140/PCL/INTP6

37

P120/INTP0/EXLVI

38

P41

39

P40

40

RESET

41

P124/XT2/EXCLKS

42

P123/XT1

43

FLMD0

44

P122/X2/EXCLK/OCD0B

45

P121/X1/OCD0A

46

REGC

47

VSS

48

VDD

R109

22

C19

0.1uF

5V_ON

R1190

KEY1

+3.3V_NEC_ST

+3.3V_NEC_ST

C24

0.1uF

16V

FLMD0

FLMD0

001:F5;001:H5

AC_DET

MODEL1_OPT_2

R161 10K

R111

0

RESET_NEC

001:F4

LED_RED

R16 9 22

MODEL1_OPT_0

R17 3 22

LED_BREATHING

R17 0 22

1.2V_1.8V_EN

R112

4.7K

R116

22

R83

47K

1/10W

5%

OCD1B

R166 0

NEC_ISP_TXD

R163 22

R113

4.7K

R115

22

R82

10K

R168 0

R107

10K

X11

32.768KHz

TXC

C20

0.1uF

ERROR_DET

KEY1

NEC_TXD

R162 22

OCD1B

MODEL1_OPT_3

IR_NEC

R171 0

LED_WHITE

R110 0

RESET_NEC

R160 0

SOC_RESET

NEC_ISP_RXD

R114 0

R120 0

R17 2 22

R167 0

HDMI_CEC

MODEL1_OPT_1

SUB_SCL

KEY2

+3.3V_NEC_ST

NEC_ISP_TXD

+3.3V_NEC_ST

WIRELESS_PWR_EN

R108

22

D3.3V

FLMD0

P11

12505WS-12A00

1

2

3

4

5

6

7

8

9

10

11

12

13

WIRELESS_DETECT

R32 10K

PK50/PK90

R38 10K

PK50/PK70

R29 100

MODEL1_OPT_2

R37 10K

PK90

R35 10K

READY

DISP_EN

AMP_RESET_N

+3.3V_NEC_ST

MODEL1_OPT_1

MODEL1_OPT_0

R34 10K

READY

MODEL1_OPT_3

R31 10K

PK70

R30 100

R36 10K

READY

R33 10K

READY

R26

10K

NEC_ISP_RXD

OCD1B

R25

10K

R28

10K

NEC_ISP_TXD

+3.3V_NEC_ST

R27

10K

D3.3V

SIDEAV_DET

FE_TS_VAL

TUNER_RESET

MODEL_OPT_5

MODEL_OPT_1

BCM_TX

MODEL_OPT_3

AUD_MASTER_CLK

SDA3_3.3V

DDC_SCL

R138

22

SCL1_3.3V

NAND_DATA[0-7]

SCL0_3.3V

NAND_CE

DDC_SDA

D3.3V

R102

22

R130 100

NAND_ALE

/RST_HUB

NAND_WE

R129 100

SDA2_3.3V

R136

0

RF_BOOSTER

SDA1_3.3V

R103 22

BT_RESET

SCL2_3.3V

R132

0

COMP1_SW

D3.3V

SCL3_3.3V

R84

22

DSUB_DET

EPHY_LINK

R89

22

NAND_RE

NAND_RB

NAND_CLE

EPHY_ACTIVE_Y

R92

100

MODEL_OPT_2

MODEL_OPT_0

SDA0_3.3V

R121 22

R78

33

BCM_RX

MODEL_OPT_4

X10

10MHz

C18

12pF

C17

12pF

R74 1K

R70 1K

READY

R73 1K

READY

R53 100

D3.3V

MODEL_OPT_1

R64 1K

MODEL_OPT_4

R55 100

MODEL_OPT_2

R59 1K

READY

R65 1K

R54 100

MODEL_OPT_3

R68 1K

R71 1K

READY

R66 1K

MODEL_OPT_5

BT_ON/OFF

R60 1K

READY

R72 1K

READY

R69 1K

R67 100

MODEL_OPT_0

OCD1A

OCD1A

OCD1A

R81

10K

WIRELESS_DL_TX

WIRELESS_DL_RX

R13

0

READY

VREG_CTR

SDA1_3.3V

SCL1_3.3V

RESET

SCL3_3.3V

SDA3_3.3V

R49

2.7K

READY

R46

2.7K

R47

2.7K

R50

2.7K

READY

R62

2.7K

R61

2.7K

R48

2.7K

R51

2.7K

R52

2.7K

READY

R12

10K

R153

2.2K

R152

2.2K

R151

4.7K

READY

R150

4.7K

READY

R149

4.7K

R148

4.7K

P10

12505WS-06A00

1

2

3

4

5

6

7

MOD_ROM_TX

MOD_ROM_RX

R10 2.7K

R77

2.7K

R80 2.7K

R79 2.7K

R11 2.7K

C11

22uF

16V

C15

0.1uF

16V

R24

0

READY

R175

4.7K

READY

R174

4.7K

READY

R124

0

R137 0

R123 0

R58

2.7K

READY

R18

910

R15

330

WATCH_DOG_RESET

COMP2_SW

COMPOSITE1_SW

R155

4.7K

R154

4.7K

R157

3K

R118100

R164100

R165 0

RF_SWITCH_CTL

HDMI_HPD_4

008:R29

+3.3V_EN

R176 0

R177

0

R20 10

R21 10

HDMI_HPD_1

008:H29

HDMI_HPD_3

008:H10

HDMI_HPD_2

008:H20

R122 1K

R125 1K

R127

1K

R95

1K

HDMI_POWER_1

HDMI_POWER_2

HDMI_POWER_3

HDMI_POWER_4

FLASH_WP

Q10

KRC103S

FLASH_WP

E

B

C

FLASH_WP

R131

0

R87

0

READY

R94 0

R86 0

R88

0

READY

R96

0

R97

0

R98

0

R139

0

R147

100

R178 0

R179 100

IC500

NAND04GW3B2DN6E

26

NC_17

27

NC_18

28

NC_19

29

I/O0

30

I/O1

31

I/O2

32

I/O3

33

NC_20

34

NC_21

35

NC_22

36

VSS_2

37

VDD_2

38

NC_23

39

NC_24

40

NC_25

41

I/O4

42

I/O5

43

I/O6

44

I/O7

45

NC_26

46

NC_27

47

NC_28

48

NC_29

17

AL

3

NC_3

6

NC_6

16

CL

15

NC_10

14

NC_9

13

VSS_1

12

VDD_1

11

NC_8

10

NC_7

9

E

8

R

7

RB

4

NC_4

5

NC_5

25

NC_16

24

NC_15

23

NC_14

2

NC_2

22

NC_13

21

NC_12

1

NC_1

20

NC_11

19

WP

18

W

DEMOD_RESET

R180 0

READY

R181 0

READY

R158

120K

1/16W

1%

R159

100K

1/16W

1%

C22

22pF

50V

TXC

C23

27pF

50V

TXC

C25

0.1uF

R182

4.7M

1/8W

5%

R183 0

R184 0

R185 0

R186 0

FLASH_WP

C14

0.1uF

R187

0

X11-*1

32.768KHz

KDS

C22-*1

15pF

50V

KDS

C23-*1

15pF

50V

KDS

IC14

M24C16-WMN6T

0IMMRSG036B

3

NC/E2

E2

2

NC/E1

E1

4

VSS

GND

1

NC/E0

NC

5

SDA

SDA

6

SCL

SCL

7

WC

WC

8

VCC

VCC

IC102

M24M01-HRMN6TP

3

E2

2

E1

4

VSS

1

NC

5

SDA

6

SCL

7

WP

8

VCC

/3D_FPGA_RESET

L/R_DETECT

R190

0

R191

0

R192

0

READY

R193

0

READY

IC100

LGE3556CP (C0 3D PIP)

GPIO_00

N26

GPIO_01

L26

GPIO_02

N25

GPIO_03

L25

GPIO_04

K27

GPIO_05

K28

GPIO_06

K24

GPIO_07

K26

GPIO_08

K25

GPIO_09

AA27

GPIO_10

AA28

GPIO_11

AA26

GPIO_12

L1

GPIO_13

L3

GPIO_14

L2

GPIO_15

Y25

GPIO_16

Y26

GPIO_17

M27

GPIO_18

AA25

GPIO_19

R25

GPIO_20

N28

GPIO_21

N27

GPIO_22

AH18

GPIO_23

P23

GPIO_24

M23

GPIO_25

AD19

GPIO_26

AE19

GPIO_27

M4

GPIO_28

M5

GPIO_29

L23

GPIO_30

Y28

GPIO_31

Y27

GPIO_32

G2

GPIO_33

G3

GPIO_34

G5

GPIO_35

G6

GPIO_36

G4

GPIO_37

L24

GPIO_38

P25

GPIO_39

L5

GPIO_40

K4

GPIO_41

K1

GPIO_42

L27

GPIO_43

M26

GPIO_44

N23

GPIO_45

R28

GPIO_46

R27

GPIO_47

R26

GPIO_48

P28

GPIO_49

P27

GPIO_50

K6

GPIO_51

K5

GPIO_52

P26

GPIO_53

M3

GPIO_54

M2

GPIO_55

M1

GPIO_56

L4

GPIO_57

L6

SGPIO_00

W27

SGPIO_01

W28

SGPIO_02

W26

SGPIO_03

W25

SGPIO_04

J2

SGPIO_05

J1

SGPIO_06

K3

SGPIO_07

K2

EBI_ADDR3

J23

EBI_ADDR4

J24

EBI_ADDR2

H25

EBI_ADDR1

H24

EBI_ADDR0

H23

EBI_ADDR5

J25

EBI_ADDR6

F26

EBI_ADDR8

H28

EBI_ADDR9

J26

EBI_ADDR13

H27

EBI_ADDR12

G26

EBI_ADDR11

J27

EBI_ADDR10

J28

EBI_ADDR7

F27

EBI_TAB

G24

EBI_WE1B

H26

EBI_CLK_IN

G27

EBI_CLK_OUT

G28

EBI_RWB

K23

EBI_CS0B

G25

NAND_DATA0

U24

NAND_DATA1

T26

NAND_DATA2

T27

NAND_DATA3

U26

NAND_DATA4

U27

NAND_DATA5

V26

NAND_DATA6

V27

NAND_DATA7

V28

NAND_CS0B

T24

NAND_ALE

R23

NAND_REB

T23

NAND_CLE

T25

NAND_WEB

R24

NAND_RBB

U25

SF_MISO

W24

SF_MOSI

U23

SF_SCK

V23

SF_CSB

V24

E_TDO

R195 0

FPGA_D/L

E_TCK

E_TMS

E_TDI

R199 0

R196

0

SYSTEM EEPROM

Boot Strap

1 13

NAND_IO[0] : Flash Select (1)

0 : Boot From Serial Flash

1 : Boot From NAND Flash

NAND_IO[1] : NAND Block 0 Write (0)

0 : Enable Block 0 Write

1 : Disable Block 0 Write

NAND_IO[3:2] : NAND ECC (1,0)

00 : No ECC

01 : 1 ECC Bit

10 : 4 ECC Bit

11 : 8 ECC Bit

NAND_IO[4] : CPU Endian (0)

0 : Little Endian

1 : Big Endian

NAND_IO[6:5] : Xtal Bias Control (1,0)

00 : 1.2mA

01 : 1.8mA

10 : 2.4mA (Recommand)

11 : 3.0mA

NAND_IO[7] : MIPS Frequency (0)

0 : 405MHz

1 : 378MHz

NAND_ALE : I2C Level (0)

0 : 3.3V Switching

1 : 5V Switching

NAND_CLE

0 : Enable D2CDIFF AC (Dns)

1 : Disable D2CDIFF AC

Debugging for AVC

BCM REVIEW

NAND FLASH MEMORY 4G BIT FOR BBTV

Open Drain

RESET

FOR JDEG

ISP Port for SUB MICOM

NEC SUB MICOM

CHECK PIN!!

PIN NAME

MICOM MODEL OPTION

MODEL_OPT_0

PK50/PK90

30

8

MODEL OPTION

PK70

MODEL_OPT_3

HIGH

11

MODEL_OPT_2

MODEL_OPT_1

PK90 PK50/PK70

PIN NO. LOW

31

NEC CONFIGURATION

* I2C_0 : TUNER

* I2C_1 : HDMI MUX, DEMOD, WIERLESS-JACK

* I2C_2 : NEC, AMP, (NVRAM)

* I2C_3 : SYSYEM EEPROM, MODULE

* I2C MAP

G19

MODEL_OPT_3

F7

B6

PIN NAME

MODEL_OPT_1

HD

PIN NO.

MODEL OPTION

MODEL_OPT_5

E18

LOWHIGH

C5

MODEL OPTION

FHD

MODEL_OPT_2

MODEL_OPT_4

MODEL_OPT_0

D18

A8’h‘

NOT USE

NOT USE

DDR 512MB

NOT USE

120KOhm 1%

100KOhm 1%

0

MODEL_OPT_3

0

RED ONLY

1

MODEL_OPT_0

01

ADD BREATHINGRED & WHITE

0

DDR 256MB

LOW

HIGH

HIGH

chassis option

OPT 1

LOW

LOW

OPT 5

LOW

HIGH

HIGH

BRAZIL

EURO

AUSTRALIA

replacement micom eeprom p/n : EAN61146201

replacement nvram p/n : EAN61086701

READY

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM AUDIO/LVDS

08/10/27

EAX63347201

Q200

2N7002(F)

G

D

S

R25 1

22

R24 4

22

D3.3V

R241

0

R246

4.7K

R245

4.7K

Q201

2N7002(F)

G

D

S

R253

4.7K

R254

0

R25 6

22

R255

4.7K

D3.3V

R25 2

22

C224

0.1uF

16V

L201

BLM18PG121SN1D

A1.2V

EPHY_RDN

54MHz_XTAL_N

54MHz_XTAL_N

002:H1

C221

0.1uF

C25 2

0.1 uF

C223

0.1uF

R213

3.9K

C202

100pF

D3.3V

A3.3V

EPHY_TDP

L208

BLM18PG121SN1D

A2.5V

C22 6 0.1u F

EPHY_TDN

C251

10uF

READY

D3.3V

C26 5

0.1 uF

L203

BLM18PG121SN1D

R248

22

A3.3V

R250

22

C229

0.1uF

C222

0.01uF

EPHY_RDP

C220

0.1uF

A2.5V

R218

1K

P200

TJC2508-4A

1

2

3

4

C219

0.1uF

C268

12pF

C232

0.1uF

C25 5

0.1 uF

R214

120

A2.5V

R220

390

READY

A1.2V

A2.5V

L205

BLM18PG121SN1D

C25 3

0.1 uF

54MHz_XTAL_P

002:H1

A2.5V

R212 560

C250

10uF

54MHz_XTAL_P

L202

BLM18PG121SN1D

A1.2V

R200

1.5K

C22 5 0.1u F

FE_TS_CLK

A1.2V

D3.3V

C269

12pF

FE_TS_SYN

L210

1008LS-272XJLC

R217

240

A2.5V

A1.2V

C22 7 0.1 uF

R211

1.5K

L206

BLM18PG121SN1D

D3.3V

X200

54MHz

21

3

C267

33pF

R249

604

C23 0 0.1 uF

FE_TS_SERIAL

C262

0.1uF

L204

BLM18PG121SN1D

C26 3

0.1 uF

SYS_RESET

001:D3

A1.2V

C249

0.1uF

A1.2V

C261

10uF

L209

BLM18PG121SN1D

C26 0

0.1 uF

A2.5V

A1.2V

C25 9

0.1 uF

A1.2V

L207

BLM18PG121SN1D

C257

0.1uF

JTAG_TMS

/JTAG_TRST

JTAG_TCLK

JTAG_TDO

JTAG_TDI

DISP_EN

P202

TF05-51S

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

MOD_ROM_TX

R242100

MOD_ROM_RX

R243

27K

PC_SER_CLK

PC_SER_DATA

LVDS_TX_1_DATA1_N

LVDS_TX_0_DATA3_N

LVDS_TX_1_DATA2_P

LVDS_TX_0_CLK_P

LVDS_TX_0_DATA2_P

LVDS_TX_1_DATA4_N

LVDS_TX_1_DATA1_P

LVDS_TX_0_DATA2_N

LVDS_TX_1_DATA4_P

LVDS_TX_0_CLK_N

LVDS_TX_0_DATA1_P

LVDS_TX_1_CLK_P

LVDS_TX_1_DATA3_N

LVDS_TX_0_DATA4_N

LVDS_TX_0_DATA0_P

LVDS_TX_0_DATA0_N

LVDS_TX_1_DATA0_N

LVDS_TX_1_CLK_N

LVDS_TX_1_DATA0_P

LVDS_TX_1_DATA2_N

LVDS_TX_0_DATA4_P

LVDS_TX_0_DATA3_P

LVDS_TX_1_DATA3_P

LVDS_TX_0_DATA1_N

LVDS_TX_0_DATA1_P

LVDS_TX_0_DATA3_P

LVDS_TX_1_DATA3_N

LVDS_TX_1_DATA2_N

LVDS_TX_0_DATA0_N

LVDS_TX_1_CLK_N

LVDS_TX_0_DATA2_N

LVDS_TX_1_DATA4_P

LVDS_TX_1_DATA1_P

LVDS_TX_1_DATA3_P

LVDS_TX_0_DATA3_N

LVDS_TX_0_DATA4_N

LVDS_TX_0_DATA4_P

LVDS_TX_1_DATA2_P

LVDS_TX_1_CLK_P

LVDS_TX_0_CLK_P

LVDS_TX_1_DATA4_N

LVDS_TX_0_CLK_N

LVDS_TX_0_DATA1_N

LVDS_TX_1_DATA1_N

LVDS_TX_0_DATA2_P

LVDS_TX_0_DATA0_P

LVDS_TX_1_DATA0_P

LVDS_TX_1_DATA0_N

SCL3_3.3V

001:B3;001:I4

SDA3_3.3V

001:B3;001:I4

USB_DP

BT_DP

BT_DM

USB_DM

R232

1K

D3.3V

JTAG_TDO

002:D4

R234

1K

RESET

001:C3

JTAG_TMS

002:D4

R235

1K

JTAG_TCLK

002:D4

JTAG_TDI

002:D4

/JTAG_TRST

002:D4

P201

YFDW254-14S

READY

14

VIO

9

TCK

4

GND

13

DINT

8

GND

3

TDI

12

NC

7

TMS

2

GND

11

nRST

6

GND

1

nTRST

10

GND

5

TDO

R237

1K

R233

1K

R240 1K

R238

1K

R236

1K

READY

R230

2.7K

READY

R223

2.7K

R216 2.7K

PK950

WATCH_DOG_RESET

001:D3

R224

2.7K

READY

R231

2.7K

R207 49.9

C214

0.15uF

R202 49.9

COMP_R_IN_2

010:Q23

C203

0.015uF

R206 49.9

R204 49.9

R209 49.9

C241

0.047uF

C211

0.015uF

C236

0.047uF

R203 49.9

C207

0.015uF

AV_R_IN_1

010:K25

C213

0.15uF

AV1_INCM

002:D5

C206

0.015uF

R201 49.9

AV_L_IN_1

010:K24

C217

0.15uF

R205 49.9

C215

0.15uF

C242

0.047uF

R208 49.9

C239

0.047uF

C237

0.047uF

C243

0.047uF

C235

0.047uF

C240

0.047uF

SIDE_INCM

002:D5

PC_INCM

002:D6

R210 49.9

C238

0.047uF

C210

0.015uF

COMP_L_IN_2

010:Q22

COMP2_INCM

002:D6

C204

0.015uF

C205

0.015uF

COMP1_INCM

002:D5

C216

0.15uF

C209

0.015uF

C234

0.047uF

C212

0.015uF

C208

0.015uF

SIDE_LIN

PC_L_IN

COMP_L_IN_1

PC_R_IN

COMP_R_IN_1

SIDE_RIN

TP213

TP211

TP212

SIDE_INCM

R225

5.1

R229

5.1

R227

5.1

R226

5.1

R228

5.1

COMP1_INCM

AV1_INCM

PC_INCM

TP214

COMP2_INCM

TP210

R2212.7K

R2222.7K

D3.3V

R239

3.3K

R247

3.3K

C200

4.7uF

C201

4.7uF

C228 4.7uF

C231

4.7uF

C218

4.7uF

C233

4.7uF

C258

4.7uF

C264

4.7uF

C254

4.7uF

C256

4.7uF

C266

4.7uF

C246 0.47uF

C248 0.47uF

C247 0.47uF

C244

0.47uF

C245

0.47uF

L200

BLM18PG121SN1D

R219

2.7K

USB1_CTL

USB1_OCD

R1227

0

PK550

3D_SYNC_OUT

L/R_DETECT

R257 0

/3D_FPGA_RESET

L211

CB4532UK121E

EAM38058401

P_+5V

R25822

READY

R25922

READY

LGE3556CP (C0 3D PIP)

IC100

PKT0_CLK

D23

PKT0_DATA

C24

PKT0_SYNC

B26

RMX0_CLK

A25

RMX0_DATA

B25

RMX0_SYNC

A26

POD2CHIP_MCLKI

G23

POD2CHIP_MDI0

D25

POD2CHIP_MDI1

D24

POD2CHIP_MDI2

C25

POD2CHIP_MDI3

E27

POD2CHIP_MDI4

E26

POD2CHIP_MDI5

D28

POD2CHIP_MDI6

D27

POD2CHIP_MDI7

D26

POD2CHIP_MISTRT

E23

POD2CHIP_MIVAL

E24

CHIP2POD_MCLKO

F25

CHIP2POD_MDO0

C27

CHIP2POD_MDO1

C26

CHIP2POD_MDO2

B28

CHIP2POD_MDO3

B27

CHIP2POD_MDO4

A27

CHIP2POD_MDO5

F24

CHIP2POD_MDO6

F23

CHIP2POD_MDO7

E25

CHIP2POD_MOSTRT

C28

CHIP2POD_MOVAL

A28

VDAC_AVDD2P5

AC18

VDAC_AVDD1P2

AF20

VDAC_AVDD3P3_1

AG20

VDAC_AVDD3P3_2

AG21

VDAC_AVSS_1

AF19

VDAC_AVSS_2

AD20

VDAC_AVSS_3

AE20

VDAC_RBIAS

AH22

VDAC_1

AH20

VDAC_2

AG19

VDAC_VREG

AH21

BSC_S_SCL

M25

BSC_S_SDA

M24

USB_AVSS_1

R6

USB_AVSS_2

T6

USB_AVSS_3

R7

USB_AVSS_4

T7

USB_AVSS_5

T8

USB_AVDD1P2

R3

USB_AVDD1P2PLL

U3

USB_AVDD2P5

T4

USB_AVDD2P5REF

T3

USB_AVDD3P3

R4

USB_RREF

U4

USB_DM1

V1

USB_DP1

V2

USB_DM2

U1

USB_DP2

U2

USB_MONCDR

T5

USB_MONPLL

R5

USB_PWRFLT_1

R1

USB_PWRFLT_2

R2

USB_PWRON_1

T2

USB_PWRON_2

T1

EPHY_VREF

P6

EPHY_RDAC

P5

EPHY_RDN

P3

EPHY_RDP

P2

EPHY_TDN

N3

EPHY_TDP

N2

EPHY_AVDD1P2

P1

EPHY_AVDD2P5

P4

EPHY_PLL_VDD1P2

N4

EPHY_AGND_1

N1

EPHY_AGND_2

N5

EPHY_AGND_3

P7

AUDMX_LEFT1

AE6

AUDMX_RIGHT1

AD7

AUDMX_INCM1

AF6

AUDMX_LEFT2

AH4

AUDMX_RIGHT2

AG5

AUDMX_INCM2

AG4

AUDMX_LEFT3

AG6

AUDMX_RIGHT3

AF7

AUDMX_INCM3

AE7

AUDMX_LEFT4

AH5

AUDMX_RIGHT4

AG7

AUDMX_INCM4

AH6

AUDMX_LEFT5

AD8

AUDMX_RIGHT5

AF8

AUDMX_INCM5

AE8

AUDMX_LEFT6

AH7

AUDMX_RIGHT6

AH8

AUDMX_INCM6

AG8

AUDMX_AVSS_1

AF5

AUDMX_AVSS_2

AB9

AUDMX_AVSS_3

AA10

AUDMX_AVSS_4

AB10

AUDMX_AVSS_5

AA11

AUDMX_AVSS_6

AB11

AUDMX_LDO_CAP

AC8

AUDMX_AVDD2P5

AE5

LVDS_TX_0_DATA0_P

B4

LVDS_TX_0_DATA0_N

A4

LVDS_TX_0_DATA1_P

C6

LVDS_TX_0_DATA1_N

B6

LVDS_TX_0_DATA2_P

B3

LVDS_TX_0_DATA2_N

A3

LVDS_TX_0_DATA3_P

A1

LVDS_TX_0_DATA3_N

A2

LVDS_TX_0_DATA4_P

D5

LVDS_TX_0_DATA4_N

D6

LVDS_TX_0_CLK_P

C5

LVDS_TX_0_CLK_N

B5

LVDS_TX_1_DATA0_P

B1

LVDS_TX_1_DATA0_N

B2

LVDS_TX_1_DATA1_P

C2

LVDS_TX_1_DATA1_N

C3

LVDS_TX_1_DATA2_P

D1

LVDS_TX_1_DATA2_N

D2

LVDS_TX_1_DATA3_P

E1

LVDS_TX_1_DATA3_N

E2

LVDS_TX_1_DATA4_P

E3

LVDS_TX_1_DATA4_N

E4

LVDS_TX_1_CLK_P

D3

LVDS_TX_1_CLK_N

D4

LVDS_PLL_VREG

F5

LVDS_TX_AVDDC1P2

F1

LVDS_TX_AVDD2P5_1

F4

LVDS_TX_AVDD2P5_2

F2

LVDS_TX_AVSS_1

C1

LVDS_TX_AVSS_2

F3

LVDS_TX_AVSS_3

C4

LVDS_TX_AVSS_4

A5

LVDS_TX_AVSS_5

E5

LVDS_TX_AVSS_6

E6

LVDS_TX_AVSS_7

D7

LVDS_TX_AVSS_8

E7

LVDS_TX_AVSS_9

F7

LVDS_TX_AVSS_10

G7

LVDS_TX_AVSS_11

H7

CLK54_AVDD1P2

AD27

CLK54_AVDD2P5

AD28

CLK54_AVSS

AD26

CLK54_XTAL_N

AC26

CLK54_XTAL_P

AC27

CLK54_MONITOR

AE25

PM_OVERRIDE

Y23

VCXO_AGND_1

AA23

VCXO_AGND_2

AB24

VCXO_AGND_3

AC24

VCXO_AVDD1P2

AF25

VCXO_PLL_AUDIO_TESTOUT

AF24

RESET_OUTB

P24

RESETB

F6

NMIB

N24

TMODE_0

J5

TMODE_1

J4

TMODE_2

J6

TMODE_3

J3

SPI_S_MISO

V25

POR_OTP_VDD2P5

AH3

POR_VDD1P2

AB8

EJTAG_TCK

H4

EJTAG_TDI

H3

EJTAG_TDO

H2

EJTAG_TMS

H1

EJTAG_TRSTB

G1

EJTAG_CE0

H6

EJTAG_CE1

H5

PLL_MAIN_AVDD1P2

AB26

PLL_MAIN_AGND

AC25

PLL_MAIN_MIPS_EREF_TESTOUT

AB27

PLL_RAP_AVD_TESTOUT

M6

PLL_RAP_AVD_AVDD1P2

N6

PLL_RAP_AVD_AGND

N7

BYP_CPU_CLK

AA24

BYP_DS_CLK

Y24

BYP_SYS216_CLK

AE24

BYP_SYS175_CLK

AD25

E_TDI

R260

0

R261

0

E_TMS

R262

0

E_TCK

R263

0

E_TDO

FPGA_D/L

R264

0

2 13

54MHz X-TAL

AUDIO INCM-TP

PLACE NEAR JACKS

BROAD BAND STUDIO

FHD

LVDS

USB HUB

EJTAG

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

08/10/xx

BCM VIDEO IN/BCM POWER 3 13

EAX63347201

SPDIF_OUT

010:AE6

D3.3V

10K

R341

D1.8V

R335

10K

R339

10K

C389

0.01uF

C312

1000pF

C307

0.1uF

C386

1000pF

HDMI0_RXC-_BCM

008:AA19

A2.5V

C3011

0.1uF

16V

C3005

0.1uF

16V

C367

1000pF

C3006

0.1uF

A3.3V

C381

0.01uF

R333499

A1.2V

R340 10K

HDMI0_RX1+_BCM

008:AC19

C357

0.1uF

C335

0.1uF

A1.2V

R344

20

C3003

0.1uF

A1.2V

A2.5V

C372

1000pF

HDMI0_RX2+_BCM

008:AC19

C344

1000pF

C385

0.01uF

C3000

0.1uF

16V

C388

0.01uF

A2.5V

C323

0.01uF

L305

BLM18PG121SN1D

C358

10uF

C382

0.01uF

C309

0.1uF

C396

0.1uF

16V

D1.8V

R332

10K

AUD_LRCK

AUD_LRCH

C354

0.1uF

C3019

33uF

C362

10uF

C359

10uF

C3013

0.01uF

HDMI_SCL

008:AA19

L307

BLM18PG121SN1D

C3020

0.1uF

16V

RGB_VSYNC

C398

1000pF

L303

BLM18PG121SN1D

R330499

READY

L302 BLM18PG121SN1D

A2.5V

A1.2V

C390

1000pF

HDMI_SDA

008:AA19

C370

0.1uF

C373

1000pF

D3.3V

C392

0.01uF

C393

0.01uF

C391

0.1uF

C3010

1000pF

R331

1K

READY

C360

10uF

R3430

HDMI0_RX0-_BCM

008:AB19

C337

0.1uF

HDMI0_RX0+_BCM

008:AB19

C377

0.01uF

RGB_HSYNC

C341

0.1uF

C350

0.1uF

C352

0.01uF

A2.5V

L300

BLM18PG121SN1D

C364

33uF

C369

1000pF

C3018

10uF

C378

1000pF

HDMI0_RX2-_BCM

008:AC19

A2.5V

C375

1000pF

C324

0.1uF

A3.3V

C349

0.1uF

D3.3V

C356

0.1uF

C3002

10uF

10V

D1.2V

A1.2V

C339

1000pF

AUD_SCK

C347

0.01uF

L304

BLM18PG121SN1D

C311

0.1uF

L308

BLM18PG121SN1D

C3017

0.1uF

16V

C346

0.01uF

C3014

0.1uF

16V

C3008

0.1uF

16V

C327

0.01uF

C376

0.1uF

A1.2V

C355

0.1uF

C361

10uF

C334

0.1uF

C3004

0.1uF

L301

BLM18PG121SN1D

C368

0.01uF

D1.8V

C365

0.1uF

16V

L306

BLM18PG121SN1D

C379

1000pF

HDMI0_RXC+_BCM

008:AA19

C380

0.1uF

C394

0.1uF

16V

C306

0.1uF

C343

0.01uF

C348

0.01uF

D1.2V

C340

1000pF

C399

0.1uF

C353

0.1uF

C371

0.1uF

C325

1000pF

C397

0.1uF

D1.2V

D1.8V

C363

10uF

C345

0.01uF

C384

0.1uF

C3016

0.1uF

A3.3V

C3001

0.01uF

C351

10uF

R3420

HDMI0_RX1-_BCM

008:AB19

C366

33uF

TP307

C3000.1uF

RGB_G

009:E20

COMP2_Pb

010:Q19

C314

0.1uF

R328

75

COMP1_Y

010:X11

C302

0.1uF

TP308

RGB_R

009:E19

COMP2_Y

010:Q17

COMP1_Pr

010:X14

TP306

C315

0.1uF

COMP2_Pr

010:Q20

C3040.1uF

R304

36

R303 36

R322

75

C322

0.1uF

R305

36

R319

75

R329

75

C317 0.1uF

R302 36

R31 8

82

C316

0.1uF

TP305

C318

0.1uF

R306

36

C319

0.1uF

C321

0.1uF

TP302

R32 0

82

R324

75

RGB_B

009:E22

R323

75

C303

0.1uF

COMP1_Pb

010:X13

C305

0.1uF

R325

75

C320 0.1uF

R327

12K

TU_SIF

006:AE24

R317

240

A2.5V

R300

120

C301

0.1uF

R312

12K

A2.5V

R326

10K

R311

10K

C308

0.1uF

R315

0

R33622

R33822

R33722

R334 0

C310

4.7uF

C313

4.7uF

C326

4.7uF

C338

4.7uF

C342

4.7uF

C336

4.7uF

C374

4.7uF

C383

4.7uF

C387

4.7uF

C395

4.7uF

C3007

4.7uF

C3009

4.7uF

C3012

4.7uF

C3015

4.7uF

TP300

R321

75

R313

56

READY

C332

0.1uFC333

0.1uF

C328 0.1uF

C331

0.1uF

COMPOSITE2_IN

010:K8

R308

0

TP301

TP303

R310

36

TP304

R301

36

R309

0

R316

75

R314

36

TU_CVBS

006:AE21

COMPOSITE1_IN

010:K23

R307

0

C329 0.1uF

C330 0.1uF

P_+5V

P_+5V

LGE3556CP (C0 3D PIP)

IC100

DS_AGCI_CTL

AG28

DS_AGCT_CTL

AH28

EDSAFE_AVSS_1

AA21

EDSAFE_AVSS_2

AB22

EDSAFE_AVSS_3

AF26

EDSAFE_AVSS_4

AF27

EDSAFE_AVSS_5

AF28

EDSAFE_AVDD2P5

AG27

EDSAFE_DVDD1P2

AE26

EDSAFE_IF_N

AE28

EDSAFE_IF_P

AE27

PLL_DS_AGND

AD24

PLL_DS_AVDD1P2

AB19

PLL_DS_TESTOUT

AB25

SD_V5_AVDD1P2

AB18

SD_V5_AVDD2P5

AC17

SD_V5_AVSS

AB17

SD_V1_AVDD1P2

AD14

SD_V1_AVDD2P5

AD16

SD_V1_AVSS_1

AB15

SD_V1_AVSS_2

AC15

SD_V2_AVDD1P2

AD13

SD_V2_AVDD2P5

AE13

SD_V2_AVSS_1

AC13

SD_V2_AVSS_2

AB14

SD_V2_AVSS_3

AC14

SD_V3_AVDD1P2

AC12

SD_V3_AVDD2P5

AD12

SD_V3_AVSS_1

AB13

SD_V3_AVSS_2

AA14

SD_V4_AVDD1P2

AC11

SD_V4_AVDD2P5

AD11

SD_V4_AVSS

AB12

SD_R

AD10

SD_INCM_R

AC10

SD_G

AE9

SD_INCM_G

AF9

SD_B

AH9

SD_INCM_B

AG9

SD_Y1

AG15

SD_PR1

AE15

SD_PB1

AF15

SD_INCM_COMP1

AH15

SD_Y2

AG16

SD_PR2

AF16

SD_PB2

AH17

SD_INCM_COMP2

AH16

SD_Y3

AG14

SD_PR3

AE14

SD_PB3

AF14

SD_INCM_COMP3

AH14

SD_L1

AH10

SD_C1

AG10

SD_INCM_LC1

AE10

SD_L2

AE11

SD_C2

AF11

SD_INCM_LC2

AH11

SD_L3

AH13

SD_C3

AE12

SD_INCM_LC3

AF12

SD_CVBS1

AD9

SD_CVBS2

AG11

SD_CVBS3

AG12

SD_CVBS4

AF13

SD_INCM_CVBS1

AC9

SD_INCM_CVBS2

AF10

SD_INCM_CVBS3

AH12

SD_INCM_CVBS4

AG13

SD_SIF1

AF17

SD_INCM_SIF1

AG17

SD_FB

AD15

SD_FS

AE16

SD_FS2

AE17

PLL_VAFE_AVDD1P2

AB16

PLL_VAFE_AVSS

AA15

PLL_VAFE_TESTOUT

AC16

RGB_HSYNC

AG3

RGB_VSYNC

AF4

I2S_CLK_IN

AE18

I2S_CLK_OUT

AF18

I2S_DATA_IN

AD17

I2S_DATA_OUT

AH19

I2S_LR_IN

AD18

I2S_LR_OUT

AG18

AUD_LEFT0_N

AG26

AUD_LEFT0_P

AH26

AUD_AVDD2P5_0

AF23

AUD_AVSS_0_1

AA20

AUD_AVSS_0_2

AB21

AUD_AVSS_0_3

AC22

AUD_AVSS_0_4

AC23

AUD_AVSS_0_5

AD23

AUD_RIGHT0_N

AH25

AUD_RIGHT0_P

AG25

AUD_LEFT1_N

AH23

AUD_LEFT1_P

AG23

AUD_RIGHT1_N

AG24

AUD_RIGHT1_P

AH24

AUD_AVDD2P5_1

AE22

AUD_AVSS_1_1

AB20

AUD_AVSS_1_2

AC21

AUD_AVSS_1_3

AE23

AUD_LEFT2_N

AF21

AUD_LEFT2_P

AE21

AUD_RIGHT2_N

AF22

AUD_RIGHT2_P

AG22

AUD_AVDD2P5_2

AD21

AUD_AVSS_2_1

AC20

AUD_AVSS_2_2

AD22

AUD_SPDIF

AH2

SPDIF_AVDD2P5

AC6

SPDIF_AVSS

AE4

SPDIF_IN_N

AF3

SPDIF_IN_P

AH1

HDMI_RX_0_CEC_DAT

AG1

HDMI_RX_0_HTPLG_IN

AA6

HDMI_RX_0_HTPLG_OUT

AA5

HDMI_RX_0_DDC_SCL

AB3

HDMI_RX_0_DDC_SDA

Y6

HDMI_RX_0_RESREF

AC4

HDMI_RX_0_CLK_N

AC1

HDMI_RX_0_CLK_P

AC2

HDMI_RX_0_DATA0_N

AD1

HDMI_RX_0_DATA0_P

AD2

HDMI_RX_0_DATA1_N

AE1

HDMI_RX_0_DATA1_P

AE2

HDMI_RX_0_DATA2_N

AF1

HDMI_RX_0_DATA2_P

AF2

HDMI_RX_0_VDD3P3

AD3

HDMI_RX_0_VDD1P2

AE3

HDMI_RX_0_VDD2P5

AC3

HDMI_RX_0_AVSS_1

AD4

HDMI_RX_0_AVSS_2

AB5

HDMI_RX_0_AVSS_3

AB6

HDMI_RX_0_AVSS_4

AG2

HDMI_RX_0_AVSS_5

AB4

HDMI_RX_0_AVSS_6

AA7

HDMI_RX_0_PLL_AVSS

Y8

HDMI_RX_0_PLL_DVDD1P2

AC5

HDMI_RX_0_PLL_DVSS

W8

HDMI_RX_1_CEC_DAT

AA3

HDMI_RX_1_HTPLG_IN

V4

HDMI_RX_1_HTPLG_OUT

U6

HDMI_RX_1_DDC_SCL

V5

HDMI_RX_1_DDC_SDA

V3

HDMI_RX_1_RESREF

W4

HDMI_RX_1_CLK_N

W2

HDMI_RX_1_CLK_P

W3

HDMI_RX_1_DATA0_N

Y1

HDMI_RX_1_DATA0_P

Y2

HDMI_RX_1_DATA1_N

AA2

HDMI_RX_1_DATA1_P

AA1

HDMI_RX_1_DATA2_N

AB2

HDMI_RX_1_DATA2_P

AB1

HDMI_RX_1_VDD3P3

Y3

HDMI_RX_1_VDD1P2

Y4

HDMI_RX_1_VDD2P5

W5

HDMI_RX_1_AVSS_1

W1

HDMI_RX_1_AVSS_2

U5

HDMI_RX_1_AVSS_3

W6

HDMI_RX_1_AVSS_4

U7

HDMI_RX_1_AVSS_5

V7

HDMI_RX_1_AVSS_6

W7

HDMI_RX_1_AVSS_7

U8

HDMI_RX_1_AVSS_8

V8

HDMI_RX_1_AVSS_9

Y5

HDMI_RX_1_PLL_AVSS

V6

HDMI_RX_1_PLL_DVDD1P2

AA4

HDMI_RX_1_PLL_DVSS

Y7

IC100

LGE3556CP (C0 3D PIP)

VDDC_1

H8

VDDC_2

J8

VDDC_3

K8

VDDC_4

L8

VDDC_5

M8

VDDC_6

N8

VDDC_7

P8

VDDC_8

R8

VDDC_9

AA8

VDDC_10

H9

VDDC_11

H10

VDDC_12

H11

VDDC_13

H12

VDDC_14

H13

VDDC_15

H14

VDDC_16

H15

VDDC_17

H16

VDDC_18

H17

VDDC_19

H18

VDDC_20

H19

VDDC_21

H21

VDDC_22

J21

VDDC_23

K21

VDDC_24

L21

VDDC_25

M21

VDDC_26

N21

VDDC_27

P21

VDDC_28

R21

VDDC_29

T21

VDDC_30

U21

VDDC_31

V21

VDDC_32

W21

VDDC_33

Y21

AGC_VDDO

AH27

VDDO_1

AA12

VDDO_2

AA13

VDDO_3

AA18

VDDO_4

AA19

VDDO_5

E28

VDDO_6

L28

VDDO_7

U28

VDDO_8

AB28

DDRV_1

A9

DDRV_2

G9

DDRV_3

G11

DDRV_4

G13

DDRV_5

A14

DDRV_6

G15

DDRV_7

G17

DDRV_8

A19

DDRV_9

G19

LGE3556CP (C0 3D PIP)

IC100

DVSS_1

AD5

DVSS_2

AD6

DVSS_3

J7

DVSS_4

K7

DVSS_5

L7

DVSS_6

M7

DVSS_7

AB7

DVSS_8

AC7

DVSS_9

G8

DVSS_10

D9

DVSS_11

AA9

DVSS_12

G10

DVSS_13

A11

DVSS_14

L11

DVSS_15

M11

DVSS_16

N11

DVSS_17

P11

DVSS_18

R11

DVSS_19

T11

DVSS_20

U11

DVSS_21

V11

DVSS_22

D12

DVSS_23

G12

DVSS_24

L12

DVSS_25

M12

DVSS_26

N12

DVSS_27

P12

DVSS_28

R12

DVSS_29

T12

DVSS_30

U12

DVSS_31

V12

DVSS_32

L13

DVSS_33

M13

DVSS_34

N13

DVSS_35

P13

DVSS_36

R13

DVSS_37

T13

DVSS_38

U13

DVSS_39

V13

DVSS_40

G14

DVSS_41

L14

DVSS_42

M14

DVSS_43

N14

DVSS_44

P14

DVSS_45

R14

DVSS_46

T14

DVSS_47

U14

DVSS_48

V14

DVSS_49

L15

DVSS_50

M15

DVSS_51

N15

DVSS_52

P15

DVSS_53

R15

DVSS_54

T15

DVSS_55

U15

DVSS_56

V15

DVSS_57

A16

DVSS_58

G16

DVSS_59

L16

DVSS_60

M16

DVSS_61

N16

DVSS_62

P16

DVSS_63

R16

DVSS_64

T16

DVSS_65

U16

DVSS_66

V16

DVSS_67

AA16

DVSS_68

D17

DVSS_69

L17

DVSS_70

M17

DVSS_71

N17

DVSS_72

P17

DVSS_73

R17

DVSS_74

T17

DVSS_75

U17

DVSS_76

V17

DVSS_77

AA17

DVSS_78

AC19

DVSS_79

G18

DVSS_80

L18

DVSS_81

M18

DVSS_82

N18

DVSS_83

P18

DVSS_84

R18

DVSS_85

T18

DVSS_86

U18

DVSS_87

V18

DVSS_88

D20

DVSS_89

G20

DVSS_90

H20

DVSS_91

A21

DVSS_92

E21

DVSS_93

F21

DVSS_94

G21

DVSS_95

E22

DVSS_96

F22

DVSS_97

G22

DVSS_98

H22

DVSS_99

J22

DVSS_100

K22

DVSS_101

L22

DVSS_102

M22

DVSS_103

N22

DVSS_104

P22

DVSS_105

R22

DVSS_106

T22

DVSS_107

U22

DVSS_108

V22

DVSS_109

W22

DVSS_110

Y22

DVSS_111

AA22

DVSS_112

W23

DVSS_113

AB23

DVSS_114

F28

DVSS_115

M28

DVSS_116

T28

DVSS_117

AC28

Place this test point

near connector

Wrap aroundG, B, R traces

Wrap aroundY, PB, Pr traces

Wrap aroundL, C traces

Run along CVBS

Run along SIF

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

08/06/xx

DDR2 MEMORY INTERFACE

EAX63347201

DDR01_A[13]

DDR01_A[10]

DDR0_DQ[0]

DDR01_A[11]

DDR1_DQ[8]

DDR1_A[5]

DDR01_A[11]

DDR1_A[5]

DDR01_A[12]

DDR01_A[11]

DDR1_A[4]

DDR0_A[4]

DDR01_A[13]

DDR01_A[10]

DDR0_A[5]

DDR1_A[6]

DDR0_DQ[1]

DDR01_A[12]

DDR1_A[6]

DDR01_A[12]

DDR0_DQ[13]

DDR1_A[5]

DDR1_DQ[10]

DDR01_A[10]

DDR01_A[7]

DDR01_A[3]

DDR01_A[7]

DDR01_A[3]

DDR01_A[1] DDR01_A[3]

DDR01_A[7]

DDR0_DQ[15]

DDR1_DQ[14]

DDR01_A[10]

DDR01_A[0]

DDR01_A[13]

DDR01_A[7]

DDR01_A[7]

DDR1_A[4]

DDR01_A[13]

DDR1_DQ[11]

DDR01_A[12]

DDR01_A[2]

DDR01_A[1]

DDR01_A[9]

DDR1_A[4]

DDR01_A[2]

DDR1_DQ[12]

DDR01_A[9]

DDR01_A[11]

DDR1_DQ[3]

DDR0_A[4]

DDR01_A[8]

DDR01_A[0]

DDR01_A[2]

DDR01_A[8]

DDR01_A[8]

DDR01_A[8]

DDR1_DQ[6]

DDR01_A[2]

DDR0_A[4]

DDR1_A[6]

DDR01_A[13]

DDR01_A[1]

DDR0_DQ[5]

DDR01_A[11]

DDR1_DQ[2]

DDR0_DQ[10]

DDR01_A[0]

DDR0_DQ[3]

DDR0_A[5]

DDR01_A[2]

DDR1_DQ[13]

DDR01_A[7]

DDR01_A[11]

DDR1_DQ[4]

DDR01_A[12]

DDR0_A[6]

DDR1_DQ[5]

DDR01_A[3]

DDR01_A[7]

DDR01_A[11]

DDR0_DQ[11]

DDR0_DQ[4]

DDR01_A[9]

DDR01_A[3]

DDR1_DQ[0]

DDR01_A[13]

DDR01_A[0]

DDR01_A[9]

DDR01_A[0]

DDR1_A[4]

DDR1_DQ[9]

DDR01_A[9]

DDR0_DQ[7]

DDR01_A[9]

DDR01_A[10]

DDR01_A[12]

DDR01_A[1]

DDR0_DQ[12]

DDR0_A[6]

DDR1_A[5]

DDR01_A[8]

DDR01_A[10]

DDR1_DQ[1]

DDR0_DQ[14]

DDR01_A[1]

DDR0_A[5]

DDR1_DQ[15]

DDR01_A[12]

DDR0_DQ[2]

DDR01_A[3]

DDR01_A[8]

DDR0_A[6]

DDR01_A[10]

DDR0_DQ[8]

DDR01_A[2]

DDR0_DQ[6]

DDR0_A[6]

DDR0_A[5]

DDR01_A[8]

DDR01_A[0]

DDR01_A[9]DDR1_DQ[7]

DDR1_A[6]

DDR0_DQ[9]

DDR01_A[1]

DDR0_A[4]

DDR01_A[3]

DDR01_A[0]

DDR01_A[1]

DDR01_A[2]

DDR0_DQ[15]

DDR0_DQ[14]

DDR0_DQ[13]

DDR0_DQ[12]

DDR0_DQ[11]

DDR0_DQ[10]

DDR0_DQ[9]

DDR0_DQ[8]

DDR0_DQ[7]

DDR0_DQ[6]

DDR0_DQ[5]

DDR0_DQ[4]

DDR0_DQ[3]

DDR0_DQ[2]

DDR0_DQ[1]

DDR0_DQ[0]

DDR1_DQ[15]

DDR1_DQ[0]

DDR1_DQ[1]

DDR1_DQ[2]

DDR1_DQ[3]

DDR1_DQ[4]

DDR1_DQ[5]

DDR1_DQ[6]

DDR1_DQ[7]

DDR1_DQ[8]

DDR1_DQ[9]

DDR1_DQ[10]

DDR1_DQ[11]

DDR1_DQ[12]

DDR1_DQ[13]

DDR1_DQ[14]

DDR01_A[13]

C422

0.047uF

D1.8V

R400 0

READY

DDR01_BA0

C405

10uF

10V

C455

22uF

DDR01_A[7-13]

DDR1_DQ[8-15]

004:B3

C460

470pF

C471

0.1uF

DDR0_DM1

004:B4

DDR1_DM1

004:B4

IC400

BD35331F-E2

3

VTTS

2

EN

4

VREF

1

GND

5

VDDQ

6

VCC

7

VTT_IN

8

VTT

DDR01_BA2

C409

0.1uF

16V

DDR01_WEb

DDR0_CLK

004:B1;004:C1

C432

0.1uF

A1.2V

DDR0_DQS0

004:B4

R418

75

R401 0

DDR1_DQ[0-7]

004:B3

DDR1_DQS0

004:G2

DDR1_CLKb

004:B1;004:F4

DDR1_DQS0b

004:B4

C472

0.1uF

DDR01_RASb

DDR1_DQ[0-15]

C412

470pF

cap_crack

DDR01_A[0-3,7-13]

C421

470pF

C475

0.1uF

C450

0.1uF

R425

75

DDR01_BA0

C449

470pF

C476

0.1uF

DDR01_CKE

DDR0_A[4-6]

C408

0.1uF

16V

C434

470pF

DDR0_DQ[0-7]

004:B3

DDR1_DQS1b

004:G4

DDR0_DQS1b

004:E4

DDR0_A[4-6]

DDR01_ODT

D1.8V

C452

0.1uF

DDR01_BA2

DDR0_DQS1b

004:B4

R420 75

+3.3V_ST

DDR1_A[4-6]

C402

0.1uF

R415

75

DDR0_VREF0

DDR01_A[0-3]

DDR01_CKE

DDR0_DQS0

004:E2

DDR1_VREF0

DDR_VTT

DDR0_DQ[8-15]

C415

470pF

R421

75

R411

100

1%

C4010.1uF

C411

470pF

cap_crack

DDR01_BA2

DDR0_A[4-6]

DDR01_WEb

DDR0_DQ[0-15]

DDR01_WEb

DDR0_DM0

004:B3

DDR01_BA0

DDR01_RASb

DDR01_BA0

DDR01_CASb

DDR1_DQS0b

004:G2

DDR01_BA1

DDR0_DQS1

004:E4

DDR0_VREF0

R423

75

C407

0.1uF

16V

DDR1_VREF0

DDR1_A[4-6]

C443

470pF

DDR01_WEb

C459

0.047uF

C444

0.047uF

DDR1_DM0

004:B4

C461

10uF

DDR1_CLK

004:E1;004:F4

DDR1_CLKb

DDR01_RASb

DDR01_RASb

C427

0.1uF

DDR0_CLKb

004:C1;004:C4

DDR01_RASb

C447

470pF

C467

470pF

DDR01_BA0

DDR0_A[4-6]

DDR01_RASb

DDR1_DQS1b

004:B4

C453

0.1uF

DDR0_CLK

004:C1;004:C4

C431

10uF

C4000.1uF

C463

0.047uF

R402 240

1%

C403

0.1uF

C425

470pF

DDR1_CLK

R416 75

C446

10uF

D1.8V

DDR01_CKE

C440

0.1uF

DDR0_VREF0

R413 75

DDR01_BA2

C451

470pF

DDR01_A[0-3,7-13]

DDR0_DM0

004:E2

DDR01_RASb

DDR01_CKE

R419

75

C435

10uF

R422

75

DDR01_BA1

R414

75

C436

0.1uF

DDR01_WEb

DDR0_VREF0

DDR0_DQS1

004:B4

DDR01_A[0-3,7-13]

C423

0.1uF

DDR01_BA2

D1.8V

C416

470pF

C426

0.047uF

C454

10uF

DDR01_ODT

004:B1;004:C3;004:C5;004:F5;004:H3;004:H2

DDR01_BA1

C429

10uF

R424

75

DDR01_A[0-3,7-13]

C424

10uF

C441

470pF

DDR1_CLKb

004:E1;004:F4

DDR01_CASb

C439

470pF

DDR1_VREF0

C433

0.047uF

DDR01_BA0

DDR01_A[0-3,7-13]

DDR1_DQS0

004:B4

DDR01_CASb

C457

10uF

C458

0.1uF

DDR01_BA2

DDR01_ODT

C428

22uF

DDR01_CASb

D1.8V

DDR01_BA1

DDR01_WEb

DDR01_BA1

DDR1_A[4-6]

004:B2;004:E4;004:H1

DDR0_CLKb

004:B1;004:C4

DDR0_DQS0b

004:B4

DDR01_BA0

DDR01_WEb

D1.8V

DDR1_DQS1

004:G4

C438

0.1uF

C473

0.1uF

DDR0_CLK

004:B1;004:C4

R412 75

C404

100uF

16V

C474

0.1uF

C448

0.047uF

C442

470pF

C406

0.1uF

16V

DDR0_DQS0b

004:E2

DDR01_ODT

DDR1_DM0

004:G2

C445

0.1uF

DDR_VTT

DDR01_CKE

004:B1;004:C1;004:E1;004:F4;004:H3;004:H2

C456

22uF

DDR1_VREF0

DDR01_BA1

C430

22uF

D1.8V

DDR0_CLKb

004:B1;004:C1

DDR01_ODT

DDR0_DM1

004:E4

DDR01_BA1 DDR1_DQS1

004:B4

R417

75

DDR01_ODT

C462

0.1uF

DDR01_CASb

DDR1_DM1

004:G4

DDR1_A[4-6]

004:B2;004:E2;004:H1

DDR01_CASb

DDR1_CLK

004:B1;004:F4

R410

100

1%

DDR01_ODT

D1.8V

DDR01_BA2

DDR_VTT

C437

0.047uF

C410

1uF

cap_crack

C413

1uF

C414

1uF

C417

1uF

C420

0.1uF

16V

R408 10K

R409

220

L400

BLM18PG121SN1D

L401

BLM18PG121SN1D

C418

10uF

16V

C419

2.2uF

READY

IC401

NT5TU128M8DE_BD

CK

E8

CK

F8

CKE

F2

RAS

F7

CAS

G7

WE

F3

CS

G8

BA0

G2

BA1

G3

A0

H8

A1

H3

A2

H7

A3

J2

A4

J8

A5

J3

A6

J7

A7

K2

A8

K8

A9

K3

A10/AP

H2

A11

K7

A12

L2

NC_1/BA2

G1

NC_2/A14

L3

NC_3/A15

L7

A13

L8

ODT

F9

DQ0

C8

DQ1

C2

DQ2

D7

DQ3

D3

DQ4

D1

DQ5

D9

DQ6

B1

DQ7

B9

DQS

B7

DQS

A8

DM/RDQS

B3

NU/RDQS

A2

VDDQ_1

A9

VDDQ_2

C1

VDDQ_3

C3

VDDQ_4

C7

VDDQ_5

C9

VDD_1

A1

VDD_2

L1

VDD_3

E9

VDD_4

H9

VSSQ_1

A7

VSSQ_2

B2

VSSQ_3

B8

VSSQ_4

D2

VSSQ_5

D8

VSS_1

A3

VSS_2

E3

VSS_3

J1

VSS_4

K9

VREF

E2

VDDL

E1

VSSDL

E7

IC403

NT5TU128M8DE_BD

CK

E8

CK

F8

CKE

F2

RAS

F7

CAS

G7

WE

F3

CS

G8

BA0

G2

BA1

G3

A0

H8

A1

H3

A2

H7

A3

J2

A4

J8

A5

J3

A6

J7

A7

K2

A8

K8

A9

K3

A10/AP

H2

A11

K7

A12

L2

NC_1/BA2

G1

NC_2/A14

L3

NC_3/A15

L7

A13

L8

ODT

F9

DQ0

C8

DQ1

C2

DQ2

D7

DQ3

D3

DQ4

D1

DQ5

D9

DQ6

B1

DQ7

B9

DQS

B7

DQS

A8

DM/RDQS

B3

NU/RDQS

A2

VDDQ_1

A9

VDDQ_2

C1

VDDQ_3

C3

VDDQ_4

C7

VDDQ_5

C9

VDD_1

A1

VDD_2

L1

VDD_3

E9

VDD_4

H9

VSSQ_1

A7

VSSQ_2

B2

VSSQ_3

B8

VSSQ_4

D2

VSSQ_5

D8

VSS_1

A3

VSS_2

E3

VSS_3

J1

VSS_4

K9

VREF

E2

VDDL

E1

VSSDL

E7

IC404

NT5TU128M8DE_BD

CK

E8

CK

F8

CKE

F2

RAS

F7

CAS

G7

WE

F3

CS

G8

BA0

G2

BA1

G3

A0

H8

A1

H3

A2

H7

A3

J2

A4

J8

A5

J3

A6

J7

A7

K2

A8

K8

A9

K3

A10/AP

H2

A11

K7

A12

L2

NC_1/BA2

G1

NC_2/A14

L3

NC_3/A15

L7

A13

L8

ODT

F9

DQ0

C8

DQ1

C2

DQ2

D7

DQ3

D3

DQ4

D1

DQ5

D9

DQ6

B1

DQ7

B9

DQS

B7

DQS

A8

DM/RDQS

B3

NU/RDQS

A2

VDDQ_1

A9

VDDQ_2

C1

VDDQ_3

C3

VDDQ_4

C7

VDDQ_5

C9

VDD_1

A1

VDD_2

L1

VDD_3

E9

VDD_4

H9

VSSQ_1

A7

VSSQ_2

B2

VSSQ_3

B8

VSSQ_4

D2

VSSQ_5

D8

VSS_1

A3

VSS_2

E3

VSS_3

J1

VSS_4

K9

VREF

E2

VDDL

E1

VSSDL

E7

IC402

NT5TU128M8DE_BD

CK

E8

CK

F8

CKE

F2

RAS

F7

CAS

G7

WE

F3

CS

G8

BA0

G2

BA1

G3

A0

H8

A1

H3

A2

H7

A3

J2

A4

J8

A5

J3

A6

J7

A7

K2

A8

K8

A9

K3

A10/AP

H2

A11

K7

A12

L2

NC_1/BA2

G1

NC_2/A14

L3

NC_3/A15

L7

A13

L8

ODT

F9

DQ0

C8

DQ1

C2

DQ2

D7

DQ3

D3

DQ4

D1

DQ5

D9

DQ6

B1

DQ7

B9

DQS

B7

DQS

A8

DM/RDQS

B3

NU/RDQS

A2

VDDQ_1

A9

VDDQ_2

C1

VDDQ_3

C3

VDDQ_4

C7

VDDQ_5

C9

VDD_1

A1

VDD_2

L1

VDD_3

E9

VDD_4

H9

VSSQ_1

A7

VSSQ_2

B2

VSSQ_3

B8

VSSQ_4

D2

VSSQ_5

D8

VSS_1

A3

VSS_2

E3

VSS_3

J1

VSS_4

K9

VREF

E2

VDDL

E1

VSSDL

E7

C477

22uF

16V

C468

0.1uF

C470

0.1uF

C466

0.1uF

C469

0.1uF

C464

0.1uF

C465

0.1uF

DDR01_CKE

DDR01_CKE

C478

0.1uF

C479

0.1uF

C480

0.1uF

R404

1M

READY

C481

10uF

10V

C482

2.2uF

10V

C483

10uF

10V

C484

0.1uF

16V

C485

0.1uF

16V

cap_crack

C486

0.1uF

16V

IC100

LGE3556CP (C0 3D PIP)

DDR_BVDD0

A6

DDR_BVDD1

A24

DDR_BVSS0

B7

DDR_BVSS1

B24

DDR_PLL_TEST

F20

DDR_PLL_LDO

B23

DDR01_CKE

B17

DDR_COMP

C22

DDR01_ODT

E16

DDR_EXT_CLK

C23

DDR0_CLK

B12

DDR0_CLKB

C12

DDR1_CLK

A13

DDR1_CLKB

A12

DDR01_A00

B15

DDR01_A01

E14

DDR01_A02

A15

DDR01_A03

D15

DDR0_A04

E13

DDR0_A05

E12

DDR0_A06

F13

DDR01_A07

C14

DDR01_A08

F14

DDR01_A09

B14

DDR01_A10

D14

DDR01_A11

C13

DDR01_A12

D13

DDR01_A13

B13

DDR1_A04

F15

DDR1_A05

C15

DDR1_A06

D16

DDR01_BA0

F16

DDR01_BA1

B16

DDR01_BA2

E15

DDR01_CASB

A17

DDR0_DQ00

A8

DDR0_DQ01

B11

DDR0_DQ02

B8

DDR0_DQ03

D11

DDR0_DQ04

E11

DDR0_DQ05

C8

DDR0_DQ06

C11

DDR0_DQ07

C9

DDR0_DQ08

D8

DDR0_DQ09

E10

DDR0_DQ10

E9

DDR0_DQ11

F11

DDR0_DQ12

F12

DDR0_DQ13

E8

DDR0_DQ14

D10

DDR0_DQ15

F8

DDR1_DQ00

C18

DDR1_DQ01

C20

DDR1_DQ02

A18

DDR1_DQ03

B21

DDR1_DQ04

C21

DDR1_DQ05

B18

DDR1_DQ06

B20

DDR1_DQ07

D18

DDR1_DQ08

E18

DDR1_DQ09

D21

DDR1_DQ10

F18

DDR1_DQ11

E20

DDR1_DQ12

A22

DDR1_DQ13

F17

DDR1_DQ14

B22

DDR1_DQ15

E17

DDR0_DM0

A10

DDR0_DM1

C10

DDR1_DM0

A20

DDR1_DM1

F19

DDR0_DQS0

B10

DDR0_DQS0B

B9

DDR0_DQS1

F10

DDR0_DQS1B

F9

DDR1_DQS0

B19

DDR1_DQS0B

C19

DDR1_DQS1

E19

DDR1_DQS1B

D19

DDR01_RASB

C16

DDR_VREF0

A7

DDR_VREF1

A23

DDR01_WEB

C17

DDR_VDDP1P8_1

C7

DDR_VDDP1P8_2

D22

4 13

Close to IC

Close to IC

Close to IC

Close to IC

SI

SI

SI

SI

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SMPS POWER

08/10/xx

EAX63347201

C506

0.1uF

16V

1.2V_1.8V_EN

R5120

+5V_ST

R536

6.2K

1%

C559

0.1uF

16V

RL_ON

AC_DET

C544

10uF

25V

C502

10uF

6.3V

C522

10uF

6.3V

READY

RL_ON

5V_ON

P_+5V

P_17V

C553

0.1uF

C518

0.1uF

50V

+3.3V_ST

L501

CB4532UK121E

EAM38058401

IC505

MP8706EN-C247-LF-Z

3

SW_2

2

SW_1

4

BST

1

IN

5

EN/SYNC

6

FB

7

VCC

8

GND

L506

MLB-201209-0120P-N2

0LCML00003B

C515

0.1uF

16V

R501

10K

READY

+5V_TU

C505

10uF

6.3V

READY

R514

100

L502

CB3216PA501E

EAM44020101

C507

0.1uF

16V

C523

100uF

16V

L515

10uH

NR8040T100M

R533

10K

C521

0.1uF

16V

C501

100uF

16V

C513

10uF

6.3V

C500

10uF

6.3V

READY

ERROR_DET

C503

0.1uF

16V

+5V_ST

C509

0.1uF

16V

IC506

AP2121N-3.3TRE1

EAN58801701

1

GND

2

VOUT

3

VIN

L516

MLB-201209-0120P-N2

0LCML00003B

R502

100

C508

10uF

6.3V

C557

10uF

6.3V

L507

+5V_ST

C519

33uF

25V

D3.3V

R506

100

R500

10K

READY

C558

10uF

6.3V

C520

0.1uF

16V

R513

10K

READY

C552

1uF

50V

D1.8V

P_17V

L511

+3.3V_NEC_ST

L504

MLB-201209-0120P-N2

0LCML00003B

A2.5V

R504

910

1%

R505

66.5

1%

R509

1K

1%

IC502

AZ1085S-ADJTR/E1

0IPMG78346A

1

ADJ/GND

2

OUTPUT

3

INPUT

L505

MLB-201209-0120P-N2

0LCML00003B

P500

SMAW200-H18S1

14

9

4

18

13

8

3

17

12

7

2

16

11

6

1

15

10

5

19

R515

100K

C538

22uF

16V

R522

0

C536

22uF

16V

C535

0.1uF

1.2V_1.8V_EN

L509

2uH

C530

22uF

16V

R523

0

C529

0.1uF

R520

0

C531

0.1uF

C533

22uF

C537

22uF

16V

L510

BLM18PG121SN1D

10

R516

A1.2V

C543

0.1uF

16V

C528

0.1uF

D1.2V

C532

1uF

10V

C517

100uF

16V

C525

100uF

16V

C516

100uF

16V

READY

C556

100uF

16V

R531

100K

READY

A3.3V

C542

0.1uF

16V

R529

1.2K

1%

R519

47

L514

UBW2012-121F

R530

13K

1/8W

1%

R528

39K

1%

R527

0

C540

1uF

C526

47uF

16V

+3.3V_EN

001:H5

C541

22uF

10V

C549

22uF

10V

C534

0.1uF

C548

100uF

16V

D3.3V

IC504

MP8706EN-C247-LF-Z

3

SW_2

2

SW_1

4

BST

1

IN

5

EN/SYNC

6

FB

7

VCC

8

GND

L508

3.6uH

C527

22uF

10V

C550

0.1uF

16V

C551

100uF

16V

READY

R521

470K

1%

R525

820K

1%

R510

10K

1/10W

1%

C561

0.01uF

25V

R503

6.8K

C512

22uF

10V

L503

3.6uH

NR8040T3R6N

C510

0.01uF

25V

C504

22uF

10V

C562

100pF

50V

READY

R508

10K

C511

0.01uF

25V

0.1uF

C564

L500

CIC21J501NE

R511

10.5K

1%

R532

47

1/10W

5%

IC501

MP2108DQ

3

LX

2

VIN

4

PGND

1

BST

5

SGND

6

SS

7

FB

8

COMP

9

VREF

10

RUN

IC503

MP2208DL-LF-Z

3

PGND_1

2

SS

4

SW_1

1

AGND

6

NC

5

IN_1

7

BS

8

VCC

9

POK

10

IN_2

11

SW_2

12

PGND_2

13

EN/SYNC

14

FB

15

EP

C514

3300pF

50V

P_+5V

P_+5V

+5V_ST

+5V_ST

R539

0

1/10W

5%

R535

15K

1%

R540

18K

1%

R537

0

1/10W

5%

R538

300K

1/10W

5%

5 13

Vout=(1+R1/R2)*0.8

TUNER 5V

CURRENT: MAX 3A

Multi Power(5V -->3.3V)

R1

BCM3556 core 2.5V

CURRENT: MAX 6A

POWER Wafer 24P

3A

Multi Power(5V -->2.5V)

POWER B/D

Stand-by (5VST --> +3.3V)

R2

MUST BE CHANGE ADJ LDO

AFTER THEN CHECK CST

V0 = 1.25(1+R2/R1)

R1

R2

CURRENT: MAX 3A

R1

Vout=0.8*(1+R1/R2)

R2

130mA

3A

Vout=0.8*(1+R1/R2)

R1

R2

R1

300 mA

R2

Placed on SMD-TOP

Vout=0.9*(1+R2/R1)=1.845

Placed on SMD-TOP

C IN

3A

Replaced Part

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

TU_CVBS

SCL0_3.3V

TU_SIF

SDA0_3.3V

RF_BOOSTER

R602

100

R616

4.7K

+5V_TU

TUNER_IF_P

C615

0.1uF

16V

DEMOD_OPT

RF_SWITCH_CTL

C603

1200pF

50V

L602

R617 0

READY

C614

0.1uF

16V

C613

47pF

50V

D3.3V

TUNER_IF_N

+5V_TU

C611

0.1uF

D3.3V

R609

100K

D3.3V

R605

10K

DEMOD_OPT

C606

0.1uF

L603

MLB-201209-0120P-N2

DEMOD_OPT

Q601

2SC3052

DEMOD_OPT

E

B

C

Q600

ISA1530AC1

DEMOD_OPT

E

B

C

R604

3K

READY

C605

0.1uF

16V

DEMOD_OPT

R601

100

R611 0

R614

1K

READY

C612

47pF

50V

C607

0.1uF

L601

ISDB_IF_AGC

C600

1200pF

50V

DEMOD_OPT

Q602

ISA1530AC1

E

B

C

R608

10K

DEMOD_OPT

R607

3K

READY

C610

0.01uF

25V

DEMOD_OPT

R610

1K

DEMOD_OPT

+5V_TU

Q603

ISA1530AC1

E

B

C

R615

1K

READY

C616

100pF 50V

C601

1200pF

50V

DEMOD_OPT

+1.2V_DE

R622

82

C609

4.7uF

+5V_TU

L600

R603

2.2K

DEMOD_OPT

C608

22uF

16V

TUNER_RESET

C642

0.1uF

16V

C643

0.1uF

16V

DEMOD_OPT

+3.3V_DE

L604

MLB-201209-0120P-N2

DEMOD_OPT

R633

1.2K

C641

10uF

6.3V

C644

0.1uF

16V

DEMOD_OPT

IC601

AZ1117H-ADJTRE1(EH11A)

2

OUTPUT

3

INPUT

1

ADJ/GND

C651

10uF

6.3V

+1.2V_DE

C649

0.1uF

16V

DEMOD_OPT

D3.3V

R635

10

R632

22

DEMOD_OPT

C628

0.1uF

16V

DEMOD_OPT

C634

0.1uF

16V

DEMOD_OPT

C640

0.1uF

16V

DEMOD_OPT

C630

0.1uF

16V

DEMOD_OPT

FE_TS_SERIAL

ISDB_IF_AGC

C625

0.1uF

DEMOD_OPT

C646 0.1uF

DEMOD_OPT

FE_TS_CLK

R636

22

DEMOD_OPT

C645 0.1uF

DEMOD_OPT

C647 0.1uF

DEMOD_OPT

+1.2V_DE

C626

0.1uF

DEMOD_OPT

C638

0.1uF

16V

DEMOD_OPT

R628

1M

READY

R639

2.2K

READY

C622

0.1uF

DEMOD_OPT

C621 0.1uF

DEMOD_OPT

C620 0.1uF

DEMOD_OPT

DEMOD_RESET

TUNER_IF_N

X600

25MHz

DEMOD_OPT

R620

10K

1%

DEMOD_OPT

R623

10K

DEMOD_OPT

+3.3V_DE

R638

2.2K

READY

R627

2.2K

DEMOD_OPT

C650

0.1uF

16V

READY

R637

22

DEMOD_OPT

C627

0.1uF

16V

DEMOD_OPT

R625 2.2K

DEMOD_OPT

C639

0.1uF

16V

DEMOD_OPT

+3.3V_DE

C636

0.01uF

50V

DEMOD_OPT

C637

0.1uF

16V

DEMOD_OPT

R629

22

DEMOD_OPT

+3.3V_DE

R624 2.2K

DEMOD_OPT

C619 0.1uF

DEMOD_OPT

R634

2.7K

READY

FE_TS_SYN

R626

2.2K

DEMOD_OPT

C6310.1uF

16V

DEMOD_OPT

R630

22

DEMOD_OPT

C624

0.1uF

DEMOD_OPT

C623

0.1uF

DEMOD_OPT

C648 0.1uF

DEMOD_OPT

TUNER_IF_P

C604

4.7uF

C602

4.7uF

C635

1uF

25V

DEMOD_OPT

C632

1uF

25V

DEMOD_OPT

SCL2_3.3V

SDA2_3.3V

R631

22

DEMOD_OPT

FE_TS_VAL

C652

10uF

6.3V

R618

100

R619

470

R612

100

DEMOD_OPT

R613

100

DEMOD_OPT

C61 7

0.1 uF

16V

DEMOD_OPT

C61 8

0.1 uF

16V

DEMOD_OPT

C629

30pF

50V

DEMOD_OPT

C633

30pF

50V

DEMOD_OPT

TU600

TDTR-T035F

BRAZIL_TUNER

14

+B3[3.3V]

13

+B2[1.2V]

5

NC_2

12

GND

11

VIDEO

2

BST_CTL

10

NC_4

4

NC_1[RF_AGC]

1

RF_S/W_CTL

17

DIF_1[N]

9

SIF

8

NC_3

3

+B1[5V]

16

IF/AGC

7

SDAT

6

SCLT

15

RESET

18

DIF_2[P]

19

SHIELD

IC600

MN884433

DEMOD_OPT

1

VSS_1

2

AVDD_S

3

AII_S

4

AIQ_S

5

AVSS_S

6

VRT_S

7

VRB_S

8

TCPO_S

9

VDDL_1

10

MSCL_S

11

MSDA_S

12

VSS_2

13

VSSH

14

PSEL

15

ZSEL

16

VDDL_2

17

ACKI

18

TCPO_T

19

IR_T

20

VRT_T

21

VRB_T

22

AVDD_T

23

AIN_T

24

AIP_T

25

AVSS_T

26

VSS_3

27

MSCL_T

28

MSDA_T

29

VDDH_1

30

GPO1

31

AGCI_T

32

AGCR_T

33

GPO0

34

VDDL_3

35

VSS_4

36

XO

37

XI

38

VDDH_2

39

GPI1

40

GPI0

41

TEST4

42

SHVPP

43

SHVDDH

44

NC_1

45

VSS_5

46

VDDL_4

47

TCK

48

TDI

49

NRST

50

TEST3

51

VSS_6

52

VDDL_5

53

TRST

54

TMS

55

CSEL0

56

CSEL1

57

TDO

58

SYNCA

59

ERRA

60

SYNCB

61

ERRB

62

VSS_7

63

VDDL_6

64

SADR_T

65

NC_2

66

SADR_S

67

HDVDDL0

68

VSS_8

69

SDA

70

SCL

71

VDDH_3

72

SADR

73

INTA

74

INTB

75

VSS_9

76

TEST1

77

TEST2

78

SCKA

79

GPI2

80

SDOA

81

PCKA

82

DENA

83

VDDH_4

84

VSS_10

85

HDVPP

86

RON

87

NC_3

88

HDVDDH

89

NC_4

90

HDVDDL1

91

VSS_11

92

VDDL_7

93

SCKB

94

TEST0

95

SDOB

96

PCKB

97

DENB

98

GPO2

99

VDDH_5

100

AGC_S

D600

SAM2333

DEMOD_OPT

A2[RD]

C

A1[GN]

R640

1K

DEMOD_OPT

R606

0

1/10W

5%

R641

0

READY

TU601

UDA45AL

14

3.3V

13

1.2V

5

AS

12

GND

11

VIDEO

2

BST_CNTL

10

NC

4

NC[RF_AGC]

1

ANT_PWR[OPT]

17

DIF_1

9

SIF

8

NC(IF_TP)

3

+B

16

IF_AGC_CNTL

7

SDA

6

SCL

15

RESET

18

DIF_2

19

SHIELD

11 13

TUNER

EAX63347201

Pull-up can’t be applied

because of MODEL_OPT_2

Close to the tuner

R2

R1

Close to R622,R623

< PANASONIC Demod.>

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R720

3.3

+3.3V_DVDD

R723

3.3

AC_DET

001:H6;005:C2

+3.3V_AU_AVDD

R714

200

1%

C723

0.033uF

50V

R717

470

R715

18K

1%

C733

0.033uF

50V

AVSS

+3.3V_DVDD

R719

470

C722

0.033uF

50V

C732

0.033uF

50V

AMP_RESET_N

001:E5

R721

3.3

+3.3V_DVDD

AUD_MASTER_CLK

001:H2

+3.3V_DVDD

+17V_AMP

C712

10uF 16V

+3.3V_AU_AVDD

C703

10uF 16V

AVSS

R722

3.3

AVSS

L703

120-ohm

L702

120-ohm

IC700

TAS5709PHPR

1

OUT_A

2

PVDD_A_1

3

PVDD_A_2

4

BST_A

5

GVDD_OUT_1

6

SSTIMER

7

OC_ADJ

8

NC

9

AVSS

10

PLL_FLTM

11

PLL_FLTP

12

VR_ANA

13

AVDD

14

TESTOUT

15

MCLK

16

OSC_RES

17

DVSS_1

18

VR_DIG

19

PDN

20

LRCLK

21

SCLK

22

SDIN

23

SDA

24

SCL

25RESET

26STEST

27DVDD

28DVSS_2

29GND

30AGND

31VREG

32GVDD_OUT_2

33BST_D

34PVDD_D_1

35PVDD_D_2

36OUT_D

37

PGND_CD_1

38

PGND_CD_2

39

OUT_C

40

PVDD_C_1

41

PVDD_C_2

42

BST_C

43

BST_B

44

PVDD_B_1

45

PVDD_B_2

46

OUT_B

47

PGND_AB_1

48

PGND_AB_2

R711

2K

READY

R710

0

R716

0

READY

R709

1K

READY

R718

22K

R708

22K

READY

R71333

R706

33

R712

33

C708

0.01uF

C700

22pF

READY

C707

0.1uF

C702

1000pF

50V

READY

C705

22pF

READY

C701

22pF

READY

C706

22pF

READY

C704

1000pF

READY

C711

33pF

READY

C709

33pF

READY

C715

0.01uF

C718

0.1uF

C717

0.047uF

C716

4700pF

C714

4700pF

C713

0.047uF

C720 2200pF

C740

0.01uF

C742

0.01uF

C741

0.01uF

C743

0.01uF

+3.3V_DVDD

D3.3V

+17V_AMP

P_17V

+17V_AMP

L704

MLB-201209-0120P-N2

0LCML00003B

C737

0.1uF

C739

0.1uF

C738

0.1uF

C736

0.1uF

AUD_LRCH

AUD_LRCK

AUD_SCK

R707

4.7K

READY

R701

4.7K

READY

L701

AD-9060

EAP61008401

2S

1S 1F

2F

L700

AD-9060

EAP61008401

2S

1S 1F

2F

P700

WAFER-ANGLE

1

2

3

4

SCL1_3.3V

SDA1_3.3V

C724

0.01uF

C725

0.01uF

C729

0.01uF

C728

0.01uF

C71 9

1uF

C72 1

1uF

C730

68uF

35V

C731

68uF

35V

C726

68uF

35V

C727

68uF

35V

R705

1K

C710

4.7uF

10V

R704

0

R703

0

R702

0

C735

0.47uF

50V

C734

0.47uF

50V

AMP

PULL DOWN

This parts are Located

on AVSS area.

SPK_R-

Separate DGND AND AVSS

SPK_L-

SPK_R+

SPK_L+

7 13

AUDIO AMP

EAX63347201

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

HDMI0_RX0-_BCM

003:D3

HDMI0_RXC-_BCM

003:D3

HDMI0_RX2+_BCM

003:D4

HDMI0_RX0+_BCM

003:D3

HDMI0_RX1+_BCM

003:D4

HDMI0_RX1-_BCM

003:D4

HDMI0_RX2-_BCM

003:D4

HDMI0_RXC+_BCM

003:D3

D2+_HDMI3

JP800

DDC_SDA_2

008:AD5

JP802

CEC_REMOTE

008:H26;008:H17;008:H8;008:R26

BSS83

Q808

S

B

D

G

L801

BLM18PG121SN1D

D0-_HDMI4

R822

47K

R813

0

DDC_SDA_2

CK+_HDMI1

008:Y12

D1+_HDMI1

008:Y11

L800

BLM18PG121SN1D

+1.8V_HDMI

C810

0.1uF

D0-_HDMI1

008:Y12

Q800

KRC104S

E

B

C

GND

R831

47K

CK+_HDMI3

008:AL12

C805

0.1uF

C811

0.1uF

D0+_HDMI1

008:Y11

GND

5V_HDMI_4

JP801

D2-_HDMI4

008:AF19

DDC_SCL_1

008:X12

HDMI_SDA

003:E3

5V_HDMI_2

008:I20;008:AB7

D805

5.5V

READY

5V_HDMI_3

D1-_HDMI3

CK-_HDMI2

R801

1K

D0+_HDMI1

D1-_HDMI4

008:AF19

Q807

KRC104S

E

B

C

Q803

KRC104S

E

B

C

R807

0

D0-_HDMI3

008:AL13

D2-_HDMI2

008:AF6

C817

0.1uF

+3.3V_HDMI

JP803

R800

1K

D2-_HDMI3

C815

2.2uF

R806

0

DDC_SDA_4

R830

47K

D0-_HDMI3

C803

0.1uF

16V

R808

0

D1+_HDMI2

CEC_REMOTE

008:H26;008:H8;008:R26;008:X25

C821

0.1uF

CK+_HDMI1

D803

5.5V

READY

DDC_SCL_2

008:AD5

D801

5.5V

READY

GND

JK800

YKF45-7054V

EAG59023301

14

NC

13

CE_REMOTE

5

D1_GND

20

SHIELD

12

CK-

11

CK_GND

2

D2_GND

19

HP_DET

18

5V

10

CK+

4

D1+

1

D2+

17

GND

9

D0-

8

D0_GND

3

D2-

16

DDC_DATA

7

D0+

6

D1-

15

DDC_CLK

C807

0.1uF

C801

0.1uF

R816

47K

JP807

R824

0

R835

47K

CK-_HDMI2

008:AE6

GND

GND

R811

4.7K

R827

READY

C809

0.1uF

DDC_SCL_3

D0-_HDMI1

SDA2_3.3V

DDC_SDA_3

D2+_HDMI1

CK-_HDMI4

008:AG19

C804

0.1uF

16V

CK-_HDMI4

R815

4.7K

D2-_HDMI1

D2+_HDMI1

008:Y10

R810

4.7K

Q802

KRC104S

E

B

C

C816

0.1uF

16V

D1+_HDMI3

008:AL13

D1-_HDMI2

D809

5.5V

READY

HDMI_HPD_2

D0+_HDMI2

008:AE6

D1+_HDMI2

008:AF6

D0+_HDMI3

008:AL13

HDMI_CEC

001:G6

D2+_HDMI4

GND

R832

READY

0

R804

0

D1-_HDMI1

C808

0.1uF

D1+_HDMI3

Q806

KRC104S

E

B

C

+3.3V_ST

D802

5.5V

READY

R819

3.3K

D0+_HDMI3

DDC_SDA_3

008:AN12

CK-_HDMI3

008:AL12

DDC_SDA_4

008:AH21

R825

22

D810

5.5V

READY

D2-_HDMI3

008:AL14

HDMI_SCL

003:E3

C802

0.1uF

16V

5V_HDMI_3

008:I11;008:AK15

R809

4.7K

HDMI_HPD_1

001:H2

CK-_HDMI1

008:Y12

GND

D807

A1

C

A2

D1+_HDMI4

008:AF19

R823

47K

D1-_HDMI2

008:AF6

R834 0

READY

5V_HDMI_1

+1.8V_HDMI

C825

0.1uF

CEC_REMOTE

008:H26;008:H17;008:H8;008:X25

DDC_SCL_4

Q801

KRC104S

E

B

C

D0-_HDMI2

008:AE6

5V_HDMI_1

008:I29;008:Z14

SCL2_3.3V

D800

5.5V

READY

D811

A1

C

A2

R818

0

GND

DDC_SCL_4

008:AH21

D808

A1

C

A2

D0-_HDMI2

R821

22K

D2-_HDMI1

008:Y10

R803

0

5V_HDMI_2

HDMI_HPD_4

CK+_HDMI3

D1.8V

CK+_HDMI4

DDC_SDA_1

R829

22

D0-_HDMI4

008:AG19

GND

CK-_HDMI3

D2+_HDMI4

008:AE19

JP806

C820

0.1uF

16V

R833

12K

1%

D0+_HDMI4

008:AG19

GND

DDC_SCL_3

008:AN12

R826 0

D2+_HDMI3

008:AL14

CEC_REMOTE

008:H17;008:H8;008:R26;008:X25

JK803

KJA-ET-0-0032

EAG42463001

14

NC

13

CE_REMOTE

5

D1_GND

20

JACK_GND

GND

12

CK-

11

CK_GND

2

D2_GND

19

HP_DET

18

5V

10

CK+

4

D1+

1

D2+

17

GND

9

D0-

8

D0_GND

3

D2-

16

DDC_DATA

7

D0+

6

D1-

15

DDC_CLK

D1+_HDMI1

C812

0.1uF

16V

GND

R836

47K

D2+_HDMI2

008:AG6

DDC_SCL_1

D0+_HDMI2

C819

0.1uF

16V

GND

D2+_HDMI2

CK+_HDMI2

008:AE6

R802

1K

CEC_REMOTE

008:H26;008:H17;008:R26;008:X25

CK+_HDMI2

C800

0.1uF

16V

DDC_SCL_2

R812

1K

C806

0.1uF

16V

D1-_HDMI3

008:AL13

DDC_SDA_1

008:X13

R828

READY

5V_HDMI_1

5V_HDMI_4

008:S29;008:AI19

D1-_HDMI1

008:Y11

+3.3V_HDMI

C823

0.1uF

Q805

KRC104S

E

B

C

JP805

CK-_HDMI1

D2-_HDMI4

C814

6800pF

50V

JK802

YKF45-7058V

EAG59023302

PK950

14

NC

13

CE_REMOTE

5

D1_GND

20

SHIELD

12

CK-

11

CK_GND

2

D2_GND

19

HP_DET

18

5V

10

CK+

4

D1+

1

D2+

17

GND

9

D0-

8

D0_GND

3

D2-

16

DDC_DATA

7

D0+

6

D1-

15

DDC_CLK

D812

MMBD301LT1G

C818

0.1uF

16V

C813

0.1uF

16V

D2-_HDMI2

D0+_HDMI4

GND

JP804

GND

D1-_HDMI4

D804

5.5V

READY

D1+_HDMI4

CK+_HDMI4

008:AG19

R820

10K

C822

0.1uF

R817

47K

R814

0

GND

R805

0

D806

A1

C

A2

C824

0.1uF

+3.3V_HDMI

Q804

KRC104S

E

B

C

+1.8V_HDMI

HDMI_HPD_3

JK801

YKF45-7058V

EAG59023302

14

NC

13

CE_REMOTE

5

D1_GND

20

SHIELD

12

CK-

11

CK_GND

2

D2_GND

19

HP_DET

18

5V

10

CK+

4

D1+

1

D2+

17

GND

9

D0-

8

D0_GND

3

D2-

16

DDC_DATA

7

D0+

6

D1-

15

DDC_CLK

GND

D3.3V

5V_HDMI_2

008:I19;008:AB7

5V_HDMI_3

008:I9;008:AK15

5V_HDMI_4

008:S28;008:AI19

R838

3.3K

R837

1.8K

HDMI_POWER_3

HDMI_POWER_4

HDMI_POWER_1

HDMI_POWER_2

R840

3.3K

R839

1.8K

R842

3.3K

R841

1.8K

R844

3.3K

R843

1.8K

P_+5V

P_+5V

P_+5V

P_+5V

P_+5V

P_+5V

IC800

TDA19997

1

VSS_1

2

OUT_C+

3

OUT_C-

4

VDDO[3V3]

5

OUT_DDC_CLK

6

OUT_DDC_DAT

7

VSS_2

8

VDDDC[1V8]_1

9

RXA_HPD

10

RXA_5V

11

RXA_DDC_DAT

12

RXA_DDC_CLK

13

RXA_C-

14

RXA_C+

15

VDDH[3V3]_1

16

RXA_D0-

17

RXA_D0+

18

VSS_3

19

RXA_D1-

20

RXA_D1+

21

VDDH[3V3]_2

22

RXA_D2-

23

RXA_D2+

24

VDDH[1V8]_1

25

AUX_5V

26

VSS_4

27

TEST1

28

RXB_HPD

29

RXB_5V

30

RXB_DDC_DAT

31

RXB_DDC_CLK

32

RXB_C-

33

RXB_C+

34

VDDH[3V3]_3

35

RXB_D0-

36

RXB_D0+

37

VSS_5

38

RXB_D1-

39

RXB_D1+

40

VDDH[3V3]_4

41

RXB_D2-

42

RXB_D2+

43

VSS_6

44

CDEC_DDC

45

VDDDC[1V8]_2

46

VDDDC[1V8]_4

47

TEST2

48

PD

49

I2C_SDA

50

I2C_SCL

51

RXE_DDC_CLK

52

RXE_DDC_DAT

53

INT_N/MUTE

54

CDEC_STBY

55

VDDS[3V3]

56

VSS_7

57

CEC

58

RXC_HPD

59

RXC_5V

60

RXC_DDC_DAT

61

RXC_DDC_CLK

62

RXC_C-

63

RXC_C+

64

VDDH[3V3]_5

65

RXC_D0-

66

RXC_D0+

67

VSS_8

68

RXC_D1-

69

RXC_D1+

70

VDDH[3V3]_6

71

RXC_D2-

72

RXC_D2+

73

VSS_9

74

R12K

75

VDDH[1V8]_2

76

RXD_HPD

77

RXD_5V

78

RXD_DDC_DAT

79

RXD_DDC_CLK

80

RXD_C-

81

RXD_C+

82

VDDH[3V3]_7

83

RXD_D0-

84

RXD_D0+

85

VSS_10

86

RXD_D1-

87

RXD_D1+

88

VDDH[3V3]_8

89

RXD_D2-

90

RXD_D2+

91

VDDDC[1V8]_3

92

VSS_11

93

OUT_D2+

94

OUT_D2-

95

VDDO[1V8]

96

OUT_D1+

97

OUT_D1-

98

VSS_12

99

OUT_D0+

100

OUT_D0-

R845

91K

1/16W

1%

6 13

HDMI

EAX63347201

HDMI2

UI_HW_PORT2

HDMI1

SIDE_HDMI_PORT4

* HDMI CEC

UI_HW_PORT3

UI_HW_PORT1

Place close

to TDA9996

HDMI3

HDMI4

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IR_NEC

DSUB_DET

DDC_SDA

DDC_SCL

R930

100

C915

0.1uF

50V

+3.3V_ST

C918

0.1uF

50V

C919

0.1uF

50V

IC902

MAX3232CDR

3

C1-

2

V+

4

C2+

1

C1+

6

V-

5

C2-

7

DOU T2

8

RIN 2

9

ROU T2

10

DIN 2

11

DIN 1

12

ROU T1

13

RIN 1

14

DOU T1

15

GND

16

VCC

C920

0.1uF

50V

R931

100

RS232C_TXD

+3.3V_ST

RS232C_RXD

C914

0.1uF

50V

PC_L_IN

PC_R_IN

KEY2

+3.3V_ST

KEY1

LED_WHITE

D910

30V

ADUC30S03010L_AMODIODE

READY

D911

30V

ADUC30S03010L_AMODIODE

READY

LED_BREATHING

L901

MLB-201209-0120P-N2

PK950

D3.3V

C925

10pF

C927

10pF

C923

10pF

C926

10pF

C929

10pF

PK950

SUB_SDA

C924

10pF

D914

C917

10pF

READY

C916

10pF

READY

D3.3V

LED_RED

R936

22

SUB_SCL

C921

0.1uF

16V

C922

0.1uF

16V

JK902

SPG09-DB-009

1

2

3

4

5

6

7

8

9

10

R926

4.7K

L904

MLB-201209-0120P-N2

R935

22

R934

22

R928

10K

R927

10K

R925

4.7K

R922

4.7K

R923

4.7K

R941 0

READY

R940 0

READY

RGB_HSYNC

003:C5

RGB_VSYNC

003:C5

R938

47K

R933

10K

+3.3V_ST

+3.3V_ST

Q902

2SC3052

E

B

C

R924

22

R932

47K

R937

47K

R929

0

READY

Q901

2SC3052

E

B

C

+3.3V_ST

R939

2.2K

+3.3V_ST

IR

L900

PK550

D912

5.6V

CDS3C05HDMI1

D913

5.6V

CDS3C05HDMI1

R920

10

JK901

SPG09-DB-010

1

RED

2

GREEN

3

BLUE

4

GND_1

5

DDC_GND

6

RED_GND

7

GREEN_GND

8

BLUE_GND

9

NC

10

SYNC_GND

11

GND_2

12

DDC_DATA

13

H_SYNC

14

V_SYNC

15

DDC_CLOCK

16

SHILED

D905

CDS3C30GTH

C906

0.1uF

50V

D908

5.6V

R919

1K

1/10W

5%

D904

30V

C910

270pF

50V

READY

EDID_WP

001:H5

R913

22

1/10W

5%

R911-*1

BLM18PG600SN1D

RGB_BEAD

C901

47pF

50V

READY

D907

CDS3C30GTH

30V

C903

0.1uF

C908

18pF

50V

R912

0

RGB_R

R921

1K

R916

2.7K

R909

10K

C913

270pF

50V

READY

D903

30V

PC_SER_CLK

002:G3

IC901

AT24C02BN-10SU-1.8

3

A2

2

A1

4

GND

1

A0

5

SDA

6

SCL

7

WP

8

VCC

R902

22

C912

82pF

50V

READY

R900

22

R911

0

RGB_R

R901

22

Q900

KRC102S

E

B

C

R910-*1

BLM18PG600SN1D

RGB_BEAD

D902

5.5V

R914

22

1/10W

5%

D900

5.5V

D909

5.6V

READY

R910

0

RGB_R

R912-*1

BLM18PG600SN1D

RGB_BEAD

C909

82pF

50V

READY

R906

10K

R915

2.7K

PC_SER_DATA

002:G3

C911

100pF

50V

IC900

74F08D

3

Q0

2

D0B

4

D1A

1

D0A

6

Q1

5

D1B

7

GND

8

Q2

9

D2A

10

D2B

11

Q3

12

D3A

13

D3B

14

VCC

R903

22

D906

5.6V

READY

R917

10

C900

47pF

50V

READY

D901

5.5V

C902

47pF

50V

READY

C907

18pF

50V

R918

2.7K

RGB_B

RGB_R

RGB_G

JK900

PEJ027-01

6B

T_TERMINAL2

7B

B_TERMINAL2

5

T_SPRING

4

R_SPRING

7A

B_TERMINAL1

6A

T_TERMINAL1

3

E_SPRING

R904

470K

ZD902

5.1V

C904

1uF

25V

ZD901

5.1V

R905

470K

C905

1uF

25V

ZD900

5.1V

ZD903

5.1V

+5V_ST

L902

MLB-201209-0120P-N2

L903

MLB-201209-0120P-N2

L905

MLB-201209-0120P-N2

PK950

NEC_RXD

NEC_TXD

R944

47K

RS232C_TXD

+3.3V_ST

R945

4.7K

BCM_RX

D3.3V

BCM_TX

C930

0.1uF

16V

RS232C_RXD

IC903

MC14053BDR2G

0ISTL00024A

3

Z1

2

Y0

4

Z

1

Y1

6

INH

5

Z0

7

VEE

8

VSS

9

C

10

B

11

A

12

X0

13

X1

14

X

15

Y

16

VDD

D3.3V

P903

12507WR-03L

PK950

1

2

3

4

P902

12507WR-12L

1

IR

2

GND

3

KEY1

4

KEY2

5

LED-RED

6

GND

7

SCL

8

SDA

9

GND

10

3.3V_ST

11

3.3V_MULTI

12

LED-WHITE

13

GND

IR_NEC

R946

4.7K

READY

R947

4.7K

READY

D3.3V

SUB_SCL

SUB_SDA

R94 9

0

READY

R94 8

0

R951

1K

1/16W

5%

R950

1K

1/16W

5%

D3.3V

P_+5V

P_+5V

P_+5V

P_+5V

ROM DOWNLOAD FOR PDP

RS232C

$0.179

SUB Board I/F

10 13

LVDS/RS232//RGB

FOR PK/J90 - BREATING

EAX63347201

R,G,B PC INPUT

BCM Reference

PC AUDIO

TO HDMI JACK FOR WIRELESS

X1 Y1 S7M

OUTPUT

TO HDMI JACK FOR WIRELESS

RS232 DEBUG SWITCH

- NEC/S7

HIGH

LOW X0 Y0 NEC

A/B

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

Fib er Opt ic

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

COMP1_SW

SPDIF_OUT

SIDE_RIN

SIDE_LIN

COMPOSITE2_IN

SIDEAV_DET

D3.3V

C1011

100pF

READY

C1026

1uF

25V

C1030

27pF

50V

ZD1023

5.1V

C1010

100pF

READY

C1032

100pF

READY

ZD1029

5.1V

R10 21

470 K

COMP1_Pr

003:B3

R1012

2.7K

ZD1008

5.1V

L1005

270nH

COMP2_Pb

003:B4

C1015

1uF

25V

ZD1013

5.1V

R10 06

470 K

COMP_L_IN_1

002:A5

ZD1030

5.1V

C1028

100pF

50V

C1025

27pF

50V

ZD1020

5.1V

COMP2_Pr

003:B3

ZD1028

5.1V

R10 15

470 K

COMP1_SW

001:H3

COMPOSITE1_IN

003:B4

JK1001

PPJ237-01

5J

[GN3]O-SPRING

6J

[GN3]E-LUG

4J

[GN3]CONTACT

7K

[BL3]E-LUG-S

5K

[BL3]O-SPRING

7L

[RD3]E-LUG-S

5L

[RD3]O-SPRING_1

5M

[WH3]O-SPRING

4N

[RD3]CONTACT

5N

[RD3]O-SPRING_2

6N

[RD3]E-LUG

6D

[GN2]E-LUG

5D

[GN2]O-SPRING

4D

[GN2]CONTACT

7E

[BL2]E-LUG-S

5E

[BL2]O-SPRING

7F

[RD2]E-LUG-S

5F

[RD2]O-SPRING_1

5G

[WH2]O-SPRING

4H

[RD2]CONTACT

5H

[RD2]O-SPRING_2

6H

[RD2]E-LUG

6A

[YL1]E-LUG

5A

[YL1]O-SPRING

4A

[YL1]CONTACT

5B

[WH1]O-SPRING

4C

[RD1]CONTACT

5C

[RD1]O-SPRING

6C

[RD1]E-LUG

L1000

270nH

ZD1007

5.1V

ZD1011

5.1V

ZD1031

5.1V

C1014

27pF

50V

ZD1015

5.1V

ZD1009

5.1V

C10031uF

25V

C1019

27pF

50V

COMP_R_IN_1

002:A5

COMPOSITE1_SW

001:H2

C1018

27pF

50V

ZD1019

5.1V

COMP2_Y

003:B3

COMP_L_IN_2

002:A5

ZD1026

5.1V

R1027

10

R10 22

470 K

ZD1022

5.1V

COMP_R_IN_2

002:A5

C1033

100pF

READY

COMP1_Pb

003:B3

R1024

2.7K

ZD1017

5.1V

C1017

100pF

50V

L1002

270nH

C1031

27pF

50V

L1004

270nH

C1004

1uF

25V

ZD1012

5.1V

C1013

27pF

50V

R10 14

470 K

R1019

1K

C1021

100pF

READY

R1020

10

C1029

27pF

50V

COMP1_Y

003:B3

C1027

1uF

25V

ZD1014

5.1V

C1023

27pF

50V

C1007

100pF

50V

L1003

270nH

C1020

27pF

50V

C1012

27pF

50V

R1018

2.7K

ZD1021

5.1V

AV_L_IN_1

002:A5

ZD1024

5.1V

ZD1016

5.1V

ZD1006

5.1V

C1022

100pF

READY

C1006

47pF

50V

C1024

27pF

50V

ZD1018

5.1V

L1001

270nH

R1013

1K

AV_R_IN_1

002:A5

C1016

1uF

25V

R1026

1K

R10 07

470 K

ZD1010

5.1V

ZD1027

5.1V

COMP2_SW

001:H3

ZD1025

5.1V

ZD1004

5.1V

ZD1000

5.1V

ZD1002

5.1V

R1002

2.7K

JK1000

PPJ235-01

4A

[YL]O-SPRING

5A

[YL]E-LUG

3A

[YL]CONTACT

4B

[WH]O-SPRING

3C

[RD]CONTACT

4C

[RD]O-SPRING

5C

[RD]E-LUG

R1003

1K

C1009

100pF

READY

C1001

1uF25V

R1000

470K

C1005

47pF

50V

C1002

1uF25V

ZD1003

5.1V

C1000

100pF

50V

R1001

470K

ZD1001

5.1V

ZD1005

5.1V

C1008

100pF

READY

D3.3V

D3.3V

D3.3V

D3.3V

ZD1032

5.1V

ZD1033

5.1V

ZD1034

5.1V

ZD1035

5.1V

ZD1036

5.1V

ZD1037

5.1V

ZD1038

5.1V

ZD1039

5.1V

C1034

0.1uF

50V

C1035

10uF

16V

READY

C1036

22pF

IC1000

NL17SZ00DFT2G

READY

3

GND

2

B

4

Y

1

A

5

VCC

JK1002

JST1223-001

1

GND

2

VCC

3

VINPUT

4

FIX_POLE

R1029

100

R1030

100

READY

R1028

1K

READY

D3.3V

9 13

EAX63347201

JACK

SPDIF

AV 1

COMPONENT1/2,AV1

COMPONENT2

COMPONENT1

SIDE_AV

NAND

GATE

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

USB DOWN STREAM

USB DOWN STREAM

THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

USB1_DM_to_HUB

R1109

100K

READY

USB1_DP_to_HUB

USB2_DM_to_HUB

C1118

0.1uF

16V

PK950

USB_DM

USB2_DP_to_HUB

C1112

0.1uF

16V

READY

USB_DP

USB2_DP_to_HUB

USB2_DM_to_HUB

R1119

10K

PK950

R1129

10K

READY

USB1_DM_to_HUB

R1120

10K

R1126 0

PK950

USB1_DP_to_HUB

R1130

10K

READY

C1119

0.1uF

16V

USB1_OCD

R1125 0

PK950

R1123 0

PK550

USB1_CTL

R1124 0

PK550

BT_DP_T

BT_DM_T

Q1101

RTR030P02

PK950

S

D

G

BT_ON/OFF

R1113

4.7K

PK950

R1110

0

READY

Q1100

2SC3052

PK950

E

B

C

R1112

4.7K

PK950

R1111

47K

PK950

R1132 0

PK550

USB1_CTL_HUBUSB1_OCD_HUB

R1127 0

PK950

USB2_CTL_HUB

USB2_OCD_HUB

USB1_OCD_HUB

USB1_CTL_HUB

USB2_OCD_HUB

USB2_CTL_HUB

/RST_HUB

001:H1

JK1100

KJA-UB-4-0004

EAG41945401

1

2

3

4

5

JK1101

KJA-UB-4-0004

EAG41945401

PK950

1

2

3

4

5

BT_RESET

VREG_CTR

IC1101

AP2191SG-13

PK950

3

IN_2

2

IN_1

4

EN

1

GND

5

FLG

6

OUT_1

7

OUT_2

8

NC

IC1102

AP2191SG-13

3

IN_2

2

IN_1

4

EN

1

GND

5

FLG

6

OUT_1

7

OUT_2

8

NC

BT_USB_DM

BT_USB_DP

C1116

100uF

16V

C1117

100uF

16V

C1115

100uF

16V

PK950

C1114

100uF

16V

PK950

R1107100K

C11090.1uF

R1106100K

C11010.1uF

C11000.1uF

C1104

1uF

C11030.1uF

R1102

1M

C1110

4.7uF

C11110.1uF

R110112K

C11061uF

C11070.1uF

R1104

100K

D3.3V

C11020.1uF

R1108100K

R11000

C1108

15pF

50V

C1105

15pF

50V

R1105

4.7K

D3.3V

D3.3V

D3.3V D3.3V

D3.3V

D3.3V

P1102

12507WR-10L

Bluetooth Wafer

1

2

3

4

5

6

7

8

9

10

11

R1133

100K

IC1100

USB2512A_AEZG

PK950

1

USBDN1_DM

3

USBDN2_DM

7

NC_2

9

NC_4

10

VDDA33_2

11

TEST

12

PRTPWR1

13

OCS1_N

14

VDD18

15

VDD33CR

16

PRTPWR2

17

OCS2_N

18

NC_5

19

NC_6

20

NC_7

21

NC_8

22

SDA/SMBDATA/NON_REM1

23

VDD33

24

SCL/SMBCLK/CFG_SEL0

25

HS_IND/CFG_SEL1

26

RESET_N

27

VBUS_DET

28

SUSP_IND/LOCAL_PWR/NON_REM0

29

VDDA33_3

30

USBUP_DM

31

USBUP_DP

32

XTAL2

5

VDDA33_1

8

NC_3

6

NC_1

4

USBDN2_DP

2

USBDN1_DP

33

XTAL1/CLKIN

34

VDD18PLL

35

RBIAS

36

VDD33PLL

37

VSS

X1100

24MHz

R1115 0

PK950

R1131 0

PK950

P_+5V

P_+5V

C1113

1uF

PK950

BT_DP

BT_DM

R1142 0

PK950

R1143 0

PK950

R1144 0

PK550

R1145 0

PK550

BT_DP_T

BT_DM_T

BT_USB_DM

BT_USB_DP

R1118 0

PK550

R1141

0

PK950

R1140 0

PK950

R11030

USB2 SIDE UNDER

SWITCH ADDED

Capacitors on VBUSA should be

placed as closd to connector as possible.

USB2 Dato to USB2512

Capacitors on VBUSA should be

placed as closd to connector as possible.

SWITCH ADDED

USB1 Dato to MAIN(BCM)

USB1 Dato to USB2512

USB1 SIDE UPPER

USB HUB

13 13

BLUETOOTH

BLUETOOTH

USB HUB

EAX63347201

CLOSE TO BCM3556

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

SIGN11824

WIRELESS_SDA

WIRELESS_PWR_EN

R1208

10K

PK950

P_17V

R1204

10K

PK950

Q1203

2SC3052

READY

E

B

C

C1202

0.1uF

50V

PK950

IR

P_17V_WIRELESS

R1209

22K

PK950

WIRELESS_DETECT

R1216

47K

READY

WIRELESS_SDA

WIRELESS_DL_TX

R1215

10K

READY

WIRELESS_SCL

R1207

4.7K

PK950

Q1200

PK950

E

B

C

+5V_ST

SCL2_3.3V

L1201

BLM18PG121SN1D

PK950

R1212

22

READY

P_17V_WIRELESS

WIRELESS_DL_RX

R1210

2.2K

PK950

IR_PASS

R1217

47K

READY

C1203

2.2uF

PK950

R1203 1K

PK950

SDA2_3.3V

+5V_ST

IR_PASS

R1202

4.7K

PK950

R1214

47K

READY

C1204

0.01uF

50V

PK950

Q1202

2SC3052

READY

E

B

C

WIRELESS_SCL

R1213

0

PK950

JK1201

KJA-PH-3-0168

PK950

14

GND_3

13

I2C_SDA

5

VCC[24V/20V/17V]_5

12

I2C_SCL

11

GND_2

2

VCC[24V/20V/17V]_2

19

GND_5

18

IR

10

RESET

4

VCC[24V/20V/17V]_4

1

VCC[24V/20V/17V]_1

17

GND_4

9

GND_1

8

INTERRUPT

3

VCC[24V/20V/17V]_3

16

UART_TX

7

DETECT

6

VCC[24V/20V/17V]_6

15

UART_RX

20

GND_6

21

SHIELD

EPHY_TDN

002:B4

C1201

1000pF

D1202

5.5V

D1201

5.5V

A2.5V

L1200

CIS21J121

JK1200

XRJV-01V-D12-180

1

TDP

2

TD_CT

3

TDN

4

RDP

5

RD_CT

6

RDN

7

NC

8

GND

D1

D1

D2

LINK_LED

D3

D2

D4

ACTIVE_LED

9

GND

EPHY_TDP

002:B4

R1201

510

D1204

5.5V

EPHY_RDP

002:B4

D1205

5.5V

D1200

5.5V

C1200

1000pF

EPHY_ACTIVE_Y

001:H2

EPHY_RDN

002:B4

D1203

5.5V

R1200

510

EPHY_LINK

D3.3V

D3.3V

Q1201

PK950

AO3407A

G

D

S

R1219

0

PK950

R1226

0

PK950

D3.3V

R1218

10K

READY

WIRELESS_SCL

WIRELESS_SDA

SDA2_3.3V

SCL2_3.3V

FDV301N

Q1205

READY

G

D

S

FDV301N

Q1206

READY

G

D

S

ETHERNET JACK

12 12

ETHERNET/WIRELESS

WIRELESS DIP POWER ON/OFF

WIRELESS INTERFACE

WIRELESS

WIRELESS_DL_TX(WIRELESS_RX)

WIRELESS_DL_RX(WIRELESS_TX)

WIRELESS I2C LEVEL SHIFTER

EAX63347201

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

L1300

MLB-201209-0120P-N2

D1300

5.5V

P1300

12507WR-04L

1

2

3

4

5

R1302

0

C1302

27pF

50V

READY

3D_SYNC_OUT

P_+5V

3D SYNC_IR EMITTER

IR EMITTER

EAX63347201

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R120

100

RA2-

C102

0.1uF

50V

R122

100

RD1+

RCLK1-

RD2+

RB1-

/3D_FPGA_RESET

RC2+

R111

100

RA2+

R113

100

RE1-

RCLK1+

R103 0

C101

10uF

16V

RE2-

R115

100

RB1+

RCLK2-

R117

100

RB2-

R119

100

R121

100

RE1+

RE2+

RC1-

RCLK2+

RA1-

RB2+

R112

100

R114

100

RD1-

RC1+

RD2-

R116

100

C103

100pF

50V

RA1+

RC2-

R118

100

+5V

PC_SER_CLK

R101

0

R102

0

R104

0

PC_SER_DATA

SCL3_3.3V

R105

0

R106

0

R107

0

DISP_EN

SDA3_3.3V

MOD_ROM_TX

MOD_ROM_RX

R108

0

3D_SYNC_OUT

R123

0

R124

0

TCK

TDI

P104

YFDW254-10S

1

2

3

4

5

6

7

8

9

10

2V5

R130

22

R128

1K

R125

22

C125

0.1uF

16V

R126 1K

TMS

R129

1K

R127

22

TDO

R131

22

TB2-

TA2+

TD3+

TC3+

TA4-

TD4-

TB1+

TB4+

TCLK4-

TCLK4+

TCLK2-

TB3+

TB1-

TE2+

TE2-

TD1-

TA1+

TB3-

TC3-

TB2+

TD2-

TD4+

TC1+

TCLK3-

TE3-

TCLK3+

TA4+

TC4-

TD2+

TD1+

TE4+

TE3+

TCLK2+

TE1-

TA2-

TC4+

TA1-

TC2+

TE1+

TA3-

TE4-

TD3-

TCLK1+

TA3+

TCLK1-

TB4-

TC2-

TC1-

PC_SER_CLK

PC_SER_DATA

DISP_EN

R850

0

R849

4.7K

2N7002(F)

Q800

G

D

S

R846

4.7K

2N7002(F)

Q801

G

D

S

R851

4.7K

R847

0

R848

4.7K

SDA3_3.3V

SCL3_3.3V

TRE2-

C901

0.1uF

16V

TCLK3-

TE2+

MSEL[3]

TB1+

TE4-

TRB2-

DATA0

TC3+

TRA2-

TC2+

TCLK1+

TA1+

TCLK2+

/CE

TRCLK2-

SCL3_3.3V

TMS

TB3-

TB3+

1V2

TD4+

TRD2+

TA2-

TC4+

TRE2+

1V2

1V2

SDA3_3.3V

TD3-

TRD2-

TCLK1-

TRE1-

TDO

TD4-

TRB1+

TC1+

TB2+

2V5

TE1-

TRD1-

TB4+

TE3+

TCK

TA1-

C902

0.1uF

16V

TB4-

TCLK4+

TRA1-

TB2-

TA3-

TD3+

TB1-

TRA1+

TC2-

TRB1-

MSEL[2]

TDI

TRC1+

R4059

0

READY

TE4+

CONFIG_DONE

TC4-

2V5

2V5

1V2

TRCLK1-

TCLK4-

DCLK

TRA2+

TRD1+

TCLK2-

C904

0.1uF

16V

/STATUS

C905

0.1uF

16V

TRCLK2+

C908

0.1uF

16V

TD1+

TA4+

TA3+

C906

0.1uF

16V

TA2+

TC1-

TRC2-

ASDO

MSEL[0]

TRC1-

TE3-

TD2-

2V5

SYSCLK

TCLK3+

TC3-

TE1+

TD1-

TRE1+

C907

0.1uF

16V

MSEL[1]

C903

0.1uF

16V

/CONFIG

/3D_FPGA_RESET

TE2-

TRC2+

/CSO

TD2+

TRB2+

TRCLK1+

TA4-

3D_SYNC_OUT

X901

54.0000MHz

4

VDD

1

TRISTATE/OPEN

2

GND

3

OUTPUT

R944

10K

R949

22

C909

0.1uF

16V

SYSCLK

R950

10K

/STATUS

R951

10K

2V5

/CE

CONFIG_DONE

R952

10K

R953

1K

OPT

/CONFIG

DCLK

R964

22

L902

BLM18PG121SN1D

C920

100pF

50V

C919

0.1uF

16V

R968

22

ASDO

/CSO

C917

10uF

16V

R967

22

IC904

EPCS16SI8N_

3

VCC

2

DATA

4

GND

1

NCS

5

ASDI

6

DCLK

7

VCC_1

8

VCC_2

C921

10pF

DATA0

2V5

R965

27

AR90 1

22

1/16 W

2V5

R987

0

OPT

R982

0

OPT

R988

0

MSEL[3]

MSEL[0]

MSEL[2]

MSEL[1]

R984

0

OPT

3V3

3V3

L/R_DETECT

MOD_ROM_TX

MOD_ROM_RX

R704

0

R705

0

R702

0

R703

0

R701

0

R700

0

L/R_DETECT

3V3

R4060

22

R4061

22

R4062

22

R4063

22

P101

FI-R51S-HF

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

R141

100

R142

100

R143

100

R144

100

R145

100

R146

100

R147

100

R148

100

R149

100

R150

100

R151

100

R152

100

P2001

104060-8017

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

3D_SYNC_OUT

E_TDI

E_TMS

E_TDO

E_TCK

R161

22

TCK_FLASH

E_TCK

R159

2K

Q151

FDV301N

G

D

S

R160

4.7K

2V5

R158

5.6K

OPT

R157

0

R162

0

Q152

FDV301N

G

D

S

R163

5.6K

OPT

R166

22

2V5

TDO_FLASH

E_TDO

R164

2K

R165

4.7K

R169

2K

Q153

FDV301N

G

D

S

R168

5.6K

OPT

TMS_FLASH

2V5

E_TMS

R167

0

R171

22

R170

4.7K

R172

0

R174

2K

R176

22

Q154

FDV301N

G

D

S

2V5

R175

4.7K

E_TDI

R173

5.6K

OPT

TDI_FLASH

3V3

3V3

3V3

3V3

R986

0

R983

0

R985

0

R989

0

OPT

3V3

L151

BLM18PG121SN1D

OPT

R153

0

TMS_FLASH

R154

0

TDI_FLASH

R155

0

TCK_FLASH

R156

0

TDO_FLASH

FPGA_D/L

2V5

R181

4.7K

FPGA_D/L

R178

10K

R179

10K

R182

22

Q156

2SC3052

E

B

C

R180

10K

Q155

2SC3052

E

B

C

R183

0

R185

4.7K

R184

10K

2V5

/CE

Q157

2SC3052

E

B

C

R186

22

/CONFIG

3V3

IC1000

EP3C55F484C6N_SHRINK

A11

B8_IO[0]

B11

B8_IO[1]

D10

B8_IO[2]

E10

B8_IO[3]

A10

B8_IO[4]

B10

B8_IO[5]

A9

B8_IO[6]

B9

B8_IO[7]

C10

B8_IO[8]

G11

B8_IO[9]

A8

B8_IO[10]

B8

B8_IO[11]

A7

B8_IO[12]

B7

B8_IO[13]

A6

B8_IO[14]

B6

B8_IO[15]

E9

B8_IO[16]

C8

B8_IO[17]

C7

B8_IO[18]

D8

B8_IO[19]

E8

B8_IO[20]

A5

B8_IO[21]

B5

B8_IO[22]

G10

B8_IO[23]

F10

B8_IO[24]

C6

B8_IO[25]

D7

B8_IO[26]

A4

B8_IO[27]

B4

B8_IO[28]

F8

B8_IO[29]

G8

B8_IO[30]

A3

B8_IO[31]

B3

B8_IO[32]

D6

B8_IO[33]

E7

B8_IO[34]

C3

B8_IO[35]

C4

B8_IO[36]

F7

B8_IO[38]

G7

B8_IO[39]

F9

B8_IO[40]

E6

B8_IO[41]

E5

B8_IO[42]

G9

B8_IO[43]

IC1000

EP3C55F484C6N_SHRINK

F6

VCCD_PLL3

F5

GNDA3

G6

VCCA3

G4

B1_IO[0]

G3

B1_IO[1]

B2

B1_IO[2]

B1

B1_IO[3]

G5

B1_IO[4]

E4

B1_IO[5]

E3

B1_IO[6]

C2

B1_IO[7]

C1

B1_IO[8]

D2

B1_IO[9]

D1

B1_IO[10]

H7

B1_IO[11]

H6

B1_IO[12]

J6

B1_IO[13]

H4

B1_IO[14]

H3

B1_IO[15]

E2

B1_IO[16]

E1

B1_IO[17]

F2

B1_IO[18]

F1

B1_IO[19]

J5

B1_IO[20]

H5

B1_IO[21]

K6

nSTATUS

J7

B1_IO[22]

K7

B1_IO[23]

J4

B1_IO[24]

H2

B1_IO[25]

H1

B1_IO[26]

J3

B1_IO[27]

J2

B1_IO[28]

J1

B1_IO[29]

K2

DCLK

K1

B1_IO[30]

K5

nCONFIG

L5

TDI

L2

TCK

L1

TMS

L4

TDO

L3

nCE

G2

CLK0

G1

CLK1

IC1000

EP3C55F484C6N_SHRINK

T2

CLK2

T1

CLK3

L6

B2_IO[0]

M6

B2_IO[1]

M2

B2_IO[2]

M1

B2_IO[3]

M4

B2_IO[4]

M3

B2_IO[5]

N2

B2_IO[6]

N1

B2_IO[7]

M5

B2_IO[8]

P2

B2_IO[9]

P1

B2_IO[10]

R2

B2_IO[11]

R1

B2_IO[12]

N5

B2_IO[13]

P4

B2_IO[14]

P3

B2_IO[15]

U2

B2_IO[16]

U1

B2_IO[17]

V2

B2_IO[18]

V1

B2_IO[19]

P5

B2_IO[20]

N6

B2_IO[21]

R4

B2_IO[22]

R3

B2_IO[23]

W2

B2_IO[24]

W1

B2_IO[25]

Y2

B2_IO[26]

Y1

B2_IO[27]

T3

B2_IO[28]

N7

B2_IO[29]

P7

B2_IO[30]

AA2

B2_IO[31]

AA1

B2_IO[32]

V4

B2_IO[33]

V3

B2_IO[34]

P6

B2_IO[35]

R5

B2_IO[36]

T4

B2_IO[37]

T5

B2_IO[38]

R6

B2_IO[39]

T6

VCCA1

U5

GNDA1

U6

VCCD_PLL1

IC1000

EP3C55F484C6N_SHRINK

F16

B7_IO[0]

E16

B7_IO[1]

F15

B7_IO[2]

G16

B7_IO[3]

G15

B7_IO[4]

F14

B7_IO[5]

C18

B7_IO[6]

D18

B7_IO[7]

D17

B7_IO[8]

C19

B7_IO[9]

D19

B7_IO[10]

A20

B7_IO[11]

B20

B7_IO[12]

C17

B7_IO[13]

B19

B7_IO[14]

A19

B7_IO[15]

A18

B7_IO[16]

B18

B7_IO[17]

D15

B7_IO[18]

E15

B7_IO[19]

G14

B7_IO[20]

G13

B7_IO[21]

A17

B7_IO[22]

B17

B7_IO[23]

A16

B7_IO[24]

B16

B7_IO[25]

C15

B7_IO[26]

E14

B7_IO[27]

F13

B7_IO[28]

A15

B7_IO[29]

B15

B7_IO[30]

C13

B7_IO[31]

D13

B7_IO[32]

E13

B7_IO[33]

A14

B7_IO[34]

B14

B7_IO[35]

A13

B7_IO[36]

B13

B7_IO[37]

E12

B7_IO[38]

E11

B7_IO[39]

F11

B7_IO[40]

A12

CLK8

B12

CLK9

IC1000

EP3C55F484C6N_SHRINK

G22

CLK5

G21

CLK4

M18

CONF_DONE

M17

MSEL0

L18

MSEL1

L17

MSEL2

K20

MSEL3

L22

B6_IO[0]

L21

B6_IO[1]

K19

B6_IO[2]

K22

B6_IO[3]

K21

B6_IO[4]

J22

B6_IO[5]

J21

B6_IO[6]

H22

B6_IO[7]

H21

B6_IO[8]

K17

B6_IO[9]

K18

B6_IO[10]

J18

B6_IO[11]

F22

B6_IO[12]

F21

B6_IO[13]

J20

B6_IO[14]

J19

B6_IO[15]

J17

B6_IO[16]

H20

B6_IO[17]

H19

B6_IO[18]

E22

B6_IO[19]

E21

B6_IO[20]

H18

B6_IO[21]

H16

B6_IO[22]

D22

B6_IO[23]

D21

B6_IO[24]

F20

B6_IO[25]

F19

B6_IO[26]

G18

B6_IO[27]

H17

B6_IO[28]

C22

B6_IO[29]

C21

B6_IO[30]

B22

B6_IO[31]

B21

B6_IO[32]

C20

B6_IO[33]

D20

B6_IO[34]

F17

B6_IO[35]

G17

B6_IO[36]

F18

VCCA2

E18

GNDA2

E17

VCCD_PLL2

IC1000

EP3C55F484C6N_SHRINK

V17

VCCD_PLL4

V18

GNDA4

U18

VCCA4

AA22

B5_IO[0]

AA21

B5_IO[1]

T17

B5_IO[2]

T18

B5_IO[3]

W20

B5_IO[4]

W19

B5_IO[5]

Y22

B5_IO[6]

Y21

B5_IO[7]

U20

B5_IO[8]

U19

B5_IO[9]

W22

B5_IO[10]

W21

B5_IO[11]

T20

B5_IO[12]

T19

B5_IO[13]

R17

B5_IO[14]

P17

B5_IO[15]

V22

B5_IO[16]

V21

B5_IO[17]

R20

B5_IO[18]

U22

B5_IO[19]

U21

B5_IO[20]

R18

B5_IO[21]

R19

B5_IO[22]

N16

B5_IO[23]

R22

B5_IO[24]

R21

B5_IO[25]

P20

B5_IO[26]

P22

B5_IO[27]

P21

B5_IO[28]

N20

B5_IO[29]

N19

B5_IO[30]

N17

B5_IO[31]

N18

B5_IO[32]

N22

B5_IO[33]

N21

B5_IO[34]

M22

B5_IO[35]

M21

B5_IO[36]

M20

B5_IO[37]

M19

B5_IO[38]

M16

B5_IO[39]

T22

CLK7

T21

CLK6

3V3

R187

10K

3DTV 2010. 02. 11

3DF_INPUT/OUTPUT 1 3

LVDS OUTPUT

LVDS INPUT

<3D_SYNC_OUT>

TP[0]

TP[1]

TP[2]

TP[3]

TP[4]

TP[5]

FPGA DOWNLOAD CONTROL

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

DDR_A[3]

SDDR_DQ[23]

DDR_A[6]

SDDR_DQ[1]

DDR_A[9]

DDR_DQ[23]

DDR_A[7]

DDR_DQ[18]

DDR_A[12]

SDDR_DQ[6]

DDR_A[5]

DDR_DQ[12]

DDR_A[3]

SDDR_DQ[15]

DDR_DQ[17]

DDR_DQ[8]

SDDR_DQ[0]

SDDR_DQ[31]

SDDR_DQ[31]

DDR_DQ[2]

SDDR_DQ[10]

SDDR_DQ[24]

DDR_A[0]

SDDR_DQ[14]

SDDR_DQ[11]

SDDR_DQ[29]

1V8

DDR_DQ[15]

SDDR_DQ[27]

1V8

DDR_DQ[22]

DDR_DQ[7]

SDDR_DQ[21]

DDR_DQ[1]

DDR_DQ[14]

DDR_DQ[16]

SDDR_DQ[26]

SDDR_DQ[4]

DDR_DQ[14]

DDR_A[10]

SDDR_DQ[19]

DDR_DQ[29]

DDR_DQ[15]

DDR_DQ[18]

DDR_A[12-0]

SDDR_DQ[30]

DDR_A[7]

DDR_DQ[7]

DDR_DQ[27]

SDDR_DQ[30]

SDDR_DQ[16]

DDR_DQ[13]

SDDR_DQ[16]

DDR_DQ[19]

DDR_DQ[20]

DDR_DQ[1]

SDDR_DQ[9]

SDDR_DQ[22]

DDR_DQ[0]

DDR_A[4]

DDR_DQ[31]

DDR_DQ[3]

SDDR_DQ[17]

DDR_DQ[31]

SDDR_DQ[25]

DDR_DQ[30]

DDR_A[10]

DDR_A[0] DDR_DQ[19]

DDR_DQ[30]

SDDR_DQ[26]

SDDR_DQ[12]

DDR_DQ[20]

SDDR_DQ[6]

DDR_DQ[26]

SDDR_DQ[7]

SDDR_DQ[5]

DDR_DQ[2]

SDDR_DQ[10]

SDDR_DQ[8]

SDDR_DQ[22]

DDR_A[11]

DDR_DQ[26]

DDR_DQ[12]

SDDR_DQ[20]

SDDR_DQ[2]

DDR_A[4]

SDDR_DQ[1]

DDR_DQ[13]

DDR_DQ[6]

DDR_A[12-0]

SDDR_DQ[3]

DDR_DQ[28]

DDR_DQ[5]

DDR_DQ[6]

DDR_DQ[25]

SDDR_DQ[3]

SDDR_DQ[4]

DDR_DQ[8]

DDR_A[12]

SDDR_DQ[28]

DDR_A[8]

DDR_DQ[25]

DDR_DQ[0]

DDR_DQ[9]

SDDR_DQ[18]

DDR_A[1]

DDR_DQ[10]

DDR_DQ[24]

DDR_A[11]

DDR_DQ[17]

DDR_A[2]

SDDR_DQ[2]

DDR_DQ[28]

SDDR_DQ[25]

SDDR_DQ[17]

DDR_A[1]

SDDR_DQ[15]

DDR_DQ[15-0]

SDDR_DQ[24]

DDR_DQ[5]

DDR_DQ[4]

SDDR_DQ[13]

SDDR_DQ[21]

SDDR_DQ[20]

SDDR_DQ[29]

DDR_A[9]

SDDR_DQ[8]

DDR_DQ[11]

SDDR_DQ[28]

SDDR_DQ[12]

DDR_DQ[22]

SDDR_DQ[7]

DDR_DQ[31-16]

DDR_DQ[29]

SDDR_DQ[18]

SDDR_DQ[9]

DDR_DQ[4]

DDR_A[8]

DDR_A[2]

DDR_DQ[10]

SDDR_DQ[27]

SDDR_DQ[11]

DDR_A[6]

DDR_DQ[21]

DDR_DQ[3]

DDR_DQ[16]

SDDR_DQ[23]

SDDR_DQ[14]

DDR_DQ[24]

SDDR_DQ[13]

DDR_DQ[23]

SDDR_DQ[0]

SDDR_DQ[19]

DDR_DQ[27]

DDR_DQ[21]

DDR_DQ[9]

SDDR_DQ[5]

DDR_A[5]

DDR_DQ[11]

C1006

470pF

50V

C1078

0.1uF

16V

DDR2_CKE

C1047

10uF

16V

AR10 15

56

AR1010

56

DDR2_CKE

R1012

56

AR10 18

56

/DDR2_CLK

/DDR_CS

C1025

0.1uF

16V

C1087

0.1uF

16V

C2014

0.1uF

16V

DDR2_ODT

SDDR_DQ[15-0]

C2004

0.1uF

16V

DDR2_ODT

DDR_BA[0]

C1024

0.1uF

16V

/DDR_CS

SDDR_DQ[31-16]

C1045

0.1uF

16V

AR1002

33

C1090

0.1uF

16V

C2017

0.1uF

16V

DDR_UDQS[1]

R1008 33

/DDR_CS

/DDR_CAS

C1054

0.1uF

16V

DDR_UDQS[0]

C1049

0.1uF

16V

C1098

0.1uF

16V

DDR_BA[1]

C1089

0.1uF

16V

C1063

0.1uF

16V

2V5

C2008

0.1uF

16V

C1033

0.1uF

16V

AR10 14

56

1V8

DDR_A[2]

C1084

0.1uF

16V

DDR_A[7]

C1064

0.1uF

16V

C1005

0.1uF

16V

C1016

0.1uF

16V

AR1004

33

DDR_A[12]

C1019

100pF

50V

C1076

0.1uF

16V

AR1012

56

DDR_BA[0]

C1012

0.1uF

16V

C1036

0.1uF

16V

DDR_UDM[0]

IC1001

H5PS5162FFR-S6C

J2

VREF

J8

CK

H2

VSSQ2

B7

UDQS

N8

A4

P8

A8

L1

NC4

L2

BA0

R8

NC3

K7

RAS

F8

VSSQ3

F3

LDM

P3

A9

M3

A1

N3

A5

K8

CK

R3

NC5

L3

BA1

J7

VSSDL

L7

CAS

F2

VSSQ4

B3

UDM

M2

A10/AP

K2

CKE

R7

NC6

M7

A2

N7

A6

M8

A0

J1

VDDL

K3

WE

E8

LDQS

P7

A11

K9

ODT

A2

NC1

N2

A3

P2

A7

H8

VSSQ1

F7

LDQS

A8

UDQS

R2

A12

L8

CS

E2

NC2

E7

VSSQ5

D8

VSSQ6

D2

VSSQ7

A7

VSSQ8

B8

VSSQ9

B2

VSSQ10

P9

VSS1

N1

VSS2

J3

VSS3

E3

VSS4

A3

VSS5

G9

VDDQ1

G7

VDDQ2

G3

VDDQ3

G1

VDDQ4

E9

VDDQ5

C9

VDDQ6

C7

VDDQ7

C3

VDDQ8

C1

VDDQ9

A9

VDDQ10

R1

VDD1

M9

VDD2

J9

VDD3

E1

VDD4

A1

VDD5

B9

DQ15

B1

DQ14

D9

DQ13

D1

DQ12

D3

DQ11

D7

DQ10

C2

DQ9

C8

DQ8

F9

DQ7

F1

DQ6

H9

DQ5

H1

DQ4

H3

DQ3

H7

DQ2

G2

DQ1

G8

DQ0

DDR_A[5]

C1095

0.1uF

16V

DDR_BA[0]

SDDR_DQ[31-16]

DDR_LDM[1]

C2013

0.1uF

16V

R1007 33

C1096

0.1uF

16V

/DDR_CAS

R1010 1K

/DDR_CS

R1002 33

DDR_A[10]

/DDR_RAS

AR1007

33

DDR_A[9]

C1079

0.1uF

16V

C1013

0.1uF

16V

DDR_A[6]

2V5

C1046

0.1uF

16V

1V8

DDR_A[9]

DDR_VREF1

DDR_LDQS[0]

DDR_VREF0

C1057

0.1uF

16V

R1011

56

C1059

0.1uF

16V

C1050

0.1uF

16V

C1071

10uF

16V

C1039

0.1uF

16V

DDR_UDQS[0]

C1037

0.1uF

16V

DDR_A[11]

DDR_A[8]

DDR_UDM[1]

C1091

0.1uF

16V

DDR2_ODT

DDR2_CKE

DDR_LDQS[0]

R1003 33

DDR_A[5]

C1060

0.1uF

16V

1V2

C1056

0.1uF

16V

AR1005

33

C1043

0.1uF

16V

AR1009

56

DDR_A[11]

C1088

0.1uF

16V

C1041

0.1uF

16V

DDR_LDQS[1]

C1001

10uF

16V

DDR_A[10]

C2005

0.1uF

16V

DDR_A[1]

C1068

0.1uF

16V

1V8

C1007

0.1uF

16V

C2003

0.1uF

16V

DDR_A[3]

DDR_A[12-0]

DDR2_ODT

C2011

0.1uF

16V

/DDR_CAS

C1099

0.1uF

16V

DDR_BA[0]

C1051

0.1uF

16V

2V5

1V2

AR1003

33

DDR2_CLK

C1002

0.1uF

16V

C2002

0.1uF

16V

C2016

0.1uF

16V

C1017

0.1uF

16V

AR10 16

56

DDR_A[6]

DDR_A[0]

C1080

0.1uF

16V

C1058

0.1uF

16V

DDR2_CKE

DDR2_ODT

C1093

0.1uF

16V

IC1002

H5PS5162FFR-S6C

J2

VREF

J8

CK

H2

VSSQ2

B7

UDQS

N8

A4

P8

A8

L1

NC4

L2

BA0

R8

NC3

K7

RAS

F8

VSSQ3

F3

LDM

P3

A9

M3

A1

N3

A5

K8

CK

R3

NC5

L3

BA1

J7

VSSDL

L7

CAS

F2

VSSQ4

B3

UDM

M2

A10/AP

K2

CKE

R7

NC6

M7

A2

N7

A6

M8

A0

J1

VDDL

K3

WE

E8

LDQS

P7

A11

K9

ODT

A2

NC1

N2

A3

P2

A7

H8

VSSQ1

F7

LDQS

A8

UDQS

R2

A12

L8

CS

E2

NC2

E7

VSSQ5

D8

VSSQ6

D2

VSSQ7

A7

VSSQ8

B8

VSSQ9

B2

VSSQ10

P9

VSS1

N1

VSS2

J3

VSS3

E3

VSS4

A3

VSS5

G9

VDDQ1

G7

VDDQ2

G3

VDDQ3

G1

VDDQ4

E9

VDDQ5

C9

VDDQ6

C7

VDDQ7

C3

VDDQ8

C1

VDDQ9

A9

VDDQ10

R1

VDD1

M9

VDD2

J9

VDD3

E1

VDD4

A1

VDD5

B9

DQ15

B1

DQ14

D9

DQ13

D1

DQ12

D3

DQ11

D7

DQ10

C2

DQ9

C8

DQ8

F9

DQ7

F1

DQ6

H9

DQ5

H1

DQ4

H3

DQ3

H7

DQ2

G2

DQ1

G8

DQ0

C1070

10uF

16V

DDR2_CKE

C1011

470pF

50V

C1081

0.1uF

16V

C1038

0.1uF

16V

DDR_A[3]

DDR_UDM[0]

DDR_BA[1]

R1004 1K

C1022

0.1uF

16V

DDR_A[2]

DDR2_CLK

DDR_VTT

R1009 1K

/DDR2_CLK

C1097

0.1uF

16V

DDR_A[3]

/DDR_WE

C2007

0.1uF

16V

C1042

100pF

50V

SDDR_DQ[15-0]

DDR_A[4]

DDR_A[12-0]

DDR_A[8]

AR10 17

56

C2001

0.1uF

16V

DDR_A[9]

DDR_A[0]

DDR_VREF1

C1027

0.1uF

16V

DDR_BA[1]

DDR_BA[1]

/DDR2_CLK

DDR_BA[1]

C2006

0.1uF

16V

C2018

0.1uF

16V

C1077

0.1uF

16V

DDR_A[10]

C1021

0.1uF

16V

DDR_A[5]

C1015

0.1uF

16V

C1053

100pF

50V

C1074

0.1uF

16V

DDR_UDQS[1]

C1029

0.1uF

16V

DDR_LDQS[1]

/DDR_RAS

DDR_VTT

C1004

0.1uF

16V

AR1006

33

C1094

0.1uF

16V

C1044

0.1uF

16V

C1018

0.1uF

16V

C1023

0.1uF

16V

/DDR_CS

C1092

0.1uF

16V

DDR_A[7]

R1001

100

DDR_A[11]

C1048

0.1uF

16V

AR1001

33

AR1008

33

/DDR_WE

1V2

C1073

0.1uF

16V

C1061

0.1uF

16V

/DDR_RAS

C1082

0.1uF

16V

DDR2_CLK

C1062

0.1uF

16V

C1020

0.1uF

16V

DDR_VTT

/DDR_WE

C1069

0.1uF

16V

C1065

0.1uF

16V

AR1013

56

/DDR_RAS

C1066

100pF

50V

DDR_A[1]

/DDR_WE

C1010

0.1uF

16V

DDR_UDM[1]

AR1011

56

DDR_A[0]

C2009

0.1uF

16V

C2010

0.1uF

16V

DDR_A[8]

C1083

0.1uF

16V

DDR_A[12]

DDR_A[4]

C1035

0.1uF

16V

C1085

0.1uF

16V

C1040

0.1uF

16V

C1075

0.1uF

16V

C1009

0.1uF

16V

/DDR_WE

C1008

0.1uF

16V

C1034

0.1uF

16V

DDR_VREF0

C1067

100pF

50V

C1031

470pF

50V

R1005 1K

DDR_LDM[1]

C1072

0.1uF

16V

C1003

0.1uF

16V

R1006

100

DDR_A[6]

1V8

/DDR_RAS

DDR_A[1]

DDR_LDM[0]

DDR_A[4]

C1028

0.1uF

16V

C1014

0.1uF

16V

1V8

DDR_BA[0]

DDR_A[12]

C1055

0.1uF

16V

DDR_LDM[0]

DDR_A[7]

C2000

0.1uF

16V

C1030

470pF

50V

C1052

0.1uF

16V

C1032

0.1uF

16V

C1026

0.1uF

16V

/DDR_CAS

/DDR_CAS

C2015

0.1uF

16V

C2012

0.1uF

16V

1V8

DDR_A[2]

C1086

0.1uF

16V

3V3

3V3

C2019

0.1uF

16V

IC1000

EP3C55F484C6N_SHRINK

AA12

CLK13

AB12

CLK12

AA13

B4_IO[0]

AB13

B4_IO[1]

AA14

B4_IO[2]

AB14

B4_IO[3]

V12

B4_IO[4]

W13

B4_IO[5]

Y13

B4_IO[6]

AA15

B4_IO[7]

AB15

B4_IO[8]

U12

B4_IO[9]

Y14

B4_IO[10]

Y15

B4_IO[11]

AA16

B4_IO[12]

AB16

B4_IO[13]

V13

B4_IO[14]

W14

B4_IO[15]

U13

B4_IO[16]

V14

B4_IO[17]

U14

B4_IO[18]

U15

B4_IO[19]

V15

B4_IO[20]

W15

B4_IO[21]

T14

B4_IO[22]

T15

B4_IO[23]

AB18

B4_IO[24]

AA17

B4_IO[25]

AB17

B4_IO[26]

AA18

B4_IO[27]

AA19

B4_IO[28]

AB19

B4_IO[29]

W17

B4_IO[30]

Y17

B4_IO[31]

AA20

B4_IO[32]

AB20

B4_IO[33]

V16

B4_IO[34]

U16

B4_IO[35]

U17

B4_IO[36]

T16

B4_IO[37]

R16

B4_IO[38]

R14

B4_IO[39]

R15

B4_IO[40]

IC1000

EP3C55F484C6N_SHRINK

V6

B3_IO[0]

V5

B3_IO[1]

U7

B3_IO[2]

U8

B3_IO[3]

Y4

B3_IO[4]

Y3

B3_IO[5]

Y6

B3_IO[6]

AA3

B3_IO[7]

AB3

B3_IO[8]

W6

B3_IO[9]

V7

B3_IO[10]

AA4

B3_IO[11]

AB4

B3_IO[12]

AA5

B3_IO[13]

AA6

B3_IO[14]

AB6

B3_IO[15]

AB5

B3_IO[16]

W7

B3_IO[17]

Y7

B3_IO[18]

U9

B3_IO[19]

V8

B3_IO[20]

W8

B3_IO[21]

AA7

B3_IO[22]

AB7

B3_IO[23]

Y8

B3_IO[24]

T10

B3_IO[25]

T11

B3_IO[26]

V9

B3_IO[27]

V10

B3_IO[28]

U10

B3_IO[29]

AA8

B3_IO[30]

AB8

B3_IO[31]

AA9

B3_IO[32]

AB9

B3_IO[33]

U11

B3_IO[34]

V11

B3_IO[35]

W10

B3_IO[36]

Y10

B3_IO[37]

AA10

B3_IO[38]

AB10

B3_IO[39]

AA11

CLK15

AB11

CLK14

IC1000

EP3C55F484C6N_SHRINK

J11

VCCINT[0]

J12

VCCINT[1]

L14

VCCINT[2]

M14

VCCINT[3]

P11

VCCINT[4]

P12

VCCINT[5]

L9

VCCINT[6]

M9

VCCINT[7]

J13

VCCINT[8]

J14

VCCINT[9]

K14

VCCINT[10]

J10

VCCINT[11]

K9

VCCINT[12]

N9

VCCINT[13]

P9

VCCINT[14]

P10

VCCINT[15]

P13

VCCINT[16]

P14

VCCINT[17]

N14

VCCINT[18]

J16

VCCINT[19]

K15

VCCINT[20]

L16

VCCINT[21]

M15

VCCINT[22]

R12

VCCINT[23]

R10

VCCINT[24]

R8

VCCINT[25]

H9

VCCINT[26]

G12

VCCINT[27]

J8

VCCINT[28]

M8

VCCINT[29]

T7

VCCINT[30]

T9

VCCINT[31]

T13

VCCINT[32]

P15

VCCINT[33]

H15

VCCINT[34]

H11

VCCINT[35]

K8

VCCINT[36]

L7

VCCINT[37]

D4

VCCIO1[0]

F4

VCCIO1[1]

K4

VCCIO1[2]

N4

VCCIO2[0]

U4

VCCIO2[1]

W4

VCCIO2[2]

AB2

VCCIO3[0]

W5

VCCIO3[1]

W9

VCCIO3[2]

W11

VCCIO3[3]

AB21

VCCIO4[0]

W12

VCCIO4[1]

W16

VCCIO4[2]

W18

VCCIO4[3]

P18

VCCIO5[0]

V19

VCCIO5[1]

Y19

VCCIO5[2]

E19

VCCIO6[0]

G19

VCCIO6[1]

L19

VCCIO6[2]

A21

VCCIO7[0]

D12

VCCIO7[1]

D14

VCCIO7[2]

D16

VCCIO7[3]

A2

VCCIO8[0]

D5

VCCIO8[1]

D9

VCCIO8[2]

D11

VCCIO8[3]

IC1000

EP3C55F484C6N_SHRINK

L10

GND[0]

L11

GND[1]

M10

GND[2]

M11

GND[3]

L12

GND[4]

L13

GND[5]

M12

GND[6]

M13

GND[7]

N11

GND[8]

K11

GND[9]

N12

GND[10]

K12

GND[11]

K13

GND[12]

N13

GND[13]

N10

GND[14]

K10

GND[15]

J9

GND[16]

F12

GND[17]

H12

GND[18]

H13

GND[19]

J15

GND[20]

K16

GND[21]

L15

GND[22]

N15

GND[23]

R13

GND[24]

R11

GND[25]

R9

GND[26]

P8

GND[27]

H14

GND[28]

H10

GND[29]

H8

GND[30]

N8

GND[31]

R7

GND[32]

T8

GND[33]

T12

GND[34]

P16

GND[35]

L8

GND[36]

M7

GND[37]

A1

GND[38]

C5

GND[39]

C9

GND[40]

C11

GND[41]

C12

GND[42]

C14

GND[43]

C16

GND[44]

A22

GND[45]

E20

GND[46]

G20

GND[47]

L20

GND[48]

P19

GND[49]

V20

GND[50]

Y20

GND[51]

AB22

GND[52]

Y18

GND[53]

Y16

GND[54]

Y12

GND[55]

Y11

GND[56]

Y9

GND[57]

Y5

GND[58]

AB1

GND[59]

N3

GND[60]

U3

GND[61]

W3

GND[62]

D3

GND[63]

F3

GND[64]

K3

GND[65]

3DTV

3DF_DDR2

2 3

2010. 02. 11

Copyright © 2010 LG Electronics Inc. All rights reserved.

Only for training and service purposes

LGE Internal Use Only