LG 50PX950 Schematic

PLASMA TV

SERVICE MANUAL

CAUTION

BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CHASSIS : PB01B

MODEL : 50PX950 50PX950-SA

North/Latin America http://aic.lgservice.com Europe/Africa http://eic.lgservice.com Asia/Oceania http://biz.lgservice.com

Internal Use Only

Printed in Korea

P/NO : MFL66279702(1008-REV00)

- 2 -

Only for training and service purposes

CONTENTS

CONTENTS ............................................................................................................................... 2

SAFETY PRECAUTIONS...........................................................................................................3

SPECIFICATION.........................................................................................................................4

ADJUSTMENT INSTRUCTION..................................................................................................6

BLOCK DIAGRAM ...................................................................................................................14

EXPLODED VIEW ...................................................................................................................15

SVC. SHEET ................................................................................................................................

- 3 -

Only for training and service purposes

SAFETY PRECAUTIONS

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.

It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.

Keep wires away from high voltage or high temperature parts. Due to high vacuum and large surface area of picture tube,

extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

1.5 Kohm/10W

To Instrument's exposed METALLIC PARTS

Good Earth Ground such as WATER PIPE, CONDUIT etc.

AC Volt-meter

IMPORTANT SAFETY NOTICE

0.15uF

- 4 -

Only for training and service purposes

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application Range

(1) This spec sheet is applied all of PDP TV with PB01B chassis.

2. Specification

Each part is tested as below without special appointment. (1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 °C ± 5 °C (2) Relative Humidity : 65 % ± 10 % (3) Power Voltage : Standard input voltage (100 V - 240 V ~ 50 / 60 Hz)

* Standard Voltage of each product is marked by models

(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with

BOM.

(5) The receiver must be operated for about 5 minutes prior to the adjustment.

3. Test Method

(1) Performance : LGE TV test method followed. (2) Demanded other specification

Safety: UL, CSA, IEC specification, CE EMC : FCC, ICES, IEC specification, CE

Model Name Market Brand 50PX950-SA Brazil LG

Model Name Market Appliance 50PX950-SA Brazil Safety : IEC/EN60065

- 5 -

Only for training and service purposes

4. General Specification

No Item Specification Model Remark

1. Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N PX950

2) NTSC / PAL-M / PAL-N Analog model

2. Available Channel 1) VHF : 02~13 PX950

2) UHF : 14~69

3) DTV : 07-69 (VHF high/UHF)

4) CATV : 02~135

1) VHF : 02~13 Analog model

2) UHF : 14~69

3) CATV : 02~135

3. Input Voltage 1)AC 100 V ~ 240 V 50 / 60 Hz

4. Market BRAZIL PX950 Latin America

5. Screen Size 127 cm (50 inch) Wide(1920 X1080) 50PX950-SA 152 cm (60 inch) Wide(1920 X 1080) 60PX950-SA

6. Aspect Ratio 16:9

7. Tuning System FS

8. Module PDP50R103## (1920 X 1080) 50PX950-SA PDP60R103## (1920 X 1080) 60PX950-SA

9. Operating Environment 1) Temp : 0 deg ~ 40 deg

2) Humidity : ~ 80 %

10. Storage Environment 1) Temp : -20 deg ~ 60 deg

2) Humidity : 0 % ~ 90 %

- 6 -

Only for training and service purposes

ADJUSTMENT INSTRUCTION

1. Application Range

This spec. sheet applies to PB01B Chassis applied PDP TV all models manufactured in TV factory.

2. Specification

(1) Because this is not a hot chassis, it is not necessary to use

an isolation transformer. However, the use of isolation transformer will help protect test instrument.

(2) Adjustment must be done in the correct order. But it is

flexible when its factory local problem occurs.

(3) The adjustment must be performed in the circumstance of

25 cC ± 5 cC of temperature and 65 % ± 10 % of relative humidity if there is no specific designation.

(4) The input voltage of the receiver must keep 100 V - 240 V,

50 / 60 Hz.

(5) Before adjustment, execute Heat-Run for 5 minutes.

V After Receive 100% Full white pattern (06CH) then

process Heat-run

(or “8. Test pattern” condition of Ez-Adjust status)

V How to make set white pattern

1) Press Power ON button of Service Remocon

2) Press ADJ button of Service remocon. Select “10. Test pattern” and, after select “White” using navigation button, and then you can see 100% Full White pattern.

* In this status you can maintain Heat-Run useless any

pattern generator

* Notice: if you maintain one picture over 20 minutes

(Especially sharp distinction black with white pattern – 13Ch, or Cross hatch pattern – 09Ch) then it can appear image stick near black level.

3. Adjustment items

3-1. PCB Assembly adjustment

(1) Adjust 480i Comp1 (2) Adjust 1080p Comp1/RGB

- If it is necessary, it can adjustment at Manufacture Line

- You can see set adjustment status at “9. ADJUST CHECK” of the “In-start menu”

3-2. Set Assembly Adjustment

(1) EDID (The Extended Display Identification Data ) (2) Color Temperature (White Balance) Adjustment (3) Make sure RS-232C control (4) Selection Factory output option

4. PCB Assembly Adjustment

4-1. Using RS-232C

- Adjust 3 items at 3-1 PCB assembly adjustments “ (3) Adjustment sequence” one after the order.

(1) Adjustment protocol

(2) Necessary items before Adjustment items

O Pattern Generator : (MSPG-925FA) O Adjust 480i Comp1

(MSPG-925FA:model :209, pattern :65) – Comp1 Mode

O Adjust 1080p Comp1

(MSPG-925FA:model :225 , pattern :65) – Comp1 Mode

O Addjust RGB (MSPG-925FA:model :225 , pattern :65)

– RGB-PC Mode

* If you want more information then see the below Adjustment

method (Factory Adjustment)

(3) Adjustment sequence

O aa 00 00: Enter the ADC Adjustment mode. O xb 00 40: Change the mode to Component1 (No actions) O ad 00 10: Adjust 480i Comp O ad 00 10: Adjust 1080p comp O xb 00 60: Change to RGB-PC mode(No action) O ad 00 10: Adjust 1080p RGB O xb 00 90: Endo of Adjustmennt

< See ADC Adjustment RS232C Protocol_Ver1.0 >

Order Command Set response

1. Inter the aa 00 00 a 00 OK00x

Adjustment mode

2. Change the XB 00 40 b 00 OK40x (Adjust 480i Comp1 )

Source XB 00 60 (Adjust 1080p Comp1)

b 00 OK60x (Adjust 1080p RGB)

3. Start ad 00 10

Adjustment

4. Return the OKx ( Success condition )

Response NGx ( Failed condition )

5. Read data ( main ) (main : component1 480i, RGB 1080p)

Adjustment ad 00 20 00000000000000000000000007c007b006dx data ( main ) (main : component1 480i, RGB 1080p)

ad 00 30 000000070000000000000000007c00830077x

6. Confirm ad 00 99 NG 03 00x (Failed condition)

Adjustment NG 03 01x (Failed condition)

NG 03 02x (Failed condition) OK 03 03x (Success condition)

7. End of ad 00 90 d 00 OK90x

Adjustment

5. Factory Adjustment

PB01A : USE EXTERNAL ADC(BCM) : using instrument. PB02A : USE INTERNAL ADC(S7) : using internal pattern.

5-1. Auto Adjust Component

480i/1080p RGB 1080p

(1) Summary : Adjustment component 480i/1080i and RGB

1080p is Gain and Black level setting at Analog to Digital converter, and compensate the RGB deviation

(2) Using instrument

1) Adjustment remocon, 801GF(802B, 802F, 802R) or MSPG925FA pattern generator

(It can output 480i/1080i horizontal 100 % color bar pattern signal, and its output level must setting

0.7 V ± 0.1 V p-p correctly)

* You must make it sure its resolution and pattern cause every

instrument can have different setting

2) Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB (Factory adjustment)

O ADC 480i Component1 adjustment -

- Check connection of Component1

- MSPG-925FA Ë Model: 209, Pattern 65

O Set Component 480i mode and 100% Horizontal

Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL”

O ADC 1080p Component1 / RGB adjustment

- Check connection both of Component1 and RGB

- MSPG-925FA Ë Model: 225, Pattern 65

O Set Component 1080p mode and 100% Horizontal

Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to “NORMAL”

O After get each the signal, wait more a second and

enter the “IN-START” with press IN-START key of Service remocon. After then select “7. External ADC” with navigator button and press “Enter”.

O After Then Press key of Service remocon “Right

Arrow(VOL+)”

O You can see “ADC Component1 Success” O Component1 1080p, RGB 1080p Adjust is same

method.

O Component 1080p Adjustment in Component1 input

mode

O RGB 1080p adjustment in RGB input mode O If you success RGB 1080p Adjust. You can see “ADC

RGB-DTV Success”

Caution : Set Volume 0 after adjustment

5-2. Use Internal ADC(S7)

- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC Calibration(START)

5-3. EDID(The Extended Display

Identification Data) / DDC(Display Data Channel) download

(1) Summary

1) It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize “Plug and Play” function.

2) For EDID data write, we use DDC2B protocol.

5-4. Auto Download

(1) After enter Service Mode by pushing “ADJ” key, (2) Enter EDID D/L mode. (3) Enter “START” by pushing “OK” key.

Caution

- Never connect HDMI & D-sub Cable when the user downloading .

- Use the proper cables below for EDID Writing.

- 7 -

Only for training and service purposes

< Adjustment pattern : 480i / 1080p 60Hz Pattern >

* Edid data and Model option download(RS232)

5-5. Manual Download

(1) Write HDMI EDID data

1) Using instruments

- Jig. (PC Serial to D-Sub connection) for PC, DDC adjustment.

- S/W for DDC recording (EDID data write and read)

- D-sub jack

- Additional HDMI cable connection Jig.

2) Preparing and setting.

- Set instruments and Jig. Like pic.5), then turn on PC and Jig.

- Operate DDC write S/W (EDID write & read)

- It will operate in the DOS mode.

- EDID data (Model name = LG TV)

- 2010 EDID DATA CHECK SUM.

- 8 -

Only for training and service purposes

BLOCK(0) BLOCK(1)

HD HDMI1 3B 2C

HDMI2 3B 1C HDMI3 3B 0C

RGB A3

FHD HDMI1 3B 2C

HDMI2 3B 1C HDMI3 3B 0C HDMI4 3B FC

RGB A3

< For write EDID data, setting Jig and another instruments >

* See Working Guide if you want more information about EDID

communication.

5-6. Adjustment Color Temperature

(White balance)

(1) Using Instruments

1) Color Analyzer: CA-210 (CH 9)

- Using LCD color temperature, Color Analyzer (CA-

210) must use CH 9, which Matrix compensated (White, Red, Green, Blue compensation) with CS-

2100. See the Coordination bellowed one.

2) Auto-adjustment Equipment (It needs when Autoadjustment – It is availed communicate with RS-232C : Baud rate: 115200)

3) Video Signal Generator MSPG-925F 720p, 216Gray (Model: 217, Pattern 78)

(2) Connection Diagram (Auto Adjustment)

1) Using Inner Pattern

2) Using HDMI input

(3) White Balance Adjustment

- If you can’t adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at “Ez-Adjust Menu – 7. White Balance” there items “NONE, INNER, HDMI”. It is normally setting at inner basically. If you can’t adjust using inner pattern you can select HDMI item, and

you can adjust.

- In manual Adjust case, if you press ADJ button of service

remocon, and enter “Ez-Adjust Menu – 7. White Balance”, then automatically inner pattern operates. (In case of “Inner” originally “Test-Pattern. On” will be selected in The “Test-Pattern. On/Off”.

O Connect all cables and equipments like Pic.5) O Set Baud Rate of RS-232C to 115200. It may set

115200 orignally.

O Connect RS-232C cable to set O Connect HDMI cable to set

V RS-232C COMMAND(Commonly apply)

- 9 -

Only for training and service purposes

RS-232C COMMAND [CMD ID DATA] Meaning wb 00 00 White Balance adjustment start. wb 00 10 Start of adjust gain

(Inner white pattern) wb 00 1f End of gain adjust wb 00 20 Start of offset adjust

(Inner white pattern) wb 00 2f End of offset adjust wb 00 ff End of White Balance adjust

(Inner pattern disappeared)

< Connection Diagram for Adjustment White balance >

O wb 00 00”: Start Auto-adjustment of white balance. O “wb 00 10”: Start Gain Adjustment (Inner pattern) O “jb 00 c0” : O … O “wb 00 1f”: End of Adjustment

* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-

end)

O “wb 00 ff”: End of white balance adjustment (inner

pattern disappear)

V Adjustment Mapping information

O When Color temperature (White balance) Adjustment

(Automatically)

- Press “Power only key” of service remocon and operate automatically adjustment.

- Set BaudRate to 115200.

O You must start “wb 00 00” and finish it “wb 00 ff”. O If it needs, then adjustment “Offset”.

(4) White Balance Adjustment (Manual adjustment)

1) Test Equipment: CA-210

- Using PDP color temperature, Color Analyzer (CA-

210) must use CH 10, which Matrix compensated (White, Red, Green, Blue compensation) with CS-

2100. See the Coordination bellowed one.

2) Manual adjustment sequence is like bellowed one.

- Turn to “Ez-Adjust” mode with press ADJ button of service remocon.

- Select “10.Test Pattern” with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode.

- Let CA-210 to zero calibration and must has gap more 10cm from center of PDP module when adjustment.

- Press “ADJ” button of service remocon and select “7.White-Balance” in “Ez-Adjust” then press “

G” button

of navigation key. (When press “

G” button then set will

go to full white mode)

- Adjust at three mode (Cool, Medium, Warm)

- If “cool” mode

Let B-Gain to 192 and R, G, B-Cut to 64 and then control R, G gain adjustment High Light adjustment.

- If “Medium” and “Warm” mode Let R-Gain to 192 and

R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment.

- All of the three mode

Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment.

- With volume button (+/-) you can adjust.

- After all adjustment finished, with Enter (_ key) turn to

Ez-Adjust mode. Then with ADJ button, exit from adjustment mode

* Attachment: White Balance adjustment coordination and color

temperature.

O Using CS-1000 Equipment.

- COOL : T=11000K, _uv=0.000, x=0.276 y=0.283

- MEDIUM : T=9300K, _uv=0.000, x=0.285 y=0.293

- WARM : T=6500K, _uv=0.000, x=0.313 y=0.329

O Using CA-210 Equipment. (10 CH)

- Contras value : 216 Gray

- Brighness spec.

6. Test of RS-232C control.

- Press In-Start button of Service Remocon then set the “4.Baud Rate” to 115200. Then check RS-232C control and

7. Selection of Country option.

- Selection of country option is allowed only North American model (Not allowed Korean model). It is selection of Country about Rating and Time Zone.

(1) Models: All models which PB82C Chassis (See the first

page.)

(2) Press “In-Start” button of Service Remocon, then enter the

“Option” Menu with “PIP CH-“ Button

(3) Select one of these three (USA, CANADA, MEXICO)

defends on its market using “Vol. +/-“button.

Caution : Don’t push The INSTOP KEY after completing the

function inspection

Caution : Inspection only PAL M

- 10 -

Only for training and service purposes

Color Test Color Coordination

temperature Equipment x y

COOL CA-210 0.276±0.002 0.283±0.002

MEDIUM CA-210 0.285±0.002 0.293±0.002

WARM CA-210 0.313±0.002 0.329±0.002

Item Min Typ Max Unit Remark White 49 60 - cd/m - 100%Window White average Pattern brightness - 100IRE(255Gray)

- Picture: Vivid(Medium ) Brightness -20 +20 % - 85IRE(216Gray) 100% uniformity Window White Pattern

- Picture: Vivid(Medium)

RS-232C COMMAND

CENTER

[CMD ID DATA] MIN (DEFAULT) MAX

Cool Mid Warm Cool Mid Warm R Gain jg Ja jd 00 184 192 192 192 G Gain jh Jb je 00 187 183 159 192 B Gain ji Jc jf 00 192 161 95 192

R Cut 64 64 64 127 G Cut 64 64 64 127 B Cut 64 64 64 127

8. MAC Address and ESN Key Write

8-1. Equipment & Condition

- Play file: Serial.exe

- MAC Address edit

- Input Start / End MAC address

8-2. Download method

(1) Communication Prot connection

Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port

(2) MAC Address Download

- Com 1,2,3,4 and 115200(Baudrate)

- Port connection button click(1)

- Load button click(2) for MAC Address write.

- Start MAC Address write button(3)

- Check the OK Or NG

8-3. Equipment & Condition

- Each other connection to LAN Port of IP Hub and Jig

8-4. MAC Address

- Push “IN-START” Key in service remote controller.

- Check ESN KEY only north America model

8-5. LAN PORT INSPECTION(PING TEST)

- LAN Port connection with PCB

- Network setting at MENU Mode of TV

- setting automatic IP

- Setting state confirmation

-> If automatic setting is finished, you confirm IP and MAC Address.

- remove LAN CABLE

9. GND and ESD Testing

9-1. Prepare GND and ESD Testing.

- Check the connection between set and power cord

9-2. Operate GND and ESD auto-test.

(1) Fully connected (Between set and power cord) set enter

the Auto-test sequence. (2) Connect D-Jack AV jack test equipment. (3) Turn on Auto-controller(GWS103-4) (4) Start Auto GND test. (5) If its result is NG, then notice with buzzer. (6) If its result is OK, then automatically it turns to ESD Test. (7) Operate ESD test (8) If its result is NG, then notice with buzzer. (9) If its result is OK, then process next steps. Notice it with

Good lamp and STOPER Down.

9-3. Check Items.

(1) Test Voltage

GND: 1.5KV/min at 100mA

Signal: 3KV/min at 100mA (2) Test time: just 1 second. (3) Test point

GND test: Test between Power cord GND and Signal cable

metal GND.

ESD test: Test between Power cord GND and Live and

neutral. (4) Leakage current: Set to 0.5mA(rms)

- 11 -

Only for training and service purposes

10. POWER PCB Ass’y Voltage Adjustment

(Va/Vs Voltage Adjustment)

(1)Test equipment : D.M.M 1EA (2) Connection Diagram for Measuring : refer to fig.1

10-1. Adjustment method

(1) Vs adjustment (refer fig.1)

1) Connect + terminal of D.M.M. to Vs pin of

P812(42”:P811), connect -terminal to GND pin of P812(42”:P811)

2) After turning VR901, voltage of D.M.M adjustment as

same as Vs voltage which on label of panel left/top ( deviation ; ±0.5V)

(2) Va adjustment (refer fig.1)

1) After receiving 100% Full White Pattern, HEAT RUN.

2) Connect + terminal of D.M.M. to Va pin of

P812(42”:P811), connect -terminal to GND pin of P811(42”:P812).

3) After turning VR502,voltage of D.M.M adjustment as

same as Va voltage which on label of panel left/top (deviation; ±0.5V)

11. Default Service option.

11-1. ADC-Set.

V R-Gain adjustment Value (default 128) V G-Gain adjustment Value (default 128) V B-Gain adjustment Value (default 128) V R-Offset adjustment Value (default 128) V G-Offset adjustment Value (default 128) V B-Offset adjustment Value (default 128)

11-2. White balance. Value.

11-3. Temperature Threshold

V Threshold Down Low 20 V Threshold Up Low 23 V Threshold Down High 70 V Threshold Up High 75

12. USB DOWNLOAD (*.epk file download)

V Put the USB Stick to the USB socket V Press Menu key, and move OPTION

V Press “FAV” Press 7 times.

- 12 -

Only for training and service purposes

< fig.1 : 50 FHD Power PCB Assy Voltage adjustment >

CENTER (DEFAULT)

Cool Mid Warm R Gain 192 192 192 G Gain 192 192 192 B Gain 192 192 192 R Cut 64 64 64 G Cut 64 64 64 B Cut 64 64 64

V Select download file (epk file)

V After download is finished, remove the USB stick.

V Press “IN-START” key of ADJ remote control, check the

S/W version.

CAUTION

- DO NOT REMOVE USB MEMORY CARD FROM USB PORT WHEN YOU FIND BELOW DESCRIPTION

- " Do not remove the memory card from the port! "

- 13 -

Only for training and service purposes

- 14 -

Only for training and service purposes

BLOCK DIAGRAM

- 15 -

LGE Internal Use Only

EXPLODED VIEW

305

207

203

202

303

602

501

400

208

580

300

120

200

209

601

520

604

204

201

206

205

240

301

302

304

590

560

521

900

910

310

570

Except LGEAZ

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

A10

A9

LV1

A12

A22

A7

A21

A2

A13

LV2

NAND FLASH MEMORY 4G BIT FOR BBTV

LGE Internal Use Only

BCM REVIEW

R11 2.7K

FLASH_WP

R10 2.7K

B

C

Q10 KRC103S

E

D3.3V

10K

NAND_RB

NAND_RE

NAND_CE

NAND_CLE

NAND_ALE

NAND_WE

FLASH_WP

SYSTEM EEPROM

R14 4.7K

IC102

M24M01-HRMN6TP

NC

1

E1

2

R13

E2

0

3

READY

VSS

A8’h‘

4

replacement nvram p/n : EAN61086701

Debugging for AVC

D3.3V

WIRELESS_DL_TX

WIRELESS_DL_RX

MODEL OPTION

R53 100 R54 100

RF_SWITCH_CTL

BT_ON/OFF

R55 100 R67 100

R12

READY

R59 1K

R68 1K

8

7

6

5

D3.3V

Open Drain

C10

0.1uF

VCC

WP

SCL

SDA

READY

R60 1K

R69 1K

NC_1

NC_2

NC_3

NC_4

NC_5

NC_6

RB

R

E

NC_7

NC_8

VDD_1

VSS_1

NC_9

NC_10

CL

AL

W

WP

NC_11

NC_12

NC_13

NC_14

NC_15

D3.3V

R20 10

R21 10

P10

12505WS-06A00

1

2

3

4

5

6

7

R65 1K

R64 1K

READY

R71 1K

R70 1K

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

D3.3V

C14

0.1uF

READY

R66 1K

R72 1K

IC500

NAND04GW3B2DN6E

READY

R73 1K

R74 1K

NC_29

48

NC_28

47

NC_27

46

NC_26

45

I/O7

44

I/O6

43

I/O5

42

I/O4

41

NC_25

40

NC_24

39

NC_23

38

VDD_2

37

VSS_2

36

NC_22

35

NC_21

34

NC_20

33

I/O3

32

I/O2

31

I/O1

30

I/O0

29

NC_19

28

NC_18

27

NC_17

26

NC_16

25

SCL3_3.3V

SDA3_3.3V

MODEL_OPT_0 MODEL_OPT_1 MODEL_OPT_2 MODEL_OPT_3

MODEL_OPT_4 MODEL_OPT_5

NAND_DATA[7]

NAND_DATA[6]

NAND_DATA[5]

NAND_DATA[4]

D3.3V

C12

10uF 6.3V

0.1uF

NAND_DATA[3]

NAND_DATA[2]

NAND_DATA[1]

NAND_DATA[0]

C13

chassis option

OPT 5

LOW

HIGH

MODEL OPTION

PIN NAME

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_5

NAND_DATA[0-7]

OPT 1

LOW

HIGH

LOW

PIN NO.

Boot Strap

RESET

FOR JDEG

BRAZIL

EURO

AUSTRALIA

G19

C5

DDR 512MB

F7

B6

E18

D18

FHD

NOT USE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

NAND_DATA[0-7]

NAND_ALE

RESET

SW10

SKHMPWE010

12

4 3

SOC_RESET

LOWHIGH

DDR 256MB

HD

EBI_ADDR3 EBI_ADDR4 EBI_ADDR2 EBI_ADDR1 EBI_ADDR0 EBI_ADDR5 EBI_ADDR6 EBI_ADDR8 EBI_ADDR9 EBI_ADDR13 EBI_ADDR12 EBI_ADDR11 EBI_ADDR10 EBI_ADDR7 EBI_TAB EBI_WE1B EBI_CLK_IN EBI_CLK_OUT EBI_RWB EBI_CS0B

NAND_DATA0 NAND_DATA1 NAND_DATA2 NAND_DATA3 NAND_DATA4 NAND_DATA5 NAND_DATA6 NAND_DATA7 NAND_CS0B NAND_ALE NAND_REB NAND_CLE NAND_WEB NAND_RBB

SF_MISO SF_MOSI SF_SCK SF_CSB

IC100

GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08 GPIO_09 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39 GPIO_40 GPIO_41 GPIO_42 GPIO_43 GPIO_44 GPIO_45 GPIO_46 GPIO_47 GPIO_48 GPIO_49 GPIO_50 GPIO_51 GPIO_52 GPIO_53 GPIO_54 GPIO_55 GPIO_56

GPIO_57 SGPIO_00 SGPIO_01 SGPIO_02 SGPIO_03 SGPIO_04 SGPIO_05 SGPIO_06 SGPIO_07

N26 L26 N25 L25 K27 K28 K24 K26 K25 AA27 AA28 AA26 L1 L3 L2 Y25 Y26 M27 AA25 R25 N28 N27 AH18 P23 M23 AD19 AE19 M4 M5 L23 Y28 Y27 G2 G3 G5 G6 G4 L24 P25 L5 K4 K1 L27 M26 N23 R28 R27 R26 P28 P27 K6 K5 P26 M3 M2 M1 L4 L6 W27 W28 W26 W25 J2 J1 K3 K2

R121 22

R84

R122 1K R123 0 R124 R125 1K

R94 0

R86 0

READY

R88 R131 R127

R199 0

R95

R129 100

R130 100

R89

R92

R195 0 R96 R97 R98

R177

R136

R147

100

READY

R192

R193

READY

R102 R103 22 R138 R132 R137 0

R139

22

0

1K

22

100

0 0 0

0

22

0

FLMD0

001:F5;001:H5

R196

0

R87

0

VREG_CTR

TUNER_RESET

HDMI_POWER_2 COMPOSITE1_SW

R148

R183 0 R184 0 R185 0 R186 0

MODEL_OPT_4

MODEL_OPT_5 SIDEAV_DET

HDMI_HPD_4

HDMI_HPD_3

MODEL_OPT_1

DSUB_DET BT_RESET /RST_HUB

READY

FLASH_WP

MODEL_OPT_0

AUD_MASTER_CLK

HDMI_HPD_2

HDMI_HPD_1

HDMI_POWER_1

EPHY_ACTIVE_Y

EPHY_LINK

MODEL_OPT_3

FE_TS_VAL HDMI_POWER_3 HDMI_POWER_4

MODEL_OPT_2

COMP1_SW

DDC_SCL

DDC_SDA

DEMOD_RESET

COMP2_SW

RF_BOOSTER

R150

R149

4.7K

READY

4.7K

E_TDO E_TMS E_TDI

R151

008:H20

008:H29

READY

4.7K

R152

2.2K

008:R29

008:H10

E_TCK

R153

R191

R190

R180 0 R181 0

2.2K R154

BCM_RX BCM_TX

READY

/3D_FPGA_RESET

L/R_DETECT

FPGA_D/L

0

READY

4.7K

4.7K R155

MOD_ROM_RX

MOD_ROM_TX

WIRELESS_DL_RX WIRELESS_DL_TX

D3.3V

SCL0_3.3V SDA0_3.3V SCL1_3.3V SDA1_3.3V SCL2_3.3V SDA2_3.3V SCL3_3.3V SDA3_3.3V

D3.3V

R42

2.7K

READY

2

G

2.7K

3

READY

R49

2.7K

R46

2.7K

R47

2.7K

R50

READY

2.7K

R51

2.7K

R48

2.7K

R52

READY

2.7K

R61

2.7K

R62

2.7K

R63

2.7K

D3.3V

R22

10K

R23 0

O

R24

C15

0.1uF

0

READY

16V

NAND_DATA[0]

NAND_DATA[1]NAND_DATA[1]

NAND_DATA[2]

NAND_DATA[3]

NAND_DATA[4]

NAND_DATA[5]

NAND_DATA[6]NAND_DATA[6]

NAND_DATA[7]

NAND_CLE

R15 330

5

C11 22uF 16V

D3.3V

R17

D3.3V

R18

10K

R43

READY

R45

R44

R39

READY

R40

READY

R41

R56

READY

R57

READY

R58

READY

910

IC103

KIA7029AF

I

1

READY

R19 0

READY

NAND_IO[0] : Flash Select (1) 0 : Boot From Serial Flash 1 : Boot From NAND Flash

NAND_IO[1] : NAND Block 0 Write (0) 0 : Enable Block 0 Write 1 : Disable Block 0 Write

NAND_IO[3:2] : NAND ECC (1,0) 00 : No ECC 01 : 1 ECC Bit 10 : 4 ECC Bit 11 : 8 ECC Bit

NAND_IO[4] : CPU Endian (0) 0 : Little Endian 1 : Big Endian

NAND_IO[6:5] : Xtal Bias Control (1,0) 00 : 1.2mA 01 : 1.8mA 10 : 2.4mA (Recommand) 11 : 3.0mA

NAND_IO[7] : MIPS Frequency (0) 0 : 405MHz 1 : 378MHz

NAND_ALE : I2C Level (0) 0 : 3.3V Switching 1 : 5V Switching

NAND_CLE 0 : Enable D2CDIFF AC (Dns) 1 : Disable D2CDIFF AC

SYS_RESET

WATCH_DOG_RESET

NAND_DATA[0-7]

NAND_CE

NAND_ALE

NAND_RE

NAND_CLE

NAND_WE NAND_RB

D3.3V

R77

2.7K

R80 2.7K

NAND_DATA[0] NAND_DATA[1] NAND_DATA[2] NAND_DATA[3] NAND_DATA[4] NAND_DATA[5] NAND_DATA[6] NAND_DATA[7]

D3.3V

R79 2.7K

* I2C MAP

* I2C_0 : TUNER

* I2C_1 : HDMI MUX, DEMOD, WIERLESS-JACK

* I2C_2 : NEC, AMP, (NVRAM)

* I2C_3 : SYSYEM EEPROM, MODULE

LGE3556CP (C0 3D PIP)

J23 J24 H25 H24 H23 J25 F26 H28 J26 H27 G26 J27 J28 F27 G24 H26

R78

G27

33

G28 K23 G25

U24 T26 T27 U26 U27 V26 V27 V28 T24 R23 T23 T25 R24 U25

W24 U23 V23 V24

NEC SUB MICOM

NEC CONFIGURATION

+3.3V_NEC_ST

R28

10K

R25

10K

R26

10K

R27

10K

MODEL_OPT_0

MODEL_OPT_3

RED ONLY

MICOM MODEL OPTION

AMP_RESET_N

DISP_EN

ERROR_DET

MODEL OPTION

PIN NAME

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3

NEC_ISP_TXD

NEC_ISP_RXD OCD1A

OCD1B

0

R29 100 R30 100 R179 100

PIN NO. LOW

8

11

30

31

ADD BREATHINGRED & WHITE

0

NOT USE

PK70

1

01

+3.3V_NEC_ST

PK70

READY

R31 10K

READY

R32 10K

PK50/PK90

HIGH

PK90 PK50/PK70

PK50/PK90

ISP Port for SUB MICOM

+3.3V_NEC_ST

P11

12505WS-12A00

1

10K

R81

10K

R82

CHECK PIN!!

IC14

1

NC

VCC

2

E1

WC

SCL

3

E2

4

GND

SDA

2

3

4

5

6

7

8

9

10

11

12

13

MODEL1_OPT_3

MODEL1_OPT_1

+3.3V_NEC_ST

C21

VCC

0.1uF

8

16V

WC

7

SCL

6

R115

SDA

5

R116

MODEL1_OPT_0

RESET_NEC NEC_ISP_TXD

NEC_ISP_RXD

OCD1A

OCD1B

FLMD0

PK90

READY

R33 10K

R37 10K

R35 10K

MODEL1_OPT_0 MODEL1_OPT_1 MODEL1_OPT_2 MODEL1_OPT_3

READY

R34 10K

R36 10K

R38 10K

PK50/PK70

R83

M24C16-WMN6T

0IMMRSG036B

NC/E0

NC/E1

1/10W

5%

47K

NC/E2

VSS

replacement micom eeprom p/n : EAN61146201

SDA1_3.3V

SCL1_3.3V

LED_WHITE

5V_ON

SOC_RESET

FLASH_WP

OCD1B

22

KDS

X11-*1

32.768KHz

C22-*1 15pF 50V

R104 10K

C23-*1 15pF 50V

KDS

10K

R107

R108 R109

R112

R113 R114 0 R110 0

R187

0

P32/INTP3/OCD1B

R111

0

C18

C17

12pF

X10

10MHz

+3.3V_NEC_ST

C20

0.1uF

C19

0.1uF

P60/SCL0

22

1

P61/SDA0

22

2

P62/EXSCL0

4.7K

3

P63

4

4.7K P33/TI51/TO51/INTP4

5

P75

6

UPD78F0513AGA-GAM-AX

P74

7

P73/KR3

8

P72/KR2

9

P71/KR1

10

P70/KR0

11 12

P31/INTP2/OCD1A

R1170

R156

REGC47VSS48VDD

46

13

14

15

P30/INTP1

P17/TI50/TO50

R118100

HDMI_CEC

OCD1A

LED_BREATHING

100K

TXC

50V

22pF

C22

32.768KHz

FLMD044P122/X2/EXCLK/OCD0B

P121/X1/OCD0A

43

45

IC701

16

17

P15/TOH018P14/RXD619P13/TXD620P12/SO10

P16/TOH1/INTP5

R120 0

R1190

R16 9 22

IR_NEC

LED_RED

NEC_ISP_RXD

EAX63347201

BCM GPIO/NEC MICOM/FLASH/SYS EEPROM

TXC

X11

TXC

R182

4.7M

1/8W 5%

P123/XT1

42

21

P11/SL10/RXD0

R171 0

R17 0 22

R17 2 22

AC_DET

NEC_ISP_TXD

NEC_RXD

+3.3V_NEC_ST

50V 27pF C23

C25

0.1uF

WIRELESS_PWR_EN

WIRELESS_DETECT

P120/INTP0/EXLVI

P4139P4040RESET41P124/XT2/EXCLKS

37

38

36 35 34 33 32 31 30 29 28 27 26 25

22

23

24

+3.3V_NEC_ST

AVSS

AVREF

C24

0.1uF

P10/SCK10/TXD0

16V

4.7K

R174

R17 3 22

4.7K

R175

NEC_TXD

R157

3K

R159

100K

100KOhm 1%

P140/PCL/INTP6 P00/TI000

R166 0 P01/TI010/TO00 P130

R176 0

P20/ANI0

R168 0

ANI1/P21

R178 0 ANI2/P22 ANI3/P23

R167 0

ANI4/P24

R165 0

ANI5/P25

R161 10K

ANI6/P26

R162 22

ANI7/P27

R163 22

READY

RESET_NEC

120KOhm 1%

120K

1/16W 1%

1/16W

1%

R160 0

R158

RL_ON

R164100

MODEL1_OPT_2

1.2V_1.8V_EN

+3.3V_EN

KEY2 KEY1

08/10/28

001:F4

FLMD0

EDID_WP SUB_SCL SUB_SDA

1 13

KEY1

D3.3V

IC100

LGE Internal Use Only

LVDS_TX_0_DATA0_P LVDS_TX_0_DATA0_N LVDS_TX_0_DATA1_P LVDS_TX_0_DATA1_N LVDS_TX_0_DATA2_P LVDS_TX_0_DATA2_N LVDS_TX_0_DATA3_P LVDS_TX_0_DATA3_N LVDS_TX_0_DATA4_P LVDS_TX_0_DATA4_N

LVDS_TX_0_CLK_P

LVDS_TX_0_CLK_N LVDS_TX_1_DATA0_P LVDS_TX_1_DATA0_N LVDS_TX_1_DATA1_P LVDS_TX_1_DATA1_N LVDS_TX_1_DATA2_P LVDS_TX_1_DATA2_N LVDS_TX_1_DATA3_P LVDS_TX_1_DATA3_N LVDS_TX_1_DATA4_P LVDS_TX_1_DATA4_N

LVDS_TX_1_CLK_P

LVDS_TX_1_CLK_N

LVDS_PLL_VREG

LVDS_TX_AVDDC1P2 LVDS_TX_AVDD2P5_1 LVDS_TX_AVDD2P5_2

LVDS_TX_AVSS_1 LVDS_TX_AVSS_2 LVDS_TX_AVSS_3 LVDS_TX_AVSS_4 LVDS_TX_AVSS_5 LVDS_TX_AVSS_6 LVDS_TX_AVSS_7 LVDS_TX_AVSS_8

LVDS_TX_AVSS_9 LVDS_TX_AVSS_10 LVDS_TX_AVSS_11

CLK54_AVDD1P2 CLK54_AVDD2P5

CLK54_XTAL_N CLK54_XTAL_P

CLK54_MONITOR

VCXO_AVDD1P2

VCXO_PLL_AUDIO_TESTOUT

POR_OTP_VDD2P5

PLL_MAIN_AVDD1P2

PLL_MAIN_MIPS_EREF_TESTOUT

A2.5V

PLL_MAIN_AGND

PLL_RAP_AVD_TESTOUT PLL_RAP_AVD_AVDD1P2

PLL_RAP_AVD_AGND

BYP_SYS216_CLK

BYP_SYS175_CLK

USB HUB

010:K24 010:K25

002:D5

002:D5 010:Q22 010:Q23

002:D6

002:D5

002:D6

BROAD BAND STUDIO

TJC2508-4A

BT_DM BT_DP

USB_DM USB_DP

AV_L_IN_1 AV_R_IN_1

AV1_INCM COMP_L_IN_1 COMP_R_IN_1

COMP1_INCM COMP_L_IN_2 COMP_R_IN_2

COMP2_INCM

SIDE_LIN SIDE_RIN

SIDE_INCM

PC_L_IN PC_R_IN

PC_INCM

P200

1

2

3

4

BLM18PG121SN1D

A2.5V

BLM18PG121SN1D

R201 49.9 R202 49.9

R209 49.9 R210 49.9

R203 49.9 R204 49.9

R205 49.9 R206 49.9

R207 49.9 R208 49.9

D3.3V

L201

L200

C200

4.7uF

C203 C204 C213 C205 C206 C214 C207 C208 C215 C209 C210 C216 C211 C212 C217

A3.3V

C202 100pF

R200

C201

4.7uF

1.5K

R211

1.5K

A1.2V

L203

BLM18PG121SN1D

R213

3.9K

R214 120

C224

0.1uF 16V

0.015uF

0.15uF

0.015uF

0.15uF

0.015uF

0.15uF

0.015uF

0.15uF

0.015uF

0.15uF

A1.2V

BLM18PG121SN1D

0.047uF

C236

C235

C234

A2.5V

C22 7 0.1 uF

C22 6 0.1u F

C22 5 0.1u F

BLM18PG121SN1D

L205

L204

C229

0.047uF

C239

C237

C238

FE_TS_CLK

FE_TS_SERIAL

FE_TS_SYN

L202

BLM18PG121SN1D

4.7uF

C23 0 0.1 uF

C228 4.7uF

EPHY_RDN EPHY_RDP

EPHY_TDN EPHY_TDP

C231

0.1uF

4.7uF

0.047uF

C241

C242

C243

C240

A3.3V

A1.2V

0.1uF C219

C218

C223

0.1uF

C222

0.01uF

D3.3V

PK950 R216 2.7K

USB1_OCD

USB1_CTL

0.1uF

4.7uF

C232

C233

0.47uF

C246 0.47uF

C247 0.47uF

C244

C245

0.1uF

R217 240

C220

C248 0.47uF

A2.5V

0.1uF

PK550

R1227 0

1K

C221

R212 560

R218

C249

0.1uF

LGE3556CP (C0 3D PIP)

D23

PKT0_CLK

C24

PKT0_DATA

B26

PKT0_SYNC

A25

RMX0_CLK

B25

RMX0_DATA

A26

RMX0_SYNC

G23

POD2CHIP_MCLKI

D25

POD2CHIP_MDI0

D24

POD2CHIP_MDI1

C25

POD2CHIP_MDI2

E27

POD2CHIP_MDI3

E26

POD2CHIP_MDI4

D28

POD2CHIP_MDI5

D27

POD2CHIP_MDI6

D26

POD2CHIP_MDI7

E23

POD2CHIP_MISTRT

E24

POD2CHIP_MIVAL

F25

CHIP2POD_MCLKO

C27

CHIP2POD_MDO0

C26

CHIP2POD_MDO1

B28

CHIP2POD_MDO2

B27

CHIP2POD_MDO3

A27

CHIP2POD_MDO4

F24

CHIP2POD_MDO5

F23

CHIP2POD_MDO6

E25

CHIP2POD_MDO7

C28

CHIP2POD_MOSTRT

A28

CHIP2POD_MOVAL

AC18

VDAC_AVDD2P5

AF20

VDAC_AVDD1P2

AG20

VDAC_AVDD3P3_1

AG21

VDAC_AVDD3P3_2

AF19

VDAC_AVSS_1

AD20

VDAC_AVSS_2

AE20

VDAC_AVSS_3

AH22

VDAC_RBIAS

AH20

VDAC_1

AG19

VDAC_2

AH21

VDAC_VREG

M25

BSC_S_SCL

M24

BSC_S_SDA

R6

USB_AVSS_1

T6

USB_AVSS_2

R7

USB_AVSS_3

T7

USB_AVSS_4

T8

USB_AVSS_5

R3

USB_AVDD1P2

U3

USB_AVDD1P2PLL

T4

USB_AVDD2P5

T3

USB_AVDD2P5REF

R4

USB_AVDD3P3

U4

USB_RREF

V1

USB_DM1

V2

USB_DP1

U1

USB_DM2

U2

USB_DP2

T5

USB_MONCDR

R5

USB_MONPLL

R1

USB_PWRFLT_1

R2

USB_PWRFLT_2

T2

USB_PWRON_1

T1

USB_PWRON_2

P6

EPHY_VREF

P5

EPHY_RDAC

P3

EPHY_RDN

P2

EPHY_RDP

N3

EPHY_TDN

N2

EPHY_TDP

P1

EPHY_AVDD1P2

P4

EPHY_AVDD2P5

N4

EPHY_PLL_VDD1P2

N1

EPHY_AGND_1

N5

EPHY_AGND_2

P7

EPHY_AGND_3

AE6

AUDMX_LEFT1

AD7

AUDMX_RIGHT1

AF6

AUDMX_INCM1

AH4

AUDMX_LEFT2

AG5

AUDMX_RIGHT2

AG4

AUDMX_INCM2

AG6

AUDMX_LEFT3

AF7

AUDMX_RIGHT3

AE7

AUDMX_INCM3

AH5

AUDMX_LEFT4

AG7

AUDMX_RIGHT4

AH6

AUDMX_INCM4

AD8

AUDMX_LEFT5

AF8

AUDMX_RIGHT5

AE8

AUDMX_INCM5

AH7

AUDMX_LEFT6

AH8

AUDMX_RIGHT6

AG8

AUDMX_INCM6

AF5

AUDMX_AVSS_1

AB9

AUDMX_AVSS_2

AA10

AUDMX_AVSS_3

AB10

AUDMX_AVSS_4

AA11

AUDMX_AVSS_5

AB11

AUDMX_AVSS_6

AC8

AUDMX_LDO_CAP

AE5

AUDMX_AVDD2P5

C250 10uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

CLK54_AVSS

PM_OVERRIDE

VCXO_AGND_1 VCXO_AGND_2 VCXO_AGND_3

RESET_OUTB

RESETB

NMIB TMODE_0 TMODE_1 TMODE_2 TMODE_3

SPI_S_MISO

POR_VDD1P2

EJTAG_TCK EJTAG_TDI EJTAG_TDO EJTAG_TMS

EJTAG_TRSTB

EJTAG_CE0 EJTAG_CE1

BYP_CPU_CLK

BYP_DS_CLK

B4 A4 C6 B6 B3 A3 A1 A2 D5 D6 C5 B5 B1 B2 C2 C3 D1 D2 E1 E2 E3 E4 D3 D4 F5 F1 F4 F2 C1 F3 C4 A5 E5 E6 D7 E7 F7 G7 H7

AD27 AD28 AD26 AC26 AC27 AE25 Y23

AA23 AB24 AC24 AF25 AF24

P24 F6 N24 J5 J4 J6 J3 V25 AH3 AB8

H4 H3 H2 H1 G1 H6 H5

AB26 AC25 AB27 M6 N6 N7

AA24 Y24 AE24 AD25

C251

10uF

C261

C257

0.1uF

R220

390

READY

10uF

LVDS_TX_0_DATA0_P LVDS_TX_0_DATA0_N LVDS_TX_0_DATA1_P LVDS_TX_0_DATA1_N LVDS_TX_0_DATA2_P LVDS_TX_0_DATA2_N LVDS_TX_0_DATA3_P LVDS_TX_0_DATA3_N LVDS_TX_0_DATA4_P LVDS_TX_0_DATA4_N

LVDS_TX_1_DATA0_P LVDS_TX_1_DATA0_N LVDS_TX_1_DATA1_P LVDS_TX_1_DATA1_N LVDS_TX_1_DATA2_P LVDS_TX_1_DATA2_N LVDS_TX_1_DATA3_P LVDS_TX_1_DATA3_N LVDS_TX_1_DATA4_P LVDS_TX_1_DATA4_N

READY

0.1 uF

C25 2

C25 3

A2.5V

A1.2V

0.1 uF

C25 9

BLM18PG121SN1D

C258

4.7uF

2.7K

R219

L206

BLM18PG121SN1D

C262

0.1uF

JTAG_TCLK JTAG_TDI

JTAG_TDO JTAG_TMS /JTAG_TRST

C264

C26 3

0.1 uF

R2212.7K R2222.7K

TP210

TP211

TP212

TP213

TP214

AUDIO INCM-TP PLACE NEAR JACKS

LVDS_TX_0_CLK_P LVDS_TX_0_CLK_N

LVDS_TX_1_CLK_P LVDS_TX_1_CLK_N

0.1 uF

4.7uF

C254

C256

C25 5

0.1 uF C26 0

L207

D3.3V

A2.5V

A1.2V

C26 5

0.1 uF

4.7uF

54MHz_XTAL_N 54MHz_XTAL_P

WATCH_DOG_RESET SYS_RESET

L208

BLM18PG121SN1D

L209

BLM18PG121SN1D

C266

4.7uF

R225

5.1

R226

5.1

R227

5.1

R228

5.1

R229

5.1

A1.2V

001:D3 001:D3

A1.2V

002:H1 002:H1

A1.2V

R223

2.7K

R224

2.7K

READY

SIDE_INCM

AV1_INCM

COMP1_INCM

COMP2_INCM

PC_INCM

D3.3V

A2.5V

READY R230

2.7K

R231

2.7K

EJTAG

/JTAG_TRST

002:D4

JTAG_TDI

002:D4

JTAG_TDO

002:D4

JTAG_TMS

002:D4

JTAG_TCLK

002:D4

001:C3

LVDS

RESET

D3.3V

R237

1K

52

FHD

TF05-51S

P202

54MHz X-TAL

22

R249

C267

L210

604

4.7K

R246

R25 1

22

R248

33pF

1008LS-272XJLC

22

R250

001:B3;001:I4

SCL3_3.3V

R253

4.7K

R25 2

D

22

2N7002(F)

Q201

READY

D3.3V

0

G

X200

21

54MHz

R254

S

R25922

1K

READY

R232

R234

R235

R233

R236

1K

R238

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

R257 0

9

8

7

6

5

4

3

2

1

nTRST

R261

R260

R263

R262

R264

YFDW254-14S

1

TDI

3

TDO

5

TMS

7

TCK

9

nRST

11

DINT

13

R242100

R243

27K

0

EAM38058401

L211

CB4532UK121E

P201

READY

GND

2

GND

4

GND

6

GND

8

GND

10

NC

12

VIO

14

PC_SER_DATA

DISP_EN

E_TDI

E_TMS

LVDS_TX_1_DATA4_N

LVDS_TX_1_DATA4_P

LVDS_TX_1_DATA3_N

LVDS_TX_1_DATA3_P

LVDS_TX_1_DATA2_N

LVDS_TX_1_DATA2_P

LVDS_TX_1_CLK_N

LVDS_TX_1_CLK_P

LVDS_TX_1_DATA1_N

LVDS_TX_1_DATA1_P

LVDS_TX_1_DATA0_N

LVDS_TX_1_DATA0_P

E_TDO

E_TCK

LVDS_TX_0_DATA4_N

LVDS_TX_0_DATA4_P

LVDS_TX_0_DATA3_N

LVDS_TX_0_DATA3_P

LVDS_TX_0_DATA2_N

LVDS_TX_0_DATA2_P

LVDS_TX_0_CLK_N

LVDS_TX_0_CLK_P

LVDS_TX_0_DATA1_N

LVDS_TX_0_DATA1_P

LVDS_TX_0_DATA0_N

LVDS_TX_0_DATA0_P

FPGA_D/L

L/R_DETECT

/3D_FPGA_RESET

P_+5V

R240 1K

PC_SER_CLK

3D_SYNC_OUT

54MHz_XTAL_N

54MHz_XTAL_P

R24 4

22

D3.3V

R239

3.3K R247

R245

4.7K

D

Q200

2N7002(F)

READY

3.3K

D3.3V

0

G

R241

S

R25822

MOD_ROM_TX

MOD_ROM_RX

EAX63347201

BCM AUDIO/LVDS

C268 12pF

3

12pF

C269

R255

4.7K

001:B3;001:I4

R25 6

22

08/10/27

2 13

SDA3_3.3V

D1.2V

LGE Internal Use Only

D1.2V

D3.3V

Place this test point near connector

Wrap aroundG, B, R traces Wrap aroundY, PB, Pr traces Wrap aroundL, C traces Run along CVBS Run along SIF

TP308

TP305

TP302

TP306

TP307

006:AE21

TU_CVBS

010:K23

COMPOSITE1_IN

010:K8

COMPOSITE2_IN

TP303 TP304

TP301

TP300

R300 120

R301

36

C305

0.1uF C302

0.1uF C303

C3040.1uF

R303 36

C3000.1uF

R302 36

R310

006:AE24

A2.5V

C301

0.1uF

R308

36

R305 36

0

R307

0

R309

36

TU_SIF

R306

36 R304

010:X11 010:X14 010:X13

010:Q17 010:Q20 010:Q19

0

R314

10K

12K

009:E19

009:E20

009:E22

36

R311

R312

R313 56

READY

RGB_R

RGB_G

RGB_B

COMP1_Y COMP1_Pr COMP1_Pb

COMP2_Y COMP2_Pr COMP2_Pb

R315

A1.2V

C306

0.1uF

0

R316 75

240

A2.5V

A1.2V

BLM18PG121SN1D

C307

0.1uF

75

82

R31 8

R321 75

A2.5V

C308

0.1uF

R317

BLM18PG121SN1D

L300

C309

0.1uF

L301

A2.5V

BLM18PG121SN1D

75

R319

R323

R328

75

R322

R325

75

R32 082R324

R329

R326

10K

R327

12K

A1.2V

L302 BLM18PG121SN1D

L303

L304 C312 1000pF

C314

C315

C316

C317 0.1uF C318 C319

C320 0.1uF C321 C322

C311

0.1uF

RGB_HSYNC RGB_VSYNC

C310

4.7uF

C324

0.1uF

C325 1000pF

C334

0.1uF

C326

4.7uF

C327

0.01uF

C323

0.01uF

0.1uF

C328 0.1uF C329 0.1uF C330 0.1uF

C313

4.7uF

A1.2V

C331 C332

0.1uF

0.1uFC333

0.1uF

LGE3556CP (C0 3D PIP)

AG28 AH28 AA21 AB22 AF26 AF27 AF28 AG27 AE26 AE28 AE27 AD24 AB19 AB25

AB18 AC17 AB17 AD14 AD16 AB15 AC15 AD13 AE13 AC13 AB14 AC14 AC12 AD12 AB13 AA14 AC11 AD11 AB12 AD10 AC10

AE9 AF9 AH9

AG9 AG15 AE15 AF15 AH15 AG16 AF16 AH17 AH16 AG14 AE14 AF14 AH14 AH10 AG10 AE10 AE11 AF11 AH11 AH13 AE12 AF12

AD9 AG11 AG12 AF13

AC9 AF10 AH12 AG13 AF17 AG17 AD15 AE16 AE17 AB16 AA15 AC16

AG3

AF4

IC100

DS_AGCI_CTL DS_AGCT_CTL EDSAFE_AVSS_1 EDSAFE_AVSS_2 EDSAFE_AVSS_3 EDSAFE_AVSS_4 EDSAFE_AVSS_5 EDSAFE_AVDD2P5 EDSAFE_DVDD1P2 EDSAFE_IF_N EDSAFE_IF_P PLL_DS_AGND PLL_DS_AVDD1P2 PLL_DS_TESTOUT

SD_V5_AVDD1P2 SD_V5_AVDD2P5 SD_V5_AVSS SD_V1_AVDD1P2 SD_V1_AVDD2P5 SD_V1_AVSS_1 SD_V1_AVSS_2 SD_V2_AVDD1P2 SD_V2_AVDD2P5 SD_V2_AVSS_1 SD_V2_AVSS_2 SD_V2_AVSS_3 SD_V3_AVDD1P2 SD_V3_AVDD2P5 SD_V3_AVSS_1 SD_V3_AVSS_2 SD_V4_AVDD1P2 SD_V4_AVDD2P5 SD_V4_AVSS SD_R SD_INCM_R SD_G SD_INCM_G SD_B SD_INCM_B SD_Y1 SD_PR1 SD_PB1 SD_INCM_COMP1 SD_Y2 SD_PR2 SD_PB2 SD_INCM_COMP2 SD_Y3 SD_PR3 SD_PB3 SD_INCM_COMP3 SD_L1 SD_C1 SD_INCM_LC1 SD_L2 SD_C2 SD_INCM_LC2 SD_L3 SD_C3 SD_INCM_LC3 SD_CVBS1 SD_CVBS2 SD_CVBS3 SD_CVBS4 SD_INCM_CVBS1 SD_INCM_CVBS2 SD_INCM_CVBS3 SD_INCM_CVBS4 SD_SIF1 SD_INCM_SIF1 SD_FB SD_FS SD_FS2

PLL_VAFE_AVDD1P2 PLL_VAFE_AVSS

PLL_VAFE_TESTOUT RGB_HSYNC

RGB_VSYNC

HDMI_RX_0_HTPLG_OUT

HDMI_RX_0_PLL_DVDD1P2

HDMI_RX_1_PLL_DVDD1P2

HDMI_RX_0_CEC_DAT

HDMI_RX_0_HTPLG_IN

HDMI_RX_0_DDC_SCL HDMI_RX_0_DDC_SDA

HDMI_RX_0_RESREF

HDMI_RX_0_CLK_N

HDMI_RX_0_CLK_P HDMI_RX_0_DATA0_N HDMI_RX_0_DATA0_P HDMI_RX_0_DATA1_N HDMI_RX_0_DATA1_P HDMI_RX_0_DATA2_N HDMI_RX_0_DATA2_P

HDMI_RX_0_VDD3P3 HDMI_RX_0_VDD1P2 HDMI_RX_0_VDD2P5 HDMI_RX_0_AVSS_1 HDMI_RX_0_AVSS_2 HDMI_RX_0_AVSS_3 HDMI_RX_0_AVSS_4 HDMI_RX_0_AVSS_5 HDMI_RX_0_AVSS_6

HDMI_RX_0_PLL_AVSS

HDMI_RX_0_PLL_DVSS

HDMI_RX_1_CEC_DAT

HDMI_RX_1_HTPLG_IN

HDMI_RX_1_HTPLG_OUT

HDMI_RX_1_DDC_SCL HDMI_RX_1_DDC_SDA

HDMI_RX_1_RESREF

HDMI_RX_1_CLK_N

HDMI_RX_1_CLK_P HDMI_RX_1_DATA0_N

HDMI_RX_1_DATA0_P HDMI_RX_1_DATA1_N

HDMI_RX_1_DATA1_P HDMI_RX_1_DATA2_N

HDMI_RX_1_DATA2_P

HDMI_RX_1_VDD3P3 HDMI_RX_1_VDD1P2 HDMI_RX_1_VDD2P5 HDMI_RX_1_AVSS_1 HDMI_RX_1_AVSS_2 HDMI_RX_1_AVSS_3 HDMI_RX_1_AVSS_4 HDMI_RX_1_AVSS_5 HDMI_RX_1_AVSS_6 HDMI_RX_1_AVSS_7 HDMI_RX_1_AVSS_8 HDMI_RX_1_AVSS_9

HDMI_RX_1_PLL_AVSS

HDMI_RX_1_PLL_DVSS

I2S_CLK_IN I2S_CLK_OUT I2S_DATA_IN

I2S_DATA_OUT

I2S_LR_IN

I2S_LR_OUT AUD_LEFT0_N AUD_LEFT0_P

AUD_AVDD2P5_0

AUD_AVSS_0_1 AUD_AVSS_0_2 AUD_AVSS_0_3 AUD_AVSS_0_4 AUD_AVSS_0_5 AUD_RIGHT0_N AUD_RIGHT0_P

AUD_LEFT1_N AUD_LEFT1_P

AUD_RIGHT1_N AUD_RIGHT1_P

AUD_AVDD2P5_1

AUD_AVSS_1_1 AUD_AVSS_1_2 AUD_AVSS_1_3

AUD_LEFT2_N AUD_LEFT2_P

AUD_RIGHT2_N AUD_RIGHT2_P

AUD_AVDD2P5_2

AUD_AVSS_2_1 AUD_AVSS_2_2

AUD_SPDIF

SPDIF_AVDD2P5

SPDIF_AVSS

SPDIF_IN_N

SPDIF_IN_P

AE18 AF18 AD17 AH19 AD18 AG18 AG26 AH26 AF23 AA20 AB21 AC22 AC23 AD23 AH25 AG25 AH23 AG23 AG24 AH24 AE22 AB20 AC21 AE23 AF21 AE21 AF22 AG22 AD21 AC20 AD22 AH2 AC6 AE4 AF3 AH1

AG1 AA6 AA5 AB3 Y6 AC4 AC1 AC2 AD1 AD2 AE1 AE2 AF1 AF2 AD3 AE3 AC3 AD4 AB5 AB6 AG2 AB4 AA7 Y8 AC5 W8

AA3 V4 U6 V5 V3 W4 W2 W3 Y1 Y2 AA2 AA1 AB2 AB1 Y3 Y4 W5 W1 U5 W6 U7 V7 W7 U8 V8 Y5 V6 AA4 Y7

C335

0.1uF

READY

R331 1K

R334 0 R332

READY

C336

4.7uF

010:AE6

C337

0.1uF

10K

R333499

R335

R330499

C338

4.7uF

10K

C340 1000pF

R33622

R33722

R33822

SPDIF_OUT

P_+5V

C339 1000pF

10K

R340 10K

R339

C341

0.1uF

C343

0.01uF

P_+5V

10K

R341

C342

4.7uF

C345

0.01uF

C344 1000pF

R3420 R3430

C353

0.1uF

AUD_SCK

AUD_LRCH

AUD_LRCK

C347

C355

0.01uF

0.1uF

C354

C346

0.1uF

0.01uF

C356

C348

0.1uF

0.01uF

HDMI0_RXC-_BCM HDMI0_RXC+_BCM HDMI0_RX0-_BCM HDMI0_RX0+_BCM HDMI0_RX1-_BCM HDMI0_RX1+_BCM HDMI0_RX2-_BCM HDMI0_RX2+_BCM

C349

0.1uF

C351

10uF

C350

0.1uF

C352

0.01uF

C358

C363

10uF

C361

10uF

C360

10uF

C362

10uF

HDMI_SCL HDMI_SDA

008:AA19 008:AA19 008:AB19 008:AB19 008:AB19 008:AC19 008:AC19 008:AC19

BLM18PG121SN1D

L305

C357

0.1uF

C359

10uF

C364 33uF

008:AA19

A3.3V

BLM18PG121SN1D

L308

A1.2V

A3.3V

BLM18PG121SN1D

L307

A1.2V

BLM18PG121SN1D

L306

A2.5V

C365

0.1uF 16V

A2.5V

C366 33uF

C367 1000pF

C368

0.01uF

C369 1000pF

C371

0.1uF

C370

0.1uF

C372 1000pF

C376

0.1uF

R344

C374

4.7uF

C373 1000pF

A3.3V

20

C381

C378

0.01uF

1000pF

C377

C380

0.01uF

0.1uF

C379

C375

1000pF

D1.2V

LGE3556CP (C0 3D PIP)

H8

VDDC_1

J8

VDDC_2

K8

VDDC_3

L8

VDDC_4

M8

VDDC_5

N8

VDDC_6

P8

VDDC_7

R8

VDDC_8

AA8

VDDC_9

H9

VDDC_10

H10

VDDC_11

H11

VDDC_12

H12

VDDC_13

H13

VDDC_14

H14

VDDC_15

H15

VDDC_16

H16

VDDC_17

H17

VDDC_18

H18

VDDC_19

H19

VDDC_20

H21

VDDC_21

J21

VDDC_22

K21

VDDC_23

L21

VDDC_24

M21

VDDC_25

N21

VDDC_26

P21

VDDC_27

R21

VDDC_28

T21

VDDC_29

U21

VDDC_30

V21

VDDC_31

W21

VDDC_32

Y21

VDDC_33

AH27

AA12 AA13 AA18 AA19

AB28

E28 L28 U28

G11 G13 A14 G15 G17 A19 G19

A9 G9

AGC_VDDO

VDDO_1 VDDO_2 VDDO_3 VDDO_4 VDDO_5 VDDO_6 VDDO_7 VDDO_8

DDRV_1 DDRV_2 DDRV_3 DDRV_4 DDRV_5 DDRV_6 DDRV_7 DDRV_8 DDRV_9

D3.3V

D1.8V

C383

4.7uF

C382

0.01uF

C384

0.1uF

IC100

C386 1000pF

C385

0.01uF

C387

4.7uF

C390 1000pF

C389

0.01uF

C388

0.01uF

D3.3V

D1.8V

C391

0.1uF

C392

0.01uF

C393

0.01uF

C394

0.1uF

C395

4.7uF

C397

0.1uF

C398 1000pF

C399

0.1uF

C3001

0.01uF

C3003

0.1uF

C3004

0.1uF

C3006

0.1uF

C3007

4.7uF

C3009

4.7uF

C3010 1000pF

C3013

0.01uF

C3012

4.7uF

C3016

0.1uF

C3015

4.7uF

D1.8V

C3018

10uF

C3019 33uF

D1.8V

C3002

C3000

C396

0.1uF

0.1uF 16V

16V

LGE3556CP (C0 3D PIP)

AD5 AD6

J7 K7 L7

M7 AB7 AC7

G8

D9 AA9 G10 A11 L11 M11 N11 P11 R11 T11 U11 V11 D12 G12 L12 M12 N12 P12 R12 T12 U12 V12 L13 M13 N13 P13 R13 T13 U13 V13 G14 L14 M14 N14 P14 R14 T14 U14 V14 L15 M15 N15 P15 R15 T15 U15 V15 A16 G16 L16 M16 N16

10uF

10V

DVSS_1 DVSS_2 DVSS_3 DVSS_4 DVSS_5 DVSS_6 DVSS_7 DVSS_8 DVSS_9 DVSS_10 DVSS_11 DVSS_12 DVSS_13 DVSS_14 DVSS_15 DVSS_16 DVSS_17 DVSS_18 DVSS_19 DVSS_20 DVSS_21 DVSS_22 DVSS_23 DVSS_24 DVSS_25 DVSS_26 DVSS_27 DVSS_28 DVSS_29 DVSS_30 DVSS_31 DVSS_32 DVSS_33 DVSS_34 DVSS_35 DVSS_36 DVSS_37 DVSS_38 DVSS_39 DVSS_40 DVSS_41 DVSS_42 DVSS_43 DVSS_44 DVSS_45 DVSS_46 DVSS_47 DVSS_48 DVSS_49 DVSS_50 DVSS_51 DVSS_52 DVSS_53 DVSS_54 DVSS_55 DVSS_56 DVSS_57 DVSS_58 DVSS_59 DVSS_60 DVSS_61

C3005

0.1uF 16V

IC100

C3008

0.1uF 16V

DVSS_62 DVSS_63 DVSS_64 DVSS_65 DVSS_66 DVSS_67 DVSS_68 DVSS_69 DVSS_70 DVSS_71 DVSS_72 DVSS_73 DVSS_74 DVSS_75 DVSS_76 DVSS_77 DVSS_78 DVSS_79 DVSS_80 DVSS_81 DVSS_82 DVSS_83 DVSS_84 DVSS_85 DVSS_86 DVSS_87 DVSS_88 DVSS_89 DVSS_90 DVSS_91 DVSS_92 DVSS_93 DVSS_94 DVSS_95 DVSS_96 DVSS_97 DVSS_98

DVSS_99 DVSS_100 DVSS_101 DVSS_102 DVSS_103 DVSS_104 DVSS_105 DVSS_106 DVSS_107 DVSS_108 DVSS_109 DVSS_110 DVSS_111 DVSS_112 DVSS_113 DVSS_114 DVSS_115 DVSS_116 DVSS_117

C3011

0.1uF

P16 R16 T16 U16 V16 AA16 D17 L17 M17 N17 P17 R17 T17 U17 V17 AA17 AC19 G18 L18 M18 N18 P18 R18 T18 U18 V18 D20 G20 H20 A21 E21 F21 G21 E22 F22 G22 H22 J22 K22 L22 M22 N22 P22 R22 T22 U22 V22 W22 Y22 AA22 W23 AB23 F28 M28 T28 AC28

C3014

0.1uF

16V

0.1uF

0.1uF 16V

16V

C3020

C3017

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX63347201

08/10/xx

BCM VIDEO IN/BCM POWER 3 13

LGE3556CP (C0 3D PIP)

LGE Internal Use Only

IC100

DDR_VDDP1P8_1 DDR_VDDP1P8_2

DDR_BVDD0 DDR_BVDD1 DDR_BVSS0 DDR_BVSS1

DDR_PLL_TEST

DDR_PLL_LDO

DDR01_CKE

DDR_COMP

DDR01_ODT

DDR_EXT_CLK

DDR0_CLK

DDR0_CLKB

DDR1_CLK DDR1_CLKB DDR01_A00 DDR01_A01 DDR01_A02 DDR01_A03

DDR0_A04

DDR0_A05

DDR0_A06 DDR01_A07 DDR01_A08 DDR01_A09 DDR01_A10 DDR01_A11 DDR01_A12 DDR01_A13

DDR1_A04

DDR1_A05

DDR1_A06 DDR01_BA0 DDR01_BA1 DDR01_BA2

DDR01_CASB

DDR0_DQ00 DDR0_DQ01 DDR0_DQ02 DDR0_DQ03 DDR0_DQ04 DDR0_DQ05 DDR0_DQ06 DDR0_DQ07 DDR0_DQ08 DDR0_DQ09 DDR0_DQ10 DDR0_DQ11 DDR0_DQ12 DDR0_DQ13 DDR0_DQ14 DDR0_DQ15 DDR1_DQ00 DDR1_DQ01 DDR1_DQ02 DDR1_DQ03 DDR1_DQ04 DDR1_DQ05 DDR1_DQ06 DDR1_DQ07 DDR1_DQ08 DDR1_DQ09 DDR1_DQ10 DDR1_DQ11 DDR1_DQ12 DDR1_DQ13 DDR1_DQ14 DDR1_DQ15

DDR0_DM0

DDR0_DM1

DDR1_DM0

DDR1_DM1 DDR0_DQS0

DDR0_DQS0B

DDR0_DQS1

DDR0_DQS1B

DDR1_DQS0

DDR1_DQS0B

DDR1_DQS1

DDR1_DQS1B DDR01_RASB

DDR_VREF0 DDR_VREF1 DDR01_WEB

C404 100uF

16V

DDR1_VREF0

DDR0_VREF0

C408

0.1uF 16V

BLM18PG121SN1D

DDR_VTT

C409

0.1uF 16V

C405 10uF 10V

L400

L401

A6 A24 B7 B24 F20 B23 B17 C22 E16 C23 B12 C12 A13 A12 B15 E14 A15 D15 E13 E12 F13 C14 F14 B14 D14 C13 D13 B13 F15 C15 D16 F16 B16 E15 A17 A8 B11 B8 D11 E11 C8 C11 C9 D8 E10 E9 F11 F12 E8 D10 F8 C18 C20 A18 B21 C21 B18 B20 D18 E18 D21 F18 E20 A22 F17 B22 E17 A10 C10 A20 F19 B10 B9 F10 F9 B19 C19 E19 D19 C16 A7 A23 C17 C7 D22

0.1uF

22uF

C402

C477

16V

READY

A1.2V

R400 0

READY

DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8]

DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15]

DDR1_DQ[0]

DDR1_DQ[1]

DDR1_DQ[2]

DDR1_DQ[3]

DDR1_DQ[4]

DDR1_DQ[5]

DDR1_DQ[6]

DDR1_DQ[7]

DDR1_DQ[8]

DDR1_DQ[9] DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15]

D1.8V

C403

0.1uF

1M

R404

R401 0

R402 240

1%

DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3]

DDR0_A[4] DDR0_A[5]

DDR0_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9]

DDR01_A[10] DDR01_A[11] DDR01_A[12] DDR01_A[13]

DDR1_A[4]

DDR1_A[5]

DDR1_A[6]

C485

0.1uF 16V

cap_crack cap_crack cap_crack cap_crack

C406

0.1uF 16V

C481 10uF 10V

C4000.1uF C4010.1uF

1uF

C407 16V

C410

0.1uF

C411

470pF

C413

C412

1uF

470pF

R408 10K

BD35331F-E2

GND

1

EN

2

VTTS

3

VREF

4

DDR01_CKE

DDR01_ODT

DDR0_CLK

DDR0_CLKb

DDR1_CLK

DDR1_CLKb

DDR01_BA0 DDR01_BA1 DDR01_BA2

DDR01_CASb

DDR0_DM0 DDR0_DM1 DDR1_DM0 DDR1_DM1

DDR0_DQS0

DDR0_DQS0b

DDR0_DQS1

DDR0_DQS1b

DDR1_DQS0

DDR1_DQS0b

DDR1_DQS1

DDR1_DQS1b

DDR01_RASb

DDR01_WEb

IC400

004:C1;004:C4 004:C1;004:C4 004:E1;004:F4 004:E1;004:F4

004:E2 004:E4 004:G2 004:G4 004:E2 004:E2 004:E4 004:E4 004:G2 004:G2 004:G4 004:G4

C486

0.1uF 16V

VTT

8

VTT_IN

7

VCC

6

R409

VDDQ

5

C482

2.2uF 10V

DDR01_A[0-3]

DDR0_A[4-6]

DDR01_A[7-13]

DDR1_A[4-6]

DDR0_DQ[0-15]

DDR1_DQ[0-15]

C415

C416

C414

1uF

470pF

+3.3V_ST

220

C418

10uF

16V

004:B1;004:C4

DDR01_A[0-3,7-13]

004:B1;004:C1

004:B1;004:C1;004:E1;004:F4;004:H3;004:H2

DDR0_VREF0

DDR1_VREF0

C417

1uF

DDR01_A[0-3,7-13]

D1.8V

C483 10uF 10V

READY

C419

2.2uF

C484

0.1uF 16V

C420

0.1uF 16V

DDR0_CLK

DDR0_CLKb DDR01_CKE

DDR01_RASb DDR01_CASb DDR01_WEb

DDR01_BA0 DDR01_BA1

DDR0_A[4-6]

DDR01_BA2

DDR01_ODT

DDR0_CLK

DDR0_CLKb DDR01_CKE

DDR01_RASb DDR01_CASb DDR01_WEb

DDR01_BA0 DDR01_BA1

DDR0_A[4-6]

DDR01_BA2

DDR01_ODT

R410

D1.8V

C432

C431

C429

C428

22uF

DDR0_DQS0

DDR0_DQS0b

DDR0_DM0

DDR0_VREF0

C438

0.1uF

470pF

C430

10uF

22uF

DDR0_DQ[0-7]

004:B2;004:E4;004:H1

C439

004:B4 004:B4 004:B3

VREF VDDL

C424

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

DQS DQS

10uF

C8 C2 D7 D3 D1 D9 B1 B9

B7 A8 B3 A2

A9 C1 C3 C7 C9 A1 L1 E9 H9 A7 B2 B8 D2 D8 A3 E3 J1 K9 E2 E1 E7

C425

470pF

C426

0.047uF

DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7]

C427

D1.8V

0.1uF

C422

C423

C421

NT5TU128M8DE_BD

1%

100

DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR0_A[4] DDR0_A[5] DDR0_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12]

DDR01_A[13]

E8 F8 F2

F7 G7 F3 G8

G2 G3 H8 H3 H7 J2 J8 J3 J7 K2 K8 K3 H2 K7 L2

G1 L3 L7 L8

F9

CK CK CKE

RAS CAS WE CS

BA0 BA1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12

NC_1/BA2 NC_2/A14 NC_3/A15 A13

ODT

470pF

IC401

0.047uF

0.1uF

DM/RDQS NU/RDQS

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5

VDD_1 VDD_2 VDD_3

VDD_4 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5

VSS_1

VSS_2

VSS_3

VSS_4

VSSDL

Close to IC

IC402

DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR0_A[4] DDR0_A[5] DDR0_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12]

DDR01_A[13]

NT5TU128M8DE_BD

E8

CK

F8

CK

F2

CKE

F7

RAS

G7

CAS

F3

WE

G8

CS

G2

BA0

G3

BA1

H8

A0

H3

A1

H7

A2

J2

A3

J8

A4

J3

A5

J7

A6

K2

A7

K8

A8

K3

A9

H2

A10/AP

K7

A11

L2

A12

G1

NC_1/BA2

L3

NC_2/A14

L7

NC_3/A15

L8

A13

F9

ODT

DM/RDQS NU/RDQS

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5

VDD_1

VDD_2

VDD_3

VDD_4 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5

VSS_1

VSS_2

VSS_3

VSS_4

VREF VDDL

VSSDL

C8

DDR0_DQ[9]

DQ0

C2

DDR0_DQ[8]

DQ1

D7

DDR0_DQ[12]

DQ2

D3

DDR0_DQ[13]

DQ3

D1

DDR0_DQ[15]

DQ4

D9

DDR0_DQ[11]

DQ5

B1

DDR0_DQ[10]

DQ6

B9

DDR0_DQ[14]

DQ7

B7

DQS

A8

DQS

B3 A2

A9 C1 C3 C7 C9 A1 L1 E9 H9 A7 B2 B8 D2 D8 A3 E3 J1 K9 E2 E1 E7

D1.8V

DDR0_DQS1

DDR0_DQS1b

DDR0_DM1

DDR0_VREF0

C440

0.1uF

DDR0_DQ[8-15]

C441

470pF

004:B4 004:B4 004:B4

Close to IC

C434

C435

C433

0.1uF

0.047uF

004:B3

004:B1;004:F4

DDR01_A[0-3,7-13]

004:B1;004:C3;004:C5;004:F5;004:H3;004:H2

DDR01_A[0-3,7-13]

004:B2;004:E2;004:H1

C436

C437

10uF

470pF

0.1uF

0.047uF

DDR1_CLK

DDR1_CLKb

DDR01_CKE

DDR01_RASb DDR01_CASb DDR01_WEb

DDR01_BA0

DDR01_BA1

DDR1_A[4-6]

DDR01_BA2

DDR01_ODT

DDR1_CLK

DDR1_CLKb DDR01_CKE

DDR01_RASb DDR01_CASb DDR01_WEb

DDR01_BA0 DDR01_BA1 DDR1_DQS1

DDR1_A[4-6]

DDR01_BA2

DDR01_ODT

R411

100

C442

470pF

IC403

NT5TU128M8DE_BD

E8

1%

DDR01_A[0] DDR01_A[1] DDR01_A[3] DDR01_A[2] DDR01_A[3] DDR1_A[4] DDR1_A[5] DDR1_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12]

DDR01_A[13]

F8 F2

F7 G7 F3 G8

G2 G3 H8 H3 H7 J2 J8 J3 J7 K2 K8 K3 H2 K7 L2

G1 L3 L7 L8

F9

CK CK CKE

RAS CAS WE CS

BA0 BA1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12

NC_1/BA2 NC_2/A14 NC_3/A15 A13

ODT

DM/RDQS NU/RDQS

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5

VDD_1 VDD_2 VDD_3

VDD_4 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5

VSS_1

VSS_2

VSS_3

VSS_4

VREF VDDL

VSSDL

C8

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

DQS DQS

DDR1_DQ[0]

C2

DDR1_DQ[1]

D7

DDR1_DQ[5]

D3

DDR1_DQ[3]

D1

DDR1_DQ[4]

D9

DDR1_DQ[2]

B1

DDR1_DQ[6]

B9

B7 A8 B3 A2

A9 C1 C3 C7 C9 A1 L1 E9 H9 A7 B2 B8 D2 D8 A3 E3 J1 K9 E2 E1 E7

D1.8V

C443

470pF

DDR1_DQS0

DDR1_DQS0b

DDR1_DM0

DDR1_VREF0

C444

0.047uF

DDR1_DQ[0-7]

004:B4 004:B4 004:B4

C449

470pF

C445

0.1uF

004:B3

C450

0.1uF

C447

C446

10uF

470pF

DDR01_A[0-3,7-13]

DDR1_A[4-6]

DDR0_A[4-6]

C448

0.047uF

C453

0.1uF

C454

10uF

SI

C455

22uF

C456

DDR01_RASb

DDR01_CASb

DDR01_BA1 DDR01_BA0 DDR01_BA2 DDR01_WEb DDR01_CKE DDR01_ODT

DDR01_RASb

DDR01_BA1

Close to IC

DDR01_BA0 DDR01_BA2 DDR01_WEb

DDR01_CKE

SI

DDR01_ODT

DDR01_A[0] DDR01_A[1] DDR01_A[2] DDR01_A[3] DDR1_A[4] DDR1_A[5] DDR1_A[6] DDR01_A[7] DDR01_A[8] DDR01_A[9] DDR01_A[10] DDR01_A[11] DDR01_A[12]

DDR01_A[13]

IC404

NT5TU128M8DE_BD

E8

CK

F8

CK

F2

CKE

F7

RAS

G7

CAS

F3

WE

G8

CS

G2

BA0

G3

BA1

H8

A0

H3

A1

H7

A2

J2

A3

J8

A4

J3

A5

J7

A6

K2

A7

K8

A8

K3

A9

H2

A10/AP

K7

A11

L2

A12

G1

NC_1/BA2

L3

NC_2/A14

L7

NC_3/A15

L8

A13

F9

ODT

DM/RDQS NU/RDQS

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5

VDD_1

VDD_2

VDD_3

VDD_4 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5

VSS_1

VSS_2

VSS_3

VSS_4

VREF VDDL

VSSDL

C8

DDR1_DQ[9]

DQ0

C2

DDR1_DQ[8]

DQ1

D7

DDR1_DQ[12]

DQ2

D3

DDR1_DQ[13]

DQ3

D1

DDR1_DQ[15]

DQ4

D9

DDR1_DQ[14]

DQ5

B1

DDR1_DQ[10]

DQ6

B9

DDR1_DQ[11]

DQ7

B7

DQS

A8

DQS

B3 A2

A9 C1 C3 C7 C9 A1 L1 E9 H9 A7 B2 B8 D2 D8 A3 E3 J1 K9 E2 E1 E7

D1.8V

DDR1_DQS1b

DDR1_DM1

DDR1_VREF0

C451

470pF

DDR1_DQ[8-15]

004:B3

004:B4 004:B4 004:B4

C452

0.1uF

Close to IC

22uF

C457

10uF

DDR01_A[2] DDR01_A[0] DDR1_A[6]

DDR01_A[12] DDR01_A[9]DDR1_DQ[7] DDR01_A[7] DDR1_A[5] DDR1_A[4] DDR01_A[11] DDR01_A[8] DDR01_A[13]

DDR01_A[1] DDR01_A[10]

DDR01_A[2] DDR01_A[0] DDR0_A[6] DDR01_A[3] DDR01_A[1] DDR01_A[10]

DDR01_A[12] DDR01_A[9] DDR01_A[7] DDR0_A[5] DDR0_A[4] DDR01_A[11] DDR01_A[8] DDR01_A[13]

C458

0.1uF

C459

0.047uF

R414

R412 75

R413 75

R417

R415

R418

R419

R416 75

R421

R422

R423

R424

R425

R420 75

75

C460

470pF

SI

C461

10uF

DDR_VTT

75

DDR_VTT

C462

0.1uF

C463

0.047uF

C464

0.1uF

C465

0.1uF

C466

0.1uF

C468

0.1uF

C469

0.1uF

C470

0.1uF

C471

0.1uF

C472

0.1uF

C473

0.1uF

C474

0.1uF

C475

0.1uF

C476

0.1uF

C479

0.1uF

C478

0.1uF

C480

0.1uF

SI

C467

470pF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX63347201

DDR2 MEMORY INTERFACE

08/06/xx

4 13

POWER B/D

LGE Internal Use Only

POWER Wafer 24P

C501

16V

CURRENT: MAX 6A

L501

EAM38058401

CB4532UK121E

C507

0.1uF 16V

R502 100

R506 100

RL_ON

P_+5V

C500 10uF

6.3V

READY

R500

10K

5V_ON

100uF

+5V_ST

READY

R501

10K

Stand-by (5VST --> +3.3V)

+5V_ST

C502 10uF

6.3V

P500 SMAW200-H18S1

1 3 5 7 9 11 13 15 17

IC506 EAN58801701 AP2121N-3.3TRE1

VIN

3

C503

0.1uF 16V

Multi Power(5V -->3.3V)

0.1uF C542

16V

C543

0.1uF 16V

A1.2V

D3.3V

L514

UBW2012-121F

C548

100uF

16V

C549 22uF 10V

0.1uF C550

A3.3V

16V

C551

100uF

16V READY

CURRENT: MAX 3A

L505 0LCML00003B

2 4 6

8 10 12 14 16 18

19

MLB-201209-0120P-N2

VOUT

2

1

GND

MLB-201209-0120P-N2

D3.3V

R5120

READY

R513

CURRENT: MAX 3A

10K

L506

0LCML00003B

C520

0.1uF 16V

C508 10uF

6.3V

C521

0.1uF 16V

R514 100

C518

0.1uF 50V

ERROR_DET

C522 10uF

6.3V

READY

+3.3V_ST

C509

0.1uF 16V

P_17V

C519 33uF 25V

+5V_ST

C523

100uF

AC_DET

L502 EAM44020101 CB3216PA501E

16V

+3.3V_NEC_ST

P_+5V

C526 47uF 16V

C527 22uF 10V

+5V_ST

L507

C528

0.1uF

C534

0.1uF 47

R519

PGND_1

IC504

MP8706EN-C247-LF-Z

IN

1

SW_1

2

3A

SW_2

3

BST

4

L508

3.6uH

IC503

MP2208DL-LF-Z

AGND

1

SS

SW_1

IN_1

NC

BS

14

15

2

13

THERMAL

3

12

4

11

5

10

6

9

7

8

EP

FB

EN/SYNC

PGND_2

SW_2

IN_2

POK

VCC

8

7

6

5

R516

R515

100K

GND

VCC

FB

EN/SYNC

10

R527

R537 0

1/10W 5%

R528

R529

R520 0

39K

1.2K

L509

C535

0.1uF

001:H5

+3.3V_EN

0

1uF

C540

R530 13K

1/8W

R2

1%

R1

1%

Vout=0.8*(1+R1/R2)

R522

0

R523

0

2uH

1.2V_1.8V_EN

R525

R521 470K

820K

1%

R1

R2

C536

22uF 16V

D1.2V

BLM18PG121SN1D

C537 22uF

16V

L510

C541 22uF 10V

C538 22uF 16V

Vout=0.9*(1+R2/R1)=1.845

300 mA

+5V_ST

L503

Replaced Part

IC501

MP2108DQ

C510

0.01uF

25V

PGND

SGND

BST

1

VIN

2

3A

LX

3

4

5

RUN

10

VREF

9

COMP

8

FB

7

SS

6

C511

0.01uF 25V

C IN

L500

CIC21J501NE

Placed on SMD-TOP

C504 22uF 10V

Multi Power(5V -->2.5V)

P_+5V

READY

C505 10uF

6.3V

INPUT

C506

0.1uF 16V

IC502 0IPMG78346A AZ1085S-ADJTR/E1

2

3

1

ADJ/GND

1%

R504

910

R2 1%

R505

66.5

OUTPUT

R509 1K

1%

R1

V0 = 1.25(1+R2/R1)

C513 10uF

6.3V

3.6uH

NR8040T3R6N

10K

R508

1.2V_1.8V_EN

C561

0.01uF 25V

C514 3300pF 50V

R503

6.8K

R539 0

1/10W 5%

READY

100pF

C562

R510 10K

1/10W

1%

50V

R1

BCM3556 core 2.5V

READY

C515

C516 100uF 16V

C517 100uF 16V

0.1uF 16V

MUST BE CHANGE ADJ LDO AFTER THEN CHECK CST

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R2

R511

10.5K 1%

10V

C512 22uF

Placed on SMD-TOP

C564

0.1uF

A2.5V

L504 0LCML00003B MLB-201209-0120P-N2

C525 100uF 16V

D1.8V

C529

0.1uF

TUNER 5V

P_17V

L511

C544 10uF 25V

C553

C530 22uF 16V

1/10W

0.1uF

R532

47

5%

IC505

1

2

3A

3

4

L515 10uH

NR8040T100M

C532

1uF

10V

C531

0.1uF

MP8706EN-C247-LF-Z

IN

SW_1

SW_2

BST

Vout=0.8*(1+R1/R2)

C533 22uF

R531

100K

READY

GND

8

C552 1uF

VCC

7

50V

R533

10K

R538 300K

1/10W 5%

RL_ON

6

5

FB

EN/SYNC

Vout=(1+R1/R2)*0.8

R540

R535

R536

18K

15K

6.2K

C559

0.1uF 16V

+5V_TU

130mA

1%

R1

1%

L516 0LCML00003B MLB-201209-0120P-N2

C557 10uF

6.3V

C558 10uF

6.3V

C556 100uF 16V

R2

EAX63347201

SMPS POWER

08/10/xx

5 13

+5V_TU

LGE Internal Use Only

L603

MLB-201209-0120P-N2

DEMOD_OPT

19

TU601 UDA45AL

SHIELD

ANT_PWR[OPT]

1

BST_CNTL

2

+B

3

NC[RF_AGC]

4

AS

5

SCL

6

SDA

7

NC(IF_TP)

8

SIF

9

NC

10

VIDEO

11

GND

12

1.2V

13

3.3V

14

RESET

15

IF_AGC_CNTL

16

DIF_1

17

DIF_2

18

READY

0

R641

BRAZIL_TUNER

TU600 TDTR-T035F

10

11

12

13

14

15

16

17

18

19

SHIELD

RF_S/W_CTL

1

BST_CTL

2

+B1[5V]

3

NC_1[RF_AGC]

4

NC_2

5

SCLT

6

SDAT

7

NC_3

8

SIF

9

NC_4

VIDEO

GND

+B2[1.2V]

+B3[3.3V]

RESET

IF/AGC

DIF_1[N]

DIF_2[P]

DEMOD_OPT

C600 1200pF 50V

DEMOD_OPT

C601 1200pF 50V

C603

1200pF

50V

TUNER_IF_N

TUNER_IF_P

C605

Pull-up can’t be applied

0.1uF

16V

because of MODEL_OPT_2

DEMOD_OPT

C607

C604

0.1uF

4.7uF

+1.2V_DE

L600

C602

4.7uF

RF_SWITCH_CTL

+5V_TU

L601

C606

0.1uF

C608 22uF 16V

Q600 ISA1530AC1 DEMOD_OPT

C610

0.01uF 25V

DEMOD_OPT

E

C

L602

C609

4.7uF

B

C612 47pF 50V

D3.3V

C611

0.1uF

R603

2.2K

DEMOD_OPT

100

C613 47pF 50V

Q601

2SC3052

R602

R601

C

E

R604

3K

READY

R605 10K

DEMOD_OPT

B

D3.3V

R608

10K

DEMOD_OPT

R607

3K

READY

R606 0

1/10W 5%

SCL0_3.3V

SDA0_3.3V

D3.3V

R609 100K

C614

0.1uF

16V

+1.2V_DE

RF_BOOSTER

TUNER_RESET

C616

100pF 50V

R611 0

C615

0.1uF 16V

DEMOD_OPT

Close to the tuner

+3.3V_DE

R616

4.7K

R615

READY

R614

READY

1K

R610 1K

DEMOD_OPT

+5V_TU

READY

R617 0

B

R618 100

B

R619

470

E

C

+5V_TU

E

C

Q603

Q602

ISA1530AC1

C628

0.1uF

DEMOD_OPT

16V

R622 82

ISA1530AC1

ISDB_IF_AGC

DEMOD_OPT C6310.1uF

16V

DEMOD_OPT

TU_SIF

DEMOD_OPT

C632

25V

1uF

TU_CVBS

DEMOD_OPT

C635

1uF

C636

50V

0.01uF

DEMOD_OPT

C640

16V

0.1uF

D3.3V

MLB-201209-0120P-N2

C642

C641

0.1uF

10uF

16V

6.3V

DEMOD_OPT

L604

DEMOD_OPT

R631

R632

R629

R630

C643

0.1uF 16V

IC601

3

OUTPUT

DEMOD_OPT

2

1

DEMOD_OPT

AZ1117H-ADJTRE1(EH11A)

INPUT

22

+3.3V_DE

DEMOD_OPT

C644

0.1uF 16V

ADJ/GND

R633

1.2K R1

FE_TS_VAL

FE_TS_SYN

FE_TS_SERIAL

FE_TS_CLK

C649

0.1uF 16V

R635

1K

R640

A2[RD]

A1[GN]

DEMOD_OPT

D600

DEMOD_OPT

C

SAM2333

+1.2V_DE

R2

10

C652

10uF

6.3V

+3.3V_DE

C651 10uF

6.3V

< PANASONIC Demod.>

TUNER_IF_N

TUNER_IF_P

DEMOD_OPT

R612

100

R613

DEMOD_OPT

Close to R622,R623

0.1 uF

16V

DEMOD_OPT

16V

DEMOD_OPT

45

46

TCK48TDI

VSS_5

VDDL_4

DEMOD_OPT

C639

0.1uF 16V

TEST177TEST278SCKA79GPI280SDOA81PCKA82DENA83VDDH_4

76

VSS_9

75

INTB

74

INTA

73

SADR

72

VDDH_3

71

SCL

70

SDA

69

VSS_8

68

HDVDDL0

67

SADR_S

66

NC_2

65

SADR_T

64

VDDL_6

63

VSS_7

62

ERRB

61

SYNCB

60

ERRA

59

SYNCA

58

TDO

57

CSEL1

56

CSEL0

55

TMS

54

TRST

53

VDDL_5

52

VSS_6

51

47

49

50

NRST

TEST3

DEMOD_OPT

C648 0.1uF

DEMOD_OPT

C647 0.1uF

C646 0.1uF

DEMOD_OPT

C645 0.1uF

DEMOD_OPT

READY

R634

2.7K

+3.3V_DE

READY

C650

0.1uF 16V

DEMOD_OPT

R637

22

R636

DEMOD_OPT

R638

2.2K

READY

R639

2.2K

DEMOD_RESET

READY

SCL2_3.3V SDA2_3.3V

VDDH_2

READY

DEMOD_OPT

39

GPI140GPI0

C634

0.1uF 16V

C633 30pF 50V

VSS_1085HDVPP86RON87NC_388HDVDDH89NC_490HDVDDL1

84

41

TEST442SHVPP

DEMOD_OPT

C637

0.1uF 16V

43

NC_1

SHVDDH

C638

0.1uF 16V

44

VSS_1192VDDL_7

30

GPO1

16V

31

AGCI_T32AGCR_T

C630

0.1uF 16V

DEMOD_OPT

SCKB94TEST095SDOB96PCKB97DENB98GPO299VDDH_5

91

93

IC600

MN884433

33

34

35

36XO37XI38

GPO0

VSS_4

VDDL_3

DEMOD_OPT

R628 1M

X600

25MHz

DEMOD_OPT

C629 30pF 50V

AGC_S

VSS_1

AVDD_S

AII_S AIQ_S

AVSS_S

VRT_S

VRB_S TCPO_S VDDL_1 MSCL_S MSDA_S

VSS_2

VSSH PSEL ZSEL

VDDL_2

ACKI

TCPO_T

IR_T VRT_T VRB_T

AVDD_T

AIN_T AIP_T

AVSS_T

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

100

26

27

VSS_3

MSCL_T28MSDA_T29VDDH_1

C627

0.1uF

DEMOD_OPT

0.1uF

C625

DEMOD_OPT

0.1uF

C624

DEMOD_OPT

0.1uF

C622

DEMOD_OPT

0.1uF

C623

DEMOD_OPT

R620

1%

10K

DEMOD_OPT

C620 0.1uF

DEMOD_OPT

C621 0.1uF

C61 7

C61 8

0.1 uF

DEMOD_OPT

C619 0.1uF

ISDB_IF_AGC

R626

R627

DEMOD_OPT

C626

0.1uF

2.2K

DEMOD_OPT

2.2K DEMOD_OPT

DEMOD_OPT

R625 2.2K

DEMOD_OPT

R624 2.2K

10K

R623

DEMOD_OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX63347201

TUNER

11 13

AMP

LGE Internal Use Only

P_17V

L704

0LCML00003B

MLB-201209-0120P-N2

D3.3V

+17V_AMP

001:H2

AUD_MASTER_CLK

001:H6;005:C2

AUD_LRCK

AUD_SCK

AUD_LRCH

Separate DGND AND AVSS

C700 22pF

READY

001:E5

AMP_RESET_N

R705

1K

PULL DOWN

R702

0 0 0

+3.3V_DVDD

R701

4.7K

READY

AC_DET

SDA1_3.3V SCL1_3.3V

+3.3V_DVDD

READY

R708

22K

R703

R704

R710 0

+3.3V_AU_AVDD

AVSS

READY

R709 1K

READY

C701 22pF

READY

R707

4.7K

READY

R706

33

C704

1000pF

READY

C703 10uF 16V

C702 1000pF 50V

C705 22pF

READY

R712

R71333

+3.3V_DVDD

READY

R711 2K

L703

This parts are Located on AVSS area.

R719

470

AVSS

PLL_FLTP

VR_ANA

11

12

25RESET

26STEST

4700pF

C716

PLL_FLTM

10

27DVDD

C714

AVSS

TESTOUT

C710

4.7uF 10V

READY

R714 200

C709 33pF

R716

0

READY

1%

OSC_RES

1%

18K R715

C711 33pF

READY

C708

0.01uF

C707

0.1uF

C706 22pF

READY

33

C713

0.047uF

AVDD

MCLK

DVSS_1 VR_DIG

PDN

LRCLK

SCLK SDIN

SDA SCL

+3.3V_DVDD

4700pF

R717

470

C712 10uF 16V

13 14 15 16 17 18 19 20 21 22 23 24

C715

0.01uF

22K

C717

0.047uF

AVSS

OC_ADJ

7

8NC9

C720 2200pF

R718

SSTIMER

6

TAS5709PHPR

IC700

28DVSS_2

29GND

30AGND

31VREG

C718

0.1uF

C723

1uF

0.033uF 50V

C72 1

PVDD_A_1

PVDD_A_2

BST_A

GVDD_OUT_1

2

3

4

5

32GVDD_OUT_2

33BST_D

34PVDD_D_1

35PVDD_D_2

1uF

C71 9

C722

0.033uF 50V

OUT_A

1

48 47 46 45 44 43 42 41 40 39 38 37

36OUT_D

C725

0.01uF

PGND_AB_2 PGND_AB_1 OUT_B PVDD_B_2 PVDD_B_1 BST_B BST_C PVDD_C_2 PVDD_C_1 OUT_C PGND_CD_2 PGND_CD_1

C724

0.01uF

C726 68uF 35V

C730

68uF 35V

C729

0.01uF

C728

0.01uF

+17V_AMP

C727 68uF 35V

C731

68uF

35V

+17V_AMP

C733

50V

0.033uF C732

50V

0.033uF

L701 AD-9060

2S

1S 1F

EAP61008401

L700 AD-9060

2S

1S 1F

EAP61008401

120-ohm

L702

120-ohm

C735

0.47uF 50V

C737

0.1uF

C736

0.1uF

C739

0.1uF

C738

0.1uF

2F

C734

0.47uF 50V

+3.3V_AU_AVDD

+3.3V_DVDD

C743

0.01uF

R722

3.3

R723

3.3 C742

0.01uF

C741

0.01uF

R721

3.3

R720

3.3 C740

0.01uF

SPK_L+

SPK_L-

SPK_R+

SPK_R-

WAFER-ANGLE

4

3

2

1

P700

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX63347201

AUDIO AMP

7 13

PK950

LGE Internal Use Only

SHIELD

20

JK802

EAG59023302

YKF45-7058V

SHIELD

20

JK801

EAG59023302

YKF45-7058V

SHIELD

20

JK800

EAG59023301

19

18

17

16

15

14

13

12

11 10

9

8

7

6

5

4

3

2

1

19

18

17

16

15

14

13

12

11 10

19

18

17

16

15

14

13

12

11 10

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK-

CK_GND

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK-

CK_GND

CK+

D0-

9

D0_GND

8

D0+

7

D1-

6

D1_GND

5

D1+

4

D2-

3

D2_GND

2

D2+

1

CK-

9

8

7

6

5

4

3

2

1

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK_GND

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

5V_HDMI_1

D802

5.5V

READY

R802

1K

GND

R801

1K

GND

D801

5.5V READY

GND

R807 0

R808

GND

R805 0

R806

0

GND

KRC104S

Q802

JP803

JP804

0

GND

KRC104S

Q801

JP801

JP802

E

KRC104S

Q805

E

C

B

C

DDC_SDA_1

008:X13

DDC_SCL_1

008:X12

UI_HW_PORT1

E

KRC104S

Q804

E

C

B

C

DDC_SDA_2

008:AD5

DDC_SCL_2

008:AD5

GND

UI_HW_PORT2

E

C

008:AN12

KRC104S

Q803

B

DDC_SDA_3

DDC_SCL_3

E

C

GND

R800

D800

5.5V

READY

1K

R804 0

R803 0

GND

KRC104S

GND

Q800

JP800

JP805

P_+5V

HDMI_HPD_1

001:H2

B

D808

R811

4.7K

D805

5.5V

READY

008:H17;008:H8;008:R26;008:X25

HDMI_HPD_2

B

R810

4.7K

D804

5.5V

READY

008:H26;008:H8;008:R26;008:X25

HDMI_HPD_3

B

R809

4.7K

D803

5.5V

READY

008:H26;008:H17;008:R26;008:X25

5V_HDMI_1

008:I29;008:Z14

R837

1.8K

HDMI_POWER_1

3.3K R838

CEC_REMOTE

CK-_HDMI1

008:Y12

CK+_HDMI1

008:Y12

D0-_HDMI1

008:Y12

D0+_HDMI1

008:Y11

D1-_HDMI1

008:Y11

D1+_HDMI1

008:Y11

D2-_HDMI1

008:Y10

D2+_HDMI1

008:Y10

5V_HDMI_2

008:I19;008:AB7

P_+5V

D806

5V_HDMI_2

008:I20;008:AB7

1.8K R839

HDMI_POWER_2

3.3K

R840

CEC_REMOTE

CK-_HDMI2

008:AE6

CK+_HDMI2

008:AE6

D0-_HDMI2

008:AE6

D0+_HDMI2

008:AE6

D1-_HDMI2

008:AF6

D1+_HDMI2

008:AF6

D2-_HDMI2

008:AF6

D2+_HDMI2

008:AG6

P_+5V

008:I9;008:AK15

D807

5V_HDMI_3

008:I11;008:AK15

1.8K R841

HDMI_POWER_3

3.3K

R842

CEC_REMOTE

CK-_HDMI3

008:AL12

CK+_HDMI3

008:AL12

D0-_HDMI3

008:AL13

D0+_HDMI3

008:AL13

D1-_HDMI3

008:AL13

D1+_HDMI3

008:AL13

D2-_HDMI3

008:AL14

D2+_HDMI3

008:AL14

5V_HDMI_3

A1CA2

JACK_GND

GND

20

19

18

17

16

15

14

13

12

11

JK803

10

EAG42463001

KJA-ET-0-0032

9

8

7

6

5

4

3

2

1

HP_DET

5V

GND

DDC_DATA

DDC_CLK

NC

CE_REMOTE

CK-

CK_GND

CK+

D0-

D0_GND

D0+

D1-

D1_GND

D1+

D2-

D2_GND

D2+

D809

5.5V GND

READY

R812

1K

GND

R813 0

R814

0

KRC104S

Q806

JP806

JP807

E

C

KRC104S

Q807

B

DDC_SDA_4

008:AH21

DDC_SCL_4

008:AH21

E

HDMI_HPD_4

B

R815

4.7K

C

D810

5.5V

READY

GND

008:H26;008:H17;008:H8;008:X25

5V_HDMI_4

P_+5V

008:S28;008:AI19

D811

5V_HDMI_4

008:S29;008:AI19

1.8K R843

HDMI_POWER_4

3.3K

R844

CEC_REMOTE

CK-_HDMI4

008:AG19

CK+_HDMI4

008:AG19

D0-_HDMI4

008:AG19

D0+_HDMI4

008:AG19

D1-_HDMI4

008:AF19

D1+_HDMI4

008:AF19

D2-_HDMI4

008:AF19

D2+_HDMI4

008:AE19

A1CA2

SIDE_HDMI_PORT4

A1CA2

* HDMI CEC

CEC_REMOTE

008:H26;008:H17;008:H8;008:R26

HDMI1

R816

47K

DDC_SDA_1 DDC_SCL_1

CK-_HDMI1 CK+_HDMI1

D0-_HDMI1 D0+_HDMI1

D1-_HDMI1 D1+_HDMI1

D2-_HDMI1 D2+_HDMI1

MMBD301LT1G

P_+5V

R817

47K

P_+5V

+1.8V_HDMI

R821

D812

C802

0.1uF 16V

22K

R820 10K

R819

3.3K

5V_HDMI_1

C801

0.1uF

C800

0.1uF 16V

R818

0

+3.3V_ST

003:E3

HDMI_SDA

HDMI_SCL

C803

0.1uF 16V

G

SBD

Q808

BSS83

+3.3V_HDMI

003:D3

HDMI0_RX0-_BCM

HDMI0_RXC-_BCM

HDMI0_RXC+_BCM

OUT_DDC_CLK OUT_DDC_DAT

VDDDC[1V8]_1

RXA_DDC_DAT RXA_DDC_CLK

VDDH[3V3]_1

VDDH[3V3]_2

VDDH[1V8]_1

5V_HDMI_2

C804

0.1uF 16V

1%

91K

R845

1/16W

C805

0.1uF

003:D3

003:D4

HDMI0_RX0+_BCM

HDMI0_RX1+_BCM

HDMI0_RX1-_BCM

VSS_1 OUT_C+ OUT_C-

VDDO[3V3]

VSS_2

RXA_HPD

RXA_5V

RXA_CRXA_C+

RXA_D0RXA_D0+

VSS_3

RXA_D1RXA_D1+

RXA_D2RXA_D2+

AUX_5V

R822 47K

HDMI2

001:G6

HDMI_CEC

C807

0.1uF

C808

0.1uF

003:D4

HDMI0_RX2+_BCM

HDMI0_RX2-_BCM

OUT_D1-

VSS_1299OUT_D0+

OUT_D0-

97

98

100

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

26

28

29

VSS_427TEST1

RXB_5V

RXB_HPD

C806

R823

0.1uF

47K

16V

C810

0.1uF

C809

OUT_D2-

VDDO[1V8]

OUT_D1+

94

95

96

TDA19997

30

31

32

RXB_C-33RXB_C+

RXB_DDC_DAT

RXB_DDC_CLK

CK-_HDMI2

DDC_SCL_2

DDC_SDA_2

C811

0.1uF

D2+_HDMI4

RXD_D2+

VDDDC[1V8]_3

VSS_1193OUT_D2+

90

91

92

IC800

34

35

RXB_D0-36RXB_D0+

VDDH[3V3]_3

CK+_HDMI2

D0-_HDMI2

D2-_HDMI4

RXD_D1+

VDDH[3V3]_8

RXD_D2-

87

88

89

37

38

VSS_5

RXB_D1-39RXB_D1+

D1-_HDMI2

D0+_HDMI2

D1-_HDMI4

D1+_HDMI4

RXD_D0+

VSS_10

RXD_D1-

84

85

86

40

41

RXB_D2-42RXB_D2+

VDDH[3V3]_4

D1+_HDMI2

D2-_HDMI2

D0-_HDMI4

D0+_HDMI4

RXD_D0-

83

43

44

VSS_6

CDEC_DDC

VDDDC[1V8]_2

D2+_HDMI2

DDC_SCL_4

CK+_HDMI4

CK-_HDMI4

RXD_DDC_DAT

RXD_DDC_CLK

RXD_C-81RXD_C+82VDDH[3V3]_7

78

79

80

45

46

47

48PD49

TEST2

R826 0

VDDDC[1V8]_4

R824

0

DDC_SDA_4

R831 47K

R830 47K

C813

0.1uF

Place close to TDA9996

RXD_HPD

RXD_5V

76

77

75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

I2C_SDA50I2C_SCL

22

R829

R825

R828 READY

R827

READY

SDA2_3.3V

SCL2_3.3V

D1.8V

BLM18PG121SN1D

HDMI4

5V_HDMI_4

16V

VDDH[1V8]_2 R12K VSS_9 RXC_D2+ RXC_D2VDDH[3V3]_6 RXC_D1+ RXC_D1VSS_8 RXC_D0+ RXC_D0VDDH[3V3]_5 RXC_C+ RXC_CRXC_DDC_CLK RXC_DDC_DAT RXC_5V RXC_HPD CEC VSS_7 VDDS[3V3] CDEC_STBY INT_N/MUTE RXE_DDC_DAT RXE_DDC_CLK

0

R832

C812

0.1uF 16V

+3.3V_HDMI

R833 12K

READY

L800

+1.8V_HDMI

1%

C815

C814 6800pF 50V

C817

0.1uF

C816

0.1uF 16V

5V_HDMI_3

R834 0

READY

2.2uF

+1.8V_HDMI

C819

0.1uF 16V

C818

0.1uF 16V

C823

C824

C821

C822

0.1uF

C820

0.1uF 16V

D3.3V

R835

47K

D2+_HDMI3 D2-_HDMI3

D1+_HDMI3 D1-_HDMI3

D0+_HDMI3 D0-_HDMI3

CK+_HDMI3 CK-_HDMI3

+3.3V_HDMI

L801

BLM18PG121SN1D

HDMI3

R836 47K

C825

0.1uF

DDC_SCL_3 DDC_SDA_3

YKF45-7054V

GND

UI_HW_PORT3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX63347201

HDMI

6 13

R,G,B PC INPUT

LGE Internal Use Only

D0A

RGB_HSYNC 003:C5

RGB_VSYNC 003:C5

R900

22

R901

22

D0B

Q0

D1A

D1B

Q1

GND

RGB_B

RGB_G

RGB_R

74F08D

1

2

3

4

5

6

7

IC900

P_+5V

1K

5%

R919

1/10W

Q900

C

B

EDID_WP

E

READY

R918

2.7K

0

READY

R94 8

R94 9

KRC102S

D909

5.6V

D3.3V

C911 100pF 50V

D908

5.6V

001:H5

R921

1K

DDC_SCL

DDC_SDA

DSUB_DET

RS232C

RS232C_TXD

RS232C_RXD

+3.3V_ST

50V

0.1uF C906

R915

+5V_ST

2.7K

R916

R914 22

1/10W

R913

5%

22

1/10W 5%

18pF

50V

C908

D906

5.6V READY

P_+5V

IC901

R906

10K

AT24C02BN-10SU-1.8

A0

1

A1

2

A2

3

GND

4

D903

30V

R909

10K

D902

5.5V

D901

5.5V

D900

5.5V

VCC

8

WP

7

SCL

6

SDA

5

C907 50V

18pF

D904

30V

R912

0

RGB_R

R911

0

RGB_R

R910

0

RGB_R

BCM Reference

VCC

14

C903

D3B

13

12

11

10

9

8

D3A

Q3

D2B

D2A

Q2

READY

R903

22

R902

22

47pF

0.1uF

C902 50V

C901

50V

C900 47pF

50V

R922

4.7K

R923

4.7K

C914

0.1uF 50V

9

ROU T2

DOU T28RIN 2

6V-5

7

MAX3232CDR

11

10

DIN 2

JK902

SPG09-DB-009

C915

0.1uF 50V

C2-

IC902

12

DIN 1

ROU T1

R930

100

6

1

4

13

2

C2+

$0.179

RIN 1

R931

100

7

C1-2V+

3

14

DOU T1

3

8

C918

0.1uF 50V

15

GND16VCC

4

+3.3V_ST

C919

0.1uF 50V

C1+

1

C920

0.1uF 50V

READY

D910 ADUC30S03010L_AMODIODE 30V

D911

READY

ADUC30S03010L_AMODIODE

30V

9

10

5

READY

R941 0

R940 0 READY

SUB_SCL

SUB_SDA

RS232 DEBUG SWITCH

- NEC/S7

A/B

OUTPUT

LOW X0 Y0 NEC

X1 Y1 S7M

HIGH

TO HDMI JACK FOR WIRELESS

BCM_RX

NEC_RXD

Y1

Y0

Z1

Z

Z0

INH

VEE

VSS

IC903

MC14053BDR2G

0ISTL00024A

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

+3.3V_ST

VDD

Y

X

X1

X0

A

B

C

RS232C_RXD

RS232C_TXD

BCM_TX

NEC_TXD

TO HDMI JACK FOR WIRELESS

R944 47K

D3.3V

R945

4.7K

C930

0.1uF 16V

PC AUDIO

JK900

PEJ027-01

3

6A

7A

4

5

7B

6B

E_SPRING

T_TERMINAL1

B_TERMINAL1

R_SPRING

T_SPRING

B_TERMINAL2

T_TERMINAL2

R912-*1

BLM18PG600SN1D

RGB_BEAD

ZD903

5.1V

ZD902

5.1V

ZD901

5.1V

ZD900

5.1V

R911-*1

BLM18PG600SN1D

RGB_BEAD

R905

470K

R904

470K

R910-*1

BLM18PG600SN1D

RGB_BEAD

C905

1uF

25V

C904

1uF

25V

PC_R_IN

PC_L_IN

RED2GREEN3BLUE4GND_15DDC_GND

RED_GND7GREEN_GND8BLUE_GND9NC10SYNC_GND

GND_212DDC_DATA13H_SYNC14V_SYNC15DDC_CLOCK

11

SPG09-DB-010

6

1

JK901

CDS3C30GTH

50V

270pF

50V

82pF

READY

D905

C910

C909

READY

R917

10

D3.3V

5%

1/16W

16

R951

1K

PC_SER_DATA

002:G3

SHILED

30V

D907

CDS3C30GTH

READY

50V

270pF

C913

READY

50V

82pF

C912 R950 1K

1/16W 5%

10

R920

ROM DOWNLOAD FOR PDP

PC_SER_CLK

002:G3

SUB Board I/F

R924

IR_NEC

P_+5V

22

IR_NEC

IR

KEY1

KEY2

LED_RED

READY

SUB_SCL

SUB_SDA

D3.3V

L900

L901

MLB-201209-0120P-N2

PK950

LED_WHITE

R927

4.7K

10K

R946

D3.3V

PK550

2SC3052

+3.3V_ST

R928

10K

+3.3V_ST

R932

47K

C

Q901

B

E

READY

R929 0

MLB-201209-0120P-N2

R926

4.7K

READY

R947

4.7K

C916

10pF

READY

D3.3V

R925

4.7K

R933 10K

L903

L902

READY

C917

10pF

+3.3V_ST

R936 22

R935 22

R934 22

+3.3V_ST

R937

47K

C

B

Q902

E

2SC3052

C923 10pF

L904

MLB-201209-0120P-N2

C921

0.1uF 16V

R939

2.2K

R938 47K

C927

10pF

C925 10pF

C924

10pF

D912

CDS3C05HDMI1

5.6V

D913

CDS3C05HDMI1

5.6V

C922

0.1uF 16V

+3.3V_ST

C926

10pF

D914

KEY1

KEY2

LED-RED

3.3V_ST

3.3V_MULTI

LED-WHITE

IR

GND

SCL

SDA

GND

P902

12507WR-12L

1

2

3

4

5

6

7

8

9

10

11

12

13

GND

FOR PK/J90 - BREATING

P_+5V

LED_BREATHING

C929 10pF

PK950

L905

MLB-201209-0120P-N2

PK950

P903

12507WR-03L

1

2

3

4

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX63347201

LVDS/RS232//RGB

10 13

COMPONENT1/2,AV1

LGE Internal Use Only

JK1001

PPJ237-01

[RD1]E-LUG

6C

[RD1]O-SPRING

5C

[RD1]CONTACT

4C

[WH1]O-SPRING

5B

[YL1]CONTACT

4A

[YL1]O-SPRING

5A

[YL1]E-LUG

6A

[RD2]E-LUG

6H

[RD2]O-SPRING_2

5H

[RD2]CONTACT

4H

[WH2]O-SPRING

5G

[RD2]O-SPRING_1

5F

[RD2]E-LUG-S

7F

[BL2]O-SPRING

5E

[BL2]E-LUG-S

7E

[GN2]CONTACT

4D

[GN2]O-SPRING

5D

[GN2]E-LUG

6D

[RD3]E-LUG

6N

[RD3]O-SPRING_2

5N

[RD3]CONTACT

4N

[WH3]O-SPRING

5M

[RD3]O-SPRING_1

5L

[RD3]E-LUG-S

7L

[BL3]O-SPRING

5K

[BL3]E-LUG-S

7K

[GN3]CONTACT

4J

[GN3]O-SPRING

5J

[GN3]E-LUG

6J

ZD1011

5.1V

ZD1010

5.1V

ZD1008

5.1V

ZD1009

5.1V

ZD1006

5.1V

ZD1007

5.1V

ZD1032

5.1V ZD1033

5.1V

C1007

100pF

C1004

R10 07 470 K

C10031uF

R10 06 470 K

50V

D3.3V

1uF

25V

R1012

2.7K R1013

COMPOSITE1_SW

C1006 47pF 50V

COMPOSITE1_IN

AV 1

1K

C1011 100pF

READY

C1010 100pF

READY

AV_R_IN_1

002:A5

AV_L_IN_1

002:A5

003:B4

001:H2

ZD1034

5.1V

ZD1035

5.1V

ZD1020

ZD1021

ZD1019

ZD1018

ZD1017

ZD1016

ZD1014

ZD1015

ZD1012

ZD1013

5.1V

R10 15 470 K

R10 14 470 K

D3.3V

C1013 27pF 50V

C1012 27pF 50V

R1018

2.7K

C1017

100pF

50V

C1016 25V 1uF

C1015 25V 1uF

C1014 27pF 50V

L1002 270nH

L1001 270nH

L1000 270nH

R1019

COMPONENT2

1K

COMP2_SW

001:H3

C1022 100pF

READY

C1021 100pF

READY

C1020 27pF 50V

C1019 27pF 50V

R1020 10

C1018 27pF 50V

002:A5

COMP_R_IN_2

002:A5

COMP_L_IN_2

COMP2_Pr

003:B3

COMP2_Pb

003:B4

COMP2_Y

003:B3

ZD1031

ZD1030

ZD1028

ZD1029

ZD1027

ZD1025

ZD1026

ZD1024

ZD1023

ZD1022

ZD1036

ZD1037

5.1V

R10 22 470 K

R10 21 470 K

C1025 27pF 50V

C1024 27pF 50V

C1023 27pF 50V

D3.3V

C1027 25V 1uF

C1026 25V 1uF

L1005

270nH

L1004

270nH

L1003

270nH

R1024

2.7K

C1028 100pF 50V

COMPONENT1

R1026

1K

COMP1_SW

COMP_R_IN_1

READY

C1033 100pF

COMP_L_IN_1

READY C1032 100pF

C1031 27pF 50V

C1030

27pF 50V

R1027 10

C1029

27pF

50V

COMP1_SW

001:H3

002:A5

COMP1_Pr

003:B3

COMP1_Pb

003:B3

COMP1_Y

003:B3

SIDE_AV

ZD1038

5.1V

ZD1039

5.1V

ZD1004

ZD1002

ZD1001

ZD1005

ZD1003

ZD1000

5.1V

PPJ235-01

JK1000

5A

[YL]E-LUG

4A

[YL]O-SPRING

3A

[YL]CONTACT

4B

[WH]O-SPRING

3C

[RD]CONTACT

4C

[RD]O-SPRING

5C

[RD]E-LUG

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

5.1V

D3.3V

R1002

2.7K

C1000

100pF

50V

R1001 470K

R1000 470K

R1003

1K

C1002

C1001

C1005

1uF25V

47pF

50V

C1009

100pF READY

C1008

100pF

READY

COMPOSITE2_IN

SIDEAV_DET

SIDE_LIN

SIDE_RIN

SPDIF

SPDIF_OUT

B

GND

IC1000

NL17SZ00DFT2G

1A5

NAND

2

GATE

3

READY

4

R1029 100

VCC

Y

READY

D3.3V

R1028

1K READY

R1030 100

EAX63347201

JACK

C1036 22pF

D3.3V

C1034

0.1uF 50V

C1035 10uF 16V

READY

VINPUT

JK1002

JST1223-001

GND

VCC

1

2

3

Fib er Opt ic

4

FIX_POLE

9 13

USB HUB

LGE Internal Use Only

USB1_DM_to_HUB USB1_DP_to_HUB USB2_DM_to_HUB USB2_DP_to_HUB

CLOSE TO BCM3556

USB1 SIDE UPPER

R1143 0

R1142 0

R1144 0 R1145 0

PK950

PK550 PK550

BT_DM_T

BT_DP_T

BT_USB_DM BT_USB_DP

Capacitors on VBUSA should be placed as closd to connector as possible.

JK1100 EAG41945401 KJA-UB-4-0004

1

USB DOWN STREAM

C1117 100uF 16V

USB1_OCD C1116 100uF 16V

R1115 0

R1118 0

PK550

PK950

C1105

15pF

50V

C1108

15pF

50V

24MHz X1100

1M

R1102

USB_DM

USB_DP

0

R1141

R1140 0

BT_DM

BT_DP

2

R110112K

C11030.1uF

C1104

1uF

PK950

C11090.1uF

R1104

D3.3V

100K

3

4

5

VSS

28

29

30

31

32

33

34

35

USBDN1_DM

USBDN1_DP

USBDN2_DM

USBDN2_DP

VDDA33_1

C11000.1uF

NC_1

NC_2

NC_3

NC_4

1

2

3

4

5

6

7

8

9

36

THERMAL

37

10

11

TEST

VDDA33_2

C11010.1uF

PK950

IC1100

USB2512A_AEZG

12

13

14

VDD18

OCS1_N

PRTPWR1

C11020.1uF

R11000

15

OCS2_N

VDD33CR16PRTPWR2

C11070.1uF

C11061uF

VBUS_DET

27

RESET_N

26

HS_IND/CFG_SEL1

25

SCL/SMBCLK/CFG_SEL0

24

VDD33

23

SDA/SMBDATA/NON_REM1

22

NC_8

21

NC_7

20

NC_6

19

17

18

NC_5

R11030

R1105

4.7K

R1108100K

R1106100K

C11110.1uF

R1107100K

C1110

4.7uF

D3.3V READY

R1109 100K

R1133 100K

C1112

0.1uF 16V

READY

001:H1 /RST_HUB

USB2 SIDE UNDER

Capacitors on VBUSA should be placed as closd to connector as possible.

PK950

JK1101 EAG41945401 KJA-UB-4-0004

1

USB DOWN STREAM

2

3

PK950

C1114 100uF 16V

USB2_OCD_HUB

C1115 100uF 16V

SUSP_IND/LOCAL_PWR/NON_REM0

VDDA33_3

USBUP_DM

USBUP_DP

XTAL2

XTAL1/CLKIN

VDD18PLL

RBIAS

VDD33PLL

4

5

D3.3V D3.3V

R1120 10K

R1125 0

R1126 0

R1123 0

R1124 0

D3.3V

R1119

PK950

10K

SWITCH ADDED

IC1102

AP2191SG-13

NC

OUT_2

OUT_1

FLG

GND

1

8

IN_1

2

7

IN_2

3

6

EN

4

5

PK950

PK550

SWITCH ADDED

IC1101

AP2191SG-13

NC

OUT_2

OUT_1

FLG

GND

1

8

IN_1

2

7

IN_2

3

6

EN

4

5

USB1_DM_to_HUB

USB1_DP_to_HUB

BT_USB_DM

BT_USB_DP

PK950

USB2_DM_to_HUB

USB2_DP_to_HUB

R1130 10K READY

R1132 0

PK550

R1131 0

PK950

D3.3V

R1129 10K READY

R1127 0

PK950

P_+5V

C1119

USB1_CTL

0.1uF 16V

USB1_CTL_HUBUSB1_OCD_HUB

USB1 Dato to USB2512

USB1 Dato to MAIN(BCM)

P_+5V

C1118

USB2_CTL_HUB

0.1uF 16V

PK950

USB2 Dato to USB2512

USB1_CTL_HUB

USB1_OCD_HUB

USB2_OCD_HUB

USB2_CTL_HUB

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BLUETOOTH

D3.3V

47K

R1111

PK950

2SC3052

READY

R1110

0

Q1100

1uF

C1113

PK950

C

E

BLUETOOTH

R1112

4.7K PK950

B

S

R1113

4.7K

PK950

G

D

Q1101

PK950

RTR030P02

BT_ON/OFF

BT_DM_T

BT_DP_T

BT_RESET

VREG_CTR

EAX63347201

USB HUB

Bluetooth Wafer

11

10

9

8

7

6

5

4

3

2

1

12507WR-10L

P1102

13 13

ETHERNET JACK

LGE Internal Use Only

WIRELESS DIP POWER ON/OFF

EPHY_TDP

002:B4

EPHY_TDN

002:B4

5.5V D1200

5.5V

D1201

C1200

EPHY_ACTIVE_Y

EPHY_RDP

002:B4

EPHY_RDN

1000pF

002:B4

EPHY_LINK

001:H2

D3.3V

5.5V

D1202

D1204

5.5V

A2.5V

5.5V

CIS21J121

L1200

D1203

D1205

C1201 1000pF

R1201 510

R1200 510

TDP

TD_CT

TDN

RDP

RD_CT

RDN

GND

LINK_LED

ACTIVE_LED

JK1200

XRJV-01V-D12-180

1

2

3

4

5

6

NC

7

8

D1

D2

D3

D4

9

GND

WIRELESS INTERFACE

P_17V_WIRELESS

VCC[24V/20V/17V]_1

VCC[24V/20V/17V]_2

VCC[24V/20V/17V]_3

VCC[24V/20V/17V]_4

VCC[24V/20V/17V]_5

VCC[24V/20V/17V]_6

D3.3V

R1204

PK950

10K

PK950

WIRELESS_DETECT

WIRELESS_SCL

WIRELESS_SDA

WIRELESS_DL_TX(WIRELESS_RX)

WIRELESS_DL_RX

WIRELESS_DL_RX(WIRELESS_TX)

WIRELESS_DL_TX

IR_PASS

R1203 1K

R1202

4.7K

R1207

PK950

4.7K PK950

P_17V

L1201

PK950

BLM18PG121SN1D

C1202

0.1uF 50V

WIRELESS_PWR_EN

JK1201

KJA-PH-3-0168

DETECT

INTERRUPT

GND_1

RESET

GND_2

I2C_SCL

I2C_SDA

GND_3

UART_RX

UART_TX

GND_4

IR

GND_5

GND_6

PK950

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

R1208 10K

PK950

21

PK950

SHIELD

R1210

2.2K

PK950

B

PK950

R1209 22K

PK950

C

Q1200

E

PK950

C1203

2.2uF

G

Q1201

AO3407A

PK950

S

D

PK950

C1204

0.01uF 50V

WIRELESS

IR_PASS

WIRELESS_SDA

WIRELESS_SCL

WIRELESS_SDA

P_17V_WIRELESS

R1212

22

READY

D

R1214

READY

Q1202

2SC3052

READY

G

READY

+5V_ST

47K

C

E

0

R1219

R1226

0

Q1205 FDV301N

S

R1215

B

READY

R12130PK950

PK950

READY

R1218

10K

D3.3V

10K

R1217

Q1203

2SC3052

READY

+5V_ST

47K

SIGN11824

READY

C

B

READY

E

SDA2_3.3V

SCL2_3.3V

SDA2_3.3V

R1216

47K

IR

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

WIRELESS_SCL

EAX63347201

ETHERNET/WIRELESS

Q1206

G

FDV301N

READY

D

S

WIRELESS I2C LEVEL SHIFTER

SCL2_3.3V

12 12

P1300

LGE Internal Use Only

12507WR-04L

5

P_+5V

L1300

1

2

3

4

MLB-201209-0120P-N2

D1300

5.5V

R1302 0

C1302 27pF 50V

READY

3D_SYNC_OUT

3D SYNC_IR EMITTER

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

EAX63347201

IR EMITTER

LVDS INPUT

LGE Internal Use Only

P101

FI-R51S-HF

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

P104

YFDW254-10S

1

R126 1K

2

3

4

5

6

C125

7

0.1uF 16V

8

9

10

R103 0

0

3V3

TD1+

TD1-

TE1+

TE1-

ASDO

TC1+

TC1-

/CSO

TE2+

TE2-

/STATUS

TB1+

TB1-

TCLK1+

TCLK1-

TD2+

TD2-

DCLK

DATA0

/CONFIG

TDI

TCK

TMS

TDO

/CE

1V2

2V5

CONFIG_DONE

C904

0.1uF 16V

TRB1-

TRB1+

TRC1-

TRC1+

TRD1-

TRD1+

TRE1-

TRE1+

1V2

TRCLK1-

TRCLK1+

MSEL[0]

MSEL[1]

MSEL[2]

MSEL[3]

C903

0.1uF 16V

2V5

C902

0.1uF 16V

IC1000

EP3C55F484C6N_SHRINK

A11

B8_IO[0]

B11

B8_IO[1]

D10

R4059

R4060 22

R704

R705

R702

R703

R700

R701

B8_IO[2]

E10

B8_IO[3]

A10

B8_IO[4]

B10

B8_IO[5]

A9

B8_IO[6]

B9

B8_IO[7]

C10

B8_IO[8]

G11

B8_IO[9]

A8

B8_IO[10]

B8

B8_IO[11]

A7

B8_IO[12]

B7

B8_IO[13]

A6

B8_IO[14]

B6

B8_IO[15]

E9

B8_IO[16]

C8

B8_IO[17]

C7

B8_IO[18]

D8

B8_IO[19]

E8

B8_IO[20]

A5

B8_IO[21]

B5

B8_IO[22]

G10

B8_IO[23]

F10

B8_IO[24]

C6

B8_IO[25]

D7

B8_IO[26]

A4

B8_IO[27]

B4

B8_IO[28]

F8

B8_IO[29]

G8

B8_IO[30]

A3

B8_IO[31]

B3

B8_IO[32]

D6

B8_IO[33]

E7

B8_IO[34]

C3

B8_IO[35]

C4

B8_IO[36]

F7

B8_IO[38]

G7

B8_IO[39]

F9

B8_IO[40]

E6

B8_IO[41]

E5

B8_IO[42]

G9

B8_IO[43]

IC1000

EP3C55F484C6N_SHRINK

F16

B7_IO[0]

E16

B7_IO[1]

F15

B7_IO[2]

G16

B7_IO[3]

G15

B7_IO[4]

F14

B7_IO[5]

C18

B7_IO[6]

D18

B7_IO[7]

D17

B7_IO[8]

C19

B7_IO[9]

D19

B7_IO[10]

A20

B7_IO[11]

B20

B7_IO[12]

C17

B7_IO[13]

B19

B7_IO[14]

A19

B7_IO[15]

A18

B7_IO[16]

B18

B7_IO[17]

D15

B7_IO[18]

E15

B7_IO[19]

G14

B7_IO[20]

G13

B7_IO[21]

A17

B7_IO[22]

B17

B7_IO[23]

A16

B7_IO[24]

B16

B7_IO[25]

C15

B7_IO[26]

E14

B7_IO[27]

F13

B7_IO[28]

A15

B7_IO[29]

B15

B7_IO[30]

C13

B7_IO[31]

D13

B7_IO[32]

E13

B7_IO[33]

A14

B7_IO[34]

B14

B7_IO[35]

A13

B7_IO[36]

B13

B7_IO[37]

E12

B7_IO[38]

E11

B7_IO[39]

F11

B7_IO[40]

A12

CLK8

B12

CLK9

C901

0.1uF 16V

R101

0

PC_SER_CLK

R102

0

PC_SER_DATA

SCL3_3.3V

R104

0

DISP_EN

R105

0

SDA3_3.3V

R106

0

R111

100

R112

100

R113

100

R114

100

R115

100

R116

100

R117

100

R118

100

R119

100

R120

100

R121

100

R122

100

R123

R124

R128

MOD_ROM_TX

R107

MOD_ROM_RX

R108

3D_SYNC_OUT

E_TDI

E_TMS RA1-

RA1+

RB1-

RB1+

RC1-

RC1+

RCLK1-

RCLK1+

RD1-

RD1+

RE1-

RE1+

E_TDO

E_TCK RA2-

RA2+

RB2-

RB2+

RC2-

RC2+

RCLK2-

RCLK2+

RD2-

RD2+

RE2-

RE2+

FPGA_D/L

L/R_DETECT

/3D_FPGA_RESET

+5V

C102

C103

C101

0.1uF

100pF

10uF

50V

16V

R125

2V5

1K

22

R127

22

R129

1K

R130

22

R131

22

<3D_SYNC_OUT>

TCK

TDO

TMS

TDI

/3D_FPGA_RESET

SDA3_3.3V

SCL3_3.3V

3D_SYNC_OUT

L/R_DETECT

SYSCLK

TP[4]

TP[5]

TP[2]

TP[3]

TP[0]

TP[1]

READY

0

R4063 22

R4061 22

R4062 22

0

R152

100

R141

100

R142

100

R143

100

R144

100

IC1000

EP3C55F484C6N_SHRINK

F6

VCCD_PLL3

F5

GNDA3

G6

VCCA3

G4

B1_IO[0]

G3

B1_IO[1]

B2

B1_IO[2]

B1

B1_IO[3]

G5

B1_IO[4]

E4

B1_IO[5]

E3

B1_IO[6]

C2

B1_IO[7]

C1

B1_IO[8]

D2

B1_IO[9]

D1

B1_IO[10]

H7

B1_IO[11]

H6

B1_IO[12]

J6

B1_IO[13]

H4

B1_IO[14]

H3

B1_IO[15]

E2

B1_IO[16]

E1

B1_IO[17]

F2

B1_IO[18]

F1

B1_IO[19]

J5

B1_IO[20]

H5

B1_IO[21]

K6

nSTATUS

J7

B1_IO[22]

K7

B1_IO[23]

J4

B1_IO[24]

H2

B1_IO[25]

H1

B1_IO[26]

J3

B1_IO[27]

J2

B1_IO[28]

J1

B1_IO[29]

K2

DCLK

K1

B1_IO[30]

K5

nCONFIG

L5

TDI

L2

TCK

L1

TMS

L4

TDO

L3

nCE

G2

CLK0

G1

CLK1

IC1000

EP3C55F484C6N_SHRINK

G22

CLK5

G21

CLK4

M18

CONF_DONE

M17

MSEL0

L18

MSEL1

L17

MSEL2

K20

MSEL3

L22

B6_IO[0]

L21

B6_IO[1]

K19

B6_IO[2]

K22

B6_IO[3]

K21

B6_IO[4]

J22

B6_IO[5]

J21

B6_IO[6]

H22

B6_IO[7]

H21

B6_IO[8]

K17

B6_IO[9]

K18

B6_IO[10]

J18

B6_IO[11]

F22

B6_IO[12]

F21

B6_IO[13]

J20

B6_IO[14]

J19

B6_IO[15]

J17

B6_IO[16]

H20

B6_IO[17]

H19

B6_IO[18]

E22

B6_IO[19]

E21

B6_IO[20]

H18

B6_IO[21]

H16

B6_IO[22]

D22

B6_IO[23]

D21

B6_IO[24]

F20

B6_IO[25]

F19

B6_IO[26]

G18

B6_IO[27]

H17

B6_IO[28]

C22

B6_IO[29]

C21

B6_IO[30]

B22

B6_IO[31]

B21

B6_IO[32]

C20

B6_IO[33]

D20

B6_IO[34]

F17

B6_IO[35]

G17

B6_IO[36]

F18

VCCA2

E18

GNDA2

E17

VCCD_PLL2

TA2+

TA2-

TCLK2+

TCLK2-

TA1+

TA1-

TC2+

TC2-

TB2+

TB2-

TC4+

TC4-

TD3+

TD3-

TE4+

TE4-

TD4+

TD4-

TE3+

TE3-

TB3+

TB3-

TCLK4+

TCLK4-

TB4+

TB4-

TA3+

TA3-

TA4+

TA4-

TCLK3+

TCLK3-

2V5

1V2

C907

0.1uF 16V

TC3+

TC3-

C905

0.1uF 16V

1V2

2V5

C906

C908

0.1uF

0.1uF 16V

16V

TRA2-

TRA2+

R145

TRB2-

TRB2+

R146

TRC2-

TRC2+

R147

TRD2-

TRD2+

R148

TRE2-

TRE2+

TRCLK2-

TRCLK2+

R149

R150

R151

TRA1-

TRA1+

100

IC1000

EP3C55F484C6N_SHRINK

T2

CLK2

T1

CLK3

L6

B2_IO[0]

M6

B2_IO[1]

M2

B2_IO[2]

M1

B2_IO[3]

M4

B2_IO[4]

M3

B2_IO[5]

N2

B2_IO[6]

N1

B2_IO[7]

M5

B2_IO[8]

P2

B2_IO[9]

P1

B2_IO[10]

R2

B2_IO[11]

R1

B2_IO[12]

N5

B2_IO[13]

P4

B2_IO[14]

P3

B2_IO[15]

U2

B2_IO[16]

U1

B2_IO[17]

V2

B2_IO[18]

V1

B2_IO[19]

P5

B2_IO[20]

N6

B2_IO[21]

R4

B2_IO[22]

R3

B2_IO[23]

W2

B2_IO[24]

W1

B2_IO[25]

Y2

B2_IO[26]

Y1

B2_IO[27]

T3

B2_IO[28]

N7

B2_IO[29]

P7

B2_IO[30]

AA2

B2_IO[31]

AA1

B2_IO[32]

V4

B2_IO[33]

V3

B2_IO[34]

P6

B2_IO[35]

R5

B2_IO[36]

T4

B2_IO[37]

T5

B2_IO[38]

R6

B2_IO[39]

T6

VCCA1

U5

GNDA1

U6

VCCD_PLL1

IC1000

EP3C55F484C6N_SHRINK

V17

VCCD_PLL4

V18

GNDA4

U18

VCCA4

AA22

B5_IO[0]

AA21

B5_IO[1]

T17

B5_IO[2]

T18

B5_IO[3]

W20

B5_IO[4]

W19

B5_IO[5]

Y22

B5_IO[6]

Y21

B5_IO[7]

U20

B5_IO[8]

U19

B5_IO[9]

W22

B5_IO[10]

W21

B5_IO[11]

T20

B5_IO[12]

T19

B5_IO[13]

R17

B5_IO[14]

P17

B5_IO[15]

V22

B5_IO[16]

V21

B5_IO[17]

R20

B5_IO[18]

U22

B5_IO[19]

U21

B5_IO[20]

R18

B5_IO[21]

R19

B5_IO[22]

N16

B5_IO[23]

R22

B5_IO[24]

R21

B5_IO[25]

P20

B5_IO[26]

P22

B5_IO[27]

P21

B5_IO[28]

N20

B5_IO[29]

N19

B5_IO[30]

N17

B5_IO[31]

N18

B5_IO[32]

N22

B5_IO[33]

N21

B5_IO[34]

M22

B5_IO[35]

M21

B5_IO[36]

M20

B5_IO[37]

M19

B5_IO[38]

M16

B5_IO[39]

T22

CLK7

T21

CLK6

FPGA_D/L

R944

10K

TRISTATE/OPEN

CONFIG_DONE

/STATUS

/CONFIG

/CE

FPGA DOWNLOAD CONTROL

3V3

R187

E_TCK

E_TDO

E_TMS

X901

54.0000MHz VDD

4

1

GND3OUTPUT

2

R950 10K

R951 10K

R952 10K

R953 1K

OPT

10K

R178

10K

R157

0

E_TDI

MSEL[3]

R949 22

C909

0.1uF 16V

2V5

R179

B

R162

0

R167

0

R172

0

SYSCLK

2V5

L151

BLM18PG121SN1D

OPT

3V3

L902

BLM18PG121SN1D

C917

C919

0.1uF 16V

IC904

EPCS16SI8N_

1

2

3

4

4.7K R186

22

C

Q157 2SC3052

E

C920 100pF 50V

VCC_2

8

VCC_1

7

DCLK

6

ASDI

5

/CE

SDA3_3.3V

10uF 16V

R153

B

2K

S

2V5

Q152

2V5

Q153

D

FDV301N

2V5

R159

G

2V5

G

Q154

/CSO

DATA0

4.7K R182 22

C

Q156 2SC3052

E

4.7K

R1642KR165

S

R169

2K

S

R174

2K

S

0

R964 22

R965 27

R154 0

R183

0

/CONFIG

R160

R161

22

4.7K

R166

22

R170

4.7K

R171

22

R175

4.7K

R176

22

10K

R184

NCS

DATA

VCC

GND

2V5

R185

B

TCK_FLASH

TDO_FLASH

TMS_FLASH

TDI_FLASH

TMS_FLASH

TDI_FLASH

3V3

R181

10K

R180

10K

C

Q155 2SC3052

E

2V5

3V3

R158

5.6K

OPT

G

D

FDV301N

Q151

3V3

R163

5.6K

OPT

D

FDV301N

3V3

R168

5.6K

OPT

D

FDV301N

3V3

R173

5.6K

OPT

MSEL[2] MSEL[1] MSEL[0]

R155 0

R967 22

R968 22

C921

R156

10pF

0

3V3

R848

R846

R847

4.7K

0

SCL3_3.3V

G

D

S

Q800

2N7002(F)

2V5

OPT

R982

0

R988

0

R984

0

R986

22

R9830R9850R989

TCK_FLASH

TDO_FLASH

0

OPT

R987

0

AR90 1

1/16 W

DCLK

ASDO

LVDS OUTPUT

3V3

R851

R8500R849

4.7K

G

PC_SER_CLK

PC_SER_DATA

D

S

DISP_EN

Q801

2N7002(F)

MOD_ROM_TX MOD_ROM_RX

3D_SYNC_OUT

TCLK3TCLK3+

TCLK4TCLK4+

TCLK1TCLK1+

TCLK2TCLK2+

81

80 79 78 77 76 75 74 73 72 71

TA3TA3+ TB3TB3+ TC3TC3+

TD3TD3+ TE3TE3+

TA4TA4+ TB4TB4+ TC4TC4+

TD4TD4+ TE4TE4+

TA1TA1+ TB1TB1+ TC1TC1+

TD1TD1+ TE1TE1+

TA2TA2+ TB2TB2+ TC2TC2+

TD2TD2+ TE2TE2+

70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

104060-8017

P2001

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

3DTV 2010. 02. 11

3DF_INPUT/OUTPUT 1 3

DDR_A[12-0]

LGE Internal Use Only

DDR2_CLK

/DDR2_CLK

100

C1028

0.1uF 16V

DDR_A[0] DDR_A[1] DDR_A[2] DDR_A[3] DDR_A[4] DDR_A[5] DDR_A[6]

DDR_A[12-0]

DDR_A[7] DDR_A[8] DDR_A[9] DDR_A[10] DDR_A[11] DDR_A[12]

R1007 33

R1008 33

DDR_VREF1

C1031 470pF 50V

R1009 1K

R1010 1K

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

IC1002

DDR_VREF0

C1004

C1006

0.1uF

470pF

16V

50V

DDR_A[0] DDR_DQ[19] DDR_A[1] DDR_A[2] DDR_A[3] DDR_A[4] DDR_A[5] DDR_A[6]

DDR_A[12-0]

DDR_A[7] DDR_A[8] DDR_A[9] DDR_A[10] DDR_A[11] DDR_A[12]

DDR_BA[0] DDR_BA[1]

R1001

100

DDR2_CKE

DDR2_ODT /DDR_CS /DDR_RAS /DDR_CAS /DDR_WE

DDR_LDQS[0] DDR_UDQS[0]

DDR_LDM[0] DDR_UDM[0]

R1002 33

R1003 33

R1004 1K

R1005 1K

H5PS5162FFR-S6C

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

CK

J8

CK

K8

CKE

K2

ODT

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

LDM

F3

UDM

B3

LDQS

E8

UDQS

A8

NC4

L1

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

IC1001

SDDR_DQ[15-0]

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

A1 E1 J9 M9 R1

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A3 E3 J3 N1 P9

B2 B8 A7 D2 D8 E7 F2 F8 H2 H8

DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

VDD5 VDD4 VDD3 VDD2 VDD1

VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

VSS5 VSS4 VSS3 VSS2 VSS1

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1

DDR_DQ[1] DDR_DQ[2] DDR_DQ[3] DDR_DQ[4] DDR_DQ[5] DDR_DQ[6] DDR_DQ[7] DDR_DQ[8]

DDR_DQ[9] DDR_DQ[10] DDR_DQ[11] DDR_DQ[12] DDR_DQ[13] DDR_DQ[14] DDR_DQ[15]

1V8

DDR_DQ[15-0]

1V8

C1019 100pF

50V

DDR_DQ[5] DDR_DQ[2] DDR_DQ[0] DDR_DQ[7]

DDR_DQ[13] DDR_DQ[10] DDR_DQ[8] DDR_DQ[15]

DDR_DQ[14] DDR_DQ[9] DDR_DQ[12] DDR_DQ[11]

DDR_DQ[6] DDR_DQ[1] DDR_DQ[3] DDR_DQ[4]

AR1001

SDDR_DQ[5] SDDR_DQ[2] SDDR_DQ[0] SDDR_DQ[7]

33

AR1002

SDDR_DQ[13] SDDR_DQ[10]

SDDR_DQ[8]

SDDR_DQ[15]

33

AR1003

SDDR_DQ[14]

SDDR_DQ[9] SDDR_DQ[12] SDDR_DQ[11]

33

AR1004

SDDR_DQ[6]

SDDR_DQ[1]

SDDR_DQ[3]

SDDR_DQ[4]

33

DDR_DQ[0]

DQ0

DDR_A[12-0]

DDR2_CLK

/DDR2_CLK

DDR_BA[0] DDR_BA[1]

DDR2_CKE

DDR2_ODT /DDR_CS /DDR_RAS /DDR_CAS /DDR_WE

DDR_LDQS[1] DDR_UDQS[1]

DDR_LDM[1] DDR_UDM[1]

R1006

1V2

DDR_DQ[16]

DQ0

G8

DDR_DQ[17]

DQ1

G2

DDR_DQ[18]

DQ2

H7

DQ3

H3

DDR_DQ[20]

DQ4

H1

DDR_DQ[21]

DQ5

H9

DDR_DQ[22]

DQ6

F1

DDR_DQ[23]

DQ7

F9

DDR_DQ[24]

DQ8

C8

DDR_DQ[25]

DQ9

C2

DDR_DQ[26]

DQ10

D7

DQ11

D3

DQ12

D1

DQ13

D9

DQ14

B1

DQ15

B9

VDD5

A1

VDD4

E1

VDD3

J9

VDD2

M9

VDD1

R1

VDDQ10

A9

VDDQ9

C1

VDDQ8

C3

VDDQ7

C7

VDDQ6

C9

VDDQ5

E9

VDDQ4

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

G9

VSS5

A3

VSS4

E3

VSS3

J3

VSS2

N1

VSS1

P9

VSSQ10

B2

VSSQ9

B8

VSSQ8

A7

VSSQ7

D2

VSSQ6

D8

VSSQ5

E7

VSSQ4

F2

VSSQ3

F8

VSSQ2

H2

VSSQ1

H8

DDR_DQ[27] DDR_DQ[28] DDR_DQ[29] DDR_DQ[30] DDR_DQ[31]

1V8

DDR_DQ[31-16]

1V8

C1042 100pF

50V

DDR_DQ[21] DDR_DQ[18] DDR_DQ[16] DDR_DQ[23]

DDR_DQ[29] DDR_DQ[26] DDR_DQ[24] DDR_DQ[31]

DDR_DQ[30] DDR_DQ[25] DDR_DQ[28] DDR_DQ[27]

DDR_DQ[22] DDR_DQ[17] DDR_DQ[19] DDR_DQ[20]

AR1005

SDDR_DQ[21] SDDR_DQ[18] SDDR_DQ[16] SDDR_DQ[23]

33

AR1006

SDDR_DQ[29] SDDR_DQ[26] SDDR_DQ[24] SDDR_DQ[31]

33

AR1007

SDDR_DQ[30] SDDR_DQ[25] SDDR_DQ[28] SDDR_DQ[27]

33

AR1008

SDDR_DQ[22] SDDR_DQ[17] SDDR_DQ[19] SDDR_DQ[20]

33

SDDR_DQ[31-16]

C1047 10uF 16V

C1050

0.1uF 16V

C1053 100pF 50V

IC1000

EP3C55F484C6N_SHRINK

J11

VCCINT[0]

J12

VCCINT[1]

L14

VCCINT[2]

M14

VCCINT[3]

P11

VCCINT[4]

P12

VCCINT[5]

L9

VCCINT[6]

M9

VCCINT[7]

J13

VCCINT[8]

J14

VCCINT[9]

K14

VCCINT[10]

J10

VCCINT[11]

K9

VCCINT[12]

N9

VCCINT[13]

P9

VCCINT[14]

P10

VCCINT[15]

P13

VCCINT[16]

P14

VCCINT[17]

N14

VCCINT[18]

J16

VCCINT[19]

K15

VCCINT[20]

L16

VCCINT[21]

M15

VCCINT[22]

R12

VCCINT[23]

R10

VCCINT[24]

R8

VCCINT[25]

H9

VCCINT[26]

G12

VCCINT[27]

J8

VCCINT[28]

M8

VCCINT[29]

T7

VCCINT[30]

T9

VCCINT[31]

T13

VCCINT[32]

P15

VCCINT[33]

H15

VCCINT[34]

H11

VCCINT[35]

K8

VCCINT[36]

L7

VCCINT[37]

VCCIO1[0]

VCCIO1[1]

VCCIO1[2]

VCCIO2[0]

VCCIO2[1]

VCCIO2[2]

VCCIO3[0]

VCCIO3[1]

VCCIO3[2]

VCCIO3[3]

VCCIO4[0]

VCCIO4[1]

VCCIO4[2]

VCCIO4[3]

VCCIO5[0]

VCCIO5[1]

VCCIO5[2]

VCCIO6[0]

VCCIO6[1]

VCCIO6[2]

VCCIO7[0]

VCCIO7[1]

VCCIO7[2]

VCCIO7[3]

VCCIO8[0]

VCCIO8[1]

VCCIO8[2]

VCCIO8[3]

2V5

D4

F4

C1066

C1068

C1070

100pF

0.1uF

C1067 100pF

10uF

50V

16V

1V8

C1069

C1071

0.1uF

10uF

50V

16V

2V5

3V3

K4

N4

U4

W4

AB2

W5

W9

W11

AB21

W12

W16

W18

P18

V19

Y19

E19

G19

L19

A21

D12

D14

D16

A2

D5

D9

D11

IC1000

EP3C55F484C6N_SHRINK

L10

GND[0]

L11

GND[1]

M10

GND[2]

M11

GND[3]

L12

GND[4]

L13

GND[5]

M12

GND[6]

M13

GND[7]

N11

GND[8]

K11

GND[9]

N12

GND[10]

K12

GND[11]

K13

GND[12]

N13

GND[13]

N10

GND[14]

K10

GND[15]

J9

GND[16]

F12

GND[17]

H12

GND[18]

H13

GND[19]

J15

GND[20]

K16

GND[21]

L15

GND[22]

N15

GND[23]

R13

GND[24]

R11

GND[25]

R9

GND[26]

P8

GND[27]

H14

GND[28]

H10

GND[29]

H8

GND[30]

N8

GND[31]

R7

GND[32]

T8

GND[33]

T12

GND[34]

P16

GND[35]

L8

GND[36]

M7

GND[37]

A1

GND[38]

C5

GND[39]

C9

GND[40]

C11

GND[41]

GND[42]

GND[43]

GND[44]

GND[45]

GND[46]

GND[47]

GND[48]

GND[49]

GND[50]

GND[51]

GND[52]

GND[53]

GND[54]

GND[55]

GND[56]

GND[57]

GND[58]

GND[59]

GND[60]

GND[61]

GND[62]

GND[63]

GND[64]

GND[65]

C12

C14

C16

A22

E20

G20

L20

P19

V20

Y20

AB22

Y18

Y16

Y12

Y11

Y9

Y5

AB1

N3

U3

W3

D3

F3

K3

1V8

C1001 10uF 16V

SDDR_DQ[15-0]

C1002

0.1uF 16V

C1003

0.1uF 16V

C1005

0.1uF 16V

SDDR_DQ[14]

SDDR_DQ[9]

SDDR_DQ[8]

SDDR_DQ[15]

SDDR_DQ[12]

SDDR_DQ[13]

SDDR_DQ[10]

SDDR_DQ[11]

SDDR_DQ[4]

SDDR_DQ[1]

SDDR_DQ[3]

SDDR_DQ[6]

SDDR_DQ[7]

SDDR_DQ[2]

SDDR_DQ[0]

SDDR_DQ[5]

C1007

0.1uF 16V

C1008

0.1uF 16V

DDR_UDQS[0]

/DDR_CAS

DDR_A[11]

DDR_LDM[0]

DDR_LDQS[0]

DDR_A[1]

DDR_A[9]

/DDR_RAS

DDR_A[0]

DDR_A[2]

DDR2_ODT

/DDR_CS

DDR_A[4]

DDR2_CLK

/DDR2_CLK

DDR_A[8]

DDR_A[6]

DDR_A[5]

C1009

0.1uF 16V

C1010

0.1uF 16V

C1011 470pF 50V

C1012

0.1uF 16V

DDR_VREF0

C1014

C1013

0.1uF

0.1uF 16V

16V

EP3C55F484C6N_SHRINK

AA12

AB12

AA13

AB13

AA14

AB14

V12

W13

Y13

AA15

AB15

U12

Y14

Y15

AA16

AB16

V13

W14

U13

V14

U14

U15

V15

W15

T14

T15

AB18

AA17

AB17

AA18

AA19

AB19

W17

Y17

AA20

AB20

V16

U16

U17

T16

R16

R14

R15

IC1000

CLK13

CLK12

B4_IO[0]

B4_IO[1]

B4_IO[2]

B4_IO[3]

B4_IO[4]

B4_IO[5]

B4_IO[6]

B4_IO[7]

B4_IO[8]

B4_IO[9]

B4_IO[10]

B4_IO[11]

B4_IO[12]

B4_IO[13]

B4_IO[14]

B4_IO[15]

B4_IO[16]

B4_IO[17]

B4_IO[18]

B4_IO[19]

B4_IO[20]

B4_IO[21]

B4_IO[22]

B4_IO[23]

B4_IO[24]

B4_IO[25]

B4_IO[26]

B4_IO[27]

B4_IO[28]

B4_IO[29]

B4_IO[30]

B4_IO[31]

B4_IO[32]

B4_IO[33]

B4_IO[34]

B4_IO[35]

B4_IO[36]

B4_IO[37]

B4_IO[38]

B4_IO[39]

B4_IO[40]

C1015

0.1uF 16V

C1016

0.1uF 16V

C1017

0.1uF 16V

C1018

0.1uF 16V

C1020

0.1uF 16V

C1021

0.1uF 16V

C1022

0.1uF 16V

C1023

0.1uF 16V

SDDR_DQ[31-16]

DDR_VTT

1V8

C1034

C1024

0.1uF 16V

C1025

0.1uF 16V

SDDR_DQ[20]

SDDR_DQ[22]

SDDR_DQ[19]

SDDR_DQ[17]

SDDR_DQ[21]

SDDR_DQ[18]

SDDR_DQ[23]

SDDR_DQ[16]

SDDR_DQ[27]

SDDR_DQ[25]

SDDR_DQ[26]

SDDR_DQ[30]

SDDR_DQ[28]

SDDR_DQ[31]

SDDR_DQ[29]

SDDR_DQ[24]

C1026

0.1uF 16V

C1027

0.1uF 16V

DDR_LDM[1]

/DDR_WE

DDR_BA[0]

DDR2_CKE

DDR_BA[1]

DDR_A[10]

DDR_A[3]

DDR_UDM[1]

DDR_LDQS[1]

DDR_UDQS[1]

DDR_A[12]

DDR_UDM[0]

DDR_A[7]

C1029

0.1uF 16V

C1030 470pF 50V

C1032

0.1uF 16V

C1033

0.1uF 16V

DDR_VREF1

C1035

0.1uF

16V

EP3C55F484C6N_SHRINK

V6

B3_IO[0]

V5

B3_IO[1]

U7

B3_IO[2]

U8

B3_IO[3]

Y4

B3_IO[4]

Y3

B3_IO[5]

Y6

B3_IO[6]

AA3

B3_IO[7]

AB3

B3_IO[8]

W6

B3_IO[9]

V7

B3_IO[10]

AA4

B3_IO[11]

AB4

B3_IO[12]

AA5

B3_IO[13]

AA6

B3_IO[14]

AB6

B3_IO[15]

AB5

B3_IO[16]

W7

B3_IO[17]

Y7

B3_IO[18]

U9

B3_IO[19]

V8

B3_IO[20]

W8

B3_IO[21]

AA7

B3_IO[22]

AB7

B3_IO[23]

Y8

B3_IO[24]

T10

B3_IO[25]

T11

B3_IO[26]

V9

B3_IO[27]

V10

B3_IO[28]

U10

B3_IO[29]

AA8

B3_IO[30]

AB8

B3_IO[31]

AA9

B3_IO[32]

AB9

B3_IO[33]

U11

B3_IO[34]

V11

B3_IO[35]

W10

B3_IO[36]

Y10

B3_IO[37]

AA10

B3_IO[38]

AB10

B3_IO[39]

AA11

CLK15

AB11

CLK14

IC1000

C1036

0.1uF 16V

C1037

0.1uF 16V

C1038

0.1uF 16V

C1039

0.1uF 16V

C1040

0.1uF 16V

C1041

0.1uF 16V

C1043

0.1uF 16V

C1044

0.1uF 16V

DDR_VTT

C1045

0.1uF 16V

C1046

0.1uF 16V

DDR2_ODT

/DDR_CS DDR_A[0] DDR_A[2]

DDR_A[4] DDR_A[6] DDR_A[8] DDR_A[11]

/DDR_CAS

/DDR_RAS DDR_A[1] DDR_A[5]

DDR_A[9] DDR_A[12] DDR_A[7] DDR_A[3]

DDR_BA[0] DDR_BA[1] DDR2_CKE

/DDR_WE

DDR_A[10]

C1048

0.1uF 16V

C1049

0.1uF 16V

C1051

0.1uF 16V

C1052

0.1uF 16V

C1054

0.1uF 16V

C1055

0.1uF 16V

AR1009

AR1010

AR1011

AR1012

AR1013

R1011 56

C1056

0.1uF 16V

C1057

0.1uF 16V

DDR2_ODT

/DDR_CS DDR_A[0]

56

AR10 14

56

AR10 15

56

56 AR10 16

56

56 AR10 17

56

56 AR10 18

R1012

C1058

C1060

0.1uF

16V

C1061

C1059

0.1uF

0.1uF 16V

16V

DDR_A[2]

DDR_A[4] DDR_A[6] DDR_A[8]

DDR_A[11]

/DDR_CAS /DDR_RAS

DDR_A[1] DDR_A[5]

DDR_A[9]

DDR_A[12]

DDR_A[7] DDR_A[3]

DDR_BA[0] DDR_BA[1]

DDR2_CKE /DDR_WE

56

DDR_A[10]

C1065

C1062

C1064

0.1uF

0.1uF 16V

16V

C1063

0.1uF 16V

1V2

C1072

C1077

0.1uF

16V

1V2

C1078

C1073

0.1uF

0.1uF 16V

16V

2V5

C1074

C1079

0.1uF

16V

3V3

C1075

C1080

0.1uF

16V

1V8

C1076

C1081

0.1uF

16V

C1082

0.1uF 16V

C1083

0.1uF 16V

C1084

0.1uF 16V

C1085

0.1uF 16V

C1086

0.1uF 16V

C1087

0.1uF 16V

C1088

0.1uF 16V

C1089

0.1uF 16V

C1090

0.1uF 16V

C1091

0.1uF 16V

C1092

0.1uF 16V

C1093

0.1uF 16V

C1094

0.1uF 16V

C1095

0.1uF 16V

C1096

0.1uF 16V

C1097

0.1uF 16V

C1098

0.1uF 16V

C1099

0.1uF 16V

C2000

0.1uF 16V

C2001

0.1uF 16V

C2002

0.1uF 16V

C2003

0.1uF 16V

C2006

0.1uF 16V

C2004

0.1uF 16V

C2005

0.1uF 16V

C2007

0.1uF 16V

C2008

0.1uF 16V

C2009

0.1uF 16V

C2019

0.1uF 16V

C2011

0.1uF 16V

C2012

0.1uF 16V

C2013

0.1uF 16V

C2014

0.1uF 16V

C2016

0.1uF 16V

C2017

0.1uF 16V

C2010

0.1uF 16V

C2015

0.1uF 16V

C2018

0.1uF 16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

3DTV

3DF_DDR2

2010. 02. 11

2 3