LG 32LN520B-UM, 32LN5300-UB, 32LN530B-UA, 32LN530B-UB, 32LN536B-UA Service manual & schematics
...Page 1
LED TV
SERVICE MANUAL
CHASSIS : LA32B
MODEL : 32LN5300 32LN5300-UB
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
Printed in KoreaP/NO : MFL67647401 (1212-REV00)
Page 2
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 9
TROUBLE SHOOTING ............................................................................ 16
BLOCK DIAGRAM .................................................................................. 22
EXPLODED VIEW .................................................................................. 24
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
- 2 -
Page 3
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of th e circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exp ose d metallic par t. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Only for training and service purposes
- 3 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 4
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board mod-
ule or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specied otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a ammable mixture.
Unless specied otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test xtures specied in this
service manual.
CAUTION: Do not connect the test xture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some eld-effect transistors
and semiconductor “chip” components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test.
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classied as “anti-static” can generate
electrical charges sufcient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufcient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted oor can generate static electricity sufcient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suction-
type solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder ows onto and around both the component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
Only for training and service purposes
- 4 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 5
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent at against the circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
Only for training and service purposes
- 5 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 6
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
1. Application range
This spec sheet is applied LED TV with LA32Bchassis
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC±5 ºC
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
Market Input voltage Frequency Remark
USA 110~240V 50/60Hz Standard Voltage of each
product is marked by
models
4) Specification and performance of each parts are followed
ea ch drawing and s pe cificatio n b y p art number in
accordance with BOM
5) The receiver must be operated for about 20 minutes prior to
the adjustment
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC: FCC, ICES, IEC specification
4. General Specification
No Item Specication Result Remark
1. Receiving System 1) ATSC / NTSC-M / 64 QAM / 256 QAM
2. Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3. Input Voltage AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz (N.America)
4. Market NORTH AMERICA
5. Screen Size 32/39/42/47/50/55inch Wide
(1920 × 1080)
32/37inch Wide (1366 × 768) 37LN530B-UA
6. Aspect Ratio 16:9
7. Tuning System FS
55LN5400-UA
50LN5400-UA
47LN5400-UA
42LN5400-UA
42LN5300-UB
39LN5300-UB
32LN5300-UB
55LN5200-UA
47LN5200-UA
42LN5200-UA
32LN530B-UA
32LN520B-UA
Only for training and service purposes
- 6 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 7
No Item Specication Result Remark
8. Module POLA LC550DUK-SEE1 LGD 55LN5400-UA
Direct LC500DUE-SFR1 LGD 50LN5400-UA
Direct LC470DUE-SFR1 LGD 47LN5400-UA
Direct LC420DUE-SFR1 LGD 42LN5400-UA
Direct LC420DUE-SFR1 LGD 42LN5300-UB
POLA TBD AUO 42LN5300-UB
POLA HC420DUN-SLFP1 LGD 42LN5300-UB
POLA HC390DUN-VCFP1 CMI 39LN5300-UB
POLA TBD AUO 39LN5300-UB
POLA HC320DXN-VSFP1 CSOT 32LN5300-UB
Direct LC320DUE-SFR1 LGD 32LN5300-UB
Direct LC370DXE-SFR1 LGD 37LN530B-UA
Direct LC320DXE-SFR1 LGD 32LN530B-UA
POLA HC320DXN-SLFP1 LGD 32LN530B-UA
Direct i-D LGD 55LN5200-UA
Direct i-D LGD 47LN5200-UA
Direct i-D LGD 42LN5200-UA
Direct i-D LGD 32LN520B-UA
9. Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
Only for training and service purposes
- 7 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 8
5. Supported video resolutions
5.1. Component input(Y, CB/PB, CR/PR)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1. 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
3. 720*480 31.50 60.00 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.00 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 33.75 60.00 74.25 HDTV 1080I
8. 1920*1080 33.72 59.94 74.176 HDTV 1080I
9. 1920*1080 67.50 60.00 148.50 HDTV 1080P
10. 1920*1080 67.432 59.94 148.352 HDTV 1080P
11. 1920*1080 27.00 24.00 74.25 HDTV 1080P
12. 1920*1080 26.97 23.94 74.176 HDTV 1080P
13. 1920*1080 33.75 30.00 74.25 HDTV 1080P
14. 1920*1080 33.71 29.97 74.176 HDTV 1080P
5.2. HDMI Input (DTV)
No Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
DTV
1. 720*480 31.47 60.00 27.027 SDTV 480P
2. 720*480 31.47 59.94 27.00 SDTV 480P
3. 1280*720 45.00 60.00 74.25 HDTV 720P
4. 1280*720 44.96 59.94 74.176 HDTV 720P
5. 1920*1080 33.75 60.00 74.25 HDTV 1080I
6. 1920*1080 33.72 59.94 74.176 HDTV 1080I
7. 1920*1080 67.50 60.00 148.50 HDTV 1080P
8. 1920*1080 67.432 59.94 148.352 HDTV 1080P
9. 1920*1080 27.00 24.00 74.25 HDTV 1080P
10. 1920*1080 26.97 23.976 74.176 HDTV 1080P
11. 1920*1080 33.75 30.00 74.25 HDTV 1080P
12. 1920*1080 33.71 29.97 74.176 HDTV 1080P
Only for training and service purposes
- 8 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 9
ADJUSTMENT INSTRUCTION
1. Application
This spec. sheet applies to LA32B Chassis applied LED TV all
models manufactured in TV factory
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ±5 ºC of temperature and 65±10% of relative humidity if
there is no specific designation
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz
(5) At first Worker must turn on the SET by using Power Only
key.
(6) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15
ºC
In case of keeping module is in the circumstance of 0°C, it
should be placed in the circumstance of above 15°C for 2
hours
In case of keeping module is in the circumstance of below
-20°C, it should be placed in the circumstance of above
15°C for 3 hours.
※ Caution
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong.
Digital pattern 13ch and/or Cross hatch pattern 09ch), there
can some afterimage in the black level area
3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment : ADC adjustment is OTP (Auto ADC)
(2) EDID download : HDMI
4. MAIN PCBA Adjustments
* Download
(1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
(2) Set as below, and then click “Auto Detect” and check “OK”
message
If display “Error”, Check connect computer, jig, and set.
(3) Click “Connect” tab. If display “Can’t ”, Check connect
computer, jig, and set.
(3)
(1)
(2)
(4) Click “Read” tab, and then load download file(XXXX.bin) by
clicking “Read”
OK
Please Check the Speed :
To use speed between from 200KHz to 400KHz
(4)
filexxx.bin
■ Above adjustment items can be also performed in Final
Assembly if needed.
Both Board-level and Final assembly adjustment items can
be check using In-Start Menu (1.Adjust Check).
3.2. Final assembly adjustment
(1) White Balance adjustment
(2) RS-232C functionality check
(3) Factory Option setting per destination
(4) Shipment mode setting (In-Stop)
(5) GND and HI-POT test
3.3. Appendix
(1) Shipment conditions
(2) Tool option menu
(3) USB Download (S/W Update, Option and Service only)
(4) Preset CH Information
Only for training and service purposes
(5) Click “Auto” tab and set as below.
(6) Click “Run”.
(7) After downloading, check “OK” message.
(5)
(6)
- 9 -
(7) ……….OK
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 10
4.1. ADC Adjustment
4.1.1. Overview
▪ ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate RGB
deviation.
▪ ADC adjustment is OTP (Auto ADC)
4.2.5. EDID DATA
4.2.5.1. North America (PCM)
4.2.5.1.1. FHD Model
■ HDMI 1-FHD-8BIT (C/S : E808)
EDID Block 0, Bytes 0-127 [00H-7FH]
4.2. EDID Download
4.2.1. Overview
▪ It is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of “Plug and Play”.
4.2.2. Equipment
(1) Since EDID data is embedded, EDID download JIG, HDMI
cable is not need.
(2) Adjust by using remote controller
4.2.3. Download method (using DFT)
※ PC(for communication through RS-232C), UART baud rate:
115200 bps
Command : aa 00 00 (Start Factory mode)
Command : ae 00 10 (Download All EDID)
Command : aa 00 90 (End of Factory mode)
4.2.4. Download method (using Service Remocon)
(1) Press Adj. key on the Adj. R/C.
(2) Select EDID D/L menu.
(3) By pressing Enter key, EDID download will begin
(4) If Download is successful, OK is display, but If Download is
failure, NG is displayed.
(5) If Download is failure, Re-try downloads.
※Caution : Wh en EDID Download, must remove HDMI
Cable.
(6) EDID Write confirmation
EDID D/L (PCM)
HDMI1 : OK
HDMI2 : OK
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08
■ HDMI 2-FHD-8BIT (C/S : E8F8)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
Only for training and service purposes
- 10 -
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 02 03 19 F1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 11
4.2.5.1.2. HD Model
■ HDMI 1-HD (C/S : 7008)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57
10 | 07 67 03 0C 00 10 00 80 1E 02 3A 80 18 71 38 2D
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08
■ HDMI 2-HD (C/S : 70F8)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 02 03 19 F1 48 10 22 20 05 84 03 02 01 23 09 57
10 | 07 67 03 0C 00 20 00 80 1E 02 3A 80 18 71 38 2D
20 | 40 58 2C 04 05 40 84 63 00 00 1E 01 1D 80 18 71
30 | 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00
40 | 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 8C
50 | 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84 63 00 00
60 | 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F8
4.2.5.2. AC3 EDID Data
4.2.5.2.1. FHD Model
■ HDMI 1-FHD-8BIT (C/S : E896)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96
■ HDMI 2-FHD-8BIT (C/S : E886)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 02 03 1C F1 48 90 22 20 05 04 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86
Only for training and service purposes
- 11 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 12
4.2.5.2.2. HD Model
■ HDMI 1-HD (C/S : 7096)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70
EDID Block 1, Bytes 128-255 [80H-FFH]
5. Final Assembly Adjustment
5.1. White Balance Adjustment
5.1.1. Overview
5.1.1.1. W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel’s W/B deviation
(2) How-it-works: When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.
(3) Adj. condition: normal temperature
- Surrounding Temperature: 25±5 ºC
- Warm-up time: About 5 Min
- Surrounding Humidity: 20% ~ 80%
- Before White balance adjustment, Keep power on status,
don’t power off
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 10 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 96
■ HDMI 2-HD (C/S : 7086)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 | 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
40 | 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
50 | 18 88 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 70
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------- 0 | 02 03 1C F1 48 10 22 20 05 84 03 02 01 26 15 07
10 | 50 09 57 07 67 03 0C 00 20 00 80 1E 02 3A 80 18
20 | 71 38 2D 40 58 2C 04 05 40 84 63 00 00 1E 01 1D
30 | 80 18 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E
40 | 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00
50 | 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 40 84
60 | 63 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 86
5.1.1.2. Adj. condition and cautionary items
(1) Lighting condition in surrounding area surrounding lighting
should be lower 10 lux. Try to isolate adj. area into dark
surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface
(80°~ 100°)
(3) Aging time
- After Aging Start, Keep the Power ON sta tus during 5
Minutes.
- In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.
5.1.2. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
CH14)
(2) Adj. Computer(D uring auto adj., RS-232C protocol is
needed)
(3) Adjust Remocon
(4) Vi deo Signal Generat or MS PG-925F 720p/ 204-Gray
(Model:217, Pattern:49)
→ Only when internal pattern is not available
※ Color Anal yzer Ma trix sh ould be calibrate d using
CS-1000
4.3. Tool Option Input
- Input Model Tool Option according to BOM
Only for training and service purposes
- 12 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 13
5.1.3. Equipment connection
Color Analyzer
Probe
RS-232C
※
Signal Source
※If TV internal pattern is used, not needed
Computer
Pattern Generator
5.1.4. Adjustment Command (Protocol)
(1) RS-232C Command used during auto-adj
RS-232C COMMAND
CMD DATA ID
Wb 00 00 Begin White Balance adj.
Wb 00 ff End White Balance adj.
(internal pattern disappears )
(2) Adjustment Map
Command
Adj. item
Cool R Gain j g 00 C0 172
G Gain j h 00 C0 172
B Gain j i 00 C0 192
R Cut 128
G Cut 128
B Cut 128
Medium R Gain j a 00 C0 192
G Gain j b 00 C0 192
B Gain j c 00 C0 192
R Cut 128
G Cut 128
B Cut 128
Warm R Gain j d 00 C0 192
G Gain j e 00 C0 192
B Gain j f 00 C0 172
R Cut 128
G Cut 128
B Cut 128
(lower case ASCII)
CMD1 CMD2 MIN MAX
Explanation
Data Range
(Hex.)
RS-232C
RS-232C
Default
(Decimal)
5.1.5. Adjustment method
5.1.5.1. Auto WB calibration
(1) Set TV in ADJ mode using P-ONLY key (or POWER ON
key)
(2) Place optical probe on the center of the display
- It need to check probe condition of zero calibration before
adjustment.
(3) Connect RS-232C Cable
(4) Select mode in ADJ Program and begin a adjustment.
(5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode (Cool, Medium,
Warm)
(6) Remove probe and RS-232C cable.
※ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
5.1.5.2. Manual adj. method
(1) Set TV in Adj. mode using POWER ON
(2) Zero Calibrate the probe of Color Analyzer, then place it on
the center of LCD module within 10cm of the surface..
(3) Press ADJ key -> EZ adjust using adj. R/C -> 6. White-
Balance then press the cursor to the right (KEY►).
(When KEY(►) is pressed 204 Gray(80IRE) internal
pattern will be displayed)
(4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
color temperature.
※ CASE
First adjust the coordinate far away from the target value(x, y).
(1) x, y > target
i) Decrease the R, G.
(2) x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.
(3) x >target , y < target
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R
(4) x < target , y > target
i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G
► How to adjust
(1) Fix G gain at least 172
Adjust R, B Gain (In Case of Mostly Blue Gain Saturation)
(2) When R or B Gain > 255, Release Fixed G Gain and
Readjust
※ CASE Medium / Warm
First adjust the coordinate far away from the target value(x, y).
(1) x, y > target
i) Decrease the R, G.
(2) x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.
(3) x > target , y < target
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R
(4) x < target , y > target
i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G
Only for training and service purposes
- 13 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 14
5.1.6. Reference
(White Balance Adj. coordinate and color
temperature)
▪ Luminance: 204 Gray, 80IRE
▪ Normal line
model: (normal line)LN5xxx, LA6xxx, LA7xxx, LA8xxx
Cool Medium Warm
H/R Time(Min)
1 0-2 281 290 297 310 322 342
2 3-5 280 288 296 308 321 340
3 6-9 279 287 295 307 320 339
4 10-19 277 284 293 304 318 336
5 20-35 275 280 291 300 316 332
6 36-49 273 277 289 297 314 329
7 50-79 271 275 287 295 312 327
8 80-119 270 274 286 294 311 326
9 Over 120 269 273 285 293 310 325
▪ Aging chamber line
(Aging chamber) Model : LN5xxx, LA6xxx, LA7xxx, LA8xxx
▪ S tan d ard c olo r coo r din ate a nd temp era t ure u sin g
CA-210(CH-14) – by aging time
H/R Time(Min)
1 0-5 280 288 296 308 321 340
2 6-10 276 283 292 303 317 335
3 11-20 273 278 289 298 314 330
4 21-30 270 275 286 295 311 327
5 31-40 267 272 283 292 308 324
6 41-50 266 270 282 290 307 322
7 51-80 265 269 281 289 306 321
8 81-119 264 267 280 287 305 319
9 Over 120 263 266 279 286 304 318
x y x x y x
269 273 285 293 313 329
Cool Medium Warm
x y x x y x
269 273 285 293 313 329
5.2. Option selection per country
5.2.1. Overview
(1) Tool option selection is only done for models in Non-USA
North America due to rating
(2) Applied model: LA32B Chassis applied to CANADA and
MEXICO
5.2.2. Country Group selection
(1) Press ADJ key on the Adj. R/C, and then select Country
Group Menu
(2) Depending on destination, select US, then on the lower
Country option, select US, CA, MX.
Selection is done using +, - KEY
(3) Using DFT(Auto)
※ PC (for communication through RS-232C) -> UART Baud
rate : 115200 bps
Command : ah 00 00 DATA(Area Number(hexadecimal))
ITEM DATA(Area Number) AREA
AREA OPTION1 0 USA
1 CANADA
2 MEXICO
5.2.3. Tool Option inspection
▪ Press Adj. key on the Adj. R/C, then select Tool option
Model Module
32LN5300-UB LGD 545 41478 37004 12031
47LN5400-UA LGD 1569 33286 37004 46847
55LN5400-UA LGD(POLA) 2065 33286 37004 40703
50LN5400-UA LGD 1825 33286 37004 48895
42LN5400-UA LGD 1313 33286 37004 36607
42LN5300-UB LGD 1313 41478 37004 03839
42LN5300-UB AUO 9505 41478 37004 03839
42LN5300-UB LGD(POLA) 1297 41478 37004 03839
39LN5300-UB CMI(POLA) 5137 41478 37004 03839
39LN5300-UB AUO(POLA) 9233 41478 37004 03839
32LN5300-UB CSOT(POLA) 4625 41478 37004 03839
32LN530B-UB LGD 545 45574 37004 03839
32LN530B-UB LGD(POLA) 545 45574 37004 03839
Tool
option1
Tool
option2
Tool
option3
Tool
option4
Only for training and service purposes
※ Tool option can be reconstructed by Software
5.3. Ship-out mode check (In-stop)
- After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode
- 14 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 15
6. GND and HI-POT Test
6.1. GND & HI-POT auto-check preparation
(1) Check the POWER CABLE and SIGNAL CABE insertion
condition
6.2. GND & HI-POT auto-check
(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next
process automatically
6.3. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE
GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms
* USB S/W Download (option, Service only)
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting
(3) Show the message "Copying files from memory"
(4) Updating is staring.
7. AUDIO output check
7.1. Audio input condition
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms)
7.2. Specification
No Item Min Typ Max Unit Remark
1 Audio practical
max Output, L/R
(Distortion=10%
max Output)
9.0
8.5
10.9
9.3
12.0
9.8WVrms
(1) Measurement
condition
- EQ/AVL/Clear
Voice: Off
(2) Speaker
(8Ω Impedance)
(5) After updating is complete, The TV will restart automatically.
(6) If TV turns on, check your updated version and Tool option.
(refer to the next page about tool option)
* If downloading version is higher than your TV have, TV
can lost all channel data. In thi s case, you have to
channel recover. If all channel data is cleared, you didn't
have a DTV/ATV test on production line.
※After downloading, TOOL OPTION setting is needed again.
(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)
Only for training and service purposes
- 15 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 16
TROUBLE SHOOTING
1. Power-up boot check
Check stand-by Voltage.
P401 3, 5pin : +3.5V_ST
Check 18pin Power connector
Main B/D 3.5V Line
Short Check
Check X201 clock
24 MHz
Replace X201
Check P401 PWR_ON.
1pin : 3.3V
Replace Mstar(IC101) or Main board
Check Multi Voltage
P401 9, 10pin : 24V
/ 13, 14, 15pin:12V
Replace Power Board
Check DRV ON Control
P403 2 pin : High
Check Power Board
Check IC402/3/7 Output Voltage
IC402 : 2.5V
IC403 : 1.15V
IC407 : 1.5V
Q403 : 3.3V
Replace IC402, IC403, IC407, Q403
Re-download software.
Check stand-by Voltage
L404, L408 : +3.5V
Replace L404, L408
Check LVDS Power Voltage
Q409 : 12V
Replace Q409
Check Mstar LVDS Output
Replace Mstar(IC101) or Main Board
Change Module
ok
ok
ok
ok
ok
ok
ok
ok
okNo
No
ok
Replace Power board.
ok
No
No
No
No
No
No
No
No
Only for training and service purposes
- 16 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 17
2. Digital/Analog TV Video
Check RF Cable & Signal
Check Tuner 3.3V Power
L3703
Replace L3703
Check Tuner 1.8V Power
IC3703 2 pin : 1.8V
Check IF_P/N Signal
TU3700 10/11 Pin
Replace IC3703
Check Mstar LVDS Output
Replace Mstar(IC101) or Main Board.
ok
ok
ok
ok
No
No
No
No
Bad Tuner. Replace Tuner.
3. AV Video
Check input signal format.
Is it supported?
Check AV Cable for damage
for damage or open conductor
Check JK1702, CVBS Signal Line
R1722
ok
ok
ok
No
Replace Jack
ok
Check CVBS_DET Signal
Replace R1713
No
Check Mstar LVDS Output
No
Only for training and service purposes
- 17 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 18
4. Component Video
Check input signal format.
Is it supported?
Check Component Cable
for damage or open conductor.
Check JK1702
Y/PB/PR signal Line
ok
ok
ok
No
Replace Jack
Check COMP_DET Signal
Replace R1712 or R1713
No
Check Mstar LVDS Output
Replace Mstar(IC101) or Main Board.
ok
No
5. HDMI Video
Check input signal format.
Is it supported?
Check HDMI Cable conductors
for damage or open conductor.
Check EDID
R832, R833, R834, R835 I2C Signal
Check JK801, JK803
ok
ok
ok
No
No
Replace the defective IC or re-download EDID data
ok
Replace Jack
Check HDMI Signal
Check other set
If no problem, check signal line
ok
No
Check Mstar LVDS Output
Replace Mstar(IC101) or Main Board.
ok
No
Replace Main Board
No
Check HDMI_DET (HPD)
No
Replace R803, R801, R826, R807, R817, Q801, R819, R818, R830
Only for training and service purposes
- 18 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 19
6. MHL Video
Check input signal format.
Is it supported?
Check MHL Cable conductors
for damage or open conductor.
Check MHL Signal (R214, R215)
Check JK803
ok
ok
ok
No
No
Replace the defective IC or re-download EDID data
ok
Replace Jack
Check MHL Signal
Check other set
If no problem, check signal line
ok
No
Check Mstar LVDS Output
Replace Mstar(IC101) or Main Board.
ok
No
Replace Main Board
No
Check CD_Sense, Cbus, Vbus
No
Replace R810, R802, R831, R830, IC802, D800
Only for training and service purposes
- 19 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 20
7. All Source Audio
Check the TV Speaker Menu
(Menu -> Audio -> TV Speaker)
On
ok
ok
Check Output Signal P3401
1, 2, 3, 4 pin.
Replace Audio AMP IC(IC3401)
ok
No
Check Connector & P3401
Replace connector
if found to be damaged.
ok
No
Check speaker resistance
and connector damage.
Replace speaker.
ok
No
Off
Toggle the Menu
Check AMP IC(IC3401) Power
24V, 3.3V
No
Replace Amp IC(IC501)
Check Mstar I2S Output
IC3401 37,38,39 Pin
No
Check signal line. Or replace Mstar(IC101)
Check Mstar AUDIO_MASTER_CLK
R148
No
Replace Mstar(IC101) or Main Board.
ok
Check AMP I2C Line
R3406, R3407
No
Check signal line. Or replace Mstar(IC101)
8. Digital/Analog TV Audio
Check RF Cable & Signal
Follow procedure
‘7. All source audio’
trouble shooting guide.
ok
Check Tuner 3.3V Power
L3703
Replace L3703
Check Tuner 1.8V Power
IC3703 2 pin : 1.8V
Check IF_P/N Signal
TU3700 10/11 Pin
Replace IC3703
ok
ok
ok
No
No
No
Bad Tuner. Replace Tuner.
Only for training and service purposes
- 20 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 21
9. AV Audio
Check AV Cable for damage
for damage or open conductor
Check JK1702 Signal Line
R1714,R1715
ok
ok
No
Replace Jack
Follow procedure
‘7. All source audio’
trouble shooting guide.
10. Component Audio
Check Component Cable
for damage or open conductor.
Check JK1702 Signal Line
R1714,R1715
ok
ok
No
Replace Jack
Follow procedure
‘7. All source audio’
trouble shooting guide.
Only for training and service purposes
- 21 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 22
BLOCK DIAGRAM
SPDIF
Component
HDMI
D_IF
M1
SERIAL FLASH
MXIC 8MB(64Mb)
MX25L6406EMI
LVDS
(FHD/HD 60z)
USB2.0
DP/D
M
SPK L/R
X-tal
24MHz
FPC(51P/FHD)
I2S
SPDIF
L/R
Y/Pb/Pr, L/R
Rear
TMDS
DDR3 Add.
DDR3 Data
SPI
AV
Side
TMDS
HDMI
MHL
CVBS, L/R
CONTROL
IR & LED
KEY1
IR
LED_R
I2C
RS-232C
FPC(30P/HD)
MAX3232
RS232C
CLK 667MHz
Internal
Micom
(PM)
I2C
DDR3 128MB(1Gb)
Hynic
H5TQ1G63DFR
AT24C512C-SSHD-T
512k bit
Half NIM
(SI2158_ATSC_1INPUT)
A_IF
AMP
STA380BWE
(CLK 800MHz)
Only for training and service purposes
- 22 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 23
M1
EEPROM
Amp
Tuner
CH 2
I2C_SCL
I2C_SDA
22
3.3V
2.2k
1k
TU _SCL
TU _SDA
CH 5
CH 6
TU _SCL
TU _SDA
1.8k
33
22
3.3V
3.3V
0xA0
0x20
0xC0
0
18p
Only for training and service purposes
- 23 -
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 24
521
400
540
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
530
120
LV1
510
120
123
900
200
122
910
A10
Set + Stand
500
A9
+
Stand Base
Stand Body
300
Only for training and service purposes
- 24 -
A2
LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Page 25
TP for NON-EU models(except EU and China)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
TP for CI slot
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_IORD PCM_A[11]
/PCM_IOWR CI_TS_DATA[1]
/PCM_CE
/PCM_IRQA
/PCM_CD
/PCM_WAIT
PCM_RST
PCM_5V_CTL
CI_DET
TP for S2
PCM_D[0]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[12]
PCM_A[13]
PCM_A[14]
TP for FE_TS_DATA
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
TP for SCART
SCART1_MUTE
SC1_IDPCM_D[1]
SC1_FB
SC1_SOG_INCI_TS_DATA[0]
DTV/MNT_VOUT
SCART1_Lout
SCART1_Rout
SC1_CVBS_IN
SC1_R+/COMP1_Pr+
SC1_G+/COMP1_Y+
SC1_B+/COMP1_Pb+
SC1/COMP1_DET
SC1/COMP1_L_IN
SC1/COMP1_R_IN
TP for Headphone
HP_LOUT
HP_ROUT
SIDE_HP_MUTE
HP_DET
S2_RESET
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
TP_NON_EN
2012.07.02
3
Page 26
L13 POWER BLOCK (POWER DETECT 2)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
FROM LIPS & POWER B/D
+3.5V_ST
MMBT3906(NXP)
Q402
3
1
2
L404
CIC21J501NE
L407
MLB-201209-0120P-N2
L402
MLB-201209-0120P-N2
R411
OPT
33K
P401
SMAW200-H18S1
PWR ON
3.5V
3.5V
GND
24V
GND
12V
12V
GND
DRV ON
1
2
PDIM#1
3
4
PDIM#2
5
6
GND
7
8
24V
10
9
GND
11
12
12V
13
14
N.C
15
16
GND
17
18
19
.
RL_ON
+3.5V_ST
R461
10K
+3.5V_ST
+24V
+12V
OPT
R462
10K
R401
10K
B
D401 5V
CIC21J501NE
L408
C406 0.1uF
C418 0.1uF
C404 0.1uF
R416
10K
R406
4.7K
C
Q401
MMBT3904(NXP)
E
OPT
16V
50V
16V
+3.3V_Normal
R419
1K
R415
100
C
E
MMBT3904(NXP)
R412 3.9K
PWM_DIM_PULL_DOWN
*For 55LN54 Power ON Noise
R408 100
PWM2_2CH_POWER
Q405
+3.5V_ST --> 3.375V --> 3.46V
PANEL_POWER
+12V
L412
120
CIS21J121
R430
10K
R439
33K
R440
5.6K
B
C438
0.1uF
25V
+3.5V_ST
R426
10K
R421
10K
B
INV_CTL
PANEL_CTL
001:AL22
OPT
R489
10K
C
Q407
MMBT3904(NXP)
E
C443
10uF
Q409
AO3407A
D
S
16V
G
R405
5.6K
PANEL_VCC
R407
5.6K
+1.5V_DDR
PWM_DIM
PWM1
+3.5V_ST
C461
10uF
10V
L420
BLM18PG121SN1D
+3.3V_Normal
AP7173-SPG-13 HF(DIODES)
R433
10K
IC407
IN
1
PG
2
THERMAL
VCC
3
1.5A
EN
4
C476
0.1uF
16V
+1.5V_DDR
D403
5V
OPT
[EP]
OUT
8
FB
9
7
SS
6
GND
5
C467
560pF
50V
R1
R457
4.3K
1/16W
1%
R2
R456
4.7K
1/16W
1%
C472
22uF
10V
Power_DET
PD_+12V
R448
2.7K
PD_+12V
R447
C411
1.2K
0.1uF
16V
+24V
PD_+24V
R482
8.2K
1%
PD_+24V
PD_+24V
C412
0.1uF
16V
R403
1.5K
1%
+3.3V_Normal
+12V
1%
1%
+3.5V_ST
PD_+3.5V
R434
10K
+3.5V_ST
R450
0
5%
PWR_DET_ON_SEMI
NCP803SN293
VCC
3
PD_+24V_PWR_DET_ON_SEMI
NCP803SN293
VCC
3
R438
22K
+24V --> 3.78V --> 3.92V (3.79V)
+12V --> 3.58V --> 3.82V (3.68V)
R402-*1
100
+3.5V_SOC_RESET
RESET_IC_SOC_RESET
R402
300
PD_+24V
R480
100
AO3435
Q403
D
S
G
+3.5V_ST
R463
RESET_IC_SOC_RESET
10K
BLM18PG121SN1D
C425
0.1uF
16V
R488
100K
IC408
GND
PD_+24V
R404
100K
IC409
GND
1
1
C423
2.2uF
10V
RESET
2
POWER_DET_RESET
RESET
2
FET_2.5V_AOS
C474
0.1uF
L403
POWER_DET
+3.3V_Normal
IC408-*1
APX803D29
RESET
PWR_DET_ON_DIODES
RESET
PD_+24V_PWR_DET_DIODES
C437
22uF
10V
2
1
IC409-*1
APX803D29
2
1
5V
3
GND
3
GND
D405
VCC
VCC
+5V_Normal
&
+5V_USB
+12V
L401
CIC21J501NE
R410
100K
CHANGE TO
16V/X5R
C405
10uF
16V
C419
4.7uF 10V
Vout=0.8*(1+R1/R2)
L406
13
14
15
16
BST
1
SS
R491
0
17
THERMAL
3.6uH
10FB11LX12
IC401
TPS65281RGV
3
2
ROSC
COMP4RLIM
R409
2K
C410
3300pF
50V
C413
0.047uF
25V
PGND
VIN
V7V
[EP]
EN
C426
100pF
50V
OPT
SW_IN
9
C420
22uF
16V
R413
16K
8
7
6
5
C421
22uF
16V
SW_OUT
AGND
FAULT
EN_SW
R445
R436
15K
PH_3
PH_2
PH_1
SS/TR
B
C441
0.1uF
16V
R432
C488
3300pF
330K1/16W 5%
2.2K
C
Q400
MMBT3904(NXP)
E
C448
3300pF
50V
L415
3.6uH
C453
22uF
10V
C456
22uF
10V
R1
R2
FET_2.5V_DIODE
DMP2130L
Q403-*1
S
G
R442
30K
1/16W
1%
R441
75K
1/16W
1%
D
+1.10V_VDDC
C439
50V
100pF
C444
0.1uF
16V
D404
5V
OPT
Vout=0.8*(1+R1/R2)=1.5319
POWER_ON/OFF_1
R443
10K
+2.5V_Normal
+3.3V_Normal
+5V_Normal
R1
R452
33K
1%
C424
330pF
R453
OPT
27K
C417
10uF
10V
85C
1%
50V
R2
R454
11K 1%
CAP_10uF_X5R
CHANGE TO
10UF/10V/X5R
+5V_Normal
C417-*1
10uF 10V
CAP_10uF_X7R
+3.3V_Normal
R414
10K
+5V_USB
R417
4.7K
OPT
C422
0.1uF
16V
OPT
USB1_OCD
USB1_CTL
TJ1118S-2.5
IN
3
IC402
1
GND
OUT
2
CAP_10uF_X5R
CHANGE TO
10UF/10V/X5R
C403
10uF
10V
85C
C403-*1
10uF 10V
CAP_10uF_X7R
C440
0.1uF
16V
+2.5V_Normal
D402
5V
OPT
S7LR core 1.15V volt
R428
10K
EP[GND]
VIN_3
1
THERMAL
2
3
TPS54319TRE
4
5
AGND
15EN16
17
IC403
6
VSENSE
3A
C447
0.33uF
16V
7
COMP
BOOT14PWRGD
13
12
11
10
8
RT/CLK
9
+3.5V_ST
L413
CIC21J501NE
C430
10uF
10V
+3.3V_Normal
VIN_1
VIN_2
GND_1
GND_2
Vout=0.827*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
Power_PD2
2012/09/19
4
Page 27
IR/LED and Control
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
+3.5V_ST
+3.5V_ST
CONTROL_NO_FILTER
R611
0
CONTROL_FILTER
L601
BLM18PG121SN1D
CONTROL_FILTER
L602
BLM18PG121SN1D
CONTROL_NO_FILTER
R612
0
CONTROL_FILTER
C609
0.1uF
16V
+3.5V_ST
L600
BLM18PG121SN1D
C602
0.1uF
16V
CONTROL_FILTER
C608
0.1uF
16V
C603
1000pF
50V
LED_R/BUZZ
C604
100pF
P600
12507WR-08L
1
2
3
R610
1.8K
OPT
C607
0.1uF
16V
50V
4
5
6
7
8
9
R603
R602
R600
KEY1
KEY2
IR
100
R601
100
10K
10K
1%
1%
R607
3.3K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
IR/CONTROL
2012/07/18
6
Page 28
USB (SIDE)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
JK700
1234
USB DOWN STR EAM
3AU 04S-3 05-Z C-(LG )
5
C700
22uF
10V
D700
RCLAMP0502BA
OPT
+5V_USB
SIDE_USB1_DM
SIDE_USB1_DP
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
USB
12/06/20
7
Page 29
HDMI (REAR 1 / SIDE 1 MHL)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
HDMI_1
SHIELD
20
EAG59023302
JK801
CEC
HDMI_CEC
5V_HDMI_2
R822
2.7K
+5V_Normal
R823
2.7K
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
A2CA1
MMBD6100
D822
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
5V_HDMI_2
R826
1K
R803
1.8K
VA801
ESD_HDMI1_VARISTOR
R820
100
DDC_SDA_2
DDC_SCL_2
5V_DET_HDMI_2
VA802
3.3K
ESD_HDMI
R801
D801
ESD_HDMI1_VARISTOR
CEC_REMOTE_S7
5V_HDMI_4
R824
2.7K
+5V_Normal
A2CA1
MMBD6100
D824
R825
2.7K
MMBT3904(NXP)
Q801
R805 0
HDMI1_ARC
VA801-*1
1uF
10V
ESD_HDMI1_CAP
D801-*1
1uF
10V
ESD_HDMI1_CAP
+3.5V_ST
DDC_SDA_4
DDC_SCL_4
C
E
ESD_HDMI
A2CA1
MMBD6100
D825
R807
10K
B
VA803
R817
10K
VA804
ESD_HDMI
1
2
3
4
5
ESD_HDMI_SEMTECH
1
2
3
4
5
ESD_HDMI_SEMTECH
R832 100
R833 100
D826
RCLAMP0524PA
10
9
8
7
6
D827
RCLAMP0524PA
10
9
8
7
6
TMDS_CH1-
TMDS_CH1+
GND_1
TMDS_CH2-
TMDS_CH2+
TMDS_CH1-
TMDS_CH1+
GND_1
TMDS_CH2-
TMDS_CH2+
D826-*1
IP4283CZ10-TBA
1
2
3
4
5
ESD_HDMI_NXP
D828-*1
IP4283CZ10-TBA
1
2
3
4
5
ESD_HDMI_NXP
SIDE_HDMI (MHL)
5V_HDMI_4
GND
BODY_SHIELD
20
HP_DET
HPD2
DDC_SDA_2
DDC_SCL_2
HDMI_ARC
HDMI_CEC
CK-_HDMI2
CK+_HDMI2
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
19
18
17
16
15
14
13
12
11
10
EAG62611204
9
8
7
6
5
4
3
2
1
5V
GND
DDC_DATA
DDC_CLK
NC
CE_REMOTE
CK-
CK_GND
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
R819
1.8K
VA805
ESD_HDMI
JK803
D827-*1
IP4283CZ10-TBA
TMDS_CH1-
NC_4
10
TMDS_CH1+
NC_3
9
GND_1
GND_2
8
TMDS_CH2-
NC_2
7
TMDS_CH2+
NC_1
6
10
9
8
7
6
NC_4
NC_3
GND_2
NC_2
NC_1
ESD_HDMI_NXP
IP4283CZ10-TBA
TMDS_CH1-
TMDS_CH1+
GND_1
TMDS_CH2-
TMDS_CH2+
ESD_HDMI_NXP
1
2
3
4
5
D829-*1
1
2
3
4
5
NC_4
10
NC_3
9
GND_2
8
NC_2
7
NC_1
6
NC_4
10
NC_3
9
GND_2
8
NC_2
7
NC_1
6
MHL OCP
AVDD5V_MHL
R809
10
5V_HDMI_4
C809
10uF
10V
D800
MBR230LSFT1G
30V
100K
OPT
R808
+3.3V_Normal
R806
/MHL_OCP_DET
R804
0
10K
OPT
D811
OUT_3
OUT_2
OUT_1
R818
OC
5V_DET_HDMI_4
VA806
ESD_HDMI
3.3K
D812
5.6V
IC802
BD82020FVJ
8
7
6
5
OPT
R810
0
R830 100
GND
1
IN_1
2
IN_2
3
EN
4
VA807
ESD_HDMI
1
2
3
4
5
ESD_HDMI_SEMTECH
1
2
3
4
5
ESD_HDMI_SEMTECH
C801
0.047uF
25V
+5V_Normal
R827
20K
D828
RCLAMP0524PA
10
9
8
7
6
D829
RCLAMP0524PA
10
9
8
7
6
+3.5V_ST
R811
OPT
B
C802
0.1uF
C
Q804
B
R813
10K
C
E
R834 100
R835 100
VA808
ESD_HDMI
10K
R812
10K
C
Q802
OPT
E
R802
0
R821
10K
E
B
Q805
B
OPT
+3.3V_Normal
R814
2.7K
C
E
E
C
B
Q806
Q803
OPT
R831
300K
R815
10K
R816
10K
HPD4
DDC_SDA_4
DDC_SCL_4
HDMI_CEC
CK-_HDMI4
CK+_HDMI4
D0-_HDMI4
D0+_HDMI4
D1-_HDMI4
D1+_HDMI4
D2-_HDMI4
D2+_HDMI4
MHL_CD_SENSE
/VBUS_EN
(Active Low)
MHL_OCP_EN
(Active High)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
2012/11/07
HDMI_R1_S1 8
Page 30
SPDIF
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
SPDIF OPTIC JACK
5.15 Mstar Circuit Application
SPDIF_OUT
+3.3V_Normal
C1001
0.1uF
16V
SPDIF-JACK-FOXCONN
2F01TC1-CLM97-4F
GND
VCC
VIN
C1002
100pF
50V
JK1001
1
2
3
SPDIF-JACK-SOLTEAM
JK1001-*1
JST1223-001
GND
Fiber Optic
1
VCC
2
Fib er Op tic
4
SHI ELD
VINPUT
3
4
FIX_POLE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
SPDIF
12/06/12
10
Page 31
LVDS (NON EU)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
[51Pin LVDS Connector]
(For FHD 60Hz)
FHD
P1100
FI-RE51S-HF-J-R1500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
RXA4+
RXA4-
RXA3+
RXA3-
RXACK+
RXACK-
RXA2+
RXA2-
RXA1+
RXA1-
RXA0+
RXA0-
RXB4+
RXB4-
RXB3+
RXB3-
RXBCK+
RXBCK-
RXB2+
RXB2-
RXB1+
RXB1-
RXB0+
RXB0-
+3.3V_Normal
R1111 0
NON_AUO/CMI_39inch
NON_AUO39inch
R1112 0
R1113 0
NON_AUO39inch
LVDS_SEL
OPT
R1100
3.3K
OPT
R1101
10K
PANEL_VCC
FHD
L1100
120
CIS21J121
FHD
C1100
0.1uF
16V
FOR FHD REVERSE(10bit)
Change in S7LR
MIRROR
RXA4+
RXA4-
RXA3+
RXA3-
RXACK+
RXACK-
RXA2+
RXA2-
RXA1+
RXA1-
RXA0+
RXA0-
RXB4+
RXB4-
RXB3+
RXB3-
RXBCK+
RXBCK-
RXB2+
RXB2- RXBCK-
RXB1+
RXB1-
RXB0+
RXB0-
Pol-change
RXA0+
RXA0-
RXA1+
RXA1-
RXA2+
RXA2-
RXACK+
RXACK-
RXA3+
RXA3-
RXA4+
RXA4-
RXB0+
RXB0-
RXB1+
RXB1-
RXB2+
RXB2-
RXBCK+
RXB3+
RXB3-
RXB4+
RXB4-
FOR FHD REVERSE(8bit)
Change in S7LR
RXA4+
RXA4-
RXA3+
RXA3-
RXACK+
RXACK-
RXA2+
RXA2-
RXA1+
RXA1-
RXA0+
RXA0-
RXB4+
RXB4-
RXB3+
RXB3-
RXBCK+
RXBCK-
RXB2+
RXB2-
RXB1+
RXB1-
RXB0+
RXB0-
MIRROR
Pol-change
RXA4+
RXA4-
RXA0+
RXA0-
RXA1+
RXA1-
RXA2+
RXA2-
RXACK+
RXACK-
RXA3+
RXA3-
RXB4+
RXB4-
RXB0+
RXB0-
RXB1+
RXB1-
RXB2+
RXB2-
RXBCK+
RXBCK-
RXB3+
RXB3-
RXA0-
RXA0+
RXA1-
RXA1+
RXA2-
RXA2+
RXACK-
RXACK+
RXA3-
RXA3+
RXA4-
RXA4+
RXB0-
RXB0+
RXB1-
RXB1+
RXB2-
RXB2+
RXBCK-
RXBCK+
RXB3-
RXB3+
RXB4-
RXB4+
Shift
RXA4-
RXA4+
RXA0-
RXA0+
RXA1-
RXA1+
RXA2- RXACK-
RXA2+
RXACK-
RXACK+
RXA3-
RXA3+
RXB4-
RXB4+
RXB0-
RXB0+
RXB1-
RXB1+
RXB2-
RXB2+
RXBCK-
RXBCK+
RXB3-
RXB3+
RXA0-
RXA0+
RXA1-
RXA1+
RXA2-
RXA2+
RXACK+
RXA3-
RXA3+
RXA4-
RXA4+
RXB0-
RXB0+
RXB1-
RXB1+
RXB2-
RXB2+
RXBCK-
RXBCK+
RXB3-
RXB3+
RXB4-
RXB4+
[30Pin LVDS Connector]
(For HD 60Hz_Normal)
HD
P1101
FF10001-30
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
RXA0-
RXA0+
RXA1-
RXA1+
RXA2-
RXA2+
RXACK-
RXACK+
RXA3-
RXA3+
LVDS_SEL
+3.3V_Normal
OPT
R1103
3.3K
OPT
R1104
10K
EU pin assign is different from NON EU.
Because of position of HD wafer.
PANEL_VCC
HD
L1101
120
CIS21J121
HD
C1101
0.1uF
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
LVDS_NON_EU
2012/09/19
11
Page 32
GLOBAL tuner block except EU and China
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
RF_SWITCH_CTL
Pull-up can’t be applied
because of MODEL_OPT_2
TU3700
TU3702
TDSH-G501D(B)
TUNER_ISOLATOR_DVB_1INPUT_H
NC
1
RESET
2
SCL
3
SDA
4
+B1[3.3V]
5
SIF
6
+B2[1.8V]
7
CVBS
8
IF_AGC
9
DIF[P]
10
DIF[N]
11
B1
B1
A2
B2
B2
A1
A1
A2
close to TUNER
R3705 0
C3701
0.1uF
16V
OPT
TDSS-G201D
B1
B1
TUNER_OPT
12
SHIELD
1
2
3
4
5
6
7
8
9
10
11
A1
NC_1
RESET
SCL
SDA
+B1[3.3V]
NC_2
0.1uF 16V
+B2[1.8V]
NC_3
IF_AGC
DIF[P]
DIF[N]
A1
TU_GND_A
C3702
OPT
close to TUNER
R3732
100
+3.3V_TU
R3733
100K
C3710
0.1uF
16V
HALF_NIM/IF_FILTER
R3760-*1
10
R3761 0
HALF_NIM/IF_NON_FILTER
R3760 0
HALF_NIM/IF_NON_FILTER
Close to the tuner
TUNER_RESET
HALF_NIM/IF_FILTER
R3761-*1
10
C3711
18pF
50V
C3713
18pF
50V
R3735 33
R3736 33
LNA_CTRL_1
LNA_CTRL_2
+3.3V_TU
R3740
1.8K
TU_IIC_ATSC_1.8K
OPT
C3742
20pF
50V
OPT
C3743
20pF
50V
R3741
1.8K
TU_IIC_ATSC_1.8K
IF_P_MSTAR
IF_N_MSTAR
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils
R3740-*1
1K
TU_IIC_NON_ATSC_1K
R3741-*1
1K
TU_IIC_NON_ATSC_1K
TU_SCL
TU_SDA
R3758
82
OPT
R3784
0
OPT
+3.3V_TU
TU_SIF
TU_CVBS
BR_RESET_DEMOD
FE_TS_SYNC
FE_TS_VAL_ERR
FE_TS_CLK
FE_TS_DATA[0]
FE_AGC_SPEED_CTL
IF_AGC_SEL
FE_BOOSTER_CTL
LNA2_CTL
DEMOD_SCL
DEMOD_SDA
GND seperation for ASIS tuner
TU_GND_A
R3714
R3715
NON_ASIA
0
0
NON_ASIA
TUNER MULTI-OPTION
TU3700-*1
TDSS-H501F(B)
TUNER_ATSC
1
2
3
4
5
6
7
8
9
10
X
11
A1
B1
12
SHIELD
NC_1
RESET
SCL
SDA
+B1[3.3V]
NC_2
+B2[1.8]
NC_3
IF_AGC
DIF[P]
DIF[N]
A1
TU_GND_A
TW_FE_LNA FILTER_SETTING
Frequence
54MHz~350MHz
350Hz~450MHz
450Hz~870MHz
CTRL_1 CTRL_2
1
0
0
0
0
1
Filter_Type
LPF
Through
HPF
+3.3V_TU
CHANGE TO
6.3V 2012 X5R
C3723
22uF
6.3V
Size change,0929
L3703
CIS21J121
C3725
0.1uF
16V
+3.3V_Normal
C3715
22uF
6.3V
CHANGE TO
6.3V 2012 X5R
C3737
100pF
50V
C3727
0.1uF
16V
C3738
0.1uF
16V
+1.8V_TU
C3716
0.1uF
16V
close to the tuner pin, add,09029
R3704 100
should be guarded by ground
+3.3V_TU
C3717
0.1uF
16V
C3707
100pF
50V
IF_AGC_MAIN
IC3703
AP1117E18G-13
3
IN1ADJ/GND
OUT
2
C3708
0.1uF
16V
+1.8V_TU
C3740
0.1uF
16V
R3766
1
C3741
10uF
10V
85C
C3741-*1
10uF 10V
CAP_X7R_MP
CAP_10uF_X5R
CHANGE TO
10UF 10V X5R
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
TUNER_NON_EU
2012.06.21
14
Page 33
COMPONENT1 & AV(COMMON), AV2
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
COMP_AV1/2
JK1701
PPJ248-01
[RD3]E-LUG
7C
[RD3]C-SPRING
6C
D1700
5.6V
AV2_LR_ZENER
R1700
470K
AV2
C1701
1000pF
50V
OPT
R1716
10K
AV2
R1718
12K
AV2
AV2_R_IN
AV2
COMPONENT
&
AV1
COMP_AV1
JK1702
PPJ245-01
[RD2]E-LUG
7E
[RD2]C-SPRING
6E
[RD2]CONTACT
4E
[WH]C-SPRING
5D
[RD1]CONTACT
4C
[RD1]C-SPRING
6C
[RD1]E-LUG-S
8C
[RD3]CONTACT
4C
[WH2]C-SPRING
5B
[YL]CONTACT
4A
[YL]C-SPRING
6A
[YL]E-LUG
7A
[RD2]E-LUG
7H
[RD2]C-SPRING
6H
[RD2]CONTACT
4H
[WH1]C-SPRING
5G
[RD1]CONTACT
4F
[RD1]C-SPRING
6F
[RD1]E-LUG-S
8F
AV2_CVBS_ZENER_ROHM
COMP_Pr_ZENER_ROHM
D1707
D1701
5.6V
AV2_LR_ZENER
D1702
5.6V
OPT
D1713
AV2_CVBS_ZENER_ROHM
D1714
D1704
5.6V
COMP_LR_ZENER
D1705
5.6V
COMP_LR_ZENER
D1706
5.6V
OPT
D1703
COMP_Pr_ZENER_ROHM
R1703
470K
R1704
470K
+3.3V_Normal
R1709
10K
R1705
75
R1701
470K
AV2
+3.3V_Normal
R1708
10K
AV2
R1712
1K
R1711 1K
R1702
75
AV2
C1704
1000pF
50V
OPT
C1705
1000pF
50V
OPT
R1717
10K
AV2
C1702
1000pF
50V
OPT
C1703
47pF
50V
AV2
COMP2_DET
AV2_CVBS_DET
AV2
R1714
10K
R1715
10K
R1720
12K
R1721
12K
R1719
12K
AV2
AV2_L_IN
AV2_CVBS_IN
COMP2_R_IN
COMP2_L_IN
COMP2_Pr+
D1714-*1
AV2_CVBS_ZENER_KEC
D1707-*1
COMP_Pr_ZENER_KEC
D1713-*1
AV2_CVBS_ZENER_KEC
D1703-*1
COMP_Pr_ZENER_KEC
[BL]C-SPRING
5B
[GN]CONTACT
4A
[GN]C-SPRING
6A
[GN]E-LUG
7A
[BL]C-SPRING
5E
[GN]CONTACT
4D
[GN]C-SPRING
6D
[GN]E-LUG
7D
D1710
COMP_Pb_ZENER_ROHM
D1712
COMP_Y_ZENER_ROHM
D1708
COMP_Pb_ZENER_ROHM
D1709
5.6V
OPT
D1711
COMP_Y_ZENER_ROHM
R1706
75
R1707
75
+3.3V_Normal
R1710
10K
CVBS_TEST
R1723
75
+3.3V_Normal
R1713
1K
COMP2_Pb+
D1710-*1
COMP_Pb_ZENER_KEC
AV_CVBS_DET
R1722
0
CVBS_TEST
IC1700
MM1756DURE
VCC
6
PS
5
OUT
4
IN
1
GND
2
BIAS
3
COMP2_Y+/AV_CVBS_IN
CVBS_TEST
C1706
0.1uF
CVBS_TEST
4.7uF
C1708
C1707
0.1uF
CVBS_TEST
D1712-*1
COMP_Y_ZENER_KEC
DTV/MNT_VOUT
D1708-*1
COMP_Pb_ZENER_KEC
D1711-*1
COMP_Y_ZENER_KEC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
REAR_NON_EU_L
2012.08.14NC4_S7LRM
17
Page 34
ETHERNET
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
* H/W option : ETHERNET
JK2100-*1
RJ45VT-01SN002
JK2100
XRJV-01V-0-D12-080
+2.5V_Normal
ETHERNET
L2101
BLM18PG121SN1D
1
1
2
2
3
3
ETHERNET_XML_EMI
4
4
5
5
6
6
7
7
8
8
9
9
1
2
3
ETHERNET_XMULTIPLE
4
5
6
7
8
9
9
ETHERNET
C2104
0.01uF
50V
ETHERNET
ETHERNET
ETHERNET
ETHERNET
R2101
49.9
R2102
49.9
R2103
49.9
R2104
49.9
C2101
0.1uF
ETHERNET
C2102
0.1uF
ETHERNET
EPHY_TP
EPHY_TN
EPHY_RP
EPHY_RN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
LAN
2012/06/21
21
Page 35
AUDIO AMP(STA380BWEF)
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
AUD_MASTER_CLK
C3401
1000pF
50V
AMP_MUTE
R3402
10K
R3401
10K
POWER_DET
+3.5V_ST
R3403
10K
B
C
Q3401
MMBT3904(NXP)
E
OPT
R3405
0
R3404
100
AUD_SCK
AUD_LRCK
AUD_LRCH
AMP_RESET
AMP_SDA
AMP_SCL
+3.3V_Normal
C3403
0.1uF
16V
C3404
2.2uF
10V
NC_13
NC_14
NC_15
VDDDIG1
GNDDIG1
FFX3A
FFX3B
EAPD/FFX4A
TWARNEXT/FFX4B
VREGFILT
AGNDPLL
MCLK
R3406 0
R3407 0
25
26
27
28
29
30
31
32
33
34
35
36
NC_12
24
IC3401
STA380BWF
39
40
38
37
SDI
PWDN
RESET
LRCKI
BICKI
41
42
INTLINE
43
SDA44SCL
49
45SA46
TESTMODE
NC_114NC_215NC_316NC_417NC_518NC_619NC_720NC_821NC_922NC_1023NC_11
13
12 GND_REG
11 VDD_REG
10 OUT1A
9 GND1
8 VCC1
7 OUT1B
6 OUT2A
5 VCC2
4 GND2
3 OUT2B
THERMA L
2 VSS_REG
1 VCC_REG
47
[EP]
GNDDIG248VDDDIG2
+3.3V_Normal
C3407
0.1uF
16V
C3409
0.1uF
16V
C3408
0.1uF
16V
C3411
0.1uF
50V
R3408
43
R3410
43
C3412
1uF
50V
R3409
C3413
330pF
50V
C3414
330pF
50V
R3411
43
43
C3415
1uF
50V
L3402
10uH
L3403
10uH
L3404
10uH
L3405
10uH
C3416
0.1uF
50V
C3417
10uF
35V
3216
C3418
0.22uF
50V
C3419
0.22uF
50V
SPK_L+
SPK_L-
SPK_R+
SPK_R-
C3420
0.22uF
50V
C3421
0.22uF
50V
C3422
0.22uF
50V
C3423
0.22uF
50V
L3401
CIS21J121
C3424
1000pF
50V
C3425
1000pF
50V
C3426
1000pF
50V
C3427
1000pF
50V
+24V
SPK_L+
SPK_L-
SPK_R+
SPK_R-
SPEAKER_L
SPEAKER_R
P3401
WAFER-ANGLE
4
3
2
1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
2012/08/29
AMP_STA380BWEF 34
Page 36
MSTART DEBUG_4PIN
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
MSTAR_DEBUG_4P
P3900
12505WS-04A00
5
JP_GND2
JP_GND3
1
2
3
4
RGB_DDC_SCL
RGB_DDC_SDA
JP_GND1
JP_GND4
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
2012/06/20
MSTAR DEBUG_4PIN 39
Page 37
RS-232C
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
PM_TXD
PM_RXD
R4001
100
R4000
100
+3.5V_ST
RS232C_DEBUG_4P
VCC
PM_RXD
GND
RM_TXD
P4000
12507WS-04L
1
2
3
4
5
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
RS232C_4P_OS
2012/06/20
40
Page 38
/F_RB
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
/PF_OE
/PF_CE0
/PF_CE1
PF_ALE
/PF_WE
/PF_WP
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
DIMMING
NAND FLASH MEMORY
OS
AR103
22
AR104
22
OS
NAND_FLASH_2G_HYNIX
EAN60708702
IC102-*1
H27U2G8F2CTR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PWM_DIM
EEPROM
M24256-BRMN6TP
E0
1
E1
2
E2
3
VSS
4
NVRAM_ST
IC104
A0’h
+3.3V_Normal
OS
R102
3.3K
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OPT
C111
2.2uF
VCC
8
WC
7
SCL
6
SDA
5
R156
R157
C105
0.1uF
NC_29
NC_28
NC_27
NC_26
I/O7
I/O6
I/O5
I/O4
NC_25
NC_24
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
OPT
R105
1K
OS
R106
1K
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RY/BY
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
NC_11
NC_12
NC_13
NC_14
NC_15
OPT
10K
100
+3.3V_Normal
C106
C104
8pF
8pF
OPT
OPT
OS
R107
1K
OPT
R108
C101
1K
0.1uF
NAND_FLASH_1G_TOSHIBA
TC58NVG0S3ETA0BBBH
1
2
3
4
5
6
7
RE
8
CE
9
10
11
12
13
14
15
16
17
WE
18
WP
19
20
21
22
23
24
R111 22
R112 22
+3.3V_Normal
OS
R109
3.9K
OS
EAN61508001
IC102-*2
PWM0
PWM2
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
I2C_SCL
I2C_SDA
IC102
H27U1G8F2CTR-BC
1
NAND_FLASH_1G_HYNIX
EAN35669103
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O8
44
I/O7
43
I/O6
42
I/O5
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O4
32
I/O3
31
I/O2
30
I/O1
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
I2C
NVRAM_RENESAS
IC104-*1
R1EX24256BSAS0A
A0
1
A1
2
A2
3
VSS
4
EAN62389501
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
RY/BY
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
1
2
3
4
5
6
7
RE
8
CE
9
10
11
12
13
14
15
CLE
16
ALE
17
WE
18
WP
19
20
21
22
23
24
R140
1K
VCC
8
WP
7
SCL
6
SDA
5
+3.3V_Normal
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I/O3
I/O2
I/O1
I/O0
NC_19
NC_18
NC_17
NC_16
EAN60991001
IC102-*3
TC58NVG1S3ETA00
+3.3V_Normal
R144
2.2K
NON_OS_512k_ST
IC104-*2
M24512-RMN6TP
E0
1
E1
2
E2
3
VSS
4
CAP_10uF_X5R_OS
0.1uF
R145
2.2K
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
NAND_FLASH_2G_TOSHIBA
R141
1K
EAN43349003
AR101
C102 10uF
C103
OS
AR102
OS
22
10V
CHANGE TO
10UF 10V X5R
OS
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O8
44
I/O7
43
I/O6
42
I/O5
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O4
32
I/O3
31
I/O2
30
I/O1
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
VCC
8
WC
7
SCL
6
SDA
5
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
85C
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
22
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
AMP_SDA
AMP_SCL
I2C_SDA
I2C_SCL
NON_OS_512k_ATMEL
AT24C512C-SSHD-T
A0
A1
A2
GND
PCM_A[0-7]
C102-*1
10uF 10V
CAP_10uF_X7R_OS
NAND_FLASH_1G_SS
EAN61857001
IC102-*4
K9F1G08U0D-SCB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
IC104-*3
1
2
3
4
EAN43349004
<CHIP Config(LED_R/BUZZ)>
Boot from SPI CS1N(EXT_FLASH) 1’b0
Boot from SPI_CS0N(INT_FLASH) 1’b1
<CHIP Config>
(I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
B51_no_EJ : 4’b0000 Boot from 8051 with SPI flash
SB51_WOS : 4’b0001 Secure B51 without scramble
SB51_WS : 4’b0010 Secure B51 with scramble
MIPS_SPE_NO_EJ : 4’b0100 Boot from MIPS with SPI flash
MIPS_SPI_EJ_1 : 4’b0101 Boot from MIPS with SPI flash
MIPS_SPI_EJ_2 : 4’b0110 Boot from MIPS with SPI flash
MIPS_WOS : 4’b1001 Secure MIPS without scramble
MIPS_WS : 4’b1010 Scerur MIPS with SCRAMBLE
AUD_MASTER_CLK
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VCC_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
R148
56
OPT
C112
100pF
50V
S7LR-M Multi Package
PM MODEL OPTION
VCC
8
WP
7
SCL
6
SDA
5
+3.3V_Normal
OS
OPT
R115 1K
R117 1K
R116 1K
R118 1K
LGE2121-MS (M1_L13_MS10)
C7
GPIO39
E6
GPIO40
F5
GPIO41
B6
GPIO42
E5
GPIO43
D5
GPIO44
B7
GPIO45
E7
GPIO48
F7
GPIO49
AB5
GPIO52
AB3
GPIO53
A9
GPIO54
F4
GPIO55
AB1
I2C_SCKM0/GPIO56
N6
I2C_SDAM0/GPIO57
AB2
GPIO76
AC2
GPIO77
OPT
R165 1K
R121 1K
S/W_EU/AJ
OPT
R123 1K
NON_OS
R124 1K
S7LR-M_MS10
IC101-*1
R174
10K
S/W_TW
R175
10K
OPT
R152 1K
R153 1K
LVACLKP
LVACLKN
LVBCLKP
LVBCLKN
GPIO194
GPIO191
GPIO192
GPIO193
+3.5V_ST
LVA0P
LVA0N
LVA1P
LVA1N
LVA2P
LVA2N
LVA3P
LVA3N
LVA4P
LVA4N
LVB0P
LVB0N
LVB1P
LVB1N
LVB2P
LVB2N
LVB3P
LVB3N
LVB4P
LVB4N
R177
10K
HD_LVDS_NON_EU
R176
10K
HD_LVDS_EU
LED_R/BUZZ
AUD_SCK
AUD_MASTER_CLK_0
PWM1
PWM0
AB25
AB23
AC25
AB24
AD25
AC24
AE23
AC23
AC22
AD23
V23
U24
V25
V24
W25
W23
AA23
Y24
AA25
AA24
AE24
AD24
Y23
W24
T25
U23
T24
T23
PM_MODEL_OPT_0
PM_MODEL_OPT_1
for SYSTEM EEPROM
(IC104)
RGB_DDC_SDA
RGB_DDC_SCL
SCART1_MUTE
PM_MODEL_OPT_0
HIGH : HD_NON_EU
LOW : HD_EU
HD_LVDS_pattern is different.
Between EU and NON_EU
PM_MODEL_OPT_1
HIGH : S/W_NON_EU
LOW : S/W_EU/AJ
S/W is different.
Between TW
I2C_SCL
I2C_SDA
PCM_D[0-7]
PCM_A[0-14]
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_IORD
/PCM_IOWR
/PCM_CE
/PCM_IRQA
/PCM_CD
/PCM_WAIT
PCM_RST
PCM_5V_CTL
/MHL_OCP_DET
MHL_OCP_EN
MODEL_OPT_6
MODEL_OPT_7
USB1_OCD
USB1_CTL
PM_TXD
PM_RXD
LED_R/BUZZ
PWM0
PWM1
PWM2
KEY1
KEY2
PCM_D[0]
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
R136 22
R137 22
FRC_RESET
AA18
AB22
AE20
AA15
AE21
AB21
AB18
AA20
AA21
AB17
AB19
AB20
AA16
AA19
AC21
AA17
AB15
AA22
AD22
AD20
AD21
AC20
W21
Y15
W20
V20
W22
Y19
Y16
Y20
Y18
Y21
Y22
U21
V21
R20
T20
U22
D4
E4
N25
N24
B8
A8
P23
P24
D2
D1
P21
N23
P22
R21
P20
F6
H6
G5
G4
J5
J4
R23
R24
R25
T21
T22
S7LR-M_NON_MS10
IC101
MSD804KKX
PCMDATA[0]/GPIO129
PCMDATA[1]/GPIO130
PCMDATA[2]/GPIO131
PCMDATA[3]/GPIO123
PCMDATA[4]/GPIO122
PCMDATA[5]/GPIO121
PCMDATA[6]/GPIO120
PCMDATA[7]/GPIO119
PCMADR[0]/GPIO128
PCMADR[1]/GPIO127
PCMADR[2]/GPIO125
PCMADR[3]/GPIO124
PCMADR[4]/GPIO102
PCMADR[5]/GPIO104
PCMADR[6]/GPIO105
PCMADR[7]/GPIO106
PCMADR[8]/GPIO111
PCMADR[9]/GPIO113
PCMADR[10]/GPIO117
PCMADR[11]/GPIO115
PCMADR[12]/GPIO107
PCMADR[13]/GPIO110
PCMADR[14]/GPIO109
PCMREG_N/GPIO126
PCMOE_N/GPIO116
PCMWE_N/GPIO195
PCMIORD_N/GPIO114
PCMIOWR_N/GPIO112
PCMCE_N/GPIO118
PCMIRQA_N/GPIO108
PCMCD_N/GPIO133
PCMWAIT_N/GPIO103
PCM_RESET/GPIO132
PCM2_CE_N/GPIO134
PCM2_IRQA_N/GPIO135
PCM2_CD_N/GPIO138
PCM2_WAIT_N/GPIO136
PCM2_RESET/GPIO137
UART1_TX/GPIO46
UART1_RX/GPIO47
UART2_TX/GPIO68
UART2_RX/GPIO67
UART3_TX/GPIO50
UART3_RX/GPIO51
I2C_SCKM2/DDCR_CK/GPIO75
I2C_SDAM2/DDCR_DA/GPIO74
DDCA_DA/UART0_TX
DDCA_CK/UART0_RX
PWM0/GPIO69
PWM1/GPIO70
PWM2/GPIO71
PWM3/GPIO72
PWM4/GPIO73
PWM_PM/GPIO197
SAR0/GPIO34
SAR1/GPIO35
SAR2/GPIO36
SAR3/GPIO37
SAR4/GPIO38
VSYNC_LIKE/GPIO146
SPI1_CK/GPIO199
SPI1_DI/GPIO200
SPI2_CK/GPIO201
SPI2_DI/GPIO202
5V_DET_HDMI_2
5V_DET_HDMI_4
AV_CVBS_DET
AV2_CVBS_DET
SC1/COMP1_DET
TUNER_RESET
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
BR_RESET_DEMOD
PM_UART_RX/GPIO_PM[5]/GPIO11
PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
PM_SPI_CZ0/GPIO_PM[12]/GPIO0
AMP_RESET
FRC_RESET
HP_DET
S2_RESET
NAND_ENNAND_EN
LNA_CTRL_1
LNA_CTRL_2
SYM.D
NF_CE1Z/GPIO141
NF_WPZ/GPIO196
NF_CEZ/GPIO140
NF_CLE/GPIO139
NF_REZ/GPIO142
NF_WEZ/GPIO143
NF_ALE/GPIO144
NF_RBZ/GPIO145
GPIO_PM[0]/GPIO6
PM_UART_TX/GPIO_PM[1]/GPIO7
GPIO_PM[2]/GPIO8
GPIO_PM[3]/GPIO9
GPIO_PM[4]/GPIO10
GPIO_PM[7]/GPIO13
GPIO_PM[8]/GPIO14
GPIO_PM[9]/GPIO15
GPIO_PM[11]/GPIO17
PM_SPI_SCK/GPIO1
PM_SPI_SDI/GPIO2
PM_SPI_SDO/GPIO3
TS0CLK/GPIO90
TS0VALID/GPIO88
TS0SYNC/GPIO89
TS0DATA_[0]/GPIO80
TS0DATA_[1]/GPIO81
TS0DATA_[2]/GPIO82
TS0DATA_[3]/GPIO83
TS0DATA_[4]/GPIO84
TS0DATA_[5]/GPIO85
TS0DATA_[6]/GPIO86
TS0DATA_[7]/GPIO87
TS1CLK/GPIO101
TS1VALID/GPI99
TS1SYNC/GPIO100
TS1DATA_[0]/GPIO91
TS1DATA_[1]/GPIO92
TS1DATA_[2]/GPIO93
TS1DATA_[3]/GPIO94
TS1DATA_[4]/GPIO95
TS1DATA_[5]/GPIO96
TS1DATA_[6]/GPIO97
TS1DATA_[7]/GPIO98
AE18
AC17
AD18
AC18
AC19
AD17
AE17
AD19
H5
K6
K5
J6
K4
L6
C2
L5
M6
M5
C1
M4
A2
R147 33
D3
B2
B1
R151 33
for SERIAL FLASH
Y14
AA10
Y12
Y13
Y11
AA12
AB12
AA14
AB14
AA13
AB11
AC15
AD15
AC16
AD16
AE15
AE14
AC13
AC14
AD12
AD13
AD14
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
S7LR-M_NON_MS10
MSD804KKX
SYM.A
C7
GPIO39
E6
GPIO40
F5
GPIO41
B6
GPIO42
E5
GPIO43
D5
GPIO44
B7
GPIO45
E7
GPIO48
F7
GPIO49
AB5
GPIO52
AB3
GPIO53
A9
GPIO54
F4
GPIO55
AB1
I2C_SCKM0/GPIO56
N6
I2C_SDAM0/GPIO57
AB2
GPIO76
AC2
GPIO77
R146 33
FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
IC101
LVA0P
LVA0N
LVA1P
LVA1N
LVA2P
LVA2N
LVA3P
LVA3N
LVA4P
LVA4N
LVB0P
LVB0N
LVB1P
LVB1N
LVB2P
LVB2N
LVB3P
LVB3N
LVB4P
LVB4N
LVACLKP
LVACLKN
LVBCLKP
LVBCLKN
GPIO194
GPIO191
GPIO192
GPIO193
AB25
AB23
AC25
AB24
AD25
AC24
AE23
AC23
AC22
AD23
V23
U24
V25
V24
W25
W23
AA23
Y24
AA25
AA24
AE24
AD24
Y23
W24
T25
U23
T24
T23
/PF_WP
/PF_CE0
/PF_CE1
/PF_OE
/PF_WE
PF_ALE
/F_RB
POWER_DET
PM_TXD
INV_CTL
RL_ON
POWER_ON/OFF_1
PM_RXD
/SPI_CS
/FLASH_WP
SIDE_HP_MUTE
PANEL_CTL
PM_MODEL_OPT_0
AMP_MUTE
SPI_SCK
SPI_SDO
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0-7]
R180
4.7K
from CI SLOT
FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYNC
FE_TS_DATA[0-7]
Internal demod out
FE_TS_DATA[0]
RXA0+
RXA0RXA1+
RXA1RXA2+
RXA2RXA3+
RXA3RXA4+
RXA4-
RXB0+
RXB0RXB1+
RXB1RXB2+
RXB2RXB3+
RXB3RXB4+
RXB4-
RXACK+
RXACKRXBCK+
RXBCK-
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_8
+3.5V_ST
SPI_SDI
FE_TS_DATA[0]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
2012/09/19
MAIN1_NON_EU 51
Page 39
MODEL OPTION
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
IF_AGC_SEL
LNA2_CTL
RF_SWITCH_CTL
SC1_R+/COMP1_Pr+
SC1_G+/COMP1_Y+
SC1_B+/COMP1_Pb+
SC1_SOG_IN
SC1_CVBS_IN
SC1/COMP1_L_IN
SC1/COMP1_R_IN
R201 100
R202
R203
R204 100
R225 100
R228 100
R230 100
R229 100
R213 100
PM_MODEL_OPT_1
HDMI
CEC_REMOTE_S7
SC1_ID
SC1_FB
DEMOD_SCL
DEMOD_SDA
COMP2
COMP2_Y+/AV_CVBS_IN
CVBS In/OUT
COMP2_Y+/AV_CVBS_IN
DTV/MNT_VOUT
+2.5V_Normal
OPT
BOOSTER_OPT
RF_SW_OPT
OPT
OPT
OPT
OPT
OPT
OPT
CK+_HDMI4
CK-_HDMI4
D0+_HDMI4
D0-_HDMI4
D1+_HDMI4
D1-_HDMI4
D2+_HDMI4
D2-_HDMI4
DDC_SDA_4
DDC_SCL_4
HPD4
CK+_HDMI2
CK-_HDMI2
D0+_HDMI2
D0-_HDMI2
D1+_HDMI2
D1-_HDMI2
D2+_HDMI2
D2-_HDMI2
DDC_SDA_2
DDC_SCL_2
HPD2
COMP2_Pr+
COMP2_Pb+
TU_CVBS
AV2_CVBS_IN
100
0
+3.3V_Normal
1K
1K
S/W_AJ
R290
R298
1K
1K
OPT
R293
R297
+2.5V_Normal
MIU1-128M
DUALSTREAM
R291 1K
R222 1K
MIU1-NO_DDR
R294 1K
R224 1K
NON_DUALSTREAM
POWER_ON/OFF_2
POWER_ON/OFF_2
1000pF
DVB_S
R221 1K
NON_DVB_S
R223 1K
C203
OPT
MIU0-256M
MIU0-128M
+3.3V_Normal
M120
DVB_T2
R208 1K
R206 1K
R211 1K
NON_M120
NON_DVB_T2
R212 1K
R207 1K
R209 1K
R214 2.2
R215 2.2
R237 33
R238 68
R239
33
R240
68
R241 33
R242 68
R244 33
R246 33
R249 33
AV2
R252 68
50V
Close to MSTAR
HD
PHM_ON
R226 1K
FHD
PHM_OFF
R227 1K
C218 0.047uF
C219 0.047uF
C220 0.047uF
C221 0.047uF
C222 0.047uF
C223 0.047uF
C224 1000pF
C225 0.047uF
C227 0.047uF
C230 0.047uF
AV2
C233 0.047uF
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
MODEL_OPT_7
MODEL_OPT_8
J2
RXACKP
J3
RXACKN
K3
RXA0P
J1
RXA0N
K2
RXA1P
K1
RXA1N
L2
RXA2P
L3
RXA2N
T5
DDCDA_DA/GPIO27
T4
DDCDA_CK/GPIO26
V5
HOTPLUGA/GPIO22
R5
HOTPLUGD/GPIO25
AE9
RXCCKP
AC9
RXCCKN
AC10
RXC0P
AD9
RXC0N
AC11
RXC1P
AD10
RXC1N
AE11
RXC2P
AD11
RXC2N
AE8
DDCDC_DA/GPIO31
AD8
DDCDC_CK/GPIO30
AC8
HOTPLUGC/GPIO24
F2
RXBCKP
F3
RXBCKN
G3
RXB0P
F1
RXB0N
G2
RXB1P
G1
RXB1N
H2
RXB2P
H3
RXB2N
R6
DDCDB_DA/GPIO29
U6
DDCDB_CK/GPIO28
P5
HOTPLUGB/GPIO23
R4
CEC/GPIO5
P2
HSYNC0
R3
VSYNC0
N2
RIN0P
P3
RIN0M
N3
GIN0P
N1
GIN0M
M3
BIN0P
M2
BIN0M
M1
SOGIN0
V2
HSYNC1
V3
VSYNC1
U3
RIN1P
U2
RIN1M
T1
GIN1P
T2
GIN1M
R2
BIN1P
R1
BIN1M
T3
SOGIN1
AA2
HSYNC2
Y2
RIN2P
AA3
RIN2M
W2
GIN2P
Y3
GIN2M
V1
BIN2P
W3
BIN2M
W1
SOGIN2
AA8
CVBS0
Y4
CVBS1
W4
CVBS2
AA5
CVBS3
Y5
NC_5
AA4
NC_7
Y6
NC_6
AA1
CVBSOUT1
AB4
VCOM
MODEL OPTION
PIN NAME
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
MODEL_OPT_7
* Dual Stream is only Korea 3D spec
MODEL_OPT_4
S7LR-M_NON_MS10
MSD804KKX
SYM.C
IC101
PIN NO.
AB3
F4
AB2
NON_DVB_T2
T25
NON_M120
MIU0-128M
U23
NON_DVB_S
T24
MIU1-NO_DDR
B8
A8
NON_DUALSTREAM
MODEL_OPT_6
I2C_SCKM1/GPIO78
I2C_SDAM1/GPIO79
SPDIF_IN/GPIO150
SPDIF_OUT/GPIO151
USB0_DM
USB0_DP
USB1_DM
USB1_DP
I2S_IN_BCK/GPIO148
I2S_IN_SD/GPIO149
I2S_IN_WS/GPIO147
I2S_OUT_BCK/GPIO154
I2S_OUT_MCK/GPIO152
I2S_OUT_SD/GPIO155
I2S_OUT_WS/GPIO153
GPIO_PM[13]/GPIO19
AUOUTL2
AVDD5V_MHL
GPIO_PM[14]/GPIO20
AUOUTR2
GPIO_PM[15]/GPIO21
EARPHONE_OUTL
EARPHONE_OUTR
RP/GPIO63
TP/GPIO60
RN/GPIO66
LED1/GPIO59
TN/GPIO62
LED0/GPIO58
IRIN/GPIO4
HWRESET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LOW
FHD
PHM_OFF
NC_8
NC_9
IP
IM
SIFP
SIFM
IF_AGC
RF_AGC
XIN
XOUT
AUL0
AUR0
AUL1
AUR1
AUL2
AUR2
AUL3
AUR3
AUL4
AUR4
AUVRM
AUVAG
AUVRP
GPIO61
GPIO64
GPIO65
ARC0
AC4
AD3
AC3
AE3
AD4
AC5
AD2
AE2
AE6
AD6
AD1
AC1
D7
D6
E3
E2
AC12
AE12
C8
D8
D9
B10
C9
B9
C10
AB9
AA11
Y9
AA9
AA7
AB8
Y8
Y10
AC7
AD7
W6
V6
V4
Y7
W5
U5
AD5
AE5
AC6
AA6
AB6
C6
C5
A6
C4
B5
C3
A3
B3
B4
N4
T6
N5
R287
C238
C239 2.2uF
C242 2.2uF
C243 2.2uF
CHANGE TO X5R
L203 HEAD_PHONE5.6uH
L205 HEAD_PHONE5.6uH
R210 0
HDMI1_ARC
HIGH
HD
PHM_ON
DVB_T2
M120
MIU0-256M
DVB_S
MIU1-128M
DUALSTREAM
Close to MSTAR
R288 100
HALF_NIM/EU_NON_T2
R289 100
HALF_NIM/EU_NON_T2
C250 0.1uF
C251 0.1uF
ANALOG SIF
Close to MSTAR
+3.3V_Normal
L227
BLM18PG121SN1D
HALF_NIM/EU_NON_T2
HALF_NIM/EU_NON_T2
1M
TP209
TUNER_I2C
TU_SCL
TU_SDA
X201
24MHz
R296 100
SPDIF_OPTIC
AV2
2.2uF
AV2
C249
4.7uF
C231 1uF
HDMI1_ARC
C282
0.1uF
XTAL_LOAD_27pF
XTAL_LOAD_27pF
AVDD5V_MHL
C253
1uF
C257 0.1uF
C258 0.1uF
R216 47
R218 47
C261 27pF
C262 27pF
MHL_CD_SENSE
/VBUS_EN
C256
0.1uF
128M+128M
256M+128M
HALF_NIM/EU_NON_T2
HALF_NIM/EU_NON_T2
C264
1000pF
OPT
50V
HALF_NIM/EU_NON_T2
R220
10K
HALF_NIM/EU_NON_T2
R219
0
XTAL_LOAD_30pF
30pF
C261-*1
XTAL_LOAD_30pF
C262-*1
30pF
SPDIF_OUT
AMP_SCL
AMP_SDA
COMP2_DET
L202
BLM18SG121TN1D
C263
10uF
EPHY_RP
EPHY_TP
EPHY_RN
EPHY_TN
URSA_SDA
URSA_SCL
URSA_SDA
URSA_SCL
IR
HDMI_ARC
SOC_RESET
Memory OPTION
Memory
128M
MODEL_OPT_4
PIN NO.
0
U23
0
1256M
1
DTV_IF
IF_P_MSTAR
HALF_NIM/IF_FILTER
C287
C288
33pF
OPT
C285
0.047uF
25V
IF_N_MSTAR
HALF_NIM/IF_FILTER
C289
33pF
TU_SIF
HALF_NIM/EU_NON_T2
IF_AGC_MAIN
Close to MSTAR
CI_DET
SIDE USB
SIDE_USB1_DM
SIDE_USB1_DP
AV2_L_IN
AV2_R_IN
COMP2_L_IN
COMP2_R_IN
AUDIO IN
C272
C268
4.7uF
4.7uF
10V
10V
HEAD_PHONE
HEAD_PHONE
SOC_RESET
POWER_DET_RESET
RESET_IC_SOC_RESET
RESET_IC_SOC_RESET
R266
470
C202
4.7uF
10V
+3.5V_SOC_RESET
MODEL_OPT_6
PIN NO.
0
1
0
1
AUD_SCK
AUD_MASTER_CLK_0
AUD_LRCH
I2S_I/F
AUD_LRCK
AUDIO OUT
SCART1_Lout
SCART1_Rout
H/P OUT
HP_LOUT
HP_ROUT
+3.5V_ST
JTP-1127WEM
C200
4.7uF
10V
R200
62K
B8
SWICH
SW200
1 2
43
R217
SWICH
R205
100
C201
0.1uF
Note
Ginga
0
SOC_RESET
+1.10V_VDDC
C228
+3.3V_Normal
0.1uF
C255
Normal 2.5V
+2.5V_Normal
CAP_10uF_X5R
CHANGE TO
10UF 10V X5R
AVDD2P5
L211
BLM18PG121SN1D
10uF
10V
85C
C269
AVDD2P5_MOD
L229
BLM18PG121SN1D
+1.5V_DDR
C266
STby 3.5V
+3.5V_ST
C275
10uF 10V
10uF 10V
L204
BLM18PG121SN1D
CHANGE TO
C259 0.1uF
10UF 10V X5R
BLM18PG121SN1D
AVDD2P5:172mA
AVDD25_PGA:13mA
C291
0.1uF
16V
BLM18PG121SN1D
0.1uF
L206
BLM18PG121SN1D
AVDD_DMPLL
L207
BLM18PG121SN1D
C277 1uF
C280 1uF
VDD33
85C
10uF 10V
C284
CAP_10uF_X5R
AVDD_AU33
L208
C273
0.1uF
C269-*1
10uF 10V
CAP_10uF_X7R
DDR3 1.5V
L209
AVDD_NODIE
C286
0.1uF
C205
0.1uF
VDDC 1.05V
C283 0.1uF
Normal Power 3.3V
85C
10uF 10V
C204
CAP_10uF_X5R
CHANGE TO
10UF 10V X5R
C240
0.1uF
C274
0.1uF
10uF 10V
C278
C252
0.1uF
C209 0.1uF
C241
0.1uF
AVDD_DDR0:55mA
AVDD_DDR1:55mA
+1.10V_VDDC
C235 0.1uF
C245 0.1uF
AVDD_MIU
C248
0.1uF
L228
BLM18PG121SN1D
C296
10uF
10V
C207
C284-*1
10uF 10V
CAP_10uF_X7R
C204-*1
10uF 10V
CAP_10uF_X7R
1uF
C254
0.1uF
MIUVDDC
C279
0.1uF
VDDC : 2026mA
FB_CORE
FB_CORE
AVDD2P5_MOD
AVDD_NODIE
AVDD_DMPLL
AVDD_AU33
NC4_S7LRM
MAIN2_NON_EU
MIUVDDC
AVDD2P5
VDD33
VDD33
AVDD_MIU
+1.10V_VDDC
+1.10V_VDDC
AVDD25_PGA
AVSS_PGA
C260
1uF
MSD804KKX
S7LR-M_NON_MS10
K12
AVDDLV_USB
G9
VDDC_1
H9
VDDC_2
K10
VDDC_3
K11
VDDC_4
L10
VDDC_5
M12
VDDC_6
M13
VDDC_7
N12
VDDC_8
P14
VDDC_9
P15
VDDC_10
R10
VDDC_11
R14
VDDC_12
R15
VDDC_13
T10
VDDC_14
P10
NC_2
P19
FB_CORE
R16
AVDDL_MOD
L11
NC_1
M14
DVDD_DDR
W9
AVDD2P5_ADC_1
W10
AVDD2P5_ADC_2
W11
AVDD2P5_ADC_3
W12
AVDD2P5_ADC_4
Y17
AVDD25_LAN
V18
AVDD_MOD_1
U19
AVDD_MOD_2
W14
NC_3
W15
NC_4
U7
AVDD_NODIE
L7
AVDD_DVI_USB_1
M7
AVDD_DVI_USB_2
P7
AVDD3P3_MPLL
R7
AVDD_DMPLL
M19
DVDD_NODIE
V7
AVDD_AU33
W7
AVDD_EAR33
R19
VDDP_1
T19
VDDP_2
W18
AVDD_LPLL_1
W19
AVDD_LPLL_2
V19
VDDP_NAND
J17
AVDD_DDR0_D_1
K15
AVDD_DDR0_D_2
K16
AVDD_DDR0_D_3
L15
AVDD_DDR0_C
K17
AVDD_DDR1_D_1
L17
AVDD_DDR1_D_2
M17
AVDD_DDR1_D_3
L16
AVDD_DDR1_C
E9
GND_EFUSE
A23
GND_1
B17
GND_2
C23
GND_3
A5
GND_4
C11
GND_5
C19
GND_6
C22
GND_7
D14
GND_8
D18
GND_9
D19
GND_10
E17
GND_11
E18
GND_12
E19
GND_13
E22
GND_14
F8
GND_15
F17
GND_16
F18
GND_17
F19
GND_18
G8
GND_19
H8
GND_20
N22
GND_21
N21
GND_22
N20
GND_23
M22
GND_24
M21
GND_25
M20
GND_26
F10
GND_27
V15
GND_28
W16
GND_29
V8
GND_30
T18
GND_31
IC101
SYM.E
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
2012.09.19
52
G10
G11
G12
G13
G14
G17
G18
G19
G24
H11
H12
H13
H14
H15
H16
H17
H18
H19
J9
J10
J11
J12
J13
J14
J15
J16
J18
J19
J25
K9
K13
K14
H10
K18
K19
K22
L8
L9
J8
L12
L13
L18
L19
M8
K8
M10
M11
L14
M15
M16
M18
M25
N10
N11
N13
N14
N15
N16
N17
N19
K7
P8
P9
M9
P11
P13
P16
P17
P18
P12
R8
R9
R11
R12
R13
R17
T8
T9
N7
T11
T12
T13
T14
T15
T16
T17
U8
U9
U10
U11
U12
U13
U14
U15
U16
U17
R18
V9
V10
V11
V12
V14
V17
T7
E8
Page 40
RS-232C
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
RS232_PHONE
RS232_PHONE
RS232_PHONE
RS232_PHONE
C5302
0.1uF
C5303
0.1uF
C5304
0.1uF
C5305
0.1uF
DOUT2
RIN2
C1+
C1-
C2+
C2-
V+
V-
RS232_PHONE
IC5301
MAX3232CDR
1
2
3
4
5
6
7
8
EAN41348201
HEAD_PHONE
R5309
RS232_PHONE
R5302
+3.5V_ST
OPT
D5301
ADUC 20S 02 010L
RS232_PHONE
C5306
0.1uF
VCC
16
GND
15
DOUT1
14
RIN1
13
ROUT1
12
DIN1
11
DIN2
10
ROUT2
9
PM_RXD
PM_TXD
20V
HP_LOUT
HP_ROUT
HP_DET
RS232_PHONE
OPT
D5302
ADUC 20S 02 010L
20V
HEAD_PHONE
C5307
10uF
16V
HEAD_PHONE
C5308
10uF
16V
+3.3V_Normal
R5306
10K
R5305
1K
HEAD_PHONE
100
R5301
100
HEAD_PHONE
OPT
C5309
1000pF
50V
OPT
C5310
1000pF
50V
HEAD_PHONE
R5307
1K
HEAD_PHONE
R5308
1K
0
RS232_PHONE
6M6
1M1
3M3_DETECT
4M4
5M5_GND
KJA-PH-1-0177
JK5301
HEAD_PHONE
JK5301-*1
KJA-PH-0-0177
5GND
4L
3DETECT
1R
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
RS232C_PHONE
2012/06/21
53
Page 41
AVDD_DDR0
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
R1201
R1202
AVDD_DDR0
1K 1%
0.1uF
1K 1%
C1201
A-MVREFDQ
1000pF
C1202
R1204
R1205
1K 1%
0.1uF
1K 1%
C1203
A-MVREFCA
1000pF
C1204
L1202
CIC21J501NE
C1251
AVDD_DDR0+1.5V_DDR
1uF
1uF
1uF
1uF
C1217
C1218
0.1uF
0.1uF
C1206
C1239
10uF10V
C1219
C1238
C1241
1uF
DDR_1600_2G_SS
IC1201-*1
K4B2G1646E-BCK0
EAN61848802
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
CLose to DDR3
DDR_1600_2G_NANYA
IC1201-*2
NT5CB128M16FP-DI
EAN61859702
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
N3
A0
VREFCA
P7
A1
P3
A2
N2
A3
VREFDQ
P8
A4
P2
A5
R8
A6
ZQ
R2
A7
T8
A8
R3
A9
VDD_1
L7
A10/AP
VDD_2
R7
A11
VDD_3
N7
A12/BC
VDD_4
T3
A13
VDD_5
VDD_6
M7
NC_6
VDD_7
VDD_8
M2
BA0
VDD_9
N8
BA1
M3
BA2
VDDQ_1
J7
CK
VDDQ_2
K7
CK
VDDQ_3
K9
CKE
VDDQ_4
VDDQ_5
L2
CS
VDDQ_6
K1
ODT
VDDQ_7
J3
RAS
VDDQ_8
K3
CAS
VDDQ_9
L3
WE
NC_1
T2
RESET
NC_2
NC_3
NC_4
F3
DQSL
NC_5
G3
DQSL
C7
DQSU
VSS_1
B7
DQSU
VSS_2
VSS_3
E7
DML
VSS_4
D3
DMU
VSS_5
VSS_6
E3
DQL0
VSS_7
F7
DQL1
VSS_8
F2
DQL2
VSS_9
F8
DQL3
VSS_10
H3
DQL4
VSS_11
H8
DQL5
VSS_12
G2
DQL6
H7
DQL7
VSSQ_1
D7
DQU0
VSSQ_2
C3
DQU1
VSSQ_3
C8
DQU2
VSSQ_4
C2
DQU3
VSSQ_5
A7
DQU4
VSSQ_6
A2
DQU5
VSSQ_7
B8
DQU6
VSSQ_8
A3
DQU7
VSSQ_9
M8
H1
L8
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DDR_1600_1G_HYNIX
IC1201-*3
H5TQ1G63EFR-PBC
EAN61829003
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
NC_7
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
DDR_1600_1G_SS
IC1201-*4
K4B1G1646G-BCK0
EAN61836301
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
M2
N8
M3
J7
K7
K9
L2
K1
J3
K3
L3
T2
F3
G3
C7
B7
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
M8
A0
VREFCA
A1
A2
H1
A3
VREFDQ
A4
A5
L8
A6
ZQ
A7
A8
B2
A9
VDD_1
D9
A10/AP
VDD_2
G7
A11
VDD_3
K2
A12/BC
VDD_4
K8
A13
VDD_5
N1
VDD_6
N9
NC_5
VDD_7
R1
VDD_8
R9
BA0
VDD_9
BA1
BA2
A1
VDDQ_1
A8
CK
VDDQ_2
C1
CK
VDDQ_3
C9
CKE
VDDQ_4
D2
VDDQ_5
E9
CS
VDDQ_6
F1
ODT
VDDQ_7
H2
RAS
VDDQ_8
H9
CAS
VDDQ_9
WE
J1
NC_1
J9
RESET
NC_2
L1
NC_3
L9
NC_4
T7
DQSL
NC_6
DQSL
A9
DQSU
VSS_1
B3
DQSU
VSS_2
E1
VSS_3
G8
DML
VSS_4
J2
DMU
VSS_5
J8
VSS_6
M1
DQL0
VSS_7
M9
DQL1
VSS_8
P1
DQL2
VSS_9
P9
DQL3
VSS_10
T1
DQL4
VSS_11
T9
DQL5
VSS_12
DQL6
DQL7
B1
VSSQ_1
B9
DQU0
VSSQ_2
D1
DQU1
VSSQ_3
D8
DQU2
VSSQ_4
E2
DQU3
VSSQ_5
E8
DQU4
VSSQ_6
F9
DQU5
VSSQ_7
G1
DQU6
VSSQ_8
G9
DQU7
VSSQ_9
DDR_1600_1G_NANYA
IC1201-*5
NT5CB64M16DP-DH
EAN61859501
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12
T3
NC_6
M7
NC_5
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
RESET
F3
DQSL
G3
DQSL
C7
DQSU
B7
DQSU
E7
DML
D3
DMU
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
CLose to Saturn7M IC
M8
VREFCA
H1
VREFDQ
L8
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_7
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
A-MVREFCA
A-MVREFDQ
AVDD_DDR0
C120510uF10V
C122710uF10V
C1207 0.1uF
C1208 0.1uF
C1210 0.1uF
C1211 0.1uF
C1212 0.1uF
C1213 0.1uF
C1214 0.1uF
C1215 0.1uF
A-MA14
DDR_1600_2G_HYNIX
IC1201
H5TQ2G63DFR-PBC
EAN61829203
M8
VREFCA
H1
VREFDQ
R1203
L8
240
1%
ZQ
B2
VDD_1
D9
VDD_2
G7
VDD_3
K2
VDD_4
K8
VDD_5
N1
VDD_6
N9
VDD_7
R1
VDD_8
R9
VDD_9
A1
VDDQ_1
A8
VDDQ_2
C1
VDDQ_3
C9
VDDQ_4
D2
VDDQ_5
E9
VDDQ_6
F1
VDDQ_7
H2
VDDQ_8
H9
VDDQ_9
J1
NC_1
J9
NC_2
L1
NC_3
L9
NC_4
T7
NC_6
A9
VSS_1
B3
VSS_2
E1
VSS_3
G8
VSS_4
J2
VSS_5
J8
VSS_6
M1
VSS_7
M9
VSS_8
P1
VSS_9
P9
VSS_10
T1
VSS_11
T9
VSS_12
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
A10/AP
A12/BC
NC_5
RESET
DQSL
DQSL
DQSU
DQSU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
IC101
MSD804KKX
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
R7
A11
N7
T3
A13
M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
L2
CS
K1
ODT
J3
RAS
K3
CAS
L3
WE
T2
F3
G3
C7
B7
E7
DML
D3
DMU
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
A-MA0
A-MA1
A-MA2
A-MA3
A-MA4
A-MA5
A-MA6
A-MA7
A-MA8
A-MA10 A-MA10
A-MA11
A-MA12
A-MA13
A-MBA0
A-MBA1
A-MBA2
A-MCKE
A-MODT
A-MRASB
A-MCASB
A-MWEB
A-MRESETB
A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDML
A-MDMU
A-MDQL0
A-MDQL1
A-MDQL2
A-MDQL3
A-MDQL4
A-MDQL5
A-MDQL6
A-MDQL7
A-MDQU0
A-MDQU1
A-MDQU2
A-MDQU3
A-MDQU4
A-MDQU5
A-MDQU6
A-MDQU7
R1235
56
R1236
56
R1231
10K
A-MCK
1%
C1209
0.01uF
50V
1%
A-MCKB
AVDD_DDR0
A-MRESETB
A-MDQSLB
A-MDQSUB
A-MA0
A-MA1
A-MA2
A-MA3
A-MA4
A-MA5
A-MA6
A-MA7
A-MA8
A-MA9A-MA9
A-MA11
A-MA12
A-MA13
A-MA14
A-MBA0
A-MBA1
A-MBA2
A-MCK
A-MCKB
A-MCKE
A-MODT
A-MRASB
A-MCASB
A-MWEB
A-MDQSL
A-MDQSU
A-MDML
A-MDMU
A-MDQL0
A-MDQL1
A-MDQL2
A-MDQL3
A-MDQL4
A-MDQL5
A-MDQL6
A-MDQL7
A-MDQU0
A-MDQU1
A-MDQU2
A-MDQU3
A-MDQU4
A-MDQU5
A-MDQU6
A-MDQU7
S7LR-M_NON_MS10
A11
A_DDR3_A[0]
C14
B11
F12
C15
E12
A14
D11
B14
D12
C16
C13
A15
E11
B13
F13
B15
E13
C17
A17
B16
E14
B12
A12
C12
F11
B19
C18
B18
A18
E15
A21
D17
G15
B21
F15
B22
F14
A22
D15
G16
B20
F16
C21
E16
A20
D16
C20
A_DDR3_A[1]
A_DDR3_A[2]
A_DDR3_A[3]
A_DDR3_A[4]
A_DDR3_A[5]
A_DDR3_A[6]
A_DDR3_A[7]
A_DDR3_A[8]
A_DDR3_A[9]
A_DDR3_A[10]
A_DDR3_A[11]
A_DDR3_A[12]
A_DDR3_A[13]
A_DDR3_A[14]
A_DDR3_BA[0]
A_DDR3_BA[1]
A_DDR3_BA[2]
A_DDR3_MCLK
A_DDR3_MCLKZ
A_DDR3_MCLKE
A_DDR3_ODT
A_DDR3_RASZ
A_DDR3_CASZ
A_DDR3_WEZ
A_DDR3_RESET
A_DDR3_DQSL
A_DDR3_DQSLB
A_DDR3_DQSU
A_DDR3_DQSUB
A_DDR3_DQML
A_DDR3_DQMU
A_DDR3_DQL[0]
A_DDR3_DQL[1]
A_DDR3_DQL[2]
A_DDR3_DQL[3]
A_DDR3_DQL[4]
A_DDR3_DQL[5]
A_DDR3_DQL[6]
A_DDR3_DQL[7]
A_DDR3_DQU[0]
A_DDR3_DQU[1]
A_DDR3_DQU[2]
A_DDR3_DQU[3]
A_DDR3_DQU[4]
A_DDR3_DQU[5]
A_DDR3_DQU[6]
A_DDR3_DQU[7]
SYMBOL.B
B_DDR3_A[0]
B_DDR3_A[1]
B_DDR3_A[2]
B_DDR3_A[3]
B_DDR3_A[4]
B_DDR3_A[5]
B_DDR3_A[6]
B_DDR3_A[7]
B_DDR3_A[8]
B_DDR3_A[9]
B_DDR3_A[10]
B_DDR3_A[11]
B_DDR3_A[12]
B_DDR3_A[13]
B_DDR3_A[14]
B_DDR3_BA[0]
B_DDR3_BA[1]
B_DDR3_BA[2]
B_DDR3_MCLK
B_DDR3_MCLKZ
B_DDR3_MCLKE
B_DDR3_ODT
B_DDR3_RASZ
B_DDR3_CASZ
B_DDR3_WEZ
B_DDR3_RESET
B_DDR3_DQSL
B_DDR3_DQSLB
B_DDR3_DQSU
B_DDR3_DQSUB
B_DDR3_DQML
B_DDR3_DQMU
B_DDR3_DQL[0]
B_DDR3_DQL[1]
B_DDR3_DQL[2]
B_DDR3_DQL[3]
B_DDR3_DQL[4]
B_DDR3_DQL[5]
B_DDR3_DQL[6]
B_DDR3_DQL[7]
B_DDR3_DQU[0]
B_DDR3_DQU[1]
B_DDR3_DQU[2]
B_DDR3_DQU[3]
B_DDR3_DQU[4]
B_DDR3_DQU[5]
B_DDR3_DQU[6]
B_DDR3_DQU[7]
B23
D25
F22
G22
E24
F21
E23
D22
D24
D21
C24
C25
F23
E21
D23
G20
F24
F20
G25
G23
F25
D20
B25
B24
A24
E20
K24
K25
J21
J20
H24
L20
L23
J24
L24
J23
M24
H23
M23
K23
G21
L22
H22
K20
H20
L21
H21
K21
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
M1_DDR (1DDR)
2012/06/21
54
Page 42
Serial Flash for SPI boot_NON_OS
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
/FLASH_WP
R5502
0
+3.5V_ST
OPT
R5501
10K
MX25L6406EM2I-12G
CS
SO/SIO1
WP
GND
/SPI_CS
SPI_SDO
SFLASH_NON_OS_MX
IC1300-*1
1
2
3
4
8
7
6
5
VCC
HOLD
SCLK
SI/SIO0
+3.5V_ST
OPT
R5503
4.7K
SFLASH_NON_OS_WINBOND
IC1300
W25Q64FVSSIG
CS
1
DO[IO1]
2
WP[IO2]
3
GND
4
SFLASH_OS_WINBOND
IC1300-*2
W25Q80BVSSIG
CS
1
DO[IO1]
2
%WP[IO2]
3
GND
4
VCC
8
%HOLD[IO3]
7
CLK
6
DI[IO0]
5
VCC
8
HOLD[IO3]
7
CLK
6
DI[IO0]
5
+3.5V_ST
R5504
33
SFLASH_OS_MACRONIX
MX25L8006EM2I-12G
CS#
SO/SIO1
WP#
GND
0.1uF
C5501
SPI_SCK
SPI_SDI
IC1300-*3
1
2
3
4
8
7
6
5
VCC
HOLD#
SCLK
SI/SIO0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NC4_S7LRM
S_FLASH_NON_OS
2012.06.21
55
Page 43
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