LG 47LK950S-ZA Schematic

LCD TV

SERVICE MANUAL

CAUTION

BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CHASSIS : LD12P

MODEL : 47LK950S 47LK950S-ZA

North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com

Internal Use Only

Printed in KoreaP/NO : MFL62863069 (1103-REV00)

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LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ................................................................................. 3

SPECIFICATION ....................................................................................... 4

ADJUSTMENT INSTRUCTION .............................................................. 10

BLOCK DIAGRAM.................................................................................. 17

EXPLODED VIEW .................................................................................. 18

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

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LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

SAFETY PRECAUTIONS

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.

It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check.

Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to

0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

1.5 Kohm/10W

To Instrument’s
exposed
METALLIC PARTS

Good Earth Ground
such as WATER PIPE,
CONDUIT etc.

AC Volt-meter

When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1

*Base on Adjustment standard

IMPORTANT SAFETY NOTICE

0.15 uF

Ω

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LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application range

This specification is applied to the LCD TV used LD12P
chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC

2) Relative Humidity : 65 % ± 10 %

3) Power Voltage : Standard input voltage (AC 100-240 V~,
50 / 60 Hz)

* Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.

5) The receiver must be operated for about 5 minutes prior to
the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety : CE, IEC specification

- EMC :CE, IEC

No. Item Specification Remarks

1 Market EU(PAL Market-36Countries) DTV & Analog (Total 36 countries)

DTV (MPEG2/4, DVB-T) : 31 countries

(England/Italy/Germany/France/Spain/Sweden/Finland/Netherlands/Belgium/Luxemburg/

Greece/Denmark/Czech/Austria /Hungary/Swiss/Croatia/Turkey/Norway/Slovenia/Poland/

Ukraine/Portugal/Ireland/Moroco/Latvia/Estonia/Lithania/Rumania/Russia/Slovakia)

DTV (MPEG2/4, DVB-T2): 5 countries

(England/Sweden/Finland/Denmark/Norway)

DTV (MPEG2/4, DVB-C): 10 countries

(Sweden/Finland/Denmark/Norway/Austria/Swiss/Germany/Netherlands/Hungary/Slovenia)

DTV (MPEG2/4, DVB-S) : 31 countries

Albania/Austria/Belgium/Bosnia/Bulgaria/Croatia/Czech/Estonia/France/Germany/Greece/

Hungary/Ireland/Italy/Kazakhstan/Latvia/Lithuania/Luxembourg/Morocco/Netherlands/Poland/

Portugal/Romania/Russia/Serbia/Slovenia/Spain/Slovakia/Switzerland/Turkey/Ukraine

Analog Only - 5 countries

(Bosnia/Serbia/Bulgaria/Albania/Kazakhstan)

Supported satellite : 22 satellites

HISPASAT 1C/1D, ATLANTIC BIRD 2, NILESAT 101/102, ATLANTIC BIRD 3, AMOS 2/3,

THOR 5/6, IRIUS 4, EUTELSAT-W3A, EUROBIRD 9A, EUTELSAT-W2A, HOTBIRD 6/8/9,

EUTELSAT-SESAT, ASTRA 1L/H/M/KR, ASTRA 3A/3B, BADR 4/6, ASTRA 2D, EUROBIRD 3,

EUTELSAT-W7, HELLASSAT 2, EXPRESS AM1, TURKSAT 2A/3A, INTERSAT10

2 Broadcasting system 1) PAL-BG - DVB-T2/S is supported in specific models.

2) PAL-DK 1. DVB-T2 : Model name : xxxxxxxT

3) PAL-I/I’ 2. DVB-S : Model name : xxxxxxxS

4) SECAM DK,BG,I,L/L’ - SECAM L/L’ is not supported in DVB-T2 models.

5) DVB-T/C

6) DVB-T2

7) DVB-S

4. Model General Specification

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Only for training and service purposes

No. Item Specification Remarks

3 Receiving system Analog : Upper Heterodyne

G DVB-T

Digital : COFDM , QAM - Guard Interval(Bitrate_Mbit/s)

1/4, 1/8, 1/16, 1/32

- Modulation : Code Rate

QPSK : 1/2, 2/3, 3/4, 5/6, 7/8

16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

G DVB-C

- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s

- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM

G DVB-T2

- Guard Interval(Bitrate_Mbit/s)

1/4,1/8,1/16,1/32,1/128,19/128,19/256,

- Modulation : Code Rate

QPSK : 1/2, 2/5, 2/3, 3/4, 5/6

16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

G DVB-S

- Symbolrate

DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s

DVB-S (QPSK) : 2 ~ 45Msymbol/s

- viterbi

DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8

DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10

4 Scart Jack (1EA) PAL, SECAM Scart Jack is Full scart and support RF-OUT(analog & DTV)

Not support DTV Auto AV.

5 Video Input RCA(1EA) PAL, SECAM, NTSC 4System : PAL, SECAM, NTSC, PAL60

6 Component Input(1EA) Y/Cb/Cr, Y/Pb/Pr

7 RGB Input RGB-PC Analog(D-SUB 15PIN)

8 HDMI Input (3EA) HDMI1-DTV (DVI) PC(HDMI version 1.3)

HDMI2-DTV Support HDCP

HDMI3-DTV

9 Audio Input (3EA) RGB/DVI Audio, Component, AV L/R Input

10 SDPIF out (1EA) SPDIF out

11 Earphone out (1EA) Antenna, AV1, AV2, AV3, Component,

RGB, HDMI1, HDMI2, HDMI3, USB

12 USB (1EA) EMF JPEG, MP3

For Service (download)

DivX HD

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5. Component Video Input (Y, CB/PB, CR/PR)

No.

Specification

Remark

Resolution H-freq(kHz) V-freq(Hz) Proposed

1. 720x480 15.73 60.00 SDTV,DVD 480i

2. 720x480 15.63 59.94 SDTV,DVD 480i

3. 720x480 31.47 59.94 480p

4. 720x480 31.50 60.00 480p

5. 720x576 15.625 50.00 SDTV,DVD 625 Line

6. 720x576 31.25 50.00 HDTV 576p

7. 1280x720 45.00 50.00 HDTV 720p

8. 1280x720 44.96 59.94 HDTV 720p

9. 1280x720 45.00 60.00 HDTV 720p

10. 1920x1080 31.25 50.00 HDTV 1080i

11. 1920x1080 33.75 60.00 HDTV 1080i

12. 1920x1080 33.72 59.94 HDTV 1080i

13. 1920x1080 56.250 50 HDTV 1080p

14. 1920x1080 67.5 60 HDTV 1080p

No.

Specification

Proposed Remarks

Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)

1. 720*400 31.468 70.08 28.321 For only DOS mode

2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz

-> 640*480 60 Hz Display

3. 800*600 37.879 60.31 40.00 VESA

4. 1024*768 48.363 60.00 65.00 VESA(XGA)

5. 1360*768 47.72 59.8 84.75 WXGA

6. 1920*1080 66.587 59.93 138.625 WUXGA FHD model

6. RGB Input (PC)

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7. HDMI Input

(1) DTV Mode

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

1. 720*400 31.468 70.08 28.321 HDCP

2. 640*480 31.469 59.94 25.17 VESA HDCP

3. 800*600 37.879 60.31 40.00 VESA HDCP

4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP

5. 1360*768 47.72 59.8 84.75 WXGA HDCP

6. 1280*1024 63.595 60.0 108.875 SXGA HDCP/FHD model

7. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model

(2) PC Mode

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

1. 720*480 31.469 / 31.5 59.94 / 60 27.00 / 27.03 SDTV 480P

2. 720*576 31.25 50 54 SDTV 576P

3. 1280*720 37.500 50 74.25 HDTV 720P

4. 1280*720 44.96 / 45 59.94 / 60 74.17 / 74.25 HDTV 720P

5. 1920*1080 33.72 / 33.75 59.94 / 60 74.17 / 74.25 HDTV 1080I

6. 1920*1080 28.125 50.00 74.25 HDTV 1080I

7. 1920*1080 26.97 / 27 23.97 / 24 74.17 / 74.25 HDTV 1080P

8. 1920*1080 33.716 / 33.75 29.976 / 30.00 74.25 HDTV 1080P

9. 1920*1080 56.250 50 148.5 HDTV 1080P

10. 1920*1080 67.43 / 67.5 59.94 / 60 148.35 / 148.50 HDTV 1080P

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8. 3D Mode

(1) HDMI Input (1.4a)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1920*1080 53.95 / 54 23.98 / 24 148.35/148.5 HDTV 1080P Frame packing

2 1280*720 89.9 / 90 59.94/60 148.35/148.5 HDTV 720P Frame packing

3 1280*720 75 50 148.5 HDTV 720P Frame packing

4 1920*1080 67.5 60 148.5 HDTV 1080P Side by Side(half), Top and bottom

5 1920*1080 56.3 50 148.5 HDTV 1080P Side by Side(half), Top and bottom

6 1280*720 45 60 74.25 HDTV 720P Side by Side(half), Top and Bottom

7 1280*720 37.5 50 74.25 HDTV 720P Side by Side(half), Top and Bottom

8 1920*1080 33.7 60 74.25 HDTV 1080i Side by Side(half), Top and Bottom

9 1920*1080 28.1 50 74.25 HDTV 1080i Side by Side(half), Top and Bottom

10 1920*1080 27 24 74.25 HDTV 1080P Side by Side(half), Top and Bottom

11 1920*1080 33.7 30 89.1 HDTV 1080P Side by Side(half), Top and Bottom

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1280*720 45.00 60.00 74.25 HDTV 720P Side by Side, Top & Bottom

2 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom

3 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom

4 1920*1080 28.125 50.00 74.25 HDTV 1080I Side by Side, Top & Bottom

5 1920*1080 27.00 24.00 74.25 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard

6 1920*1080 33.75 30.00 74.25 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard

7 1920*1080 67.50 60.00 148.5 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard, Single Frame Sequential

8 1920*1080 56.250 50 148.5 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard, Single Frame Sequential

(2) HDMI Input (1.3)

(3) RF 3D Input(DTV)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom

2 1920*1080 28.125 50 74.25 HDTV 1080I Side by Side, Top & Bottom

(4) USB Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

1 1920*1080 33.75 30.000 74.25 Side by Side HDTV 1080P

Top & Bottom

Checkerboard

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(7) 3D Input mode

(5) RGB-PC Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1920*1080 67.5 60 148.5 HDTV 1080P Side by Side, Top & Bottom

(6) DLNA

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode

1 1920*1080 33.75 30 HDTV 1080P Side by Side, Top & Bottom,

Checkerboard

No. Side by Side Top & Bottom Checkerboard Single Frame Sequential Frame Packing

1.

RL

L

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LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.

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ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied to all of the LCD TV with
LD12P chassis.

2. Designation

(1) Because this is not a hot chassis, it is not necessary to use

an isolation transformer. However, the use of isolation

transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of

25 ºC ± 5 ºC of temperature and 65 % ± 10 % of relative

humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240

V~, 50 / 60Hz.
(5) The receiver must be operated for about 5 minutes prior to

the adjustment when module is in the circumstance of over

15.

In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours

In case of keeping module is in the circumstance of below ­20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.

[Caution]
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.

3. Automatic Adjustment

3.1. MAC Address

(1) Equipment & Condition

- Play file: Serial.exe

- MAC Address edit

- Input Start / End MAC address

(2) Download method

1) Communication Prot connection

Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port

2) MAC Address & CI+ key & Widevine key download

- Com 1,2,3,4 and 115200(Baud rate)

- Mode check : Online Only

- Check the test process: DETECT -> MAC -> CI -> Widevine

- Play : START

- Result : Ready, Test, OK or NG

- Printer Out (MAC Address Label)

3.2. LAN Inspection

(1) Equipment & Condition

A Each other connection to LAN Port of IP Hub and Jig

(2) LAN inspection solution

A LAN Port connection with PCB
A Network setting at MENU Mode of TV
A setting automatic IP
A Setting state confirmation

-> If automatic setting is finished, you confirm IP and
MAC Address.

PCBA

PC(RS-232C)

RS-232C Por t

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3.3. Widevine Key Inspection

- Confirm key input Data at the “IN START” MENU Mode.

3.4. LAN PORT INSPECTION(PING TEST)

Connect SET -> LAN port == PC -> LAN Port.

(1) Equipment setting

1) Play the LAN Port Test PROGRAM.

2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2

(2) LAN PORT inspection (PING TEST)

1) Play the LAN Port Test Program.

2) Connect each other LAN Port Jack.

3) Play Test (F9) button and confirm OK Message.

4) Remove LAN cable.

3.5. Model name & serial number download

(1) Model name & Serial number D/L

A Press “Power on” key of service remote control.

(Baud rate : 115200 bps)

A Connect RS232 Signal Cable to RS-232 Jack.
A Write Serial number by use RS-232.
A Must check the serial number at Instart menu.

(2) Method & notice

A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing

Technology Group.

C. Serial number D/L must be conformed when it is produced

in production line, because serial number D/L is mandatory
by D-book 4.0.

* Manual Download (Model Name and Serial Number)

If the TV set is downloaded by OTA or service man, sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It
need Manual download.
a. Press the ‘instart’ key of ADJ remote control.
b. Go to the menu ‘5.Model Number D/L’ like below photo.
c. Input the Factory model name(ex 42LD450-ZA) or Serial

number like photo.

d. Check the model name Instart menu. -> Factory name

displayed. (ex 32LV3700-ZA)

e. Check the Diagnostics.(DTV country only) -> Buyer model

displayed. (ex 32LV3700)

SET PC

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3.7. CI+ Key checking method

Check whether the key was downloaded or not at ‘In Start’

menu. (Refer to below).

=> Check the Download to CI+ key value in LGset.

3.7.1. Check the method of CI+ Key value
(1) Check the method on Instart menu.
(2) Check the method of RS232C Command.

1) Into the main assembly mode (RS232 : aa 00 00)

2) Check the key download for transmitted command.
(RS232 : ci 00 10)

3) Result value

- Normally status for download : OKx

- Abnormally status for download : NGx

3.7.2. Check the method of CI+ Key value (RS232)

1) Into the main assembly mode (RS232 : aa 00 00)

2) Check the method of CI+ key by command.

(RS232 : ci 00 20)

3) Result value
i 01 OK 1d1852d21c1ed5dcx

3.8. WIFI MAC ADDRESS CHECK

(1) Using RS232

(2) Check the menu on in-start.

4. Manual Adjustment

4.1. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download

(1) Overview

It is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of “Plug and Play”.

(2) Equipment

- Adjustment remote control

- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.

(3)Download method

1) Press ADJ key on the Adjustment remote control, then

select “12.EDID D/L”, by pressing Enter key, enter EDID
D/L menu.

2) Select [Start] button by pressing Enter key, HDMI1/

HDMI2/ HDMI3/ RGB are Writing and display OK or NG.

(4) EDID DATA

A HDMI

A RGB

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐⓑ
0x01 ⓒ 01 03 80 10 09 78 0A EE 91 A3 54 4C 99 26

0x02 0F 50 54 A1 08 00 71 40 81 C0 81 00 81 80 95 00

0x03 90 40 A9 C0 B3 00 02 3A 80 18 71 38 2D 40 58 2C

0x04 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30

0x05 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39
0x06 3F 1F 52 10 00 0A 20 20 20 20 20 20 ⓓ
0x07 ⓓ 01 ⓔ1

0x00 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
0x01 22 15 01 26 15 07 50 09 57 07 67 ⓕ
0x02 ⓕ E3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C

0x03 25 00 A0 5A 00 00 00 9E 01 1D 00 80 51 D0 1A 20

0x04 6E 88 55 00 A0 5A 00 00 00 1A 02 3A 80 18 71 38

0x05 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 66 21 50 B0

0x06 51 00 1B 30 40 70 36 00 A0 5A 00 00 00 1E 00 00
0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ⓔ2

CMD 1 CMD 2 Data 0

AA00

CMD 1 CMD 2 Data 0

CI10

CMD 1 CMD 2 Data 0

AA00

CMD 1 CMD 2 Data 0

CI20

CI+ key Value

H-freq(kHz) V-freq.(Hz)

Transmission [A][I][ ][Set ID][ ][20][Cr] [O][K][X] or [NG]

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C0x0D 0x0E 0x0F

0x00 00 FF FF FF FF FF FF 00 1E 6D ⓐⓑ
0x01 ⓒ 01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26

0x02 0F 50 54 A1 08 00 71 4F 01 01 01 01 01 01 95 00

0x03 90 40 A9 C0 B3 00 02 3A 80 18 71 38 2D 40 58 2C

0x04 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30

0x05 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 ⓓ
0x07 ⓓ 01 ⓔ3

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A Reference

- HDMI1 ~ HDMI3 / RGB

- In the data of EDID, bellows may be different by S/W or
Input mode.

ⓐ Product ID

ⓑ Serial No. : Controlled on product line

ⓒ Month, Year: Controlled on production line:

ex) Monthly : ‘01’ -> ‘01’

Year : ‘2010’ -> ‘14’

ⓓ Model Name(Hex):
ⓔ Checksum: Changeable by total EDID data.

ⓕ Vendor Specific(HDMI)

4.2. White Balance Adjustment

4.2.1. Overview

(1) W/B adj. Objective & How-it-works
(2) Objective: To reduce each Panel’s W/B deviation
(3) How-it-works : When R/G/B gain in the OSD is at 192, it

means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.

(4) Adj. condition : normal temperature

1) Surrounding Temperature : 25 ºC ± 5 ºC

2) Warm-up time: About 5 Min

3) Surrounding Humidity : 20 % ~ 80 %

4.2.2 Equipment

1) Color Analyzer: CA-210 (LED Module : CH 14)

2) Adjustment Computer(During auto adj., RS-232C protocol is
needed)

3) Adjustment remote control

4) Video Signal Generator MSPG-925F 720p/204-Gray

(Model:217, Pattern:49)

-> Only when internal pattern is not available

A Color Analyzer Matrix should be calibrated using CS-1000.

4.2.3. Equipment connection MAP

4.2.4. Adj. Command (Protocol)

<Command Format>

- LEN: Number of Data Byte to be sent

- CMD: Command

- VAL: FOS Data value

- CS: Checksum of sent data

- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

A RS-232C Command used during auto-adj.

Ex) wb 00 00 -> Begin white balance auto-adj.

wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. completed

*(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj.

wb 00 ff -> End white balance auto-adj.

A Adj. Map

Model Name HEX EDID Table DDC Function

ALL 0001 0100 Analog

0001 0100 Digital

MODEL MODEL NAME(HEX)

all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20

INPUT MODEL NAME(HEX)

HDMI1 78 03 0C 00 10 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI2 78 03 0C 00 20 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

HDMI3 78 03 0C 00 30 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10

INPUT ⓔ1 ⓔ2 ⓔ3

HDMI1 7F CB X

HDMI2 7F BB X

HDMI3 7F AB X

RGB X X 98

Color Analyzer

Comp uter

Pattern Generator

RS- 232C

RS-232C

RS-232C

Probe

Signal Source

* If TV internal pattern is used, not needed

LEN CMD VAL

CS

RS-232C COMMAND Explanation

[CMD ID DATA]

wb 00 00 Begin White Balance adj.

wb 00 10 Gain adj.(internal white pattern)

wb 00 1f Gain adj. completed

wb 00 20 Offset adj.(internal white pattern)

wb 00 2f Offset adj. completed

wb 00 ff End White Balance adj.(Internal pattern disappears)

ITEM Command Data Range(Hex.) Default(Decimal)

Cmd 1 Cmd 2 Min Max

Cool R-Gain j g 00 C0

G-Gain j h 00 C0

B-Gain j i 00 C0

R-Cut

G-Cut

B-Cut

Medium R-Gain j a 00 C0

G-Gain j b 00 C0

B-Gain j c 00 C0

R-Cut

G-Cut

B-Cut

Warm R-Gain j d 00 C0

G-Gain j e 00 C0

B-Gain j f 00 C0

R-Cut

G-Cut

- 14 -

LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

A 3 Command White Balance Adj. Map

A Infrared Sensor Adj. Map

4.2.5. Adj. method

(1) Auto adj. method

1) Set TV in adj. mode using POWER ON key.

2) Zero calibrate probe then place it on the center of the
Display.

3) Connect Cable (RS-232C)

4) Select mode in adj. Program and begin adjustment.

5) When adj. is completed(OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)

6) Remove probe and RS-232C cable to complete adj..

A W/B Adj. must begin as start command “wb 00 00” , and

finish as end command “wb 00 ff”, and Adj. offset if need.

(2) Manual adj. method

1) Set TV in Adj. mode using POWER ON.

2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10cm of the surface.

3) Press ADJ key -> EZ adjust using adjustment remote
control -> 9.White-Balance then press the cursor to the
right key (G).(When key(G) is pressed 216 Gray internal
pattern will be displayed.)

4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.

5) Adjustment is performed in COOL, MEDIUM, WARM 3
modes of color temperature.

A If internal pattern is not available, use RF input. In EZ

Adj. menu 9.White Balance, you can select one of 2 Test

-pattern: ON, OFF. Default is inner(ON). By selecting
OFF, you can adjust using RF signal in 216 gray pattern.

A Adj. condition and cautionary items

1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.

2) Probe location
: Color Analyzer(CA-210) probe should be within 10 cm

and perpendicular of the module surface.(80°~100°)

3) Aging time

- After Aging Start, keep the Power ON status during

5 Minutes.

- In case of LCD, Back-light on should be checked

using no signal or Full-white pattern.

4.2.6. Reference (White Balance Adj. coordinate
and temperature)

A Luminance : 204 Gray
A Standard color coordinate and temperature using CS-1000

(over 26 inch)

A Standard color coordinate and temperature using CA-210

(CH 14)

4.2.7. Edge LED White balance table

A IOP & Edge LED module change color coordinate because

of aging time.

A Apply under the color coordinate table, for compensated

aging time.

- EDGE LED(LW47XX)

Command SetID R Gain(HEX) G Gain(HEX) B Gain(HEX)

(lower case ASCII)

CMD1 CMD2 MIN MAX MIN MAX MIN MAX

Cool j j 00 00 C0 00 C0 00 C0

Medium j k 00 00 C0 00 C0 00 C0

Warm j l 00 00 C0 00 C0 00 C0

Command R Gain(HEX) G Gain(HEX) B Gain(HEX)

(lower case ASCII)

CMD1 CMD2 MIN MAX MIN MAX MIN MAX

Cool 1 C 00 C0 00 C0 00 C0

Medium 1 D 00 C0 00 C0 00 C0

Warm 1 E 00 C0 00 C0 00 C0

Mode Color Coordination Temp ∆UV

xy

COOL 0.269 0.273 13000 K 0.0000

MEDIUM 0.285 0.293 9300 K 0.0000

WARM 0.313 0.329 6500 K 0.0000

Mode Color Coordination Temp ∆UV

xy

COOL 0.269 ± 0.002 0.273 ± 0.002 13000 K 0.0000

MEDIUM 0.285 ± 0.002 0.293 ± 0.002 9300 K 0.0000

WARM 0.313 ± 0.002 0.329 ± 0.002 6500 K 0.0000

GP2 Aging Time Cool Medium Warm

(Min.) X Y X Y X Y

269 273 285 293 313 329

1 0-2 280 291 296 311 319 340

2 3-5 278 288 294 308 317 338

3 6-9 276 285 292 305 315 335

4 10-15 274 282 290 302 313 332

5 20-35 273 279 289 299 312 329

6 36-49 270 276 287 296 310 326

7 50-79 269 273 286 293 308 323

8 Over 80 269 273 285 293 308 323

- 15 -

LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4.3. Wireless function check

Step 1) Connect set and Dongle of Wireless to Cable of HDMI

& TTA 20Pin.
Step 2) At OSD of SET, check the message like Fig.3.
Step 3) Detach Cable of Wireless Dongle.

4.4. EYE-Q function check

Step 1) Turn on TV.
Step 2) Press EYE key of Adjustment remote control.
Step 3) Cover the Eye Q II sensor on the front of the using

your hand and wait for 6 seconds.
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw

Data (Sensor data, Back light)”. If after 6 seconds,

R/G/B value is not lower than 10, replace Eye Q II

sensor.
Step 5) Remove your hand from the Eye Q II sensor and wait

for 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen,

replace Eye Q II sensor.

4.5. 3D function test

4.5.1. HDMI 3D

(Pattern Generator MSHG-600, MSPG-6100 [Support HDMI 1.4])
* HDMI mode No. 872, pattern No. 83)

1) Please input 3D test pattern like below

2) When 3D OSD appear automatically, then select green key.

3) Don’t wear a 3D Glasses, Check the picture like below.

4.5.2. RF emitter inspection

(1) Start 3D pattern inspection

(2) If RF emitter signal is correctly received to RF receiver, the

lamp of RF tester turn on.

Fig. 1

<Dongle>

Fig. 3 Connect the Dongle

(Dongle Connection Display)

Fig. 2

<Wireless Ready Set>

Connect

<IR Tester Lamp turned off(NG)>

<IR Emitter inspection>

<IR Tester Lamp turned on(OK)>

- 16 -

LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

4.6. Option selection per country

(1) Overview

- Option selection is only done for models in Non-EU.

- Applied model: LD12P Chassis applied EU model.

(2) Method

1) Press ADJ key on the Adjustment Remote Control, then
select Country Group Menu.

2) Depending on destination, select Country Group Code
04 or Country Group EU then on the lower Country
option, select US, CA, MX. Selection is done using +, ­or

GF key.

5. Tool Option selection

- Method : Press ADJ key on the Adjustment remote control,
then select Tool option.

5.1. Ship-out mode check(In-stop)

After final inspection, press IN-STOP key of the Adjustment
remote control and check that the unit goes to Stand-by mode.

5.2. GND and Internal Pressure check

5.2.1. Method

1) GND & Internal Pressure auto-check preparation

- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)

2) Perform GND & Internal Pressure auto-check

- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.

- Connect D-terminal to AV JACK TESTER.

- Auto CONTROLLER(GWS103-4) ON

- Perform GND TEST.

- If NG, Buzzer will sound to inform the operator.

- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)

- Perform I/P test.

- If NG, Buzzer will sound to inform the operator.

- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.

5.2.2. Checkpoint

• TEST voltage

- GND: 1.5 KV/min at 100 mA

- SIGNAL: 3 KV/min at 100 mA

• TEST time: 1 second

• TEST POINT

- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND

- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL

• LEAKAGE CURRENT: At 0.5 mArms

6. USB S/W download(option, service only)

1) Put the USB Stick to the USB socket.

2) Automatically detecting update file in USB Stick

- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting.

3) Show the message “Copying files from memory”.

4) Updating is starting.

5) Updating Completed, the TV will restart automatically.

6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)

* If downloading version is more high than your TV have,

TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.

* After downloading, have to adjust TOOL OPTION again.

1) Push “IN-START” key in service remote control.

2) Select “Tool Option 1” and Push “OK” key.

3) Punch in the number. (Each model has their number.)

- 17 -

LGE Internal Use OnlyCopyright © 2011 LG Electronics. Inc. All rights reserved.

Only for training and service purposes

BLOCK DIAGRAM

L/R In

SPDIF OUT

NAND

Flash(8Gb)

CVBS

CVBS

USB

Audio

AMP

I2S Out

BCM

35230

CI slot

P_TS

CVBS(M)

P_TS

DVB-

T/C

Demod

DIF(+/-)

USB1

COMP

A/V1

SCART

RS-232C

PC-RGB

PC-AUDIO

OPTIC

LAN

SYSTEM

DDR3 X 16 X 2

(2Gb)

Audio

AMP

LVDS.

41P

HDMI1

HDMI2

HDMI3

Side

Rear

COMP

RGB,H/V

Ethernet

CVBS

H/P

L/R Out

UART

SYSTEM EEPROM X 1

(1Mb)

HDMI

S/W

(HDCP

EEPROM)

I2C

Sub Micom

(NEC)

RGB In/CVBS In Out

I2C

Air/

Cable

TUNER

(T/C)

TUNER

(S2)

DIGITAL

DEMOD

(T/C)

DVB-S

ANALOG

DEMOD

DIGITAL

DEMOD

(S2)

TS_S/P

LNB

51P

HDMI

HUB IC

50Hz

URSA5

SPI

Flash(2Mb)

SYSTEM

DDR3 X 16 X 1

(1Gb)

- 18 -

LGE Internal Use OnlyCopyright LG Electronics. Inc. All rights reserved.

Only for training and service purposes

300

200

800

LV1

LV2

120

810

400

540

530

521

900

910

820

510

500

A2

A4

A5

A21

A10

AG1

EXPLODED VIEW

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

IMPORTANT SAFETY NOTICE

NAND FLASH MEMORY 8Gbit

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.3V_Normal

NC_1

1

NC_2

2

NC_3

3

NC_4

4

NC_5

NC_6

RY/BY

NC_7

NC_8

VCC_1

VSS_1

NC_9

NC_10

NC_11

NC_12

NC_13

NC_14

NC_15

5

6

7

RE

8

CE

9

10

11

12

13

14

15

CLE

16

ALE

17

WE

18

WP

19

20

21

22

23

24

16Gbit

0

LGE35230(BCM35230KFSBG)

NON_BCM_CAP

B5

HDMI0_CLKN

C5

HDMI0_CLKP

A4

HDMI0_D0N

B4

HDMI0_D0P

A3

HDMI0_D1N

B3

HDMI0_D1P

A2

HDMI0_D2N

B2

HDMI0_D2P

W2

CEC

V4

DDC0_SCL

W4

DDC0_SDA

V3

HDMI0_HTPLG_IN

V2

HDMI0_HTPLG_OUT

D13

HDMI0_ARC

E6

HDMI0_RESREF

R106
3K

IC101

LT0VCAL_MONITOR

NAND_RBb

NAND_REb

NAND_CEb

NAND_CEb2

NAND_CLE

NAND_ALE

R101

4.7K

FLASH_WP

R105

4.7K

NAND_WEb

R104

4.7K

R195

4.7K

Write Protection

- High : Normal Operation

- Low : Write Protection

+3.3V_Normal

R107 2.7K

R148

+3.3V_Normal

R103

4.7K

HDMI_CLK­HDMI_CLK+

HDMI_RX0­HDMI_RX0+

HDMI_RX1­HDMI_RX1+

HDMI_RX2­HDMI_RX2+

HDMI_ARC

R149 0

16Gbit

C102
4700pF

C101

0.1uF

OPT

IC102

TC58DVG3S0ETA00

NAND_8Gbit

TXOUT0_L0N
TXOUT0_L0P
TXOUT0_L1N
TXOUT0_L1P
TXOUT0_L2N
TXOUT0_L2P

TXCLK_LN

TXCLK_LP
TXOUT0_L3N
TXOUT0_L3P
TXOUT0_L4N
TXOUT0_L4P

TXOUT0_U0N
TXOUT0_U0P
TXOUT0_U1N
TXOUT0_U1P
TXOUT0_U2N
TXOUT0_U2P

TXCLK_UN

TXCLK_UP
TXOUT0_U3N
TXOUT0_U3P
TXOUT0_U4N
TXOUT0_U4P

TXOUT1_L0N
TXOUT1_L0P
TXOUT1_L1N
TXOUT1_L1P
TXOUT1_L2N
TXOUT1_L2P

TXCLK1_LN

TXCLK1_LP
TXOUT1_L3N
TXOUT1_L3P
TXOUT1_L4N
TXOUT1_L4P

TXOUT1_U0N
TXOUT1_U0P
TXOUT1_U1N
TXOUT1_U1P
TXOUT1_U2N
TXOUT1_U2P

TXCLK1_UN

TXCLK1_UP
TXOUT1_U3N
TXOUT1_U3P
TXOUT1_U4N
TXOUT1_U4P

GPIO_BL_ON

BL_PWM/GPIO

AE27
AE28
AF27
AF28
AG27
AG28
AE26
AF26
AH27
AG26
AF25
AE25

AH26
AG25
AE24
AD24
AH25
AF24
AE23
AD23
AG24
AF23
AC22
AD22

AG23
AH23
AE22
AE21
AF22
AH22
AG22
AF21
AG21
AF20
AD21
AC21

AG20
AH20
AD19
AE19
AF19
AH19
AE18
AD18
AG19
AF18
AG18
AF17

AC18
AH16
AG16

16Gbit

IC102-*1

TH58DVG4S0ETA20

SDA0_3.3V
SCL0_3.3V

SCL2_3.3V
SDA2_3.3V

R199 22
R197 22

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

NC_26

NC_25

NC_24

NC_23

I/O8

I/O7

I/O6

I/O5

NC_22

PSL

NC_21

VCC_2

VSS_2

NC_20

NC_19

NC_18

I/O4

I/O3

I/O2

I/O1

NC_17

NC_16

NC_15

NC_14

+3.3V_Normal

NC_1

1

NC_28

48

NC_27

47

NC_26

46

NC_25

45

I/O8

NAND_DATA[7]

44

I/O7

NAND_DATA[6]

43

I/O6

42

NAND_DATA[5]

I/O5

41

NAND_DATA[4]

NC_24

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

PSL

NC_23

VCC_2

VSS_2

NC_22

NC_21

NC_20

I/O4

I/O3

I/O2

I/O1

NC_19

NC_18

NC_17

NC_16

16Gbit

R151

+3.3V_Normal

C104 10uF

NAND_DATA[3]

NAND_DATA[2]

NAND_DATA[1]

NAND_DATA[0]

TXB4P
TXB4N
TXB3P
TXB3N
TXBCLKP
TXBCLKN
TXB2P
TXB2N
TXB1P
TXB1N
TXB0P
TXB0N

TXA4P
TXA4N
TXA3P
TXA3N
TXACLKP
TXACLKN
TXA2P
TXA2N
TXA1P
TXA1N
TXA0P
TXA0N

TXD4P
TXD4N
TXD3P
TXD3N
TXDCLKP
TXDCLKN
TXD2P
TXD2N
TXD1P
TXD1N
TXD0P
TXD0N

TXC4P
TXC4N
TXC3P
TXC3N
TXCCLKP
TXCCLKN
TXC2P
TXC2N
TXC1P
TXC1N
TXC0P
TXC0N

+3.3V_Normal

0

10V

C103

0.1uF

R194

2.7K

R108 10K

NAND_DATA[0-7]

RGB_DDC_SDA

RGB_DDC_SCL

BBS CONNECT

P101

TJC2508-4A

1

2

3

4

C105

2.2uF
10V

Q101
BSS83

Q102
BSS83

+3.3V_Normal

VCC

SCL

SDA

GND

A_DIM

RY/BY2

RY/BY1

VCC_1

VSS_1

NC_10

NC_11

NC_12

NC_13

SBD

G

SBD

G

NC_2

NC_3

NC_4

NC_5

NC_6

NC_7

NC_8

NC_9

CE1

CE2

CLE

ALE

RE

WE

WP

C106

4.7uF

DEV_NAND_16Gbit

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

+3.3V_Normal

R196
10K

C118

0.1uF
16V

+3.3V_Normal

R198
10K

C119

0.1uF
16V

R110

R109

1.5K

1.5K

DVB_S Option: apply EU Satellite model

FOR HDMI STANDARD
APPLY ONLY WHEN CONNECT TO PULL-UP GPIO

Boot ROM Device Select - (FA4,FAD7,FAD2,FAD1)

+3.3V_Normal

R113
10K

R114
10K

OPT

R117
10K
OPT

R118
10K

R122
10K

R123
10K

OPT

R127
10K
OPT

R128
10K

CI_ADDR[4]
NAND_DATA[7]
NAND_DATA[2]
NAND_DATA[1]

NAND ECC (FA3, FA2, FALE)

+3.3V_Normal

R119

R115

R111
10K

OPT

R112
10K

10K

R116
10K
OPT

10K
OPT

R120
10K

CI_ADDR[3]
CI_ADDR[2]
NAND_ALE

DUAL COMPONENT

IC102 1ST : EAN61000101 2ND : T-TH58DVG4S0ETA20

IC102-*1

LGE35230(BCM35230KFSBG)

AG6

AF6

V5

AB4

Y4

AA4

Y5

AB2
AB5

U3
U2

Y2
Y1

33

AA3
AA2

H3
H2

H4
H5

F25

W5

OPT

U5
U4

OPT
OPT

W3
W1

OPT

AB6

R139 0

Y6

Y3

G24

J6
W6

F7
E7

R140
560
1%

BCM REFRENCE is 562ohm

R121

1.2K

C107
33pF
50V

DVB_S

+3.3V_Normal

+3.3V_Normal

R124
1K

OPT

R125
1K

R126

1.2K

C108
33pF
50V

DVB_S

R129

1.2K

C109
33pF
50V

5V_HDMI_3

R130

OPT

2K

R132 4.7K

+3.3V_Normal

C111 0.01uF
C112 0.1uF

54MHz_XTAL_P

54MHz_XTAL_N

R131

1.2K

C110
33pF
50V

PCM_5V_CTL

5V_HDMI_1

5V_HDMI_2

5V_HDMI_4

SOC_RESET

LNB_INT

SC_ID

BCM_RX
BCM_TX

R135
R136 33

+3.3V_Normal

R141 4.7K

R142 22
R143 22

R144 22
R145 22

SRST

0000: ST Micro M25P or compatible Serial Flash
0010: 8-bit 512Mbit 512B page SLC NAND Flash devices
0100: 8-bit 128, 256Mbit 512B page SLC NAND Flash devices
0110: 8-bit 1Gbit 2KB page SLC NAND Flash devices
1000: 8-bit 2Gbit, 4Gbit, 8Gbit 2KB page SLC NAND Flash devices
1010: 8-bit 16Gbit, 32Gbit 4KB page SLC NAND Flash devices (O)
0001: 8-bit 8/16/32Gbit 2KB page MLC NAND Flash devices
0011: 8-bit 16/32Gbit 4KB page MLC NAND Flash devices
0101: 8-bit 32Gbit 8KB page MLC NAND Flash devices
0111: 3B dual IO Serial Flash
1001: BB dual IO Serial Flash
1011: fast Serail Flash > 50Mhz
1100: OneNAND Flash (always 16-bit)
1110: Reserved
1101, 1111: Reserved

000 = ECC disabled
001 = ECC 1-bit repair
010 = ECC 4-bit BCH (O)
011 = ECC 8-bit BCH, 27 byte spare
100 = ECC 12-bit BCH, 27 byte spare
101 = ECC 8-bit BCH, 16 byte spare
110, 111 = Reservedd

IC101

NON_BCM_CAP

TVM_XTALIN

TVM_XTALOUT

IRRXDA

FP_IN0
FP_IN1

SPARE_ADC1
SPARE_ADC2

FS_IN1
FS_IN2

VGA_SDA
VGA_SCL

RDA
TDA

BSCDATAA
BSCCLKA

RDB/GPIO
TDB/GPIO

BSC_S_SCL
BSC_S_SDA

NMIB

POWER_CTRL

AON_HSYNC
AON_VSYNC

AON_GPIO_36
AON_GPIO_37

AON_RESETOUTB
TVM_BYPASS

RESETB
RESETOUTB

TMODE
TESTEN

VDAC_VREG
VDAC_RBIAS

AVS_NDRIVE_1
AVS_PDRIVE_1

FAD_7
FAD_6
FAD_5
FAD_4
FAD_3
FAD_2
FAD_1
FAD_0

FALE
FCEB_0
FCEB_1
FCEB_2
FCEB_3

NFWPB

FRDYB

FA_0

FA_1

FA_2

FA_3

FA_4

FA_5

FA_6

FA_7

FA_8

FA_9

FA_10
FA_11
FA_12
FA_13
FA_14
FA_15

TRSTB

TDI/GPIO

TMS/GPIO
TCK/GPIO

DINT/GPIO

AVS_VFB
AVS_VSENSE
AVS_RESETB

VDAC_1
VDAC_2

AB1

NAND_DATA[7]

AB3

NAND_DATA[6]

AC1

NAND_DATA[5]

AC2

NAND_DATA[4]

AC3

NAND_DATA[3]

AD2

NAND_DATA[2]

AD3

NAND_DATA[1]

AE2

NAND_DATA[0]

AG1
AF1
AC5
AE6
AG5

AF3
AG2

FWE

AE3

FRD

AA5

AF2
AE1
AC4
AD5
AD4
AE4
AE5
AD6
AH3
AF4
AH4
AG4
AF5
AG3
AH2
AH5

AD15
AF14
AH14

TDO

AD14
AG14
AC16

AH7
AG7
AD7
AF7
AH8

C6
D7

NAND_ALE
NAND_CEb
NAND_CEb2
/CI_CE1
/CI_CE2

FLASH_WP
NAND_WEb
NAND_REb
/PCM_WAIT

NAND_CLE
NAND_RBb

CI_ADDR[2]
CI_ADDR[3]
CI_ADDR[4]
CI_ADDR[5]
CI_ADDR[6]
CI_ADDR[7]
CI_ADDR[8]

CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]

CI_ADDR[14]

R146 10K

NAND_DATA[0-7]

R147
1K

DTV/MNT_V_OUT

Strap Setting

CI_ADDR[2-14]

+3.3V_Normal

R150

R153

1K

R156

1K

1K

For L/R sync GPIO

SRST

+3.3V_Normal

R157

R160

R154

10K

10K

OPT

OPT

R158

R155

10K

10K

NAND_DATA[0]:
0: System is LITTLE endian (O)
1: System is BIG endian

CI_ADDR[7]:
0: Disable EDID automatic Downloading from Flash (O)
1: Enable EDID automatic Downloading from Flash

NAND_DATA[6] :
0: Disable OSC clock output on chip Pin (O)
1: Enable OSC clock output on chip pin.

CI_ADDR[6]:
0: Host MIPS run at 500 MHz (O)
1: Host MIPS run at 250 MHz

NAND_CLE:
0: Differential Oscillators TVM not bypassed (O)
1: Differential Oscillators TVM bypassed

NAND_DATA[4]:
0: 27MHz TVM Crystal Frequency
1: 54MHz TVM Crystal Frequency (O)

R162

R159
1K

L/R_SYNC_DINT
L/R_SYNC_DINT

R166

1K

1K

R163
1K

10K
OPT

R161
10K

R164
10K

OPT

R165
10K

R167
10K

OPT

R168
10K

R175
10K

OPT

R176
10K

R177
10K

R178
10K

OPT

R170
10K

R171
10K

OPT

CI_ADDR[9],CI_ADDR[11],CI_ADDR[12],CI_ADDR[13]
TVM Crystal oscillator bias/gain control
0000: 210uA
0001: 390uA
0010: 570uA
0011: 730uA
0100: 890uA (O)
0111: 1290uA
1000: 1416uA
1111: 2196uA
0101, 0110, 1001, 1010, 1011, 1100, 1101, 1110: Reserved

CI_ADDR[8]:
0: RESETOUTb (in On/Off only) stay asserted until software releases them.
1: Fix amount of delay for de-assertion on RESETOUTb (in On/IOff only)
at end of RESETb pulse (O)

NAND_DATA[3]:
0: MIPS will boot from external flash (O)
1: MIPS will boot from ROM

NAND_DATA[5]:
0: FLASH MODE (O)
1: BSC_SLAVE(BBS) MODE

R179
10K

OPT

R180
10K

R181
10K

OPT

R182
10K

R183
10K

R184
10K

OPT

R187
10K

OPT

R188
10K

NVRAM

+3.3V_Normal

R169
0

R173

R172

4.7K

4.7K

OPT

R174

4.7K

BCM_NVM_1M

IC103

M24M01-HRMN6TP

OPT

NC

1

E1

2

A8’h

E2

3

VSS

4

+3.3V_Normal

VCC

8

WP

7

SCL

6

SDA

5

R190 33

R191 33

54MHz X-TAL

C113
12pF

50V

3

X-TAL_2

4

GND_2

54MHz

X101

CRYSTAL_BCM_Sunny

C114

12pF

EAW58812611

50V

SUNNY ELECTRONICS CORPORATION

2

1

GND_1

X-TAL_1

R185 0

R186 0

R189
1M
OPT

54MHz_XTAL_N

54MHz_XTAL_P

R192
10K

OPT

NAND_DATA[0]
CI_ADDR[7]
NAND_DATA[6]
CI_ADDR[6]
NAND_CLE
NAND_DATA[4]
CI_ADDR[9]
CI_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]
CI_ADDR[8]
NAND_DATA[3]
NAND_DATA[5]

R193
10K

BCM_NVM_256K

IC103-*1

AT24C256C-SSHL-T

A0

1

A1

2

A2

3

GND

4

Write Protection

- Low : Normal Operation

- High : Write Protection

X101-*2

54MHz

X-TAL_1

1

GND_1

2

CRYSTAL_BCM_KDS

EAW58239604

DAISHINKU CORPORATION.

X101-*1

54MHz

X-TAL_1

1

GND_1

2

CRYSTAL_BCM_Lihom

EAW60763703

LIHOM CO., LTD.

VCC

8

WP

7

SCL

6

SDA

5

SCL3_3.3V

SDA3_3.3V

GND_2

4

X-TAL_2

3

GND_2

4

X-TAL_2

3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

MAIN & NAND FLASH

2010.09.18

1

+3.3V_Normal

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

FHD

R252

1K

HD

R262

1K

FE_TS_DATA[0-7]

OLED

LCD

BCM
internal
FRC

00 11

1 100

HIGH

Support

CHBO_TS_CLK

CHBO_TS_SERIAL

CHBO_TS_SYNC

CHBO_TS_VAL_ERR

R251

1K

1K

1K

BCM_FRC/URSA5

R261

1K

NO_FRC/FRC2

R250

FRC2/URSA5

R260

NO_FRC/BCM_FRC

MODEL OPTION

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_5

MODEL_OPT_6

MODEL_OPT_7 Enable Disable

NO_FRC

DDR speed

T2 Tuner

S Tuner

PHM

R253

R263

1K

1K

R254

1K

OPT

R264

1K

LG FRC2

LOW

HDFHD

LCDOLED

16001333

Not Support

Not SupportSupport

R255

1K

T2_TUNER

R265

1K

NO_T2_TUNER

external
URSA5

SIDE_USB_OCD1

SIDE_USB_OCD2

PCM_TS_DATA[0-7]

R201 0

F/NIM_EU_CN

PCM_MDI[0-7]

OPT

R202

0

R256

1K

S_TUNER

R266

1K

NO_S_TUNNER

+3.3V_Normal

R286
10K

WIFI

TU_TS_CLK

FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]

PHM

NO_PHM

R287
10K

WIFI

R257

1K

R267

1K

R203 0
R204 0
R205 0
R206 0

R207 0
R208 0
R209 0

C201
100pF

OPT

F/NIM_EU_CN
F/NIM_EU_CN

F/NIM_EU_CN

PCM_MDI[0]
PCM_MDI[1]
PCM_MDI[2]
PCM_MDI[3]
PCM_MDI[4]
PCM_MDI[5]
PCM_MDI[6]
PCM_MDI[7]

R211

6.04K
EPHY_TDP

EPHY_TDN
EPHY_RDP
EPHY_RDN

R210

4.87K
1%

SIDE_USB_DM
SIDE_USB_DP

SIDE_USB_CTL1

WIFI_DM
WIFI_DP

SIDE_USB_CTL2

PCM_TS_CLK

PCM_TS_DATA[0]
PCM_TS_DATA[1]
PCM_TS_DATA[2]
PCM_TS_DATA[3]
PCM_TS_DATA[4]
PCM_TS_DATA[5]
PCM_TS_DATA[6]
PCM_TS_DATA[7]

PCM_TS_SYNC

PCM_TS_VAL

F/NIM_EU_CN

F/NIM_EU_CN
F/NIM_EU_CN
F/NIM_EU_CN

TU_TS_SYNC
TS_VAL_ERR

PCM_MCLKI

PCM_MISTRT

PCM_MIVAL_ERR

/PCM_IRQA

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3
MODEL_OPT_4

MODEL_OPT_5

MODEL_OPT_6
MODEL_OPT_7

LGE35230(BCM35230KFSBG)

F26
D26

F27
F28
E27
E26

F5
E5

C2
D1

E1
D2

B1
C1

C3
C4

M4
L5
M5
L6
N3
N1
N2
M3
M2
L4
N4

K6
J4
K5
J2
J3
K2
K1
K3
L1
L3
L2

P4
T2
R3
R2
P3
P2
P1
R6
N5
T4
P5

R4
U1
T3
T1
T5

IC101

NON_BCM_CAP
EPHY_VREF
EPHY_RDAC

EPHY_TDP
EPHY_TDN
EPHY_RDP
EPHY_RDN

USB_MONCDR
USB_RREF

USB_PORT1DN
USB_PORT1DP

USB_PWRFLT_1/GPIO
USB_PWRON_1/GPIO

USB_PORT2DN
USB_PORT2DP

USB_PWRFLT_2/GPIO
USB_PWRON_2/GPIO

TCLKA/GPIO
TDATA_0/GPIO
TDATA_1/GPIO
TDATA_2/GPIO
TDATA_3/GPIO
TDATA_4/GPIO
TDATA_5/GPIO
TDATA_6/GPIO
TDATA_7/GPIO
TSTRTA/GPIO
TVLDA/GPIO

TCLKD/GPIO
TDATD_0/GPIO
TDATD_1/GPIO
TDATD_2/GPIO
TDATD_3/GPIO
TDATD_4/GPIO
TDATD_5/GPIO
TDATD_6/GPIO
TDATD_7/GPIO
TSTRTD/GPIO
TVLDD/GPIO

MPEG_CLK/GPIO
MPEG_D_0/GPIO
MPEG_D_1/GPIO
MPEG_D_2/GPIO
MPEG_D_3/GPIO
MPEG_D_4/GPIO
MPEG_D_5/GPIO
MPEG_D_6/GPIO
MPEG_D_7/GPIO
MPEG_SYNC/GPIO
MPEG_DATA_EN/GPIO

MCIF_RESET/GPIO
MCIF_SCLK/GPIO
MCIF_SCTL/GPIO
MCIF_SDI/GPIO
MCIF_SDO/GPIO

PCI_DEVSELB/GPIO

PCI_FRAMEB/GPIO

C225

0.22uF

6.3V

VI_IFP0
VI_IFM0

VDDR_AGC

AGC_SDM_2
AGC_SDM_1

GPIO_0
GPIO_1
GPIO_2
GPIO_3

PCI_VIO_0
PCI_VIO_1
PCI_VIO_2

GPIO_4
GPIO_5
GPIO_6

GPIO_7
GPIO_70
GPIO_71
GPIO_72
GPIO_73
GPIO_74
GPIO_75
GPIO_76
GPIO_77
GPIO_78
GPIO_79

PCI_AD05
PCI_AD06
PCI_AD07

PCI_AD08
PCI_AD09/GPIO
PCI_AD10/GPIO
PCI_AD11/GPIO
PCI_AD12/GPIO
PCI_AD13/GPIO
PCI_AD14/GPIO
PCI_AD15/GPIO
PCI_AD16/GPIO
PCI_AD17/GPIO
PCI_AD18/GPIO
PCI_AD19/GPIO
PCI_AD20/GPIO
PCI_AD21/GPIO

PCI_AD22

PCI_AD23

PCI_AD24

PCI_AD25

PCI_CBE00
PCI_CBE01/GPIO
PCI_CBE02/GPIO

PCI_CBE03

PCI_IRDYB/GPIO

PCI_PAR/GPIO

PCI_PERRB/GPIO

PCI_REQ1B
PCI_SERRB/GPIO
PCI_STOPB/GPIO
PCI_TRDYB/GPIO

+0.9V_CORE

C221

0.1uF

C17
B17
D15

B16
A16

A15
C16
G28
G26

W14
W15
W13

J5
R5
V6
H6
AE15
AF15
AG15
AF16
AD16
AE16
AG17
AH17
AE17
AD17

AB13
AC15
AB12
AB11
AE14
AG13
AH13
AF13
AE13
AD12
AF12
AG10
AF10
AE10
AD10
AE9
AE8
AC10
AC11
AC8
AB8

AC14
AG12
AH10
AB7

AG11
AD11
AE11
AD13
AE12
AC12
AC13
AH11
AF11

C223

0.01uF

C203
10uF
10V

Non_CHB

R212
1K

closed to soc

R213 2K

+3.3V_Normal

R280
22

R214 22

R215 22
R281 22
R282 22

R216 22

R218 22

R220 22

R221 22

R222 22

R283
22

R223 22

R284 22

R224 22

R235

R225 0

R226 22

R285 22

R227 22

C205

C207

10uF

4.7uF
10V

10V

close to soc

C217

16V

100

0.1uF
R241

C218

100

0.1uF
R242

16V

C216 0.01uF

M_REMOTE_RX

CI_DET
M_RFModule_RESET
EPHY_ACTIVITY
EPHY_LINK

DTV_ATV_SELECT
RF_SWITCH_CTL_2

INSTANT_MODE

BCM_L/DIM
BCM_L/DIM

100

OPT

NFM18PS105R0J

C233

6.3V

GND

C232

4.7uF
10V

C209

4.7uF
10V

IF_P

IF_N

IF_AGC

3D_SYNC

MODEL_OPT_0

MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3

SC_DET/COMP2_DET
CHB_RESET

TW9910_RESET

AV2_CVBS_DET
RF_BOOSTER_CTL
DSUB_DET
PCM_RST

MODEL_OPT_4
DC_MREMOTE
DD_MREMOTE

COMP1_DET

MODEL_OPT_5

3D_GPIO_0
MODEL_OPT_6
MODEL_OPT_7

ERROR_OUT

RF_SWITCH_CTL

3D_GPIO_1

3D_GPIO_2

OUTIN

C234

0.1uF

C211

0.1uF

+3.3V_Normal

+3.3V_Normal

R228 22
R230 22

BCM_L/DIM

R231 100

L/DIM0_MOSI
L/DIM0_SCLK

NFM18PS105R0J

C204

6.3V

OUTIN

GND

C236

0.1uF

C213

0.1uF

BLM18PG121SN1D

C229

0.1uF

R240

2.7K

+3.3V_Normal

R231-*1 0

FRC2_RESET

URSA_RESET

NFM18PS105R0J

C238

4.7uF
10V

C215

0.01uF

L201

NON_NTP

PWM_DIM
L/DIM0_VS

4.7K

C244

6.3V

GND

C220

0.1uF

+3.3V_Normal

4.7K

R232

URSA_RESET

+0.9V_CORE

+3.3V_Normal

OUTIN

+1.5V_DDR

C222

0.01uF

R233

1.2K

C227
33pF
50V

R232-*1

FRC2_RESET

R234

1.2K

C231
33pF
50V

C247
22uF

C248
10uF

10V

NON_NTP

FRC_RESET

SDA1_3.3V
SCL1_3.3V

POWER 2.5V

+2.5V_BCM35230

+2.5V_BCM35230

Place Cap
Very close to R22 Ball

L202

BLM18PG121SN1D

C249
10uF
10V

L203

BLM18PG121SN1D

C251

0.1uF
16V

+2.5V_BCM35230

BLM18PG121SN1D

C250

4.7uF
10V

+1.5V_DDR

Place Cap

Very close to R22 Ball

C242

0.1uF

+3.3V_Normal

C253
10uF
10V

EPHY_VDD25

C252

4.7uF
10V

L204

C254

4.7uF

MLG1005S22NJT

C224

L220

1uF
25V
OPT

+0.9V_CORE

AADC_AVDD25

C256

0.1uF

C255

0.1uF

VAFE3_VDD25

C257

0.1uF

+0.9V_CORE

C226

0.1uF
16V
OPT

+3.3V_Normal

+2.5V_BCM35230

L205

BLM18PG121SN1D

C258

0.1uF

+2.5V_BCM35230

C259

C260

10uF

4.7uF

10V

+2.5V_BCM35230

+2.5V_BCM35230

NON_BCM_CAP

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDC_34
VDDC_35
VDDC_36
VDDC_37
VDDC_38
VDDC_39
VDDC_40
VDDC_41
VDDC_42

POR_VDD

VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12

DDR_LDO_VDDO

VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8
VDDR3_9
VDDR3_10
VDDR3_11

AON_VDDC_1
AON_VDDC_2
AON_POR_VDD

AON_VDDR3

AON_VDDR10_1
AON_VDDR10_2

IC101

LGE35230(BCM35230KFSBG)

V12

V7
M10
N10
P10
R10
T10
U10
V10
W10
V13
L11
M11
N11
P11
R11
T11
U11
V11
W11
V14
L18
M18
N18
P18
R18
T18
U18
V18
W18
V15
L19
M19
N19
P19
R19
T19
U19
V19
W19
V16
V17

L10

L22

AA28

V28
R28
M28
J28
K23
M22
T22
T23
U22
Y22

R22

G15
H22
G23
AB9

K7

AB15

L7

AB14

M7

N6

P6

AA6
AA7

Y7

U7

T7

T6

C261
10uF
10V

C262
10uF

L206

BLM18PG121SN1D

L207

BLM18PG121SN1D

K10

VSS_1

K11

VSS_2

K12

VSS_3

L12

VSS_4

M12

VSS_5

N12

VSS_6

P12

VSS_7

R12

VSS_8

T12

VSS_9

U12

VSS_10

W12

VSS_11

K13

VSS_12

L13

VSS_13

M13

VSS_14

N13

VSS_15

P13

VSS_16

R13

VSS_17

T13

VSS_18

U13

VSS_19

W16

VSS_20

K14

VSS_21

L14

VSS_22

M14

VSS_23

N14

VSS_24

P14

VSS_25

R14

VSS_26

T14

VSS_27

U14

VSS_28

K15

VSS_29

L15

VSS_30

M15

VSS_31

N15

VSS_32

P15

VSS_33

R15

VSS_34

T15

VSS_35

U15

VSS_36

K16

VSS_37

L16

VSS_38

M16

VSS_39

N16

VSS_40

P16

VSS_41

R16

VSS_42

T16

VSS_43

U16

VSS_44

K17

VSS_45

L17

VSS_46

M17

VSS_47

N17

VSS_48

P17

VSS_49

R17

VSS_50

T17

VSS_51

U17

VSS_52

W17

VSS_53

K18

VSS_54

K19

VSS_55

H7

VSS_56

G14

VSS_57

AB16

VSS_58

R7

VSS_59

M6

VSS_60

AB23

VSS_61

P7

VSS_62

W7

VSS_63

J7

VSS_64

N7

VSS_65

AB10

VSS_66

AC23

VSS_67

AC6

VSS_68

G19

VSS_69

AA22

VSS_70

J23

VSS_71

J22

VSS_72

K22

VSS_73

J25

VSS_74

N22

VSS_75

N23

VSS_76

M25

VSS_77

P22

VSS_78

R25

VSS_79

V22

VSS_80

W22

VSS_81

W23

VSS_82

V25

VSS_83

AA25

VSS_84

ADAC_AVDD25

C271

C267

C263

4.7uF

C265

4.7uF

PLL_VAFE_AVDD25

C264

4.7uF

0.01uF

0.1uF

C272

C270

C266

4.7uF C277

VAFE2_VDD25

0.1uF

C269

0.1uF

C268

0.1uF

0.01uF

CORE 0.9V

+0.9V_CORE

L209

BLM18PG121SN1D

C274
22uF

+0.9V_CORE

L210

BLM18PG121SN1D

+0.9V_CORE

L211

BLM18PG121SN1D

POWER 3.3V

+3.3V_Normal

Place as close as possible to the pad

use only for A0/B0 chip

C210-*1
220pF
50V

BCM_A0/B0

PLL_VAFE_AVDD25

+0.9V_CORE

Place as close as possible to the pad

C281

0.1uF

C282

0.1uF

L212

VAFE2_DVDD

VAFE3_DVDD

C208
390pF
50V

C206
390pF
50V

+0.9V_CORE

+0.9V_CORE

USB_AVDD33

C283

0.1uF

+3.3V_Normal

+2.5V_BCM35230

+2.5V_BCM35230

VDAC_AVDD33

BCM_C0

PLL_MIPS_AVDD

C273

0.1uF

BLM18PG121SN1D

C284
22uF

BLM18PG121SN1D

L213

BLM18PG121SN1D

ADAC_AVDD25

EPHY_VDD25

HDMI_AVDD33

C275

0.1uF
OPT

USB_AVDD33

C212
390pF
50V

C210
390pF
50V

PLL_MAIN_AVDD

C276

0.01uF

OPT

HDMI_AVDD

C280

0.1uF

PLL_AUD_AVDD

4.7uF

PLL_VAFE_AVDD

C279

4.7uF

BLM18PG121SN1D

VAFE2_VDD25

VAFE3_VDD25

Place as close as possible to the pad

PLL_VAFE_AVDD

C202
390pF
50V

L214

C285

4.7uF

L215

+3.3V_Normal

AADC_AVDD25

HDMI_AVDD

USB_AVDD

C214
390pF
50V

PLL_AUD_AVDD

+3.3V_Normal

USB_AVDD

VAFE3_DVDD

C287

4.7uF

VDAC_AVDD33

C286

4.7uF

C288

0.1uF

C290

0.1uF

L216

BLM18PG121SN1D

C289

0.1uF

+0.9V_CORE

+0.9V_CORE

+0.9V_CORE

HDMI_AVDD33

C291

4.7uF

LGE35230(BCM35230KFSBG)

AADC_AVDD25

ADACA_AVDD25
ADACC_AVDD25
ADACD_AVDD25

EPHY_BVDD25
EPHY_AVDD25

D5

HDMI0_AVDD

D4

HDMI0_AVDD33

LT0VDD25_1
LT0VDD25_2
LT0VDD25_3
LT0VDD25_4

SPDIF_IN_AVDD25

E4

USB_AVDD

D3

USB_AVDD33

D6

VDAC_AVDD33

VAFE2_DVDD
VAFE2_AVDD25_1
VAFE2_AVDD25_2
VAFE2_DVDD25

D9

VAFE3_DVDD

D8

VAFE3_AVDD25_1

E8

VAFE3_AVDD25_2

F9

VAFE3_AVDD25_3

E9

VAFE3_DVDD25

F8

POR_VDD25

PLL_AUD_AVDD

K4

PLL_MAIN_AVDD
PLL_MIPS_AVDD

PLL_VAFE_AVDD
PLL_VAFE_AVDD25

TVM_OSC_AVDD

U6

AUX_AVDD33

NON_BCM_CAP

C278

0.1uF

AE20
AD20
AC20
AB20

AD25

F19

D25
D24
E24

F24
E25

D14

D18
E17
D16
D17

G25

D11
D12

AE7

L219

BLM18PG121SN1D

C292
22uF

L217

BLM18PG121SN1D

L218

BLM18PG121SN1D

C293

0.1uF

IC101

AADC_AVSS

ADACA_AVSS
ADACC_AVSS
ADACD_AVSS

EPHY_AVSS

HDMI0_AVSS_1
HDMI0_AVSS_2

LT0VSS_1
LT0VSS_2
LT0VSS_3
LT0VSS_4
LT0VSS_5
LT0VSS_6
LT0VSS_7

SPDIF_IN_AVSS

USB_AVSS_1
USB_AVSS_2

VDAC_AVSS

VAFE2_VSS_1
VAFE2_VSS_2
VAFE2_VSS_3
VAFE2_VSS_4
VAFE2_VSS_5
VAFE2_VSS_6
VAFE2_VSS_7

VAFE3_VSS_1
VAFE3_VSS_2
VAFE3_VSS_3
VAFE3_VSS_4
VAFE3_VSS_5
VAFE3_VSS_6

PLL_MIPS_AVSS

TVM_OSC_AVSS

VAFE2_DVDD

C299

C296

0.1uF

4.7uF

PLL_MAIN_AVDD

C297

C294

0.1uF

4.7uF

PLL_MIPS_AVDD

C298

C295

0.1uF

4.7uF

F20

G22
G21
F22

F23

F6
G6

AB22
AB21
AB19
AC19
AB18
AB17
AC17

F15

G7
G8

G9

G20
E18
G18
G17
F18
G16
F16

G13
G12
F12
G11
G10
F10

AD26

AC7

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

MAIN POWER

2

50

DSUB_R+

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

INCM_R

DSUB_G+

INCM_G

DSUB_B+

INCM_B

COMP1_Y
COMP1_Pr
COMP1_Pb

INCM_VID_SC/COMP2

AV2_CVBS_IN

INCM_VID_AV2

C320 0.1uF
C321 0.1uF

R311
36

C327 0.1uF
C328 0.1uF
R317

36

C322 0.1uF
C323 0.1uF
R312

36

INCM_VID_COMP1

SC_R/COMP2_Pr

SC_G/COMP2_Y

SC_B/COMP2_Pb

C303 0.1uF
C304 0.1uF
R303

36

TU_CVBS

AV1_CVBS_IN

INCM_VID_AV1

TU_SIF

R310
0

R318
0

EU

R325-*1

10

C317 0.1uF
C318 0.1uF
R304

36

SC_CVBS_IN

INCM_VID_SC

NON_EU

R325 0

INCM_TUNER

R306
75
1%

OPT

+2.5V_BCM35230

C319 0.1uF

R305
240

OPT

INCM_SIF

C325 0.1uF
C326 0.1uF
R316

36

R313
10K

+2.5V_BCM35230

R314
12K

C324 0.1uF
R315

120
OPT

DSUB_HSYNC
DSUB_VSYNC

C329 0.1uF
C330 0.1uF
C331 0.1uF
C332 0.1uF

C333 0.1uF
C334 0.1uF
C335 0.1uF
C336 0.1uF

SC_FB

R319
10K

OPT

R320
12K

OPT

LGE35230(BCM35230KFSBG)

B6
A6
C7
A7
B7
C8

C13
A13

C9
A9
B9
B8

C11
A10
B10
C10

D10
F13

A12
C12
B12
B11

E12
E14

E15
F17
E16
F14
E11

C18
B18
A18
C19
A19
B19
C20
B20

E19
D19
E10
F11

IC101

NON_BCM_CAP

VI_R
VI_INCM_R
VI_G
VI_INCM_G
VI_B
VI_INCM_B

HSYNC_IN
VSYNC_IN

VI_Y1
VI_PR1
VI_PB1
VI_INCM_COMP1

VI_SC_R1
VI_SC_G1
VI_SC_B1
VI_INCM_SC1

VI_FB_1/GPIO
VI_FS1

VI_SC_R2
VI_SC_G2
VI_SC_B2
VI_INCM_SC2

VI_FB_2/GPIO
VI_FS2

VI_L1
VI_C1_1
VI_INCM_LC1_1
VI_C1_2
VI_INCM_LC1_2

VI_CVBS1
VI_INCM_CVBS1
VI_CVBS2
VI_INCM_CVBS2
VI_CVBS3
VI_INCM_CVBS3
VI_CVBS4
VI_INCM_CVBS4

VI_SIF1_1
VI_INCM_SIF1_1
VI_SIF1_2
VI_INCM_SIF1_2

Near

Near

Near

Near

Near

Near

Near
Near

P801

P801

P801

JK1101

JK1104

TU2101/2
TU2201/2/3

JK1102

JK1103
JK2501

VIDEO INCM

Run Along DSUB_R Trace

Run Along DSUB_G Trace

Run Along DSUB_B Trace

Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace

Run Along AV2_CVBS Trace

Run Along TUNER_CVBS_IF_P Trace

Run Along AV1_CVBS Trace

Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN/SC R,G,B Trace

INCM_R

INCM_G

INCM_B

INCM_VID_COMP1

INCM_VID_AV2

INCM_TUNER

INCM_VID_AV1

INCM_VID_SC/COMP2

BCM35230_with_CAP_220pF

IC101-*1
LGE35230

B6

BCM_CAP

VI_R

A6

VI_INCM_R

C7

VI_G

A7

VI_INCM_G

B7

VI_B

C8

VI_INCM_B

C13

HSYNC_IN

A13

VSYNC_IN

C9

VI_Y1

A9

VI_PR1

B9

VI_PB1

B8

VI_INCM_COMP1

C11

VI_SC_R1

A10

VI_SC_G1

B10

VI_SC_B1

C10

VI_INCM_SC1

D10

VI_FB_1/GPIO

F13

VI_FS1

A12

VI_SC_R2

C12

VI_SC_G2

B12

VI_SC_B2

B11

VI_INCM_SC2

E12

VI_FB_2/GPIO

E14

VI_FS2

E15

VI_L1

F17

VI_C1_1

E16

VI_INCM_LC1_1

F14

VI_C1_2

E11

VI_INCM_LC1_2

C18

VI_CVBS1

B18

VI_INCM_CVBS1

A18

VI_CVBS2

C19

VI_INCM_CVBS2

A19

VI_CVBS3

B19

VI_INCM_CVBS3

C20

VI_CVBS4

B20

VI_INCM_CVBS4

E19

VI_SIF1_1

D19

VI_INCM_SIF1_1

E10

VI_SIF1_2

F11

VI_INCM_SIF1_2

SCL3_3.3V
SDA3_3.3V

+3.3V_Normal

R302

R301

1.2K

1.2K

C301

C302

33pF

33pF

50V

50V

PHONE JACK

INCM_AUD_SC/COMP2

M_REMOTE_TX

PC_L_IN
PC_R_IN

AV1_L_IN
AV1_R_IN

INCM_AUD_AV1

AV2_L_IN
AV2_R_IN

INCM_AUD_AV2

SC/COMP2_L_IN
SC/COMP2_R_IN

C305 1uF10V
C306 1uF10V
C307 1uF10V

C308 1uF10V
C309 1uF10V
C310 1uF10V

C311 1uF10V
C312 1uF10V
C313 1uF10V

C314 1uF10V
C315 1uF10V
C316 1uF10V

NON_BCM_CAP

SPDIF_INC_P
SPDIF_INC_N

SPDIF_IND_P
SPDIF_IND_N

I2SSCK_IN/GPIO
I2SWS_IN
I2SSD_IN/GPIO

AADC_LINE_L1
AADC_LINE_R1
AADC_INCM1

AADC_LINE_L2
AADC_LINE_R2
AADC_INCM2

AADC_LINE_L3
AADC_LINE_R3
AADC_INCM3

AADC_LINE_L4
AADC_LINE_R4
AADC_INCM4

AADC_LINE_L5
AADC_LINE_R5
AADC_INCM5

AADC_LINE_L6
AADC_LINE_R6
AADC_INCM6

AADC_LINE_L7
AADC_LINE_R7
AADC_INCM7

IC101

I2SSCK_OUTA/GPIO

I2SWS_OUTA/GPIO

I2SSD_OUTA0/GPIO

I2SSOSCK_OUTA/GPIO

I2SSD_OUTA1/GPIO
I2SSD_OUTA2/GPIO

I2SSCK_OUTC/GPIO

I2SWS_OUTC/GPIO
I2SSD_OUTC/GPIO

I2SSOSCK_OUTC/GPIO

I2SSCK_OUTD/GPIO

I2SWS_OUTD/GPIO
I2SSD_OUTD/GPIO

I2SSOSCK_OUTD/GPIO

SPDIF_OUTA/GPIO

LGE35230(BCM35230KFSBG)

B15
C15

C14
B14

G4
F4
G5

C25
B24
A24

E22
E23
D23

C24
C23
B23

E21
D21
D22

B22
C22
A22

F21
D20
E20

A21
C21
B21

AUDMUTE_0/GPIO

AUDMUTE_1

ADAC_AL_N
ADAC_AL_P

ADAC_AR_N
ADAC_AR_P

ADAC_CL_N
ADAC_CL_P

ADAC_CR_N
ADAC_CR_P

ADAC_DL_N
ADAC_DL_P

ADAC_DR_N
ADAC_DR_P

AF8
AF9
AG9
AC9
AD8
AD9

E2
F2
E3
F3

G2
G3
G1
H1

B13

AG8
E13

C28
C27

D28
D27

C26
A27

B27
B28

B25
A25

A26
B26

R326 100
R327 100
R328 100
R329 100

TU_RESET_SUB

HP_DET
AV1_CVBS_DET
TU_RESET

SC_RE1
SC_RE2INCM_AUD_PC
/RST_HUB
S2_RESET

SPDIF_OUT

HP_LOUT_N
HP_LOUT_P

HP_ROUT_N
HP_ROUT_P

SCART1_Lout_N
SCART1_Lout_P

SCART1_Rout_N
SCART1_Rout_P

C337
22pF

OPT

C338
22pF

OPT

C339
22pF
OPT

C340
33pF

OPT

AUD_SCK
AUD_LRCK
AUD_LRCH
AUD_MASTER_CLK

Near

Near

Near

Near

Near

JK1102

JK1103
JK2501

JK1104
JK801

TU2101/2
TU2201/2/3

R321 0

R322 0

R323 0

R324 0

AUDIO INCM

Route Between AV1_L_IN & AV1_R_IN Trace

Route Between SC/COMP2_L_IN & SC/COMP2_R_IN Trace

Route Between AV2_L_IN & AV2_R_IN Trace

Route Between PC_L_IN & PC_R_IN Trace

Route Along With TUNER_SIF_IF_N

INCM_AUD_AV1

INCM_AUD_SC/COMP2

INCM_AUD_AV2

INCM_AUD_PC

INCM_SIF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

MAIN AUDIO/VIDEO

3

50

DDR STRAP

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

R401

4.7K

DDR_1333

R403

4.7K

R405

4.7K

DDR_1333

R407

4.7K

DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]

JEDEC Types : DDR_DQ[0:4]

R409

00001 : DDR3-1333H (CasL=9)

4.7K
10101 : DDR3-1600K (CasL=11) (O)

OPT

DUAL COMPONENT

IC401,IC402 1ST : EAN61667501, 2ND : EAN61570701

IC401-*1
IC402-*1

1ST : T-K4B2G1646B_HCK0, 2ND : T-H5TQ2G63BFR-PBC

+1.5V_DDR

OUTIN

GND

C403

2.2uF

C405
10uF

C407

2.2uF

NFM18PS105R0J

C410

6.3V

C417
470pF

C421

2.2uF

C423
10uF

C425
10uF

NFM18PS105R0J

C432

6.3V

OUTIN

GND

+1.5V_DDR

DDR_DQ[10]

DDR_DQ[9]
DDR_DQ[7]

DDR_DQ[8]
DDR_DQ[6]
DDR_DQ[5]

R408

4.7K

IC101

NON_BCM_CAP

DDR_ADA_ALT_4
DDR_ADA_ALT_5
DDR_ADA_ALT_6

DDR_CKA01_P
DDR_CKA01_N

DDR_CKA23_P
DDR_CKA23_N

R410

4.7K
OPT

DDR_ADA_0
DDR_ADA_1
DDR_ADA_2
DDR_ADA_3

DDR_ADA_4
DDR_ADA_5
DDR_ADA_6

DDR_ADA_7
DDR_ADA_8

DDR_ADA_9
DDR_ADA_10
DDR_ADA_11
DDR_ADA_12
DDR_ADA_13
DDR_ADA_14

DDR_BAA_0

DDR_BAA_1

DDR_BAA_2

DDR_RASA_N
DDR_CASA_N

DDR_WEA_N

DDR_CKEA

DDR_VREFA

DDR_RST_N

DDR_ZQ

V23
AB27
Y23
Y26

AB26
Y24
AC26

AB24
AC25
AC24

AB25
AD28
Y25
AA27
AC27
AA26
AA24
AD27

Y27
AB28
W24

V24
W25
V26

U24

W27
W28

N28
N27

U23

AA23

W26

IC401-*2

NT5CB128M16BP-CG

DDR_1333_NANYA

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

NC_6

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

Bus Width : DDR_DQ[10]
0 - 16b
1 - 32b (O)
Chip Width : DDR_DQ[8]
0 - 8b
1 - 16b (O)
Chip Size : DDR_DQ[6:5]
00 - 4Gbit
01 - 2Gbit (O)
10 - 1Gbit
11 - 512Mbit

DDR_AA0
DDR_AA1
DDR_AA2
DDR_AA3

DDR01_AA4
DDR01_AA5
DDR01_AA6

DDR23_AA4
DDR23_AA5
DDR23_AA6

DDR_AA7
DDR_AA8
DDR_AA9
DDR_AA10
DDR_AA11
DDR_AA12
DDR_AA13
DDR_AA14

DDR_BAA0
DDR_BAA1
DDR_BAA2

DDR_RASb
DDR_CASb
DDR_WEb

DDR_CKE

DDR01_CLK
DDR01_CLKb

DDR23_CLK
DDR23_CLKb

DDR_VREFA

DDR_RESETb

R411 240

1%

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_7

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

IC402-*2

NT5CB128M16BP-CG

DDR_1333_NANYA

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

NC_6

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

C453
1uF

6.3V

DDR01_CLK

DDR01_CLKb

R412

56
1%

C401
1000pF

DDR_DQ[0-7]

DDR_DQ[8-15]

IC401-*3

NT5CB128M16BP-DI

DDR_1600_NANYA

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_7

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

NC_6

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_7

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

IC402-*3

NT5CB128M16BP-DI

DDR_1600_NANYA

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

NC_6

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

R432

4.7K

OPT

R404

4.7K
OPT

4.7K
OPT

R402

4.7K
OPT

R406

LGE35230(BCM35230KFSBG)

DDR_DQ[0-7]

DDR_DQ[8-15]

DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]

DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]

DDR_DM[0]
DDR_DM[1]
DDR_DM[2]
DDR_DM[3]

DDR_QS0

DDR_QS0b

DDR_QS1

DDR_QS1b

DDR_QS2

DDR_QS2b

DDR_QS3

DDR_QS3b

DDR_DQ[14]

DDR_DQ[15]
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]

DDR_DQ[16-23]

DDR_DQ[24-31]

DDR_DM[0-3] DDR_QS3

DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]

U26
R26
U27
R27
V27
P26
U25
P27
R24
N24
T25
M23
R23
N25
T24
N26
L26
H27
L27
J26
M27
G27
M26
H26
L23
H25
L24
J24
M24
H23
L25
H24

T26
P25
J27
K24

T27
T28

P24
P23

K27
K28

K25
K26

DDR_DQA_0
DDR_DQA_1
DDR_DQA_2
DDR_DQA_3
DDR_DQA_4
DDR_DQA_5
DDR_DQA_6
DDR_DQA_7
DDR_DQA_8
DDR_DQA_9
DDR_DQA_10
DDR_DQA_11
DDR_DQA_12
DDR_DQA_13
DDR_DQA_14
DDR_DQA_15
DDR_DQA_16
DDR_DQA_17
DDR_DQA_18
DDR_DQA_19
DDR_DQA_20
DDR_DQA_21
DDR_DQA_22
DDR_DQA_23
DDR_DQA_24
DDR_DQA_25
DDR_DQA_26
DDR_DQA_27
DDR_DQA_28
DDR_DQA_29
DDR_DQA_30
DDR_DQA_31

DDR_DMA_0
DDR_DMA_1
DDR_DMA_2
DDR_DMA_3

DDR_DQSA_P_0
DDR_DQSA_N_0

DDR_DQSA_P_1
DDR_DQSA_N_1

DDR_DQSA_P_2
DDR_DQSA_N_2

DDR_DQSA_P_3
DDR_DQSA_N_3

R413
56
1%

+1.5V_DDR

C455

C454

1uF

1uF

6.3V

6.3V

DDR_AA0
DDR_AA1
DDR_AA2
DDR_AA3

DDR01_AA4
DDR01_AA5
DDR01_AA6

DDR_AA7
DDR_AA8

DDR_AA9
DDR_AA10
DDR_AA11
DDR_AA12
DDR_AA13

DDR_BAA0
DDR_BAA1
DDR_BAA2

DDR_CKE

+1.5V_DDR

R414 10K

DDR_RASb
DDR_CASb

DDR_WEb

DDR_RESETb

DDR_QS0
DDR_QS0b

DDR_QS1
DDR_QS1b

DDR_DM[0]
DDR_DM[1]

DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]

DDR_DQ[8]
DDR_DQ[14]
DDR_DQ[13]
DDR_DQ[12]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[15]
DDR_DQ[11]

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_7

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

NFM18PS105R0J

K4B2G1646C

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

C402

6.3V

OUTIN

GND

IC401

DDR_1333_SS

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

C412
1uF

ZQ

M8

H1

L8

R415 240

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_DDR

C415

0.01uF

C416

0.01uF

1%

+1.5V_DDR

DDR_AA14

R416

4.99K
1%

R417

4.99K
1%

DDR_VREFA

+1.5V_DDR

DDR23_CLK

DDR23_CLKb

DDR_DQ[16-23]

DDR_DQ[24-31]

R418

DDR23_AA4
DDR23_AA5
DDR23_AA6

R419
56

56

1%

1%

C419
1000pF

+1.5V_DDR

DDR_RESETb

DDR_DM[2]
DDR_DM[3]

DDR_DQ[24]
DDR_DQ[30]
DDR_DQ[29]
DDR_DQ[28]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[31]
DDR_DQ[27]

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

DDR_AA0
DDR_AA1
DDR_AA2
DDR_AA3

DDR_AA7
DDR_AA8

DDR_AA9
DDR_AA10
DDR_AA11
DDR_AA12
DDR_AA13

DDR_BAA0
DDR_BAA1
DDR_BAA2

DDR_CKE

R420 10K

DDR_RASb
DDR_CASb

DDR_WEb

DDR_QS2
DDR_QS2b

DDR_QS3b

DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]

NFM18PS105R0J

C433

6.3V

OUTIN

GND

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

K4B2G1646C

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13

NC_5

BA0
BA1
BA2

CK
CK
CKE

CS
ODT
RAS
CAS
WE

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

C426
1uF

IC402

DDR_1333_SS

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

ZQ

+1.5V_DDR

M8

H1

L8

R421 240

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_DDR

R422

4.99K
1%

R423

C435

4.99K

0.01uF

1%

DDR_VREFA

C436

0.01uF

+1.5V_DDR

1%

DDR_AA14

BCM35230

MAIN DDR

IC401-*1

K4B2G1646C-HCK0

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

DDR_1600_SS

VREFCA

VREFDQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

DDR23_AA6
DDR23_AA4

DDR23_AA5

DDR01_AA6
DDR01_AA4

DDR01_AA5

M8

H1

L8

ZQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

DDR_RESETb

DDR_CKE

DDR_AA13
DDR_AA14

DDR_AA2

DDR_AA11

DDR_AA3
DDR_AA7

DDR_AA9
DDR_AA8
DDR_AA0

DDR_AA1
DDR_BAA0
DDR_BAA2
DDR_BAA1
DDR_AA10
DDR_AA12

DDR_WEb

DDR_CASb
DDR_RASb

R428
82

R424 56
R425 56

AR401 56

AR402 56

AR403 56

AR404 56

AR405 56

AR406 56

R426 56
R427 56

IC402-*1

K4B2G1646C-HCK0

DDR_1600_SS

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

+1.5V_DDR

R429
82

C437
100pF

OPT

C441 1uF

VREFCA

VREFDQ

ZQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_6

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

4

M8

H1

L8

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

C438

C404

C406

C450

C408

C439

C409

C451

C411

C440

C452

R430

4.7K
OPT

C442
100pF

R431

4.7K
OPT

1uF

0.1uF

0.1uF

0.1uF

0.1uF

1uF

0.1uF

0.1uF

0.1uF

1uF

0.1uF

50

FROM LIPS & POWER B/D

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+3.5V_ST

RT1P141C-T112

Q502

R502

RL_ON

10K

+3.5V_ST

+12V

MLB-201209-0120P-N2

C506

0.1uF
50V

#16/#20/#23
LD - GND OR USE
LE(N.L.D.) - OPEN
LE(L.D.) - USE

C

Q501

B

2SC3052

E

L503

MLB-201209-0120P-N2

C508

0.1uF
16V

L501

R508

4.7K

3

1

2

PWR ON

3.5V

3.5V

GND/P.DIM2

NORMAL_26~55

P502
FW20020-24S

1

1

24V

3

3

GND

5

5

GND

7

7
9

9
11

11

GND

13

13

GND

15

15

12V

17

17

12V

19

19

12V

21

21 22
23

23 24

SLIM_32~55

SMAW200-H24S2

+24V

24V

2

2

24V

4

4

GND

6

6

GND

8

8

3.5V

10

10

3.5V

12

12

GND

14

14

GND/V-sync

16

16

INV ON

18

18

A.DIM

20

20

P.DIM1

22

Err OUT

24

25

P501

L504

MLB-201209-0120P-N2

POWER_16_URSA_SCAN

R574 0
R573 0

POWER_16_BCM_SCAN

R518

0

POWER_16_GND

C519

0.1uF
50V

L_VS
L/DIM0_VS
INV_CTL_18

A_DIM_20
PWM_DIM_22
ERROR_OUT_24

Power_DET

PD_+20V
R510-*4

5.6K

1%

PD_+20V
R511-*4

1.3K
1%

PD_+18.5V
R510-*3

4.7K
1%

PD_+18.5V
R511-*3

1.21K
1%

+12V

PD_+12V
R512

2.7K
1%

NON_PD_+3.5V
R513

1.21K
1%

+24V

+3.5V_ST

PD_24V

R510

8.2K
1%

PD_24V

R511

1.5K
1%

PD_+3.5V
R515
0
5%

VCC

C580

0.1uF
16V

VCC

C581

0.1uF
16V
NON_PD_+3.5V

R517
100K

IC503

NCP803SN293

3

1

GND

NON_PD_+3.5V

R516
100K

NON_PD_+3.5V

IC502

NCP803SN293

3

1

GND

+3.5V_ST

R522
10K
OPT

R520

RESET

2

RESET

2

100

R519
100

NON_PD_+3.5V

POWER_DET

ESD

C520

0.1uF
16V

not to RESET at 8kV ESD

15V-->3.6V
20V-->3.5V
24V-->3.48V
12V-->3.58V

ST_3.5V-->3.5V

+0.9V_CORE_BCM35230

+12V

L502

BLM18PG121SN1D

Placed on SMD-TOP

C505

C503

10uF

10uF

16V

16V

POWER_ON/OFF2_2

R503

C504

100pF

50V

0.9V_CORE_FB

R501
12K
1/16W
1%

R2

1K

R504
2K

C509

+3.3V_Normal
TEST

C507
1000pF

50V

R505

6.8K

10K

R506
330

R1

50V

220pF

R507

C510

0.01uF
50V

OPT

ENABLE

TPS40192DRCR

1

FB

2

COMP

3

VDD

4

PGD

5

C513

0.1uF
16V

0.9V_CORE_FB

IC501

11

THERMAL

EP_GND

HDRV

10

9

8

7

6

SW

BOOT

LDRV

BP5

R577 4.7

C515

0.47uF

25V

R578 4.7

C516

4.7uF

10V

Vout=0.591*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Max 7350 mA

AON7430

5D

4G

3S_3

2S_2

1S_1

AON7200

Q508

Q503

4 G

3

S_3

2 S_2

1 S_1

5 D

L505

1uH

C522
22uF
10V

Switching freq: 600K

OPT
C523
22uF
10V

C524
47uF
10V

PANEL_CTL

+12V

L511

12V_PANEL

MLB-201209-0120P-N2

OPT
R554
10K

R553
47K

+3.5V_ST

L517

BLM18PG121SN1D

POWER_ON/OFF1

C590

10uF

10V

C550

0.01uF
50V

R555
22K

C

Q505

B

2SC3052

E

+1.5V_DDR

AP7173-SPG-13 HF(DIODES)

IN

PG

VCC

R591

EN

10K

Vout=0.8*(1+R1/R2)

PANEL_POWER

C551

0.1uF

R558-*1

22K

5V_PANEL

R559-*1

2.7K

5V_PANEL

R557

22K

IC508

1

2

3

1.5A

4

50V

R558

10K

R559

B

THERMAL

12V_PANEL

1.8K

C

12V_PANEL

E

9

Q506
2SC3052

8

7

6

5

[EP]

OUT

FB

SS

GND

C552
10uF

AO3407A

25V

Q507

S

C593
560pF
50V

TYP 1450mA

PANEL_VCC

D

1uF

G

25V

C560

OPT

R575

PANEL_DISCHARGE_REG

C563

2K

2K

0.1uF

1/8W

1/8W

R576

50V

PANEL_DISCHARGE_REG

21:9_PANEL_DISCHARGE_REG

1/8W

3K

R575-*1

1/8W

3K

R576-*1

21:9_PANEL_DISCHARGE_REG

Max 800mA

+1.5V_DDR

R595

R1

4.3K
1%

R593

3.9K
1%

R592
1K
1%

R2

C594

22uF

10V

C591

0.1uF
16V

Q501,Q504,
Q505,Q506

Q502

Q507

IC502,IC503

1ST : 0TRIY80001A 2ND : 0TR387500AA

1ST : 0TRIH80004A, 2ND : EBK61012501, 3RD : 0TR102009AM

1ST : EBK60752501, 2ND : EBK61011501

1ST : EAN61151001, 2ND : EAN60670101

OS Module OPT

INV_CTL_18

A_DIM_20

POWER_20_ERROR_OUT

PWM_DIM_22

ERROR_OUT_24

0

POWER_24_GND

R524

POWER_22_PWM_DIM

R526

0

0R527

POWER_24_PWM_DIM

PIN No

DUAL COMPONENT

R532
100

POWER_18_A_DIM

R533

0

POWER_20_A_DIM

R531 0

POWER_20_PWM_DIM

0R538

0R529

POWER_22_A_DIM
R535 0

0R540

NON_OPC/NON_IOP

POWER_24_INV_CTL

R537

100

0R541

POWER_24_ERROR_OUT

<OS MODULE PIN MAP>

CMO(09)

LGD

INV_ON

18

V4:VBR-A

20

V5:NC

22

PWM_DIM

Err_out

24

LED:GND

A-DIM

PWM_DIM

POWER_18_INV_CTL

+3.3V_Normal

R523

4.7K

ERROR_OUT_PULL_UP

Err_out

NC

INV_ON

A_DIM

A_DIM

PWM_DIM

ERROR_OUT

A_DIM

PWM_DIM

ERROR_OUT

AUO

INV_ON

A-DIM

PWM_DIM

SHARP

INV_ON

Err_out

PWM_DIM

GND

R543

6.8K
OPT

+3.3V_Normal

R546
1K

C

2SC3052

E

+3.5V_ST

R551

OPT

10K

R547
10K

B

Q504

10K

R552
OPT

INV_CTL

CHECK PWR/MODULE PIN MAP

Vout=0.8*(1+R1/R2)

+12V

L507

BLM18PG121SN1D

C528
10uF
16V

R525

13K

C530
3300pF

50V

+3.3V_NORMAL

OPT
C532

0.1uF
16V

COMP

R542

10K

VIN

EN

6

4A

IC505

FB

4

AOZ1024DI

5

DCDC_OLD

3

EAN60660601

AGND

2

1

PGND

LX

7

POWER_ON/OFF2_2

L509

3.6uH

10V

C534
22uF

C535
22uF

10V

C537

OPT
50V

+3.3V_Normal

R2

R548

R549

R550

27K

4.7K

10K

MAX 2.8A

VIN

AGND

2

LX

7

1

3

PGND

EN

6

FB

COMP

R1

1%

1%

1%

IC505-*1

4

AOZ1024DI(SORTING)

DCDC_NEW

5

EAN60660602

+12V

L514
BLM18PG121SN1D

Placed on SMD-TOP

C546
10uF
16V

IC507

AOZ1073AIL-3

PGND

1

VIN

2

AGND

3A

3

FB

4

Vout=0.8*(1+R1/R2)

L516

LX_2

8

LX_1

7

EN

6

COMP

5

R564

3.6uH

NR8040T3R6N

R570

51K

POWER_ON/OFF2_1

R566

10K

R571

R572

3.6K

10K

C5572200pF

OPT
C559

0.1uF

12K

16V

+5V_USB+WIFI

+5V_Normal

+0.9V_CORE

Vout=0.8*(1+R1/R2)

OPT

C525
10uF
10V

+2.5V_BCM35230

+3.5V_ST

OPT

C531
1uF
OPT

R528
10K

C533

0.1uF

R536

10K

OPT

120-ohm

C527
10uF

6.3V

L506

POWER_ON/OFF2_1

+5V_Normal

VCTRL

IC504

1

PG

2

EN

THERMAL

3

VIN

4

2A

EAN61387601

AP2132MP-2.5TRG1

8

9

7

6

5

Max 960 mA

[EP]

GND

ADJ

VOUT

NC

Switching freq: 500K

R544
18K

R2

1%
R545

56K

R1

1%

+2.5V_BCM35230

C539

C538

10uF

47uF
10V

6.3V

+12V

L513
BLM18PG121SN1D

Placed on SMD-TOP

C545
10uF
16V

IC506

AOZ1073AIL-3

PGND

1

VIN

2

AGND

3A

3

FB

4

Vout=0.8*(1+R1/R2)

L515

R563

12K

NR8040T3R6N

C5552700pF

3.6uH

POWER_ON/OFF2_1

R565

10K

OPT
C558

0.1uF
16V

R567

R568

R569

51K

1.5K

10K

LX_2

8

LX_1

7

EN

6

COMP

5

MAX 1A

1%

C568

R1

22uF
10V

1/16W

1%

OPT

C565

100pF

50V

1%

R2

Switching freq: 500K

MAX 1.9A

1%

C567

R1

22uF

1%

10V

OPT

C564

100pF

50V

1%

R2

Switching freq: 500K

C570
22uF
10V

C571
22uF
16V
OPT

+5V_Normal

+5V_USB

Vout=0.6*(1+R1/R2)

BCM35230

POWER

5

58

NEC MICOM

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

For Debug

P601

12505WS-12A00

+3.5V_ST

1

2

3

4

5

6

7

8

9

10

11

12

13

R607

R610

+3.5V_ST

R606 10K

10K

10K

R61 5 22

R61 7 22

R62 1 22

EEPROM for Micom

IC601

M24C16-WMN6T

NC/E0

1

NC/E1

R60 1

47K

NC/E2

2

3

VSS

4

VCC

8

WC

7

SCL

6

SDA

5

MICOM MODEL OPTION

+3.5V_ST

PDP/3D

R613 10K

R611 10K

LCD/OLED

R612 10K

TOUCH_KEY

TACT_KEY

R614 10K

AMP_RESET_N

PANEL_CTL

INSTANT_MODE

R604 100

R605 100
R602 100
R603 100

R619

22

R616

22

I2C LED

R622 10K

PWM_LED

R623 10K

MICOM_RESET
NEC_ISP_Tx

NEC_ISP_Rx

OCD1A

OCD1B

FLMD0

NEC_ISP_Rx

NEC_ISP_Tx

R624 10K

10YEAR_TOOL

R625 10K

11YEAR_TOOL

+3.5V_ST

MODEL1_OPT_0
MODEL1_OPT_1
MODEL1_OPT_2
MODEL1_OPT_3

EEPROM_SCL

EEPROM_SDA

PIN NAME

MODEL_OPT_0

MODEL_OPT_1 I2C_LED

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_3

MODEL_OPT_1

MODEL_OPT_2

MODEL OPTION

PIN NO.

LCD

LOW

HIGH

10YEAR_TOOL

8

(10 SENSOR)

11

30

TOUCH_KEY

31

PDP/3D

PDP

0 0

1

0 10

10

LOW

11YEAR_TOOL
(11 SENSOR)

PWM_LED

TACT_KEY

LCD/OLED

OLED 3D

TBD

0

GND

+3.5V_ST

C602

13pF

C603

50V

50V

13pF

X601

10MHz

47K

OPT

R637

10Mhz Crystal

+3.5V_ST

C604

0.1uF

+3.5V_ST

VDD

R626 4.7K

SCL2_3.3V

SDA2_3.3V

EEPROM_SCL

EEPROM_SDA

HDMI_CEC

POWER_ON/OFF2_1

AMP_MUTE

MODEL1_OPT_0

SOC_RESET

INV_CTL

MODEL1_OPT_1

OCD1B

S/T_SCL

+3.5V_ST

R628 4.7K

R629

R630

R631 22

R632 22

R633
22

OPT

R627

4.7K

22

22

P60/SCL0
P61/SDA0

P62/EXSCL0

P33/TI51/TO51/INTP4

P73/KR3
P72/KR2
P71/KR1
P70/KR0

P32/INTP3/OCD1B

P63

P75
P74

1
2
3
4
5
6
7
8
9
10
11
12

48

13

P31/INTP2/OCD1A

OPT

1

HIGHLOW_SMALL

1

1

+3.5V_ST

4.7K

R636

R63 8 22

S/T_SDA

OCD1A

FLMD0

R641

R639 10K

GND

C605 0.1uF

P122/X2/EXCLK/OCD0B

P121/X1/OCD0A

REGC

VSS

44

45

46

47

IC602

uPD78F0514

NEC_MICOM

14

15

16

17

P30/INTP1

P15/TOH0

P17/TI50/TO50

P16/TOH1/INTP5

10K

R64 0

IR

POWER_DET

LED_R/BUZZ

LED_B/LG_LOGO

0

15pF

C606

MICOM_DOWNLOAD

C607 15pF

X602

32.768KHz
R642

4.7M
OPT

RESET

P124/XT2/EXCLKS

P123/XT1

FLMD0

41

42

43

18

19

20

P14/RXD6

P13/TXD6

P12/SO10

P11/SL10/RXD0

NEC_ISP_Tx

NEC_ISP_Rx

POWER_ON/OFF2_2

WIRELESS_PWR_EN

WIRELESS_DET

C608

0.1uF
16V

R643 22

P120/INTP0/EXLVI

P41

P40

37

38

39

40

36
35
34
33
32
31
30
29
28
27
26
25

21

22

23

24

AVSS

AVREF

P10/SCK10/TXD0

NEC_TXD

NEC_RXD MICOM_RESET

+3.5V_ST

47K

OPT

270K

R647 20K

R646

20K

1/16W

SW1

JTP-1127WEM

4 3

1/16W
1%

1%

12

R644

R645

P140/PCL/INTP6
P00/TI000
P01/TI010/TO00
P130
P20/ANI0
ANI1/P21
ANI2/P22
ANI3/P23
ANI4/P24
ANI5/P25
ANI6/P26
ANI7/P27

+3.5V_ST

C609 1uF

R648 10K





R649 0

OPT

RL_ON

SCART_MUTE

C

Q601

B

2SC3052

E

EDID_WP

MODEL1_OPT_3

MODEL1_OPT_2

POWER_ON/OFF1

MICOM_DOWNLOAD

SIDE_HP_MUTE

KEY2

KEY1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

MICOM

6

50

PCM_MDI[0-7]

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

BCM INT Demod

BCM INT Demod

CI TS INPUT

PCM_TS_DATA[0-7]

PCM_TS_CLK

PCM_TS_VAL

PCM_TS_SYNC

CI TS OUTPUT

/CI_CE1

NAND_REb

/PCM_OE

NAND_WEb

/PCM_WE

FE_TS_DATA[0-7]

PCM_MISTRT

PCM_MIVAL_ERR

PCM_MCLKI

CI 9

CI 15

Close to BCM35230

PCM_MDI[0]
PCM_MDI[1]

PCM_MDI[2]
PCM_MDI[3]
PCM_MDI[4]

PCM_MDI[5]
PCM_MDI[6]
PCM_MDI[7]

FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]

Close to BCM35230

NIM_TS_SYNC
NIM_VAL_ERR

NIM_TS_CLK

PCM_TS_DATA[0]
PCM_TS_DATA[1]
PCM_TS_DATA[2]
PCM_TS_DATA[3]

PCM_TS_DATA[4]
PCM_TS_DATA[5]
PCM_TS_DATA[6]
PCM_TS_DATA[7]

IC1901

CI

74LVC125APW

1OE

1

1A

2

1Y

3

2OE

4

2A

5

2Y

6

GND

7

R1909 22
R1910

AR1903 22

R1915 22
R1916 22

R1901 22
R1902

R1903 22
R1904 22
R1905 22

R1906
R1907 22

R1908 22

R1917
R1918
R1919

Close to Tuner

R1920
R1921
R1922

Close to CI Slot

Close to CI Slot

C1916
12pF
50V
OPT

+3.3V_CI

C1901

VCC

14

4OE

13

4A

12

4Y

11

3OE

10

3A

9

3Y

8

OPT

22

OPT

OPT

OPT
OPT

CI

22

CI
CI
CI
CI

22

CI
CI
CI

OPT

22

OPT

22

OPT

22

CI

22

CI

22

CI

22

AR1901

AR1902 100

R1923

R1924
R1925

0.1uF

OPT

16V

NAND_WEb

CI 45

/PCM_IOWR

NAND_REb

CI 44

/PCM_IORD

100

CI

220

CI

100

CI

100

/CI_CE2

CI

CI

CI_MDI[0]
CI_MDI[1]

CI_MDI[2]
CI_MDI[3]
CI_MDI[4]
CI_MDI[5]

CI_MDI[6]
CI_MDI[7]

CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]

CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]

/CI_CE1

/CI_CE2

/CI_EN1

/CI_EN1

/PCM_CE1

R1977

10K

OPT

+5V_CI_ON

CI

CI 7

CI_MDI[0-7]

CI_MISTRT
CI_MIVAL_ERR

CI_MCLKI

CI_TS_DATA[0-7]

CI_TS_CLK

CI_TS_VAL
CI_TS_SYNC

R1970
22

1A

1

1B

2

1Y

3

2A

4

2B

5

2Y

6

GND

7

IC1902

74AHC08PW

CI

DUAL COMPONENT

Q1901

Q1902

IC1904

OE DIR CI_DATA NAND_DATA
L L OUTPUT INPUT
L H INPUT OUTPUT
H X Z Z

CI_DATA[0-7]

+3.3V_CI

OPT

C1902

VCC

14

4B

13

4A

12

4Y

11

3B

10

3A

9

3Y

8

0.1uF
16V

NAND_RBb

CI_ADDR[1]

NAND_CLE

CI_ADDR[0]

NAND F/M Data

1ST : 0TRIY80001A 2ND : 0TR387500AA

1ST : EBK60752501, 2ND : EBK61011501

1ST : 0ISTLPH062A, 2ND : EAN40055001

+5V_CI_ON

R1971

10K

/PCM_IORD
/PCM_IOWR

PCM_RST

/PCM_WAIT

/CI_EN1

PCM_ADDR[2]

PCM_ADDR[3]
PCM_ADDR[4]
PCM_ADDR[7]
PCM_ADDR[9]
PCM_ADDR[11]
PCM_ADDR[12]

PCM_ADDR[13]

CI_DATA[0]
CI_DATA[1]

CI_DATA[2]

CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]

/CI_EN1

R1976
R1974

R1927
R1928

R1926

OPT

R1986 22

CI

22

CI

22

CI_MDI[0-7]

CI

22

CI

22

OPT

22

AR1904 100

R1980 100

AR1905 100

+3.3V_CI

C1915

0.1uF
16V

CI

CI

R1929

10K
OPT

+3.3V_CI

0.1uF
C1903
16V

CI

CI

CI
CI

74LVC245A

VCC

R1972
10K

CI

+5V_CI_ON

R1930

10K
OPT

IC1905

20

OE

19

B0

18

B1

17

B2

16

B3

15

B4

14

B5

13

B6

12

B7

11

IC1903

74LVC245A

VCC

20

OE

19

B0

18

B1

17

B2

16

B3

15

B4

14

B5

13

B6

12

B7

11

/CI_CD1

CI_TS_DATA[3]

CI_TS_DATA[4]

CI_TS_DATA[5]

CI_TS_DATA[6]

CI_TS_DATA[7]

CI_MDI[0]
CI_MDI[1]
CI_MDI[2]
CI_MDI[3]

CI_MDI[4]
CI_MDI[5]
CI_MDI[6]
CI_MDI[7]

CI_TS_CLK

CI_TS_VAL

CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]

/CI_CD2

DIR

1

CI

A0

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

GND

10

CI

DIR

1

A0

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

GND

10

C1904

0.1uF
CI

R1985
10K
CI

C1905
10uF
10V

CI

NAND_DATA[0]
NAND_DATA[1]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[6]
NAND_DATA[7]

CI_ADDR[2]
CI_ADDR[3]
CI_ADDR[4]
CI_ADDR[7]
CI_ADDR[9]
CI_ADDR[11]
CI_ADDR[12]
CI_ADDR[13]

R1932
10K

CI

R1931 22

+5V_CI_ON

R1933
10K
OPT

CI

R1937

R1936

OPT

10K

R1934

R1935 0

CI

R1938 62

NAND_REb

NAND_DATA[0-7]

/CI_DET1

62

CI

TS_OUT3
TS_OUT4
TS_OUT5
TS_OUT6
TS_OUT7

CARD_EN2

TS_IN_SYN

0

TS_OUT_CLK

CI_RESET

CI_WAIT

OPT

CI

TS_OUT_VAL
TS_OUT_SYN

TS_OUT0
TS_OUT1
TS_OUT2

/CI_DET2

IORD
IOWR

TS_IN0
TS_IN1
TS_IN2
TS_IN3

TS_IN4
TS_IN5
TS_IN6
TS_IN7

INPACK

GND

35
36
37
38
39
40
41
42

VS1

43
44
45
46
47
48
49
50

VCC

51

VPP

52
53
54
55
56
57
58
59
60

REG

61
62
63
64
65
66
67

GND

68

P1901

10067972-000LF CI

69

GND

1

DAT3

2

DAT4

3

DAT5

4

DAT6

5

DAT6

6

/CARD_EN1

7

ADDR10

8

/O_EN

9

ADDR11

10

ADDR10

11

ADDR8

12

ADDR13

13

ADDR14

14

/WR_EN

15

/IRQA

16

VCC

17

VPP

18

TS_IN_VAL

19

TS_IN_CLK

20

ADDR12

21

ADDR7

22

ADDR6

23

ADDR5

24

ADDR4

25

ADDR3

26

ADDR2

27

ADDR1

28

ADDR0

29

DAT0

30

DAT1

31

DAT2

32

/IO_BIT

33

GND

34

G1G2

CI POWER ENABLE CONTROL

+5V_Normal

OPT

PCM_5V_CTL

3,3V_CI POWER

+3.3V_Normal

CI

C1906

0.1uF
16V

C1907

0.1uF

R1944

R1945

R1946
10K
OPT

0

OPT

10K

OPT

L1901

BLM18PG121SN1D

CI_DATA[3]
CI_DATA[4]
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]

CI
CI
CI

CI
CI
CI

CI

CI

C1910 0.1uF

CI
CI
CI
CI
CI
CI
CI
CI
CI

R1940
10K

OPT

CI

R1956 22

R1962
R1963
R1957 22
R1958
R1959
R1960
R1961

CI

R1947
R1948
R1949
R1950
R1951
R1952
R1953
R1954
R1955

CI_DATA[0]
CI_DATA[1]
CI_DATA[2]

CI_MIVAL_ERR
CI_MCLKI
CI_MISTRT

R1942

4.7K

B

CI

+3.3V_CI

C1908

CI

0.1uF

CI_DATA[0-7]

/PCM_CE1

+5V_CI_ON

R1973

22

CI_ADDR[10]

22

PCM_ADDR[11]

22

PCM_ADDR[9]

22

CI_ADDR[8]

22

PCM_ADDR[13]

22

CI_ADDR[14]

R1967 22

C1913

CI

0.1uF
16V

22
22
22
22
22
22
22
22
22

PCM_ADDR[12]
PCM_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
PCM_ADDR[4]
PCM_ADDR[3]
PCM_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]

CI

CI_ADDR[10]

PCM_ADDR[11]
PCM_ADDR[9]
CI_ADDR[8]
PCM_ADDR[13]
CI_ADDR[14]

PCM_ADDR[12]
PCM_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
PCM_ADDR[4]
PCM_ADDR[3]
PCM_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]

10K

+5V_CI_ON

R1968

10K

CI

/PCM_OE

R1975

10K

CI
R1964 22

CI

/PCM_WE
/PCM_IRQA

CI

+5V_CI_ON

Q1902

AO3407A

D

S

CI

G

C1909

R1943

CI

22K

R1987

2.2K
CI

C

Q1901
2SC3052
CI

E

4.7uF
16V
OPT

BLM18PG121SN1D

C1912

0.1uF
16V

L1902

CI

CI

C1914

CI

0.1uF
16V

+5V_CI_ON

R1969

10K

CI

CI DETECT

CI CONTROL INTERFACE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

/CI_CD2

/CI_CD1

+3.3V_CI

R1939

10K

CI

R1941

10K
CI

IC1904

74LVC1G32GW

1B 5 VCC

CI

3GND2A4 Y

BCM35230

CI

+3.3V_CI

OPT

GND

C1911

0.1uF

16V

CI

R1965

+3.3V_CI

R1966

10K

CI

47

CI_DET

2010.11.11

19

58

DVB-S2 LNB Part Allegro

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

(Option:LNB)

LNB_OUT

2A

D2302

US1M(suzhou)

1000V

LNB

C2301

0.22uF
25V

A_GND

LNB

D2301
SMAB34

40V

C2307

0.01uF
50V

LNB

close to Boost pin(#1)

C2302

1uF
50V

LNB

LNB_TX

C2324

68uF

35V

LNB

C2303

0.1uF
50V

LNB

C2304 0.1uF

LNB

A_GND

C2305

68uF

35V

LNB

DCDC_GND

D2303
SMAB34

40V

LNB

A_GND

C2306 22000pF

LNB

A_GND

BOOST

VCP

TCAP

NC_1

TDO

EXTM

TDI

D2304

SMAB34

40V

LNB

DCDC_GND

[EP]

1

2

3

4

5

6

7

3A

LNB

L2301

SP-7850_33

VIN

GNDLX

LNB

25

26LX27

28

THERMAL

29

IC2301

A8290SETTR-T

LNB

9

10

8

SDA11ADD12SCL

GND

VREG

33UH

2.4A

BFI

24

+12V_LNB

NC_9

23

13

NC_2

BFO

IRQ

22

14

21

20

19

18

17

16

15

C2311
10uF
25V

LNB

DCDC_GND

NC_8

NC_7

BFC

NC_6

NC_5

NC_4

NC_3

+3.3V_Normal

A_GND

A_GND

C2312

0.1uF
50V

close to VIN pin(#25)

LNB

A_GND

R2313
0

DCDC_GND

DCDC_GND and A_GND are connected
DCDC_GND and A_GND are connected in pin#27

PCB_GND and A_GND are connected

Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A

R2314
0

A_GND

A_GND

LNB

C2308 0.22uF

LNB

R2301 33

OPT

C2309 27pF

SDA1_3.3V

LNB

R2302 33

27pF

C2310

SCL1_3.3V

LNB

R2303 0

OPT

LNB_INT

R2304

4.7K

LNB

+12V

L2302

BLM18PG121SN1D

Max 1.3A

+12V_LNB

LNB

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

LNB

2010.11.02

23

57

NON CHB

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

TS Output

CHBO_TS_SERIAL
CHBO_TS_CLK
CHBO_TS_VAL_ERR
CHBO_TS_SYNC

CHB_RESET

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

NON CHB

28

50

LVDS

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

P3501

FI-RE51S-HFK-A

52

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

GND

[51Pin LVDS OUTPUT Connector]

NC

NC

NC

NC

NC

AUO_65_MIRROR

LVDS_SEL

NC

NC

L/DIM_ENABLE

GND

RA0N

RA0P

RA1N

RA1P

RA2N

RA2P

GND

RACLKN

RACLKP

GND

RA3N

RA3P

RA4N

RA4P

GND

BIT_SEL

RB0N

RB0P

RB1N

RB1P

RB2N

RB2P

GND

RBCLKN

RBCLKP

GND

RB3N

RB3P

RB4N

RB4P

GND

GND

GND

GND

GND

NC

VLCD

VLCD

VLCD

VLCD

R3512 33

LGD_2D/3D_CTRL

+3.3V_Normal

R3511

3.3K
AUO_65_MIRROR

2D/3D_CTL

PANEL_VCC

L3501
MLB-201209-0120P-N2

C3501
10uF
25V

OPT

LVDS_TXA0N

LVDS_TXA0P

LVDS_TXA1N

LVDS_TXA1P

LVDS_TXA2N

LVDS_TXA2P

LVDS_TXACLKN

LVDS_TXACLKP

LVDS_TXA3N

LVDS_TXA3P

LVDS_TXA4N

LVDS_TXA4P

LVDS_TXB0N

LVDS_TXB0P

LVDS_TXB1N

LVDS_TXB1P

LVDS_TXB2N

LVDS_TXB2P

LVDS_TXBCLKN

LVDS_TXBCLKP

LVDS_TXB3N

LVDS_TXB3P

LVDS_TXB4N

LVDS_TXB4P

C3502
1000pF
50V

LVDS_SEL

+3.3V_Normal

R3501

3.3K
LVDS_SEL_HIGH

R3502
10K

LVDS_SEL_LOW

C3503

0.1uF
50V

BIT_SEL

[41Pin LVDS OUTPUT Connector]

P3502

FI-RE41S-HFK-A

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

R3503

10K

BIT_SEL_LOW

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

GND

NC

NC

NC

NC

NC

NC

NC

NC

GND

RC0N

RC0P

RC1N

RC1P

RC2N

RC2P

GND

RCCLKN

RCCLKP

GND

RC3N

RC3P

RC4N

RC4P

GND

GND

RD0N

RD0P

RD1N

RD1P

RD2N

RD2P

GND

RDCLKN

RDCLKP

GND

RD3N

RD3P

RD4N

RD4P

GND

GND

R3514 33
AUO_2D/3D_CTRL

2D/3D_CTL

LVDS_TXC0N

LVDS_TXC0P

LVDS_TXC1N

LVDS_TXC1P

LVDS_TXC2N

LVDS_TXC2P

LVDS_TXCCLKN

LVDS_TXCCLKP

LVDS_TXC3N

LVDS_TXC3P

LVDS_TXC4N

LVDS_TXC4P

LVDS_TXD0N

LVDS_TXD0P

LVDS_TXD1N

LVDS_TXD1P

LVDS_TXD2N

LVDS_TXD2P

LVDS_TXDCLKN

LVDS_TXDCLKP

LVDS_TXD3N

LVDS_TXD3P

LVDS_TXD4N

LVDS_TXD4P

LOCAL DIMMING

[To LED DRIVER]

P3503

12507WR-08L

1

2

3

4

5

6

7

8

9

NON USED L/DIMMING
(FOR EDGE_LED)

L/DIM0_MOSI
L/DIM0_SCLK
L/DIM0_VS

M1_MOSI
M1_SCLK
M2_MOSI
M2_SCLK
M3_MOSI
M3_SCLK

+3.3V_FRC

R3509
10K
OPT

R3510
10K

PLACE SERIAL RESISTORS CLOSE TO URSA4

R3506 33

R3507 33

R3504 0

LPB_42/47/55

R3505 0

LPB_42/47/55

R3508 33

R3513

4.7K

M0_SCLK

M0_MOSI

SCL2_3.3V

SDA2_3.3V

L_VS

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

Interface block

2010. 10. 20

35

58

DUAL COMPONENT

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

BODY_SHIELD

BODY_SHIELD

EAG62611201

RSD-105156-100

BODY_SHIELD

EAG62611201

20

EAG62611201

RSD-105156-100

JK3703

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

JK3701

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

HOT_PLUG_DETECT

19

VDD[+5V]

18

DDC/CEC_GND

17

SDA

16

SCL

15

RESERVED

14

CEC

13

TMDS_CLK-

12

TMDS_CLK_SHIELD

11

TMDS_CLK+

10

TMDS_DATA0-

9

TMDS_DATA0_SHIELD

8

TMDS_DATA0+

7

TMDS_DATA1-

6

TMDS_DATA1_SHIELD

5

TMDS_DATA1+

4

TMDS_DATA2-

3

TMDS_DATA2_SHIELD

2

TMDS_DATA2+

1

HOT_PLUG_DETECT

VDD[+5V]

DDC/CEC_GND

SDA

SCL

RESERVED

CEC

TMDS_CLK-

TMDS_CLK_SHIELD

TMDS_CLK+

TMDS_DATA0-

TMDS_DATA0_SHIELD

TMDS_DATA0+

TMDS_DATA1-

TMDS_DATA1_SHIELD

TMDS_DATA1+

TMDS_DATA2-

TMDS_DATA2_SHIELD

TMDS_DATA2+

HOT_PLUG_DETECT

VDD[+5V]

DDC/CEC_GND

SDA

SCL

RESERVED

CEC

TMDS_CLK-

TMDS_CLK_SHIELD

TMDS_CLK+

TMDS_DATA0-

TMDS_DATA0_SHIELD

TMDS_DATA0+

TMDS_DATA1-

TMDS_DATA1_SHIELD

TMDS_DATA1+

TMDS_DATA2-

TMDS_DATA2_SHIELD

TMDS_DATA2+

5V_HDMI_1

5V_HDMI_2

OPT

R3701

3.6K

5V_HDMI_3

OPT

R3737

3.6K

R3704 0

OPT

R3702

3.6K

R3736 0

OPT

VR3702

10V

OPT

OPT

VR3703

10V

OPT

R3705 0

OPT
VR3704
10V

1ST : T-BAT54_SUZHO, 2ND : 0DSON00138A

1ST : EAN60991801, 2ND : T-AZ1117BH_1.8, 3RD : EAN54428201

+3.5V_ST

G

SBD

Q3707

BSS83

120K

R3725

HDMI S/W OUTPUT

HDMI_RX0+

HDMI_CLK-

HDMI_RX0-

HDMI_CLK+

TX0P

TX0N

TXCP

TXCN

VCC33_3

R0XCN

R0XCP

R0X0N

R0X0P

R0X1N

R0X1P

R0X2N

R0X2P

[EP]GND

60

61

62

63

64

65

66

67

68

69

70

71

R1XCN
R1XCP
R1X0N
R1X0P
R1X1N
R1X1P
R1X2N
R1X2P

VCC33_1

RSVD_1

R2XCN
R2XCP
R2X0N
R2X0P
R2X1N
R2X1P
R2X2N
R2X2P

72

1
2

THERMAL

3

73
4
5
6
7
8
9

SII9287B

10
11
12
13
14
15
16
17
18

19

R3XCN20R3XCP21R3X0N22R3X0P23R3X1N24R3X1P25R3X2N26R3X2P

IC3701

27

RSVD_2

VCC33_2

28

29

DSDA030DSCL0

31

CBUS_HPD0

R3744

100K

HDMI_RX1-

HDMI_RX1+

TX2N

TX1P

TX1N

58

59

32

33

DSDA134DSCL1

R0PWR5V

+3.3V_Normal

HDMI_RX2+

HDMI_RX2-

TPWR_CI2CA

TX2P

55

56

57

54
53
52
51
50
49
48
47
46
45
44
43
42
41

DSCL2

40

DSDA2

39

SBVCC

38

MICOM_VCC33

37

35

36

R1PWR5V

CBUS_HPD1

C3727

0.1uF
16V

R3739

4.7K

CSCL
CSDA
INT
CEC_D
CEC_A
R4PWR5V
DSCL4
DSDA4
R3PWR5V
CBUS_HPD3
DSCL3
DSDA3
R2PWR5V
CBUS_HPD2

R3726
10

C3713

1uF

C3725
10uF

5V_HDMI_1

R3728

1K1%1/1 6W

L3701

BLM18PG121SN1D

OPT

R3740 33

OPT

R3741 33

R3742 33

R3743 33

+5V_Normal

R3729

0

C3714

1uF

C3715

1uF
10V

+3.3V_HDMI

HDMI_HPD_3

DDC_SCL_3

DDC_SDA_3

HDMI_HPD_2

DDC_SCL_2

DDC_SDA_2

C3728
10uF

SCL1_3.3V

SDA1_3.3V

SCL3_3.3V

SDA3_3.3V

C3712

1uF

R3738
10

C3716

1uF

5V_HDMI_3

R3727

1K1%1/1 6W

R3733
10

5V_HDMI_2

R3734

1K1%1/1 6W

OPT

R3718

OPT

OPT

R3706

1K

R3719

1K

1K

HDMI_HPD_1

DDC_SDA_1

DDC_SCL_1

CEC_REMOTE

CK-_HDMI1

CK+_HDMI1

D0-_HDMI1

D0+_HDMI1

D1-_HDMI1

D1+_HDMI1

D2-_HDMI1

D2+_HDMI1

HDMI_HPD_2

DDC_SDA_2

DDC_SCL_2

CEC_REMOTE

CK-_HDMI2

CK+_HDMI2

D0-_HDMI2

D0+_HDMI2

D1-_HDMI2

D1+_HDMI2

D2-_HDMI2

D2+_HDMI2

HDMI_HPD_3

CEC_REMOTE

CK-_HDMI3

CK+_HDMI3

D0-_HDMI3

D0+_HDMI3

D1-_HDMI3

D1+_HDMI3

D2-_HDMI3

D2+_HDMI3

DDC_SDA_3

DDC_SCL_3

ARC

C3701

0.1uF

R37 08

63. 4

+5V_Normal

D3713

+5V_Normal

D3714

R3709

4.7K

R3710

4.7K

R3707
150

HDMI_ARC

5V_HDMI_1

A1CA2

5V_HDMI_3

A1CA2

R3711

4.7K

R3712

4.7K

DDC_SDA_1

DDC_SCL_1

DDC_SDA_3

DDC_SCL_3

+5V_Normal

5V_HDMI_2

R3713

4.7K

A1CA2

R3714

4.7K

D3715

EDID Pull-up

DDC_SDA_2

DDC_SCL_2

* HDMI CEC

CEC_REMOTE HDMI_CEC

+3.3V_HDMI

C3705

C3706

10uF

10uF

CK-_HDMI1

CK+_HDMI1

D0-_HDMI1

D0+_HDMI1

D1-_HDMI1

D1+_HDMI1

D2-_HDMI1

D2+_HDMI1

HDMI1

CK-_HDMI2

CK+_HDMI2

D0-_HDMI2

D0+_HDMI2

D1-_HDMI2

D1+_HDMI2

D2-_HDMI2

D2+_HDMI2

HDMI2

C3707
10uF

C3708

0.1uF

C3709

0.1uF

OPT

C3726

OPT

VR3701

0.1uF
16V

10V

OPT

GND

HDMI1

OPT

C3702

OPT

0.1uF

VR3705

16V

10V

GND

HDMI2

OPT

C3703

OPT

VR3706

0.1uF
16V

10V

GND

R3717

D3716

BAT54_SUZHO

C3710

0.1uF

27K

D3716

IC3702

C3711

0.1uF

RSD-105156-100

JK3702

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

HDMI3

CK-_HDMI3

CK+_HDMI3

HDMI3

D0-_HDMI3

D0+_HDMI3

D1-_HDMI3

D1+_HDMI3

D2+_HDMI3

D2-_HDMI3

DDC_SCL_1

DDC_SDA_1

HDMI_HPD_1

BCM35230

5037LV7 HDMI

Ethernet Block

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

JK3901

XRJV-01V-D12-180

+2.5V_BCM35230

L3901
MLB-201209-0120P-N2

1

2

3

4

5

6

7

8

R3901 240

D1

D2

R3902 240

D3

D4

9

C3901

0.1uF

16V

C3902

0.1uF

16V

+3.3V_Normal

D3902

ADLC 5S 03 015

5.5V

D3901
ADLC 5S 03 015

5.5V

D3903

ADLC 5S 03 015

5.5V

D3904
ADLC 5S 03 015

5.5V

D3906

ADLC 5S 03 015

5.5V

D3905
ADLC 5S 03 015

5.5V

EPHY_TDP

EPHY_TDN

EPHY_RDP

EPHY_RDN

EPHY_LINK

EPHY_ACTIVITY

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

5039LV7 ETHERNET

JK4001

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

PPJ238-01

[RD1]E-LUG

6C

[RD1]O-SPRING

5C

[RD1]CONTACT

4C

[WH1]O-SPRING

5B

[YL1]CONTACT

4A

[YL1]O-SPRING

5A

[YL1]E-LUG

6A

[RD2]E-LUG

6H

[RD2]O-SPRING_2

5H

[RD2]CONTACT

4H

[WH2]O-SPRING

5G

[RD2]O-SPRING_1

5F

[RD2]E-LUG-S

7F

[BL2]O-SPRING

5E

[BL2]E-LUG-S

7E

[GN2]CONTACT

4D

[GN2]O-SPRING

5D

[GN2]E-LUG

6D

COMP/AV JACK PACK

ZD4009

5.1V
ZD4010

5.1V

D4007

5.6V

D4009
AMOTECH

5.6V

D4008
AMOTECH

5.6V

R4016
75

+3.3V_Normal

R4017

2.7K

D4010

5.6V

D4011

5.6V

ZD4011

5.1V

ZD4012

5.1V

ZD4013

5.1V

ZD4014

5.1V

ZD4015

5.1V

ZD4016

5.1V

D4012

5.6V

R4018
470K

C4012
47pF
50V

R4019
470K

R4023

1K

R4020
0

R4021
0

R4022
0

+3.3V_Normal

R4024
470K

R4025

470K

R4027
75

R4028
75

R4029

2.7K

R4026
75

C4013
560pF
50V

C4014
560pF
50V

C4015
560pF
50V

BLM18PG121SN1D

C4016
560pF
50V

22

R4006

1/10W
5%

22

1/10W
5%

1%

R403010

BLM18PG121SN1D

L4006

L4007

R4007

C4022
560pF
50V

C4023
560pF
50V

C4020
560pF
50V

C4021
560pF
50V

AV1_R_IN

AV1_L_IN

AV1_CVBS_DET

AV1_CVBS_IN

22

R4032

22

R4033

1%

R403410

1%

R403510

1%

R403610

1K

R4031

AV2_R_IN

AV2_L_IN

COMP1_DET

COMP_AUDIO_R_IN

COMP_AUDIO_L_IN

L4001

CM2012FR27KT

C4001
27pF
50V

L4002

CM2012FR27KT

C4003
27pF
50V

L4003

CM2012FR10KT

C4005
47pF
50V

FOR EMI

C4002
27pF
50V

C4004
27pF
50V

C4006
47pF
50V

COMP1_Pr

COMP1_Pb

COMP1_Y

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

CLOSE TO JUNCTION

BCM35230

LV7 EU COMP/AV

40 50

DUAL COMPONENT

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

D4101,D4102

USB

1234

USB DOW N S TREA M

P41 01

3AU 04S- 305 -ZC- (LG)

5

1ST : EAH42720601 2ND : EAH60994401

IC4101

L4101

MLB-201209-0120P-N2

120-ohm

C4101

C4102

10uF

100uF

10V

16V

OPT

D4103

RCLAMP0502BA

NC

OUT_2

OUT_1

FLG

AP2191DSG

8

7

6

5

D4101

CDS3C05HDMI1

5.6V

1

2

3

4

GND

IN_1

IN_2

EN

SIDE_USB_CTL1

+3.3V_Normal

R4101

4.7K
OPT

D4102

CDS3C05HDMI1

5.6V

R4102

2.7K

SIDE_USB_DM

SIDE_USB_DP

+5V_USB

SIDE_USB_OCD1

C4103

0.1uF
16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

LV7 EU USB 41 50

Option Table

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

H/NIM

(EU)

Non_S

H/NIM

SCART

BOOSTER

* DVB-T/C/S2 combo Tuner: DVB-T/C is H/NIM, and DVB-S2 is F/NIM

F/NIM_T/C

Non_S
F/NIM

SCART

BOOSTER

EU_BR_F/NIM

RF_SW_CTL

EU_F/NIM

TC_F/NIM

DVB-T/C/S2

(Eu,Aisa)

S

H/NIM

SCART

HORIZONTAL_T

TU4401-*1
TDFR-G236D

HORIZONTAL_T2

NC_1

1

BST_CNTL

2

+B1[5V]

3

NC_2[RF_AGC]

4

NC_3

5

SCLT

6

SDAT

7

NC_4

8

SIF

9

NC_5

10

VIDEO

11

GND

12

+B2[1.2V]

13

+B3[3.3V]

14

RESET

15

+B4[2.5V]

16

SCL

17

SDA

18

ERR

19

SYNC

20

VALID

21

MCL

22

D0

23

D1

24

D2

25

D3

26

D4

27

D5

28

D6

29

D7

30

31

SHIELD

31

SHIELD

IF_N

IF_P

IF_AGC

TU_RESET_SUB

RF_SWITCH_CTL_2

RF_SWITCH_CTL

TW9910_RESET

H/NIM & F/NIM & T/C/S2 Combo Tuner

Non_S: not use DVB-T/C/S2 combo Tuner(use H/NIM and F/NIM)

S: use DVB-T/C/S2 combo Tuner

H/NIM: use H/NIM(H/NIM, DVB-T/C/S2 combo Tuner)
F/NIM: use F/NIM(EU_T/C, EU_DVB-T2, China)

SCART: use Scart Jack

CN : use China F/NIM

BOOSTER: use BOOSTER_CTL

RF_SW_CTL: use RF_SWITCH_CTL

TC_F/NIM: use EU_DVB-T/C F/NIM

T2_CN_F/NIM_BR: use EU_DVB-T2, China F/NIM, BRZIL F/NIM

EU_F/NIM: use EU_F/NIM

EU_BR_F/NIM: use EU_F/NIM and Brazil F/NIM

TU4401
TDFR-G136D

NC_1

1

BST_CNTL

2

+B1[5V]

3

NC_2[RF_AGC]

4

NC_3

5

SCLT

6

SDAT

7

NC_4

8

SIF

9

NC_5

10

VIDEO

11

GND

12

+B2[1.2V]

13

+B3[3.3V]

14

RESET

15

+B4[2.5V]

16

SCL

17

SDA

18

ERR

19

SYNC

20

VALID

21

MCL

22

D0

23

D1

24

D2

25

D3

26

D4

27

D5

28

D6

29

D7

30

HORIZONTAL_S

39

SHIELD

TU4402
TDFQ-G001D

close to TUNER

NC_1

1

NC_2

2

NC_3

3

S2_TU[3.3V]

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

C4431

NC_4

0.1uF
16V

OPT

TU_SCL

TU_SDA

T_1.8V

T_SIF

NC_5

T_CVBS

GND_1

TD_1.2V

T_3.3

T_TU_RESET

NC_6

TD_SCL

TD_SDA

T/C/S2_ERROR

T/C/S2_SYNC

T/C/S2_VALID

T/C/S2_MCL

T/C/S2_D0

T/C/S2_D1

T/C/S2_D2

T/C/S2_D3

T/C/S2_D4

T/C/S2_D5

T/C/S2_D6

T/C/S2_D7

S2_1.25V

S2_RESET

S2_3.3V

S2_F22

S2_SCL

S2_SDA

GND_2

S2_LNB

Close to Tuner #38 pin

OPT

BOOSTER

R4408 0

R4401
51

0

S

0

S

R4407

S

LNB_TX

R4447

R4448

C4401

0.1uF
16V

0

S

close to TUNER

C4407
100pF
50V

R4402

75
OPT

C4402
18pF
50V

L4409

BLM18PG121SN1D

S

R4403

100

S

C4405
100pF
50V

S

Surge protectioin

C4403

1000pF

50V

C4408
33pF

S

S

OPT

OPT

C4454
10uF
16V

C4404
18pF
50V

C4406
100pF
50V

S

C4410

Non_S
C4411

C4417
100pF
50V

C4415
100pF
50V

S

+1.8V_TU

C4414

0.1uF

16V

S

C4416
100pF
50V

R4404 22

R4405 22

close to Tuner

C4412

0.1uF
16V

S

R4406

2.2K
S

S2_RESET

C4409

0.1uF

S

0.1uF

16V

S

C4413
33pF

S

Non_S

0.1uF
16V

+5V_TU

L4410

1uH

Non_S

C4460

C4419

10uF

0.1uF

6.3V

16V

S

S

close to TUNER

C4421
62pF
50V

Non_S

close to TUNER

OPT

OPT

C4455

C4461

4700pF

1000pF

50V

50V

OPT

+1.25V_TU

C4462
10uF
10V

S

+3.3V_S2_LNB

C4418
10uF
10V

S

D4401

3.0SMCJ20A(suzhougrande)
20V

S

+3.3V_S2_TU

L4411-*1

0

Non_S

L4411

Non_S

L4412

C4422
62pF
50V

Non_S

C4420

0.1uF

16V

C4457

C4423

10uF

100pF

16V

50V

+3.3V_S2_DE

S

R4449

2.2K

C4456
100uF
16V

S

L4412-*1

0

270nH

270nH

C4458

20pF
50V

Non_S

+1.25V_TU

OPT

C4424

0.1uF
16V

LNB_OUT

S

Non_S

C4459
20pF
50V

+3.3V_TU

+5V_TU

BOOSTER

L4406

BLM18PG121SN1D

BOOSTER

R4419

0

Q4401
MMBT3906(NXP)

E

C

C4425

0.01uF
50V

BOOSTER

close to TUNER

SCL0_3.3V

SDA0_3.3V

SDA1_3.3V

AR4401

NON_S

AR4402

NON_S

AR4403

NON_S

R4418

Close to the tuner

BOOSTER

B

0.1uF

C4426

S

R4420
100

SCL1_3.3V

47

47

47

47

R4421

BOOSTER

S

IC4401

2.2K

2SC3052

+5V_TU

R4422

+3.3V_TU

C

Q4403

E

R4424

S

470

B

MMBT3906(NXP)

4.7K

R4423
100K

C4427

0.1uF

16V

DUAL COMPONENT

1ST : T-TJ3940S_XX, 2ND : T-AP2114H_2.5TRG1

BOOSTER

R4425
10K

R4427
10K

B

BOOSTER

R4426
82

E

S

Q4402

C

S

TU_RESET

NONE_S

R4428

0

RF_BOOSTER_CTL

TU_SIF

R4431

1K

OPT

OPT

0

R4429

0

R4430

1K

OPT

R4433
220

B

R4432

+5V_TU

+2.5V_TU

C4428

0.1uF
16V

NONE_S

TU_TS_ERR
TU_TS_SYNC
TU_TS_VAL

TU_TS_CLK

FE_TS_DATA[0]
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

close to Tuner

FE_TS_DATA[0-7]

AR4401-*1
33

S

AR4402-*1
33

S

AR4403-*1
33

S

R4418-*1
33

S

R4434

220

E

Q4404

MMBT3906(NXP)

C

TU_CVBS

+5V_TU

R4435
200

E

B

Q4405

MMBT3906(NXP)

C

OPTION:SCART

R4436

200

ATV_OUT

+3.3V_TU

+3.3V_TU

C4432

10uF

16V

IC4402

AZ1117BH-1.8TRE1

IN

3

S
1

ADJ/GND

C4435

22uF

16V

ERROR & VALID PIN

<EU, China>

TU_TS_VAL

TU_TS_ERR

Tuner to CI Slot

POWER_ON/OFF2_1

+5V_Normal

OUT

2

+5V_Normal

L4401

MLB-201209-0120P-N2

C4433

0.1uF
16V

OPT
C4434
1uF

S

R4410

1

IC4404

NL17SZ08DFT2G

R4439

IN_B

0

NONE_T2

IN_A

GND

1

NONE_T2

2

3

TS_VAL_ERR

TU_TS_SYNC

TU_TS_CLK

AP2132MP-2.5TRG1

R4412

10K

PG

EN

VIN

OPT

VCTRL

R4411
10K

0.1uF

C4438

OPT

Vout=0.6*(1+R1/R2)

Max 217mA

+1.8V_TU

S

C4437

C4436

0.1uF

10uF

16V

10V

S

+5V_TU

0.1uF
16V

OPT

C4464

22uF

IC4401

AP2114H-2.5TRG1

VIN

C4440

22uF

16V

+3.3V_TU

OPT

C4441

C4439

0.1uF
16V

5

4

IC4403

1

2

THERMAL

3

4

2A

EAN61387601

+3.3V_TU

OPT

+3.3V_Normal

MLB-201209-0120P-N2

C4442

0.1uF
16V

VOUT

GND

R4445
0

T2

+3.3V_TU

VCC

R4446

OUT_Y

0

NONE_T2

R4413
0

R4414
0

R4415
0

[EP]

8

GND

9

7

ADJ

6

VOUT

5

NC

L4408

MLB-201209-0120P-N2

C4443

0.1uF

L4403

MLB-201209-0120P-N2

MLB-201209-0120P-N2

L4402

C4444

22uF

16V

+2.5V_TU

R4437
1

C4429

C4430

10uF

0.1uF

10V

16V

OPT

C4463

0.1uF
16V

S

+3.3V_S2_DE

S

L4404

S

NIM_VAL_ERR

NIM_TS_SYNC

NIM_TS_CLK

+3.3V_S2_LNB

+3.3V_S2_TU

C4445

0.1uF
16V

Max 1.5A

R4416
20K
1%

R4417
11K
1%

R4438
11K
1%

C4447
10uF

10V

C4446
10uF

10V

C4448
10uF

10V

+3.3V_TU

C4449

0.1uF

TS_VAL_ERR

+1.25V_TU (EU)

R2

R1

S

S

S

16V

+1.25V_TU

C4451

0.1uF

C4450

0.1uF
S

C4452

0.1uF

C4453
10uF

16V

S

S

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

LV7 EU TUNER 44 50

Q4502,Q4503

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

Q4504,Q4506
Q4507,Q4508

Q4501

Q4505

D4513

DUAL COMPONENT

1ST : 0TRIY80001A 2ND : 0TR387500AA

1ST : EBK61012701, 2ND : EBK58172301

1ST : 0TRIH80004A, 2ND : EBK61012501, 3RD : 0TR102009AM

1ST : T-BAT54_SUZHO, 2ND : 0DSON00138A

Full Scart

AV_DET

22

COM_GND

21

SYNC_IN

20

SYNC_OUT

19

SYNC_GND2

18

SYNC_GND1

17

RGB_IO

16

R_OUT

15

RGB_GND

14

R_GND

13

D2B_OUT

12

G_OUT

11

D2B_IN

10

G_GND

9

ID

8

B_OUT

7

AUDIO_L_IN

6

B_GND

5

AUDIO_GND

4

AUDIO_L_OUT

3

AUDIO_R_IN

2

AUDIO_R_OUT

1

PSC008-01

JK4501

OPT

D4506

30V

D4504

5.5V

D4505

5.5V

D4501

5.5V

D4502

5.5V

D4503

5.5V

D4507

5.6V
OPT

D4508

5.6V

OPT

D4509

5.6V
OPT

D4510

5.6V
OPT

C4539
100pF
50V

R4508
75
1%

R4505
75

R4506
75 1%

R4507
75
1%

R4509
470K

R4510
470K

+3.3V_Normal

L4506

+3.3V_Normal

R4547

10K

C

B

E

REC_8

SC_ID

+12V

Q4510
2SC3052

C4526

0.1uF
50V

R4513
10K

R4548 1K

D4511

5.6V

R4550

C4518

C4507

R4511

47pF

75

50V

1%

1%

C4505
560pF
50V

C4506
560pF
50V

10

0.1uF

R451275 1%

C4513
100uF
16V

L4508

CM2012FR27KT

C4533
27pF
50V

L4509

CM2012FR27KT

C4535
27pF
50V

L4510

CM2012FR27KT

C4537

27pF

50V

FOR EMI

C4540 1uF

C4541 1uF R4551 22

C4536
27pF

50V

C4538

27pF

50V

BLM18PG121SN1D

L4504

BLM18PG121SN1D

L4505

C4534
27pF

50V

R4549 0

CLOSE TO SOC

SC_R/COMP2_Pr

SC_G/COMP2_Y

SC_B/COMP2_Pb

R4552 22

CLOSE TO JUNCTION

C4516
1000pF
50V

C4517

1000pF

50V

SC_DET/COMP2_DET

MMBT3906(NXP)

Q4501

SC_CVBS_IN

Gain=1+Rf/Rg

C4521
4700pF

C4522
4700pF

R4534
10K

OPT

D4512

30V

E

C

C4514
560pF
50V

C4515
560pF
50V

B

R4520
390

R4521
390

Rf

Rg

OPT

D4513

BAT54_SUZHO

30V

R4522

9.1K

R4524

470

Q4502
2SC3052

C

B

E

R4523
180

+3.3V_Normal

R4545

10K

C

B

E

Q4509
2SC3052

R4526
47K

R4527
15K

R4525

1K

SC/COMP2_L_IN

SC/COMP2_R_IN

DTV/MNT_L_OUT

DTV/MNT_R_OUT

R4546
1K

C4523
47uF
16V

C4524
1uF
10V

C4525

0.1uF
50V

SC_FB

+5V_Normal

R4530

10K

IC4502

NLASB3157DFT2G

SELECT

6

VCC

5

A

4

Selece = High ==> A = B1

Selece = Low ==> A = B0

1

2

3

INCM_VID_SC

DTV_ATV_SELECT

B1

GND

B0

CLOSE TO SOC

0.1uF

C4528

16V

R4532
36

ATV_OUT

R4553
0

1/10W
5%

OPT

C4531

180pF

50V

CLOSE TO JACK

TP4501

OPT
C4532

180pF

50V

R4533
75
1%

CLOSE TO SOC

DTV/MNT_V_OUT

AUD_OUT >> EU/CHINA_HOTEL_OPT

+12V

SCART1_Lout_N

SCART1_Lout_P

L45 01

BLM 18PG 121 SN1D

C4501

0.1uF
50V

SCART1_Rout_P

SCART1_Rout_N

R45015.6K

R45025.6K

CLOSE TO soc

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IC4501
LM324D

C4511
6800pF

50V

R4514
1K

C4512 6800pF

R45151K

R451633K

C4519

33pF

R451733K

C4520

33pF

50V

DTV/MNT_L_OUT

R45035.6K

R45045.6K

DTV/MNT_R_OUT

C4508
10uF
16V

C4510

10uF
16V

R4518
10K

R4519
10K

OUT1

IN1-

IN1+

IN2+

IN2-

OUT2

1

2

3

VCC

4

5

6

7

OUT4

14

IN4-

13

IN4+

12

VEE/GND

11

IN3+

10

IN3-

9

OUT3

8

[SCART AUDIO MUTE]

DTV/MNT_L_OUT

DTV/MNT_R_OUT

Q4503
2SC3052

Q4504
2SC3052

R4528
2K

R4529
2K

RT1P141C-T112
Q4505

3

1

2

R4531
10K

+3.5V_ST

SCART_MUTE

[SCART PIN 8]

OPT
R4535

4.7K

SC_RE1

SC_RE2

R4537
1K

OPT
R4538
10K

OPT

R4536
1K

B

OPT

C

Q4506
2SC3052

E

+12V

C

OPT

B

Q4508

OPT
R4541
12K

C

B

OPT

E

Q4507
2SC3052

OPT

2SC3052

E

REC_8

BCM35230

LV7 EU SCART 45 50

Q4601

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+24V

AMP_MUTE

DUAL COMPONENT

1ST : 0TRIY80001A 2ND : 0TR387500AA

+24V_AMP

L4601

MLB-201209-0120P-N2

C4601

0.1uF
50V

AUD_LRCH

AUD_LRCK

AUD_SCK

SDA3_3.3V

SCL3_3.3V

R4601

10K

C4602

0.1uF
50V

+3.5V_ST

B

C4603
100pF

50V

R4603 100

R4604 100

R4602

10K

C

Q4601

2SC3052

E

R4606

100

C4604
1000pF

50V

R4605

3.3K

1000pF

C4605

+3.3V_Normal

L4602

BLM18PG121SN1D

C4614

0.1uF
16V

C4608

0.1uF
16V

C4609
33pF
50V

OPT

C4610

10uF

10V

OPT
C4611
10uF

10V

C4612

0.1uF

C4613

0.1uF
16V

16V

OPT
C4606

10uF

10V

C4607
33pF
50V

50V

AMP_RESET_N

AUD_MASTER_CLK

C4640
10uF
10V

AGND_PLL
AVDD_PLL
DVDD_PLL

DGND_PLL

GND_1

DGND
DVDD

SDATA

LF

WCK
BCK
SDA

C4615

1000pF

50V

[EP]

1
2
3
4
5
6
7
8
9
10
11
12

GND_IO

CLK_I

VDD_IO

46

47

48

THERMAL

49

NTP-7400L

13

14

15

SCL

/FAULT

MONITOR0

50V

C4616

BST1A

/RESET

AD

43

44

45

IC4601

16

17

18

BST2B

MONITOR1

MONITOR2

C4617

22000pF

50V

22000pF

OUT1A_2

PGND1A

41

42

19

20

PGND2B

OUT2B_1

PVDD1_2

PVDD1_3

OUT1A_1

38

39

40

21

22

23

OUT2B_2

PVDD2_1

PVDD2_2

+24V_AMP

C4618

0.1uF
50V

PVDD1_1

37

36
35
34
33
32
31
30
29
28
27
26
25

24

PVDD2_3

C4620

0.1uF
50V

OUT1B_2
OUT1B_1
PGND1B
BST1B
VDR1
VCC_5
GND_2
VDR2
BST2A
PGND2A
OUT2A_2
OUT2A_1

+24V_AMP

C4619

0.1uF
50V

C4621

0.1uF
50V

R4607

3.3

C4622
10uF
35V

OPT

OPT

C4624

0.01uF
50V

C4623
10uF
35V

C4625
22000pF

50V

C4626
22000pF
50V

C46 27
1uF
25V

D4601

1N4148W

100V

OPT

D4602

1N4148W

100V

OPT

D4603

1N4148W

100V

OPT

D4604

1N4148W

100V

OPT

C46 28
1uF
25V

R4608

12

C4629
390pF

50V

C4630
390pF

50V

R4609

12

R4610

12

C4631
390pF

50V

C4632
390pF

50V

R4611

12

C4633
1uF
25V

R4615

12

R4613

12

R4614

12

R4612

12

L4605

10.0uH

L4606

10.0uH

L4603

10.0uH

L4604

10.0uH

C4634

0.47uF
50V

C4635

0.47uF
50V

C4636

0.1uF
50V

C4637

0.1uF
50V

C4638

0.1uF
50V

C4639

0.1uF

50V

R4616

4.7K

R4617

4.7K

R4618

4.7K

R4619

4.7K

SPK_L+

SPEAKER_L

SPK_L-

SPK_L+

SPK_L-

SPK_R+

SPK_R-

SPK_R+

SPEAKER_R

SPK_R-

WAFER-ANGLE

4

3

2

1

P4601

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

LV7 EU AMP 46 50

D4703,D4704

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

D4705,D4706

DUAL COMPONENT

1ST : EAH42720601, 2ND : EAH60994401

IR & KEY

IR

COMMERCIAL

Q4701

2SC3052

COMMERCIAL

R4712

+3.5V_ST

47K

R4709
0

C

E

R4713

10K

B

COMMERCIAL

COMMERCIAL

2SC3052

COMMERCIAL

IR_OUT

+3.5V_ST

R4714

47K

Q4702

COMMERCIAL

COMMERCIAL

C

B

COMMERCIAL

E

R4715

22

COMMERCIAL_EU

R4716

47K

COMMERCIAL

R4717

3.3K

R4719

Q4703

2SC3052

+3.5V_ST

OPT

+3.5V_ST

47K

R4718
0

KEY1

KEY2

R4720

C

B

E

COMMERCIAL_EU

OPT

10K

R4721

COMMERCIAL

Q4704

2SC3052

COMMERCIAL

R4710
100

R4711
100

+3.5V_ST

47K

C

E

+3.5V_ST

R4701

10K

1%

B

COMMERCIAL

R4722

47K

R4702

10K
1%

+3.5V_ST

C4701

0.1uF

OPT

C4702

0.1uF
16V

C4703

0.1uF

L4701

BLM18PG121SN1D

OPT

C4704

0.1uF
16V

S/T_SCL

S/T_SDA

D4701

5.6V

AMOTECH

C4705
1000pF
50V

R4703
100

R4704
100

D4702

5.6V

AMOTECH

LED_B/LG_LOGO

+3.3V_Normal

OPT

EEPROM_SCL

EEPROM_SDA

L4702

BLM18PG121SN1D

C4709

OPT

0.1uF
16V

C4708
100pF

C4710

0.1uF
16V

50V

R4705
100

R4706
100

R4707 1.5K

D4705

5.6V

AMOTECH

LED_R/BUZZ

CDS3C05HDMI1

5.6V

D4704

CDS3C05HDMI1

5.6V

D4706
CDS3C05HDMI1

5.6V

D4707

CDS3C05HDMI1

5.6V

R4708

1.5K

P4701

12507WR-15L

IR_15PIN

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15D4703

16

P4702

12507WR-12L

IR_12PIN

1

2

3

4

5

6

7

8

9

10

11

12

13

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

LV7 EU IR 47 50

SIDE_USB_OCD2

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

M_REMOTE_TX

M_REMOTE_RX

DD_MREMOTE

M_RFModule_RESET

WIRELESS_DET

WIRELESS_PWR_EN

3D_GPIO_2

3D_GPIO_1

3D_GPIO_0

/RST_HUB

DC_MREMOTE

WIFI_DP

WIFI_DM

AV2_CVBS_DET

5V_HDMI_4

AV2_CVBS_IN

SIDE_USB_CTL2

3D_SYNC

L_VS

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

LV7 EU 48 50

+1.26V_FRC

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

C5201

0.1uF

+1.26V_FRC

C5202

0.1uF

L5205

CIC21J501NE

L5201

CIC21J501NE

C5210
22uF
10V

DVDD_DDR_1V

C5246
22uF
10V

VDDC10

C5206

0.1uF

C5211
22uF
10V

VDDC10

C5243

0.22uF

6.3V

C5225

0.1uF

C5228

0.1uF

+1.5V_FRC_DDR

C5213

0.1uF

+1.5V_FRC_DDR

C5244

0.22uF

6.3V

C5231

0.1uF

C5232

0.1uF

C5234

0.1uF

C5247
1uF

6.3V

Place Close to Bead

+3.3V_FRC

+3.3V_FRC

+3.3V_FRC

+3.3V_FRC

GPIO1 : HI => B8/94, LOW => B4/98
CHIP_CONF : {GPIO8, PWM1, PWM0}
CHIP_CONF = 3’d5 : boot from interal SRAM
CHIP_CONF = 3’d6 : boot from EEPROM
CHIP_CONF = 3’d7 : boot from SPI Flash

L5202

CIC21J501NE

C5203

0.1uF

L5206

CIC21J501NE

C5233

0.1uF

L5203

CIC21J501NE

C5204

0.1uF

L5204

CIC21J501NE

C5205

0.1uF

VDD33

C5207

0.1uF

AVDD33

C5236

0.1uF

AVDD_PLL

AVDD_LVDS_3.3V

URSA5 CONFIGURATION

PWM0
PWM1

GPIO[8]

GPIO[1]

URSA5 H/W OPTION

URSA_MODEL_OPT_0

URSA_MODEL_OPT_1

URSA_MODEL_OPT_2

2D/3D_CTL

C5208

0.1uF

C5209

0.1uF

VDD33

(VDDP)

C5214

0.1uF

AVDD33

C5238

0.1uF

AVDD_PLL

C5215
10uF

6.3V

AVDD_LVDS_3.3V

C5216

0.1uF

+3.3V_FRC

10K

R5207

R5211 10K

R5203 10K

10K

OPT

OPT

OPT

R5204 10K

R5212 10K

R5208

+3.3V_FRC

10K

OPT

R5209

R5213 10K

R5205 10K

L/DIM_EDGE_32/37

LVDS_EXT_URSA5

10K

OPT

R5206 10K

R5210

R5214 10K

LVDS_S7M-PLUS

L/DIM_EDGE_42/47/55

C5217

0.1uF

OPT

C5219

C5245

0.1uF

0.22uF

6.3V

C5239

0.1uF

C5220

0.1uF

C5223

0.1uF

C5227

0.1uF

FRC_A[0-13]

FRC_BA0
FRC_BA1
FRC_BA2

FRC_MCLK

FRC_MCLKB

FRC_CKE

FRC_ODT
FRC_RASB
FRC_CASB

FRC_WEB

FRC_A[0]
FRC_A[1]
FRC_A[2]
FRC_A[3]
FRC_A[4]
FRC_A[5]
FRC_A[6]
FRC_A[7]
FRC_A[8]
FRC_A[9]
FRC_A[10]
FRC_A[11]
FRC_A[12]
FRC_A[13]

FRC_DDR3_RESETB

FRC_DQSL
FRC_DQSU

FRC_DQSLB

FRC_DQL[0-7]

FRC_DQU[0-7]

R5220 4.7K

R5221 4.7K

SCL2_+3.3V_URSA
SDA2_+3.3V_URSA

LOW

FRC_DQSUB

FRC_DML
FRC_DMU

FRC_DQL[0]
FRC_DQL[1]
FRC_DQL[2]
FRC_DQL[3]
FRC_DQL[4]
FRC_DQL[5]
FRC_DQL[6]
FRC_DQL[7]

FRC_DQU[0]
FRC_DQU[1]
FRC_DQU[2]
FRC_DQU[3]
FRC_DQU[4]
FRC_DQU[5]
FRC_DQU[6]
FRC_DQU[7]

OPT

OPT

R5215 10K

R5216 10K

OPT

R5217 10K

MODEL OPTION

OPT

R5218 10K

PIN NAME

MODEL_OPT_0

MODEL_OPT_1

MODEL_OPT_2

MODEL_OPT_3

PIN NO.

D10

D11

D12

D13

HIGH

L/DIM_10BLOCK

LVDS_EXT_URSA5

RESERVED

+3.3V_FRC

L/DIM_16BLOCK

RESERVEDRESERVED

LVDS_S7M_PLUS

RESERVED

Debugging for URSA5

P5201

12507WR-04L

URSA5_DEBUG

5

1

2

URSA5_DEBUG

R5201 22

3

URSA5_DEBUG

R5202 22

4

SCL2_+3.3V_DB

SDA2_+3.3V_DB

SCL2_3.3V

SCL2_+3.3V_URSA

SCL2_+3.3V_DB

R5258
0

URSA5_MP

R5260
0
OPT

SW5201

JS2235S

1

2

URSA5_DEBUG

3

6

5

4

R5259
0

URSA5_MP

R5261
0
OPT

SDA2_3.3V

SDA2_+3.3V_URSA

SDA2_+3.3V_DB

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

R522233
R522333

P14

DDR3_A0/DDR2_NC

G15

DDR3_A1/DDR2_A8

N14

DDR3_A2/DDR2_NC

L15

DDR3_A3/DDR2_A10

H15

DDR3_A4/DDR2_A2

L14

DDR3_A5/DDR2_A3

G14

DDR3_A6/DDR2_A4

N12

DDR3_A7/DDR2_A5

G13

DDR3_A8/DDR2_A6

N13

DDR3_A9/DDR2_A9

H14

DDR3_A10/DDR2_RASZ

F15

DDR3_A11/DDR2_A11

H13

DDR3_A12/DDR2_A0

P13

DDR3_A13/DDR2_A12

M12

DDR3_BA0/DDR2_BA2

H12

DDR3_BA1/DDR2_CASZ

L13

DDR3_BA2/DDR2_A1

F16

DDR3_MCLK/DDR2_MCLK

F17

DDR3_MCLKZ/DDR2_MCLKZ

J13

DDR3_CKE/DDR2_ODT

K12

DDR3_ODT/DDR2_CKE

L12

DDR3_RASZDDR2_WEZ

K13

DDR3_CASZ/DDR2_BA1

K14

DDR3_WEZ/DDR2_BA0

M14

DDR3_RESET/DDR2_A7

N16

DDR3_DQSL/DDR2_DQSL

M17

DDR3_DQSU/DDR2_DQSU

M16

DDR3_DQSBL/DDR2_DQSBL

M15

DDR3_DQSBU/DDR2_DQSBU

J15

DDR3_DQML/DDR2_DQU5

R16

DDR3_DQMU/DDR2_DQU4

R17

DDR3_DQL0/DDR2_DQU3

H17

DDR3_DQL1/DDR2_DQL0

R15

DDR3_DQL2/DDR2_DQL6

J17

DDR3_DQL3/DDR2_DQL7

T17

DDR3_DQL4/DDR2_DQL3

H16

DDR3_DQL5/DDR2_DQL2

T15

DDR3_DQL6/DDR2_DQL1

G16

DDR3_DQL7/DDR2_DQL5

K15

DDR3_DQU0/DDR2_DQU7

N15

DDR3_DQU1/DDR2_DQML

K17

DDR3_DQU2/DDR2_DQU2

P17

DDR3_DQU3/DDR2_DQU6

L17

DDR3_DQU4/DDR2_NC

P16

DDR3_DQU5/DDR2_DQU1

K16

DDR3_DQU6/DDR2_DQU0

P15

DDR3_DQU7/DDR2_DQMU

F14

DDR3_NC/DDR2_A13

T16

DDR3_NC/DDR2_DQL4

D14

I2CM_SCL

D15

I2CM_SDA

P1

I2CS_SCL

P2

I2CS_SDA

AVDD33

+1.5V_FRC_DDR

F5

F10

G10

F11

F12

G11

G12

AVDD_1F4AVDD_2

AVDD_DDR_C_1

AVDD_DDR_C_2

AVDD_DDR_D_1

AVDD_DDR_D_2

AVDD_DDR_D_3

AVDD_DDR_D_4

VSS_1D6VSS_2D7VSS_3D8VSS_4D9VSS_5E6VSS_6E7VSS_7E8VSS_8E9VSS_9

E10

AVDD_PLL

AVDD_LVDS_3.3V

D4

D5

E4

E5

M5

L4

L5

K10

AVDD_PLL3.3V

AVDD_MPLL3.3V

AVDD_LPLL3.3V

AVDD_LVDS3.3V_1

AVDD_LVDS3.3V_2

AVDD_LVDS3.3V_3

AVDD_LVDS3.3V_4

VSS_10

VSS_11F3VSS_12F6VSS_13F7VSS_14F8VSS_15F9VSS_16G1VSS_17G2VSS_18G4VSS_19G5VSS_20G6VSS_21G7VSS_22G8VSS_23G9VSS_24

AVDDL_MOD1.26V

E16

DVDD_DDR_1V

VDD33

C5240

0.1uF

L10

K9

N5

VD33_1M4VD33_2N4VD33_3

DVDD_HF1.26V

DVDD_DDR_1.26V

P14

DDR3_A0/DDR2_NC

G15

DDR3_A1/DDR2_A8

N14

DDR3_A2/DDR2_NC

L15

DDR3_A3/DDR2_A10

H15

DDR3_A4/DDR2_A2

L14

DDR3_A5/DDR2_A3

G14

DDR3_A6/DDR2_A4

N12

DDR3_A7/DDR2_A5

G13

DDR3_A8/DDR2_A6

N13

DDR3_A9/DDR2_A9

H14

DDR3_A10/DDR2_RASZ

F15

DDR3_A11/DDR2_A11

H13

DDR3_A12/DDR2_A0

P13

DDR3_A13/DDR2_A12

M12

DDR3_BA0/DDR2_BA2

H12

DDR3_BA1/DDR2_CASZ

L13

DDR3_BA2/DDR2_A1

F16

DDR3_MCLK/DDR2_MCLK

F17

DDR3_MCLKZ/DDR2_MCLKZ

J13

DDR3_CKE/DDR2_ODT

K12

DDR3_ODT/DDR2_CKE

L12

DDR3_RASZDDR2_WEZ

K13

DDR3_CASZ/DDR2_BA1

K14

DDR3_WEZ/DDR2_BA0

M14

DDR3_RESET/DDR2_A7

N16

DDR3_DQSL/DDR2_DQSL

M17

DDR3_DQSU/DDR2_DQSU

M16

DDR3_DQSBL/DDR2_DQSBL

M15

DDR3_DQSBU/DDR2_DQSBU

J15

DDR3_DQML/DDR2_DQU5

R16

DDR3_DQMU/DDR2_DQU4

R17

DDR3_DQL0/DDR2_DQU3

H17

DDR3_DQL1/DDR2_DQL0

R15

DDR3_DQL2/DDR2_DQL6

J17

DDR3_DQL3/DDR2_DQL7

T17

DDR3_DQL4/DDR2_DQL3

H16

DDR3_DQL5/DDR2_DQL2

T15

DDR3_DQL6/DDR2_DQL1

G16

DDR3_DQL7/DDR2_DQL5

K15

DDR3_DQU0/DDR2_DQU7

N15

DDR3_DQU1/DDR2_DQML

K17

DDR3_DQU2/DDR2_DQU2

P17

DDR3_DQU3/DDR2_DQU6

L17

DDR3_DQU4/DDR2_NC

P16

DDR3_DQU5/DDR2_DQU1

K16

DDR3_DQU6/DDR2_DQU0

P15

DDR3_DQU7/DDR2_DQMU

F14

DDR3_NC/DDR2_A13

T16

DDR3_NC/DDR2_DQL4

D14

I2CM_SCL

D15

I2CM_SDA

P1

I2CS_SCL

P2

I2CS_SDA

VSS_25H1VSS_26H2VSS_27H4VSS_28H5VSS_29H6VSS_30H7VSS_31H8VSS_32H9VSS_33

G17

PLACE TERMINATION RESISTORS CLOSE TO URSA5

TXB2P

TXB3N

TXB0N

TXB1P

TXB1N

TXB2N

TXB3P

VDDC10

M9

M10

N9

N10

VDDC_1.26V_1

VDDC_1.26V_2

VDDC_1.26V_3

N11

P10

P11

VDDC_1.26V_4

VDDC_1.26V_5

VDDC_1.26V_6

VDDC_1.26V_7

TXB0P

TXBCLKP

TXBCLKN

R5224

100

R5225

100

R5226

100

R5227

100

R5228

100

R5229

100

R3

RXB0PR4RXB0NR5RXB1PT4RXB1NU4RXB2PU3RXB2NT3RXB3PT2RXB3NU2RXB4PT1RXB4N

RXBCLKPR2RXBCLKN

NON 21:9 Cinema

IC5201

LGE7303C

F5

F10

G10

F11

F12

G11

G12

E5

L4

L5

K10

L10

K9

N5

M10

N10

N11

P10

P11

R3

R1

AVDD_1F4AVDD_2

AVDD_DDR_C_1

AVDD_DDR_C_2

AVDD_DDR_D_1

AVDD_DDR_D_2

AVDD_DDR_D_3

AVDD_DDR_D_4

AVDD_LVDS3.3V_1D4AVDD_LVDS3.3V_2D5AVDD_LVDS3.3V_3E4AVDD_LVDS3.3V_4

AVDD_PLL3.3V

AVDD_MPLL3.3VM5AVDD_LPLL3.3V

AVDDL_MOD1.26V

DVDD_DDR_1.26V

DVDD_HF1.26V

VD33_1M4VD33_2N4VD33_3

VDDC_1.26V_1M9VDDC_1.26V_2

VDDC_1.26V_3N9VDDC_1.26V_4

VDDC_1.26V_5

VDDC_1.26V_6

VDDC_1.26V_7

RXB0PR4RXB0NR5RXB1PT4RXB1NU4RXB2PU3RXB2NT3RXB3PT2RXB3NU2RXB4PT1RXB4N

RXBCLKPR2RXBCLKN

21:9 Cinema

IC5201-*1

LGE7303D

VSS_1D6VSS_2D7VSS_3D8VSS_4D9VSS_5E6VSS_6E7VSS_7E8VSS_8E9VSS_9

VSS_10

VSS_11F3VSS_12F6VSS_13F7VSS_14F8VSS_15F9VSS_16G1VSS_17G2VSS_18G4VSS_19G5VSS_20G6VSS_21G7VSS_22G8VSS_23G9VSS_24

E10

E16

H10

H11

VSS_25H1VSS_26H2VSS_27H4VSS_28H5VSS_29H6VSS_30H7VSS_31H8VSS_32H9VSS_33

G17

VSS_34

VSS_35J4VSS_36J5VSS_37J6VSS_38J7VSS_39J8VSS_40J9VSS_41

J10

VSS_34

VSS_35J4VSS_36J5VSS_37J6VSS_38J7VSS_39J8VSS_40J9VSS_41

H10

H11

VSS_42

VSS_43

J11

J12

FRC_RESET

VSS_42

VSS_43

VSS_44

VSS_45

J10

J11

J12

J14

J16

VSS_44

VSS_45

VSS_46K4VSS_47K5VSS_48K6VSS_49K7VSS_50K8VSS_51

J14

J16

VSS_46K4VSS_47K5VSS_48K6VSS_49K7VSS_50K8VSS_51

K11

VSS_52L6VSS_53L7VSS_54L8VSS_55

TXA1P

TXACLKP

TXA0P

TXB4P

TXB4N

TXA0N

TXACLKN

R1

R7

RXA0PR8RXA0NR9RXA1PT8RXA1NU8RXA2PU7RXA2NT7RXA3PT6RXA3NU6RXA4PU5RXA4NT5XTALOJ1XTALI

RXACLKPR6RXACLKN

R7

J2

R13

P9

T13

RXA0PR8RXA0NR9RXA1PT8RXA1NU8RXA2PU7RXA2NT7RXA3PT6RXA3NU6RXA4PU5RXA4NT5XTALOJ1XTALI

RXACLKPR6RXACLKN

VSS_56

VSS_57M6VSS_58M7VSS_59M8VSS_60

L11

L16

VSS_52L6VSS_53L7VSS_54L8VSS_55

K11

U15

GPIO1

GPIO2/(S_PIF_CLK)

GPIO0/(UART_RX/S_PIF_DA0)

VSS_61

VSS_62N6VSS_63N7VSS_64N8VSS_65

VSS_66P3VSS_67P4VSS_68P5VSS_69P6VSS_70P7VSS_71

M11

M13

N17

P12

U16

VSS_56

VSS_57M6VSS_58M7VSS_59M8VSS_60

L11

L16

+3.3V_FRC

R5219
10K

OPT

R5254

4.7K

URSA5_UO2_RESET

TXA2N

TXA2P

TXA1N

R14

K1

T14

P8

U14

U13

R12

GPIO8

GPIO4/(LTD_DE)

GPIO7(3D_FLAG)

GPIO3/(LTD_DA1)

GPIO5/(LTD_CLK)K2GPIO6/(LTD_DA0)

GPIO10/(S_PIF_FC)

GPIO9/(UART_TX/S_PIF_DA1)

VSS_72

NCL9HW_RESETJ3TESTPIN_1D1TESTPIN_2D2TESTPIN_3D3TESTPIN_4E1TESTPIN_5E2TESTPIN_6E3TESTPIN_7F1TESTPIN_8F2M0_SCLK

M11

M13

R5256
10K
OPT

TXA4N

TXA3N

TXA4P

TXA3P

R5230

100

R5231

100

R5232

100

R5233

100

R5234

100

R5235

100

E11

N2

M1

N3

M3

L1

M2

VSYNC_LIKE

M_S_PIF_CS

M_S_PIF_FC

S_M_PIF_CS

M_S_PIF_CLK

M_S_PIF_DA0N1M_S_PIF_DA1

S_M_PIF_CLK

S_M_PIF_DA0L2S_M_PIF_DA1

GPIO11/(S_PIF_CS)

TXDCLKP/LLV5N/BLUE[1]/EPI_B2P
TXDCLKN/LLV5P/BLUE[0]/EPI_B2N

M0_MOSI

M1_SCLK

M1_MOSI

C17

D16

D17

E15

VSS_61

VSS_62N6VSS_63N7VSS_64N8VSS_65

N17

URSA5_UO2_RESET

B

R5243

URSA5_UO3_RESET

13pF

C5241

R5237

R52 36 0

J2

R13

P9

T13

U15

GPIO1

GPIO2/(S_PIF_CLK)

GPIO0/(UART_RX/S_PIF_DA0)

K3

R10

T11

R11

U11

OP_SYNC_L

OP_SYNC_R

C8

S_M_PIF_FCL3SOFT_RST_L

SOFT_RST_R

TXA0P/GCLK6/BLUE[7]

C9

TXA0N/GCLK5/BLUE[6]

B8

TXA1P/OPT_N/LK3/BLUE[9]

A8

TXA1N/FLK/BLUE[8]

A7

TXA2P/GREEN[1]

B7

TXA2N/OPT_P/LK2/GREEN[0]

C6

TXACLKP/RLV0N/GREEN[3]

C7

TXACLKN/RLV0P/GREEN[2]

B6

TXA3P/RLV1N/GREEN[5]

A6

TXA3N/RLV1P/GREEN[4]

A5

TXA4P/RLV2N/GREEN[7]

B5

TXA4N/RLV2P/GREEN[6]

C4

TXB0P/RLV3N/GREEN[9]

C5

TXB0N/RLV3P/GREEN[8]

B4

TXB1P/RLVCLKN/RED[1]

A4

TXB1N/RLVCLKP/RED[0]

A3

TXB2P/RLV4P/RED[3]/EPI_A3P

B3

TXB2N/RLV4N/RED[2]/EPI_A3N

C2

TXBCLKP/RLV5N/RED[5]/EPI_A2P

C3

TXBCLKN/RLV5P/RED[4]/EPI_A2N

B2

TXB3P/RLV6N/RED[7]/EPI_A1P

A2

TXB3N/RLV6P/RED[6]/EPI_A1N/

C1

TXB4P/RLV7N/RED[9]/EPI_A0P

B1

TXB4N/RLV7P/RED[8]/EPI_A0N

C16

TXC0P/SOE

B17

TXC0N/POL

B16

TXC1P/GSP_R

A16

TXC1N/GSP/VST

A15

TXC2P/GOE/GCLK1

B15

TXC2N/GSC/GCLK3

C14

TXCCLKP/LLV0N

C15

TXCCLKN/LLV0P

B14

TXC3P/LLV1N

A14

TXC3N/LLV1P

A13

TXC4P/LLV2N

B13

TXC4N/LLV2P

C12

TXD0P/LLV3N

C13

TXD0N/LLV3P

B12

TXD1P/LLVCLKN

A12

TXD1N/LLVCLKP

A11

TXD2P/LLV4N/EPI_B3P

B11

TXD2N/LLV4P/EPI_B3N

C10
C11
B10

TXD3P/LLV6N/BLUE[3]

A10

TXD3N/LLV6P/BLUE[2]/EPI_B1N

A9

TXD4P/LLV7N/BLUE[5]/EPI_B0P

B9

TXD4N/LLV7P/BLUE[4]/EPI_B0N

D10

MOD_GPIO0/VDD_ODD/HSYNC

D11

MOD_GPIO1/VDD_EVEN/VSYNC

D12

MOD_GPIO2/PWM13/GCLK4/LCK

D13

MOD_GPIO3/PWM14/GCLK2/LDE

U12

PWM0/SCAN_BLK1

T12

PWM1/SCAN_BLK2

G3

LPLL_FBCLK

E17

LPLL_OUTCLK

H3

LPLL_REFIN

M2_SCLK

M2_MOSI

M3_SCLK

M3_MOSI

SPI_CKT9SPI_CZ

SPI_DIU9SPI_DO

E14

E13

E12

F13

U10

T10

VSS_66P3VSS_67P4VSS_68P5VSS_69P6VSS_70P7VSS_71

P12

U16

C5212

R5255

4.7uF

22K

16V
URSA5_UO2_RESET

R5262

2.2K
URSA5_UO2_RESET

C

Q5201
2SC3052
URSA5_UO2_RESET

E

33

C5242 13pF

24MHz

X5201

1M

GPIO[8]

3D_SYNC

GPIO[1]

R14

K2

K1

T14

L_VS

0

0

0

R52 38 0

R52 41

R52 39

R52 40

P8

U14

U13

R12

E11

GPIO8

VSYNC_LIKE

GPIO4/(LTD_DE)

GPIO7(3D_FLAG)

GPIO3/(LTD_DA1)

GPIO5/(LTD_CLK)

GPIO6/(LTD_DA0)

GPIO10/(S_PIF_FC)

GPIO11/(S_PIF_CS)

GPIO9/(UART_TX/S_PIF_DA1)

VSS_72

NCL9HW_RESETJ3TESTPIN_1D1TESTPIN_2D2TESTPIN_3D3TESTPIN_4E1TESTPIN_5E2TESTPIN_6E3TESTPIN_7F1TESTPIN_8F2M0_SCLK

Q5202

AO3407A

D

S

URSA5_UO2_RESET

G

R5242 33

N2

M1

N1

N3

M3

M_S_PIF_CS

M_S_PIF_CLK

M_S_PIF_DA0

M_S_PIF_DA1

[SPI FLASH(2Mbit)]

L1

M2

L2

K3

M_S_PIF_FC

S_M_PIF_CS

S_M_PIF_FCL3SOFT_RST_L

S_M_PIF_CLK

S_M_PIF_DA0

S_M_PIF_DA1

TXA1P/OPT_N/LK3/BLUE[9]

TXA2N/OPT_P/LK2/GREEN[0]

TXB2P/RLV4P/RED[3]/EPI_A3P

TXB2N/RLV4N/RED[2]/EPI_A3N
TXBCLKP/RLV5N/RED[5]/EPI_A2P
TXBCLKN/RLV5P/RED[4]/EPI_A2N

TXB3P/RLV6N/RED[7]/EPI_A1P

TXB3N/RLV6P/RED[6]/EPI_A1N/

TXB4P/RLV7N/RED[9]/EPI_A0P

TXB4N/RLV7P/RED[8]/EPI_A0N

TXDCLKP/LLV5N/BLUE[1]/EPI_B2P
TXDCLKN/LLV5P/BLUE[0]/EPI_B2N

TXD3N/LLV6P/BLUE[2]/EPI_B1N
TXD4P/LLV7N/BLUE[5]/EPI_B0P
TXD4N/LLV7P/BLUE[4]/EPI_B0N

MOD_GPIO0/VDD_ODD/HSYNC

MOD_GPIO1/VDD_EVEN/VSYNC
MOD_GPIO2/PWM13/GCLK4/LCK
MOD_GPIO3/PWM14/GCLK2/LDE

M0_MOSI

M1_SCLK

M1_MOSI

M2_SCLK

M2_MOSI

M3_SCLK

C17

D16

D17

E15

E14

E13

E12

M1_SCLK

M2_SCLK

M0_MOSI

M0_SCLK

M1_MOSI

M3_SCLK

M2_MOSI

MStar URSA5

FRC block

R5244

4.7K

SPI_CS

SPI_DO

R10

T11

SOFT_RST_R

TXA0P/GCLK6/BLUE[7]
TXA0N/GCLK5/BLUE[6]

TXA1N/FLK/BLUE[8]

TXACLKP/RLV0N/GREEN[3]
TXACLKN/RLV0P/GREEN[2]

TXA3P/RLV1N/GREEN[5]
TXA3N/RLV1P/GREEN[4]
TXA4P/RLV2N/GREEN[7]
TXA4N/RLV2P/GREEN[6]

TXB0P/RLV3N/GREEN[9]
TXB0N/RLV3P/GREEN[8]
TXB1P/RLVCLKN/RED[1]
TXB1N/RLVCLKP/RED[0]

TXD2P/LLV4N/EPI_B3P
TXD2N/LLV4P/EPI_B3N

R5245

R11

U11

OP_SYNC_L

OP_SYNC_R

TXA2P/GREEN[1]

TXC0P/SOE
TXC0N/POL

TXC1P/GSP_R

TXC1N/GSP/VST
TXC2P/GOE/GCLK1
TXC2N/GSC/GCLK3

TXCCLKP/LLV0N

TXCCLKN/LLV0P

TXC3P/LLV1N
TXC3N/LLV1P
TXC4P/LLV2N
TXC4N/LLV2P

TXD0P/LLV3N

TXD0N/LLV3P
TXD1P/LLVCLKN
TXD1N/LLVCLKP

TXD3P/LLV6N/BLUE[3]

PWM0/SCAN_BLK1
PWM1/SCAN_BLK2

LPLL_FBCLK

LPLL_OUTCLK

LPLL_REFIN

M3_MOSI

SPI_CKT9SPI_CZ

SPI_DIU9SPI_DO

F13

U10

T10

R5249 33

R5248 33

R5247 33

SPI_DI

SPI_DO

SPI_CS

M3_MOSI

SPI_SCLK

+3.3V_FRC

R5246
10K

33

IC5202

W25X20BVSNIG

CS

1

DO

2

WP

3

GND

4

VCC

8

R5252

HOLD

7

6

5

3.3K

CLK

DIO

SPI_SCLK

SPI_DI

URSA5_FLASH_WINBOND_2M

IC5202-*1

MX25L2006EM1I-12G, HF

C8
C9
B8
A8
A7
B7
C6
C7
B6
A6
A5
B5

C4
C5
B4
A4
A3
B3
C2
C3
B2
A2
C1
B1

C16
B17
B16
A16
A15
B15
C14
C15
B14
A14
A13
B13

C12
C13
B12
A12
A11
B11
C10
C11
B10
A10
A9
B9

D10
D11
D12
D13

U12
T12

G3
E17
H3

3D-SG

R5253 33

R5250

33

R5251

33

LVDS_TXA0P
LVDS_TXA0N
LVDS_TXA1P
LVDS_TXA1N
LVDS_TXA2P
LVDS_TXA2N
LVDS_TXACLKP
LVDS_TXACLKN
LVDS_TXA3P
LVDS_TXA3N
LVDS_TXA4P
LVDS_TXA4N

LVDS_TXB0P
LVDS_TXB0N
LVDS_TXB1P
LVDS_TXB1N
LVDS_TXB2P
LVDS_TXB2N
LVDS_TXBCLKP
LVDS_TXBCLKN
LVDS_TXB3P
LVDS_TXB3N
LVDS_TXB4P
LVDS_TXB4N

LVDS_TXC0P
LVDS_TXC0N
LVDS_TXC1P
LVDS_TXC1N
LVDS_TXC2P
LVDS_TXC2N
LVDS_TXCCLKP
LVDS_TXCCLKN
LVDS_TXC3P
LVDS_TXC3N
LVDS_TXC4P
LVDS_TXC4N

LVDS_TXD0P
LVDS_TXD0N
LVDS_TXD1P
LVDS_TXD1N
LVDS_TXD2P
LVDS_TXD2N
LVDS_TXDCLKP
LVDS_TXDCLKN
LVDS_TXD3P
LVDS_TXD3N
LVDS_TXD4P
LVDS_TXD4N

URSA_MODEL_OPT_0
URSA_MODEL_OPT_1
URSA_MODEL_OPT_2
2D/3D_CTL

3D_SYNC_RF
PWM0

PWM1

CS

1

SO/SIO1

2

WP

3

GND

4

URSA5_FLASH_MACRONIX_2M

NON USED
BCM35230 LVDS CHC/D

TXC0N
TXC0P
TXC1N
TXC1P
TXC2N
TXC2P
TXCCLKN
TXCCLKP
TXC3N
TXC3P
TXC4N
TXC4P
TXD0N
TXD0P
TXD1N
TXD1P
TXD2N
TXD2P
TXDCLKN
TXDCLKP
TXD3N
TXD3P
TXD4N
TXD4P

VCC

8

HOL

7

SCL

6

SI/S

5

2010. 08.18
5552

+1.5V_FRC_DDR

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

R5301

1K
1%

R5302

1K
1%

C5301

0.1uF

+1.5V_FRC_DDR

R5303

1K
1%

R5304

1K
1%

C5302

0.1uF

IC5301-*1

H5TQ1G63DFR-RDC

21:9 Cinema(1866MHz)

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

NC_6

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

Close to DDR Pin

MVREFCA

MVREFDQ

VREFCA

VREFDQ

ZQ

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

NC_1
NC_2
NC_3
NC_4
NC_7

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12

VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9

C5305

+1.5V_FRC_DDR

0.1uF

A10/AP

A11

A12/BC

A13

A15

BA0
BA1
BA2

CKE

ODT
RAS
CAS

RESET

DQSL
DQSL

DQSU
DQSU

DML
DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

C5306

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

CK
CK

CS

WE

0.1uF

C5307

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3

M7

M2
N8
M3

J7
K7
K9

L2
K1
J3
K3
L3

T2

F3
G3

C7
B7

E7
D3

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

DDR3 1.5V De-Cap Place near Memory

0.1uF

0.1uF

C5308

DDR3_A[0]

DDR3_A[1]

DDR3_A[2]

DDR3_A[3]

DDR3_A[4]

DDR3_A[5]
DDR3_A[6]
DDR3_A[7]
DDR3_A[8]
DDR3_A[9]

DDR3_A[10]
DDR3_A[11]
DDR3_A[12]
DDR3_A[13]

DDR3_DQL[0]

DDR3_DQL[1]
DDR3_DQL[2]
DDR3_DQL[3]
DDR3_DQL[4]

DDR3_DQL[5]

DDR3_DQL[6]

DDR3_DQL[7]

DDR3_DQU[0]

DDR3_DQU[1]
DDR3_DQU[2]
DDR3_DQU[3]
DDR3_DQU[4]
DDR3_DQU[5]
DDR3_DQU[6]

DDR3_DQU[7]

0.1uF

C5309

DDR3_BA0
DDR3_BA1
DDR3_BA2

DDR3_ODT
DDR3_RASB
DDR3_CASB
DDR3_WEB

DDR3_DQSL
DDR3_DQSLB

DDR3_DQSU
DDR3_DQSUB

DDR3_DML
DDR3_DMU

0.1uF

0.1uF

C5310

C5311

OPT

150

R5307

R5308

DDR3_RESETB

0.1uF

C5312

DDR3_MCK

DDR3_MCKB

DDR3_CKE

0.1uF

C5313

DDR3_A[0-13]

+1.5V_FRC_DDR

0

DDR3_DQL[0-7]

DDR3_DQU[0-7]

C5314

0.1uF

Place Close to DDR Pin

R5309

C5315

0.01uF
25V

56

R5310
56

DDR3_MCK

DDR3_MCKB

Place the serail damping resistors
in the middle of DRAM pattern

FRC_DMU

FRC_DQSL

FRC_DQSLB

FRC_DQSU

FRC_DQSUB

FRC_DML

FRC_ODT

FRC_RASB

FRC_CKE

FRC_MCLK

FRC_MCLKB

FRC_DDR3_RESETB DDR3_RESETB

FRC_A[10]

FRC_BA1

FRC_A[12]

FRC_A[4]

FRC_A[6]
FRC_A[8]
FRC_A[1]

FRC_A[11]

FRC_A[0]
FRC_A[2]

FRC_A[13]

FRC_A[9]

FRC_A[7]
FRC_A[5]
FRC_A[3]

FRC_BA2
FRC_BA0
FRC_WEB

FRC_CASB

R5311 22

R5312 22

R5313 22

R5314 22

R5315 22

R5316 22

R5317 22

R5318 22

R5319 22

R5320 22

R5321 22

R5322 22

AR5301

22

AR5302

22

AR5303

22

AR5304

22

AR5305

22

DDR3_DMU

DDR3_DQSL

DDR3_DQSLB

DDR3_DQSU

DDR3_DQSUB

DDR3_DML

DDR3_ODT

DDR3_RASB

DDR3_CKE

DDR3_MCK

DDR3_MCKB

DDR3_A[10]
DDR3_BA1
DDR3_A[12]
DDR3_A[4]

DDR3_A[6]
DDR3_A[8]
DDR3_A[1]
DDR3_A[11]

DDR3_A[0]
DDR3_A[2]
DDR3_A[13]
DDR3_A[9]

DDR3_A[7]
DDR3_A[5]
DDR3_A[3]

DDR3_BA2
DDR3_BA0
DDR3_WEB
DDR3_CASB

FRC_DQL[4]
FRC_DQL[6]
FRC_DQL[2]
FRC_DQL[0]

FRC_DQU[5]
FRC_DQU[3]
FRC_DQU[7]
FRC_DQU[1]

FRC_DQU[4]
FRC_DQU[6]
FRC_DQU[2]
FRC_DQU[0]

FRC_DQL[3]
FRC_DQL[1]
FRC_DQL[5]
FRC_DQL[7]

AR5306

22

AR5307

22

AR5308

22

AR5309

22

DDR3_DQL[4]
DDR3_DQL[6]
DDR3_DQL[2]
DDR3_DQL[0]

DDR3_DQU[5]
DDR3_DQU[3]
DDR3_DQU[7]
DDR3_DQU[1]

DDR3_DQU[4]
DDR3_DQU[6]
DDR3_DQU[2]
DDR3_DQU[0]

DDR3_DQL[3]
DDR3_DQL[1]
DDR3_DQL[5]
DDR3_DQL[7]

+1.5V_FRC_DDR

C5303

0.1uF
16V

C5304
22uF
10V

Place Close to DDR Pin

NON 21:9 Cinema(1600MHz)

IC5301

H5TQ1G63DFR-PBC

MVREFCA

M8

H1

L8

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

J1
J9
L1
L9
T7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MVREFDQ

+1.5V_FRC_DDR

R5305

240

1%

M8

VREFCA

H1

VREFDQ

L8

ZQ

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1

VDDQ_1

A8

VDDQ_2

C1

VDDQ_3

C9

VDDQ_4

D2

VDDQ_5

E9

VDDQ_6

F1

VDDQ_7

H2

VDDQ_8

H9

VDDQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

T7

NC_6

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

MStar URSA5

2010. 08.18

DDR3 4Mbit 53

55

CORE +1.26V_FRC

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

+12V

L5402

CIC21J501NE

C5402

C5404

10uF

10uF

25V

25V

Placed on SMD-TOP

C5406

0.1uF

PGND

AGND

VIN

FB

IC5401

AOZ1072AI

1

2

2A

3

4

TYPICAL 980mA

+3.3V_FRC

C5412
22uF
10V

+1.26V_FRC

C5414
22uF
10V

R5405

R5404
20K

OPT

10K

R5406

3.3K
1%

R5407

3.9K
1%

R5408
12K
1%

OPT

R5409 10K

R1

C5410

100pF

50V
OPT

R2

POWER_ON/OFF2_2

L5403

3.6uH

LX_2

8

LX_1

7

EN

6

COMP

5

NR8040T3R6N

C5407
1uF
10V

C5408

R5402

3300pF

20K

+3.3V_FRC

C5416
10uF
16V

C5417

0.1uF
16V

+1.5V_FRC

AP7173-SPG-13 HF(DIODES)

IN

PG

R5413
10K

C5418

1uF

10V

VCC

EN

IC5403

1

2

THERMAL

3

4

EAN41406705

TYPICAL 350mA

[EP]

8

OUT

9

7

FB

6

SS

5

GND

C5419
560pF
50V

R1

R5414

4.3K
1%

R5415

3.9K
1%

R2

R5416
1K
1%

C5420
10uF
16V

+1.5V_FRC_DDR

C5421
10uF
16V

+12V

L5401

CIC21J501NE

C5401
10uF
25V

Vout=(1+R1/R2)*0.8

+3.3V_FRC

IC5402

AOZ1072AI-3

PGND

1

VIN

AGND

FB

2

2A

3

4

EAN60922902

C5403
10uF
25V

C5405

0.1uF

Vout=0.6*(1+R1/R2)

+1.5V of DDR&URSA5 uses same power line

TYPICAL 300mA

+3.3V_FRC

L5404

3.6uH

R5403
10K

R5401
20K

NR8040T3R6N

POWER_ON/OFF2_2

C5409
2200pF

R5410
27K
1%

R5411

4.3K
1%

R1

C5411

100pF

50V

OPT

C5413
22uF
10V

C5415
22uF
10V

LX_2

8

LX_1

7

EN

6

COMP

5

R5412
10K
1%

R2

Vout=0.8*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

MStar URSA5

URSA5 Power Block

2010. 08.18
54

55

SMD GASKET

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

SMD GASKET 4.5T

M1

M2

GASKET_4.5T

MDS62110208

M3

MDS62110208

GASKET_4.5T

MDS62110208

M4

GASKET_4.5T

MDS62110208

SMD GASKET 5.0T

M1-*1

M2-*1

GASKET_5.0T

MDS62110210

M3-*1

GASKET_5.0T

MDS62110210

MDS62110210

M4-*1

GASKET_5.0T

MDS62110210

M5

MDS62110208

GASKET_4.5T

GASKET_4.5T

M5-*1

GASKET_5.0T

GASKET_5.0T

MDS62110210

M6

MDS62110208

GASKET_4.5T

M6-*1

GASKET_5.0T

MDS62110210

M7

MDS62110208

GASKET_4.5T

M7-*1

GASKET_5.0T

MDS62110210

M8

MDS62110208

GASKET_4.5T

M8-*1

GASKET_5.0T

MDS62110210

M9

MDS62110208

GASKET_4.5T

M9-*1

GASKET_5.0T

MDS62110210

M10

MDS62110208

GASKET_4.5T

M10-*1

GASKET_5.0T

MDS62110210

M11

MDS62110208

GASKET_4.5T

M11-*1

GASKET_5.0T

MDS62110210

M12

MDS62110208

GASKET_4.5T

M12-*1

GASKET_5.0T

MDS62110210

SMD GASKET 7.5T

M1-*4

M2-*4

MDS62110205

GASKET_7.5T

M3-*4

MDS62110205

MDS62110205

GASKET_7.5T

M4-*4

MDS62110205

GASKET_7.5T

GASKET_7.5T

SMD GASKET 8.5T

M1-*5

MDS62110209

GASKET_8.5T

M2-*5

M3-*5

MDS62110209

GASKET_8.5T

M4-*5

MDS62110209

GASKET_8.5T

MDS62110209

M5-*4

MDS62110205

GASKET_7.5T

M5-*5

MDS62110209

GASKET_8.5T

M6-*4

MDS62110205

GASKET_7.5T

M6-*5

MDS62110209

GASKET_8.5T

GASKET_8.5T

M7-*4

MDS62110205

GASKET_7.5T

M7-*5

MDS62110209

M8-*4

MDS62110205

GASKET_7.5T

M8-*5

MDS62110209

GASKET_8.5T

M9-*4

MDS62110205

GASKET_7.5T

M9-*5

MDS62110209

GASKET_8.5T

M10-*4

MDS62110205

GASKET_7.5T

M10-*5

MDS62110209

GASKET_8.5T

M11-*4

MDS62110205

GASKET_7.5T

M11-*5

MDS62110209

GASKET_8.5T

GASKET_8.5T

M12-*4

MDS62110205

GASKET_7.5T

M12-*5

MDS62110209

GASKET_8.5T

SMD GASKET 5.5T

M1-*2

MDS62110204

GASKET_5.5T

M2-*2

MDS62110204

GASKET_5.5T

M3-*2

MDS62110204

GASKET_5.5T

M4-*2

MDS62110204

SMD GASKET 6.5T

M1-*3

M2-*3

MDS62110206

GASKET_6.5T

M3-*3

MDS62110206

GASKET_6.5T

MDS62110206

M4-*3

MDS62110206

GASKET_6.5T

M5-*2

GASKET_5.5T

MDS62110204

GASKET_5.5T

M5-*3

GASKET_6.5T

MDS62110206

GASKET_6.5T

M6-*2

MDS62110204

GASKET_5.5T

M6-*3

MDS62110206

GASKET_6.5T

M7-*2

MDS62110204

M7-*3

MDS62110206

GASKET_6.5T

M8-*2

MDS62110204

GASKET_5.5T

M8-*3

MDS62110206

GASKET_6.5T

M9-*2

GASKET_5.5T

MDS62110204

M9-*3

MDS62110206

GASKET_6.5T

M10-*2

GASKET_5.5T

MDS62110204

M10-*3

MDS62110206

GASKET_6.5T

M11-*2

MDS62110204

GASKET_5.5T

GASKET_5.5T

M11-*3

MDS62110206

GASKET_6.5T

M12-*2

MDS62110204

M12-*3

MDS62110206

GASKET_6.5T

GASKET_5.5T

SMD GASKET 9.5T

M1-*6

GASKET3.5T_HEATSINK

M2-*6

MDS62110214

GASKET_9.5T

M20

MDS62110213

M3-*6

MDS62110214

GASKET_9.5T

MDS62110213

GASKET3.5T_HEATSINK

M4-*6

MDS62110214

GASKET_9.5T

M21

MDS62110213

GASKET3.5T_HEATSINK

MDS62110214

M22

M5-*6

M6-*6

MDS62110214

GASKET_9.5T

GASKET_9.5T

M23

MDS62110213

GASKET3.5T_HEATSINK

M7-*6

MDS62110214

MDS62110214

GASKET_9.5T

M8-*6

MDS62110214

GASKET_9.5T

M9-*6

MDS62110214

GASKET_9.5T

M10-*6

MDS62110214

GASKET_9.5T

GASKET_9.5T

M11-*6

MDS62110214

GASKET_9.5T

M12-*6

MDS62110214

GASKET_9.5T

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

BCM35230

SMD GASKET

2010. 09. 18
56

56

RGB/ PC AUDIO/ SPDIF/ EARPHONE/ RS232C

Copyright © 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

LGE Internal Use Only

RGB PC

DSUB_VSYNC

DSUB_HSYNC

R3856 22

R3857 22

R3850 0

OPT

R3851 0

OPT

R3825
100K
OPT

DUAL COMPONENT

R3862
0

2SC3052

R3863
0

Q3801

C3829

0.22uF
10V

C3830

0.22uF
10V

L3804

BG2012B080TF

+3.3V_Normal

R3826

4.7K

C

B

E

L3805

BG2012B080TF

OPT
R3827
0

R3828
1K

HP_LOUT

SIDE_HP_MUTE

HP_ROUT

D3811

5.6V
OPT

+5V_Normal

+3.3V_Normal

ESD_COMMON

EDID_WP

RGB_DDC_SCL

RGB_DDC_SDA

R3814
10K

R38151K

D3812

5.6V

DSUB_DET

D3812-*1

5.6V

ESD_CERADIODE

+3.3V_Normal

R3858

HP_DET

1K

EARPHON JACK

EARPHONE AMP

HP_LOUT_N

HP_LOUT_P

HP_ROUT_P

HP_ROUT_N

R3816

2.7K
HP_LOUT

HP_ROUT

R3817

R3818

4.7K

OPT

C3818
1uF
10V

C3819

1uF

10V

C3820
1uF

10V

C3821
1uF

10V

OPT

R3820

4.7K

R3819

INL-

INL+

INR+

INR-

JK3803

KJA-PH-0-0177

5GND

4L

3DETECT

1R

+3.3V_Normal

Close to the IC

SGND

OUTL

15

16

1

2

IC3804
TPA6132A2

3

4

EAN60724701

6G07G18

5

OUTR

L3803
BLM18PG121SN1D

C3823
1uF
10V

VDD

13EN14

HPVSS

D3804,D3805,D3806
D3807,D3808,D3813
D3814

D3810

Q3801

C3826

C3824

0.1uF

10uF

16V

10V

HPVDD

12

CPP

11

PGND

10

CPN

9

C3825

2.2uF
10V

1ST : EAH39491601, 2ND : EAH33945901

1ST : 0DD184009AA, 2ND : 0DSIH00028A

1ST : 0TRIY80001A, 2ND : 0TR387500AA

LPF READEY
(For H/P Noise Improvement)

C3827

2.2uF
10V

C3828

2.2uF
10V

D3810

KDS184

A2

C

A1

IC3801
74F08D

D0A

1

D0B

2

Q0

3

D1A

4

D1B

5

Q1

6

GND

7

+5V_Normal

IC3802

GND

A0

A1

A2

R3807
75

R3806
75

R3808
75

AT24C02BN-SH-T

1

2

3

4

8

7

6

5

D3804

30V

D3805
30V

C3807
47pF
50V

C3808
47pF
50V

C3809
47pF
50V

VCC

WP

SCL

SDA

VCC

14

D3B

13

D3A

12

Q3

11

D2B

R3852 0

10

OPT

D2A

R3853 0

9

OPT

Q2

8

OPT
R3802
10K

OPT
R3801
10K

DSUB_B+

5.6V

D3808-*1

ESD_CERADIODE

DSUB_G+

5.6V

D3806-*1

ESD_CERADIODE

DSUB_R+

5.6V

D3807-*1

ESD_CERADIODE

C3812

18pF

50V

C3810
22pF
50V

Closed to JACK
C3811
22pF
50V

BLM15BD121SN1

ESD_COMMON
D3808
30V

BLM15BD121SN1

ESD_COMMON

D3806
30V

BLM15BD121SN1

ESD_COMMON

D3807
30V

R3809

R3810

2.7K

2.7K

C3813
18pF

50V

L3806

L3807

L3808

RED_GND7GREEN_GND8BLUE_GND9NC10SYNC_GND

GND_212DDC_DATA13H_SYNC14V_SYNC15DDC_CLOCK

R3813

10K

22

R3812

R381122

D3809

5.6V
OPT

RED2GREEN3BLUE4GND_15DDC_GND

P3801

SPG09-DB-010

PC AUDIO

JK3801

PEJ027-04

SPDIF OUT

SPDIF_OUT

E_SPRING

3

T_TERMINAL1

6A

B_TERMINAL1

7A

R_SPRING

4

T_SPRING

5

B_TERMINAL2

7B

T_TERMINAL2

6B

R3861
0

ESD_COMMON

D3802

AMOTECH

5.6V

ESD_COMMON

D3801

AMOTECH

5.6V

R3804
470K

R3803
470K

+3.3V_Normal

R3805

2.7K

C3803
560pF
50V

C3802

560pF
50V

D3803
30V

OPT

R3854
22

R3855
22

C3804

0.1uF
16V

C3806
560pF
50V

C3805
560pF
50V

PC_R_IN

PC_L_IN

VINPUT

GND

1

VCC

2

3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

6

Fiber Optic

4

FIX_POLE

11

1

JK3802

JST1223-001

SHILED

16

0.1uF

RS232C

C1+

C38140.1uF

V+

C3815

C1-

C2+

C38160.1uF

C2-

V-

C38170.1uF

DOUT2

RIN2

IC3803
MAX3232CDR

1

2

3

4

5

6

7

8

EAN41348201

10

5

IR_OUT

ESD_COMMON

D3814
30V

D3814-*1

ESD_CERADIODE

5.6V

R38290

BCM_RX

NEC_RXD

BCM_TX

NEC_TXD

D3813-*1

ESD_CERADIODE

5.6V

4.7K
OPT

IR_OUT

ESD_COMMON

D3813
30V

R3821
0

R3822
0

R3823
0

R3824
0

R3860

+3.5V_ST

VCC

16

GND

15

DOUT1

14

RIN1

13

ROUT1

12

DIN1

11

DIN2

10

ROUT2

9

HIGH : SELECT X1, Y1, SELECT MAIN TX/RX
LOW : SELECT X0, Y0, SELECT MICOM TX/RX

100

R3859
100

+3.5V_ST

R3830

4.7K
OPT

R3831

JP3809

JP3808

9

8

7

6

SPG09-DB-009

P3802

4

3

2

1

BCM35230

LV7 COMM JACK

9999