LG 42PJ150-ze Schematic

Page 1
PLASMA TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : PD01A
MODEL : 42PJ150 42PJ150-ZE
Internal Use Only
Printed in Korea
P/NO : MFL62881216(1006-REV00)
Page 2
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................7
TROUBLESHOOTING GUIDE .................................................................................................12
BLOCK DIAGRAM ...................................................................................................................23
EXPLODED VIEW ...................................................................................................................24
SVC. SHEET ................................................................................................................................
Page 3
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.
It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1MΩ and 5.2MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument's exposed METALLIC PARTS
Good Earth Ground such as WATER PIPE, CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF
Page 4
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
V Application Range
This spec is applied to the PLASMA TV used PD01A Chassis.
V Specification
Each part is tested as below without special appointment. (1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5 (2) Relative Humidity: 65 % ± 10 % (3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.
V Test Method
(1) Performance : LGE TV test method followed. (2) Demanded other specification
Safety : CE, IEC specification EMC : CE, IEC
V Module Specification
(1) 42” HD
Display Screen Device
Aspect Ratio
PDP Module
Operating Environment
Storage Environment
Input Voltage
1
2
3
4
5
6
No Item Specification Remark
106 cm (42 inch) Wide Color Display Module
16:9
PDP42 T1####,
RGB Closed(Well) Type, Glass Filter(38 %)
Pixel Format: 1365 horiz. By 768 ver.
1) Temp. : 0 deg ~ 40 deg
2) Humidity : 20 % ~ 80 %
3) Temp. : -20 deg ~ 60 deg
4) Humidity : 10 % ~ 90 %
AC 100 V - 240 V ~, 50 / 60 Hz
PDP
LGE SPEC.
Maker LG
Page 5
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
V Model General Specification
No Item Specification Remarks
1 Market Albania, Austria, Belgium, Bosnia, Bulgaria, 36 Country
Coratia, Czech, Denmark, Estonia, Finland,
France, Germany, Greece, Hungary, Ireland,
Italy, Kazakhstan, Latvia, Lithuania,
Luxembourg, Morocco, Netherlands, Norway,
Poland, Portugal, Romania, Russia, Serbia,
Slovenia, Spain, Sweden, Slovakia,
Switzerland, Turkey, Ukraine, UK
2 Broadcasting system 1) PAL/SECAM BG EU (PAL Market)
2) PAL/SECAM DK
3) PAL Ⅰ/Ⅱ
4) SECAM L/L’
5) DVB T
6) DVB C
3 Receiving system Analog : Upper Heterodyne
Digital : COFDM, QAM
4 Scart Jack (2EA) PAL, SECAM Scart 1 Jack is Full scart and support
RF-OUT(Analoge)
Scart 2 jack is Half scart and support
MNT-OUT.
5 Video Input (1EA) PAL, SECAM, NTSC Side AV except PJ20, PK20
6 Component Input (1EA) Y/Cb/Cr, Y/ Pb/Pr rear
7 RGB Input RGB-PC Analog (D-Sub 15Pin) except PJ20, PK20
8 HDMI Input (4EA) HDMI-PC HDMI1/DVI, HDMI2, HDMI3
HDMI-DTV 1ea : PJ20
2ea : PK30, PK20, PJ60, PJ50, PJ30
3ea : PK50, PK70
9 Audio Input (3 EA) RGB/DVI Audio, Component, AV L/R Input
10 SPDIF Out(1 EA) SPDIF Out
11 USB For SVC, S/W Download, X-Studio, DivX PJ30 doesn’t support Divx
PK20, PJ20 only for SVC
12 Bluetooth Bluetooth Phone(JPEG, MP3), Only 50/60PK550
Bluetooth Headset(mono, stereo) Profile : A2DP, BIP, FTP, GAVDP, HSP, OPP
Page 6
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
V Chroma & Brightness (Optical)
(1) (With 38 % Glass Filter) 42T1 module
No Item Min Typ Max Unit Remark
1. White peak brightness 315 - cd/m
2
(*) Peak Brightness Mode
-1/100 white Window pattern
(Typically 1% Window size)
-100IRE (255Gray)
-Picture: Vivid (Medium)
-Input: HDMI-PC(1920*1080 60Hz)
*Peak Brightness Condition may Slightly
different between sets.
148 161 -25/100 white Window pattern
2. White average brightness 46 50 cd/m
2
- 100% Window White Pattern
- 100IRE(255Gray)
- Picture: Vivid(Medium )
3. Brightness uniformity -10 0 +10 %
- 85IRE(216Gray) 100% Window White Pattern
- Picture: Vivid(Medium)
4. Color White X 0.270 0.285 0.300 - White : 85IRE(216Gray) 100% Window
Coordinate Y 0.283 0.293 0.303 White Pattern
Red X 0.635 0.640 - - R/G/B : 100IRE(255Gray) 100% Window
Y 0.318 0.330 0.345 White Pattern
Green X 0.242 0.300 0.305 - Picture: Vivid(Medium )
Y 0.595 0.600 - - 100% Window
Blue X - 0.150 0.158
Y - 0.065 0.075
5. Color coordinate uniformity -0.01 Average +0.01 - 85IRE 100% Window White Pattern
- Picture: Vivid(Medium)
6. Contrast ratio at dark room 100k: 1 1,000k: 1 -1/100 white window pattern(Peak mode)
-100IRE(255Gray)
-Picture: Vivid(Medium)
-Input: HDMI-PC (1920*1080 60Hz)
7. Color Cool X 0.261 0.276 0.291 - 85IRE 100% Window White Pattern
Temperature Y 0.268 0.283 0.298 Warm : ColorGamut => WIDE
Medium X 0.270 0.285 0.300 Cool : Color temperature C30
Y 0.278 0.293 0.308 Meduum : Color temperature 0
Warm X 0.298 0.313 0.328 Warm : Color temperature W30
Y 0.314 0.329 0.344
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application
This spec. sheet is applied to all of the PD01A chassis.
2. Specification
[Caution: The module keeping condition]
- The module keeping condition: The normal temperature condition(more than 15 °C)
--> Immediately the line supply.
- The module keeping condition: 0 °C
--> The module must be kept for more than 2 hours at the normal temperature.
- The module keeping condition: -20 °C
--> The module must be kept for more than 3 hours at the normal temperature.
- The case of Gu-mi factory at the winter season.
--> The module must be kept for more than 5 minutes at the heating zone(40 °C ~ 45 °C).
(1) The adjustment is according to the order which is
designated and which must be followed, according to the plan which can be changed only on agreeing.
(2) If there is no specific designation, the adjustment must be
performed in the circumstance of 25 °C ± 5 °C of temperature and 65 % ± 10 % of relative humidity.
(3) The input voltage of the set must keep 100 V ~ 240 V,
50 / 60 Hz. (4) Input signal Unit: Product Specification Standard. (5) The set must be operated for about 5 minutes prior to the
adjustment.
O After turning on RGB Full Window pattern in HEAT-RUN
Mode, the receiver must be operated.
O Enter into HEAT-RUN MODE
1) Press the ‘POWER ON’ button on R/C for adjustment.
2) Press the ‘ADJ’ button on R/C and enter EZ ADJUST Select “7. Test Pattern” by using
D/E(CH +/-) and press
ENTER(
V)
Select “White” by using
F /G (VOL +/-) and press
ENTER(
V)
- Set heat run should be activated without a signal generator.
- Single color patterns (RED / BLUE / GREEN) of HEAT RUN MODE are used to check a plasma panel.
- Caution: If you turn on a still screen more than 20 minutes (Especially digital pattern, cross hatch pattern), an after image may be made in the black level part of the screen.
[Caution]
- Use ‘power on’ button of a service R/C to power on TV set.
- Do not connect any external input cable if there is no any specifics.
3. Update S/W using Auto Download
through the USB
Caution: S/W version of USB file (xxx.epk) must be bigger than
one which is downloaded previously.
(1) Insert the USB stick to the USB socket (2) A downloaded file in USB stick will be detected
automatically.
(3) If S/W version of USB file (xxx.epk) is bigger than one
which is downloaded previously, the message, “Copying files from memory”, will appear.
(4) If an update procedure was completed, TV set will be
turned off and on automatically.
(5) If TV set is turned on, check an updated version.
* If a downloaded version is more bigger than one of which
TV set had, TV set can lost channel data. In this case, you have to scan channels again.
4. After Downloading S/W, Adjust
TOOL OPTION
(1) Push “IN-START” button on a service R/C. (2) Select “Tool Option 1” and Push “OK” button. (3) Put the number of a below table in order of a suffix of the
“Tool Option(X)”.
(Each model has a different number.)
Page 8
5. ADC Calibration Procedure
(1) Input the component (480i/Horizontal Color Bar) signal to a
TV set.
1) Input Signal Timing : Component 480i (Other external connection is unnecessary except the
component before executing ADC calibration.)
2) Input Signal Pattern
@ MODEL: 209 in Pattern Generator(480i Mode) @ PATTERN : 65 in Pattern Generator(MSPG-925
SERISE)
(2) Push “ADJ” button on a service R/C. (3) Enter internal ADC mode by selecting ‘5. ADC Calibration’. (4) If you select ‘Start’ on a dialog box of the screen, ADC
calibration will be begun.
Caution: Don’t connect any external input cable except the
component input(480i/Horizontal_Color_Bar) to adjust ADC calibration
O Auto ADC Calibration Map(RS-232C)
# Adjust Sequence
- aa 00 00 [Enter Adjust Mode]
- xb 00 40 [Component1 Input (480i)]
- ad 00 10 [Adjust 480i Comp1]
- xb 00 60 [RGB Input (1024*768)]
- ad 00 10 [Adjust 1024*768 RGB]
- aa 00 90 End Adjust mode
6. EDID Download Procedure
(1) Push “ADJ” button on a service R/C. (2) Enter EDID auto download mode by selecting ‘8. EDID
D/L’.
(3) If you select ‘Start’ on a dialog box of the screen, EDID
download will be begun automatically. (4) Press ‘EXIT’ button on a service R/C. (5) EDID Data
1) HDMI (HD Models, 256 bytes)
2) RGB (HD Models, 128 bytes)
O EDID Data detailing (ⓐ, ⓑ, ⓒ, ⓓ, ⓔ, ⓕ)
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
<Horizontal Color Bar pattern>
NO Item
CMD1
AA00
01
D
A
CMD2 Data0
Enter
Adjust MODE
Adjust
‘Mode In’
When transfer the ‘Made
In’, Carry the command.
Automatically adjustment
(The use of a internal
pattern)
ADC
Adjust
ADC Adjust
Page 9
ⓐ Product ID
ⓑ Serial No
=> Controlled on production line
ⓒ Month, Year
=> Controlled on production line:
ⓓ Model Name
ⓔ Checksum
=> Changeable by total EDID data
ⓕ HDMI Port No.
O Auto EDID Download Map(RS-232C)
7. PCMCIA CARD Check
You must adjust DTV 29 Channel and insert PCMCIA CARD to socket.
- If PCMCIA CARD works normally, video signals will appear on screen. But it works abnormally, “No CA module” will appear on screen.
[ Caution: Set up “RF mode” before launching products.
8. POWER Supply Unit PCB Ass’y Va/Vs Voltage Adjustment
Caution: Both Vs and Va voltage adjustment are necessary.
8-1. Va/Vs Adjustment Procedure
(1) Connect positive(+) terminal of DMM to Vs/Va pin, connect
negative(-) terminal to GND.
(2) Turning ‘Vs/Va Adjust’ and adjust Vs/Va voltages to a
value which is written on a right/top label of a module. (deviation ; ±0.5V)
[Caution]
- Each Power Supply Unit PCB assembly must be checked by check JIG set. (Because power PCB Ass’y damages to PDP Module, especially be careful)
- Set up “RF mode(noise)” before a voltage adjustment.
- Test equipment: DMM 1EA
9. White Balance Adjustment
Caution: Press the POWER ON KEY on R/C before W/B adjustment.
O Test Equipment
Color Analyzer (CS-1000, CA-100+(CH.10), CA-210(CH.10))
O Please adjust CA-100+ / CA-210 by CS-1000 before
measuring You should use Channel 10 which is Matrix compensated (White, Red, Green, Blue revised) by CS-1000 and adjust
in accordance with White balance adjustment coordinate.
- 9 -
LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
NO Item
CMD1
AA00
1000
E
A
CMD2 Data0
Enter
download
MODE
Download
‘Mode In’
When transfer the ‘Made
In’, Carry the command.
Automatically download
(The use of a internal
Data)
Download
EDID data and
Model option
download
MODEL
EDID MODEL
PRODUCT_ID FUNCTION
ALL Model LG DTV 0001(0x01, 0x00) Analog
ALL Model LG DTV 0001(0x01, 0x00) Digital
FHD HD
HDMI1 0xE2 0xB4 0xAF 0xB4
HDMI2 0xE2 0xA4 0xAF 0xA4
HDMI3 0xE2 0x94 0xAF 0x94
HDMI4 - - - -
RGB 0x62 0x2F
Page 10
9-1. Color Temperature Standards According
to CSM and Module(TBD)
9-2. Change Target Luminance and Range
of the Auto Adjustment W/B Equipment
9-3. White Balance Adjustment Coordinate
and Color Temperature
[ PC (for communication through RS-232C) ? UART Baud
rate : 115200 bps
9-4. Automatic W/B Adjustment
(1) Internal PATTERN should be used when W/B is adjusted.
Connect to auto controller like below.
(2) Start White-Balance adjustment, then the full white window
pattern will appear on the screen.
(3) Adjust in the place where the influx of light like floodlight
around is blocked.
(illumination is less than 10ux).
(4) Measure and adjust after sticking the Color Analyzer (CA-
100+, CA210 ) to the side of the module.
O Auto W/B Adjustment Map(RS-232C)
RS-232C COMMAND [ CMD ID DATA ]
Wb 00 00 White Balance Start Wb 00 FF White Balance End
9-5. Manual W/B Adjustment
(1) Execute the zero calibration of CA-100+ / CA-210. (2) Press the ‘ADJ’ button on a service R/C and enter EZ
ASJUST by selecting ‘6. White Balance’. (3) Then, 216 gray pattern will appear on the screen. (4) Change the R/G/B-Gain as passing in 3 color coordinates
and temperatures, COOL, MEDIUM and WARM.
< Temperature: COOL >
- R-Cut / G-Cut / B-Cut is set to 64
- Control R-Gain and G-Gain.
- Each gain is limited to 192
< Temperature: MEDIUM >
- R-Cut / G-Cut / B-Cut is set to 64
- Control R-Gain and G-Gain.
- Each gain is limited to 192
< Temperature: WARM >
- R-Cut / G-Cut / B-Cut is set to 64
- Control G-Gain and B-Gain.
- Each gain is limited to 192
(5) Press ‘EXIT’ button on a service R/C
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
20Range
50Target luminance
128646464B Cut
128646464G Cut
128646464R Cut
50H3 60H3
25519219219200jfJcjiB Gain
25519219219200jeJbjhG Gain
25519219219200jdJajgR Gain
WarmMedCoolWarmMedCool
MAX
CENTER
(DEFAULT)
Min
RS-232C COMMAND
[CMD ID DATA]
6500KWarm
9300KMedium
11000KCool
PLASMACSM
Page 11
<Notice> Module Heat-Run Condition for W/B
(1) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative humidity if there is no any specifics.
(2) Before an W/B adjustment, the module which will be used
should be placed in the circumstance of 15 °C ~ 25 °C for above 2 hours.
(3) If a module was placed in the circumstance of below 15
°C, it should be placed in the circumstance of 15 °C ~ 25 °C for above 2 hours or be run for above 5 minutes in an aging environment of 60 °C.
(4) Before an W/B adjustment, TV set should be run for 5
minutes at least.
10. Serial Number Download
10-1. Download Procedure
(1) Press “Power on” button of a service R/C.(Baud rate :
115200 bps) (2) Connect RS232-C Signal Cable. (3) Write Serial number through RS-232C. (4) Check the serial number at the Diagnostics of ‘SETUP’
menu. (Refer to below).
Caution : Don’t download HDMI/RGB EEPROM to write a
model name. Model name dois unnecessary because this model use ‘Tool Option’ to call a model name.
10-2. Signal TABLE
CMD : A0h LENGTH : 85~94h (1~16 bytes) ADH : EEPROM Sub Address high (00~1F) ADL : EEPROM Sub Address low (00~FF) Data : Write data CS : CMD + LENGTH + ADH + ADL + Data_1 + ... +
Data_n
Delay : 20ms
10-3. Command Set
[Description]
FOS Default write : <7mode data> write Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0, Phase Data write : Model Name and Serial Number write in EEPROM,.
11. CI+ Key Download
11-1. Download Procedure
(1) Press "Power on" button of a service R/C.(Baud rate :
115200 bps) (2) Connect RS232-C Signal Cable. (3) Write CI+ Key through RS-232-C. (4) Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below)
12. Check Information
(Serial No. & Model name)
(1) Push the menu button in DTV mode. (2) Select the SETUP -> Diagnostics -> To set (3) Check the Serial Number
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 12
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
TROUBLESHOOTING GUIDE
Page 13
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 14
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 15
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 16
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 17
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 18
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 19
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 20
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 21
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 22
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Page 23
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LGE Internal Use OnlyCopyright ©2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
Page 24
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LGE Internal Use Only
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
Copyright ©2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
200
120
305
300
400
580
301
302
303
304
202
240
520
207
206
204
203
201
501
590
570
602
601
604
910
900
205
A10
A9
LV1
A12
A21
A2
Page 25
+3.3V_ST
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
S6_Reset
NAND FLASH MEMORY
/PF_CE0 H : Serial Flash L : NAND Flash /PF_CE1 H : 16 bit L : 8 bit
/F_RB
/PF_OE
/PF_CE0
+3.3V
10K
R103
PF_WP
Serial FLASH MEMORY for BOOT
+3.3V
10K
R104
Flash_WP_1
HDCP EEPROM
IC107
CAT24WC08W-T
R1256
4.7K
A0
1
A1
2
A2
3
VSS
4
SPI_CS
SPI_DO
8
7
6
5
/PF_CE1
PF_ALE
/PF_WE
VCC
WP
SCL
SDA
READY
R105 1K
R110
4.7K
R1257
R1258 22
1K
R1240
READY
R112 1K
R1239
1K
+3.3V
MX25L4005AM2C-12G
R1233
4.7K
CS#
SO
WP#
GND
+5V
22
C114
0.1uF
R111 3.9K
C103
1
2
3
4
+3.3V
0.1uF
IC103
EEPROM_SCL
EEPROM_SDA
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
VDD_1
VSS_1
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
RB
R
E
CL
AL
W
WP
VCC
8
HOLD#
7
SCLK
6
SI
5
IC102
NAND512W3A2CN6E
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
+3.3V_ST
+3.3V
L102
L101
MCU BOOT STRAP
10 : BOOT 51 11 : BOOT RISC
R199 1K
R1200
READY
SPI_CK
SPI_DI
READY
READY
0.1uF
1K
C104
NC_29
48
NC_28
47
NC_27
46
NC_26
45
I/O7
44
I/O6
43
I/O5
42
I/O4
41
NC_25
40
NC_24
39
NC_23
38
VDD_2
37
VSS_2
36
NC_22
35
NC_21
34
NC_20
33
I/O3
32
I/O2
31
I/O1
30
I/O0
29
NC_19
28
NC_18
27
NC_17
26
NC_16
25
+3.3V
R198 1K
R1201 1K
READY
R133
R135
+3.3V
AR102
C105
10uF 6.3V
C106 0.1uF
AR103
EEPROM
4.7K
0
PWM0
PWM1
PCM_A[7]
PCM_A[6]
PCM_A[5]
PCM_A[4]
22
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[0]
22
IC105
M24M01-HRMN6TP
NC
1
E1
2
E2
3
VSS
4
+5V
VCC
8
WP
7
SCL
6
SDA
5
1uF
C115
R1263
2SC3052
PCM_A[0-7]
+3.3V
47K
Q103
B/T_HP_LOUT_AMP
C
E
C100
0.1uF
R124
BLUETOOTH
R1266
47K
3.3K
B
R1265
BT_DM
BT_DP
R125
3.3K
S
4.7K
G
D
Q104
RTR030P02
EEPROM_SCL
EEPROM_SDA
BT_ON/OFF
P101
12507WS-08L
1
2
3
4
5
6
7
8
B/T_HP_LOUT
R122433 R123033 R122533 R122633
R160
100
R1205
4.7K
R193 1M
READY
R187100
+3.3V
R1270
4.7K
R1269
4.7K
READY
+5V_ST
R195
READY
R134 27K
SUB_SCL
5V_HDMI_2
SUB_SDA
USB_OCD
MOD_ROM_RX
MOD_ROM_TX PCM_5V_CTL SIDE_CVBS_DET
+3.3V
USB_CTL
X100
C111
12MHz
18pF
C112
18pF
SPI_DI SPI_DO SPI_CS SPI_CK
R196
R197 15K
15K
READY
READY
DBG_TX
AC_DET
PM GPIO Assignment Recommended by MStar
LED_R AC_DET
10K
MODULE_ON
DISP_EN
R186 100
DBG_RX
ISP_TXD BT_ON/OFF SC1_VIDEO_MUTE
Flash_WP_1
+3.3V
R1279
4.7K
READY
H/W Version Opiton(F9)
R1278
4.7K
CI_TS_DATA[0-7]
CI_TS_SYN CI_TS_VAL CI_TS_CLK
BUF_TS_DATA[0] BUF_TS_SYN BUF_TS_VAL_ERR BUF_TS_CLK
SC2_DET SC_RE2 SC_RE1
CI_EN
5V_HDMI_3
5V_HDMI_1
5V Tolerance
/FE_RESET
SC1_MUTE
R1293
10K
SC1_DET
R1203
4.7K
+3.3V
USB_DM USB_DP
R1202
4.7K
BT_DP BT_DM
USB
RL_ON/PWR_ONOFF
SDA1 SCL1
DEBUG
43
5
SW100
R114
1 2
100
D100
KDS181
TMUE312GAB
R115
62K
+3.3V
P_17V
L103
R116
10
C101
0.1uF
READY
R1275 4.7K
C113
0.1uF 50V
R1374.7K
READY
SB_MUTE
R13004.7K
SC2_MUTE
READY
ST_AMP_MUTE
READY
R1299 4.7K
R1284
47K
C110
10uF
16V
R1291
15K
/PF_CE0 /PF_CE1
/PF_OE /PF_WE PF_ALE
PF_WP /F_RB
+3.3V
+3.3V
+3.3V
B
R1285
KEY_BUZZER
R1298
10K
R1292
10K
R1241
10K
220
EEPROM_SCL EEPROM_SDA PDP_SDA PDP_SCL
COMP_DET DSUB_DET
470
C
Q107 2SC3052
E
C102
4.7uF 10V
9
S6_Reset
AR101
ISP_RXD ISP_TXD
DBG_RX
DBG_TX
PWM0 PWM1
KEY1 KEY2
LED_B
/CI_CD2
AMP_RST
/CI_CD1
R1290
PCM_A[0-14]
22
22
IR
XC5000_RESET
B
R1289
750
PCM_D[0-7]
AR171
C116 100pF 50V
E
Q102
C
PCM_RST /PCM_CD
/PCM_OE
/PCM_REG
/PCM_WAIT
/PCM_IRQA
/PCM_WE
/PCM_IOWR
/PCM_IORD
/PCM_CE
C117 100pF 50V
R1297 100 R1296 100
ISA1530AC1
10uF
C109
+3.3V
25V
R102
R140 R141
R1287
R156
1K
R101
R136 0
R132 0
LGE3369A (Saturn6 Non RM)
D4
AC16
PCM_D[0]
AA15
PCM_D[1]
AA16
PCM_D[2]
AC6
PCM_D[3]
Y10
PCM_D[4]
Y11
PCM_D[5]
Y12
PCM_D[6]
Y13
PCM_D[7]
PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7] PCM_A[8] PCM_A[9] PCM_A[10] PCM_A[11] PCM_A[12] PCM_A[13] PCM_A[14]
R162 R163
1K
R164 R165
100
R1242100 R1060
+3.3V
100
22 22
R1271
4.7K
R1268
4.7K FHD
READY
HD
AB16 AC15 AC14 AB14 AC12
AB8
AC13
AA9 AB5 AA4
V4
Y4 AB9 AA7 AD6
AA14 AB18
Y5
AB15 AA10
AC8 AC7 AA5
W4
T4 AE6 AF6
AA12 AA11
AC9 Y14
AB11
22
F8
22
D11
22
AB21
22
AC21
J1
J2
W5
V5
AB13 AB12 AD12 AA13
A4
B4
F4
E4
C4
AC11
D9 D10
D7 E11
E8 E10
D6
D5
C5
B/T_HP_LOUT_AMP
IC100
HWRESET
PCMD0/CI_D0 PCMD1/CI_D1 PCMD2/CI_D2 PCMD3/CI_D3 PCMD4/CI_D4 PCMD5/CI_D5 PCMD6/CI_D6 PCMD7/CI_D7
PCM_A0/CI_A0 PCM_A1/CI_A1 PCM_A2/CI_A2 PCM_A3/CI_A3 PCM_A4/CI_A4 PCM_A5/CI_A5 PCM_A6/CI_A6 PCM_A7/CI_A7 PCM_A8/CI_A8 PCM_A9/CI_A9 PCM_A10/CI_A10 PCM_A11/CI_A11 PCM_A12/CI_A12 PCM_A13/CI_A13 PCM_A14/CI_A14
PCM_RST/CI_RST PCM_CD/CI_CD /PCM_OE PCM_REG/CI_CLK PCM_WAIT/CI_WACK /PCM_IRQA /PCM_WE PCM_IOWR/CI_WR PCM_IOR/CI_RD /PCM_CE /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE PF_AD15 F_RBZ
UART2_TX/SCKM UART2_RX/SDAM DDCR_DA DDCR_CK
DDCA_CLK DDCA_DA UART_RX2 UART_TX2
PWM0 PWM1 PWM2 PWM3
SAR0 SAR1 SAR2 SAR3 IRIN
GPIO44
GPIO96 GPIO88 GPIO90/I2S_OUT_MUTE GPIO91 GPIO97 GPIO98 GPIO99 GPIO103/I2S_OUT_SD3 GPIO102
LHSYNC2/I2S_OUT_MUTE/RX1
XOUT
TESTPIN/GND
SPI_DI SPI_DO
/SPI_CS
SPI_CK
USB_DP_1 USB_DM_1 USB_DM_2 USB_DP_2
GPIO_PM0/GPIO134 GPIO_PM1/GPIO135 GPIO_PM2/GPIO136 GPIO_PM3/GPIO137
GPIO_PM4/GPIO138 GPIO_PM5/INT1/GPIO139 GPIO_PM6/INT2/GPIO140
GPIO131/LDE/SPI_WPn1
GPIO130/LCK
GPIO132/LHSYNC/SPI_WPn
GPIO60/PCM2_RESET/RX1
GPIO62/PCM2_CD_N/TX1
LVSYNC/GPIO133
GPIO79/LVSYNC2/TX1
UART2_RX/GPIO84 UART2_TX/GPIO85 UART1_RX/GPIO86 UART1_TX/GPIO87
GPIO42/PCM2_CE_N
GPIO43/PCM2_IRQA_N
TS0_D0 TS0_D1 TS0_D2 TS0_D3 TS0_D4 TS0_D5 TS0_D6 TS0_D7
TS0_SYNC
TS0_VLD TS0_CLK
TS1_D0
TS1_SYNC
TS1_VLD TS1_CLK
ET_TXD0 ET_TXD1
ET_TX_CLK
ET_RXD0 ET_RXD1
ET_TX_EN
ET_MDC
ET_MDIO
ET_COL
GPIO67 GPIO68
B3
XIN
A3
E6
AE11 AF12 AE12 AD11
B5 A5 AC10 AB10
R131 100 R130 100
E5
R1294 10K
F5
R182 100
G5
R185 100
100
H5 F6 G6 H6 AC17 AB17 AF11 AA18 AA17
E7 AC18 C6 F9 F10 A6 B6 AF5 AF10
AA8 Y8 Y9 AB7 AA6 AB6 U4 AC5 AC4 AD5 AB4
AB19 AA20 AC19 AA19
C10 B11 A9 C11 C9 B10 A10 B9 A11
A7 B8
READY
R159 R1235 22 R1236 22
+3.3V
R1204
R1237 22 R1286
R1238
100 100
C108 10pF 50V READY CI_TS_DATA[0]
CI_TS_DATA[1] CI_TS_DATA[2] CI_TS_DATA[3] CI_TS_DATA[4] CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7]
R1267 100 R1283 0
R190 22 R191 0
R192 100
R155
4.7K
R1277 R1276
0
22
C107 10pF 50V READY
100
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MSD3368EV Platform
FLASH/NVRAM/GPIO
09/09/24
1 10
Page 26
Audio Mute
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
SCART2_MUTE
SCART1_MUTE
AMP_MUTE
D202
ENKMC2838-T112
A1
C
A2
D203
ENKMC2838-T112
A1
C
A2
D201
ENKMC2838-T112
A1
C
A2
SB_MUTE
SC2_MUTE
SB_MUTE
SC1_MUTE
SB_MUTE
ST_AMP_MUTE
+1.26V_VDDC
C240 470uF 16V
+1.26V_VDDC
C2032
0.1uF
+3.3V_VDDP
C250
0.1uF
+1.8V_DDR
C246
0.1uF
C2033
0.1uF
C253
0.1uF
C257
C264
0.1uF
0.1uF
C2034
C2035
0.1uF
0.1uF
MLB-201209-0120P-N2
C258
C2026
0.1uF
0.1uF
L210
C275
0.1uF
C2036
0.1uF
+3.3V
C2004
0.1uF
C281
0.1uF
C2037
0.1uF
C2000
0.1uF
C2038
0.1uF
C2003
0.1uF
C2039
0.1uF
C2005
0.1uF
C2040
0.1uF
C2041
0.1uF
CK+_HDMI1 CK-_HDMI1 D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1
D2-_HDMI1 DDC_SDA_1 DDC_SCL_1
CK+_HDMI2
CK-_HDMI2
D0+_HDMI2
D0-_HDMI2
D1+_HDMI2
D1-_HDMI2
D2+_HDMI2
D2-_HDMI2 DDC_SDA_2 DDC_SCL_2
HDMI
CK+_HDMI3
CK-_HDMI3
D0+_HDMI3
D0-_HDMI3
D1+_HDMI3
D1-_HDMI3
D2+_HDMI3
D2-_HDMI3 DDC_SDA_3 DDC_SCL_3
HDMI_CEC
SC1_CVBS_IN
SCART_RGB
DSUB_HSYNC DSUB_VSYNC
DSUB
COMP_Pr
COMP_Pb
COMP
SC1_CVBS_IN SC2_CVBS_IN
SIDE_CVBS_IN
CVBS
S-VID
TUNER_CVBS
DTV/MNT_VOUT
TV/MNT
HPD1
HPD2
HPD3
SC1_ID SC1_FB
SC1_R SC1_G SC1_B
DSUB_R DSUB_G DSUB_B
COMP_Y
R243
SC2_ID
10K
R258
R203
R285 R204
R210 R211 R212 47 R213 R214 R215 R216 47 R217
R244
10K
R218 R219 R220 47 R221
R222 R223 47 R224 R225
R238
R205 47 R206 47 R226 47 R227 47
R207 R208 47
R235 47 R236 47
R228 R209
1K
1K
1K 100
47 47
47 470 47
47
47 47
470
47
47 470
100
47
100 100
R246 22
R245 22
C200 0.047uF C201
0.047uF
0.047uF
C202
1000pF
C203 C204 0.047uF C205
0.047uF
0.047uF
C206
0.047uF
C212 C207
0.047uF
0.047uF
C213
1000pF
C208
0.047uF
C214 C215
0.047uF
0.047uF
C216
1000pF
C209
C210 0.047uF
0.047uF
C211 C217 0.047uF C218 0.047uF
C219
0.047uF
0.047uF
C220
C2024 0.047uF C2019 0.047uF
C221 0.047uF C222 0.047uF
TP203
LGE3369A (Saturn6 Non RM)
F1
RXACKP
F2
RXACKN
G2
RXA0P
G3
RXA0N
H3
RXA1P
G1
RXA1N
H1
RXA2P
H2
RXA2N
A1
DDCD_A_DA
B2
DDCD_A_CK
A2
HOTPLUG_A
C3
RXBCKP
B1
RXBCKN
C1
RXB0P
C2
RXB0N
D2
RXB1P
D3
RXB1N
E3
RXB2P
D1
RXB2N
E1
DDCD_B_DA
F3
DDCD_B_CK
E2
HOTPLUG_B
AE8
RXCCKP
AD8
RXCCKN
AD9
RXC0P
AF8
RXC0N
AF9
RXC1P
AE9
RXC1N
AE10
RXC2P
AD10
RXC2N
AE7
DDCD_C_DA
AF7
DDCD_C_CK
AD7
HOTPLUG_C
J3
CEC
N2
HSYNC0/SC1_ID
N1
VSYNC0/SC1_FB
P2
RIN0P/SC1_R
R3
GIN0P/SC1_G
R1
BIN0P/SC1_B
P3
SOGIN0/SC1_CVBS
P1
RINM
T3
BINM
R2
GINM
K3
HSYNC1/DSUB_HSYNC
K2
VSYNC1/DSUB_VSYNC
L1
RIN1P/DSUB_R
L3
GIN1P/DSUB_G
K1
BIN1P/DSUB_B
L2
SOGIN1
V1
RIN2P/COMP_PR+
V2
GIN2P/COMP_Y+
U1
BIN2P/COMP_PB+
V3
SOGIN2
J5
VSYNC2
U3
CVBS1/SC1_CVBS
U2
CVBS2/SC2_CVBS
T1
CVBS3/SIDE_CVBS
T2
VCOM1
M1
CVBS4/S-VIDEO_Y
M2
CVBS6/S-VIDEO_C
N3
CVBS5
M3
CVBS7
W1
CVBS0/RF_CVBS
Y3
VCOM0
Y2
CVBSOUT0/SC2_MNTOUT
AA2
CVBSOUT1
IC100
LVA0P LVA0M LVA1P LVA1M LVA2P LVA2M LVA3P LVA3M LVA4P LVA4M
LVACKP LVACKM
LVB0P LVB0M LVB1P LVB1M LVB2P LVB2M LVB3P LVB3M LVB4P LVB4M
LVBCKP LVBCKM
AUR0 AUL0 AUR1 AUL1 AUR2
AUL2
AUR3 AUL3 AUR4 AUL4 AUR5 AUL5
SIF0P SIF0M
SPDIF_IN
SPDIF_OUT
AUOUTR0/HP_ROUT
AUOUTL0/HP_LOUT AUOUTR1/SC1_ROUT AUOUTL1/SC1_LOUT AUOUTR2/SC2_ROUT AUOUTL2/SC2_LOUT
I2S_OUT_MCK
I2S_OUT_WS
I2S_OUT_BCK
I2S_OUT_SD
I2S_IN_SD
VCLAMP
REFP REFM REXT
AUCOM AUVRM AUVRP AUVAG
AE16 AD16 AD15 AF16 AF15 AE15 AD13 AF14 AF13 AE13
AE14 AD14
AE20 AD20 AD19 AF20 AF19 AE19 AD17 AF18 AF17 AE17
AE18 AD18
AA3 Y1 AE1 AF3 AE3
AE2
AA1 AB1 AB2 AC2 AB3 AC3
W3 W2
F11 E9
AF1 AF2
R288
AD3
R239
AD1
R240
AC1
R250
AD2
R251
A8 B7 C7 D8 C8
R279
K4
0.1uF
C223
H4 J4 G4
R229 390
1%
Check AE5 AE4 AF4 AD4
Close to IC
as close as possible
C229 2.2uF
C230 C2006 C2007 C2008 2.2uF C2009 C2011 2.2uF C2012 C2013 C2014 2.2uF C2015 2.2uF C2016 2.2uF
C231 0.1uF
C232 0.1uF
R282 0
R230 100
100
BLUETOOTH 100 100 100 100
C2042
R231 22 R232 22 R233 22 R234 22
100
+3.3V
0.1uF
C224 0.1uF
C225 10uF C226 0.1uF C227
1uF
C228 4.7uF
0.01uF
C233
2.2uF
2.2uF
2.2uF
2.2uF
2.2uF
2.2uF
R287
C234
0.1uF
22K
C235
0.1uF
C2020
R241
R242 47
0.01uF
R254
C283
0.1uF
L205
C279
0.1uF
C287
0.1uF
L207
L208
C291
0.1uF
L209
MLB-201209-0120P-N2
C284
0.1uF
+3.3V
C285
0.1uF +3.3V
C288
0.1uF
+3.3V_AVDD
C286
0.1uF
+3.3V
C292
0.1uF
C296
0.1uF
+3.3V_AVDD
C293
0.1uF
C245
C2010
C243
220uF
220uF
6.3V
6.3V
RXE0+ RXE0­RXE1+ RXE1­RXE2+ RXE2­RXE3+ RXE3­RXE4+ RXE4-
RXECK+ RXECK-
RXO0+ RXO0­RXO1+ RXO1­RXO2+ RXO2­RXO3+ RXO3­RXO4+ RXO4-
RXOCK+ RXOCK-
SC1_RIN SC1_LIN
SC2_RIN SC2_LIN SIDE_RIN SIDE_LIN COMP_RIN COMP_LIN PC_RIN PC_LIN
47
TUNER_SIF
22K
C2021
0.01uF
C236 22pF
READY
R255
READY
22K
C237 22pF
C2022
0.01uF
C238 22pF
READY
R256
22K
C2023
0.01uF
C239 22pF
READY
R257
LVDS OUT
AUDIO IN
PSU_ERR_DET SPDIF_OUT
B/T_HP_LOUT
SC1_Rout SC1_Lout SC2_Rout SC2_Lout
22K
AUDIO_MASTER_CLK MS_LRCK MS_SCK MS_LRCH
AUDIO OUT
LGE3369A (Saturn6 Non RM)
E16 E17 E18
F7
L9 L10 L11
L12 L13 L14 L15 L16 L17 L18
M9
M10 M11 M12 M13 M14 M15 M16 M17
M18
N4
N9 N10 N11 N12 N13 N14
N15 N16 N17 N18
P4
P9 P10
P11 P12 P13 P14 P15 P16 P17 P18
R4
R9 R10 R11 R12 R13 R14 R15
R16 R17 R18
T5
T9 T10 T11 T12
T13 T14 T15 T16 T17 T18
U5 W13 Y21
AA23
GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8
GND_9 GND_10 GND_11 GND_12 GND_13
GND_14 GND_15 GND_16
GND_17 GND_18
GND_19 GND_20 GND_21 GND_22 GND_23 GND_24
GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32
GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39
GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47
GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55
GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63
GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73
IC100
0.1uF
AVDD_DDR_1 AVDD_DDR_2 AVDD_DDR_3 AVDD_DDR_4 AVDD_DDR_5 AVDD_DDR_6 AVDD_DDR_7 AVDD_DDR_8
AVDD_DDR_9 AVDD_DDR_10 AVDD_DDR_11
AVDD_MEMPLL_1 AVDD_MEMPLL_2 AVDD_MEMPLL_3
AVDD_LPLL
AVDD_MPLL
AVDD_33_1 AVDD_33_2 AVDD_33_3 AVDD_33_4 AVDD_33_5
AVDD_USB
C248
0.1uF
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15
VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
VDDP_6
VDDP_7
VDDP_8
AVDD_AU
AVDD_DM
+1.26V_VDDC
D16 D17 D18 D19 D20 H18 H19 H20 J20 K20 L20 M20 P7 R7 T7 T22 U7 U20 U22 V7 V22 W11 W12 W19 W20 W22 Y22
H9 H10 H11 H12 N20 P20 W9 W10
W7
+1.8V_DDR
G12 G13 H13 H14 H15 H16 W14 W15 W16 W17 W18
H17 T20 V20
R20
H7
0.1uF
J7 K7 L7 M7 N7
W8
H8
C259
0.1uF
C255
C266
0.1uF
+3.3V_VDDP
C262
0.1uF
+3.3V_AVDD_MPLL
C2025 10uF
6.3V
MLB-201209-0120P-N2
C2043
C2044
2.2uF
10uF
10V
6.3V
C269
0.1uF
C241
0.1uF
C263
0.1uF
C256
0.1uF
C2030
0.1uF
C242
0.1uF
0.1uF
MLB-201209-0120P-N2
C273
0.1uF
MLB-201209-0120P-N2
L206
MLB-201209-0120P-N2
+3.3V
MLB-201209-0120P-N2
L202
C272
0.1uF
C277
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MSD3368EV Platform
AV IN_OUT/LVDS/POWER
2 10
Page 27
DDR2 1.8V By CAP - Place these Caps near Memory
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
+1.8V_DDR
C323
0.1uF
L300
MLB-201209-0120P-N2
C302
0.1uF C303
10uF
C304
0.1uF
C305
0.1uF
C306
0.1uF
C307
0.1uF
C308
0.1uF
C310
0.1uF
C312
0.1uF
C313
0.1uF
C314
10uF
C315
0.1uF
C316
0.1uF
C317
0.1uF
C318
0.1uF
C319
0.1uF
C320
0.1uF
C324
10uF
C325
0.1uF
C326
0.1uF
C327
0.1uF
C328
0.1uF
C329
10uF
C330
0.1uF
C331
0.1uF
C332
0.1uF
C334
C336
0.1uF
0.1uF
C337
0.1uF
C338
0.1uF
C339
0.1uF
C340
+1.8V_S_DDR
C341
0.1uF
0.1uF
C342
0.1uF
1%
R343
1K
C333 0.1uF
TDDR_A[0-12]
R344
TDDR_CKE READY R348 4.7K
R349
/TDDR_RAS
/TDDR_CAS
/TDDR_WE
TDDR_DQS0_P
TDDR_DQS1_P
TDDR_DQM0_P
TDDR_DQM1_P
TDDR_DQS0_N
TDDR_DQS1_N
+1.8V_S_DDR
R345
1K
C335 1000pF
TDDR_A[0] TDDR_A[1] TDDR_A[2]TDDR_A[10] TDDR_A[3] TDDR_A[4] TDDR_A[5] TDDR_A[6] TDDR_A[7] TDDR_A[8] TDDR_A[9] TDDR_A[10] TDDR_A[11] TDDR_A[12]
TDDR_BA[0]BDDR2_BA[0] TDDR_BA[1]
150
READY
TDDR_ODT
READY
+1.8V_S_DDR
1%
HYB18TC512160B2F-2.5
VREF
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
A10/AP
A11 A12
BA0 BA1
CK CK
CKE
ODT
LDQS UDQS
LDQS UDQS
VSSDL
VDDL
CS RAS CAS
WE
LDM UDM
NC4 NC5 NC6
NC1 NC2 NC3
4.7K
J2
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2
L2 L3
J8 K8 K2
K9 L8 K7 L7 K3
F7 B7
F3 B3
E8 A8
L1 R3 R7
A2 E2 R8
J7
J1
IC301
QIMONDA 512M
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
TDDR_D[0] TDDR_D[1] TDDR_D[2] TDDR_D[3] TDDR_D[4] TDDR_D[5] TDDR_D[6] TDDR_D[7] TDDR_D[8]
TDDR_D[9] TDDR_D[10] TDDR_D[11] TDDR_D[12] TDDR_D[13] TDDR_D[14] TDDR_D[15]
+1.8V_S_DDR
TDDR_D[0-15]
IC301-*1
H5PS5162FFR-S6C
DQ0
VREF
G8
J2
DQ1
G2
DQ2
H7
A0
M8
DQ3
H3
A1
M3
DQ4
H1
A2
M7
DQ5
H9
A3
N2
DQ6
F1
A4
N8
DQ7
F9
A5
N3
DQ8
C8
A6
N7
DQ9
C2
A7
P2
DQ10
D7
A8
P8
DQ11
D3
A9
P3
DQ12
D1
A10/AP
M2
DQ13
D9
A11
P7
DQ14
B1
A12
R2
DQ15
B9
BA0
L2
BA1
L3
VDD5
A1
VDD4
E1
VDD3
CK
J9
J8
VDD2
CK
M9
K8
VDD1
CKE
R1
K2
ODT
K9
VDDQ10
CS
A9
L8
VDDQ9
RAS
C1
K7
VDDQ8
CAS
HYNIX 512M
C3
L7
VDDQ7
WE
C7
K3
VDDQ6
C9
VDDQ5
E9
LDQS
F7
VDDQ4
G1
UDQS
B7
VDDQ3
G3
VDDQ2
G7
VDDQ1
LDM
G9
F3
UDM
B3
VSS5
LDQS
A3
E8
VSS4
UDQS
E3
A8
VSS3
J3
VSS2
N1
NC4
L1
VSS1
P9
NC5
R3
NC6
R7
VSSQ10
B2
NC1
A2
VSSQ9
B8
NC2
E2
VSSQ8
A7
NC3
R8
VSSQ7
D2
VSSQ6
D8
VSSQ5
E7
VSSDL
J7
VSSQ4
F2
VSSQ3
F8
VSSQ2
H2
VDDL
VSSQ1
J1
H8
IC301-*2
EDE5116AJBG-8E-E
DQ0
VREF
G8
J2
DQ1
G2
DQ2
H7
A0
M8
DQ3
H3
A1
M3
DQ4
H1
A2
M7
DQ5
H9
A3
N2
DQ6
F1
A4
N8
DQ7
F9
A5
N3
DQ8
C8
A6
N7
DQ9
C2
A7
P2
DQ10
D7
A8
P8
DQ11
D3
A9
P3
DQ12
D1
A10
M2
DQ13
D9
A11
P7
DQ14
B1
A12
R2
DQ15
B9
BA0
L2
BA1
L3
VDD_5
A1
VDD_4
E1
VDD_3
CK
J9
J8
VDD_2
CK
M9
K8
VDD_1
CKE
R1
K2
ODT
K9
VDDQ_10
CS
A9
L8
VDDQ_9
RAS
C1
K7
VDDQ_8
CAS
ELPIDA 512M
C3
L7
VDDQ_7
WE
C7
K3
VDDQ_6
C9
VDDQ_5
E9
LDQS
F7
VDDQ_4
G1
UDQS
B7
VDDQ_3
G3
VDDQ_2
G7
LDM
VDDQ_1
F3
G9
UDM
B3
VSS_5
LDQS
A3
E8
VSS_4
UDQS
E3
A8
VSS_3
J3
VSS_2
N1
NC_4
L1
VSS_1
P9
NC_5
R3
NC_6
R7
VSSQ_10
B2
NC_1
A2
VSSQ_9
B8
NC_2
E2
VSSQ_8
A7
NC_3
R8
VSSQ_7
D2
VSSQ_6
D8
VSSQ_5
VSSDL
E7
J7
VSSQ_4
F2
VSSQ_3
F8
VSSQ_2
H2
VSSQ_1
VDDL
H8
J1
IC301-*3
K4T51163QG-HCE7
DQ0
VREF
G8
J2
DQ1
G2
DQ2
H7
A0
M8
DQ3
H3
A1
M3
DQ4
H1
A2
M7
DQ5
H9
A3
N2
DQ6
F1
A4
N8
DQ7
F9
A5
N3
DQ8
C8
A6
N7
DQ9
C2
A7
P2
DQ10
D7
A8
P8
DQ11
D3
A9
P3
DQ12
D1
A10/AP
M2
DQ13
D9
A11
P7
DQ14
B1
A12
R2
DQ15
B9
BA0
L2
BA1
L3
VDD_5
A1
VDD_4
E1
VDD_3
CK
J9
J8
VDD_2
CK
M9
K8
VDD_1
CKE
R1
K2
ODT
K9
VDDQ_10
CS
A9
L8
VDDQ_9
RAS
C1
K7
VDDQ_8
CAS
SS 512M
C3
L7
VDDQ_7
WE
C7
K3
VDDQ_6
C9
VDDQ_5
E9
LDQS
F7
VDDQ_4
G1
UDQS
B7
VDDQ_3
G3
VDDQ_2
G7
VDDQ_1
LDM
G9
F3
UDM
B3
VSS_5
LDQS
A3
E8
VSS_4
UDQS
E3
A8
VSS_3
J3
VSS_2
N1
NC_4
L1
VSS_1
P9
NC_5
R3
NC_6
R7
VSSQ_10
B2
NC_1
A2
VSSQ_9
B8
NC_2
E2
VSSQ_8
A7
NC_3
R8
VSSQ_7
D2
VSSQ_6
D8
VSSQ_5
E7
VSSDL
J7
VSSQ_4
F2
VSSQ_3
F8
VSSQ_2
H2
VDDL
VSSQ_1
J1
H8
G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9
A1 E1 J9 M9 R1
A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
A3 E3 J3 N1 P9
B2 B8 A7 D2 D8 E7 F2 F8 H2 H8
+1.8V_S_DDR
1%R302 1K 1%
1K
R301
0.1uF
IC300
HYB18TC1G160C2F-2.5
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
VDD5 VDD4 VDD3 VDD2 VDD1
VDDQ10
VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1
VSS5 VSS4 VSS3 VSS2 VSS1
VSSQ10
VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1
DQ0
G8
DQ1
G2
DQ2
H7
DQ3
H3
DQ4
H1
DQ5
H9
DQ6
F1
DQ7
F9
DQ8
C8
DQ9
C2 D7 D3 D1 D9 B1 B9
A1 E1 J9 M9 R1
A9 C1
QIMONDA 1G
C3 C7 C9 E9 G1 G3 G7 G9
A3 E3 J3 N1 P9
B2 B8 A7 D2 D8 E7 F2 F8 H2 H8
SDDR_D[0] SDDR_D[1] SDDR_D[2] SDDR_D[3] SDDR_D[4] SDDR_D[5] SDDR_D[6] SDDR_D[7] SDDR_D[8] SDDR_D[9] SDDR_D[10]
SDDR_D[0-15]
SDDR_D[11] SDDR_D[12] SDDR_D[13] SDDR_D[14] SDDR_D[15]
+1.8V_S_DDR
IC300-*1
HY5PS1G1631CFP-S6
DQ0
VREF
G8
J2
DQ1
G2
DQ2
H7
A0
M8
DQ3
H3
A1
M3
DQ4
H1
A2
M7
DQ5
H9
A3
N2
DQ6
F1
A4
N8
DQ7
F9
A5
N3
DQ8
C8
A6
N7
DQ9
C2
A7
P2
DQ10
D7
A8
P8
DQ11
D3
A9
P3
DQ12
D1
A10/AP
M2
DQ13
D9
A11
P7
DQ14
B1
A12
R2
DQ15
B9
BA0
L2
BA1
L3
VDD5
A1
BA2
L1
VDD4
E1
VDD3
J9
VDD2
CK
M9
J8
VDD1
CK
R1
K8
CKE
K2
VDDQ10
ODT
A9
K9
VDDQ9
CS
C1
L8
RAS
VDDQ8
HYNIX 1G
K7
C3
VDDQ7
CAS
C7
L7
VDDQ6
WE
C9
K3
VDDQ5
E9
VDDQ4
G1
LDQS
F7
VDDQ3
G3
UDQS
B7
VDDQ2
G7
VDDQ1
G9
LDM
F3
UDM
B3
VSS5
A3
VSS4
LDQS
E3
E8
VSS3
UDQS
J3
A8
VSS2
N1
VSS1
P9
NC5
R3
NC6
R7
VSSQ10
B2
NC1
A2
VSSQ9
B8
NC2
E2
VSSQ8
A7
NC3
R8
VSSQ7
D2
VSSQ6
D8
VSSQ5
E7
VSSDL
J7
VSSQ4
F2
VSSQ3
F8
VSSQ2
H2
VDDL
VSSQ1
J1
H8
IC300-*2
EDE1116AEBG-8E-F
DQ0
VREF
G8
J2
DQ1
G2
DQ2
H7
A0
M8
DQ3
H3
A1
M3
DQ4
H1
A2
M7
DQ5
H9
A3
N2
DQ6
F1
A4
N8
DQ7
F9
A5
N3
DQ8
C8
A6
N7
DQ9
C2
A7
P2
DQ10
D7
A8
P8
DQ11
D3
A9
P3
DQ12
D1
A10
M2
DQ13
D9
A11
P7
DQ14
B1
A12
R2
DQ15
B9
BA0
L2
BA1
L3
VDD_5
A1
BA2
L1
VDD_4
E1
VDD_3
J9
VDD_2
CK
M9
J8
CK
VDD_1
K8
R1
CKE
K2
VDDQ_10
ODT
A9
K9
VDDQ_9
CS
C1
L8
RAS
VDDQ_8
ELPIDA 1G
K7
C3
VDDQ_7
CAS
C7
L7
VDDQ_6
WE
C9
K3
VDDQ_5
E9
VDDQ_4
G1
LDQS
F7
VDDQ_3
G3
UDQS
B7
VDDQ_2
G7
VDDQ_1
G9
LDM
F3
UDM
B3
VSS_5
A3
LDQS
VSS_4
E8
E3
VSS_3
UDQS
J3
A8
VSS_2
N1
VSS_1
P9
NC_5
R3
NC_6
R7
VSSQ_10
B2
NC_1
A2
VSSQ_9
B8
NC_2
E2
VSSQ_8
A7
NC_3
R8
VSSQ_7
D2
VSSQ_6
D8
VSSQ_5
VSSDL
E7
J7
VSSQ_4
F2
VSSQ_3
F8
VSSQ_2
H2
VSSQ_1
VDDL
H8
J1
IC300-*3
K4T1G164QE-HCE7
DQ0
VREF
G8
J2
DQ1
G2
DQ2
H7
A0
M8
DQ3
H3
A1
M3
DQ4
H1
A2
M7
DQ5
H9
A3
N2
DQ6
F1
A4
N8
DQ7
F9
A5
N3
DQ8
C8
A6
N7
DQ9
C2
A7
P2
DQ10
D7
A8
P8
DQ11
D3
A9
P3
DQ12
D1
A10/AP
M2
DQ13
D9
A11
P7
DQ14
B1
A12
R2
DQ15
B9
BA0
L2
BA1
L3
VDD_5
A1
BA2
L1
VDD_4
E1
VDD_3
J9
VDD_2
CK
M9
J8
VDD_1
CK
R1
K8
CKE
K2
VDDQ_10
ODT
A9
K9
VDDQ_9
CS
C1
L8
VDDQ_8
RAS
SS 1G
C3
K7
VDDQ_7
CAS
C7
L7
VDDQ_6
WE
C9
K3
VDDQ_5
E9
VDDQ_4
G1
LDQS
F7
VDDQ_3
G3
UDQS
B7
VDDQ_2
G7
VDDQ_1
G9
LDM
F3
UDM
B3
VSS_5
A3
VSS_4
LDQS
E3
E8
VSS_3
UDQS
J3
A8
VSS_2
N1
VSS_1
P9
NC_5
R3
NC_6
R7
VSSQ_10
B2
NC_1
A2
VSSQ_9
B8
NC_2
E2
VSSQ_8
A7
NC_3
R8
VSSQ_7
D2
VSSQ_6
D8
VSSQ_5
E7
VSSDL
J7
VSSQ_4
F2
VSSQ_3
F8
VSSQ_2
H2
VDDL
VSSQ_1
J1
H8
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10/AP
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
BA2
L1
CK
J8
CK
K8
CKE
K2
ODT
K9
CS
L8
RAS
K7
CAS
L7
WE
K3
LDQS
F7
UDQS
B7
LDM
F3
UDM
B3
LDQS
E8
UDQS
A8
NC4
R3
NC5
R7
NC1
A2
NC2
E2
NC3
R8
VSSDL
J7
VDDL
J1
1000pF
C301
C300
56
56
R30356 R30456 R30556
R30622
R30722
R30856
R30956
R31056 R31156 R31256
R31356
R31556 R31656
R31756 R31856
SDDR_D[11] SDDR_D[12] SDDR_D[9] SDDR_D[14]
SDDR_D[4] SDDR_D[3] SDDR_D[1] SDDR_D[6]
SDDR_D[15] SDDR_D[8] SDDR_D[10] SDDR_D[13]
SDDR_D[7] SDDR_D[0] SDDR_D[2] SDDR_D[5]
AR300
AR301
AR302
SDDR_A[5] ADDR2_A[5] SDDR_A[3]
SDDR_A[0-12]
R300
150
READY
+1.8V_S_DDR
SDDR_ODT
SDDR_A[1] SDDR_A[10]
SDDR_A[9] SDDR_A[12] SDDR_A[7]
SDDR_A[0] SDDR_A[2] SDDR_A[4] SDDR_A[6] SDDR_A[11] SDDR_A[8]
SDDR_A[0] SDDR_A[1] SDDR_A[2] SDDR_A[3] SDDR_A[4] SDDR_A[5] SDDR_A[6] SDDR_A[7] SDDR_A[8]
SDDR_A[9] SDDR_A[10] SDDR_A[11] SDDR_A[12]
SDDR_BA[0] SDDR_BA[1]
SDDR_BA[2] R351 0
READY
SDDR_CK
/SDDR_CK
SDDR_CKE ADDR2_CKE
READY R346 4.7K
READY
R347 4.7K
/SDDR_RAS /SDDR_CAS
/SDDR_WE
SDDR_DQS0_P SDDR_DQS1_P
SDDR_DQM0_P SDDR_DQM1_P
SDDR_DQS0_N SDDR_DQS1_N
+1.8V_S_DDR
56
R319
R320 56
AR306
AR308
56
56
AR307
56
AR309
ADDR2_A[3] ADDR2_A[1]
ADDR2_A[10]
ADDR2_A[9]
ADDR2_A[12]
ADDR2_A[7] ADDR2_A[0]
ADDR2_A[2] ADDR2_A[4] ADDR2_A[6] ADDR2_A[11] ADDR2_A[8]
ADDR2_BA[0] ADDR2_BA[1] ADDR2_BA[2]
ADDR2_MCLK
/ADDR2_MCLK
ADDR2_ODT
/ADDR2_RAS /ADDR2_CAS
/ADDR2_WE
ADDR2_DQS0_P ADDR2_DQS1_P
ADDR2_DQM0_P ADDR2_DQM1_P
ADDR2_DQS0_N ADDR2_DQS1_N
ADDR2_D[11] ADDR2_D[12]
ADDR2_D[9]
ADDR2_D[14]
ADDR2_D[4] ADDR2_D[3] ADDR2_D[1] ADDR2_D[6]
56
ADDR2_D[15]
ADDR2_D[8] ADDR2_D[10] ADDR2_D[13]
ADDR2_D[7]
ADDR2_D[0]
ADDR2_D[2]
ADDR2_D[5]
56
+1.8V_S_DDR
R321
R322
1K 1%
ADDR2_A[0-12]
ADDR2_D[0-15]
1K 1%
0.1uF
C309
1000pF
LGE3369A (Saturn6 Non RM)
C311
D15
A_MVREF
C13
ADDR2_A[0] ADDR2_A[1] ADDR2_A[2] ADDR2_A[3] ADDR2_A[4] ADDR2_A[5] ADDR2_A[6] ADDR2_A[7] ADDR2_A[8] ADDR2_A[9] ADDR2_A[10] ADDR2_A[11] ADDR2_A[12]
ADDR2_D[0] ADDR2_D[1] ADDR2_D[2] ADDR2_D[3] ADDR2_D[4] ADDR2_D[5] ADDR2_D[6] ADDR2_D[7] ADDR2_D[8] ADDR2_D[9] ADDR2_D[10] ADDR2_D[11] ADDR2_D[12] ADDR2_D[13] ADDR2_D[14] ADDR2_D[15]
A22 B13 C22 A13 A23 C12 B23 B12 C23 B22 A12 A24
C24 B24 D24 B14
A14 D23
D14
D13 D12 D22
B18 C17
C18 A19
A18 B17
B15 A21 A15 B21 C21 C14 C20 C15 C16 C19 B16 B20 A20 A16 B19 A17
A_DDR2_A0 A_DDR2_A1 A_DDR2_A2 A_DDR2_A3 A_DDR2_A4 A_DDR2_A5 A_DDR2_A6 A_DDR2_A7 A_DDR2_A8 A_DDR2_A9 A_DDR2_A10 A_DDR2_A11 A_DDR2_A12
A_DDR2_BA0 A_DDR2_BA1 A_DDR2_BA2 A_DDR2_MCLK
/A_DDR2_MCLK A_DDR2_CKE
A_DDR2_ODT
/A_DDR2_RAS /A_DDR2_CAS /A_DDR2_WE
A_DDR2_DQS0 A_DDR2_DQS1
A_DDR2_DQM0 A_DDR2_DQM1
A_DDR2_DQSB0 A_DDR2_DQSB1
A_DDR2_DQ0 A_DDR2_DQ1 A_DDR2_DQ2 A_DDR2_DQ3 A_DDR2_DQ4 A_DDR2_DQ5 A_DDR2_DQ6 A_DDR2_DQ7 A_DDR2_DQ8 A_DDR2_DQ9 A_DDR2_DQ10 A_DDR2_DQ11 A_DDR2_DQ12 A_DDR2_DQ13 A_DDR2_DQ14 A_DDR2_DQ15
IC100
B_DDR2_A0 B_DDR2_A1 B_DDR2_A2 B_DDR2_A3 B_DDR2_A4 B_DDR2_A5 B_DDR2_A6 B_DDR2_A7 B_DDR2_A8
B_DDR2_A9 B_DDR2_A10 B_DDR2_A11 B_DDR2_A12
B_DDR2_BA0 B_DDR2_BA1 B_DDR2_BA2
B_DDR2_MCLK
/B_DDR2_MCLK
B_DDR2_CKE
B_DDR2_ODT
/B_DDR2_RAS /B_DDR2_CAS
/B_DDR2_WE
B_DDR2_DQS0 B_DDR2_DQS1
B_DDR2_DQM0 B_DDR2_DQM1
B_DDR2_DQSB0 B_DDR2_DQSB1
B_DDR2_DQ0 B_DDR2_DQ1 B_DDR2_DQ2 B_DDR2_DQ3 B_DDR2_DQ4 B_DDR2_DQ5 B_DDR2_DQ6 B_DDR2_DQ7 B_DDR2_DQ8 B_DDR2_DQ9
B_DDR2_DQ10 B_DDR2_DQ11 B_DDR2_DQ12 B_DDR2_DQ13 B_DDR2_DQ14 B_DDR2_DQ15
T26 AF26 T25 AF23 T24 AE23 R26 AD22 R25 AC22 AD23 R24 AE22
AC23 AC24 AB22 V25
V24 AB23
U26
U25 U24 AB24
AB26 AA26
AC25 AC26
AB25 AA25
W25 AE26 W24 AF24 AF25 V26 AE25 W26 Y26 AD25 Y25 AE24 AD26 Y24 AD24 AA24
BDDR2_A[0] BDDR2_A[1] BDDR2_A[2] BDDR2_A[3] BDDR2_A[4] BDDR2_A[5] BDDR2_A[6] BDDR2_A[7] BDDR2_A[8]
BDDR2_A[9] BDDR2_A[10] BDDR2_A[11] BDDR2_A[12]
BDDR2_D[0]
BDDR2_D[1]
BDDR2_D[2]
BDDR2_D[3]
BDDR2_D[4]
BDDR2_D[5]
BDDR2_D[6]
BDDR2_D[7]
BDDR2_D[8]
BDDR2_D[9] BDDR2_D[10] BDDR2_D[11] BDDR2_D[12] BDDR2_D[13] BDDR2_D[14] BDDR2_D[15]
BDDR2_A[9] BDDR2_A[3] BDDR2_A[1] BDDR2_A[10]
BDDR2_A[5] BDDR2_A[12] BDDR2_A[7] TDDR_A[7]
BDDR2_A[0] BDDR2_A[2] BDDR2_A[4]
BDDR2_A[0-12]
BDDR2_A[6] BDDR2_A[11] BDDR2_A[8]
R325 56
R326 56
BDDR2_BA[1]
BDDR2_MCLK
/BDDR2_MCLK
BDDR2_CKE
BDDR2_ODT
/BDDR2_RAS /BDDR2_CAS
/BDDR2_WE
BDDR2_DQS0_P BDDR2_DQS1_P
BDDR2_DQM0_P BDDR2_DQM1_P
BDDR2_DQS0_N BDDR2_DQS1_N
BDDR2_D[11] BDDR2_D[12] BDDR2_D[9]
BDDR2_D[0-15]
BDDR2_D[14] BDDR2_D[4]
BDDR2_D[3] BDDR2_D[1] BDDR2_D[6]
BDDR2_D[15] BDDR2_D[8] BDDR2_D[10] BDDR2_D[13]
BDDR2_D[7] BDDR2_D[0] BDDR2_D[2] BDDR2_D[5]
AR311
AR313
AR304
AR310
56
AR312
56
AR303
56
AR305
56
56
56
56
R327 56 R328 56
R330 22
R331 22
R332 56
+1.8V_S_DDR
R333 56
R334 56
R335 56 R336 56
R337 56 R338 56R31456
R339 56 R340 56
R341 56 R342 56
TDDR_D[11] TDDR_D[12]
TDDR_D[9]
TDDR_D[14]
TDDR_D[4] TDDR_D[3] TDDR_D[1] TDDR_D[6]
TDDR_D[15]
TDDR_D[8] TDDR_D[10] TDDR_D[13]
TDDR_D[7]
TDDR_D[0]
TDDR_D[2]
TDDR_D[5]
TDDR_A[9] TDDR_A[3] TDDR_A[1]
TDDR_A[5] TDDR_A[12]
TDDR_A[0] TDDR_A[2] TDDR_A[4] TDDR_A[6] TDDR_A[11] TDDR_A[8]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR2
MSD3368EV Platform
DDR2 3 10
Page 28
DVB-CI SLOT
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
+5V_CI_ON
CI_DATA[0-7]
/CI_CD1
CI_TS_DATA[4] CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7]
CI_IORD CI_IOWR
CI_MDI[0] CI_MDI[1] CI_MDI[2] CI_MDI[3]
CI_MDI[4] CI_MDI[5] CI_MDI[6] CI_MDI[7]
PCM_RST
/PCM_WAIT
CI_TS_CLK CI_TS_VAL CI_TS_SYN
CI_TS_DATA[0] CI_TS_DATA[1] CI_TS_DATA[2]
CI_TS_DATA[3]
BUF_TS_SYN
BUF_TS_VAL_ERR
BUF_TS_CLK
+5V
R505
10K
C501
0.1uF 16V
GND
R507
R509
R508
10K
C503
R510
C502
0.1uF 16V
R511 100
10K
0.1uF
10K
100
AR500
33
R503
AR504
47
AR503
R529 33
47
33
33
+5V
R506
10K
R500
REG
/CI_CD2
C505 10uF
6.3V
100
R513
READY
READY
R512 100
GND
EAG41860102
10067972-000LF
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
65 66 67 68
2
GND
P500
CI_DATA[0-7]
CI_DATA[3]
R516
C508
0.1uF
47
100
GND
CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7]
CI_DATA[0] CI_DATA[1] CI_DATA[2]
R517
10K
CI_ADDR[10]
CI_ADDR[11]
CI_ADDR[9]
CI_ADDR[8] CI_ADDR[13] CI_ADDR[14]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]
/PCM_CE
CI_OE
CI_WE
GND
CI_ADDR[0-14]
+5V
R518
10K
C509
0.1uF 16V
/PCM_IRQA
3 4 5 6 7 8
9 10 11 12 13 14 15 16 17
R514
18 19 20 21 22 23 24 25 2660 2761 2862 2963 3064 31 32 33 34
G1G2
1
69
READY
R515
0
GND
DVB-CI TS INPUT
CI_MDI[7] CI_MDI[6] CI_MDI[5] CI_MDI[4]
CI_MDI[3] CI_MDI[2] CI_MDI[1] CI_MDI[0]
DVB-CI HOST I/F
PCM_A[0]
CI_ADDR[7]
PCM_A[1]
CI_ADDR[6]
PCM_A[2]
CI_ADDR[5]
PCM_A[3]
CI_ADDR[4]
33
33
/PCM_CD
CI_EN
AR506
AR507
FE_TS_DATA[7] FE_TS_DATA[6] FE_TS_DATA[5] FE_TS_DATA[4]
FE_TS_DATA[3] FE_TS_DATA[2] FE_TS_DATA[1] FE_TS_DATA[0]
R530 0
IC501
1OE
1
1A1
2
2Y4
3
1A2
4
2Y3
5
1A3
6
2Y2
7
1A4
8
2Y1
9
GND
10
FE_TS_DATA[0-7]
FE_TS_DATA[0-7]
TOSHIBA
0ITO742440D
AR514
TC74LCX244FT
READY
AR515
+3.3V_CI
C511
VCC
20
2OE
19
1Y1
18
2A4
17
1Y2
16
2A3
15
1Y3
14
2A2
13
1Y4
12
2A1
11
0.1uF 16V
CI_ADDR[0]
PCM_A[7]
CI_ADDR[1]
PCM_A[6]
CI_ADDR[2]
PCM_A[5]
CI_ADDR[3]
PCM_A[4]
DVB-CI DETECT
/CI_CD2
/CI_CD1
CI POWER ENABLE CONTROL
+5V_CI
0.1uF
C500
16V
PCM_5V_CTL
R501
10K
R502 10K
READY
IC500
KIC7SZ32FU
1IN_B 5 VCC
2IN_A
3GND
R504
B
22K
C
Q500 2SC3052
E
4 OUT_Y
Q501
RSR025P03
S
D
G
+3.3V_CI
16V
0.1uF
C51 0
GND
MLB-201209-0120P-N2
R519
47
C504
0.1uF 16V READY
L500
+3.3V_CI
C506 10uF 16V
10K
R520
+5V_CI_ON
R521
47
C507
0.1uF 16V
READY
DVB-CI SERIAL BUFFER TS
+3.3V_CI
CI_DATA[0] CI_DATA[1] CI_DATA[2]
IC502
74LVC541A(PW)
OE1
R522 10K
R523 10K
GND
1
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
10
CI_EN
FE_TS_CLK
/PCM_CD
33K
R524
FE_TS_VAL_ERR
FE_TS_SYN
FE_TS_SERIAL
BUFFER
VCC
20
OE2
19
Y0
18
Y1
R525
0
17
16
15
14
13
12
11
READY
Y2
Y3
Y4
Y5
Y6
Y7
AR513
33
C512
0.1uF
BUF_TS_CLK BUF_TS_VAL_ERR
BUF_TS_SYN BUF_TS_DATA[0]
CI_DATA[0-7]
CI_DATA[3] PCM_D[3]
CI_DATA[4]
CI_DATA[0-7]
CI_DATA[5] CI_DATA[6] CI_DATA[7]
CI_ADDR[8]
CI_ADDR[9] CI_ADDR[10] CI_ADDR[11]
CI_ADDR[12] CI_ADDR[13] CI_ADDR[14]
REG
CI_OE
CI_WE CI_IORD CI_IOWR
AR508
R527 33
AR509
AR510
33
AR511
33
R528 33
AR512
PCM_D[0]
33
PCM_D[1] PCM_D[2]
PCM_D[4]
33
PCM_D[5] PCM_D[6] PCM_D[7]
33
PCM_A[8] PCM_A[9]
PCM_A[10] PCM_A[11]
PCM_A[12] PCM_A[13] PCM_A[14]
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_IORD
/PCM_IOWR
PCM_D[0-7]
PCM_D[0-7]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DVB-CI SLOT
MSD3368EV Platform
CI
4 10
Page 29
20
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
20
REAR_H
EAG59023302
5V_HDMI1
R612 0
19
18
17
16
15
14
13
12
11
CK+
10
D0-
9
D0_GND
8
D0+
7
D1-
6
D1_GND
5
D1+
4
D2-
3
D2_GND
2
D2+
1
R6001KREADY
C600
0.1uF 16V
READY
R615 1K
HPD1
DDC_SDA_1
DDC_SCL_1
CEC_REMOTE
CK-_HDMI1
CK+_HDMI1
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
D1+_HDMI1
D2-_HDMI1
D2+_HDMI1
IC600
AT24C02BN-10SU-1.8
A0
1
A1
2
REAR_H
A2
3
GND
4
5V_HDMI1
VCC
8
WP
7
SCL
6
SDA
5
R623 22
R621 22
C603
0.1uF R626
18K
+5V_ST
A1CA2 ENKMC2838-T112 D600
R629 18K
DDC_SCL_1
DDC_SDA_1
5V_HDMI1
R664
10K
R665
33K
5V_HDMI_1
5V_HDMI2
R660
10K
R661
33K
5V_HDMI_2
5V_HDMI3
R662
10K
R663
33K
5V_HDMI_3
JK600
20
20
EAG59023301
JK601
SIDE HDMI
JACK_GND
20
19
18
17
16
15
14
13
SIDE_H
12
11 10
9
8
EAG42463001
7
6
5
4
3
2
1
19
18
17
16
15
14
13
12
11 10
9
8
7
6
5
4
3
2
1
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
CK+
D0-
D0_GND
D0+
D1-
D1_GND
D1+
D2-
D2_GND
D2+
GND
GND
5V_HDMI2
R6011KREADY
5V_HDMI3
R6311KREADY
UI_HW_PORT1
C601
0.1uF 16V
UI_HW_PORT2
C605
0.1uF 16V
R613 0
R636 0
READY
READY
R616 1K
R638
1K
HPD2
DDC_SDA_2
DDC_SCL_2
CEC_REMOTE
CK-_HDMI2
CK+_HDMI2
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
HPD3
DDC_SDA_3
DDC_SCL_3
CEC_REMOTE
CK-_HDMI3
CK+_HDMI3
D0-_HDMI3
D0+_HDMI3
D1-_HDMI3
D1+_HDMI3
D2-_HDMI3
D2+_HDMI3
5V_HDMI2
+5V_ST
IC602
AT24C02BN-10SU-1.8
A0
1
A1
2
A2
3
GND
4
GND
AT24C02BN-10SU-1.8
A0
1
A1
2
SIDE_H
A2
3
GND
4
GND
IC603
VCC
8
WP
7
SCL
6
SDA
5
VCC
8
WP
7
SCL
6
SDA
5
R645 22
R642 22
R643 22
R644 22
C607
0.1uF
C608
0.1uF
R646
18K
5V_HDMI3
R648
18K
A1CA2 ENKMC2838-T112 D602
R649 18K
+5V_ST
A1CA2
ENKMC2838-T112 D603
R650 18K
DDC_SCL_2
DDC_SDA_2
DDC_SCL_3
DDC_SDA_3
R624
READY
R632 330K
0
D604
READY
D605
30V
BSS83
Q600
READY
+3.3V_HDMI_ST
MMBD301LT1G
S
G
R659 0
B D
READY
R637
27K
HDMI_CECCEC_REMOTE
JK603
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI
UI_HW_PORT3
MSD3368EV Platform
HDMI
5 10
Page 30
AMP_MUTE
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
R716
10K
AUDIO_MASTER_CLK
+3.3V
AC_DET
R725
10K
C
B
Q701
2SC3052
E
Separate DGND AND AVSS
R712
1K
R710
0
READY
R711
33K
MS_LRCK
MS_SCK
MS_LRCH
SDA1 SCL1
AMP_RST
R717 0
+3.3V_AVDD_AMP
C723 10uF 16V
AVSS
C712 1000pF 50V
C718
0.1uF
C728
0.1uF
R702 22
R706 22
R703 22
R708 22
This parts are Located on AVSS area.
AVSS
R713 200
18K R714
1%
C722
4.7uF 10V
C702
4700pF
C736
R718
0.047uF
AVDD
TESTOUT
MCLK
OSC_RES
DVSS_1 VR_DIG
PDN
LRCLK
SCLK SDIN
SDA SCL
+3.3V_DVDD
C711 10uF 16V
Audio Amp
AVSS
+3.3V
L702
120-ohm
L701
120-ohm
SPK_L+
SPK_L-
SPK_R+
SPK_R-
+3.3V_AVDD_AMP
+3.3V_DVDD
WAFER-ANGLE
4
3
2
1
P700
R715
470
AVSS
4700pF
VR_ANA
PLL_FLTP
12
C713
PLL_FLTM
11
470
13
C720
AVSS
10
0.047uF
22K
R707
OC_ADJ
7
8NC9
C730 2200pF
SSTIMER
14 15 16 17 18 19 20
TAS5709PHPR
IC701
21 22 23 24
25
27
28
29
30
GND
RESET26STEST
C709 1000pF
C707
0.1uF
DVDD
DVSS_2
AGND31VREG
C737
0.1uF
1uF
0.033uF
C70 3
BST_A
GVDD_OUT_1
PVDD_A_2
4
5
6
32
33
BST_D
PVDD_D_135PVDD_D_2
GVDD_OUT_2
C708
1uF
C738
C733
50V
PVDD_A_1
3
34
0.033uF 50V
2
C714
0.1uF
OUT_A
1 48 PGND_AB_2
47 PGND_AB_1 46 OUT_B 45 PVDD_B_2 44 PVDD_B_1 43 BST_B 42 BST_C 41 PVDD_C_2 40 PVDD_C_1 39 OUT_C 38 PGND_CD_2 37 PGND_CD_1
36
OUT_D
C735
0.1uF
C719
0.1uF
P_17V
C706
0.1uF
P_17V
C721 330uF 25V
C729
50V
0.033uF
C775 330uF 25V
P_17V
C732
0.01uF
2S
1S 1F
50V
0.033uF C701
2S
1S 1F
L705 AD-9060
2F
T-AD_9060
DEV
L704 AD-9060
2F
T-AD_9060
DEV
C740
0.68uF
C739
0.68uF
C704
0.1uF
C726
0.1uF
C717
0.1uF
C710
0.1uF
C725
0.01uF
R704
3.3 R705
3.3 C727
0.01uF
C734
0.01uF
R709
3.3 R719
3.3 C715
0.01uF
@netLa
@netLa
SPK_L+
SPK_L-
SPK_R+
SPK_R-
TV_L/ROUT MNT/DTV OUT
MUTE Ctrl
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
AUDIO
TV_LOUT
TV_ROUT
DTV/MNT_LOUT
DTV/MNT_ROUT
Q703
2SC3052
Q704
2SC3052
Q711
2SC3052
Q710
2SC3052
R794
2K
1/16W 5%
5%
1/16W
R701 2K
R798
2K
1/16W 5%
5%
R797
1/16W
Audio Out Amp
IC702
LM324D
R787
5.6K
R786
5.6K
10uF C778
10uF C777
R729 2K
16V
R726 2K
16V
DTV/MNT_ROUT
SC2_Rout
SC2_Lout
DTV/MNT_LOUT
R728
Q706
RT1P141C-T112
3
1
2
RT1P141C-T112
Q709
3
1
2
2K
C762
0.1uF
C773
0.1uF
SCART1_MUTE
SCART2_MUTE
C774
0.1uF 50V
TV_LOUT
P_17V
SC1_Lout
SC1_Rout
TV_ROUT
2K
R727 2K
C779 10uF
C776 10uF
16V
R780
5.6K
R781
5.6K
16V
C770
33pF
C769
33pF
R785 33K
R779 33K
R783
R784
1
1
2
2
3
10K
10K
3
4
4
5
5
6
6
7
7
14
14
13
13
12
12
11
11
10
10
9
9
8
8
R791
R789
R790 33K
10K
C772
33pF
R782 33K
10K
C771
33pF
MSD3368EV Platform
AUDIO 6 10
Page 31
RL_ON/PWR_ONOFF
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
MODULE_ON
+5V_ST
R837
2K
+5V_ST
R838 10K READY
R801 100
R803
C805
0.1uF 16V
100
Stand-by +3.3V
+5V_ST
IC802
AP2121N-3.3TRE1
VIN
3
C803
C802
0.1uF
10uF
16V
16V
1
C807
0.1uF 16V
GND
P800 SMAW200-H18S1
1 3 5 7 9 11 13 15 17
2 4 6
8 10 12 14 16 18
L801
MLB-201209-0120P-N2
L800
MLB-201209-0120P-N2
L821
MLB-201209-0120P-N2
C813 10uF
C837 10uF 16V
C817 100uF 25V READY
P_17V
C818
0.1uF 50V
C804 470uF 16V
16V
0.1uF
C809 16V
0.1uF READY
C812
C820
0.1uF 16V
C835 100uF 16V
P_+5V
C890 10uF
6.3V
PSU_ERR_DET
AC_DET
READY
C834
0.1uF
+5V_ST
C839 10uF
6.3V READY
RL_ON/PWR_ONOFF
+5V
R856
READY
R828 120K READY
+5V_ST
10K
R829 10K
R834
Q803
2SC3052
R835
B
+5V_ST
10K
C862 10uF
C867 10uF
+5V
C865
C857
0.1uF
220uF 16V
16V
+5V_GENERAL
C866
C858
0.1uF 220uF
16V
16V
+5V_CI
C869
C859
0.1uF
16V
47uF
16V
16V
P_+5V
C854
0.1uF
Q806
SI4925BDY
1S1
8 D1_2
2G1
7 D1_1
3S2
560
C
E
6 D2_2
4G2
5 D2_1
L817
L808
L818
C864 10uF
C833 10uF
16V
16V
19
+3.3V_TU
L806
MLB-201209-0120P-N2
C826
C885
0.1uF 16V
+3.3V_CI
C852
0.1uF 16V
650 mA
40 mA
C897
220uF 16V
C828 68uF 10V
GND
C844
0.1uF
+3.3V
C891 10uF
6.3V READY
0.1uF
L814
0 R862
GND
16V
GND
C850 10uF
6.3V
+5V
IC804
AZ1085S-3.3TR/E1
INPUT
+3.3V_ST
+3.3V_ST
R866
C892 10uF
6.3V READY
0
C808
0.1uF 16V
VOUT
2
C806 10uF
16V
R859 0
R858 0
+3.3V_AVDD_MPLL
C815
0.1uF 16V
+3.3V_HDMI_ST
C816
0.1uF 16V
C829 10uF 16V
C831
0.1uF
3
$0.122
1
GND
2
ADJ/GND
MAX 3A
OUTPUT
MLB-201209-0120P-N2
C842 100uF 16V
C878 10uF
6.3V
+3.3V
+3.3V_AVDD
+5V
IC801
AP1117E33G-13
ADJ/GND
3IN1
2
C801
0.1uF 16V
OUT
C800 10uF 16V
+1.8V_DDR
IC800
AZ1085S-ADJTR/E1
3
1
R860331%
2
ADJ/GND
OUTPUT
R861 75
1%
C883
0.1uF 16V
INPUT
C888 10uF
6.3V
C893 10uF
6.3V
320 mA
+3.3V_AVDD
450 mA
+1.8V_DDR
C880 10uF
6.3V
READY
10uF
C810
R865
0
READY
R864
0
C811
0.1uF 16V
C877
0.1uF 16V
+3.3V_AVDD
C841
100uF
16V
C814
0.1uF 16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
POWER
IC803
AP1117E18G-13
3IN1
2
OUT
ADJ/GND
L805
50 mA
C822 10uF
6.3V READY
C889 10uF
6.3V
C827
0.1uF 16V READY
+1.8V_TU
C824
0.1uF 16V
C825
100uF 16V
S6 core 1.26 volt
MLB-201209-0120P-N2
Placed on SMD-TOP
C838 10uF
+5V_GENERAL
465 mA @85% efficiency
L802
R2 = R1/(Vout/0.8-1)
READY
100pF
C870
C898 10uF
R824
50V
360K
1%
R825 620K
1%
R1
FB
R2
GND
IN
BS
Replaced Part
READY
R827
10K
IC805
MP2212DN
1
2
3
4
R830
10
1%
8
7
6
5
EN/SYNC
SW_2
SW_1
VCC
P_+5V
C836 1uF
10V
R831
10K
NR8040T3R6N
C830 10nF 50V
MAX 3A
C899
READY
0.1uF 16V
L813
3.6uH
C843 10uF
6.3V
C OUT
1600 mA
R802 0
C894
10uF
6.3V
1/4W
MSD3368EV Platform
POWER
+1.26V_VDDC
TP1451
C856
0.1uF
C896 10uF
6.3V READY
7 10
Page 32
DEV
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
SC_ID
L_OUT
R_IN
R_OUT
JK900
Full SCART 1
SHIELD
23
22 AV_DET
21
COM_GND
20
SYNC_IN
19
SYNC_OUT
18
SYNC_GND2
17
SYNC_GND1
16 RGB_IO
15
R_OUT
14
RGB_GND
13
R_GND
12
D2B_OUT
11
G_OUT
.
10
.
9
8
B
7
6
LIN
5
GND
4
GND
3
2
1
D904 30V
READY
D903 30V
READY
D902 30V
READY
D901 30V
READY
D906 30V
READY
D907
5.6V
D908
5.6V
D915
30V
READY
R900
470K
R903 75
R902 75
R901 470K
R904 75
R905 0
C900 OPT
C901 OPT
C902
330pF
50V
R907 75
C903 330pF 50V
R908 75
R906 10K
GND
R911 10K
R913 75
R909
12K
TP1466 TP1467
R910 12K
R912
470K
C904 47pF 50V
SC1_R
SC1_G
SC1_B
SC1_LIN
SC1_RIN
30V
READY
R914 22
D916
R915
0
C907 100uF
16V
D917
30V
READY
+3.3V_AVDD
C908 220pF 50V
READY
R916 62K
C909
0.1uF 16V
R918
10K
R919
1K
R917 11K
SC1_DET
SC1_CVBS_IN
FE_VOUT
SC1_FB
SC1_ID
DEV
SC2_ID
L_IN
L_OUT
R_IN
R_OUT
JK903
SHIELD
23
22 AV_DET
21
COM_GND
20
SYNC_IN
19
SYNC_OUT
18
SYNC_GND2
17
SYNC_GND1
16 RGB_IO
15
14
RGB_GND
13
12
D2B_OUT
11
.
10
.
.
GND
GND
R_OUT
R_GND
G_OUT
9
8
7
6
5
4
3
2
1
Half SCART 2
D918
30V
READY
C933
0.1uF 50V
Q905
2SC3052
READY
D929
30V
READY
R928 75
R929 470K
D928
5.6V
D927
5.6V
C921 47uF 25V
C917 47uF 25V
D930
30V
READY
R927
470K
R926 470K
C923
0.1uF 16V
P_17V
L900
MLB-201209-0120P-N2
C
R989 330
B
READY
R987
E
READY
R981
330
C915 OPT
C914 OPT
2SA1504S
0
R939 75
Q903
C920 330pF 50V
C919 330pF
50V
+3.3V_AVDD
E
C
B
2SC3052
R984
390
R941 10K
R940 10K
R949
10K
C922 47pF 50V
Q904
R943
12K
12K
R948
R942
R945 0
SC2_DET
1K
SC2_CVBS_IN C924 220pF 50V
READY
470
R990
C
B
47K
R982
C928 10uF 16V
DTV/MNT_VOUT
E
R946 62K
15K
D935
KDS184
C
R985
A2
A1
R947 11K
REC_8
SC2_ID
R988
120
SC2_LIN
SC2_RIN
[SCART2 PIN 8]
SC_RE1
SC_RE2
R965
4.7K
R967 1K
R966 1K
P_17V
R969
3K
R968 10K
R972
12K
C
Q901
B
2SC3052
E
C
Q900
B
2SC3052
E
C
Q902
B
2SC3052
E
REC_8
R996 1K
D905
5.6V
READY
R993 1K
D900
5.6V
READY
COMPONENT
JK901
PPJ234-01
Pr
Pb
C932 6800pF 50V
C929 6800pF 50V
R
L
Y
[RD]E-LUG
6E
[RD]O-SPRING_2
5E
[RD]CONTACT
4E
[WH]O-SPRING
5D
[RD]O-SPRING_1
5C
[RD]E-LUG-S
7C
[BL]O-SPRING
5B
[BL]E-LUG-S
7B
[GN]CONTACT
4A
[GN]O-SPRING
5A
[GN]E-LUG
6A
GND
R980 470K READY
R976 470K READY
TV_LOUT
TV_ROUT
D913 D914
D912
D911D910D909
30V
R951
R950
470K
470K
C906 1000pF 50V
C905 1000pF 50V
+3.3V_AVDD
R952
10K
R954 10K
R953 10K
R961
R960
R959
R958
R956
R994 1K
D920
5.6V
READY
D926
5.6V
READY
R995 1K
C931 6800pF 50V
C930 6800pF 50V
R978 470K
READY
R979 470K READY
SIDE CVBS
COMP_RIN
12K
COMP_LIN
12K
COMP_Pr
1%
75
COMP_Pb
1%
75
R957 0
1%
75
R955 1K
READY
C910
4.7pF
COMP_Y
COMP_DET
NON_20TOOL
PPJ235-01
JK902
5A
[YL]E-LUG
4A
[YL]O-SPRING
3A
[YL]CONTACT
4B
[WH]O-SPRING
3C
[RD]CONTACT
4C
[RD]O-SPRING
5C
[RD]E-LUG
+3.3V_AVDD
R963
10K
30V
D919
D922
D921
R938 0
D931
C911
0.1uF 16V
470 K
R92 3
C912 100pF
470 K
R92 2
30V
C913 100pF
R933 10K
R930 10K
R973 1K
12K
12K
R937
R931
75
R932
SIDE_CVBS_IN
C916 47pF 50V
SIDE_CVBS_DET
SIDE_LIN
SIDE_RIN
DTV/MNT_LOUT
DTV/MNT_ROUT
USB
1234
USB DO WN STR EA M
JK905
KJA-UB-4-0004
5
SPDIF OPTIC JACK
SPDIF_OUT
B
GND
D932 CDS3C05HDMI1
5.6V
IC901
NL17SZ00DFT2G
1A5
2
READY
4
3
C934
CDS3C05HDMI1
VCC
R998 100
Y
READY R997 0
470uF 16V
D933
5.6V
OUT_2
OUT_1
NC
FLG
IC900
AP2181SG-XX
8
7
DEV
6
5
READY
GND
1
IN_1
2
IN_2
3
EN
4
USB_DM
USB_DP
+5V_GENERAL
R964 1K
READY
D934
+3.3V_CI
R991
10K
R999
10K
+5V_GENERAL
C926
0.1uF 50V
R992
P_+5V
IC902
NL17SZ08DFT2G
L901
C927
0.1uF
10K
100
R970
VINPUT
READY
R944 0
USB_OCD
JK904
JST1223-001
GND
VCC
15
324
1
2
3
Fib er Opt ic
4
FIX_POLE
USB_CTL AC_DET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MSD3368EV Platform
JACK 108
Page 33
NON_20TOOL
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
JK1001 SPG09-DB-010
6
1
7
2
8
3
9
4
10
5
16
GND
RS232C
SHILED
+5V_VGA
D1007
+3.3V_AVDD
R1014
R1013
C1011
0.1uF 50V
C1030 10pF 50V READY
D1008
R1016
10K
30V
D1009
1K
1K
R1012
4.7K
SUB_SCL SUB_SDA
R1018 22
R1017
22
READY
R1015
22
C1015
4.7pF
C1014
4.7pF
C1013
0.1uF 16V
C1012
4.7pF
R1019
1K
C1017
12pF
12pF
C1016
DSUB_R
DDC_SDA/UART_TX
DSUB_G
DSUB_DET
DSUB_B
DSUB_HSYNC
DSUB_VSYNC
DDC_SCL/UART_RX
PC_SER_CLK
PC_SER_DATA
PDP_SCL
DISP_EN
PDP_SDA
RXO0-
RXO0+
RXO1-
RXO1+
RXO2-
RXO2+
RXOCK-
RXOCK+
RXO3-
RXO3+
RXO4-
RXO4+
RXE0-
RXE0+
RXE1-
RXE1+
RXE2-
RXE2+
RXECK-
RXECK+
RXE3-
RXE3+
RXE4-
RXE4+
MOD_ROM_RX
MOD_ROM_TX
R442 27K READY
LVDS FFC WAFER
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
@optio
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TF05-51S
P403
MOD_ROM_TX
PDP_SCL
RXO0-
RXO1-
RXO2-
RXOCK-
RXO3-
PC_SER_CLK
DISP_EN
R404
27K
READY
KEY_BUZZER
0
HD
READY
+5V_VGA+5V_ST
ENKMC2838-T112
A1CA2
R1032 0
R1033 0
C1022
0.1uF
D1012
DDC_SCL/UART_RX
DDC_SDA/UART_TX
ISP_RXD
ISP_TXD
IC1001
AT24C02BN-10SU-1.8
NON_20TOOL
1
2
3
4
8
7
6
5
C1018
18pF
R1029
R1024
4.7K
4.7K
R1023
100
C1021 18pF
50V
50V
PC AUDIO
JK1000
PEJ027-01 NON_20TOOL
P401
SMAW200-H26S1
27
PKM13EPY-4002-B0
100V
BUZZER
10 12 14 16 18 20
1
BUZZER
2
2 4 6 8
BU400
+3.3V
L408
NORMAL
+5V
MOD_ROM_RX
PDP_SDA
RXO0+
RXO1+
RXO2+
RXOCK+
RXO3+
RXO4+RXO4-
PC_SER_DATA
KEY1
KEY2
LED_R
SUB_SCL
SUB_SDA
+3.3V_ST
L406
GLASS
LED_B
IR
+3.3V_ST
R408
R409
10K
10K
+3.3V_ST
1 3 5 7 9 11 13 15 17 19 21 22 23 24
R403100
R402
25 26
LVDS
+3.3V
D1013
1N4148W_DIODES
R1036 22
BUZZER
C
Q1001
B
2SC3052
BUZZER
E
R445 4.7K
R443 4.7K
READY
E_SPRING
3
T_TERMINAL1
6A
B_TERMINAL1
7A
R_SPRING
4
T_SPRING
5
B_TERMINAL2
7B
T_TERMINAL2
6B
SUB Board I/F
L405
MLB-201209-0120P-N2
C407
10pF
L404
MLB-201209-0120P-N2
L403
MLB-201209-0120P-N2
L401
C404
10pF
R1035 22
R1034 22
C1029 10pF
READY
L402
L400
READY
C1026 10pF
READY
C403 680pF
C402 10pF
C401 10pF
MLB-201209-0120P-N2
C1027
10pF
READY
C1028
10pF
READY
MLB-201209-0120P-N2
MLB-201209-0120P-N2
C408 10pF
C405 10pF
C400 10uF
6.3V
D1010
5.6V
D1011
5.6V
C406 10pF
C1025 10uF
6.3V
C1020
100pF
50V
C1019 100pF
50V
R1022 470K
R1021 470K
R1028 10K
R1026 10K
R1027 12K
R1025
12K
P402
12507WS-12L
1
2
3
4
5
6
7
8
9
10
11
12
13
PC_RIN
PC_LIN
D1003
C1001
D1002
0.1uF
RED_GND GND_2
11
RED GREEN_GND DDC_DATA
12
GREEN BLUE_GND H_SYNC
13
BLUE NC V_SYNC
14
GND_1 SYNC_GND DDC_CLOCK
15
DDC_GND
16V
R1007
R1005
75
75
D1004
R1010 75
R1011
4.7K
ROM DOWNLOAD FOR PDP
R1003
PC_SER_CLK
PC_SER_DATA
DBG_TX DBG_RX
C1000 270pF 50V READY
D1014 20TOOL
R1001 10
R1037 10
R1038 10
C1002 220pF 50V READY
C1003 270pF 50V READY
20TOOL
20TOOL
10
D1015 20TOOL
+3.3V_ST
C1004 220pF 50V READY
D1001D1000
9
R1002
R1004
4.7K
4.7K
C1005 220pF 50V
C1006 220pF 50V
JK1002
SPG09-DB-009
C1007
0.1uF 50V
ROU T2
7
10
DOU T28RIN 2
DIN 2
C1008
0.1uF 50V
6V-5
IC1000
MAX3232CDR
11
12
DIN 1
R1006
100
1
C1009
0.1uF 50V
C1-2V+
C2+
C2-
3
4
$0.179
13
14
15
RIN 1
ROU T1
DOU T1
R1008
100
6
7
8
2
3
C1010
0.1uF 50V
C1+
1
GND16VCC
D1005 READY
D1006 READY
9
4
PC_SER_DATA
PC_SER_CLK
C1031 10pF 50V READY
10
5
+3.3V_ST
R1039 0 R1040 0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
MSD3368EV Platform
RGB,RS232,LVDS
9
10
Page 34
/FE_RESET
Copyright © 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
LGE Internal Use Only
(TUNER RESET GPIO OPTION)
XC5000_RESET
+3.3V_TU
READY
R1142
10
10
R1127
TUNER RESET
: ACTIVE LOW (SOFT RESET)
C1141
0.1uF 16V
TU_RESET
0.1uF
0.1uF C1164
16V
C1147
16V
C1159
0.1uF
DVB-CI DETECT
FE_TS_VAL FE_TS_ERR
IN_B
IN_A
GND
IC1100
NL17SZ08DFT2G
1
2
3
+3.3V_TU
VCC
5
OUT_Y
4
C1101
0.1uF 16V
GND
R1110
47
FE_TS_VAL_ERR
D_3.3V
TUNER_SHIELD KCN-ET-5-0094
JK1101
1
2
D1101RCLAMP0502B
C1
A
C2
To separate chassis ground
R1166 0
R1167 0
R1168 0
R1169 0
R1170 0
R1171 0
R1172 0
R1173 0
D1102RCLAMP1521P
READY
C1120 56pF
R1174 0
R1175 0
R1176 0
R1177 0
R1178 0
R1179 0
R1180 0
R1181 0
C1126
2%
L1108
270nH
C1146 120pF
0603CS-R27XGLW
0603CS-6N8XGLW
39pF
50V
C1103
READY
L1111
6.8nH
6.8pF
2%
L1116
0603CS-R39XGLW
+1.8V_TU
R1182 0
R1183 0
R1184 0
R1185 0
C1134 1000pF
C1109 0.1uF
2%
390nH
+3.3V_TU
+1.8V_TU
C1165 0.1uF
820nH
1008CS-821XGLC
C1167 C1158 0.1uF
C1171 0.1uF
L1114
2%
0.1uF
+3.3V_TU
VDDA_1
GND_1
GND_2
EXTCHOKE
GND_3 VDDA_2 VDDA_3 VDDC_1
GND_4 VDDC_2
+1.8V_TU
1%
C11 17 0 .1u F
C11 29 0 .1u F
GND_947VDDC_948VDDA_8
46
15
VAGC
C11 63 0 .1 uF
R1152 4.99K
REXT45VDDA_7
44
IC1104 XC5000
16
17
VIF
SIF
VDDA_5
C11 69 0 .1u F
MLF1608A2R7J
2.7uH 5%
18
GND_5
L1105
C11 56 0 .1 uF
VREF_P42VDDC_743VDDC_8
41
19
20
VDDC_421VDDA_6
C11 24 0 .1u F
C11 15 1 000 pF
1
IN1
2 3
IN2
4 5 6 7 8 9 10 11 12
13
VDDC_314VDDA_4
C11 16 0 .1u F
TU_RESET
C11 48 0 .1u F
RESET38VI2C39VDDC_640VREF_N
37
GND_8
36
SDA
35
SCL
34
VDDD_2
33
EXTREF
32
X1
31
GND_7
30
X2
29
ADDRSEL
28
DDI2
27
VDDC_5
26
DDI1
25
22
23
24
GND_6
VDDD_1
TESTMODE
C11 82 0 .1u F
C11 18 0 .1u F
C1133
0.1uF 16V
R1135 680
C1161
6.8pF 50V
+3.3V_TU
C1121
0.1uF
31.875MHz
C1151
0.1uF
L1101
MLB-201209-0120P-N2
C1119
0.1uF
R1130 1K
R1122
390
E
Q1103
B
C
+5V
X1102
+5V
C1176
0.1uF 16V
C1106
0.1uF 16V
ISA1530AC1
C1108 18pF
C1173 18pF
+1.8V_TU
+3.3V_TU
R1153
1K
R1138
1K
R1155 100
R1150
100
C1152
C1131
18pF
18pF
50V
50V
IF_AGC
Place the Buffer close to Tuner
TUNER_SIF
FE_TS_DATA[0-7]
SDA1 SCL1
FE_TS_SYN
FE_TS_ERR
FE_TS_SERIAL
FE_TS_CLK
FE_TS_VAL
FE_TS_DATA[0] FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3]
FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7]
C_+3.3V
R1115 R1121 R1126
R1102 R1103 47
R1144 47 R1148 R1129 R1132
R1109 47
R1111 R1143
R1140
+1.2V
VSSAH_OSC
VDDAH_OSC
VDDH_454VSSH_4
VSSL_456VDDL_4
TDO58TMS59TCK60TDI61I2C_SDA2
I2C_SCL2
I2S_CL64I2S_DA
52
53
55
57
62 I2S_WS VDDL_1 VSSL_1
R1123
4.7K
47 47 47
47
47 47 47
GPIO1 MSTRT
MERR VSSH_1 VDDH_1
MCLK
MVAL
VSSL_2 VDDL_2
63 1 2 3 4 5 6 7 8 9 10
MD0
11
MD1
12
MD2
13
MD3
14 15 16
VSSH_218VDDH_2
17
19
MD420MD521MD622MD7
IC1103
DRX3913K-XK
23
25
VSSH_326VDDH_327VDDL_328VSSL_3
I2C_SCL124I2C_SDA1
29
VSYNC30GPIO2
20.25MHz
31
RSTN
SAW_SW
C1162 15pF 50V
X1101
49XI50XO51
32
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
C1123 15pF 50V
PDN
C1139 0.1uF
PDP
C1140 0.1uF VDDAL_AFE2 VSSAL_AFE2 SIF CVBS VDDAH_CVBS VSSAH_CVBS INP INN VSSAH_AFE1 VDDAH_AFE1 VDDAL_AFE1 VSSAL_AFE1 IF_AGC RF_AGC
A_1.2V
A_3.3V
C_+3.3V
R1107
6.8K
C1181
0.027uF
C1172
C1160
1000pF
50V
50V
1000pF
IF_AGC
TUNER_IF_P TUNER_IF_N
C_+3.3V
47 47
47
C_+3.3V
READY
R1128
4.7K
READY
R1139
4.7K
R1114
100
R1136 100
50V 18pF C1113
READY
50V
18pF
C1175 READY
R1116
4.7K READY
C1102
0.1uF 16V
R1108
100
/FE_RESET
P_17V
L1103
MLB-201209-0120P-N2
C1157
0.1uF 50V
CVBS_SCART_OUT
C11 66
0.1 uF 16V
Q1104
1
SC1_VIDEO_MUTE
(SC1_TV_VOUT_MUTE GPIO OPTION)
C1138
C1178
0.1uF
10uF
50V
25V
R1133
47K
C1170
47uF
16V
B
R1151
15K
R1141
R1131
2K
Q1107
3
2SC3052
2
[SCART1 TV VOUT]
470
R1154
B
C
Q1105 2SC3052
E
R1145
390
180
R1137 390
E
C
Q1101
R1164 330
READY
ISA1530AC1
B
R1163
C
Q1110 2SC3052
READY
E
MLF1608A2R7J
2.7uH 5%
FE_VOUT
READY
330
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
L1110
R1112 680
C1104
6.8pF 50V
C1183
R1159
0.1uF
390
16V
TUNER_IF_N
E
Q1108
+5V
L1118
C
R1101 390
ISA1530AC1
C1168
0.1uF 16V
+3.3V_TU
C1180
68uF 10V READY
C1185
0.1uF 16V
C1186
0.1uF 16V
C1187
0.1uF 16V
B
TUNER_CVBS
E
Q1102
B
ISA1530AC1
C
R1118 390
E
Q1106
B
C
+5V
ISA1530AC1
L1117
C1145
0.1uF 16V
CVBS_SCART_OUT
+3.3V_TU
R1165
0
C1188 100uF 16V
C1150
0.1uF 50V
C1111
10uF 16V READY
IC1102
AZ1117H-1.2TRE1
OUTIN
ADJ/GND
C1122 100uF
16V
+1.2V
C1107
0.1uF 50V
SCL1
SDA1
+3.3V_TU
MLB-201209-0120P-N2
C1110
0.1uF 16V
L1107
C1177
0.1uF 16V
+1.2V
0.1uF
C_+3.3V
16V
C1112
C1105
10uF
6.3V
+3.3V_TU
0.1uF C1114
C1125
0.1uF 16V
16V
0.1uF
+3.3V_TU
MLB-201209-0120P-N2
C1143
0.1uF 16V
16V
0.1uF C1144
C1132
MLB-201209-0120P-N2
C1179
0.1uF 16V
L1112
C1142
0.1uF
C1174
0.1uF
16V
16V
L1113
MLB-201209-0120P-N2
16V
L1115
0.1uF
C1137
0.1uF 16V
16V
C1130
A_1.2V
C1136
0.1uF 16V
A_3.3V
16V
0.1uF
C1149
D_3.3V
C1153
0.1uF 16V
+5V
C1184
R1157
0.1uF
390
16V
TUNER_IF_P
E
Q1109
B
ISA1530AC1
C
MSD3368EV Platform
TUNER
10 10
Page 35
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