LG 40UF695V-ZB Schematic

Internal Use Only

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LED TV

SERVICE MANUAL

CHASSIS : LD48V

MODEL : 40UF695V 40UF695V-ZB

CAUTION

BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

Printed in KoreaP/NO : MFL68320908 (1504-REV00)

CONTENTS

CONTENTS .............................................................................................. 2

SAFETY PRECAUTIONS ........................................................................ 3

SERVICING PRECAUTIONS .................................................................... 4

SPECIFICATION ....................................................................................... 6

ADJUSTMENT INSTRUCTION .............................................................. 11

BLOCK DIAGRAM .................................................................................. 18

EXPLODED VIEW .................................................................................. 19

SCHEMATIC CIRCUIT DIAGRAM ........................................... APPENDIX

TROUBLE SHOOTING GUIDE ................................................ APPENDIX

Only for training and service purposes

- 2 -

SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance

An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.

It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.

If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified.

When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB.

Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.

Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to

0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

Only for training and service purposes

- 3 -

SERVICING PRECAUTIONS

CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the

SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conict between the

following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First.

General Servicing Precautions

1. Always unplug the receiver AC power cord from the AC power source before;

a. Removing or reinstalling any component, circuit board

module or any other receiver assembly.

b. Disconnecting or reconnecting any receiver electrical plug

or other electrical connection.

c. Connecting a test substitute in parallel with an electrolytic

capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard.

2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc".

3. Do not spray chemicals on or near this receiver or any of its assemblies.

4. Unless specied otherwise in this service manual, clean

electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10 % (by volume) Acetone and 90 % (by volume) isopropyl alcohol (90 % - 99 % strength)

CAUTION: This is a ammable mixture. Unless specied otherwise in this service manual, lubrication

of contacts in not required.

5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped.

6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed.

7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last.

8. Use with this receiver only the test xtures specied in this

service manual.

CAUTION: Do not connect the test xture ground strap to any

heat sink in this receiver.

Electrostatically Sensitive (ES) Devices

Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES

devices are integrated circuits and some eld-effect transistors

and semiconductor “chip” components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity.

1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test.

2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.

3. Use only a grounded-tip soldering iron to solder or unsolder ES devices.

4. Use only an anti-static type solder removal device. Some sol-

der removal devices not classied as “anti-static” can generate electrical charges sufcient to damage ES devices.

5. Do not use freon-propelled chemicals. These can generate

electrical charges sufcient to damage ES devices.

6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material).

7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.

8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your

foot from a carpeted oor can generate static electricity sufcient to damage an ES device.)

General Soldering Guidelines

1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500 °F to 600 °F.

2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead.

3. Keep the soldering iron tip clean and well tinned.

4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners.

5. Use the following unsoldering technique

a. Allow the soldering iron tip to reach normal temperature.

(500 °F to 600 °F) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suction-

type solder removal device or with solder braid.

CAUTION: Work quickly to avoid overheating the circuit

board printed foil.

6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature

(500 °F to 600 °F)

b. First, hold the soldering iron tip and solder the strand

against the component lead until the solder melts.

c. Quickly move the soldering iron tip to the junction of the

component lead and the printed circuit foil, and hold it there only until the solder ows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil.

d. Closely inspect the solder area and remove any excess or

splashed solder with a small wire-bristle brush.

Only for training and service purposes

- 4 -

IC Remove/Replacement

Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent at against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above.

Removal

1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts.

2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC.

Replacement

1. Carefully insert the replacement IC in the circuit board.

2. Carefully bend each IC lead against the circuit foil pad and solder it.

3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas).

"Small-Signal" Discrete Transistor Removal/Replacement

1. Remove the defective transistor by clipping its leads as close as possible to the component body.

2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.

3. Bend into a "U" shape the replacement transistor leads.

4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection.

Power Output, Transistor Device Removal/Replacement

1. Heat and remove all solder from around the transistor leads.

2. Remove the heat sink mounting screw (if so equipped).

3. Carefully remove the transistor from the heat sink of the circuit board.

4. Insert new transistor in the circuit board.

5. Solder each transistor lead, and clip off excess lead.

6. Replace heat sink.

Diode Removal/Replacement

1. Remove defective diode by clipping its leads as close as possible to diode body.

2. Bend the two remaining leads perpendicular y to the circuit board.

3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board.

4. Securely crimp each connection and solder it.

5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder.

3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures.

Circuit Board Foil Repair

Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered.

At IC Connections

To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections).

1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary).

2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern.

3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection.

4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire.

At Other Connections

Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board.

1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens.

2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern.

3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.

Fuse and Conventional Resistor Removal/Replacement

1. Clip each fuse or resistor lead at top of the circuit board hollow stake.

2. Securely crimp the leads of replacement component around notch at stake top.

Only for training and service purposes

- 5 -

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement

.

1. Application range

This specification is applied to the LED TV used LD48V chassis.

2. Requirement for Test

Each part is tested as below without special appointment.

1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

2) Relative Humidity: 65 % ± 10 %

3) Power Voltage : Standard input voltage (AC 100-240 V~, 50/60 Hz) * Standard Voltage of each products is marked by models.

4) Specification and performance of each parts are followed

each drawing and specification by part number in accordance with BOM.

5) The receiver must be operated for about 5 minutes prior to

the adjustment.

3. Test method

1) Performance: LGE TV test method followed

2) Demanded other specification

- Safety : CE, IEC specification

- EMC : CE, IEC specification

- Wireless : Wireless HD Specification (Option)

4. Model General Specification

No. Item Specication Remarks

DTV & Analog (Total 37 countries)

DTV (MPEG2/4, DVB-T) : 30 countries

Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece, Czech, Croatia, Turkey, Morocco, Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania, Albania, Bosnia, Serbia, Slovakia, Belarus

1 Market

EU(PAL Market-36Countries)/CIS + Morocco(Africa)

DTV (MPEG2/4, DVB-T2) : 8 countries

UK(Ireland), Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan, Russia

DTV (MPEG2/4, DVB-C) : 37 countries

Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece, Czech, Croatia, Turkey, Morocco, Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania, Albania, Bosnia, Serbia, Slovakia, Belarus, UK, Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan

DTV (MPEG2/4, DVB-S/S2) : 30 countries

Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece, Czech, Croatia, Turkey, Morocco, Ireland, Latvia, Estonia, Lithuania, Poland, Portugal, Romania, Albania, Bosnia, Serbia, Slovakia, Belarus, UK, Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan

Supported satellite : 29 satellites

ABS1 75.0E/ AMOS 4.0W/ ASIASATS 105.5E/ ASTRA1LHMKR 19.2E/ ASTRA2ABD 28.2E/ ASTRA3AB 23.5E/ ASTRA4A 4.8E/ ATLANTICBIRD2 8.0W/ ATLANTICBIRD3 5.0W/ BADR 26.0E/ EUROBIRD3

33.0E/ EUROBIRD9A 9.0E/ EUTELSATW2A 10.E/ EUTELSATW3A

7.0E/ EUTELSATW4W7 36.0E/ EUTELSESAT 16.0E/ EXPRESSAM1

40.0E/ EXPRESAM3 140.0E/ EXPRESSAM33 96.5E/ HELLASAT2

39.0E/ HISPASAT1CDE 30.0W/ HOTBIRD 13.0E/ INTELSAT10&7

68.5E/ INTELSAT15 85.2E/ INTELSAT904 60.0E/ NILESAT 7.0W/ THOR 0.8W/ TURKSAT 42.0E/ YAMAL201 90.0E

Only for training and service purposes

- 6 -

No. Item Specication Remarks

(1) PAL-BG/DK/I/I’

2 Broadcasting system

3 Program coverage

4 Receiving system

(2) SECAM L/L’, DK, BG, I (3) DVB-T/T2, C, S/S2

(1) Digital TV

- VHF, UHF

- C-Band, Ku-Band

(2) Analogue TV

-VHF : E2 to E12

-UHF : E21 to E69

-CATV : S1 to S20

-HYPER : S21 to S47

Analog : Upper Heterodyne Digital : COFDM, QAM

► DVB-T

- Guard Interval(Bitrate_Mbit/s) 1/4, 1/8, 1/16, 1/32

- Modulation : Code Rate QPSK : 1/2, 2/3, 3/4, 5/6, 7/8 16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8 64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

► DVB-T2

- Guard Interval(Bitrate_Mbit/s) 1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,

- Modulation : Code Rate QPSK : 1/2, 2/5, 2/3, 3/4, 5/6 16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6 64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6 256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

5 Input Voltage AC 100 ~ 240 V, 50/60 Hz

► DVB-C

- Symbolrate : 4.0 Msymbols/s to 7.2 Msymbols/s

- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM

► DVB-S/S2

- symbolrate : DVB-S2 (8PSK / QPSK) : 2 ~ 45 Msymbol/s DVB-S (QPSK) : 2 ~ 45 Msymbol/s

- viterbi DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8 DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10

Only for training and service purposes

- 7 -

5. External Input Format

5.1. CVBS Input

No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed Remarks

1. 720*480i 15.73 59.94 13.50 SDTV, DVD 480I(525I) NTSC-M

2 720*480i 15.73 60.00 13.51 SDTV, DVD 480I(525I) NTSC-M

3. 720*576i 15.63 50.00 13.50 SDTV, DVD 576I(625I) 50Hz PAL-BDGHI

5.2. Component Input(Y, /CB/PB, CR/PR)

No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed

1. 720*480i 15.73 59.94 13.50 SDTV, DVD 480I(525I)

2 720*480i 15.73 60.00 13.51 SDTV, DVD 480I(525I)

3. 720*576i 15.63 50.00 13.50 SDTV, DVD 576I(625I) 50Hz

4 720*480p 31.47 59.94 27.00 SDTV 480P

5 720*480p 31.50 60.00 27.03 SDTV 480P

6 720*576p 31.25 50.00 27.00 SDTV 576P 50Hz

7 1280*720 44.96 59.94 74.18 HDTV 720P

8 1280*720 45.00 60.00 74.25 HDTV 720P

9 1280*720 45.00 50.00 74.25 HDTV 720P 50Hz

10 1920*1080 28.13 50.00 74.25 HDTV 1080I 50Hz,

11 1920*1080 33.72 59.94 74.18 HDTV 1080I

12 1920*1080 33.75 60.00 74.25 HDTV 1080I

13 1920*1080 56.25 50.00 148.50 HDTV 1080P

14 1920*1080 67.50 60.00 148.50 HDTV 1080P

Only for training and service purposes

- 8 -

5.3. HDMI Input(DTV)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks

1 640*480 31.47 59.94 25.13 SDTV 480P

2 640*480 31.50 60.00 25.13 SDTV 480P

3 720*480 15.73 59.94 13.50 SDTV, DVD 480I(525I)

Spec. out but display4 720*480 15.75 60.00 13.51 SDTV, DVD 480I(525I)

5 720*576 15.63 50.00 13.50 SDTV, DVD 576I(625I) 50Hz

6 720*480 31.47 59.94 27.00 SDTV 480P

7 720*480 31.50 60.00 27.03 SDTV 480P

8 720*576 31.25 50.00 27.00 SDTV 576P

9 1280*720 44.96 59.94 74.18 HDTV 720P

10 1280*720 45.00 60.00 74.25 HDTV 720P

11 1280*720 37.50 50.00 74.25 HDTV 720P

12 1920*1080 28.13 50.00 74.25 HDTV 1080I

13 1920*1080 33.72 59.94 74.18 HDTV 1080I

14 1920*1080 33.75 60.00 74.25 HDTV 1080I

15 1920*1080 26.97 23.98 63.30 HDTV 1080P

16 1920*1080 27.00 24.00 63.36 HDTV 1080P

17 1920*1080 33.71 29.97 79.12 HDTV 1080P

18 1920*1080 33.75 30.00 79.20 HDTV 1080P

19 1920*1080 56.25 50.00 148.50 HDTV 1080P

20 1920*1080 67.43 59.94 148.35 HDTV 1080P

21 1920*1080 67.50 60.00 148.50 HDTV 1080P

22 3840*2160 53.95 23.98 297.00 UDTV 2160P

23 3840*2160 54.00 24.00 297.00 UDTV 2160P

24 3840*2160 56.25 25.00 297.00 UDTV 2160P

25 3840*2160 61.43 29.97 297.00 UDTV 2160P

26 3840*2160 67.50 30.00 297.00 UDTV 2160P

27 3840*2160 112.50 50.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0

28 3840*2160 135.00 59.94 593.41 UDTV 2160P 8 bit / YCbCr 4:2:0

29 3840*2160 135.00 60.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0

30 4096*2160 53.95 23.98 297.00 UDTV 2160P

31 4096*2160 54.00 24.00 297.00 UDTV 2160P

32 4096*2160 56.25 25.00 297.00 UDTV 2160P

33 4096*2160 61.43 29.97 297.00 UDTV 2160P

34 4096*2160 67.50 30.00 297.00 UDTV 2160P

35 4096*2160 112.50 50.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0

36 4096*2160 135.00 59.94 593.41 UDTV 2160P 8 bit / YCbCr 4:2:0

37 4096*2160 135.00 60.00 594.00 UDTV 2160P 8 bit / YCbCr 4:2:0

Only for training and service purposes

- 9 -

5.4. HDMI Input(PC)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks

1 640*350 31.47 70.09 25.17 EGA

2 720*400 31.47 70.08 28.32 DOS

3 640*480 31.47 59.94 25.17 VESA(VGA)

4 800*600 37.88 60.32 40.00 VESA(SVGA)

5 1024*768 48.36 60.00 65.00 VESA(XGA)

6 1360*768 47.71 60.02 84.75 VESA(WXGA)

7 1152*864 54.35 60.05 80.00 VESA

8 1280*1024 63.98 60.02 109.00 SXGA

9 1920*1080 67.50 60.00 158.40 WUXGA(Reduced Blanking)

10 3840*2160 54.00 24.00 297.00 UDTV 2160P

11 3840*2160 56.25 25.00 297.00 UDTV 2160P

12 3840*2160 67.50 30.00 297.00 UDTV 2160P

13 4096*2160 53.95 23.98 297.00 UDTV 2160P

14 4096*2160 54.00 24.00 297.00 UDTV 2160P

Only for training and service purposes

- 10 -

ADJUSTMENT INSTRUCTION

1. Application Range

This specification sheet is applied to all of the LED TV with LD48V chassis.

2. Designation

(1) Because this is not a hot chassis, it is not necessary to

use an isolation transformer. However, the use of isolation

transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of

25 °C ± 5 °C of temperature and 65 % ± 10 % of relative

humidity if there is no specific designation. (4) The input voltage of the receiver must keep AC 100-240

V~, 50/60 Hz. (5) The receiver must be operated for about 5 minutes prior to

the adjustment when module is in the circumstance of over

15.

In case of keeping module is in the circumstance of 0 °C, it should be placed in the circumstance of above 15 °C for 2 hours.

In case of keeping module is in the circumstance of below

-20 °C, it should be placed in the circumstance of above 15 °C for 3 hours.

[Caution] When still image is displayed for a period of 20 minutes or longer (Especially where W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area.

3.2. LAN Inspection

3.2.1. Equipment & Condition

▪ Each other connection to LAN Port of IP Hub and Jig

3.2.2. LAN inspection solution

▪ LAN Port connection with PCB ▪ Network setting at MENU Mode of TV ▪ Setting automatic IP ▪ Setting state confirmation

- If automatic setting is finished, you confirm IP and MAC Address.

3.2.3. WIDEVINE key Inspection

- Confirm key input data at the "IN START" MENU Mode.



3. Automatic Adjustment

3.1. MAC address D/L, CI+ key D/L, Widevine key D/L, ESN D/L, HDCP20 D/L

Connect: USB port Communication Prot connection

▪ Com 1,2,3,4 and 115200(Baudrate)

Mode check: Online Only

▪ Check the test process DETECT → MAC → ESN → Widevine → CI → HDCP20 ▪ Play: Press Enter key ▪ Result: Ready, Test, OK or NG ▪ Printer Out (MAC Address Label)

Only for training and service purposes

- 11 -

3.3. LAN PORT INSPECTION(PING TEST)

Connect SET → LAN port == PC → LAN Port

SET PC

3.3.1. Equipment setting

(1) Play the LAN Port Test PROGRAM. (2) Input IP set up for an inspection to Test Program.

*IP Number : 12.12.2.2

3.3.2. LAN PORT inspection(PING TEST)

(1) Play the LAN Port Test Program.

(2) Connect each other LAN Port Jack.

(3) Play Test (F9) button and confirm OK Message. (4) Remove LAN cable.

3.4. Model name & Serial number Download

3.4.1. Model name & Serial number D/L

▪ Press "P-ONLY" key of service remote control.

(Baud rate : 115200 bps)

▪ Connect RS-232C Signal to USB Cable to USB. ▪ Write Serial number by use USB port. ▪ Must check the serial number at Instart menu.

3.4.2. Method & notice

(1) Serial number D/L is using of scan equipment. (2) Setting of scan equipment operated by Manufacturing

Technology Group.

(3) Serial number D/L must be conformed when it is produced

in production line, because serial number D/L is mandatory by D-book 4.0.

* Manual Download (Model Name and Serial Number)

If the TV set is downloaded by OTA or service man, sometimes model name or serial number is initialized.(Not always) It is impossible to download by bar code scan, so It need Manual download.

1) Press the "Instart" key of Adjustment remote control.

2) Go to the menu "7.Model Number D/L" like below photo.

3) Input the Factory model name(ex 47LB650V-ZA) or Serial number like photo.

3.5. CI+ Key checking method

- Check the Section 3.1 Check whether the key was downloaded or not at ‘In Start’ menu. (Refer to below).

=> Check the Download to CI+ Key value in LGset.

3.5.1. Check the method of CI+ Key value

(1) Check the method on Instart menu (2) Check the method of RS232C Command

1) Into the main ass’y mode(RS232: aa 00 00)

CMD 1 CMD 2 Data 0

A A 0 0

2) Check the key download for transmitted command (RS232: ci 00 10)

CMD 1 CMD 2 Data 0

C I 1 0

3) Result value

- Normally status for download : OKx

- Abnormally status for download : NGx

3.5.2. Check the method of CI+ key value(RS232)

1) Into the main ass’y mode(RS232: aa 00 00)

CMD 1 CMD 2 Data 0

A A 0 0

2) Check the mothed of CI+ key by command (RS232: ci 00 20)

CMD 1 CMD 2 Data 0

C I 2 0

3) Result value i 01 OK 1d1852d21c1ed5dcx

CI+ Key Value

3.6. WIFI MAC ADDRESS CHECK

(1) Using RS232 Command

H-freq(kHz) V-freq.(Hz)

Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]

(2) Check the menu on in-start

4) Check the model name Instart menu. → Factory name

displayed. (ex 47LB650V-ZA)

5) Check the Diagnostics.(DTV country only) → Buyer

model displayed. (ex 47LB650V-ZA)

Only for training and service purposes

- 12 -

4. Manual Adjustment

4.1. EDID(The Extended Display Identification Data)/DDC(Display Data Channel) download

4.1.1. Overview

It is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of "Plug and Play".

4.1.2. Equipment

- Since embedded EDID data is used, EDID download JIG,

HDMI cable and D-sub cable are not need.

- Adjustment remote control

4.1.3. Download method

(1) Press "ADJ" key on the Adjustment remote control, then

select "12.EDID D/L", By pressing "Enter" key, enter EDID D/L menu.

For HDMI EDID

DVI-D to HDMI or HDMI to HDMI

(2) Select "Start" button by pressing "Enter" key, HDMI1/

HDMI2/ HDMI3/ HDMI4 are writing and display OK or NG.

4.1.4. EDID DATA

▪ Reference

- HDMI1 ~ HDMI3

- In the data of EDID, bellows may be different by Input mode.

0 1 2 3 4 5 6 7 8 9 A B C D E F

0x00 00 FF FF FF FF FF FF 00 1E 6D

ⓒ

0x01 0x02 0F 50 54 A1 8 00 31 40 45 40 61 40 71 40 81 80 0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 0x04 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 0x05 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20 0x07 0x00 02 03 3A F1 4E 10 9F 04 13 05 14 03 02 12 20 21 0x01 22 15 01 29 3D 06 C0 15 07 50 0x02 0x03 0x04 2D 40 58 2C 45 00 40 84 63 00 00 1E 01 1D 80 18 0x05 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 0x06 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26

ⓓ

ⓕ

10 28 10 E3 05 03 01 02 3A 80 18 71 38

ⓕ

ⓐ Product ID ⓑ Serial No: Controlled on production line. ⓒ Month, Year: Controlled on production line:

ex) Monthly : ‘01’ → ‘01’, Year : ‘2014’ → ‘18’

ⓓ Model Name(Hex): LGTV ⓔ Checksum(LG TV): Changeable by total EDID data. ⓕ Vendor Specific(HDMI)

ⓐ ⓑ

ⓕ

ⓓ

ⓔ1

01

ⓔ2

(1) EDID for 2D Model

# HDMI 1(C/S: E7, 2D) EDID Block 0, Bytes 0-127 [00H-7FH]

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7

EDID Block 1, Bytes 128-255 [80H-FFH]

0 1 2 3 4 5 6 7 8 9 A B C D E F 80 02 03 3C F1 54 10 9F 04 13 05 14 03 02 12 20 21 90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50 A0 09 57 07 6E 03 0C 00 10 00 B8 3C 20 00 80 01 02 B0 03 04 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18 C0 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D D0 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2D

# HDMI2 (C/S: E7, 1D) EDID Block 0, Bytes 0-127 [00H-7FH]

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7

EDID Block 1, Bytes 128-255 [80H-FFH]

0 1 2 3 4 5 6 7 8 9 A B C D E F 80 02 03 3C F1 54 10 9F 04 13 05 14 03 02 12 20 21 90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50 A0 09 57 07 6E 03 0C 00 20 00 B8 3C 20 00 80 01 02 B0 03 04 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18 C0 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D D0 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1D

# HDMI3 (C/S: E7, 0D) EDID Block 0, Bytes 0-127 [00H-7FH]

0 1 2 3 4 5 6 7 8 9 A B C D E F

0 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 10 01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 40 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 50 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 70 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E7

Only for training and service purposes

- 13 -

EDID Block 1, Bytes 128-255 [80H-FFH]

0 1 2 3 4 5 6 7 8 9 A B C D E F 80 02 03 3C F1 54 10 9F 04 13 05 14 03 02 12 20 21 90 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50

A0 09 57 07 6E 03 0C 00 30 00 B8 3C 20 00 80 01 02 B0 03 04 E3 05 03 01 E5 0E 60 61 65 66 01 1D 80 18 C0 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D D0 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0D

* Checksum(HDMI1/2/3)

Input FFh (Checksum)

HDMI1 E7 2D

HDMI2 E7 1D

HDMI3 E7 0D

4.2. White Balance Adjustment

4.2.1. Overview

▪ W/B adj. Objective & How-it-works

(1) Objective: To reduce each Panel's W/B deviation (2) How-it-works : When R/G/B gain in the OSD is at 192, it

means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of R/G/B is fixed at 192, and the other two is lowered to find the desired value.

(3) Adjustment condition : normal temperature

1) Surrounding Temperature : 25 °C ± 5 °C

2) Warm-up time: About 5 Min

3) Surrounding Humidity : 20 % ~ 80 %

4.2.2. Equipment

(1) Color Analyzer: CA-210 (LED Module : CH 14) (2) Adjustment Computer(During auto adj., RS-232C protocol

is needed) (3) Adjustment Remote control (4) Video Signal Generator MSPG-925F 720p/216-Gray

(Model: 204, Pattern: 49)

→ Only when internal pattern is not available

• Color Analyzer Matrix should be calibrated using CS-100.

4.2.3. Equipment connection MAP

Color Analyzer

Probe

RS- 232C

Pattern Generator

Signal Source

* If TV internal pattern is used, not needed

RS-232C

Computer

RS-232C

4.2.4. Adj. Command (Protocol)

START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS STOP

- LEN: Number of Data Byte to be sent

- CMD: Command

- VAL: FOS Data value

- CS: Checksum of sent data

- A: Acknowledge

Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

▪ RS-232C Command used during auto-adjustment.

RS-232C COMMAND

[CMD ID DATA]

wb 00 00 Begin White Balance adjustment

wb 00 10 Gain adjustment(internal white pattern)

wb 00 1f Gain adjustment completed

wb 00 20 Offset adjustment(internal white pattern)

wb 00 2f Offset adjustment completed

wb 00 ff

End White Balance adjustment (internal pattern disappears)

Ex) wb 00 00 → Begin white balance auto-adj.

wb 00 10 → Gain adj. ja 00 ff → Adj. data jb 00 c0 ... ... wb 00 1f → Gain adj. completed *(wb 00 20(Start), wb 00 2f(end)) → Off-set adj. wb 00 ff → End white balance auto-adj.

▪ Adj. Map

Command

(lower case ASCII)

CMD1 CMD2 MIN MAX

Cool

Medium

Warm

Adj. item

R Gain j g 00 C0

G Gain j h 00 C0

B Gain j i 00 C0

R Cut

G Cut

B Cut

R Gain j a 00 C0

G Gain j b 00 C0

B Gain j c 00 C0

R Cut

G Cut

B Cut

R Gain j d 00 C0

G Gain j e 00 C0

B Gain j f 00 C0

R Cut

G Cut

Explanation

Data Range

(Hex.)

Default

(Decimal)

Only for training and service purposes

- 14 -

4.2.5. Adj. method

(1) Auto adj. method

1) Set TV in adj. mode using POWER ON key.

2) Zero calibrate probe then place it on the center of the Display.

3) Connect Cable.(RS-232C to USB)

4) Select mode in adj. Program and begin adj.

5) When adj. is complete (OK Sign), check adj. status pre mode. (Warm, Medium, Cool)

6) Remove probe and RS-232C cable to complete adj.

▪ W/B Adj. must begin as start command “wb 00 00” , and

finish as end command “wb 00 ff”, and Adj. offset if need.

(2) Manual adjustment. method

1) Set TV in Adj. mode using POWER ON.

2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10 cm of the surface.

3) Press ADJ key → EZ adjust using adj. R/C → 7. WhiteBalance then press the cursor to the right(key ►).

(When right key(►) is pressed 216 Gray internal pattern

will be displayed)

4) One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet the desired value.

5) Adjustment is performed in COOL, MEDIUM, WARM 3 modes of color temperature.

** G-fix adjustment Adjust modes (Cool), Fix the G gain to 172 (default data) and change the others (G/B Gain). Adjust two modes(Medium / Warm), Fix the one of R/G/B gain to 192 (default data) and decrease the others.

▪ If internal pattern is not available, use RF input. In EZ Adj.

menu 7.White Balance, you can select one of 2 Testpattern: ON, OFF. Default is inner(ON). By selecting OFF, you can adjust using RF signal in 216 Gray pattern.

▪ Adjustment condition and cautionary items

1) Lighting condition in surrounding area Surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding.

2) Probe location : Color Analyzer(CA-210) probe should be within 10 cm

and perpendicular of the module surface(80° ~ 100°)

3) Aging time

- After Aging Start, Keep the Power ON status during 5

Minutes.

- In case of LCD, Back-light on should be checked

using no signal or Full-white pattern.

4.2.6. Reference (White balance Adj. coordinate and color temperature)

▪ Luminance : 206 Gray ▪ Standard color coordinate and temperature using CS-1000

(over 26 inch)

Mode

Coordinate

x y

Temp ∆uv

Cool 0.271 0.270 13000 K 0.0000

Medium 0.286 0.289 9300 K 0.0000

Warm 0.313 0.329 6500 K 0.0000

▪

Standard color coordinate and temperature using CA-210(CH 14)

Mode

Coordinate

x y

Temp ∆uv

Cool 0.271 ± 0.002 0.270 ± 0.002 13000 K 0.0000

Medium 0.286 ± 0.003 0.289 ± 0.003 9300 K 0.0000

Warm 0.313 ± 0.002 0.329 ± 0.002 6500 K 0.0000

4.2.7. EDGE & IOL LED White balance table

▪ Edge & ALEF LED module change color coordinate because

of aging time.

▪ Apply under the color coordinate table, for compensated

aging time.

▪ (Normal line) Edge & ALEF LED White balance table

- gumi(Mar. ~ Dec.) & Global Model : (normal line) LGD, CMI

Aging

NC

4.0

time

(Min)

1 0-2 282 289 297 308 324 348 2 3-5 281 287 296 306 323 346 3 6-9 279 284 294 303 321 343 4 10-19 277 280 292 299 319 339 5 20-35 275 277 290 296 317 336 6 36-49 274 274 289 293 316 333 7 50-79 273 272 288 291 315 331 8 80-119 272 271 287 290 314 330 9 Over 120 271 270 286 289 313 329

- gumi Winter table(Jan., Fab.)- Gumi producing model use only

Model : (normal line) LGD, CMI

NC

Agingtime

4.0

(Min)

1 0-5 283 292 297 315 322 347 2 6-10 282 290 296 313 321 345 3 11-20 280 288 294 311 319 343 4 21-30 277 284 291 307 316 339 5 31-40 275 279 289 302 314 334 6 41-50 274 275 288 298 313 330 7 51-80 273 272 287 295 312 327 8 81-119 272 271 286 294 3 11 326 9 Over 120 271 270 286 289 313 329

Cool Medium Warm

x y x y x y

271 270 286 289 313 329

Cool Medium Warm

x y x y x y

271 270 286 289 313 329

Only for training and service purposes

- 15 -

▪ (Aging Chamber) Edge & ALEF

Model : (aging chamber)LGD, CMI

Aging

NC

time

4.0 (Min)

1 0-5 280 285 294 308 319 340 2 6-10 276 280 290 303 315 335 3 11-20 272 275 286 298 311 330 4 21-30 269 272 283 295 308 327 5 31-40 267 268 281 291 306 323 6 41-50 266 265 280 288 305 320 7 51-80 265 263 279 286 304 318 8 81-119 264 261 278 284 303 316 9 Over 120 264 260 278 283 303 315

Cool Medium Warm

x y x y x y

271 270 285 293 313 329

4.3. Local Dimming Function Check

(1) Turn on TV. (2) At the Local Dimming mode, module Edge Backlight

moving right to left Back light of IOP module moving. (3) Confirm the Local Dimming mode. (4) Press “exit” Key.

4.5. Option selection per country

4.5.1. Overview

- Option selection is only done for models in AJ/JA/IL

4.5.2. Method

(1) Press "ADJ" key on the Adjustment remote control, then

select Country Group Menu.

(2) Depending on destination, select Country Group Code or

Country Group then on the lower Country option, select

US, CA, MX. Selection is done using +, - or ►◄ KEY.

4.6. HDMI ARC Function Inspection

(1) Test equipment

- Optic Receiver Speaker

- MSHG-600 (SW: 1220 ↑)

- HDMI Cable (for 1.4 version)

(2) Test method

1) Insert the HDMI Cable to the HDMI ARC port from the master equipment. (HDMI2)

4.4. Magic Motion Remote control test

- Equipment : RF Remote control for test, IR-KEY-Code Remote control for test

- You must confirm the battery power of RF-Remote control before test(recommend that change the battery per every lot)

- Sequence (test)

1) If you select the ‘start key(OK)’ on the Adjustment remote

control, you can pairing with the TV SET.

2) You can check the cursor on the TV Screen, when select

the "OK" key on the Adjustment remote control.

3) You must remove the pairing with the TV Set by select

‘Mute + OK Key’ on the Adjustment remote control.

2) Check the sound from the TV Set.

3) Check the Sound from the Speaker or using AV & Optic TEST program (It’s connected to MSHG-600)

Only for training and service purposes

- 16 -

4.7. Tool Option selection

▪ Method : Press "ADJ" key on the Adjustment remote control,

then select Tool option.

Model Tool 1 Tool 2 Tool 3 Tool 4 Tool 5 Tool 6 Tool 7 BL/MEC

40UF695V-ZB 48870 21009 171 64285 12439 1419 47247 B/L :80, MEC: S1

49UF695V-ZA 34533 21009 24747 64285 12439 1435 45199 B/L: 80, MEC: S2

49UF6959-ZA 34533 21009 24747 64285 12439 1435 45711 B/L: 80, MEC: S2

55UF695V-ZA 33511 21009 24747 64285 12439 1418 45199 B/L :75, MEC: S1

55UF6959-ZA 33511 21009 24747 64285 12439 1418 45711 B/L :75, MEC: S1

60UF695V-ZA 33512 21009 24747 64285 12439 1356 45199 B/L :85, MEC: M1

60UF6959-ZA 33512 21009 24747 64285 12439 1356 45711 B/L :85, MEC: M1

4.8. Ship-out mode check (In-stop)

- After final inspection, press In-Stop key of the Adjustment remote control and check that the unit goes to Stand-by mode.

7.

USB S/W Download(Service only)

(1) Put the USB Stick to the USB socket. (2) Automatically detecting update file in USB Stick.

- If your downloaded program version in USB Stick is old, it didn't work. But your downloaded version is new, USB data is automatically detecting.(Download Version High & Power only mode, Set is automatically Download)

(3) Show the message "Copying files from memory".

5. GND and Internal Pressure check

5.1. Method

(1) GND & Internal Pressure auto-check preparation

- Check that Power Cord is fully inserted to the SET. (If loose, re-insert)

(2) Perform GND & Internal Pressure auto-check

- Unit fully inserted Power cord, Antenna cable and A/V arrive to the auto-check process.

- Connect D-terminal to AV JACK TESTER

- Auto CONTROLLER(GWS103-4) ON

- Perform GND TEST

- If NG, Buzzer will sound to inform the operator.

- If OK, changeover to I/P check automatically.

(Remove CORD, A/V form AV JACK BOX.)

- Perform I/P test

- If NG, Buzzer will sound to inform the operator.

- If OK, Good lamp will lit up and the stopper will allow the pallet to move on to next process.

5.2. Checkpoint

▪ TEST voltage

- GND: 1.5 KV / min at 100 mA

- SIGNAL: 3 KV / min at 100 mA

▪ TEST time: 1 second ▪ TEST POINT

- GND TEST = POWER CORD GND & SIGNAL CABLE

METAL GND

- Internal Pressure TEST = POWER CORD GND & LIVE &

NEUTRAL

▪ LEAKAGE CURRENT: At 0.5 mArms

6. Audio

No. Item Min Ty p Max Unit

Audio practical max

1

Output, L/R (Distor-

tion=10% max Output)

Speaker

2

(8 Ω Impedance)

10 12 W

8.10 10.8 Vrms

10 12 W

Measurement condition: (1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation (2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms

EQ Off

AVL Off

Clear Voice Off

EQ On

AVL On

Clear Voice On

(4) Updating is starting. (5) Updating Completed, The TV will restart automatically.

(6) If your TV is turned on, check your updated version and

Tool option. (explain the Tool option, next stage)

* If downloading version is more new than your TV have, TV

can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didn't have a DTV/ATV test on production line.

* After downloading, have to adjust TOOL OPTION again.

1) Push "IN-START" key in service remote control.

2) Select "Tool Option 1" and push "OK" key.

3) Punch in the number. (Each model has their number.)

Only for training and service purposes

- 17 -

BLOCK DIAGRAM

DDR3 1866 X 16

X_TAL

(512MB X 2EA)

24MHz

(256Kb)

(512MB X 2EA)

DDR3 1866 X 16

SYSTEM EEPROM

I2C 1

AB

P_TS

Analog Demod

T/C Demod

IR/KEY

SUB

ASSY

X_TAL

IR / KEY

WIFI/BT Combo

LOGO LIGHT(Ready)

USB_WIFI

(RENESAS

Sub Mico m

R5F100GEAFB)

I2C 0

32.768KHz

LGE7411

eMMC

(4GB)

Video 4K@30p/2K@60p(Vx1 4 lane),

Vx1

(NTP7514)

MAIN Audio AMP

OSD FHD@60p(Vx1 2 lane)

I2C 4

I2S Out

Mstar LM14

MUX

USB

HDMI

CVBS/YPbPr

CVBS/RGB

ETHERNET

SPDIF OUT

P_TS

IF (+/-)

CI Slot

P_TS

T2/C/S2 W/O AD

TUNER

Air/

Cable

REA

(T2/C/A)

CVBS

(S2)

DEMOD

(S2)

TUNER

DVB-S

R

(H)

2A

OCP

1.5A

OCP

LGE7411

USB1

LNB

(HDD)

USB2

USB3

(2.0)

Mux

Sil9617

HDCP2.2

R9531AN

HDMI3 (MHL)

HDMI2 (ARC)

HDMI1 (HDCP2.2)

H/P

SCART

(IN/OUT)

AV/COMP

Serial

Flash(4MB)

X_TAL

27MHz

LAN

OPTIC

Only for training and service purposes

- 18 -

400

EXPLODED VIEW

IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

401

500

410

522

521

570

571

501

502

900

120

540

LV1

121

530

A10

Stand screw

200

Only for training and service purposes

- 19 -

A22

A2

VCC

LGE Internal Use Only

WP

SCL

SDA

+3.3V_NORMAL

C103

0.1uF

+3.3V_NORMAL

OPT

R157 4.7K

OPT

R158 4.7K

Write Protection

- Low : Normal Operation

- High : Write Protection

R113 33

R114 33

OPT

R163 4.7K

R161 4.7K

R165 4.7K

OPT

R164 4.7K

R162 4.7K

R166 4.7K

LED1 SPI_DI LED0 PWM_PM

I2C_SCL1

I2C_SDA1

NVRAM

IC102

AT24C256C-SSHL-T

EAN61133501

A0

1

2

3

4

A0’h

8

7

6

5

A1

A2

GND

CHIP CONFIG

CHIP_CONFIG[3:0] {LED1, SPI_DI,LED0, PWM_PM}

Value Mode Description 4’b1000 SB51_ExtSPI 51 boot from SPI 4’b1001 HEMCU_ExtSPI ARM boot from SPI 4’b1010 HEMCU_ROM_EMMC ARM boot from ROM; outer storage is eMMC 4’b1011 HEMCU_ROM_NAND ARM boot from ROM; outer storage is NAND 4’b1100 DBUS for test only 4’b0000 SB51_ExtSPI + Authentication 51 boot from SPI with ARM authentication 4’b0001 SB51_ExtSPI + Authentication HEMCU_ExtSPI + Authentication 4’b0011 HEMCU_ROM_NAND + Authentication ARM boot from ROM with authentication;

LM14 HW Option

+3.3V_NORMAL

10K

BIT0 BIT1

BIT2

BIT3

BIT4

BIT5

BIT6

BIT7

BIT8

BIT0_1

R104 10K

BIT0_0

R103 10K

BIT1_1

R108

10K

BIT1_0

R107

BIT2_1

R110 10K

BIT2_0

R109 10K

BIT3_1

BIT3_0

BIT5_1

BIT4_1

BIT6_1

R118 10K

R112 10K

R116 10K

R120 10K

BIT5_0

BIT6_0

BIT4_0

R111 10K

R117 10K

R119 10K

R115 10K

Mstart Debug

MSTAR_DEBUG_OLD

MSTAR_DEBUG_NEW

P103

12507WS-04L

1

2

3

4

5

DDCA_CK

DDCA_DA

P101

12505WS-04A00

1

2

3

4

5

BIT7_1

BIT8_1

R122 10K

R124 10K

BIT7_0

BIT8_0

R121 10K

R123 10K

RS232C_Debug

UART_4PIN_WAFER

P102

12507WS-04L

5

BIT(0/1) DVB

01

10

11

BIT(2/3)

00

01

T2/C/S2/ATV_EXT

10

11

T2/C/S2/AT

Vx1 Division

BIT4

Resolution

BIT5

+3.5V_ST

1

2

3

4

FRC_FLASH_WP

MUX_EN

+3.3V_NORMAL

R188

10K

URSA9_CONNECT

R189

OPT

10K OPT

Don’t use! LM14+URSA9: GPIO AH27/AJ27

JP

TW/COL

CN/HK

ATSC

US

KR

EU

AJJA

EU/CIS AJJA TW/COL CN/HK

T/C

T2/C

2-Division Non-Division

* BIT4: LM14 TX Division OPT

(LM14+URSA9: Non Division)

JP

CI

ATV_INT

T/C Default00ATSC_PIPBRATSC_PIP

T2/C_PIP

FHD UHD

DTV_EXT

T2/C

T2/C/S2

HighLow

SOC_RX

SOC_TX

PWM_DIM2

RF_SWITCH_CTL

AMP_RESET_N

I2C for AMP&MODULE

CVBS_OUT_SEL

+3.3V_NORMAL

R181

10K

DDCA_CK

R182

DDCA_DA

10K OPT

I2C_SCL6 I2C_SDA6

BIT5 BIT6 BIT7 BIT8

/TU_RESET1 /TU_RESET2

BIT0 BIT1 BIT2 BIT3 BIT4

R180 0

I2C_SCL_MICOM_SOC I2C_SDA_MICOM_SOC

M_RFModule_RESET

ATV_SOC

ATV_EXTJPATV_EXT

BIT6

BIT7

BIT8

+3.3V_TUNER

R147

1.8K

PWM_DIM

PWM_PM

I2C_SCL7

I2C_SDA7

SPI_DI

SOC_TX SOC_RX

I2C_SCL1 I2C_SDA1

I2C_SCL4 I2C_SDA4

I2C_SCL5 I2C_SDA5

I2C_SCL2 I2C_SDA2

VID0

VID1 LED0 LED1

KR North.AM BR

MODEL

Reserved

F10

F9 E11 F12

E9

H6

G5

G4

B3

G6

A5

C5

A4

B5

B6

C6

H4

H5

E6

D6

F7

E7

D7

E8

D9

F8

T6

T5

B4

A3

AG29 AH29 AJ29 AG28 AH28 AJ28 AH27 AJ27

U4

U5 A10 C10

V6

V5

U6

T4

W5

W6

E12 D12 E13 F13 F11

ATV_SOC

LM14+URSA9 LM14 ONLY

I2C PULL UP

+3.3V_LNA_TU

+3.3V_NORMAL

R127

1.8K

R128

1.8K

R129

R148

1.8K

IC100

LGE4331

PWM0/GPIO150 PWM1/GPIO151 PWM2/GPIO152 PWM3/GPIO153 PWM_PM/GPIO7

SAR0/GPIO43 SAR1/GPIO44 SAR2/GPIO45 SAR3/GPIO46 SAR5

SPI_CK/GPIO1 SPI_DI/GPIO2 SPI_DO/GPIO3 SPI_CZ0/GPIO0 SPI_CZ1/GPIO_PM6/GPIO16 SPI_CZ2/GPIO_PM10/GPIO20

DDCA_CK/UART0_RX/GPIO8 DDCA_DA/UART0_TX/GPIO9

TX1/GPIO60 RX1/GPIO61 TX2/GPIO62 RX2/GPIO63 TX3/GPIO64 RX3/GPIO65 TX4/GPIO69 RX4/GPIO70 TX5/GPIO87 RX5/GPIO88

GPIO66 GPIO67

TCON0/GPIO155 TCON1/GPIO156 TCON2/GPIO157 TCON3/GPIO158 TCON4/GPIO159 SPI1_CK/GPIO104 VSYNC_LIKE/GPIO103 SPI1_DI/GPIO105

GPIO81/SCK0 GPIO82/SDA0 DDCR_CK/GPIO52 DDCR_DA/GPIO51 GPIO83/SCK4 GPIO84/SDA4 GPIO85/SCK5 GPIO86/SDA5 GPIO89/SCK2 GPIO90/SDA2

VID0/GPIO48 VID1/GPIO49 LED0/GPIO29 LED1/GPIO30 WOL/GPIO50

ATV_INT

Default

DTV_INT

HighLow

R133

1.8K

R134

1.8K

R130

EJ_RSTZ/GPIO53

EJ_TRSTZ/GPIO54

EJ_TCK/GPIO55 EJ_TMS/GPIO56 EJ_TDI/GPIO57 EJ_TDO/GPIO58

EJ_DINT/GPIO59

PCM2_CEN/GPIO112 PCM2_IRQA/GPIO113 PCM2_WAIT/GPIO114

PCM2_RESET/GPIO115

GPIO_PM0/GPIO10 GPIO_PM2/GPIO12 GPIO_PM3/GPIO13 GPIO_PM4/GPIO14 GPIO_PM7/GPIO17 GPIO_PM8/GPIO18

GPIO_PM9/GPIO19 GPIO_PM13/GPIO23 GPIO_PM17/GPIO27 GPIO_PM18/GPIO28

GPIO_PM1/GPIO11

GPIO_PM5/GPIO15 GPIO_PM11/GPIO21 GPIO_PM12/GPIO22

R135

1.8K

R136

1.8K

R131

B2M/VBY7N

B2P/VBY7P BCKM/VBY6P BCKP/VBY6P

B3M/VBY5P

B3P/VBY5P

B4M/VBY4N

B4P/VBY4P

A0M/VBY3N

A0P/VBY3P

A1M/VBY2N

A1P/VBY2P

A2M/VBY1N

A2P/VBY1P ACKM/VBY0N ACKP/VBY0P

A3M/LOCKN A3P/HTTPDN

AV_LINK

I2C_SCL_MICOM

1.8K

R132

1.8K

R183

TEST

3.3K

IC100

JTAG

R105

JTAG

1K

R106

R153 10K

R152 10K

LGE4331

Jtag I/F For Main

TRST_N0 TDI0 TDO0 TMS0 TCK0 SOC_RESET

OPT

R169 10K

R159 10K

R154 10K

R170 10K

TS1DATA_[0]/GPIO194 TS1DATA_[1]/GPIO193 TS1DATA_[2]/GPIO192 TS1DATA_[3]/GPIO191 TS1DATA_[4]/GPIO190 TS1DATA_[5]/GPIO189 TS1DATA_[6]/GPIO188 TS1DATA_[7]/GPIO187

TS1CLK/GPIO184

TS1VALID/GPIO186

TS1SYNC/GPIO185

TS0DATA_[0]/GPIO173 TS0DATA_[1]/GPIO174 TS0DATA_[2]/GPIO175 TS0DATA_[3]/GPIO176 TS0DATA_[4]/GPIO177 TS0DATA_[5]/GPIO178 TS0DATA_[6]/GPIO179 TS0DATA_[7]/GPIO180

TS0CLK/GPIO183

TS0VALID/GPIO181

TS0SYNC/GPIO182

TS2DATA_[0]/GPIO207

TS2CLK/GPIO210

TS2SYNC/GPIO209

TS2VALID/GPIO208

VIFP VIFM

SIFP SIFM

IF_AGC

TGPIO0/GPIO169 TGPIO1/GPIO170 TGPIO2/GPIO171 TGPIO3/GPIO172

R160 10K

/TU_RESET1 /TU_RESET2

RF_SWITCH_CTL AMP_RESET_N

TCON_I2C_EN

/USB_OCD2

USB_CTL2

/USB_OCD3

USB_CTL3

M_RFModule_RESET

PCM_5V_CTL

AJ18 AH19 AJ20 AG20 AH21 AH18 AG21 AJ21 AG19 AH20 AG18

AH13 AG17 AJ17 AH14 AG14 AG16 AG15 AH15 AJ15 AH17 AH16

AJ26 AG26 AH26 AG25

AL7 AM7

AL6 AK7

AM5

AM8 AL8 AL5 AK6

TPI_DATA[0] TPI_DATA[1] TPI_DATA[2] TPI_DATA[3]

TPI_DATA[4] TPI_DATA[5] TPI_DATA[6]

TPI_DATA[7]

TPI_CLK TPI_VAL

FE_DEMOD1_TS_DATA[0] FE_DEMOD1_TS_DATA[1] FE_DEMOD1_TS_DATA[2] FE_DEMOD1_TS_DATA[3] FE_DEMOD1_TS_DATA[4] FE_DEMOD1_TS_DATA[5]

FE_DEMOD1_TS_DATA[6] FE_DEMOD1_TS_DATA[7]

TPI_SOP

Close to MSTAR

R140 100

R141 100

/USB_OCD2 USB_CTL2 /USB_OCD3 USB_CTL3

URSA9 VIDEO/OSD LOCKn

TPI_DATA[0-7]

FE_DEMOD1_TS_CLK FE_DEMOD1_TS_VAL FE_DEMOD1_TS_SYNC

C118 0.1uF

C119 0.1uF

C120 0.1uF C121 0.1uF

ANALOG SIF

Close to MSTAR

LOCKAn_Video

LOCKAn_OSD

FE_DEMOD1_TS_DATA[0-7]

OPT

C122

OPT C123 33pF

R144 47 R145 47

BLM18PG121SN1D

R142 10K

R143

0

LOCKAn_Video

+3.3V_NORMAL

R191 10K

22

R173

VBY1_LOCK_LED

220

R174

E

VBY1_LOCK_LED

MMBT3906(NXP)

VBY1_LOCK_LED

B

C

LOCKAn_OSD

+3.3V_NORMAL

10K

R192

22

R139

LD1 01

VBY1_LOCK_LED

220

R172

E

VBY1_LOCK_LED

Q101

MMBT3906(NXP)

VBY1_LOCK_LED

B

C

OPT C126 33pF

C124 1000pF OPT

+3.3V_NORMAL

L100

C125

0.1uF

C127

0.047uF 25V

LD1 00

SML -512 UW

VBY1_LOCK_LED

Q100

SML -512 UW

VBY1_LOCK_LED

DTV_IF

R146 300 OPT

IF_P

IF_N

TU_SIF

IF_AGC

AE32

B0M B0P B1M B1P

A4M A4P

V-BY-ONE

AF30 AF32

MSB/LSB swap

AF31 AG32 AG31 AG30 AH31 AJ31 AJ32 AJ30 AK32

AK31 AK30 AL31 AL30 AM30 AL29 AM29 AK28 AM28 AL28 AK27 AL27

R125

10K

F5 F4 D5 F6 D4 E5 E4

AG22 AH22 AG23 AH23

J5 R6 P4

R190

N6 N5 J6 K4 L5 L6 L4

P5 P6 K6 K5

R5 G7

33

R184

3.3K

R185

3.3K

R186

3.3K

R126

10K

TRST_N0

TCK0 TMS0 TDI0 TDO0

R13733 R138

0

TXVBY1_7N TXVBY1_7P TXVBY1_6N TXVBY1_6P TXVBY1_5N TXVBY1_5P TXVBY1_4N TXVBY1_4P

TXVBY1_3N TXVBY1_3P TXVBY1_2N TXVBY1_2P

LOCKAn_Video HTPDAn_Video LOCKAn_OSD HTPDAn_OSD

47K

R177

SIL9617_INT AV1_CVBS_DET HP_DET SC_DET

COMP1_DET

L_DIM_EN

PCM_5V_CTL

5V_DET_HDMI_1 5V_DET_HDMI_2

R9531_RESET

5V_DET_HDMI_3

R9531_FLASH_WP

/USB_OCD1 USB_CTL1 URSA_RESET_SoC SIL9617_RESET

I2C_SDA_MICOM_SOCI2C_SDA_MICOM I2C_SCL_MICOM_SOC

I2C_SDA8 I2C_SCL8

I2C_SDA7 I2C_SCL7 I2C_SDA6 I2C_SCL6 I2C_SDA1 I2C_SCL1 I2C_SDA_MICOM_SOC I2C_SCL_MICOM_SOC

I2C_SDA4 I2C_SCL4

I2C_SDA5 I2C_SCL5

I2C_SDA2 I2C_SCL2

EB_DATA[0-7]

EB_ADDR[0-14]

Place capacitor Close to the wafer

HTPDAn_Video HTPDAn_OSD

CAM_IREQ_N

CAM_CD1_N PCM_RESET CAM_REG_N

CAM_WAIT_N

EMMC_DATA[0-7]

R175 22

I2C for SIL9617

I2C for Main Amp & LCD Module

I2C for R9531AN

I2C for NVRAM

I2C for URSA9 (URSA9 Only)

I2C for tuner

I2C for tuner&LNB

R176

TCON_I2C_EN

HDMI_MUX_SEL

10K

EB_OE_N EB_BE_N1 /PCM_CE1

EB_WE_N

EB_BE_N0

EMMC_RST EMMC_CMD EMMC_CLK

C102

0.1uF JTAG

12505WS-10A00

P100

JTAG

1

2

3

4

5

6

7

8

9

10

11

EB_DATA[0] EB_DATA[1] EB_DATA[2] EB_DATA[3] EB_DATA[4] EB_DATA[5]

EB_DATA[6] EB_DATA[7]

EB_ADDR[0] EB_ADDR[1] EB_ADDR[2] EB_ADDR[3] EB_ADDR[4] EB_ADDR[5] EB_ADDR[6] EB_ADDR[7] EB_ADDR[8] EB_ADDR[9] EB_ADDR[10] EB_ADDR[11] EB_ADDR[12]

EB_ADDR[13] EB_ADDR[14]

EMMC_DATA[1] EMMC_DATA[2] EMMC_DATA[6] EMMC_DATA[5] EMMC_DATA[4] EMMC_DATA[3]

EMMC_DATA[0] EMMC_DATA[7]

+3.3V_NORMAL

AL21

PCMDATA[0]/GPIO145

AK22

PCMDATA[1]/GPIO146

AK21

PCMDATA[2]/GPIO147

AH11

PCMDATA[3]/GPIO117

AH10

PCMDATA[4]/GPIO118

AG13

PCMDATA[5]/GPIO119

AJ9

PCMDATA[6]/GPIO120

AJ12

PCMDATA[7]/GPIO121

AM23

PCMADR[0]/GPIO144

AK17

PCMADR[1]/GPIO143

AM20

PCMADR[2]/GPIO141

AL20

PCMADR[3]/GPIO140

AK19

PCMADR[4]/GPIO139

AM19

PCMADR[5]/GPIO137

AL22

PCMADR[6]/GPIO136

AM17

PCMADR[7]/GPIO135

AL15

PCMADR[8]/GPIO129

AK15

PCMADR[9]/GPIO127

AG11

PCMADR[10]/GPIO123

AG12

PCMADR[11]/GPIO125

AM22

PCMADR[12]/GPIO134

AL16

PCMADR[13]/GPIO130

AM16

PCMADR[14]/GPIO131

AL17

PCMIRQA/GPIO133

AG10

PCMOEN/GPIO124

AJ14

PCMIORD/GPIO126

AK18

PCMCEN/GPIO122

AK16

PCMWEN/GPIO132

AH12

PCMCD/GPIO149

AL18

PCMRST/GPIO148

AK20

PCMREG/GPIO142

AJ11

PCMIOWR/GPIO128

AL19

PCMWAIT/GPIO138

AK24

EMMC_RSTN/GPIO204

AK23

EMMC_CMD/GPIO206

AL24

EMMC_CLK/GPIO205

AL26

NAND_ALE/GPIO201

AG24

NAND_WPZ/GPIO200

AK26

NAND_CEZ/GPIO195

AM26

NAND_CLE/GPIO197

AM25

NAND_REZ/GPIO198

AL25

NAND_WEZ/GPIO199

AK25

NAND_RBZ/GPIO202

AH25

NAND_CE1Z/GPIO196

AH24

NAND_DQS/GPIO203

AJ24

PCM2_CD/GPIO116

JTAG

1K

R1001KR102

1K

JTAG

R101

GPIO PULL UP

+3.3V_NORMAL

OPT

R171 10K

R151 10K

R149 10K

R150 10K

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

UB83

LM14 SYSTEM

2013-10-28

01

0.22uF

LGE Internal Use Only

0.22uF

+1.1V_AVDDL_MOD

+1.1V_VDDC_CPU

+3.3V_AVDD_AU33

+3.3V_AVDD_DMPLL

+3.3V_VDDP33

VDDC15_M0

C2000.1uF

C2010.1uF C2020.22uF

0.22uF

C2030.1uF C2040.1uF

C205

C206

C2070.22uF

0.22uF

C2080.1uF C2090.1uF

+1.1V_VDDC

+1.1V_DVDD_DDR

C210 1uF 25V

+1.1V_DVDD_DDR

+3.3V_AVDD33

+3.3V_VDDP33

DVDD18_EMMC

VDDC15_M0

AVDD5V_MHL

C2110.22uF

C2120.22uF

C213

C2140.22uF

C2150.22uF

C2160.22uF

C217

C2180.22uF

C2190.22uF C2200.22uF

+1.1V_AVDDL_MOD

AB10 AB11 AC10 AC11 AA15 AB15 AC15 AB16

AA20 AA21 AA22 AA23 AA24 AB20 AB21 AB22 AB23 AB24 AC21 AC22 AC23 AC24

AF10

AF15 AF14 AE14 AF12

AF17 AF18

AB31 AB32 AD31 AD32

AE31 AE30

K10 K11 L10 L11 M10 M11 T10 T11 U10 U11 V10 V11

W21 W20

M12 M13

Y20 Y21 Y22 Y23 Y24

L7

Y19

N19 N20 P19 P20

P7 R7 U7 V7

W7 AA7 AB7 AF7 AE7

L19 L20 L21 M19 M20 M21

L22 M22 N21 N22 P21 P22

AF6

D3

A11 B11 A13 B13

M17 M18 L17 L18

R22 T22 R21 T21

IC100

LGE4331

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_14 VDDC_15 VDDC_17 VDDC_18 VDDC_13 VDDC_16 VDDC_19 AVDDV_DVI

AVDDL_MOD_1 AVDDL_MOD_2

AVDDL_SSUSB_1 AVDDL_SSUSB_2

VDDC_CPU_1 VDDC_CPU_2 VDDC_CPU_3 VDDC_CPU_4 VDDC_CPU_5 VDDC_CPU_6 VDDC_CPU_7 VDDC_CPU_8 VDDC_CPU_9 VDDC_CPU_10 VDDC_CPU_11 VDDC_CPU_12 VDDC_CPU_13 VDDC_CPU_14 VDDC_CPU_15 VDDC_CPU_16 VDDC_CPU_17 VDDC_CPU_18 VDDC_CPU_19

DVDD_NODIE

VSENSE

DVDD_DDR_1 DVDD_DDR_2 DVDD_DDR_3 DVDD_DDR_4

AVDD_NODIE AVDDP3P_ETH AVDDP3P_USB AVDDP3P_DVI_1 AVDDP3P_DVI_2 AVDDP3P_DADC AVDDP3P_ADC AVDD_AU33 AVDD_EAR33 AVDD_DMPLL

AVDD_MOD AVDD_PLL AVDD_LPLL VDDP_1

VDDP_3318_A VDDP_2

AVDD_DDR0_1 AVDD_DDR0_2 AVDD_DDR0_3 AVDD_DDR0_4 AVDD_DDR0_5 AVDD_DDR0_6

AVDD_DDR1_1 AVDD_DDR1_2 AVDD_DDR1_3 AVDD_DDR1_4 AVDD_DDR1_5 AVDD_DDR1_6

AVDD_HDMI_5V_PC

GND_EFUSE

AVDD04_DDR_A_1 AVDD04_DDR_A_2 AVDD11_DDR_A_1 AVDD11_DDR_A_2

AVDD04_DDR_B_1 AVDD04_DDR_B_2 AVDD11_DDR_B_1 AVDD11_DDR_B_2

AVDD04_DDR_A_3 AVDD04_DDR_A_4 AVDD11_DDR_A_3 AVDD11_DDR_A_4

AVDD04_DDR_B_3 AVDD04_DDR_B_4 AVDD11_DDR_B_3 AVDD11_DDR_B_4

AVDDL_MOD_3 AVDDL_MOD_4

GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8

GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98 GND_99

GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140

IC100

LGE4331

N15

AA10

GND_141

N16

GND_142

N17

GND_143

N18

GND_144

N23

GND_145

N24

GND_146

N25

GND_147

N26

GND_148

P8

GND_149

P9

GND_150

P10

GND_151

P11

GND_152

P12

GND_153

P13

GND_154

P14

GND_155

P15

GND_156

P16

GND_157

P17

GND_158

P18

GND_159

P23

GND_160

P24

GND_161

P25

GND_162

P26

GND_163

P29

GND_164

P32

GND_165

R8

GND_166

R9

GND_167

R10

GND_168

R11

GND_169

R12

GND_170

R13

GND_171

R14

GND_172

R15

GND_173

R16

GND_174

R17

GND_175

R18

GND_176

R19

GND_177

R20

GND_178

R23

GND_179

R24

GND_180

R25

GND_181

R26

GND_182

T7

GND_183

T8

GND_184

T9

GND_185

T12

GND_186

T13

GND_187

T14

GND_188

T15

GND_189

T16

GND_190

T17

GND_191

T18

GND_192

T19

GND_193

T20

GND_194

T23

GND_195

T24

GND_196

T25

GND_197

T26

GND_198

U8

GND_199

U9

GND_200

U12

GND_201

U13

GND_202

U14

GND_203

U15

GND_204

U16

GND_205

U17

GND_206

U18

GND_207

U19

GND_208

U20

GND_209

U21

GND_210

U22

GND_211

U23

GND_212

U24

GND_213

U25

GND_214

U26

GND_215

U29

GND_216

U32

GND_217

V8

GND_218

V9

GND_219

V12

GND_220

V13

GND_221

V14

GND_222

V15

GND_223

V16

GND_224

V17

GND_225

V18

GND_226

V19

GND_227

V20

GND_228

V21

GND_229

V22

GND_230

V23

GND_231

V24

GND_232

V25

GND_233

V26

GND_234

W8

GND_235

W9

GND_236

W10

GND_237

W11

GND_238

W12

GND_239

W13

GND_240

W14

GND_241

W15

GND_242

W16

GND_243

W17

GND_244

W18

GND_245

W19

GND_246

W22

GND_247

W23

GND_248

W24

GND_249

W25

GND_250

W26

GND_251

Y7

GND_252

Y8

GND_253

Y9

GND_254

Y10

GND_255

Y11

GND_256

Y12

GND_257

Y13

GND_258

Y14

GND_259

Y15

GND_260

Y16

GND_261

Y17

GND_262

Y18

GND_263

Y25

GND_264

Y26

GND_265

Y29

GND_266

Y32

GND_267

AA8

GND_268

AA9

GND_269 GND_270

A14 A17 A20 A23 A26 A29 B12 B14 B31 C3 C11 C12 C13 C14 C31 C32 D17 D20 D24 D27 D31 D32 E1 E29 E30 E31 F21 F23 F24 F25 F26 F27 F28 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G22 G23 G24 G25 G26 G27 G30 H3 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 J23 J24 J25 J26 K7 K8 K9 K12 K13 K14 K15 K16 K18 K19 K21 K23 K24 K25 K26 L8 L9 L12 L13 L14 L15 L16 L24 L25 L26 L29 L32 M7 M8 M9 M14 M15 M16 M23 M24 M25 M26 N7 N8 N9 N10 N11 N12 N13 N14

GND_271 GND_272 GND_273 GND_274 GND_275 GND_276 GND_277 GND_278 GND_279 GND_280 GND_281 GND_282 GND_283 GND_284 GND_285 GND_286 GND_287 GND_288 GND_289 GND_290 GND_291 GND_292 GND_293 GND_294 GND_295 GND_296 GND_297 GND_298 GND_299 GND_300 GND_301 GND_302 GND_303 GND_304 GND_305 GND_306 GND_307 GND_308 GND_309 GND_310 GND_311 GND_312 GND_313 GND_314 GND_315 GND_316 GND_317 GND_318 GND_319 GND_320 GND_321 GND_322 GND_323 GND_324 GND_325 GND_326 GND_327 GND_328 GND_329 GND_330 GND_331 GND_332 GND_333 GND_334 GND_335 GND_336 GND_337 GND_338 GND_339 GND_340 GND_341 GND_342 GND_343 GND_344 GND_345 GND_346 GND_347 GND_348 GND_349 GND_350 GND_351 GND_352 GND_353 GND_354 GND_355 GND_356 GND_357 GND_358 GND_359 GND_360 GND_361 GND_362 GND_363 GND_364 GND_365 GND_366 GND_367 GND_368 GND_369 GND_370 GND_371 GND_372 GND_373 GND_374 GND_375 GND_376 GND_377 GND_378 GND_379 GND_380 GND_381 GND_382 GND_383 GND_384 GND_385 GND_386 GND_387 GND_388 GND_389 GND_390 GND_391 GND_392 GND_393 GND_394 GND_395 GND_396 GND_397 GND_398 GND_399

AA11 AA12 AA14 AA16 AA17 AA18 AA19 AA25 AA26 AB8 AB9 AB12 AB13 AB14 AB17 AB18 AB19 AB25 AB26 AB27 AB28 AB29 AB30 AC7 AC8 AC9 AC12 AC13 AC14 AC16 AC17 AC18 AC19 AC20 AC25 AC26 AC27 AC28 AC29 AC30 AC31 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AE8 AE9 AE10 AE11 AE12 AE13 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AE26 AE27 AE28 AE29 AF1 AF2 AF8 AF9 AF13 AF19 AF20 AF21 AF22 AF23 AF24 AF25 AF26 AF27 AF28 AF29 AG1 AG2 AG3 AG7 AG8 AG9 AG27 AH3 AH4 AH5 AH6 AH7 AH8 AH9 AH30 AJ6 AJ7 AJ8 AJ23 AK5 AK8 AK29 AL2 AL3 AL4 AL23 AM14

+1.1V_Bypass Cap

+1.1V_CORE

MLB-201209-0120P-N2

C221 10uF 10V

+1.15V_CPU

C284 10uF 10V

+3.3V_Bypass Cap

+3.3V_NORMAL

C222 10uF 10V

+1.5V_Bypass Cap

+1.5V_DDR

VDDC15_M0

L200

BLM18PG121SN1D

C223 0.1uF

L201

5A

+1.1V_VDDC_CPU

L202

BLM18SG700TN1D

4A

C224 0.1uF

C225 0.1uF

+1.1V_VDDC

C226 0.1uF

C228 10uF 10V

C229 10uF 10V

L206 BLM18PG121SN1D

2A

L203

BLM18PG121SN1D

2A

L204

BLM18PG121SN1D

2A

L205

BLM18PG121SN1D

2A

C227 0.1uF

C230 0.1uF

0.1uF

C242

C232

C235

4.7uF

1uF

C233

C236

C243

+3.3V_AVDD_DMPLL

+3.3V_AVDD33

C238 0.1uFC239 0.1uF

+3.3V_AVDD_AU33

+3.3V_VDDP33

C231 0.1uF

C234 0.1uF

C237 10uF 10V

C240 10uF 10V

0.1uF

C241 0.1uF

C248

C249

C244 0.1uF

C245 0.1uF

0.1uF

C250

0.1uF

C251

0.1uF

C246

C247 0.1uF

C254

C255

0.1uF

C253

0.1uF

C252

0.1uF

C256

C258

C259

0.1uF

C260

0.1uF

C257

C262

C263

0.1uF

C264

0.1uF

C261

C266

C267

C265

0.1uF

C273

C270

0.1uF

C274

C271

0.1uF

C272

C268

0.1uF

C269

GND JIG POINT

5V_HDMI_3

+1.1V_VDDC

JP202

R200

10

JP203

AVDD5V_MHL

L208

BLM18SG700TN1D

4A

L207

BLM18PG121SN1D

2A

JP204

JP205

+1.1V_AVDDL_MOD

C275 0.1uF

C277 0.1uF

+1.1V_DVDD_DDR

C278 0.1uF

C276 0.1uF

C279 0.1uF

C280 0.1uF

C281 0.1uF

C282 0.1uF

C283 0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

11/05/31

UB83

LM14 POWER

2013-10-28

02

R336

LGE Internal Use Only

R335 100

100

OPT

C335

0.01uF

C334

0.01uF

HP_LOUT

HP_ROUT

Close to Main soc

HP_LOUT_MAIN

R333

22K

OPT

22K

R334

OPT

HP_ROUT_MAIN

OPT

Clock for MSD808KWD

MAIN Clock(24Mhz)

10pF

C330

10pF

C331

System Clock for Analog block(24Mhz)

GND_1

2

3

X-TAL_2

X-TAL_1

1

4

GND_2

24MHz

X300

R324

1M

XIN_MAIN

XOUT_MAIN

HDMI_RX0-

HDMI_RX0+

HDMI_RX1-

HDMI_RX1+

HDMI_RX2-

HDMI_RX2+

HDMI_CLK-

HDMI_CLK+

HDMI_TX_DDC_CLK HDMI_TX_DDC_SDA

HDMI Input from URSA9

I2C_SCL8 I2C_SDA8

SPDIF_OUT

R300 22 R301

IC100

LGE4331

V2

RXA0N

W3

RXA0P

W2

RXA1N

Y3

RXA1P

Y2

RXA2N

Y1

RXA2P

V3

RXACKN

V1

RXACKP

AC4

22

DDCDA_DA/GPIO36

AD5

HOTPLUGA/GPIO31

R2

RXB0N

T3

RXB0P

T2

RXB1N

U3

RXB1P

U2

RXB2N

U1

RXB2P

R3

RXBCKN

R1

RXBCKP

AC6

DDCDB_CK/GPIO37

AB4

DDCDB_DA/GPIO38

AC5

HOTPLUGB/GPIO32

J2

RXC0N

K3

RXC0P

K2

RXC1N

L3

RXC1P

L2

RXC2N

L1

RXC2P

J3

RXCCKN

J1

RXCCKP

Y4

DDCDC_CK/GPIO39

Y5

DDCDC_DA/GPIO40

AA5

HOTPLUGC/GPIO33

M2

RXD0N

N3

RXD0P

N2

RXD1N

P3

RXD1P

P2

RXD2N

P1

RXD2P

M3

RXDCKN

M1

RXDCKP

AA6

DDCDD_CK/GPIO41

AB6

DDCDD_DA/GPIO42

AB5

HOTPLUGD/GPIO34

W4

CEC/GPIO5

D10

SPDIF_IN/GPIO94

E10

SPDIF_OUT/GPIO95

DDCDA_CK/GPIO35

AE4

LINE_OUT_0L LINE_OUT_0R

I2S_IN_BCK/GPIO92

I2S_IN_SD/GPIO93 I2S_IN_WS/GPIO91

I2S_OUT_BCK/GPIO98 I2S_OUT_MCK/GPIO97

I2S_OUT_WS/GPIO96

I2S_OUT_SD/GPIO99 I2S_OUT_SD1/GPIO100 I2S_OUT_SD2/GPIO101 I2S_OUT_SD3/GPIO102

GPIO_PM14/GPIO24 GPIO_PM15/GPIO25 GPIO_PM16/GPIO26

LINE_IN_0L LINE_IN_0R LINE_IN_2L LINE_IN_2R

EAR_OUT_L EAR_OUT_R

ARC0

AUVAG AUVRM

AJ2 AJ1 AK3 AK1

AH2 AJ3 AJ4 AJ5

Y6

AK2 AK4

B10 C9 B9

A7 C7 A8 B8 C8 B7 C4

N4 M5 M6

2.2uF

R304 22

R305 22

C307

22pF

C308 22pF

C302 C303 C304 C305

R306 22

R307 22

C332 10uF 10V

C309 22pF

C310 22pF

MHL_DET_LM14

/MHL_OCP

COMP1/AV1/DVI_L_IN COMP1/AV1/DVI_R_IN SC_L_IN SC_R_IN

SCART_Lout SCART_Rout HP_LOUT HP_ROUT

HDMI_ARC

1uF

C333

BLM 18PG 121S N1D

AUD_SCK AUD_MASTER_CLK AUD_LRCK AUD_LRCH

L30 0

DTV/MNT_V_OUT

TU_CVBS

SC_CVBS_IN

AV1_CVBS_IN

SC_R

SC_G

SC_B

SC_ID SC_FB

COMP1_Pr

COMP1_Y

COMP1_Pb

C311

1000pF

OPT

R308 68

50V

R312 68 R313 33

68

R314

33

R315 R316 68 R317 33 C321

R318 68 R319 33

68

R320

33

R321 R322 68 R323 33

C312 0.047uF

R309 33 R310 33 R311 33

C316

0.047uF C317

0.047uF C318

0.047uF C319

0.047uF C320

0.047uF

0.047uF C322

1000pF

0.047uF

0.047uF 1000pF

C313 0.047uF C314 0.047uF C315 0.047uF

C323 C324 C325 C326 C327 C328 C329

AC2 AC3 AB2 AB3 AA1 AA3 AA2 AE5 AD6

AF3 AE2 AE3 AD2 AD3 AC1 AD1

AE6

AF4 AF5 AG5

AG6

RIN0M RIN0P GIN0M GIN0P BIN0M BIN0P SOGIN0 HSYNC0 VSYNC0

RIN1M RIN1P GIN1M GIN1P BIN1M BIN1P SOGIN1

VCOM

CVBS0 CVBS1 CVBS2

CVBSOUT1

IC100

LGE4331

ET_TX_CLK/GPIO76

ET_COL/GPIO72 ET_MDC/GPIO78

ET_TX_EN/GPIO75 ET_TXD[0]/GPIO74 ET_TXD[1]/GPIO73 ET_RXD[0]/GPIO77 ET_RXD[1]/GPIO80

ET_MDIO/GPIO79

HWRESET

XOUT

IRIN

USB0_DM USB0_DP USB1_DM USB1_DP USB2_DM USB2_DP USB3_DM USB3_DP

USB_SSTXP USB_SSTXN

USB_DM

USB_DP USB_SSRXP USB_SSRXN

AM13

TN

AK13

TP

AK12

RN

AL13

RP

AM11 AL9 AK9 AL12 AL11 AK11 AM10 AK10 AL10

H2

AM3

XIN

AM4

H1

R325

2.2

G2

R326

2.2

G3 AL14 AK14 F2 F3 E3 F1

B2 C2 C1 D2 D1 E2

R329

2.2

R332

2.2

R330

2.2

R327

2.2

R331

2.2

R328

2.2

EPHY_TDN EPHY_TDP EPHY_RDN EPHY_RDP

SOC_RESET

XIN_MAIN XOUT_MAIN

USB_DM3 USB_DP3 WIFI_DM WIFI_DP USB_DM2 USB_DP2

USB_DM1 USB_DP1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

UB83

LM14 INPUT

2013-10-28

03

M0_DDR_RESET_N

LGE Internal Use Only

M0_DDR_DQS0

M0_DDR_DQS_N0

M0_DDR_DQS1

M0_DDR_DQS_N1

M0_DDR_DM0 M0_DDR_DM1

M0_DDR_A0 M0_DDR_A1 M0_DDR_A2 M0_DDR_A3 M0_DDR_A4 M0_DDR_A5 M0_DDR_A6 M0_DDR_A7 M0_DDR_A8

M0_DDR_A9 M0_DDR_A10 M0_DDR_A11 M0_DDR_A12 M0_DDR_A13 M0_DDR_A14 M0_DDR_A15

M0_DDR_BA0 M0_DDR_BA1 M0_DDR_BA2

M0_D_CLK

M0_D_CLKN M0_DDR_CKE

M0_DDR_CS1 M0_DDR_ODT

M0_DDR_RASN M0_DDR_CASN

M0_DDR_WEN

M0_DDR_DQ0 M0_DDR_DQ1 M0_DDR_DQ2 M0_DDR_DQ3 M0_DDR_DQ4 M0_DDR_DQ5 M0_DDR_DQ6 M0_DDR_DQ7

M0_DDR_DQ8 M0_DDR_DQ9

M0_DDR_DQ10 M0_DDR_DQ11 M0_DDR_DQ12 M0_DDR_DQ13 M0_DDR_DQ14 M0_DDR_DQ15

IC400

H5TQ4G63AFR-RDC

EAN63053201

N3

DDR3

A0

P7

4Gbit

A1

P3

(x16)

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12

VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9

M0_DDR_VREFDQ

M8

H1

L8

R400

ZQ

VDDC15_M0

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

240

C410

0.1uF

C411

0.1uF

DDR3 1.5V bypass Cap - Place these caps near Memory

M0_DDR_A0 M0_DDR_A1 M0_DDR_A2 M0_DDR_A3 M0_DDR_A4 M0_DDR_A5 M0_DDR_A6 M0_DDR_A7 M0_DDR_A8

M0_DDR_A9 M0_DDR_A10 M0_DDR_A11 M0_DDR_A12 M0_DDR_A13 M0_DDR_A14 M0_DDR_A15

M0_DDR_BA0 M0_DDR_BA1 M0_DDR_BA2

M0_D_CLK

M0_D_CLKN M0_DDR_CKE

M0_DDR_CS2 M0_DDR_ODT

M0_DDR_RASN M0_DDR_CASN

M0_DDR_WEN

M0_DDR_RESET_N

M0_DDR_DQS2

M0_DDR_DQS_N2

M0_DDR_DQS3

M0_DDR_DQS_N3

M0_DDR_DM2 M0_DDR_DM3

M0_DDR_DQ16 M0_DDR_DQ17 M0_DDR_DQ18 M0_DDR_DQ19 M0_DDR_DQ20 M0_DDR_DQ21 M0_DDR_DQ22 M0_DDR_DQ23

M0_DDR_DQ24 M0_DDR_DQ25 M0_DDR_DQ26 M0_DDR_DQ27 M0_DDR_DQ28 M0_DDR_DQ29 M0_DDR_DQ30 M0_DDR_DQ31

IC401

H5TQ4G63AFR-RDC

EAN63053201

N3

DDR3

A0

P7

4Gbit

A1

P3

(x16)

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12

VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9

ZQ

NC_1 NC_2 NC_3 NC_4

M0_1_DDR_VREFDQ

M8

H1

L8

R403

VDDC15_M0 B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

J1 J9 L1 L9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

240

C440

0.1uF

C441

0.1uF

DDR3 1.5V bypass Cap - Place these caps near Memory

M1_DDR_RESET_N

M1_DDR_DQS0

M1_DDR_DQS_N0

M1_DDR_DQS1

M1_DDR_DQS_N1

M1_DDR_DM0 M1_DDR_DM1

M1_DDR_A0 M1_DDR_A1 M1_DDR_A2 M1_DDR_A3 M1_DDR_A4 M1_DDR_A5 M1_DDR_A6 M1_DDR_A7 M1_DDR_A8

M1_DDR_A9 M1_DDR_A10 M1_DDR_A11 M1_DDR_A12 M1_DDR_A13 M1_DDR_A14 M1_DDR_A15

M1_DDR_BA0 M1_DDR_BA1 M1_DDR_BA2

M1_D_CLK

M1_D_CLKN M1_DDR_CKE

M1_DDR_CS1 M1_DDR_ODT

M1_DDR_RASN M1_DDR_CASN

M1_DDR_WEN

M1_DDR_DQ0 M1_DDR_DQ1 M1_DDR_DQ2 M1_DDR_DQ3 M1_DDR_DQ4 M1_DDR_DQ5 M1_DDR_DQ6 M1_DDR_DQ7

M1_DDR_DQ8 M1_DDR_DQ9

M1_DDR_DQ10 M1_DDR_DQ11 M1_DDR_DQ12 M1_DDR_DQ13 M1_DDR_DQ14 M1_DDR_DQ15

IC403

H5TQ4G63AFR-RDC

EAN63053201

N3

DDR3

A0

P7

4Gbit

A1

P3

(x16)

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12

VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9

NC_1 NC_2 NC_3 NC_4

M1_DDR_VREFDQ

M8

H1

L8

R404

ZQ

VDDC15_M0

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

J1 J9 L1 L9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

240

C468

0.1uF

C469

0.1uF

DDR3 1.5V bypass Cap - Place these caps near Memory

M1_DDR_A0 M1_DDR_A1 M1_DDR_A2 M1_DDR_A3 M1_DDR_A4 M1_DDR_A5 M1_DDR_A6 M1_DDR_A7 M1_DDR_A8

M1_DDR_A9 M1_DDR_A10 M1_DDR_A11 M1_DDR_A12 M1_DDR_A13 M1_DDR_A14 M1_DDR_A15

M1_DDR_BA0 M1_DDR_BA1 M1_DDR_BA2

M1_D_CLK

M1_D_CLKN M1_DDR_CKE

M1_DDR_CS2 M1_DDR_ODT

M1_DDR_RASN M1_DDR_CASN

M1_DDR_WEN

M1_DDR_RESET_N

M1_DDR_DQS2

M1_DDR_DQS_N2

M1_DDR_DQS3

M1_DDR_DQS_N3

M1_DDR_DM2 M1_DDR_DM3

M1_DDR_DQ16 M1_DDR_DQ17 M1_DDR_DQ18 M1_DDR_DQ19 M1_DDR_DQ20 M1_DDR_DQ21 M1_DDR_DQ22 M1_DDR_DQ23

M1_DDR_DQ24 M1_DDR_DQ25 M1_DDR_DQ26 M1_DDR_DQ27 M1_DDR_DQ28 M1_DDR_DQ29 M1_DDR_DQ30 M1_DDR_DQ31

IC404

H5TQ4G63AFR-RDC

EAN63053201

N3

DDR3

A0

P7

4Gbit

A1

P3

(x16)

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

NC_5

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

L2

CS

K1

ODT

J3

RAS

K3

CAS

L3

WE

T2

RESET

F3

DQSL

G3

DQSL

C7

DQSU

B7

DQSU

E7

DML

D3

DMU

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

VREFCA

VREFDQ

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12

VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9

NC_1 NC_2 NC_3 NC_4

M1_1_DDR_VREFDQ

M8

H1

L8

R419

ZQ

VDDC15_M0 B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

J1 J9 L1 L9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

240

C490

0.1uF

C491

0.1uF

DDR3 1.5V bypass Cap - Place these caps near Memory

M0_DDR_RASN M0_DDR_CASN

M0_DDR_WEN M0_DDR_ODT

M0_DDR_RESET_N

M0_DDR_CS1 M0_DDR_CS2

M0_DDR_DQ0 M0_DDR_DQ1 M0_DDR_DQ2 M0_DDR_DQ3 M0_DDR_DQ4 M0_DDR_DQ5 M0_DDR_DQ6 M0_DDR_DQ7 M0_DDR_DM0

M0_DDR_DQS0

M0_DDR_DQS_N0

M0_DDR_DQ8

M0_DDR_DQ9 M0_DDR_DQ10 M0_DDR_DQ11 M0_DDR_DQ12 M0_DDR_DQ13 M0_DDR_DQ14 M0_DDR_DQ15

M0_DDR_DM1 M0_DDR_DQS1

M0_DDR_DQS_N1

M0_DDR_DQ16 M0_DDR_DQ17 M0_DDR_DQ18 M0_DDR_DQ19 M0_DDR_DQ20 M0_DDR_DQ21 M0_DDR_DQ22 M0_DDR_DQ23

M0_DDR_DM2 M0_DDR_DQS2

M0_DDR_DQS_N2

M0_DDR_DQ24 M0_DDR_DQ25 M0_DDR_DQ26 M0_DDR_DQ27 M0_DDR_DQ28 M0_DDR_DQ29 M0_DDR_DQ30 M0_DDR_DQ31

M0_DDR_DM3 M0_DDR_DQS3

M0_DDR_DQS_N3

M0_DDR_A0 M0_DDR_A1 M0_DDR_A2 M0_DDR_A3 M0_DDR_A4 M0_DDR_A5 M0_DDR_A6 M0_DDR_A7 M0_DDR_A8

M0_DDR_A9 M0_DDR_A10 M0_DDR_A11 M0_DDR_A12 M0_DDR_A13 M0_DDR_A14 M0_DDR_A15

M0_DDR_BA0 M0_DDR_BA1 M0_DDR_BA2

M0_DDR_CKE

M0_D_CLK

M0_D_CLKN

+1.5V_Bypass Cap Close to DDR Power Pin

VDDC15_M0

C407 0.1uF

C405 0.1uF

C402 0.1uF

C400 0.1uF

C401 0.1uF

F16 C16 E16 F17 B17 E17 A16 D16 C15 E15 B18 B16 D19 F15 B15 E19 E18 C17 F18 F20 F19 E20 G21 C18 F14 A19 B19 E14 D14

C22 B21 B23 C20 B24 C19 C23 C21 B20 A22 B22

F22 E24 E21 E25 D22 D26 D21 D25 E23 D23 E22

C27 C25 B28 A25 C28 C24 A28 B26 B25 B27 C26

D28 C29 E26 D29 E28 D30 E27 C30 B30 A30 B29

A_DDR3_A0 A_DDR3_A1 A_DDR3_A2 A_DDR3_A3 A_DDR3_A4 A_DDR3_A5 A_DDR3_A6 A_DDR3_A7 A_DDR3_A8 A_DDR3_A9 A_DDR3_A10 A_DDR3_A11 A_DDR3_A12 A_DDR3_A13 A_DDR3_A14 A_DDR3_A15 A_DDR3_BA0 A_DDR3_BA1 A_DDR3_BA2 A_DDR3_RASZ A_DDR3_CASZ A_DDR3_WEZ A_DDR3_ODT A_DDR3_CKE A_DDR3_RST A_DDR3_MCLK A_DDR3_MCLKZ A_DDR3_CSB1 A_DDR3_CSB2

A_DDR3_DQ[0] A_DDR3_DQ[1] A_DDR3_DQ[2] A_DDR3_DQ[3] A_DDR3_DQ[4] A_DDR3_DQ[5] A_DDR3_DQ[6] A_DDR3_DQ[7] A_DDR3_DQM[0] A_DDR3_DQS[0] A_DDR3_DQSB[0]

A_DDR3_DQ[8] A_DDR3_DQ[9] A_DDR3_DQ[10] A_DDR3_DQ[11] A_DDR3_DQ[12] A_DDR3_DQ[13] A_DDR3_DQ[14] A_DDR3_DQ[15] A_DDR3_DQM[1] A_DDR3_DQS[1] A_DDR3_DQSB[1]

A_DDR3_DQ[16] A_DDR3_DQ[17] A_DDR3_DQ[18] A_DDR3_DQ[19] A_DDR3_DQ[20] A_DDR3_DQ[21] A_DDR3_DQ[22] A_DDR3_DQ[23] A_DDR3_DQM[2] A_DDR3_DQS[2] A_DDR3_DQSB[2]

A_DDR3_DQ[24] A_DDR3_DQ[25] A_DDR3_DQ[26] A_DDR3_DQ[27] A_DDR3_DQ[28] A_DDR3_DQ[29] A_DDR3_DQ[30] A_DDR3_DQ[31] A_DDR3_DQM[3] A_DDR3_DQS[3] A_DDR3_DQSB[3]

C403 0.1uF

C404 0.1uF

IC100

LGE4331

C406 0.1uF

B_DDR3_A0 B_DDR3_A1 B_DDR3_A2 B_DDR3_A3 B_DDR3_A4 B_DDR3_A5 B_DDR3_A6 B_DDR3_A7 B_DDR3_A8

B_DDR3_A9 B_DDR3_A10 B_DDR3_A11 B_DDR3_A12 B_DDR3_A13 B_DDR3_A14 B_DDR3_A15 B_DDR3_BA0 B_DDR3_BA1 B_DDR3_BA2

B_DDR3_RASZ B_DDR3_CASZ

B_DDR3_WEZ B_DDR3_ODT B_DDR3_CKE B_DDR3_RST

B_DDR3_MCLK

B_DDR3_MCLKZ

B_DDR3_CSB1 B_DDR3_CSB2

B_DDR3_DQ[0] B_DDR3_DQ[1] B_DDR3_DQ[2] B_DDR3_DQ[3] B_DDR3_DQ[4] B_DDR3_DQ[5] B_DDR3_DQ[6]

B_DDR3_DQ[7] B_DDR3_DQM[0] B_DDR3_DQS[0]

B_DDR3_DQSB[0]

B_DDR3_DQ[8]

B_DDR3_DQ[9] B_DDR3_DQ[10] B_DDR3_DQ[11] B_DDR3_DQ[12] B_DDR3_DQ[13] B_DDR3_DQ[14] B_DDR3_DQ[15] B_DDR3_DQM[1] B_DDR3_DQS[1]

B_DDR3_DQSB[1]

B_DDR3_DQ[16] B_DDR3_DQ[17] B_DDR3_DQ[18] B_DDR3_DQ[19] B_DDR3_DQ[20] B_DDR3_DQ[21] B_DDR3_DQ[22] B_DDR3_DQ[23] B_DDR3_DQM[2] B_DDR3_DQS[2]

B_DDR3_DQSB[2]

B_DDR3_DQ[24] B_DDR3_DQ[25] B_DDR3_DQ[26] B_DDR3_DQ[27] B_DDR3_DQ[28] B_DDR3_DQ[29] B_DDR3_DQ[30] B_DDR3_DQ[31] B_DDR3_DQM[3] B_DDR3_DQS[3]

B_DDR3_DQSB[3]

+1.5V_Bypass Cap Close to DDR Power Pin

VDDC15_M0

OPT

C438 0.1uF

REFIN

VLDOIN

VOSNS

PGND

C439 0.1uF

VO

IC402

TPS51200DRCR

1

2

3

4

5

OPT

C4001 10uF 10V

11

THERMAL

[EP]

VIN

10

PGOOD

9

GND

8

EN

7

REFOUT

6

OPT

C4005

C4010

1uF

0.1uF

25V

16V

UBW2012-121F

C442

0.1uF

Close to REFOUT pin

4th layer

+3.3V_NORMAL

L401

C443 4700pF

OPT

C4000

C4011

C4004

10uF

0.1uF

1uF

10V

C409 0.1uF

C408 0.1uF

G28

M1_DDR_A0

J31

M1_DDR_A1

H29

M1_DDR_A2

J27

M1_DDR_A3

J30

M1_DDR_A4

H28

M1_DDR_A5

J32

M1_DDR_A6

G31

M1_DDR_A7

H32

M1_DDR_A8

F30

M1_DDR_A9

K30

M1_DDR_A10

H30

M1_DDR_A11

K29

M1_DDR_A12

F31

M1_DDR_A13

H31

M1_DDR_A14

L28

M1_DDR_A15

K28

M1_DDR_BA0

K31

M1_DDR_BA1

J28

M1_DDR_BA2

M27 L27 K27 M28 L31 F32 M32 L30 F29 E32

R31 N30 R30 N31 T30 M31 T31 P31 M30 R32 P30

P28 T28 N28 U28 N27 T27 N29 T29 R28 R27 P27

Y31 V31 Y30 V32 AA30 U31 AA31 V30 U30 W30 W31

V28 Y27 U27 AA28 W28 AA29 V27 AA27 W27 Y28 W29

M1_DDR_RASN M1_DDR_CASN M1_DDR_WEN M1_DDR_ODT

M1_DDR_CKE

M1_DDR_RESET_N M1_D_CLK M1_D_CLKN

M1_DDR_CS1

M1_DDR_CS2

M1_DDR_DQ0 M1_DDR_DQ1 M1_DDR_DQ2 M1_DDR_DQ3 M1_DDR_DQ4 M1_DDR_DQ5 M1_DDR_DQ6 M1_DDR_DQ7 M1_DDR_DM0

M1_DDR_DQS0 M1_DDR_DQS_N0

M1_DDR_DQ8 M1_DDR_DQ9 M1_DDR_DQ10 M1_DDR_DQ11 M1_DDR_DQ12 M1_DDR_DQ13 M1_DDR_DQ14 M1_DDR_DQ15 M1_DDR_DM1

M1_DDR_DQS1 M1_DDR_DQS_N1

M1_DDR_DQ16 M1_DDR_DQ17 M1_DDR_DQ18 M1_DDR_DQ19 M1_DDR_DQ20 M1_DDR_DQ21 M1_DDR_DQ22 M1_DDR_DQ23 M1_DDR_DM2

M1_DDR_DQS2 M1_DDR_DQS_N2

M1_DDR_DQ24 M1_DDR_DQ25 M1_DDR_DQ26 M1_DDR_DQ27 M1_DDR_DQ28 M1_DDR_DQ29 M1_DDR_DQ30 M1_DDR_DQ31 M1_DDR_DM3

M1_DDR_DQS3 M1_DDR_DQS_N3

4th layer

16V

25V

C412 0.1uF

C413 0.1uF

C415 0.1uF

AR400 100 1/16W

M0_DDR_A14

M0_DDR_A8

M0_DDR_A11

M0_DDR_A6

AR401 100

1/16W M0_DDR_A1 M0_DDR_A4

M0_DDR_A12 M0_DDR_BA1

AR402

100

M0_DDR_A13

M0_DDR_A7 M0_DDR_A9

M0_DDR_A5 M0_DDR_A2 M0_DDR_A3 M0_DDR_A0

M0_DDR_BA0 M0_DDR_BA2 M0_DDR_A15 M0_DDR_A10

M0_DDR_WEN M0_DDR_CASN M0_DDR_RASN

M0_DDR_ODT

M0_DDR_CKE

M0_D_CLKN

M0_D_CLK

1/16W

AR403 100 1/16W

AR404 100 1/16W

AR405 100 1/16W

AR406 100 1/16W

M0_DDR_RESET_N M1_DDR_RESET_N

C416 0.1uF

C418 0.1uF

C419 0.1uF

DDR_VTT

C420 0.1uF

C424 0.1uF

C425 0.1uF

C426 0.1uF

C427 0.1uF

C428 0.1uF

C429 0.1uF

C430 0.1uF

C431 0.1uF

C432 0.1uF

C433 0.1uF

C434 0.1uF

C435 0.1uF

C436 0.1uF

C437 0.1uF

C423 0.1uF

* DDR_VTT

VDDC15_M0

R401

1%

10K

C421

R402

10K

1000pF

1%

DDR_VTT

C414

0.1uF

L400

UBW2012-121F

C417 100uF

C422 22uF 10V

+1.5V_Bypass Cap Close to DDR Power Pin

VDDC15_M0

C444 0.1uF

C445 0.1uF

M1_DDR_A14

M1_DDR_A8

M1_DDR_A11

M1_DDR_A6

M1_DDR_A1

M1_DDR_A4 M1_DDR_A12 M1_DDR_BA1

M1_DDR_A13

M1_DDR_A7

M1_DDR_A9

M1_DDR_A5

M1_DDR_A2

M1_DDR_A3

M1_DDR_A0

M1_DDR_BA0 M1_DDR_BA2 M1_DDR_A15 M1_DDR_A10

M1_DDR_WEN

M1_DDR_CASN M1_DDR_RASN

M1_DDR_ODT

M1_DDR_CKE

M1_D_CLKN

M1_D_CLK

C446 0.1uF

AR407 100 1/16W

AR408 100 1/16W

AR409 100 1/16W

AR410 100 1/16W

AR411 100 1/16W

AR412 100 1/16W

AR413 100 1/16W

C447 0.1uF

C448 0.1uF

C449 0.1uF

DDR_VTT

C450 0.1uF

C451 0.1uF

C453 0.1uF

C454 0.1uF

C455 0.1uF

C456 0.1uF

C457 0.1uF

C458 0.1uF

C459 0.1uF

C460 0.1uF

C461 0.1uF

C462 0.1uF

C463 0.1uF

C464 0.1uF

C465 0.1uF

C466 0.1uF

C452 0.1uF

C467 0.1uF

OPT

OPT C4002 10uF 10V

C4006 1uF 25V

C4009

0.1uF 16V

4th layer

VDDC15_M0

R410

R411

R405 10K

1K 1%

M0_DDR_RESET_N

M0_DDR_VREFDQ

C472

0.1uF

+1.5V_Bypass Cap Close to DDR Power Pin

VDDC15_M0

C476 0.1uF

C480 0.1uF

C475 0.1uF

M0_DDR_CKE

M0_D_CLK

R412

C477

56

0.01uF

1%

50V

R413 56 1%

M0_D_CLKN

VDDC15_M0

R416

1K 1%

C474 1000pF 50V

R417

1K 1%

C481 0.1uF

R418 10K

M0_1_DDR_VREFDQ

C479

0.1uF C483 1000pF 50V

C484 0.1uF

C485 0.1uF

C486 0.1uF

C487 0.1uF

C488 0.1uF

C489 0.1uF

OPT

C4003 10uF 10V

VDDC15_M0

OPT

VDDC15_M0

R425

R426

C4007 1uF 25V

R422 10K

1K 1%

OPT

C4008

0.1uF 16V

M1_DDR_RESET_N

M1_DDR_VREFDQ

C470

0.1uF C471 1000pF 50V

4th layer

M1_DDR_CKE

R427 56 1%

R428 56 1%

VDDC15_M0

R431

R432

C497

0.01uF 50V

1K 1%

R433 10K

M1_D_CLK

M1_D_CLKN

M1_1_DDR_VREFDQ

C473

0.1uF C478

1000pF 50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

UB83

LM14 DDR

2013-10-28

04

+3.5V_ST

LGE Internal Use Only

R500

RL_ON

10K

PWM_TOUT

+3.5V_ST

L502

UBW2012-121F

C502

0.1uF 16V

+12V

C505

0.1uF 50V

PWM_DIM

PWM_TIN

UBW2012-121F

L503

L504

’14 UHD POWER

eMMC POWER

+3.3V_NORMAL

3.3V_EMMC

L501

BLM18PG121SN1D

C504

0.1uF 16V

+1.8V - eMMC 4.51(LG1311-B0) & Vx1 pull-up

+3.3V_NORMAL

C506 22uF 10V

R501 10K

R568 33

R569 33

2

G+

R561

NON_G+

1

Q500 MMBT3906(NXP)

3

100

+1.8V

BLM18PG121SN1D

DVDD18_EMMC

L505

PWR ON PDIM#1

3.5V

C509

0.1uF 16V

GND 12V 12V 12V GND 24V 24V GND

EAG63590902 P500 SMAW200-H24S5

1

2

3

4

5

6

7

8

10

9 11

12

13

14

15

16

17

18 20

19 21

22

23

24

25

C510 22uF 10V

+1.8V

INV CTL PDIM#2 GND

3.5V GND 12V 12V GND 24V 24V 24V GND

+3.5V_ST

R507 100 R562

UBW2012-121F

+12V

22

R508

100

L507

L508

LD500

+3.3V_NORMAL

R509 1K

C515 10uF 16V

R510 10K

INV_CTL

0.1uF

C516 10uF 16V

+3.3V_NORMAL

1.5K

R514

PWM_DIM2

C518

50V

C517 10uF 16V

11K

R515

C

Q501

2SC3052

+12V

L509

MLB-201209-0120P-N2

VID0

PANEL_CTL

+3.3V_NORMAL

R570 10K

R536

0 5%

+24V

B

E

PANEL_POWER

L510 MLB-201209-0120P-N2

521

C 10u F 25V

OPT

+12V

R2-1.15V

R539 120K 1%

R540 100K 1%

G

C523

0.1uF 25V

R518 10K

OPT

R516

0

L514

BLM18PG121SN1D

C537

C567

10uF

0.1uF

16V

D

2N7002A

Q504

S

Switching freq: 700K

C525

0.01uF 50V

R525 10K

R526

1.8K

B

C

Q502 2SC3052

E

C527 10uF

25V

C528 10uF

25V

Q503

AO4423

EBK61313101

D4

S1

8

1

AO4423

D3

S2

7

2

D2

S3

6

3

G

4

C529

10uF 25V

OPT

R528

D1

2K

5

OPT

EBK61313102

AO4447A

S_1

1

S_2

2

S_3

3

G

4

Core 1.1V or 1.15V

POWER_ON/OFF2_4

IC504

TPS54327DDAR

VREG5

C545 3300pF 50V

VFB

EN

SS

EAN61832901

1

2

3

4

3A

9

THERMAL

8

7

6

5

R1

C542

50V

100pF

R2-1.1V

R560

10K

R547 10K

1%

R558 16K 1%

R559

5.6K

1%

Vout=0.765*(1+R1/R2)=1.119V

Vout=0.765*(1+R1/R2)=1.154V

C543 1uF 10V

TYP 6000mA

2K

OPT

Q503-*1

D_4

8

AO4447

D_3

7

D_2

6

D_1

5

[EP]GND

VIN

VBST

SW

GND

R531

C553

0.1uF 16V

C53 1 10u F 25V OPT

PANEL_VCC

L516

3.6uH

SM-8040

C534

0.1uF 25V

C555 22uF 10V

+1.15V_CPU

C558 22uF 10V

5V

ZD503

Power_DET

PD_UHD_24V

R542-*2

9.1K 1%

PD_UHD_24V R543-*2

1.6K 1%

+12V

L511

BLM18PG121SN1D

C568

C519

0.1uF

10uF 16V

Switching freq: 700K

+12V

1%

R543-*1

1.3K 1%

PD_+12V R534

2.7K 1%

PD_+12V R535

1.2K 1%

PD_20V

R542-*1

5.6K

PD_20V

+24V

+3.5V_ST

PD_24V R542

8.2K 1%

PD_24V R543

1.5K 1%

DDR +1.5V

R519

R517

C520

100pF

50V

3.6K

18K

1%

R520 22K

1%

R2

Vout=0.765*(1+R1/R2)=1.516V

R1

PD_+3.5V

R545 0 5%

R521

10K

C522 1uF 10V

VREG5

C524 3300pF 50V

C547

0.1uF 16V

C548

0.1uF 16V

VFB

APX803D29

VCC

3

GND

PD_20_24V

APX803D29

VCC

3

GND

PD_20_24V

POWER_ON/OFF2_3

TPS54327DDAR

EN

1

2

3

SS

4

3A

R550 100K

IC505

1

R549 100K

PD_20_24V

IC506

1

IC507

9

THERMAL

2

8

7

6

5

RESET

[EP]GND

VIN

VBST

SW

GND

0.1uF C526

16V

+3.5V_ST

OPT

L512

3.6uH

SM-8040

R555 10K OPT

R556 0 5%

C530

22uF

10V

C557

0.1uF 16V

C533

0.1uF 16V

R557

0

OPT

5%

24V-->3.48V 20V-->3.51V 12V-->3.58V

ST_3.5V-->3.5V

+1.5V_DDR

C532 22uF 10V

POWER_DET

POWER_DET_1

not to RESET at 8kV ESD

IC501

AZ1117EH-ADJTRG1

EAN62868801

ADJ/GND

OUTIN

R504 75 1%

R505 33 1%

R506 1

C511 10uF 10V

C513 10uF 10V

OPT

2.5V

ZD500

MAX A

L500

BLM18PG121SN1D

Placed on SMD-TOP

C501

C500

10uF

16V

+12V

C503

0.1uF 16V OPT

+3.3V_NORMAL

IC500

BD86106EFJ

EAN62653301

PGND

VIN

AGND

[EP]

SW_2

1

8

SW_1

9

2

7

THERMAL

EN

3

6

FB

COMP

4

5

6A

R502

20K

C507

0.1uF 16V

C508

0.0068uF 50V

R503

10K

L506

2uH

POWER_ON/OFF2_1

C535 10uF 10V

C512 100uF

C514 47pF 50V OPT

R511

1.5K 1%

R512 30K 1%

R513 10K 1%

+3.3V_NORMAL

R1

R2

5V

ZD501

Vout=0.8*(1+R1/R2)

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

+1.1V or +1.13V _CORE

+12V

PGND

VIN

AGND

FB

BD86106EFJ

EAN62653301

1

2

3

4

6A

L517

BLM18PG121SN1D

Placed on SMD-TOP

C560 10uF 16V

C561

0.1uF 16V OPT

C559 10uF 16V

Vout=0.8*(1+R1/R2)

R1:10K/R2:23K, V=1.148V Voltage drop 0.042V

R1:10K/R2:21.5K, V=1.172V Voltage drop 0.042V

POWER UP SEQUENCE 5V/3.3V->1.5V/1.1V->1.0V

IC502

THERMAL

+5.0V normal & USB

R551

100K

5%

/USB_OCD3

R554

100K

5%

R2

R552

6.8K 1%

R1

R553 51K 1%

C552 1uF 10V

C569

C570

22uF

10V

+5V_NORMAL

2013-10-28

05

C556 10uF 10V

C544 2200pF

R54 1 16K 1%

RSET2

27

IC503

EAN62911501

6A

9EN10

SW_OUT211SW_OUT1

+5V_USB_2

POWER_ON/OFF1

R54 4 1 50K 1%

+5V_USB_3

50V

R546 10K

COMP25RLIM26RSET1

12

SW_EN213SW_EN1

USB_CTL2

USB_CTL3

+24V

R53 7 16K 1%

L513

120-ohm

+1.1V_CORE

L518

C563

0.0068uF 50V

R564

10K

2uH

C566 10uF 10V

POWER_ON/OFF2_4

VID1

C564 100uF

+3.3V_NORMAL

R572

10K

R571

0 5%

R2-1.13V

R573 150K 1%

R574

180K

1%

G

R565

R1

10K

C565 47pF 50V

D

2N7002A

Q505

S

1%

R566 10K 1%

R567 13K 1%

R2-1.1V

5V

ZD502

R2

[EP]

SW_2

8

SW_1

9

7

EN

6

R563

6.8K

COMP

5

C562

0.1uF 16V

C536 10uF 35V OPT

C538 10uF 35V

C540

0.1uF 50V

25V

1uF

C53 9

0.0068uF

AGND

[EP]

28

VIN_1

1

THERMAL

VIN_2

2

VIN_3

PGND_1

PGND_2

PGND_3

R533 0 5%

C541

50V

29

3

4

SN1302001(TPS65286RHDR)

5

6

V7V

7

8

MODE/SYNC

10K

R538

OPT

22SS23FB24

21

20

19

18

17

16

15

14

NFAULT2

/USB_OCD2

C546 100pF 50V

C549

0.047uF 25V

C551

82pF

R548

50V

L515

4.7uH

C550

0.047uF

0

25V

LX_3

LX_2

LX_1

BST

SW_IN2

SW_IN1

NFAULT1

Vout=0.6*(1+R1/R2)

UB83

POWER

Renesas MICOM

LGE Internal Use Only

For Debug

+3.5V_ST

MICOM_DEBUG

P600

12507WS-04L

5

1

2

3

4

Don’t remove R612, not making float P40

R611 1K

R608 10K

MICOM_DEBUG

MICOM_RESET

LM14 Power SEQUENCE

POWER_ON/OFF!(5V)

POWER_ON/OFF2_1(3.3V)

POWER_ON/OFF2_3(1.5V)

POWER_ON/OFF2_4(1.1V)

SOC_RESET

MICOM MODEL OPTION

+3.5V_ST

MODEL_OPT_0

MODEL_OPT_1

OPT

R626 10K

R600 10K

MICOM_GED

OPT

R631 10K

R601 10K

MICOM_NON_GED

OPT

R602 10K

MICOM_LM14

OPT

R603 10K

OPT

R606 10K

R604 10K

R605 10K

R609 10K

MODEL1_OPT_0

MODEL1_OPT_1

MODEL1_OPT_2

MODEL1_OPT_3

MODEL1_OPT_4

MODEL1_OPT_5

OPT

R607 10K

R610 10K

MODEL_OPT_2

MODEL_OPT_3

MODEL_OPT_4

MODEL_OPT_5

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

0

NON_GED

I2C_SCL_MICOM

I2C_SDA_MICOM

MODEL1_OPT_4

PANEL_CTL

WOL/WIFI_POWER_ON

HDMI_CEC_MICOM

MODEL1_OPT_5

POWER_ON/OFF2_3

CAM_SLEEP CAM_SLEEP

TP600

EYE_SDA

EYE_SCL

+3.5V_ST

12pF

C602

C603 12pF

CAM_PWR_ON_CMD

HDMI_WAUP:HDMI_INIT

+3.5V_ST

C600

0.1uF

MHL_DET_LM14

+3.5V_ST

R614 10K

MHL_DET_LM14

P60/SCLA0 P61/SDAA0

P62 P63

P31/TI03/TO03/INTP4

IR

P75/KR5/INTP9/SCK01/SCL01

P74/KR4/INTP8/SI01/SDA01

P73/KR3/SO01 P72/KR2/SO21

P71/KR1/SI21/SDA21

P70/KR0/SCK21/SCL21

P30/INTP3/RTC1HZ/SCK11/SCL11

R613

3.3K

R612

3.3K EYE_Q

EYE_Q

R615

1 2 3 4 5 6 7 8 9 10 11 12

10K

TP601

GND

C601 0.47uF

REGC

VSS

VDD

46

47

48

R5F100GEAFB#30

13

14

15

X600

32.768KHz R616

4.7M OPT

POWER_DET_1

CAM_PWR_ON_CMD

P123/XT1

P137/INTP0

P122/X2/EXCLK

P121/X1

42

43

44

45

IC600

EAN62632101

16

17

18

19

MICOM_RESET

R617 22

P40/TOOL0

RESET

P124/XT2/EXCLKS

39

40

41

20

21

LOGO_LIGHT

MICOM_DEBUG

LOGO_LIGHT

C604

0.1uF 16V

P120/ANI19

P41/TI07/TO07

37

38

36 35 34 33 32 31 30 29 28 27 26 25

22

23

24

+3.5V_ST

10K

MICOM_RESET_SW

270K

OPT

CAM_RESET

SW600

JTP-1127WEM

4 3

12

R618

R619

P140/PCLBUZ0/INTP6 P00/TI00/TXD1 P01/TO00/RXD1 P130 P20/ANI0/AVREFP P21/ANI1/AVREFM P22/ANI2 P23/ANI3 P24/ANI4 P25/ANI5 P26/ANI6 P27/ANI7

CAM_RESET

MODEL1_OPT_0

SIDE_HP_MUTE

MODEL1_OPT_2

MODEL1_OPT_1

RL_ON

SCART_MUTE

POWER_ON/OFF2_4

POWER_ON/OFF2_1

KEY2

KEY1

R623

0 OPT

SCART_MUTE

POWER_ON/OFF2_4

MODEL1_OPT_3

P146

1

Reserved

LM14

Reserved

GED

P17/TI02/TO02

P51/INTP2/SO11

P50/INTP1/SI11/SDA11

OPT

R627 22

P16/TI01/TO01/INTP5

POWER_DET

POWER_ON/OFF1

P13/TXD2/SO20

P14/RXD2/SI20/SDA20

P12/SO00/TXD0/TOOLTXD

P15/PCLBUZ1/SCK20/SCL20

OPT

R629 22

LED_R

LM14 : Active high reset H13 : Active low reset

P11/SI00/RXD0/TOOLRXD/SDA00

SOC_TX

INV_CTL

R630 10K

MICOM_LM14

SOC_RESET

P147/ANI18

P10/SCK00/SCL00

SOC_RX

AMP_MUTE

URSA_RESET_MICOM

EDID_WP EDID_WP

HDMI_CEC

UB83

D600

BAT54_SUZHO

D

R620 27K

G

Q600-*1 SI1012CR-T1-GE3

S

HDMI_CEC_FET_VISHAY

For CEC

+3.5V_ST

G

D

S

Q600 RUE003N02 HDMI_CEC_FET_ROHM

2013-10-28

R621

120K

HDMI_CEC_MICOM

MICOM 06

HDMI (HDMI1 HDCP2.2 / HDMI2 ARC / HDMI4 MHL)

LGE Internal Use Only

S3200

RAC33437501

SPI_CK_R9531

R3257

R3263 5.1

R3264

R3273 5.1

R3274

R3276 5.1

R3277

R3299 5.1

CVDD10_R9531

DVDD10_R9531

AVDD33_R9531

S3201

S3202

S3203

S3204

R3204 33

SD0_IN_SPDIF0_IN

5.1

R9531_RESET

SCLK_GPIO9

RSVDL_1

CVDD10_1 AVDD10_1 AVDD33_1 RSVDNC_1 RSVDNC_2 RSVDNC_3 RSVDNC_4 RSVDNC_5 RSVDNC_6 RSVDNC_7 RSVDNC_8 RSVDNC_9

Q3202

SI1012CR-T1-GE3

GPIO5

GPIO6

R0XCR0XC+ R0X0R0X0+ R0X1R0X1+ R0X2R0X2+

+3.3V_NORMAL

S

D

HDMI_3.3V

+1.0V_R9531

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

G

C3203

SI1012CR-T1-GE3

AR3208

33

AVDD33_R9531

SPI_DI_R9531

RSVDNC_35

RSVDNC_36

IOVCC33

SDO_GPIO10

SDI_GPIO11

SS_GPIO8

[EP]

95

96

97

98

99

100

THERMAL

101

26

RSVDNC_1027RSVDNC_1128RSVDNC_1229RSVDNC_1330RSVDNC_1431RSVDNC_15

PWRMUX_OUT

CVDD10_R9531

R3252

10K

3.3V_Sil9617

L3202

BLM18PG121SN1D

C3218

0.1uF 16V

C3209

C3210

0.1uF

10uF

16V

10V

D2+_HDMI_TX_MHL D2-_HDMI_TX_MHL D1+_HDMI_TX_MHL D1-_HDMI_TX_MHL D0+_HDMI_TX_MHL D0-_HDMI_TX_MHL CK+_HDMI_TX_MHL CK-_HDMI_TX_MHL

SIL9617_RESET

SIL9617_INT

+3.3V_NORMAL

S

Q3203

G

D

SPI_CS_R9531 SPI_DO_R9531

CVDD10_R9531

RSVDNC_28

RSVDNC_29

RSVDNC_30

RSVDNC_31

RSVDNC_32

RSVDNC_33

RSVDNC_34

88

89

90

91

92

93

94

IC3202

R9531AN

32

35

CVDD10_233AVDD10_234AVDD33_2

RSVDNC_1636RSVDNC_1737RSVDNC_1838RSVDNC_1939RSVDNC_2040RSVDNC_2141RSVDNC_2242RSVDNC_23

DVDD10_R9531

AVDD33_R9531

+5V_NORMAL

L3208

BLM18PG121SN1D

C3219 22uF 10V

C3211

0.1uF 16V

AVDD10_1

RSVD_1 RSVD_2 RSVD_3 RSVD_4 RSVD_5 RSVD_6 RSVD_7

RSVD_8 VDD10_1 TAVDD10

TX2P TX2N TX1P TX1N TX0P TX0N TXCP TXCN

PWRMUX_OUT_SIL9617

10K

R3201

+3.3V_NORMAL

R3200

47K

ARCRX_TX

87

3.3V_Sil9617

1 2

THERMAL

3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

20

TPWR_CI2CA

4.7K

R3210

R3209

47K

DVDD10_R9531

D1-_HDMI_TX_R9531

D0-_HDMI_TX_R9531

D0+_HDMI_TX_R9531

43

RESET_N

5V_MHL

C3236

0.1uF 16V

77

21

22

23

24

25

INT

RSVDL_1

RESET_N

CD_SENSE

DSDA4[VGA]26DSCL4[VGA]

MHL_DET

T0X1-83T0X1+84T0X2-85T0X2+86CVDD10_3

CI2CA_TPWR

BODY_SHIELD

VA3200

ESD_HDMI

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

05008WR-H19C.

JK3200

VA3201

ESD_HDMI

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

05008WR-H19C.

JK3201

VA3202

ESD_HDMI

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

05008WR-H19C.

JK3202

5V_HDMI_1

HOT_PLUG_DETECT

VDD[+5V]

DDC/CEC_GND

SDA

SCL

RESERVED

CEC

TMDS_CLK-

TMDS_CLK_SHIELD

TMDS_CLK+

TMDS_DATA0-

TMDS_DATA0_SHIELD

TMDS_DATA0+

TMDS_DATA1-

TMDS_DATA1_SHIELD

TMDS_DATA1+

TMDS_DATA2-

TMDS_DATA2_SHIELD

TMDS_DATA2+

5V_HDMI_2

HOT_PLUG_DETECT

VDD[+5V]

DDC/CEC_GND

SDA

SCL

RESERVED

CEC

TMDS_CLK-

TMDS_CLK_SHIELD

TMDS_CLK+

TMDS_DATA0-

TMDS_DATA0_SHIELD

TMDS_DATA0+

TMDS_DATA1-

TMDS_DATA1_SHIELD

TMDS_DATA1+

TMDS_DATA2-

TMDS_DATA2_SHIELD

TMDS_DATA2+

5V_HDMI_3

HOT_PLUG_DETECT

VDD[+5V]

DDC/CEC_GND

SDA

SCL

RESERVED

CEC

TMDS_CLK-

TMDS_CLK_SHIELD

TMDS_CLK+

TMDS_DATA0-

TMDS_DATA0_SHIELD

TMDS_DATA0+

TMDS_DATA1-

TMDS_DATA1_SHIELD

TMDS_DATA1+

TMDS_DATA2-

TMDS_DATA2_SHIELD

TMDS_DATA2+

R3206

R3207

R3216

5V_DET_HDMI_1

R3220

1.8K

3.3K

HDMI_CEC

ESD_HDMI

VA3205

5V_DET_HDMI_2

R3221

1.8K

3.3K

HDMI_CEC

ESD_HDMI

VA3206

5V_DET_HDMI_3

R3222

1.8K

3.3K

HDMI_CEC

ESD_HDMI

VA3208

HDMI1 With HDCP2.2

R3298

VA3204

OPT

VA3203

ESD_HDMI

33

D3202 IP4294CZ10-TBR

1 2 3 4 5

D3203 IP4294CZ10-TBR

1 2 3 4 5

HDMI_HPD_1

AR3207 33 1/16W

DDC_SDA_1_R9531 DDC_SCL_1_R9531

VA3207

OPT

10

CK-_HDMI1_R9531

9

CK+_HDMI1_R9531

8

OPT

7

D0-_HDMI1_R9531

6

D0+_HDMI1_R9531

10

D1-_HDMI1_R9531

9

D1+_HDMI1_R9531

8

OPT

7

D2-_HDMI1_R9531

6

D2+_HDMI1_R9531

HDMI2 With ARC

R3223

VA3212

VA3213

VA3209 ESD_HDMI

OPT

VA3211 ESD_HDMI

OPT

R3225

33

D3200 IP4294CZ10-TBR

1 2 3 4 5

D3201 IP4294CZ10-TBR

1 2 3 4 5

33

D3204 IP4294CZ10-TBR

1 2 3 4 5

D3205 IP4294CZ10-TBR

1 2 3 4 5

HDMI_HPD_2

AR3202 33 1/16W

DDC_SDA_2

DDC_SCL_2

VA3214

OPT

10

CK-_HDMI2_JACK

9

CK+_HDMI2_JACK

8

OPT

7

D0-_HDMI2_JACK

6

D0+_HDMI2_JACK

10

D1-_HDMI2_JACK

9

D1+_HDMI2_JACK

8

OPT

7

D2-_HDMI2_JACK

6

D2+_HDMI2_JACK

HDMI_HPD_3_MHL

AR3204 33 1/16W

DDC_SDA_MHL

DDC_SCL_MHL

VA3215

OPT

10

CK-_HDMI3_JACK

9

CK+_HDMI3_JACK

8

OPT

7

D0-_HDMI3_JACK

6

D0+_HDMI3_JACK

10

D1-_HDMI3_JACK

9

D1+_HDMI3_JACK

8

OPT

7

D2-_HDMI3_JACK

6

D2+_HDMI3_JACK

VA3216

ESD_HDMI

C3200

0.1uF 16V

OPT

5V_HDMI_2

C3201

R3230

1K

OPT

R3231

HDMI_ARC

1uF

10V

OPT

C3202

0.1uF

3.9K 16V

HDMI3 With MHL

R3228 1K

1/16W 5%

R3232

R3233

180K

120K

B Q3201 MMBT3904(NXP)

ARC

+3.5V_ST

R3234

10K

Solder Preform Attach at R9531 thermal pad

CK-_HDMI1_R9531

CK+_HDMI1_R9531

D0-_HDMI1_R9531

D0+_HDMI1_R9531

D1-_HDMI1_R9531

D1+_HDMI1_R9531

D2-_HDMI1_R9531

D2+_HDMI1_R9531

E

R3235

MMBT3906(NXP)

10K

Q3205

B

C

E

MHL_DET

(CD_SENCE)

CK+_HDMI_TX_R9531

D2+_HDMI_TX_R9531

D1+_HDMI_TX_R9531

D2-_HDMI_TX_R9531

T0XC-78T0XC+79T0X0-80T0X0+81TDVDD10

82

44

45

46

48

INT

DSDA047DSCL0

R0PWR5V

CBUS_HPD0

10K

R3282

R3283 4.7K

HDMI_HPD_1

DDC_SDA_1_R9531

DDC_SCL_1_R9531

AVDD33_R9531

D0+_HDMI3_JACK

D1-_HDMI3_JACK

D2-_HDMI3_JACK

D1+_HDMI3_JACK

D2+_HDMI3_JACK

IC3206

SIL9617

27

RSVDH_128RSVDH_229RSVDL_230RSVDL_331RSVDH_332RSVDH_433RSVDL_434RSVDL_5

5.1KR3212

R3213 47K

R3211 47K

DVDD10_R9531

CK-_HDMI_TX_R9531

TPVDD10

76

77

75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

49

50

PWRMUX_OUT

VCC33_OUT

C3276 10uF 10V

R3254 10

R3253

C3275

5.1K

1uF

D0-_HDMI3_JACK

5.1

CK-_HDMI3_JACK

CK+_HDMI3_JACK

R3202

R3203 5.1

AVDD10_259VDD33_160R1XCN61R1XCP62R1X0N63R1X0P64R1X1N65R1X1P66R1X2N67R1X2P68RSVD_969RSVD_1070RSVD_1171RSVD_1272RSVD_1373RSVD_1474RSVD_1575RSVD_1676VDD33_277[EP]GND

58

35

37

38

DSDA136DSCL1

R1PWR5V

CBUS_HPD1

DDC_SCL_MHL

DDC_SDA_MHL

HDMI_HPD_3_MHL

5.1KR3215

R9531_XTAL_IN

XTALGND XTALIN XTALOUT XTALVCC33 APLL10 RSVD_9 TX_HPD0 TX_DSCL0 TX_DSDA0 RSVDNC_27 RSVDNC_26 RSVD_8 RSVD_7 RSVD_6 RSVDNC_25 RSVD_5 RSVD_4 RSVD_3 RSVDNC_24 RSVD_2 RSVD_1 CSDA CSCL RSVDL_2 SBVCC5V

C3277

0.1uF 16V

5V_MHL

MHL_DET

R0X2P

57

R0X2N

56

R0X1P

55

R0X1N

54

R0X0P

53

R0X0N

52

R0XCP

51

R0XCN

50

VDD10_2

49

ARC

48

SPDIF_IN

47

CSCL

46

CSDA

45

PWRMUX_OUT

44

SBVCC5

43

R0PWR5V

42

CBUS_HPD0

41

DSCL0

40

DSDA0

39

R3224 47K

4.7K

C3249

0.1uF 16V

R3227

+5V_NORMAL

R3226 47K

C3267 18pF 50V

R3284

R3285

R3286

R3287

R3288

R3290

R3291

R3292

R323633

R323733

C3273 10uF 10V

10K

R3229 47K

X-TAL_1

GND_13X-TAL_2

XTAL_VCC33_R9531

APLL10_R9531

R3912 0

R3913 0

AVDD33_R9531

I2C_SDA6

I2C_SCL6

+5V_NORMAL

C3274

0.1uF 16V

5V_HDMI_1

ZD3200 5V OPT

R3294

10K

D2+_HDMI2_JACK D2-_HDMI2_JACK D1+_HDMI2_JACK D1-_HDMI2_JACK

R3255

5.1

R3256 5.1

CK+_HDMI2_JACK CK-_HDMI2_JACK

R3238 33 R3239 33

C3315

1uF 10V

R3246

47K

R3297 120K

X3201 27MHz

GND_2

4

1

2

R9531_XTAL_IN

R9531_XTAL_OUT

+5V_NORMAL

R32931.8K

R32961.8K

Current Limit

IC3207

TPS2553DBV

IN

1

GND

2

EN

3

PWRMUX_OUT_SIL9617

I2C_SCL8 I2C_SDA8

HDMI_HPD_2 DDC_SCL_2 DDC_SDA_2

5V_HDMI_3

R3320 10

R3321

5.1K

C3270 18pF 50V

6

5

4

/MHL_OCP

D0+_HDMI2_JACK D0-_HDMI2_JACK

R3249 10

R9531_XTAL_OUT

DDC_SDA_1

DDC_SCL_1

OUT

ILIM

R3295

FAULT

C3213

10uF

+5V_NORMAL

1%

20K

R9531 +1.0V

POWER_ON/OFF2_4

+3.3V_NORMAL

C3240

0.1uF 16V

+1.0V_R9531

BLM18PG121SN1D

HDMI_3.3V

BLM18PG121SN1D

5V_HDMI_3

R3914

BLM31PG500SN1

50-ohm

D3211

30V

C3242

OPT

R3289

10uF

100K

10V

/MHL_OCP

TP3203

5V_HDMI_2

R3251 10

C3220

R3250

5.1K

1uF 10V

AP2132MP-2.5TRG1

OPT

10K

R3915

R3279

10K

C3243

0.1uF

+5V_NORMAL

C3241 1uF

Vout=0.6*(1+R1/R2)

CVDD10_R9531

L3210

C3279

C3246

10uF

10V

APLL10_R9531

L3207

C3244

C3282

10uF

0.1uF

10V

16V

L3211

L3215

L3213

DVDD10_R9531

C3257

C3278

10uF

2.2uF

10V

C3294

C3292

10uF

10V

XTAL_VCC33_R9531

C3290

C3293

10uF

0.1uF

10V

16V

AVDD33_R9531

3.3V Power Separation

+5V_NORMAL

R3208

10K

S AO3438 Q3204

C3269

C3268

22uF

100uF

10V

6.3V

From HDMI2&3_SIL9617

D2+_HDMI_TX_MHL D2-_HDMI_TX_MHL D1+_HDMI_TX_MHL D1-_HDMI_TX_MHL D0+_HDMI_TX_MHL D0-_HDMI_TX_MHL CK+_HDMI_TX_MHL CK-_HDMI_TX_MHL

TI 2:1 Mux

From HDMI2&3_SIL9617

From HDMI1_R9531AN

IC3204

1

PG

2

EN

3

VIN

4

VCTRL

EAN61387601

C3284

0.1uF 16V

C3288

C3280

0.1uF

0.1uF 16V

16V

C3298

0.1uF 16V

G

D

D2+_HDMI_TX_MHL D2-_HDMI_TX_MHL D1+_HDMI_TX_MHL D1-_HDMI_TX_MHL D0+_HDMI_TX_MHL D0-_HDMI_TX_MHL CK+_HDMI_TX_MHL CK-_HDMI_TX_MHL

D2+_HDMI_TX_R9531 D2-_HDMI_TX_R9531 D1+_HDMI_TX_R9531 D1-_HDMI_TX_R9531 D0+_HDMI_TX_R9531 D0-_HDMI_TX_R9531 CK+_HDMI_TX_R9531 CK-_HDMI_TX_R9531

else : Max 0.7A

[EP]

8

GND

9

7

ADJ

THERMAL

6

VOUT

5

2A

NC

C3289

0.1uF 16V

C3266

C3245

0.1uF

0.1uF 16V

16V

C3299

C3271

0.1uF

16V

HDMI_3.3V+3.3V_NORMAL

C3235 10uF 10V

+1.0V_R9531

1.8K

R2

R3280

R1

1.2K

R328 1

C3262 10uF 10V

DDC_SCL_1 DDC_SDA_1

TS3DV642A0RUAR

ZD3202

2.5V OPT

IC3302

D0+A D0-A D1+A D1-A D2+A D2-A D3+A D3-A NC_2 D0+B D0-B B1+B B1-B D2+B D2-B D3+B D3-B

SPI FLASH (2MBit)

SPI_CS_R9531

SPI_DO_R9531

R9531_FLASH_WP

DDC pull-up

+5V_NORMAL

5V_HDMI_1

AR3201

47K

1/16W

DDC_SDA_MHL DDC_SCL_MHL

R35040

R35050

+3.3V_MUX

OPT

SDA_B40SCL_B41SDA_A42SCL_A43[EP]GND

39

THERMAL

VCC

1

EN

2

SCL

3

SDA

4

D0+

5

D0-

6

D1+

7

D1-

8

NC_1

9

D2+

10

D2-

11

D3+

12

D3-

13

HPD

14

CEC

15

SEL1

16

SEL2

17

18

38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

R3275

A2CA1 MMBD6100 D3218

R3300 0

DO[IO1]

33

GND

DDC_SDA_1_R9531

DDC_SCL_1_R9531

R3318

3.3K

IC3203

W25X20CLSNIG

CS

1

2

WP

3

4

5V_HDMI_2

MUX_EN

OPT

R3500 33

OPT

R3501 33

AR3200

47K

1/16W

C3301

0.1uF 16V

+3.3V_NORMAL

HDMI_RX2+_URSA9_0_RP HDMI_RX2-_URSA9_0_RP HDMI_RX1+_URSA9_0_RP HDMI_RX1-_URSA9_0_RP HDMI_RX0+_URSA9_0_RP HDMI_RX0-_URSA9_0_RP HDMI_CLK+_URSA9_0_RP HDMI_CLK-_URSA9_0_RP

HDMI_MUX_SEL

VCC

8

HOLD

7

CLK

6

DIO[IO0]

5

+5V_NORMAL

A2CA1

MMBD6100 D3208

OPT R3502 10K

+3.3V_NORMAL

R3278

10K

DDC_SDA_2

DDC_SCL_2

C3300

10uF

10V

OPT

R3503 10K

+3.3V_NORMAL

10K

R3319

C3239

0.1uF

C3281

0.1uF

+3.5V_ST

RXBSCL_URSA9

RXBSDA_URSA9

SPI_CK_R9531

SPI_DI_R9531

+5V_NORMAL

5V_HDMI_3

A2CA1 MMBD6100 D3209

AR3203

47K

1/16W

DDC_SCL_MHL

DDC_SDA_MHL

+3.3V_MUX

+3.3V_NORMAL

BLM18PG121SN1D

C3314 22uF 10V

HDMI OUTPUT_0 DDC to URSA9

A2CA1 MMBD6100 D3210

L13413

+3.3V_MUX

CEC_A19HPD_A20CEC_B21HPD_B

SEL2(LM14_GPIO116) Function

Low CH A (HDMI2&3_SIL9617) enable

High CH B (HDMI1_R9531AN) enable

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

UB83

HDMI JACK

2013-10-28

07