5
LA36 Switchable Graphics System Schematics
DDR3
Thermal
Sensor
D D
EMC2103
UNBUFFERED
DDR3 SODIMM
Socket1
204-PIN DDR3 SODIMM
UNBUFFERED
DDR3 SODIMM
Socket2
Mic in
HD AUDIO CODEC
ALC272-GR
C C
Headphone out
OP AMP
G1454R41U
INT.SPKR x2
SATA HDD
B B
Micro-SD
5-in-1
Slot
34
A A
SATA CONN
E-SATA CONN
E-SATA USB 2.0
MediaCard Reader
Realtek/5138
Bluetooth
Camera
Finger Printer
USB 2.0
USB 2.0
USB 2.0
Clock GEN
CK505
30
30
3
Channel A
DDR3 800/1066
Channel B
DDR3 800/1066
HDA Link
SATA Port 0
SATA Port 5
USB 2.0 PORT4
USB 2.0 PORT8
PORT9
PORT13
PORT10
PORT1
PORT2
PORT5
Intel CPU
Auburndale
(Dual Core)
DDR3 800/1066MHz
4,5,6,7,8,9,10
PCH HM55
Serial ATA (4 ports)
PCI Express (8 ports)
AC97 2.3/Azalia Interface
11,12,13,14,15,16,17,18,19
SPI
SPI FLASH
4MB
35
USB 2.0
Intel
USB 2.0 (12 ports)
ACPI 2.0
LPC I/F
PCI Rev 2.3
INT. RTC
Multi-touch
Touchpad
PCIe 16X Gen2
DMI x4 FDI
LVDS
RGB
PCI Express 1
USB 2.0 PORT3
PCI Express 3
USB 2.0 PORT12
PCI Express 2
HDMI
LPC Bus / 33MHz
KBC
Nuvoton NPCE781E
Int. KB
35
34
33
20
21
26
26
26
31
27
23
35
27
27
27
VRAM
512MB / 1GB
PortA
NVIDIA
N11M-LP1
48,49,50,51,52,53,54
RGB
MUX
GLAN
AR8131
Mini PCI-E
WLAN Card
Mini PCI-E
WWAN Card
Redriver
G-Sensor
SPI Flash
128Kb
35
Project Code: 91.4JG01.001
PCB(Raw Card): 09939-1
X4
55,56
HDMI
LVDS
LVDS
22
28
32
32
34
35
RGB
Transformer RJ45
SIM Slot
HDMI
LPC Debug
Board Conn
35
HDMI CONN
13.3'' WUXGA
(WSXGA) LCD
CRT CONN
29
32
HDMI CONN
PCB LAYER
L1: Top
L2: VCC/GND
L3: Signal
L4: Signal
L5: GND
L6: Boot
Finger Printer BD
25
BT BD
AV BD
23
24
29
25
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU DC/DC
ISL62882
INPUTS
DCBATOUT
SYSTEM DC/DC
INPUTS
SYSTEM DC/DC
DCBATOUT
SYSTEM DC/DC
INPUTS OUTPUTS
DCBATOUT
SYSTEM DC/DC
DCBATOUT
INPUTS
INPUTS
1D5V_S3 DDR_VREF_S3
SYSTEM DC/DC
DCBATOUT
SYSTEM DC/DC
DCBATOUT
INPUTS
DCBATOUT
Block Diagram
Block Diagram
Block Diagram
LA36 MB
LA36 MB
LA36 MB
OUTPUTS
VCC_CORE
RT8223BGQW
OUTPUTS
5V_AUX_S5
3D3V_AUX_S5
5V_S5 DCBATOUT
3D3V_S5
RT8209E
OUTPUTS INPUTS
1D5V_S3
RT8209E
1D05V_S0
RT8209E
OUTPUTS INPUTS
1D05V_VTT
LDO
RT9025
OUTPUTS
1D8V_S0 3D3V_S5
LDO
RT9026
OUTPUTS
0D75_S0
ISL62881
OUTPUTS INPUTS
VCC_GFXCORE
RT8208A
OUTPUTS INPUTS
VGA_CORE_S0
CHARGER
BQ24745
OUTPUTS
BT+
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hs ichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hs ichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hs ichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
1 58 Monday, March 22 , 2010
1 58 Monday, March 22 , 2010
1 58 Monday, March 22 , 2010
40,41
42
44
44
45
46
46
47
45
43
-1
-1
-1
5
Processor Strapping
Pin Name Strap Description Configuration (Default value for each bit is
CFG[4] Disabled - No Physical Display Port attached to
DisplayPort
Presence
CFG[3]
PCI-Express Static
CFG[0]
CFG[7]
Lane Reversal
PCI-Express
Configuration
Select
Reserved Temporarily used
for early
Clarksfield
samples.
D D
1 unless specified otherwise)
1: Embedded
Embedded DisplayPort.
0: Enabled - An external Display Port device is
connected to the Embedded Display Port.
1:0: Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
1:0: Single PCI-Express Graphics
Bifurcation enabled
Clarksfield (only for early samples pre-ES1) Connect to GND with 3.01K Ohm/5% resistor
Note: Only temporary for early CFD samples
(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.
PCH Strapping
Name Schematics Notes
SPKR
INIT3_3V# Weak internal pull-down. Do not pull high.
GNT3#/
GPIO55
INTVRMEN High (1) = Integrated VRM is enabled
C C
GNT0#,
GNT1#
GNT2#/
GPIO53
GPIO33 Default:
SPI_MOSI
NV_ALE Enable Danbury:
NC_CLE Weak internal pull-up. Do not pull low.
HAD_DOCK_EN#
/GPIO[33]
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC
GPIO15
B B
GPIO8
GPIO27 Default = Do not connect (floating)
N11M-GE Power Sequence
VDD33
PEX_VDD
NVVDD
IFPAB_IOVDD
FBVDDQ
Reboot option at power-up
Internal weak Pull-down.
Default Mode:
Connect to Vcc3_3 with 8.2-kΩ
No Reboot Mode with TCO Disabled:
- 10-kΩ weak pull-up resistor.
Default Mode:
Internal pull-up.
(Connect to ground with 4.7-kΩ weak
Low (0) = Top Block Swap Mode
pull-down resistor).
Low (0) = Integrated VRM is disabled
Default (SPI):
Left both GNT0# and GNT1# floating. No pull up
required.
Boot from PCI: Connect GNT1# to ground with 1-kΩ pull-down
resistor. Leave GNT0# Floating.
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-kΩ
pull-down resistor.
Default - Internal pull-up.
= Configures DMI for ESI compatible operation (for servers
Low (0)
only. Not for mobile/desktops).
Do not pull low.
Connect to ground with 1-kΩ
Disable ME in Manufacturing Mode:
pull-down resistor.
Enable iTPM:
Connect to Vcc3_3 with 8.2-kΩ weak pull-up resistor.
Left floating, no pull-down required.
Disable iTPM:
Connect to Vcc3_3 with 8.2-kΩ weak pull-up
resistor.
Connect to ground with 4.7-kΩ weak pull-down
Disable Danbury:
resistor.
Low (0):
Flash Descriptor Security will be overridden.
Flash Descriptor Security will be in effect.
High (1) :
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-up. Do not pull low.
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
PEX_VDD can ramp up any time
tNVVDD
tNV-IFPAB_IOVDD
tNV-FBVDDQ
Default
Value
1
1
1
0
4
3
2
1
Sequence AC
AV PANEL
PLANAR_ID[1..0]
KBC GPIn
PLANAR_IDn
31
1
0
0
1 0
1 1
23
0
0
1
DDR_VREF _S3 20,21,46
VCC_GFXCO RE 8,37,47
3D3V_S0_NV 43,48,49,51,52,53
VGA_CORE_S0 43,48,49
1D8V_S0_NV 48,52
FBVDD 48,50,55,56,57
1D05V_S0_NV 48,49,50,52,53
Planar ID Version
LA36 - SA
VCC_CORE 7,37,41
5V_S0 17,18,22,23,24,25,26,30,33,35,37,47,58
3D3V_S0 3,5,11,12,13,14,15,16,17,18,20,21,22,23,24,25 ,26,27,30,31,32,33,34,35,36,37,40,42,43,44,46,4 7,48,52,57
1D5V_S3 5,8,20,21,37,44,46,48
1D05V_S0 3,11,12,13,17,18,37,57
1D05V_VTT 5,7,8,16,17,18,37,40,45,48,57
1D8V_S0 8,17,22,37,46
Planar PCB Version
SA
SB
SC
-1
VCC_CORE
5V_S0
3D3V_S0
1D5V_S3
1D05V_S0
1D05V_VTT
1D8V_S0
DDR_VREF _S3
VCC_GFXCO RE
3D3V_S0_NV
VGA_CORE_S0
1D8V_S0_NV
FBVDD
1D05V_S0_NV
Platform
controlled
Sillicon
controlled
DIS
AD+
3D3V_AUX_S5
5V_AUX_S5
S5_ENABLE (KBC)
5V_S5
3D3V_S5
RSMRST#_KBC
LAN_PWR_ON
3D3V_LAN_S5
KBC_PWRBTN#
PM_PWRBTN#
PM_SLP_S4#
1D5V_S3
DDR3_VREF_S3
PM_SLP_S3#
5V_S0
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_S0
0D75V_S0
ALL_PWRGD
1D05V_VTT
VTT_PWRGD
(H_VTTPWRGD -->CPU, KBC)
GFX_VR_EN
VCC_GFXCORE
DGPU_PWR_EN#
3D3V_S0_NV
VGA_CORE_PWR
DGPU_PWROK
1D8V_S0_NV
FBVDD
1D05V_S0_NV
S0_PWR_GOOD
(IMVP_VR_EN)
VCC_CORE
VR_CLKEN#
CORE_PWRGD
(SYS_PWROK, PCH_PWROK)
PM_DRAM_PWRGD
H_PWRGD
PLT_RST#
HDD LED Caps lock LED Num lock LED Scroll lock LED
>10ms
can power after power switch press
Mute Vol up Vol down SMB
>99ms
A A
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C
Reference
Reference
Reference
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
1
-1
-1
2 58 Monday, March 22, 2010
2 58 Monday, March 22, 2010
2 58 Monday, March 22, 2010
-1
5
4
3
2
1
3D3V_S0 3D3V_CK505
place close
R316
R316
1 2
0R0603-PAD
0R0603-PAD
1 2
1 2
C417
C417
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
C408
C408
1 2
C349
C349
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C404
C404
C387
C387
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C365
C365
C398
C398
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D D
RN71
0R4P2R-PAD
DREFCLK# 12
DREFCLK 12
CLKIN_DMI# 12
CLKIN_DMI 12
CLK_PCIE_SATA# 12
C C
CLK_PCIE_SATA 12
CLK_CPU_BCLK# 12
CLK_CPU_BCLK 12
0R4P2R-PAD
0R4P2R-PAD
0R4P2R-PAD
0R4P2R-PAD
0R4P2R-PAD
0R4P2R-PAD
0R4P2R-PAD
RN71
2 3
1
RN64
RN64
2 3
RN
RN
1
RN72
RN72
RN
RN
2 3
RN
RN
1
1
RN
RN
2 3
RN37
RN37
4
4
4
4
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CLK_CPU_BCLK#_R
CLK_CPU_BCLK_R
1D5V_S0
1 2
3D3V_CK505
DREFCLK#_R
DREFCLK_R
CLKIN_DMI#_R
CLKIN_DMI_R
CLK_PCIE_SATA#_R
CLK_PCIE_SATA_R
1D5V_S0_CK505 1D5V_S0_CK505
DY
DY
R298
R298
0R3J-0-U-GP
0R3J-0-U-GP
U34
U34
4
DOT_96#
3
DOT_96
14
SRC_2#
13
SRC_2
11
SRC_1/SATA#
10
SRC_1/SATA
22
CPU_0#
23
CPU_0
19
CPU_1#
20
CPU_1
SLG8SP585VTR-GP
SLG8SP585VTR-GP
2ND = 71.93197.003
2ND = 71.93197.003
1 2
R287
R287
0R0603-PAD
0R0603-PAD
1D05V_S0
R246
R246
1 2
0R0603-PAD
0R0603-PAD
1D05V_CK505
Low voltage I/O power
supply for outputs.
1
5
17
24
29
VDD_SRC
VDD_CPU
VSS_REF
GND
21
26
33
15
18
VDD_27
VDD_REF
VDD_DOT
VDD_SRC_IO
VDD_CPU_IO
CPU_STOP#
CKPWRGD/PD#
REF_0/CPU_SEL
VSS_DOT
VSS_278VSS_SATA
VSS_SRC
VSS_CPU
2
12
9
27MHZ
27MHZ_SS
XTAL_IN
XTAL_OUT
SDA
SCL
6
7
16
25
30
28
27
31
32
place close
VGA_XIN1_L
OSC_SPREAD_L
CPU_STOP#
CK_PWRGD
REF_0/CPU_SEL
GEN_XTAL_IN
GEN_XTAL_OUT
1 2
DIS
DIS
4
star trace
1 2
C374
C374
C363
C363
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
RNT1
RNT1
1
SRN33J-5-GP-U
SRN33J-5-GP-U
2 3
R307 33R2J-2-GP R307 33R2J-2-GP
PCH_SMBDATA 12,20,21
PCH_SMBCLK 12,20,21
close each pin
1 2
C379
C379
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1D05V_CK505
1 2
1 2
C383
C383
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VGA_XIN1 53
OSC_SPREAD 53
DY
DY
C366
C366
SC47P50V2JN-3GP
SC47P50V2JN-3GP
1 2
C414
C414
SC10P50V2JN-4GP
SC10P50V2JN-4GP
CLK_ICH14 12
FOR CO-LAY SLG8LV595
1D05V_CK505 3D3V_CK505
10KR2J-3-GP
R297
B B
1 2
R292
R292
10KR2J-3-GP
10KR2J-3-GP
1 2
REF_0/CPU_SEL
FSC 0 1
SPEED
133MHz
(Default)
100MHz
R297
2K2R2J-2-GP
2K2R2J-2-GP
DY
DY
it becomes a real time input for
asserting power down (active high).??
CK_PWRGD
VR_CLKEN# 40
10KR2J-3-GP
R288
R288
1 2
D
Q24
Q24
.
.
.
.
.
.
. .
. .
S
G
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
2ND = 84.2N702.E31
2ND = 84.2N702.E31
A A
3D3V_CK505
1 2
R250 10KR2J-3-GP R250 10KR2J-3-GP
3.3V LVTTL input for CPU_STOP#. Contains
internal pull-up resistor.
CPU_STOP#
CL=20pF±0.2pF
C407
C407
SC15P50V2 JN-2-GP
SC15P50V2JN-2-GP
1 2
1 2
C406
C406
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
GEN_XTAL_IN
1 2
X2
X2
82.30005.A51
82.30005.A51
X-14D31818M-50GP
X-14D31818M-50GP
2ND = 82.30005.C51
2ND = 82.30005.C51
GEN_XTAL_OUT
Layout Notes:
Make sure that the stubs to the
test points(CK_PWRGD, CLK_EN#,
GEN_XTAL_OUT) in the layout are as
short as possible on the high speed
signals.
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
Clock Generator SLG8SP585
Clock Generator SLG8SP585
Clock Generator SLG8SP585
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
3 58 Monday, March 22, 2010
3 58 Monday, March 22, 2010
3 58 Monday, March 22, 2010
-1
-1
-1
5
CPU1A
CPU1A
DMI_TXN0 13
DMI_TXN1 13
DMI_TXN2 13
DMI_TXN3 13
DMI_TXP0 13
DMI_TXP1 13
D D
C C
DMI_TXP2 13
DMI_TXP3 13
DMI_RXN0 13
DMI_RXN1 13
DMI_RXN2 13
DMI_RXN3 13
DMI_RXP0 13
DMI_RXP1 13
DMI_RXP2 13
DMI_RXP3 13
FDI_TXN0 13
FDI_TXN1 13
FDI_TXN2 13
FDI_TXN3 13
FDI_TXN4 13
FDI_TXN5 13
FDI_TXN6 13
FDI_TXN7 13
FDI_TXP0 13
FDI_TXP1 13
FDI_TXP2 13
FDI_TXP3 13
FDI_TXP4 13
FDI_TXP5 13
FDI_TXP6 13
FDI_TXP7 13
FDI_FSYNC0 13
FDI_FSYNC1 13
FDI_INT 13
FDI_LSYNC0 13
FDI_LSYNC1 13
A24
C23
B22
A21
B24
D23
B23
A22
D24
G24
F23
H23
D25
F24
E23
G23
E22
D21
D19
D18
G21
E19
F21
G18
D22
C21
D20
C18
G22
E20
F20
G19
F17
E17
C17
F18
D17
DMI_RX0#
DMI_RX1#
DMI_RX2#
DMI_RX3#
DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3
DMI_TX0#
DMI_TX1#
DMI_TX2#
DMI_TX3#
DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3
FDI_TX0#
FDI_TX1#
FDI_TX2#
FDI_TX3#
FDI_TX4#
FDI_TX5#
FDI_TX6#
FDI_TX7#
FDI_TX0
FDI_TX1
FDI_TX2
FDI_TX3
FDI_TX4
FDI_TX5
FDI_TX6
FDI_TX7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
B B
4
1 OF 9
1 OF 9
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX0#
PEG_RX1#
PEG_RX2#
DMI
DMI
PEG_RX3#
PEG_RX4#
PEG_RX5#
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_RX6#
PEG_RX7#
PEG_RX8#
PEG_RX9#
PEG_RX10#
PEG_RX11#
PEG_RX12#
PEG_RX13#
PEG_RX14#
PEG_RX15#
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
Intel(R) FDI
Intel(R) FDI
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX0#
PEG_TX1#
PEG_TX2#
PEG_TX3#
PEG_TX4#
PEG_TX5#
PEG_TX6#
PEG_TX7#
PEG_TX8#
PEG_TX9#
PEG_TX10#
PEG_TX11#
PEG_TX12#
PEG_TX13#
PEG_TX14#
PEG_TX15#
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
AUBURNDALE
AUBURNDALE
PEG_IRCOMP_R
B26
A26
B27
EXP_RBIAS
A25
PEG_RXN15
K35
PEG_RXN14
J34
PEG_RXN13
J33
PEG_RXN12
G35
PEG_RXN11
G32
PEG_RXN10
F34
PEG_RXN9
F31
PEG_RXN8
D35
PEG_RXN7
E33
PEG_RXN6
C33
PEG_RXN5
D32
PEG_RXN4
B32
PEG_RXN3
C31
PEG_RXN2
B28
PEG_RXN1
B30
PEG_RXN0
A31
PEG_RXP15
J35
PEG_RXP14
H34
PEG_RXP13
H33
PEG_RXP12
F35
PEG_RXP11
G33
PEG_RXP10
E34
PEG_RXP9
F32
PEG_RXP8
D34
PEG_RXP7
F33
PEG_RXP6
B33
PEG_RXP5
D31
PEG_RXP4
A32
PEG_RXP3
C30
PEG_RXP2
A28
PEG_RXP1
B29
PEG_RXP0
A30
PEG_TXN15_L PEG_TXN15
L33
PEG_TXN14_L PEG_TXN14
M35
PEG_TXN13_L PEG_TXN13
M33
PEG_TXN12_L PEG_TXN12
M30
PEG_TXN11_L PEG_TXN11
L31
PEG_TXN10_L PEG_TXN10
K32
PEG_TXN9_L PEG_TXN9
M29
PEG_TXN8_L PEG_TXN8
J31
PEG_TXN7_L PEG_TXN7
K29
PEG_TXN6_L PEG_TXN6
H30
PEG_TXN5_L PEG_TXN5
H29
PEG_TXN4_L PEG_TXN4
F29
PEG_TXN3_L PEG_TXN3
E28
PEG_TXN2_L PEG_TXN2
D29
PEG_TXN1_L
D27
PEG_TXN0_L PEG_TXN0
C26
PEG_TXP15_L PEG_TXP15
L34
PEG_TXP14_L PEG_TXP14
M34
PEG_TXP13_L PEG_TXP13
M32
PEG_TXP12_L PEG_TXP12
L30
PEG_TXP11_L PEG_TXP11
M31
PEG_TXP10_L PEG_TXP10
K31
PEG_TXP9_L PEG_TXP9
M28
PEG_TXP8_L PEG_TXP8
H31
PEG_TXP7_L PEG_TXP7
K28
PEG_TXP6_L PEG_TXP6
G30
PEG_TXP5_L PEG_TXP5
G29
PEG_TXP4_L PEG_TXP4
F28
PEG_TXP3_L PEG_TXP3
E27
PEG_TXP2_L PEG_TXP2
D28
PEG_TXP1_L PEG_TXP1
C27
PEG_TXP0_L PEG_TXP0
C25
1 2
1 2
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
R94
R94
R480
R480
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
3
49D9R2F-GP
49D9R2F-GP
750R2F-GP
750R2F-GP
PEG_RXN[15..0] 49
PEG_RXP[15..0] 49
C552 SCD1U10V2KX-5GP
C552 SCD1U10V2KX-5GP
C554 SCD1U10V2KX-5GP
C554 SCD1U10V2KX-5GP
C556 SCD1U10V2KX-5GP
C556 SCD1U10V2KX-5GP
C558 SCD1U10V2KX-5GP
C558 SCD1U10V2KX-5GP
C560 SCD1U10V2KX-5GP
C560 SCD1U10V2KX-5GP
C562 SCD1U10V2KX-5GP
C562 SCD1U10V2KX-5GP
C564 SCD1U10V2KX-5GP
C564 SCD1U10V2KX-5GP
C566 SCD1U10V2KX-5GP
C566 SCD1U10V2KX-5GP
C568 SCD1U10V2KX-5GP
C568 SCD1U10V2KX-5GP
C572 SCD1U10V2KX-5GP
C572 SCD1U10V2KX-5GP
C579 SCD1U10V2KX-5GP
C579 SCD1U10V2KX-5GP
C583 SCD1U10V2KX-5GP
C583 SCD1U10V2KX-5GP
C586 SCD1U10V2KX-5GP
C586 SCD1U10V2KX-5GP
C595 SCD1U10V2KX-5GP
C595 SCD1U10V2KX-5GP
C594 SCD1U10V2KX-5GP
C594 SCD1U10V2KX-5GP
C600 SCD1U10V2KX-5GP
C600 SCD1U10V2KX-5GP
C553 SCD1U10V2KX-5GP
C553 SCD1U10V2KX-5GP
C555 SCD1U10V2KX-5GP
C555 SCD1U10V2KX-5GP
C557 SCD1U10V2KX-5GP
C557 SCD1U10V2KX-5GP
C559 SCD1U10V2KX-5GP
C559 SCD1U10V2KX-5GP
C561 SCD1U10V2KX-5GP
C561 SCD1U10V2KX-5GP
C563 SCD1U10V2KX-5GP
C563 SCD1U10V2KX-5GP
C565 SCD1U10V2KX-5GP
C565 SCD1U10V2KX-5GP
C567 SCD1U10V2KX-5GP
C567 SCD1U10V2KX-5GP
C570 SCD1U10V2KX-5GP
C570 SCD1U10V2KX-5GP
C578 SCD1U10V2KX-5GP
C578 SCD1U10V2KX-5GP
C581 SCD1U10V2KX-5GP
C581 SCD1U10V2KX-5GP
C584 SCD1U10V2KX-5GP
C584 SCD1U10V2KX-5GP
C588 SCD1U10V2KX-5GP
C588 SCD1U10V2KX-5GP
C590 SCD1U10V2KX-5GP
C590 SCD1U10V2KX-5GP
C596 SCD1U10V2KX-5GP
C596 SCD1U10V2KX-5GP
C603 SCD1U10V2KX-5GP
C603 SCD1U10V2KX-5GP
2
NOTE SWAP TX0~15
PEG_TXN[15..0] 49
PEG_TXN1
PEG_TXP[15..0] 49
1
CLARKUNF
CLARKUNF
62.10053.561
62.10053.561
2ND = 62.10055.321
2ND = 62.10055.321
<Variant Name>
<Variant Name>
A A
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
CPU (1/7)-PEG / DMI / FDI
CPU (1/7)-PEG / DMI / FDI
CPU (1/7)-PEG / DMI / FDI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
4 58 Monday, March 22, 2010
4 58 Monday, March 22, 2010
4 58 Monday, March 22, 2010
-1
-1
-1
5
1D05V_VTT
1 2
R496 49D9R2F-GP R496 49D9R2F-GP
1 2
R92 68R2-GP R92 68R2-GP
H_CATERR#
PROCHOT#
D D
H_PROCHOT#
If using an optional glue
logic receiver, a series
resistor of 2.2 k ±5% is
needed.
H_PECI 16
H_PROCHOT# 40
PM_THRMTRIP-A# 16,37
130°C
H_PM_SYNC 13
H_PWRGD 16,37
C C
PM_DRAM_PWRGD 13
PLT_RST# 15,28,32,34,49
1 2
R473 20R2F-GP R473 20R2F-GP
1 2
R471 20R2F-GP R471 20R2F-GP
1 2
R97 49D9R2F-GP R97 49D9R2F-GP
1 2
R470 49D9R2F-GP R470 49D9R2F-GP
SKTOCC# (Socket Occupied)
R93 0R0402-PAD R93 0R0402-PAD
1 2
R85
R85
1 2
0R0402-PAD
0R0402-PAD
R506
R506
1 2
R505 0R0402-PAD R505 0R0402-PAD
1 2
1 2
1K5R2F-2-GP
1K5R2F-2-GP
TP27 TPAD14-GP TP27 TPAD14-GP
TP25 TPAD14-GP TP25 TPAD14-GP
R87 0R0402-PAD R87 0R0402-PAD
TP26 TPAD14-GP TP26 TPAD14-GP
1 2
1
1
VCCPWRGOOD_1
VCCPWRGOOD_0
1
R99
R99
750R2F-GP
750R2F-GP
DRAMPWROK
H_VTTPWRGD
H_PWRGD_XDP
PLT_RST#_R
H_COMP3
H_COMP2
H_COMP1
H_COMP0
SKTOCC#_R
H_CATERR#
PROCHOT#
H_CPURST#
4
CPU1B
CPU1B
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
CLARKUNF
CLARKUNF
62.10053.561
62.10053.561
2ND = 62.10055.321
2ND = 62.10055.321
TDI
A16
B16
AR30
AT30
E16
D16
A18
A17
F6
AL1
AM1
AN1
AN15
AP15
AT28
AP27
AN28
AP28
AT27
AT29
AR27
AR29
AP29
AN25
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
3
BCLK_CPU_P
BCLK_CPU_N
PEG_CLK_R
PEG_CLK#_R
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
DDR3_DRAMRST#_R
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_TDI_M
XDP_TDO_M
XDP_DBRESET#
1
BCLK_CPU_P 16
BCLK_CPU_N 16
PEG_CLK_R 12
PEG_CLK#_R 12
DPLL_REF_SSCLK 12
DPLL_REF_SSCLK# 12
RN53
RN53
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
TP21 TPAD14-GP TP21 TPAD14-GP
4
1D05V_VTT
PM_EXTTS#0_R 20
PM_EXTTS#1_R 21
2 OF 9
2 OF 9
BCLK
MISC
MISC
CLOCKS
CLOCKS
AUBURNDALE
AUBURNDALE
THERMAL PWR MANAGEMENT
THERMAL PWR MANAGEMENT
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
PM_EXT_TS0#
PM_EXT_TS1#
PRDY#
PREQ#
TRST#
TDI_M
TDO_M
DBR#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
BPM6#
BPM7#
TCK
TMS
TDO
2
SM_RCOMP_0
R514 100R2F-L1-GP-U R514 100R2F-L1-GP-U
SM_RCOMP_1
R512 24D9R2F-L-GP R512 24D9R2F-L-GP
SM_RCOMP_2
R508 130R2F-1-GP R508 130R2F-1-GP
DDR3_DRAMRST#_R
100KR2J-1-GP
100KR2J-1-GP
XDP_TMS
XDP_TDI
XDP_PREQ#
XDP_TDO
XDP_TCLK
XDP_TRST#
R89 51R2J-2-GP
R89 51R2J-2-GP
R88 51R2J-2-GP
R88 51R2J-2-GP
R91 51R2J-2-GP
R91 51R2J-2-GP
R467 51R2J-2-GP R467 51R2J-2-GP
R86 51R2J-2-GP
R86 51R2J-2-GP
R468 51R2J-2-GP R468 51R2J-2-GP
1 2
1 2
1 2
impedance compensation
R525 0R2J-2-GP
R525 0R2J-2-GP
1 2
S3
S3
R529
R529
S3
S3
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
1 2
DY
DY
1 2
1 2
S3_DY
S3_DY
G
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
S3
S3
Q12
Q12
BSS138-4-GP
BSS138-4-GP
D S
Vgs(th)<=1.5V
C642
C642
1D05V_VTT
1D5V_S3
R522
R522
1KR2J-1-GP
1KR2J-1-GP
S3
S3
1 2
XDP_DBRESET#
DDR3_DRAMRST# 20,21
RST_GATE 16
CPU JTAG
XDP_TDO_M
XDP_TDI_M
1 2
R95
R95
1KR2J-1-GP
1KR2J-1-GP
check list: 5k pu
1
1 2
R466
R466
0R0402-PAD
0R0402-PAD
3D3V_S0
3D3V_S5
1 2
C618
C618
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
S3
5
VCC
4
Y
S3
S3
S3
CPU_VDDQ_PW RGD CPU_VDDQ_PW RGD CPU_VDDQ_PWRGD CPU_VDDQ_PWRGD
R495
R495
1 2
S3
S3
1K5R2F-2-GP
1K5R2F-2-GP
CPU_VDDQ_PW RGD 46
1 2
R502
R502
750R2F-GP
750R2F-GP
S3
S3
VTT_PWRGD 34,45
R513
R513
10KR2J-3-GP
10KR2J-3-GP
VTT_PWRGD H_VTTPWRGD_R DRAMPWROK
C625
C625
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S0
1 2
1 2
Q37
Q37
1
2
3 4
DMN66D0LDW-7- G P
DMN66D0LDW-7-GP
84.DMN66.03F
84.DMN66.03F
2ND = 84.27002.F3F
2ND = 84.27002.F3F
6
5
S3_DY
S3_DY
DRAMPWROK
S3_DY
S3_DY
1D5V_S3
1 2
1 2
R507
R507
1K1R2F-GP
1K1R2F-GP
R498
R498
3KR2F-GP
3KR2F-GP
U62
U62
PM_SLP_S3# 13,34,37,45,46,47
VTT_PWRGD 34,45
1
B
2
A
3
GND
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
B B
A A
5
4
3
2
R494
R494
100KR2J-1-GP
100KR2J-1-GP
3D3V_S5
1 2
1D05V_VTT
1 2
R492
R492
1KR2J-1-GP
1KR2J-1-GP
H_VTTPWRGD
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C
CPU (2/7)-HOST
CPU (2/7)-HOST
CPU (2/7)-HOST
LA46 MB DIS
LA46 MB DIS
LA46 MB DIS
5 58 Monday, March 22, 2010
5 58 Monday, March 22, 2010
5 58 Monday, March 22, 2010
-1
-1
-1
1
5
CPU1C
CPU1C
3 OF 9
3 OF 9
4
3
CPU1D
CPU1D
2
4 OF 9
4 OF 9
1
AA6
SA_CK0
D
M_A_DQ[63..0] 20
C
B
M_A_BS0 20
M_A_BS1 20
M_A_BS2 20
M_A_CAS# 20
M_A_RAS# 20
M_A_WE# 20
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C10
D10
H10
G10
AH5
AF5
AK6
AK7
AF6
AG5
AJ10
AL10
AK12
AK8
AK11
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
AC3
AB2
AE1
AB3
AE9
A10
SA_DQ0
SA_DQ1
C7
SA_DQ2
A7
SA_DQ3
B10
SA_DQ4
SA_DQ5
E10
SA_DQ6
A8
SA_DQ7
D8
SA_DQ8
F10
SA_DQ9
E6
SA_DQ10
F7
SA_DQ11
E9
SA_DQ12
B7
SA_DQ13
E7
SA_DQ14
C6
SA_DQ15
SA_DQ16
G8
SA_DQ17
K7
SA_DQ18
J8
SA_DQ19
G7
SA_DQ20
SA_DQ21
J7
SA_DQ22
J10
SA_DQ23
L7
SA_DQ24
M6
SA_DQ25
M8
SA_DQ26
L9
SA_DQ27
L6
SA_DQ28
K8
SA_DQ29
N8
SA_DQ30
P9
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
AJ7
SA_DQ38
AJ6
SA_DQ39
SA_DQ40
AJ9
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
AL7
SA_DQ45
SA_DQ46
AL8
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BS0
SA_BS1
U7
SA_BS2
SA_CAS#
SA_RAS#
SA_WE#
AUBURNDALE
AUBURNDALE
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CK0#
SA_CKE0
SA_CK1
SA_CK1#
SA_CKE1
SA_CS0#
SA_CS1#
SA_ODT0
SA_ODT1
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
AA7
P7
Y6
Y5
P6
AE2
AE8
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_CLK_DDR0 20
M_CLK_DDR#0 20
M_CKE0 20
M_CLK_DDR1 20
M_CLK_DDR#1 20
M_CKE1 20
M_CS#0 20
M_CS#1 20
M_ODT0 20
M_ODT1 20
M_A_DM[7..0] 20
M_A_DQS#[7..0] 20
M_A_DQS[7..0] 20
M_A_A[15..0] 20
M_B_DQ[63..0] 21
M_B_BS0 21
M_B_BS1 21
M_B_BS2 21
M_B_CAS# 21
M_B_RAS# 21
M_B_WE# 21
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AG1
AG4
AG3
AM6
AM4
AM3
AR10
AT10
AF3
AJ3
AK1
AJ4
AH4
AK3
AK4
AN2
AK5
AK2
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AB1
AC5
AC6
B5
SB_DQ0
A5
SB_DQ1
C3
SB_DQ2
B3
SB_DQ3
E4
SB_DQ4
A6
SB_DQ5
A4
SB_DQ6
C4
SB_DQ7
D1
SB_DQ8
D2
SB_DQ9
F2
SB_DQ10
F1
SB_DQ11
C2
SB_DQ12
F5
SB_DQ13
F3
SB_DQ14
G4
SB_DQ15
H6
SB_DQ16
G2
SB_DQ17
J6
SB_DQ18
J3
SB_DQ19
G1
SB_DQ20
G5
SB_DQ21
J2
SB_DQ22
J1
SB_DQ23
J5
SB_DQ24
K2
SB_DQ25
L3
SB_DQ26
M1
SB_DQ27
K5
SB_DQ28
K4
SB_DQ29
M4
SB_DQ30
N5
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BS0
W5
SB_BS1
R7
SB_BS2
SB_CAS#
Y7
SB_RAS#
SB_WE#
AUBURNDALE
AUBURNDALE
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CK0
SB_CK0#
SB_CKE0
SB_CK1
SB_CK1#
SB_CKE1
SB_CS0#
SB_CS1#
SB_ODT0
SB_ODT1
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
W8
W9
M3
V7
V6
M2
AB8
AD6
AC7
AD1
D4
E1
H3
K1
AH1
AL2
AR4
AT8
D5
F4
J4
L4
AH2
AL4
AR5
AR8
C5
E3
H4
M5
AG2
AL5
AP5
AR7
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_CLK_DDR2 21
M_CLK_DDR#2 21
M_CKE2 21
M_CLK_DDR3 21
M_CLK_DDR#3 21
M_CKE3 21
M_CS#2 21
M_CS#3 21
M_ODT2 21
M_ODT3 21
M_B_DM[7..0] 21
M_B_DQS#[7..0] 21
M_B_DQS[7..0] 21
M_B_A[15..0] 21
CLARKUNF
CLARKUNF
62.10053.561
62.10053.561
2ND = 62.10055.321
A
5
2ND = 62.10055.321
4
3
CLARKUNF
CLARKUNF
62.10053.561
62.10053.561
2ND = 62.10055.321
2ND = 62.10055.321
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
CPU (3/7)-MEM INTERFACE
CPU (3/7)-MEM INTERFACE
CPU (3/7)-MEM INTERFACE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
Taipei Hsien 221, Taiwan, R.O.C
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
1
-1
-1
6 58 Monday, March 22, 2010
6 58 Monday, March 22, 2010
6 58 Monday, March 22, 2010
-1
5
4
6 OF 9
CPU1F
CPU1F
6 OF 9
3
2
1
C573
C573
VCC_CORE
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
C575
C575
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCC
CLARKUNF
CLARKUNF
62.10053.561
62.10053.561
2ND = 62.10055.321
2ND = 62.10055.321
POWER
POWER
AUBURNDALE
AUBURNDALE
CPU CORE SUPPLY
CPU CORE SUPPLY
SENSE LINES
SENSE LINES
1.1V RAIL POWER
1.1V RAIL POWER
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VSS_SENSE_VTT
VTT_SELECT
VCC_SENSE
VSS_SENSE
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
PSI#
VID0
VID1
VID2
VID3
VID4
VID5
VID6
ISENSE
VTT_SENSE
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
AN33
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34
G15
AN35
AJ34
AJ35
B15
VSS_SENSE_VTT
A15
C589
C589
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_VTTVID1
Clarksfield H_VTTVID1 = Low, VTT = 1.1V
Arrandale H_VTTVID1 = High, VTT = 1.05V
1
C609
C597
C597
C599
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1
C599
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
The decoupling capacitors, filter
recommendations and sense resistors on the
CPU/PCH Rails are specific to the CRB
Implementation. Customers need to follow the
recommendations in the Calpella Platform
Design Guide.
C175
C175
TP35 TPAD14-GP TP35 TPAD14-GP
IMVP_IMON 40
TP34 TPAD14-GP TP34 TPAD14-GP
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PSI# 40
H_VID[6..0] 40
PM_DPRSLPVR 40
VTT_SENSE 45
1 2
C609
C607
C607
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C182
C182
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Please note that the VTT Rail
Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V
VCC_CORE
1 2
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
R83
R83
100R2F-L1-GP-U
100R2F-L1-GP-U
R84
R84
100R2F-L1-GP-U
100R2F-L1-GP-U
C606
C606
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1D05V_VTT
1 2
C605
C605
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1D05V_VTT
1 2
VCC_SENSE 40
VSS_SENSE 40
1D05V_VTT
C183
C183
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
1 2
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C
CPU (4/7)-POWER
CPU (4/7)-POWER
CPU (4/7)-POWER
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
7 58 Monday, March 22, 2010
7 58 Monday, March 22, 2010
7 58 Monday, March 22, 2010
-1
-1
-1
PROCESSOR CORE POWER
48A -->Arrandale
D D
VCC_CORE
C551
C574
C574
C548
C548
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
DY
DY
SBC9
SBC9
12
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C542
C542
12
SBC10
SBC10
C547
C547
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
DY
DY
SBC11
SBC11
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C551
C540
C540
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
12
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C C
B B
A A
5
VCC_GFXCORE
C137
C137
C131
C592
C592
C131
C601
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
DY
DY
C601
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
DY
DY
C142
C142
C151
C151
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C576
C576
C587
C587
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
D D
Please note that the VTT Rail
Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V
18A
1D05V_VTT
C179
C179
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
1 2
C598
C598
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C604
C604
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
1 2
1 2
C585
C585
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C593
C593
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C610
C610
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C C
1D05V_VTT
1 2
TC10
TC10
ST220U2D5VBM-2GP
ST220U2D5VBM-2GP
DY
DY
B B
4
CPU1G
CPU1G
AT21
VAXG1
AT19
VAXG2
AT18
VAXG3
AT16
VAXG4
AR21
VAXG5
AR19
VAXG6
AR18
VAXG7
AR16
VAXG8
AP21
VAXG9
AP19
VAXG10
AP18
VAXG11
AP16
VAXG12
AN21
VAXG13
AN19
VAXG14
AN18
VAXG15
AN16
VAXG16
AM21
VAXG17
AM19
VAXG18
AM18
VAXG19
AM16
VAXG20
AL21
VAXG21
AL19
VAXG22
AL18
VAXG23
AL16
VAXG24
AK21
VAXG25
AK19
VAXG26
AK18
VAXG27
AK16
VAXG28
AJ21
VAXG29
AJ19
VAXG30
AJ18
VAXG31
AJ16
VAXG32
AH21
VAXG33
AH19
VAXG34
AH18
VAXG35
AH16
VAXG36
J24
VTT1
J23
VTT1
H25
VTT1
K26
VTT1
J27
VTT1
J26
VTT1
J25
VTT1
H27
VTT1
G28
VTT1
G27
VTT1
G26
VTT1
F26
VTT1
E26
VTT1
E25
VTT1
CLARKUNF
CLARKUNF
62.10053.561
62.10053.561
2ND = 62.10055.321
2ND = 62.10055.321
3
7 OF 9
7 OF 9
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6
GFX_IMON
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
AR22
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
AR25
AT25
AM24
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
L10
K10
J22
J20
J18
H21
H20
H19
L26
L27
M26
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6
1 2
C212
C212
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C171
C171
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C611
C611
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C571
C571
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
AUBURNDALE
AUBURNDALE
GRAPHICS
GRAPHICS
GFX_VR_EN
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
FDI PEG & DMI
FDI PEG & DMI
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
POWER
POWER
1.1V 1.8V
1.1V 1.8V
VCC_AXG_SENSE 47
VSS_AXG_SENSE 47
GFX_VR_EN:
4.7-k pull-down to GND at PWM
GFX_VR_EN 47
GFX_DPRSLPVR 47
GFX_IMON 47
1 2
1 2
C638
C638
1 2
1 2
1 2
C569
C569
C213
C213
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C608
C608
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C602
C602
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
+V1.8S_VCCSFR
1 2
C582
C582
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C637
C637
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1D05V_VTT
1D05V_VTT
1 2
C577
C577
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
GFX_VID[6..0] 47
6A
1 2
C214
C214
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C145
C145
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C641
C641
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
0.6A
1 2
2
1 2
1 2
C640
C640
C639
C639
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1D8V_S0
R98 0R0603-PAD R98 0R0603-PAD
1D5V_CPU_VDDQ
U37_G
C218
C218
1 2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
S3
S3
1D5V_CPU_VDDQ
R123
R123
200R2J-L1-GP
200R2J-L1-GP
S3
S3
1 2
Q64_D
D
Q14
Q14
.
.
.
.
.
.
. .
. .
S
G
1 2
R127 0R2J-2-GP
R127 0R2J-2-GP
1 2
R126 0R2J-2-GP
R126 0R2J-2-GP
1 2
R128 0R2J-2-GP
R128 0R2J-2-GP
1 2
R129 0R2J-2-GP
R129 0R2J-2-GP
1 2
R130 0R2J-2-GP
R130 0R2J-2-GP
U23
U23
S3
S3
S
D
S
1
2
3
4 5
2nd = 84.04800.D37
2nd = 84.04800.D37
S3
S3
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
2ND = 84.2N702.E31
2ND = 84.2N702.E31
D
1 2
PM_SLP_S3 37
8
D
D
7
D
D
6
S
S
S
S
G D
G D
AO4468-GP
AO4468-GP
84.04468.037
84.04468.037
R125 0R0402-PAD R125 0R0402-PAD
1
1D5V_S3
S3_DY
S3_DY
S3_DY
S3_DY
S3_DY
S3_DY
S3_DY
S3_DY
S3_DY
S3_DY
RUN_POW ER_ON
<Variant Name>
<Variant Name>
A A
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
CPU (5/7)-Graphic PWR
CPU (5/7)-Graphic PWR
CPU (5/7)-Graphic PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Date: Sheet of
Date: Sheet of
Date: Sheet of
8 58 Monday, March 22, 2010
8 58 Monday, March 22, 2010
8 58 Monday, March 22, 2010
-1
-1
-1
5
8 OF 9
CPU1H
CPU1H
AT20
VSS
AT17
VSS
AR31
VSS
AR28
VSS
AR26
VSS
AR24
VSS
D D
C C
B B
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AUBURNDALE
AUBURNDALE
8 OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
4
CPU1I
CPU1I
K27
VSS
K9
VSS
K6
VSS
K3
VSS
J32
VSS
J30
VSS
J21
VSS
J19
VSS
H35
VSS
H32
VSS
H28
VSS
H26
VSS
H24
VSS
H22
VSS
H18
VSS
H15
VSS
H13
VSS
H11
VSS
H8
VSS
H5
VSS
H2
VSS
G34
VSS
G31
VSS
G20
VSS
G9
VSS
G6
VSS
G3
VSS
F30
VSS
F27
VSS
F25
VSS
F22
VSS
F19
VSS
F16
VSS
E35
VSS
E32
VSS
E29
VSS
E24
VSS
E21
VSS
E18
VSS
E13
VSS
E11
VSS
E8
VSS
E5
VSS
E2
VSS
D33
VSS
D30
VSS
D26
VSS
D9
VSS
D6
VSS
D3
VSS
C34
VSS
C32
VSS
C29
VSS
C28
VSS
C24
VSS
C22
VSS
C20
VSS
C19
VSS
C16
VSS
B31
VSS
B25
VSS
B21
VSS
B18
VSS
B17
VSS
B13
VSS
B11
VSS
B8
VSS
B6
VSS
B4
VSS
A29
VSS
A27
VSS
A23
VSS
A9
VSS
NCTF TEST PIN:
NCTF TEST PIN:
VSS
VSS
A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
3
AUBURNDALE
AUBURNDALE
VSS_NCTF#AR34
VSS_NCTF#B34
VSS_NCTF#B2
VSS_NCTF#B1
VSS_NCTF#A35
VSS_NCTF#AT1
VSS_NCTF#AT35
RSVD_NCTF#AT33
RSVD_NCTF#AT34
RSVD_NCTF#AP35
RSVD_NCTF#AR35
RSVD_NCTF#AT3
RSVD_NCTF#AR1
RSVD_NCTF#AP1
RSVD_NCTF#AT2
RSVD_NCTF#C1
RSVD_NCTF#A3
RSVD_NCTF#C35
RSVD_NCTF#B35
RSVD_NCTF#A34
RSVD_NCTF#A33
9 OF 9
9 OF 9
AR34
B34
B2
B1
A35
AT1
AT35
AT33
AT34
AP35
AR35
AT3
AR1
AP1
AT2
C1
A3
C35
B35
A34
A33
TP_MCP_VSS_NCTF6
TP_MCP_VSS_NCTF1
TP_MCP_VSS_NCTF2
TP_MCP_VSS_NCTF7
T P44 AFTE14P-GPT P44 AFTE14P-GP
1
TP82 AFTE14P-GP TP82 AFTE14P-GP
1
TP43 AFTE14P-GP TP43 AFTE14P-GP
1
TP7 AFTE14P-GP TP7 AFTE14P-GP
1
2
1
CLARKUNF
CLARKUNF
CLARKUNF
62.10053.561
62.10053.561
A A
CLARKUNF
62.10053.561
62.10053.561
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
CPU (6/7)-VSS
CPU (6/7)-VSS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU (6/7)-VSS
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
9 58 Monday, March 22, 2010
9 58 Monday, March 22, 2010
9 58 Monday, March 22, 2010
-1
-1
-1
5
CPU1E
CPU1E
AP25
RSVD#AP25
AL25
RSVD#AL25
AL24
RSVD#AL24
AL22
RSVD#AL22
AJ33
RSVD#AJ33
D D
H_RSVD9_R
1
TP30 TPAD14-GP TP30 TPAD14-GP
TP32 TPAD14-GP TP32 TPAD14-GP
H_RSVD10_R CFG3
1
AG9
RSVD#AG9
M27
RSVD#M27
L28
RSVD#L28
J17
SA_DIMM_VREF#
H17
SB_DIMM_VREF#
G25
RSVD#G25
G17
RSVD#G17
E31
RSVD#E31
E30
RSVD#E30
4
AUBURNDALE
AUBURNDALE
5 OF 9
5 OF 9
RSVD#AJ13
RSVD#AJ12
RSVD#AH25
RSVD#AK26
RSVD#AL26
RSVD_NCTF#AR2
RSVD#AJ26
RSVD#AJ27
AJ13
AJ12
AH25
AK26
AL26
AR2
AJ26
AJ27
3
CFG0
1 2
R465
R465
3KR2F-GP
3KR2F-GP
DY
DY
1 2
R462
R462
3KR2F-GP
3KR2F-GP
2
1
PCI-Express Configuration Select
CFG0
1:Single PEG
0:Bifurcation enabled
CFG3 - PCI-Express Static Lane Reversal
CFG3
1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
RESERVED
RESERVED
RSVD#AL28
RSVD#AL29
RSVD#AP30
RSVD#AP32
RSVD#AL27
RSVD#AT31
RSVD#AT32
RSVD#AP33
RSVD#AR33
RSVD#AR32
RSVD_TP#E15
RSVD_TP#F15
RSVD#AJ15
RSVD#AH15
RSVD_TP#AA5
RSVD_TP#AA4
RSVD_TP#R8
RSVD_TP#AD3
RSVD_TP#AD2
RSVD_TP#AA2
RSVD_TP#AA1
RSVD_TP#R9
RSVD_TP#AG7
RSVD_TP#AE3
RSVD_TP#V4
RSVD_TP#V5
RSVD_TP#N2
RSVD_TP#AD5
RSVD_TP#AD7
RSVD_TP#W3
RSVD_TP#W2
RSVD_TP#N3
RSVD_TP#AE5
RSVD_TP#AD9
CFG0
AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16
B19
A19
A20
B20
AC9
AB9
U9
J29
J28
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
RSVD_TP#H16
RSVD#B19
RSVD#A19
RSVD#A20
RSVD#B20
RSVD#U9
T9
RSVD#T9
RSVD#AC9
RSVD#AB9
RSVD#J29
RSVD#J28
CFG1
1
TP20 TPAD14-GP TP20 TPAD14-GP
TP13 TPAD14-GP TP13 TPAD14-GP
TP9 TPAD14-GP TP9 TPAD14-GP
TP19 TPAD14-GP TP19 TPAD14-GP
TP8 TPAD14-GP TP8 TPAD14-GP
TP12 TPAD14-GP TP12 TPAD14-GP
TP23 TPAD14-GP TP23 TPAD14-GP
TP22 TPAD14-GP TP22 TPAD14-GP
C C
TP84 TPAD14-GP TP84 TPAD14-GP
TP85 TPAD14-GP TP85 TPAD14-GP
TP18 TPAD14-GP TP18 TPAD14-GP
TP10 TPAD14-GP TP10 TPAD14-GP
TP11 TPAD14-GP TP11 TPAD14-GP
TP17 TPAD14-GP TP17 TPAD14-GP
TP14 TPAD14-GP TP14 TPAD14-GP
TP16 TPAD14-GP TP16 TPAD14-GP
1
1
CFG2
1
CFG3
CFG4
CFG5
1
CFG6
1
CFG7
CFG8
1
CFG9
1
CFG10
1
CFG11
1
CFG12
1
CFG13
1
CFG14
1
CFG15
1
CFG16
1
CFG17
1
H_RSVD17_R
H_RSVD18_R
B B
KEY
RSVD#D15
RSVD#C15
VSS
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AR32
E15
F15
A2
D15
C15
AJ15
AH15
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
AP34
RSVD64_R
RSVD65_R
RSVD_VSS
1
1
R461 0R0402-PAD R461 0R0402-PAD
1 2
TP38 TPAD14-GP TP38 TPAD14-GP
TP36 TPAD14-GP TP36 TPAD14-GP
CFG4
CFG7
1 2
R464
R464
3KR2F-GP
3KR2F-GP
DY
DY
1 2
R463
R463
3KR2F-GP
3KR2F-GP
DY
DY
CFG4 - Display Port Presence
CFG4
CFG7 Clarksfield (only for early samples pre-ES1) -
1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
CFG7(Reserved) - Temporarily used for early
Clarksfield samples.
Connect to GND with 3.01K Ohm/5% resistor.
Note: Only temporary for early CFD sample
(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
the pull-down resistor shouble be used. Does
not impact AUB functionality.
CLARKUNF
CLARKUNF
62.10053.561
62.10053.561
A A
VSS (AP34) can be left NC is
CRB implementation; EDS/DG
recommendation to GND.
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
CPU (7/7)-RESERVED
CPU (7/7)-RESERVED
CPU (7/7)-RESERVED
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Date: Sheet of
Date: Sheet of
Date: Sheet of
10 58 Monday, March 22, 2010
10 58 Monday, March 22, 2010
10 58 Monday, March 22, 2010
-1
-1
-1
5
ICH_RTCX1
1 2
R630 10MR2J-L-GP R630 10MR2J-L-GP
X-32D768KHZ-67-GP
X-32D768KHZ-67-GP
X5
X5
C721
C721
1 2
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
3 2
82.30001.A81
82.30001.A81
D D
ICH_RTCX2
1 4
1 2
C720
C720
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
-1 version
ACZ_RST#
ACZ_SYNC
ACZ_BIT_CLK
ACZ_SDATAOUT
1 2
ECT3 SC 33P50V2JN-3GP
ECT3 SC 33P50V2JN-3GP
DY
DY
1 2
ECT6 SC33P50V2JN-3GP
ECT6 SC33P50V2JN-3GP
DY
DY
1 2
ECT5 SC 33P50V2JN-3GP
ECT5 SC 33P50V2JN-3GP
DY
DY
1 2
ECT4 SC33P50V2JN-3GP
ECT4 SC33P50V2JN-3GP
DY
DY
C C
NO REBOOT STRAP
3D3V_S0
1 2
DY
DY
R595 1KR2J-1-GP
R595 1KR2J-1-GP
No Reboot Strap R23
HDA_SPKR
CHECK
B B
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_RST#
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_RST#
PCH_JTAG_TCK
A A
Place the resistors on
RST, TCK, TMS, and
TDI near PCH.
Place the resistors on
TDO near XDP.
ACZ_SPKR
Low = Default
High = No Reboot
DY
DY
1 2
R245 200R2J-L1-GP
R245 200R2J-L1-GP
DY
DY
1 2
R256 200R2J-L1-GP
R256 200R2J-L1-GP
DY
DY
1 2
R252 200R2J-L1-GP
R252 200R2J-L1-GP
1 2
DY
DY
R261 10KR2J-3-GP
R261 10KR2J-3-GP
DY
DY
1 2
R603 100R2J-2-GP
R603 100R2J-2-GP
DY
DY
1 2
R611 100R2J-2-GP
R611 100R2J-2-GP
DY
DY
1 2
R606 100R2J-2-GP
R606 100R2J-2-GP
1 2
DY
DY
R615 51R2F-2-GP
R615 51R2F-2-GP
1 2
R600 51R2F-2-GP R600 51R2F-2-GP
1D05V_S0
PCH Pin
TDO
TMS
TDI
TCK
TRST#
SPI_CS0#, SPI_M ISO, SPI_MOSI, SPI_CLK:
No series resis tor required if routing length is 1.5"-6.5"
R-1
R-2
R-10
200 Ohms
R-3
R-4
R-11
200 Ohms
R-5
100 Ohms
R-6
R-12
51 Ohms 51 Ohms
R-7
20K Ohms 20K Ohms
R-8
10K Ohms 10K Ohms
R-9
R-13
5
4
R284
R284
20KR2J-L2-GP
20KR2J-L2-GP
1 2
1 2
C400
C400
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
RTC_AUX_S5
R301
R301
1 2
20KR2J-L2-GP
20KR2J-L2-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
ACZ_BITCLK_AUDIO 30
ACZ_SYNC_AUDIO 30
ACZ_SPKR 30
ACZ_RST#_AUDIO 30
ACZ_SDATAIN0 30
ACZ_SDATAOUT_AUDIO 30
ME_UNLOCK# 34
PCH_SPI_CLK 35
PCH_SPI_CS#0 35
PCH_SPI_MOSI 35
SPI_MOSO_R 35
PCH JTAG Enable
ES1 ES2
DY
200 Ohms
DY
100 Ohms
PCH JTAG Disable
ES1 ES2
DY
DY
DY DY DY DY 51 Ohms
200 Ohms
100 Ohms 100 Ohms
DY DY
200 Ohms
100 Ohms
DY
DY
DY
DY
DY
20K Ohms
10K Ohms
51 Ohms 51 Ohms
DY
DY
DY DY
DY DY
RTC_AUX_S5 RTC_AUX_S5
2 1
G34
G34
GAP-OPEN
GAP-OPEN
SRTCRST# new signal Pin
1 2
C726
C726
R652
R652
R653 33R2J-2-GP R653 33R2J-2-GP
R637 33R2J-2-GP R637 33R2J-2-GP
R263 0R0402-PAD R263 0R0402-PAD
1 2
R253
R253
1 2
8K2R2J-3-GP
8K2R2J-3-GP
R558
R558
15R2J-GP
15R2J-GP
R565
R565
15R2J-GP
15R2J-GP
R559
R559
15R2J-GP
15R2J-GP
DY
DY
DY
DY
DY
DY
DY
DY DY
DY
DY
1 2
R300 1MR2J-1-GP R300 1MR2J-1-GP
1 2
R651 330KR2F-L-GP R651 330KR2F-L-GP
15R2J-GP
15R2J-GP
1 2
1 2
1 2
1
TP77 TPAD14-GP TP77 TPAD14-GP
1 2
R638 33R2J-2-GP R638 33R2J-2-GP
DY
DY
1 2
1 2
1 2
Enable
DY
DY
DY
DY
51 Ohms
DY
DY
51 Ohms
51 Ohms
DY
DY
51 Ohms
4
SM_INTRUDER#
ICH_INTVRMEN
ICH_RTCX1
ICH_RTCX2
ICH_RTCRST#
SRTCRST#
SM_INTRUDER#
ICH_INTVRMEN
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
HDA_SDIN2
ACZ_SDATAOUT
HDA_DOCK_EN#
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
SPI_CLK_R
SPI_CS#0_R
SPI_MOSI_R
SPI_MOSO_R
Production
B13
D13
C14
D17
A16
A14
A30
D29
C30
G30
F30
E32
F32
B29
H32
J30
BA2
AV3
AY3
AY1
AV1
Disable
DY
DY
DY
DY
DY
DY
DY
DY
DY
51 Ohms
DY
DY
DY
3
PCH1A
PCH1A
RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN
HDA_BCLK
HDA_SYNC
P1
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_MOSI
SPI_MISO
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
71.0HM55.A0U
71.0HM55.A0U
PCH_GPIO48 16
3
RTC IHDA
RTC IHDA
SPI JTAG
SPI JTAG
SPI_MOSI
3D3V_S0
INT_SERIRQ
SATA_DET#0_R
SATA_LED#
LPC
LPC
SATA
SATA
SATA0GP/GPIO21
SATA1GP/GPIO19
1 OF 10
1 OF 10
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LDRQ0#
LDRQ1#/GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
Enable iTPM: Connect to Vcc3_3 with
8.2-kΩ weak pull-up resistor.
Disable iTPM: Left floating, no
pull-down required
1 2
DY
DY
R562 8K2R2J-3-GP
R562 8K2R2J-3-GP
PCH_GPIO48
D33
B33
C32
A32
C34
A34
F34
AB9
AK7
AK6
SATA_TXN0_C
AK11
SATA_TXP0_C
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
SATA5TXN
AB3
SATA5TXP
AB1
AF16
AF15
T3
Y9
V1
RN60
RN60
6
7
8
SRN10KJ-6-GP
SRN10KJ-6-GP
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
LPC_LFRAME#_R
PCH_GPIO23
INT_SERIRQ
SATA_LED#
SATA_DET#0_R
SATA_DET#1_R
SPI_MOSI_R
2
integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN
integrated VccLan1_05VccCL1_05
LAN100_SLP
C652 SCD01U50V2KX-1GP C652 SCD01U50V2KX-1GP
C650 SCD01U50V2KX-1GP C650 SCD01U50V2KX-1GP
SATAICOMP
45
3
2
1
High=Enable Low=Disable
High=Enable Low=Disable
SBR43 33R2J-2-GP SBR43 33R2J-2-GP
1 2
SBR44 33R2J-2-GP SBR44 33R2J-2-GP
1 2
SBR45 33R2J-2-GP SBR45 33R2J-2-GP
1 2
SBR46 33R2J-2-GP SBR46 33R2J-2-GP
1 2
SBR47 33R2J-2-GP SBR47 33R2J-2-GP
1 2
1
TP75 TPAD14-GP TP75 TPAD14-GP
INT_SERIRQ 34
C309 SCD01U50V2KX-1GP C309 SCD01U50V2KX-1GP
1 2
C303 SCD01U50V2KX-1GP C303 SCD01U50V2KX-1GP
1 2
1 2
1 2
1 2
R210
R210
37D4R2F-GP
37D4R2F-GP
SATA_LED# 36
SATA_DET#1_R 16
RTC_AUX_S5 RTC_BAT
1 2
12
R317 0R0603-PAD R317 0R0603-PAD
C423
C423
SC1U10V2ZY-GP
SC1U10V2ZY-GP
3D3V_S0
71.0HM55.A0U
RTC_PWR_L
BAT54CW-7-F-GP
BAT54CW-7-F-GP
2
1
LPC_LAD0_R
1
LPC_LAD1_R
1
LPC_LAD2_R
1
LPC_LAD3_R
1
LPC_LAD0 34
LPC_LAD1 34
LPC_LAD2 34
LPC_LAD3 34
LPC_LFRAME# 34
AFTP139 AFTE14P-GP AFTP139 AFTE14P-GP
AFTP140 AFTE14P-GP AFTP140 AFTE14P-GP
AFTP141 AFTE14P-GP AFTP141 AFTE14P-GP
AFTP142 AFTE14P-GP AFTP142 AFTE14P-GP
-1 version
LPC_LAD0
SATA_RXN0 26
SATA_RXP0 26
SATA_TXN0 26
SATA_TXP0 26
HDD
SATA_RXN5 26
SATA_RXP5 26
SATA_TXN5 26
SATA_TXP5 26
3
E-SATA
1D05V_S0
3D3V_AUX_S5
D13
D13
2
RTC_PWR
1
83.BAT54.Z81
83.BAT54.Z81
2ND = 83.00040.R81
2ND = 83.00040.R81
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
PCH (1/9)-SATA/SPI/LPC/HDA
PCH (1/9)-SATA/SPI/LPC/HDA
PCH (1/9)-SATA/SPI/LPC/HDA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
C422
C422
SC47P50V2JN-3GP
SC47P50V2JN-3GP
RTC CONN
1 2
R311
R311
1KR2J-1-GP
1KR2J-1-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
1
RTC1
RTC1
4
1
2
3
5
ACES-CON3-4-GP-U
ACES-CON3-4-GP-U
20.F1267.003
20.F1267.003
11 58 Monday, March 22, 2010
11 58 Monday, March 22, 2010
11 58 Monday, March 22, 2010
-1
-1
-1
0R0402-PAD
0R0402-PAD
R599 33R2J-2-GP R599 33R2J-2-GP
DY
DY
3D3V_S5
PU, page 19
PU, page 19
PEX_CLKREQ 49
SRN0J-10-GP-U
SRN0J-10-GP-U
4
RN23
RN23
1
SRN0J-10-GP-U
SRN0J-10-GP-U
2 3
RN58
RN58
SRN0J-10-GP-U
SRN0J-10-GP-U
2 3
RN57
RN57
1
DY
DY
R189 0R0402-PAD R189 0R0402-PAD
R194 0R0402-PAD R194 0R0402-PAD
1D05V_S0
1 2
C703
C703
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
RN34
RN34
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
KBC_SCL1 34,36
KBC_SDA1 34,36
CLK_PCIE_PEG# 49
CLK_PCIE_PEG 49
PEG_CLK#_R 5
PEG_CLK_R 5
DPLL_REF_SSCLK# 5
DPLL_REF_SSCLK 5
1 2
1 2
CLK48_Cardreader 31
8
7
6
KBC_SDA1
PCIE_CLK_RQ5#
PCH_GPIO57
KBC_SCL1
2
PCH_GPIO57 16
PCH_SMBDATA 3,20,21
PCH_GPIO12 16
SML0_CLK
SML0_DATA
3D3V_S5
SMB_CLK
SMB_DATA
1MR2J-1-GP
1MR2J-1-GP
SMB_CLK
XTAL25_IN
R318
R318
123
123
1 2
678
678
PCIE_CLK_RQ0#
PCH_GPIO74
XTAL-25MHZ-102-GP
XTAL-25MHZ-102-GP
2 nd = 82.30020.971
2 nd = 82.30020.971
3D3V_S5
RN39
RN39
SRN2K2J-4-GP
SRN2K2J-4-GP
4 5
PCH_GPIO11
PM_RI#
RN63
RN63
SRN2K2J-4-GP
SRN2K2J-4-GP
4 5
R572 0R2J-2-GP
R572 0R2J-2-GP
82.30020.851
82.30020.851
PCH_GPIO11
PM_RI# 13
3D3V_S0
Q27
Q27
1
2
3 4
DMN66D0LDW-7- G P
DMN66D0LDW-7-GP
84.DMN66.03F
84.DMN66.03F
2ND = 84.27002.F3F
2ND = 84.27002.F3F
RN41
RN41
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
1 2
DY
DY
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
XTAL25_IN
X4
X4
XTAL25_OUT
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
6
5
1 2
-1 Version
C688
C688
8
7
6
C690
C690
3D3V_S0
3D3V_S5
12
12
1
SMB_DATA
PCH_SMBCLK 3,20,21
5
LAN
D
MINICARD1
WLAN
MINICARD2
WWAN
PCIECLKRQ{0,3,4,5,6,7}# should
have a 10K pull-up to +3VALW.
PCIECLKRQ{1,2} should have a
10K pull-up to +1.05VS (But CRB is
pull-up to +3VS).
PCIE_RXN1 28
PCIE_RXP1 28
PCIE_TXN1 28
PCIE_TXP1 28
PCIE_RXN2 32
PCIE_RXP2 32
PCIE_TXN2 32
PCIE_TXP2 32
PCIE_RXN3 32
PCIE_RXP3 32
PCIE_TXN3 32
PCIE_TXP3 32
PCIE_RXN1
PCIE_RXP1
PCIE_RXN2
PCIE_RXP2
C284 SCD1U10V2KX-5GP C284 SCD1U10V2KX-5GP
C283 SCD1U10V2KX-5GP C283 SCD1U10V2KX-5GP
TXN1
C672 SCD1U10V2KX-5GP C672 SCD1U10V2KX-5GP
12
TXP1
C671 SCD1U10V2KX-5GP C671 SCD1U10V2KX-5GP
1 2
TXN2
C259 SCD1U10V2KX-5GP C259 SCD1U10V2KX-5GP
12
TXP2
C258 SCD1U10V2KX-5GP C258 SCD1U10V2KX-5GP
1 2
TXN3
12
TXP3
1 2
C
PCIE_CLK_RQ0#
RN
RN
RN
RN
RN
RN
4
4
4
CLK_PCH_SRC1_N
CLK_PCH_SRC1_P
PCIE_CLK_RQ1#
CLK_PCH_SRC2_N
CLK_PCH_SRC2_P
PCIE_CLK_RQ2#
CLK_PCH_SRC0_N
CLK_PCH_SRC0_P
PCIE_CLK_RQ3#
PCIE_CLK_RQ4#
PCIE_CLK_RQ5#
PEG_B_CLKRQ#
0R4P2R-PAD RN20
0R4P2R-PAD RN20
CLK_PCIE_MINI1# 32
CLK_PCIE_MINI1 32
MINI1_CLKREQ# 32
CLK_PCIE_MINI2# 32
CLK_PCIE_MINI2 32
MIN2_CLKREQ# 32
CLK_PCIE_LAN# 28
CLK_PCIE_LAN 28
LAN_CLKREQ# 28
B
2 3
1
R585 0R0402-PAD R585 0R0402-PAD
1 2
0R4P2R-PAD RN22
0R4P2R-PAD RN22
1
2 3
R241 0R0402-PAD R241 0R0402-PAD
1 2
0R4P2R-PAD RN21
0R4P2R-PAD RN21
1
2 3
R628 0R0402-PAD R628 0R0402-PAD
1 2
PCIE_CLK_RQ4# 16
PEG_B_CLKRQ# 13
PCH1B
PCH1B
BG30
PERN1
BJ30
PERP1
BF29
PETN1
BH29
PETP1
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0#/GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1#/GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2#/GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3#/GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4#/GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5#/GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ#/GPIO56
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
71.0HM55.A0U
71.0HM55.A0U
4
2 OF 10
2 OF 10
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
CLKIN_DMI_N
CLKIN_DMI_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
B9
H14
C8
J14
C6
G8
M14
E10
G12
T13
T11
T9
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
J42
AH51
AH53
AF38
T45
P43
T42
N50
SMB_CLK
SMB_DATA
SML0_CLK
SML0_DATA
PCH_GPIO74
KBC_SCL1
KBC_SDA1
CL_CLK
CL_DATA
CL_RST#
PEG_CLKREQ# PEG_CLKREQ#
CLK_PCH_PEGA_N
CLK_PCH_PEGA_P
CLK_EXP_N
CLK_EXP_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI#
CLKIN_DMI
CLK_CPU_BCLK#
CLK_CPU_BCLK
DREFCLK#
DREFCLK
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_ICH14
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
PCH_FLEX0
PCH_FLEX1
PCH_FLEX2
CLK48
SMBus
SMBus
PCI-E*
PCI-E*
Link
Link
Controller
Controller
PEG_A_CLKRQ#/GPIO47
PEG
PEG
CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P
From CLK BUFFER
From CLK BUFFER
CLKIN_SATA_N/CKSSCD_N
CLKIN_SATA_P/CKSSCD_P
Clock Flex
Clock Flex
SMBALERT#/GPIO11
SML0ALERT#/GPIO60
SML1ALERT#/GPIO74
SML1CLK/GPIO58
SML1DATA/GPIO75
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_PCILOOPBACK
XCLK_RCOMP
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
3
1
TP63 TPAD14-GP TP63 TPAD14-GP
1
TP62 TPAD14-GP TP62 TPAD14-GP
1
TP61 TPAD14-GP TP61 TPAD14-GP
1 2
R265
R265
R212 90D9R2F-1-GP R212 90D9R2F-1-GP
1
1
1
1 2
PCH_GPIO11
SMB_CLK 32
SMB_DATA 32
PCH_GPIO60 16
DIS
DIS
1
2 3
4
4
CLKIN_DMI# 3
CLKIN_DMI 3
CLK_CPU_BCLK# 3
CLK_CPU_BCLK 3
DREFCLK# 3
DREFCLK 3
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
CLK_ICH14 3
CLK_PCI_FB 15
1 2
TP65 TPAD14-GP TP65 TPAD14-GP
TP67 TPAD14-GP TP67 TPAD14-GP
TP64 TPAD14-GP TP64 TPAD14-GP
71.0HM55.A0U
A
R639
R639
10KR2J-3-GP
10KR2J-3-GP
1 2
PCIE_CLK_RQ3#
3D3V_S0 3D3V_S5 3D3V_S0
R590
R590
10KR2J-3-GP
10KR2J-3-GP
1 2
PCIE_CLK_RQ1#
1 2
R238
R238
10KR2J-3-GP
10KR2J-3-GP
PCIE_CLK_RQ2#
5
3D3V_S5
1 2
R618
R618
10KR2J-3-GP
10KR2J-3-GP
PEG_CLKREQ#
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
PCH (2/9)-PCIE / SMBUS / CLK
PCH (2/9)-PCIE / SMBUS / CLK
PCH (2/9)-PCIE / SMBUS / CLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C
1
-1
-1
12 58 Monday, March 22, 2010
12 58 Monday, March 22, 2010
12 58 Monday, March 22, 2010
-1
5
DMI_RXN0 4
DMI_RXN1 4
DMI_RXN2 4
DMI_RXN3 4
DMI_RXP0 4
DMI_RXP1 4
DMI_RXP2 4
DMI_RXP3 4
D D
1D05V_S0
1 2
R154 49D9R2F-GP R154 49D9R2F-GP
R302 0R2J-2-GP
R302 0R2J-2-GP
1 2
DY
PM_PWROK 37
C C
CORE_PW RGD 37,40
PM_DRAM_PWRGD 5
SUS_PW R_DN_ACK 34
PM_PWRBTN# 34
AC_PRESENT 34
DY
R650 0R0402-PAD R650 0R0402-PAD
1 2
1 2
R248 10KR2J-3-GP R248 10KR2J-3-GP
SUS_PW R_DN_ACK_R 16
R598
R598
R242
R242
R594
R594
1 2
0R0402-PAD
0R0402-PAD
1 2
0R0402-PAD
0R0402-PAD
1 2
0R0402-PAD
0R0402-PAD
DMI_TXN0 4
DMI_TXN1 4
DMI_TXN2 4
DMI_TXN3 4
DMI_TXP0 4
DMI_TXP1 4
DMI_TXP2 4
DMI_TXP3 4
DMI_IRCOMP_R
PM_PWROK_1
R249
R249
1 2
0R0402-PAD
0R0402-PAD
1 2
R635 10KR2J-3-GP R635 10KR2J-3-GP
PM_RI# 12
B B
3D3V_S5
D12
D12
RSMRST#_KBC_R
R314
R314
RSMRST#_KBC 34
PWM_RSMRST# 42
1 2
1 2
R315 0R2J-2-GP
R315 0R2J-2-GP
0R0402-PAD
0R0402-PAD
DY
DY
2
83.00054.Z81
83.00054.Z81
2ND = 83.00054.T81
2ND = 83.00054.T81
1
3
BAT54-7-F-GP
BAT54-7-F-GP
4
3D3V_S0
1 2
R237
R237
10KR2J-3-GP
10KR2J-3-GP
PM_SYSRST#_R
ME_PWROK
LAN_RST#1
PM_RSMRST#
SUS_PW R_DN_ACK_R
PM_PWRBTN#_R
AC_PRESENT_R
PCH_GPIO72
PM_RI#
1 2
R276
R276
10KR2J-3-GP
10KR2J-3-GP
PM_RSMRST#
1 2
R306
R306
100KR2J-1-GP
100KR2J-1-GP
PCH1C
PCH1C
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
DMI1TXN
BD20
DMI2TXN
BE18
DMI3TXN
BD22
DMI0TXP
BH21
DMI1TXP
BC20
DMI2TXP
BD18
DMI3TXP
BH25
DMI_ZCOMP
BF25
DMI_IRCOMP
T6
SYS_RESET#
M6
SYS_PWROK
B17
PWROK
K5
MEPWROK
A10
LAN_RST#
D9
DRAMPWROK
C16
RSMRST#
M1
SUS_PWR_DN_ACK/GPIO30
P5
PWRBTN#
P7
ACPRESENT/GPIO31
A6
BATLOW#/GPIO72
F14
RI#
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
71.0HM55.A0U
71.0HM55.A0U
3
3 OF 10
3 OF 10
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
DMI
FDI
DMI
FDI
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
WAKE#
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
SLP_M#
System Power Management
System Power Management
TP23
PMSYNCH
SLP_LAN#/GPIO29
71.0HM55.A0U
AC_PRESENT_R
PCH_GPIO28 16
PEG_B_CLKRQ# 12
PCH_GPIO28
PEG_B_CLKRQ#
PM_PWRBTN#_R
PCH_GPIO72
PCIE_WAKE#
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
BJ14
BF13
BH13
BJ12
BG14
J12
Y1
P8
F3
E4
H7
P12
K8
N2
BJ10
F6
PCIE_WAKE#
PM_CLKRUN#
PM_SUS_STAT#
PM_SUS_CLK
PM_SLP_S5#
PM_SLP_S4#_R
PM_SLP_S3#_R
PM_SLP_M#_R
PM_SLP_DSW#
H_PM_SYNC
PM_SLP_LAN#
1 2
R636 8K2R2J-3-GP R636 8K2R2J-3-GP
1 2
R281 1KR2J-1-GP R281 1KR2J-1-GP
RN30
RN30
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
1
1
1
1
1
8
7
6
FDI_TXN0 4
FDI_TXN1 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXN4 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXN7 4
FDI_TXP0 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXP5 4
FDI_TXP6 4
FDI_TXP7 4
FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4
PCIE_WAKE# 28,32
PM_CLKRUN# 34
TP70 TPAD14-GP TP70 TPAD14-GP
PM_SUS_CLK 34
TP76 TPAD14-GP TP76 TPAD14-GP
1 2
R255 0R0402-PAD R255 0R0402-PAD
1 2
R240 0R0402-PAD R240 0R0402-PAD
TP72 TPAD14-GP TP72 TPAD14-GP
TP93 TPAD14-GP TP93 TPAD14-GP
TP74 TPAD14-GP TP74 TPAD14-GP
3D3V_S5
3D3V_S5
2
PM_SLP_S4# 34,37,44,46
PM_SLP_S3# 5,34,37,45,46,47
H_PM_SYNC 5
1
<Variant Name>
<Variant Name>
A A
PM_CLKRUN#
1 2
R583
R583
8K2R2J-3-GP
8K2R2J-3-GP
3D3V_S0
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
PCH (3/9)-DMI / FDI / PM
PCH (3/9)-DMI / FDI / PM
PCH (3/9)-DMI / FDI / PM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Date: Sheet of
Date: Sheet of
Date: Sheet of
13 58 Monday, March 22, 2010
13 58 Monday, March 22, 2010
13 58 Monday, March 22, 2010
-1
-1
-1
5
3D3V_S0
RN27
RN27
PCH_HDMI_CLK
PCH_HDMI_DATA
4
CLK_DDC_EDID
DAT_DDC_EDID
4
LCTL_CLK
LCTL_DATA
4
LIBG
1 2
PCH_HDMI_DETECT
PCH_DDCCLK
PCH_DDCDATA
4
PCH_BLUE
1
PCH_GREEN
2
PCH_RED
3
4 5
Reserve PD at SW
PCH_BL_ON 22
PCH_LCDVDD_ON 23
L_BKLTCTL 23
CLK_DDC_EDID 22
DAT_DDC_EDID 22
PCH_TXACLK- 22
PCH_TXACLK+ 22
PCH_TXAOUT0- 22
PCH_TXAOUT1- 22
PCH_TXAOUT2- 22
PCH_TXAOUT0+ 22
PCH_TXAOUT1+ 22
PCH_TXAOUT2+ 22
PCH_BLUE 22
PCH_GREEN 22
PCH_RED 22
PCH_DDCCLK 24
PCH_DDCDATA 24
PCH_HSYNC 24
PCH_VSYNC 24
2 3
1
RN29
RN29
UMA
UMA
SRN2K2J-1-GP
SRN2K2J-1-GP
D D
3D3V_S0
2 3
1
RN24
RN24
SRN2K2J-1-GP
SRN2K2J-1-GP
3D3V_S0
SRN10KJ-5-GP
SRN10KJ-5-GP
2 3
1
R186
R186
2K37R2F-GP
2K37R2F-GP
LVDS reference current.
C C
3D3V_S0
1 2
R169
R169
100KR2J-1-GP
100KR2J-1-GP
RN28
RN28
2 3
1
SRN2K2J-1-GP
SRN2K2J-1-GP
RN25
RN25
8
7
6
SRN150F-1-GP
SRN150F-1-GP
B B
Intel check list recommend use 1K 0.5%
4
TP59 TPAD14-GP TP59 TPAD14-GP
1
R181
R181
1 2
0R0402-PAD
0R0402-PAD
1 2
R208
R208
1KR2D-1-GP
1KR2D-1-GP
1K 0.5% ohm
CLK_DDC_EDID
DAT_DDC_EDID
LCTL_CLK
LCTL_DATA
LIBG
L_LVBG
LVDS_VREF
PCH_BLUE
PCH_GREEN
PCH_RED
PCH_DDCCLK
PCH_DDCDATA
CRT_IREF
PCH1D
PCH1D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
AB48
L_DDC_CLK
Y45
L_DDC_DATA
AB46
L_CTRL_CLK
V48
L_CTRL_DATA
AP39
LVD_IBG
AP41
LVD_VBG
AT43
LVD_VREFH
AT42
LVD_VREFL
AV53
LVDSA_CLK#
AV51
LVDSA_CLK
BB47
LVDSA_DATA#0
BA52
LVDSA_DATA#1
AY48
LVDSA_DATA#2
AV47
LVDSA_DATA#3
BB48
LVDSA_DATA0
BA50
LVDSA_DATA1
AY49
LVDSA_DATA2
AV48
LVDSA_DATA3
AP48
LVDSB_CLK#
AP47
LVDSB_CLK
AY53
LVDSB_DATA#0
AT49
LVDSB_DATA#1
AU52
LVDSB_DATA#2
AT53
LVDSB_DATA#3
AY51
LVDSB_DATA0
AT48
LVDSB_DATA1
AU50
LVDSB_DATA2
AT51
LVDSB_DATA3
AA52
CRT_BLUE
AB53
CRT_GREEN
AD53
CRT_RED
V51
CRT_DDC_CLK
V53
CRT_DDC_DATA
Y53
CRT_HSYNC
Y51
CRT_VSYNC
AD48
DAC_IREF
AB51
CRT_IRTN
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
71.0HM55.A0U
71.0HM55.A0U
3
4 OF 10
4 OF 10
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
71.0HM55.A0U
BJ46
BG46
BJ48
BG48
BF45
BH45
PCH_HDMI_CLK
T51
PCH_HDMI_DATA
T53
BG44
BJ44
PCH_HDMI_DETECT
AU38
PCH_HDMI_DATA2-_L
BD42
PCH_HDMI_DATA2+_L
BC42
PCH_HDMI_DATA1-_L
BJ42
PCH_HDMI_DATA1+_L
BG42
PCH_HDMI_DATA0-_L
BB40
PCH_HDMI_DATA0+_L
BA40
PCH_HDMI_CLK-_L
AW38
PCH_HDMI_CLK+_L
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
2
PCH_HDMI_CLK 25
PCH_HDMI_DATA 25
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
PCH_HDMI_DETECT 25
1 2
C272 SCD1U10V2KX-5GP
C272 SCD1U10V2KX-5GP
1 2
C278 SCD1U10V2KX-5GP
C278 SCD1U10V2KX-5GP
1 2
C246 SCD1U10V2KX-5GP
C246 SCD1U10V2KX-5GP
1 2
C250 SCD1U10V2KX-5GP
C250 SCD1U10V2KX-5GP
1 2
C252 SCD1U10V2KX-5GP
C252 SCD1U10V2KX-5GP
1 2
C251 SCD1U10V2KX-5GP
C251 SCD1U10V2KX-5GP
1 2
C254 SCD1U10V2KX-5GP
C254 SCD1U10V2KX-5GP
1 2
C253 SCD1U10V2KX-5GP
C253 SCD1U10V2KX-5GP
PCH_HDMI_DATA2- 25
PCH_HDMI_DATA2+ 25
PCH_HDMI_DATA1- 25
PCH_HDMI_DATA1+ 25
PCH_HDMI_DATA0- 25
PCH_HDMI_DATA0+ 25
PCH_HDMI_CLK- 25
PCH_HDMI_CLK+ 25
1
<Variant Name>
<Variant Name>
A A
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
PCH (4/9)-LVDS / CRT
PCH (4/9)-LVDS / CRT
PCH (4/9)-LVDS / CRT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Date: Sheet of
Date: Sheet of
Date: Sheet of
14 58 Monday, March 22, 2010
14 58 Monday, March 22, 2010
14 58 Monday, March 22, 2010
-1
-1
-1
5
RN40
1 2
1 2
1 2
1 2
1 2
1 2
1 2
RN35
RN35
1
2
3
4 5
1 2
DY
DY
1 2
DY
DY
RN40
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
INT_PIRQC#
8
INT_PIRQE#
7
INT_PIRQA#
6
PCI_SERR#
R258
R258
1KR2J-1-GP
1KR2J-1-GP
R251
R251
1KR2J-1-GP
1KR2J-1-GP
PCI_PLOCK#
PCI_DEVSEL#
PCI_FRAME#
D
C
PCI_TRDY#
3D3V_S0
3D3V_S0
R641 8K2R2J-3-GP R641 8K2R2J-3-GP
R612 8K2R2J-3-GP R612 8K2R2J-3-GP
R605 8K2R2J-3-GP R605 8K2R2J-3-GP
3D3V_S0
R649 8K2R2J-3-GP R649 8K2R2J-3-GP
R269 8K2R2J-3-GP R269 8K2R2J-3-GP
R264 8K2R2J-3-GP R264 8K2R2J-3-GP
R610 8K2R2J-3-GP R610 8K2R2J-3-GP
3D3V_S0
SRN8K2J-4-GP
SRN8K2J-4-GP
PCI_GNT0#
PCI_GNT1#
10
INT_PIRQG#
9
8
7
PCI_IRDY#
PCI_REQ1#
INT_PIRQB#
PCI_REQ3#
INT_PIRQH#
PCI_PERR#
PCI_REQ0#
INT_PIRQF#
3D3V_S0
PCI_STOP#
INT_PIRQD#
These pins are left as NC,
because the function is disable.
CHECK
3D3V_S0
dGPU_SELECT# 22,23,24
dGPU_PWM_SELECT# 23
BOOT BIOS Strap
PCI_GNT#1 BOOT BIOS Location PCI_GNT#0
0 0 LPC
0 1 Reserved
0 1
1 1
PCI
SPI(Default)
B B
R244 22R2J-2-GP R244 22R2J-2-GP
CLK_PCI_FB 12
CLK_PCI_KBC 34
U70
U70
1
PCI_PLTRST#
A A
B
2
A
3
GND
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
DY
DY
1 2
R624
R624
1 2
R243 22R2J-2-GP R243 22R2J-2-GP
1 2
3D3V_S5
5
VCC
4
Y
0R0402-PAD
0R0402-PAD
5
R633
R633
8K2R2J-3-GP
8K2R2J-3-GP
1 2
dGPU_SELECT#
dGPU_PWM_SELECT#
TP71 TPAD14-GP TP71 TPAD14-GP
TP99 TPAD14-GP TP99 TPAD14-GP
TP66 TPAD14-GP TP66 TPAD14-GP
TP68 TPAD14-GP TP68 TPAD14-GP
1 2
C385
C385
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
1 2
R632
R632
100KR2J-1-GP
100KR2J-1-GP
4
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
PCI_REQ0#
PCI_REQ1#
PCI_REQ3#
PCI_GNT0#
PCI_GNT1#
PCI_GNT3#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
PCI_SERR#
PCI_PERR#
PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#
PCI_PLOCK#
PCI_STOP#
PCI_TRDY#
ICH_PME#
1
PCI_PLTRST#
CLK_PCI_SIO_R
1
CLK_PCI_FB_R
CLK_PCI_KBC_R
CLK_PCI_3
1
CLK_PCI_4
1
PLT_RST# 5,28,32,34,49
4
PCH1E
PCH1E
H40
AD0
N34
AD1
C44
AD2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
C/BE3#
G38
PIRQA#
H51
PIRQB#
B37
PIRQC#
A44
PIRQD#
F51
REQ0#
A46
REQ1#/GPIO50
B45
REQ2#/GPIO52
M53
REQ3#/GPIO54
F48
GNT0#
K45
GNT1#/GPIO51
F36
GNT2#/GPIO53
H53
GNT3#/GPIO55
B41
PIRQE#/GPIO2
K53
PIRQF#/GPIO3
A36
PIRQG#/GPIO4
A48
PIRQH#/GPIO5
K6
PCIRST#
E44
SERR#
E50
PERR#
A42
IRDY#
H44
PAR
F46
DEVSEL#
C46
FRAME#
D49
PLOCK#
D41
STOP#
C48
TRDY#
M7
PME#
D5
PLTRST#
N52
CLKOUT_PCI0
P53
CLKOUT_PCI1
P46
CLKOUT_PCI2
P51
CLKOUT_PCI3
P48
CLKOUT_PCI4
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
71.0HM55.A0U
71.0HM55.A0U
5 OF 10
5 OF 10
AY9
NV_CE#0
BD1
NV_CE#1
AP15
NV_CE#2
BD8
NV_CE#3
AV9
NV_DQS0
BG8
NV_DQS1
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC5#/GPIO9
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
BD3
AY6
AU2
AV7
AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25
D25
N16
J16
F16
L16
E14
G16
F12
T15
PCI
PCI
NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8
NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11
NVRAM
NVRAM
NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USB
USB
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC6#/GPIO10
OC7#/GPIO14
71.0HM55.A0U
PCI_GNT3#
1 2
DY
DY
R617 4K7R2J-2-GP
R617 4K7R2J-2-GP
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default
3
These pins are left as NC,
because the function is disable.
NV_ALE
NV_CLE
NV_RCOMP
1 2
DY
DY
R569
R569
32D4R2F-GP
32D4R2F-GP
USB_RBIAS_PN
USB_OC#3
R273
R273
22D6R2F-L1-GP
22D6R2F-L1-GP
3
1 2
USB_OC#0 27
USB_OC#1 27
USB_OC#2 26
DMI Termination Voltage
NV_CLE Set to Vss when low.
Set to Vcc when high.
CHECK
USBPN1 27
USBPP1 27
USBPN2 27
USBPP2 27
USBPN3 32
USBPP3 32
USBPN4 26
USBPP4 26
USBPN5 26
USBPP5 26
USBPN8 31
USBPP8 31
USBPN9 27
USBPP9 27
USBPN10 35
USBPP10 35
USBPN11 31
USBPP11 31
USBPN12 32
USBPP12 32
USBPN13 23
USBPP13 23
USB_OC#2
USB_OC#1
USB_OC#3
USB_OC#0
OC#0 Port 0 & 1
OC#1 Port 2 & 3
OC#2 Port 4 & 5
OC#3 Port 6 & 7
OC#4 Port 8 & 9
OC#5 Port 10 & 11
OC#6 Port 12 & 13
OC#7 Floater OC# (not used)
2
Danbury Technology:
Disabled when Low.
Enable when High.
Pair
0
NC
USB3
1
USB1
2
3
WLAN
4
E-SATA
5
USB2
Disable (HM55)
6
7
Disable (HM55)
Card Reader
8
Blue Tooth
9
10
Finger Print
11
Micro SD
WWAN
12
Camera
13
RN36
RN36
8
7
6
SRN10KJ-6-GP
SRN10KJ-6-GP
2
+V_NVRAM_VCCQ
R172
R172
1KR2J-1-GP
1KR2J-1-GP
NV_CLE
+V_NVRAM_VCCQ
NV_ALE
Device
3D3V_S5
1
2
3
4 5
EHCI 1
EHCI 2
1 2
DY
DY
1 2
DY
DY
R167
R167
1KR2J-1-GP
1KR2J-1-GP
1
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
PCH (5/9)-PCI / USB
PCH (5/9)-PCI / USB
PCH (5/9)-PCI / USB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C
15 58 Monday, March 22, 2010
15 58 Monday, March 22, 2010
15 58 Monday, March 22, 2010
1
-1
-1
-1
5
PCH_GPIO39
SATA_DET#1_R 11
SATA_DET#1_R
PSW_CLR#
6
7
8
D D
PCH_GPIO35
DGPU_HOLD_RST#
DGPU_PW R_EN#
PSW_CLR#
2 1
G27
G27
GAP-OPEN
GAP-OPEN
C C
PCIE_CLK_RQ4# 12
PCH_GPIO60 12
SUS_PW R_DN_ACK_R 13
1 2
1 2
EC_SWI#
PCIE_CLK_RQ4#
PCH_GPIO60
PCH_GPIO45
PCH_GPIO46
R225 10KR2J-3-GP R225 10KR2J-3-GP
1 2
R218 10KR2J-3-GP R218 10KR2J-3-GP
R224 10KR2J-3-GP R224 10KR2J-3-GP
6
SUS_PW R_DN_ACK_R
7
8
R620 8K2R2J-3-GP R620 8K2R2J-3-GP
R622 8K2R2J-3-GP R622 8K2R2J-3-GP
RST_GATE 5
RN33
RN33
45
3
2
1
SRN10KJ-6-GP
SRN10KJ-6-GP
1 2
12
RN26
RN26
SRN10KJ-6-GP
SRN10KJ-6-GP
EC_SCI# 34
EC_SWI# 34
PCH_GPIO12 12
DGPU_HOLD_RST# 49
DGPU_PW R_EN# 52
3D3V_S5
3D3V_S0
45
3
2
1
DGPU_PW ROK 43,48,49
dGPU_EDID 22,24
R271 0R0402-PAD R271 0R0402-PAD
B B
PCH_GPIO0
EC_SMI#
dGPU_EDID
EC_SCI#
PCH_GPIO15
3D3V_S0
1 2
R239 1KR2J-1-GP R239 1KR2J-1-GP
RP1
RP1
1
2
3
4
5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
3D3V_S0
10
PCH_GPIO22
9
8
7
STP_PCI#
PX_HDMI#
A A
TP94 TPAD14-GP TP94 TPAD14-GP
TP73 TPAD14-GP TP73 TPAD14-GP
TP60 TPAD14-GP TP60 TPAD14-GP
PCH_GPIO28 13
1 2
PCH_GPIO48 11
PCH_GPIO57 12
4
PCH_GPIO0
EC_SMI#
PX_HDMI#
1
EC_SCI#
EC_SWI#
PCH_GPIO12
PCH_GPIO15
DGPU_HOLD_RST#
PCH_GPIO22
PCH_GPIO24
1
PCH_GPIO27
1
PCH_GPIO28
STP_PCI#
PCH_GPIO35
DGPU_PW R_EN#
dGPU_PRSNT#
dGPU_EDID
PCH_GPIO39
PCH_GPIO45
PCH_GPIO46
PCH_GPIO48
PSW_CLR#
PCH_GPIO57
PCH1F
PCH1F
Y3
BMBUSY#/GPIO0
C38
TACH1/GPIO1
D37
TACH2/GPIO6
J32
TACH3/GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL/GPIO12
T7
GPIO15
AA2
SATA4GP/GPIO16
F38
TACH0/GPIO17
Y7
SCLOCK/GPIO22
H10
GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI#/GPIO34
V6
SATACLKREQ#/GPIO35
AB7
SATA2GP/GPIO36
AB13
SATA3GP/GPIO37
V3
SLOAD/GPIO38
P3
SDATAOUT0/GPIO39
H3
PCIECLKRQ6#/GPIO45
F1
PCIECLKRQ7#/GPIO46
AB6
SDATAOUT1/GPIO48
AA4
SATA5GP/GPIO49
F8
GPIO57
B4
VSS_NCTF_8
B52
VSS_NCTF_9
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17
D2
VSS_NCTF_28
A4
VSS_NCTF#A4
A49
VSS_NCTF#A49
A5
VSS_NCTF#A5
A50
VSS_NCTF#A50
A52
VSS_NCTF#A52
A53
VSS_NCTF#A53
B2
VSS_NCTF#B2
B53
VSS_NCTF#B53
BE1
VSS_NCTF#BE1
BE53
VSS_NCTF#BE53
BF1
VSS_NCTF#BF1
BF53
VSS_NCTF#BF53
BH1
VSS_NCTF#BH1
BH53
VSS_NCTF#BH53
BJ1
VSS_NCTF#BJ1
BJ2
VSS_NCTF#BJ2
BJ4
VSS_NCTF#BJ4
BJ49
VSS_NCTF#BJ49
BJ5
VSS_NCTF#BJ5
BJ50
VSS_NCTF#BJ50
BJ52
VSS_NCTF#BJ52
BJ53
VSS_NCTF#BJ53
D1
VSS_NCTF#D1
D53
VSS_NCTF#D53
E1
VSS_NCTF#E1
E53
VSS_NCTF#E53
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
71.0HM55.A0U
71.0HM55.A0U
3
MISC
MISC
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
NCTF TEST PIN:
A4,A49,A5,A50,A52,A53,B2,B53,BE1,
BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,
BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
NCTF TEST PIN:
A4,A49,A5,A50,A52,A53,B2,B53,BE1,
BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,
BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
71.0HM55.A0U
6 OF 10
6 OF 10
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
AH45
AH46
AF48
AF47
U2
AM3
AM1
BG10
T1
BE10
BD10
BA22
AW22
BB22
AY45
AY46
AV43
AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
BCLK_CPU_N_R
BCLK_CPU_P_R DGPU_PW ROK
PCH_THERMTRIP_R
INIT3_3V#
2
KA20GATE 34
2 3
1
4
H_PECI 5
KBRCIN# 34
H_PWRGD 5,37
1 2
R166
R166
54D9R2F-L1-GP
54D9R2F-L1-GP
Placed Within 2" from PCH
3D3V_S0
UMA
UMA
R213
R213
10KR2J-3-GP
10KR2J-3-GP
1 2
dGPU_PRSNT#
R221
R221
10KR2J-3-GP
10KR2J-3-GP
DIS
DIS
1 2
1
TP69 TPAD14-GP TP69 TPAD14-GP
PU at KBC
SRN0J-10-GP-U
SRN0J-10-GP-U
RN59
RN59
PU at KBC
1 2
R165
R165
56R2J-4-GP
56R2J-4-GP
GPIO8 has a weak[20K] internal pull up.
No need to have external pull down/up.
GPIO8 pin set to high at reset.
GPIO15 has a weak[20K] internal pull down.
No need to have external pull up/down.
GPIO 15 pin is set to low at reset.
Low : ME Crypto TLS with no confidentiality
High : ME Crypto TLS with confidentiality
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.
S
W
A
t
h
T
u
h
e
A
s
i
n
C
e
s
L
u
K
a
p
s
R
i
e
E
p
n
d
Q
u
#
l
i
a
:
l
s
s
-
u
o
S
p
p
A
e
T
r
n
A
e
C
s
d
L
i
r
K
s
a
R
t
i
E
o
n
Q
r
#
.
a
,
n
d
s
h
o
u
l
d
BCLK_CPU_N 5
BCLK_CPU_P 5
1D05V_VTT
PM_THRMTRIP-A# 5,37
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
PCH (6/9)-GPIO/VSS_NCTF/RSVD
PCH (6/9)-GPIO/VSS_NCTF/RSVD
PCH (6/9)-GPIO/VSS_NCTF/RSVD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
16 58 Monday, March 22, 2010
16 58 Monday, March 22, 2010
16 58 Monday, March 22, 2010
-1
-1
-1
5
4
3
2
1
1D05V_S0
1.432A
C245
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C245
1 2
1 2
C327
C327
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
D D
1D05V_S0
1D05V_S0
42mA
1D05V_S0
C C
DY
DY
1D05V_S0
B B
3.062A
1 2
TC5
TC5
C256
C256
ST220U2D5VBM-2GP
ST220U2D5VBM-2GP
1 2
NOTE: This pin can be left as no
connect in On-Die VR enabled mode
(default).
1 2
DY
DY
L31 IND-1UH-2-GP
L31 IND-1UH-2-GP
1D05V_S0
1 2
DY
DY
L30 IND-1UH-2-GP
L30 IND-1UH-2-GP
NOTE: This pin can be left as no
connect in On-Die VR enabled mode
(default).
1 2
1 2
C243
C243
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C676
C676
1 2
C333
C333
C338
C338
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
DY
DY
1 2
C347
C347
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C280
C280
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C306
C306
C288
C288
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+1.05VS_VCCAPLL_EXP
1 2
C675
C675
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
1 2
1 2
3D3V_S0
1 2
C318
C318
C343
C343
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
VCCAFDI_VRM
+1.05VS_VCCAPLL_FDI
1 2
C313
C313
C337
C337
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
357mA
1D5V_S0
PCH1G
PCH1G
AB24
VCCCORE
AB26
VCCCORE
AB28
VCCCORE
AD26
VCCCORE
AD28
VCCCORE
AF26
VCCCORE
AF28
VCCCORE
AF30
VCCCORE
AF31
VCCCORE
AH26
VCCCORE
AH28
VCCCORE
AH30
VCCCORE
AH31
VCCCORE
AJ30
VCCCORE
AJ31
VCCCORE
AK24
VCCIO
BJ24
VCCAPLLEXP
AN20
VCCIO
AN22
VCCIO
AN23
VCCIO
AN24
VCCIO
AN26
VCCIO
AN28
VCCIO
BJ26
VCCIO
BJ28
VCCIO
AT26
VCCIO
AT28
VCCIO
AU26
VCCIO
AU28
VCCIO
AV26
VCCIO
AV28
VCCIO
AW26
VCCIO
AW28
VCCIO
BA26
VCCIO
BA28
VCCIO
BB26
VCCIO
BB28
VCCIO
BC26
VCCIO
BC28
VCCIO
BD26
VCCIO
BD28
VCCIO
BE26
VCCIO
BE28
VCCIO
BG26
VCCIO
BG28
VCCIO
BH27
VCCIO
AN30
VCCIO
AN31
VCCIO
AN35
VCC3_3
AT22
VCCVRM[1]
BJ18
VCCFDIPLL
AM23
VCCIO
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
71.0HM55.A0U
71.0HM55.A0U
1 2
R156 0R0603-PAD R156 0R0603-PAD
1 2
R158 0R3J-0-U-GP
R158 0R3J-0-U-GP
POWER
POWER
CRT LVDS
CRT LVDS
VCC CORE
VCC CORE
HVCMOS
HVCMOS
DMI
DMI
PCI E*
PCI E*
NAND / SPI
NAND / SPI
FDI
FDI
71.0HM55.A0U
1D5V_S0_1D8V_S0 1D8V_S0
DY
DY
7 OF 10
7 OF 10
AE50
VCCADAC
AE52
VCCADAC
AF53
VSSA_DAC
AF51
VSSA_DAC
AH38
VCCALVDS
VCC3_3
VCC3_3
VCC3_3
VCCVRM
VCCDMI
VCCDMI
VCCME3_3
VCCME3_3
VCCME3_3
VCCME3_3
1 2
AH39
AP43
AP45
AT46
AT45
AB34
AB35
AD35
AT24
AT16
AU16
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
AM8
AM9
AP11
AP9
VCCAFDI_VRM
VSSA_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
R196 0R0603-PAD R196 0R0603-PAD
+VCCA_DAC_1_2
1 2
R593
R593
0R2J-2-GP
0R2J-2-GP
DY
DY
+3VS_VCCA_LVD
1 2
R199 0R0603-PAD R199 0R0603-PAD
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
C294
C294
357mA
1 2
C305
C305
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C314
C314
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
85mA
1 2
C304
C304
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R592
R592
1 2
1 2
C696
C696
C695
C695
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
300mA
+1.8VS_VCCTX_LVDS
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
1 2
C301
C301
C302
C302
DY
DY
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
3D3V_S0
1 2
C339
C339
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D5V_S0_1D8V_S0
196mA
+1.1VS_VCC_DMI
R188 0R0603-PAD R188 0R0603-PAD
1 2
R201 0R3J-0-U-GP
R201 0R3J-0-U-GP
1 2
156mA
VCCME3_3
+V_NVRAM_VCCQ
VCCPNAND which power the DC NAND interface must be powered even if dual channel
NAND interface is not connected since it also supplies power to other functions inside
PCH.
If NAND Interface is unused then this pin should be pulled up to 1.8V or 3.3V.
1 2
R202 0R0603-PAD R202 0R0603-PAD
DY
DY
3D3V_S0
1 2
DY
DY
0R0603-PAD
0R0603-PAD
1 2
1 2
C694
C694
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
R191
R191
3D3V_S0
59mA
61mA
69mA
0R0402-PAD
0R0402-PAD
1D8V_S0
5V_S0
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1 2
3D3V_S0_DAC
C334
C334
1D05V_VTT
1D05V_S0
U32
U32
1
VIN
2
GND
EN3NC#4
G9091-330T11U-GP
G9091-330T11U-GP
74.09091.J3F
74.09091.J3F
Imax = 300 mA
0R0603-PAD
0R0603-PAD
R207
R207
VOUT
3D3V_S0_DAC
5
C357
C357
4
3D3V_S0 1D8V_S0
1 2
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1 2
1 2
1 2
DY
DY
0R3J-0-U-GP
0R3J-0-U-GP
R209
R209
C359
C359
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
<Variant Name>
<Variant Name>
A A
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Title
Title
Title
PCH (7/9)-PWR_1
PCH (7/9)-PWR_1
PCH (7/9)-PWR_1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Date: Sheet of
Date: Sheet of
Date: Sheet of
17 58 Monday, March 22, 2010
17 58 Monday, March 22, 2010
17 58 Monday, March 22, 2010
-1
-1
-1
5
1D05V_S0 +1.05VS_VCCA_CLK
52mA
NOTE: This pin can be left as no connect in
On-Die VR enabled mode (default).
1D05V_S0
D D
1D05V_S0
C C
VccLAN may be grounded i f
Intel LAN is disabled
L29
L29
1 2
IND-10UH-215-GP
IND-10UH-215-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
L28
L28
1 2
IND-10UH-215-GP
IND-10UH-215-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
B B
1 2
1D05V_S0
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
+1.05VS_VCCA_A_DPL
1 2
C674
C674
+1.05VS_VCCA_B_DPL
1 2
C673
C673
1D05V_S0
3D3V_S5
C378
C378
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D05V_VTT
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
R216
R216
0R2J-2-GP
0R2J-2-GP
DY
DY
0R0402-PAD
0R0402-PAD
1 2
C257
C257
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C678
C678
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C677
C677
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C322
C322
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
163mA
1 2
R176
R176
1 2
0R0603-PAD
0R0603-PAD
C270
C270
RTC_AUX_S5
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
+1.05VS_VCCLAN
1 2
R217
R217
C341
C341
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C342
C342
3D3V_S0
1mA
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R283
R283
1 2
0R0603-PAD
0R0603-PAD
C390
C390
L10
L10
IND-10UH-215-GP
IND-10UH-215-GP
C315
C315
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
1.849A
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C331
C331
68mA
69mA
C316
C316
+VCCSST
1 2
C293
C293
2mA
1 2
1 2
DY
DY
C328
C328
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C361
C361
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C391
C391
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
A A
4
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C311
C311
DY
DY
DCPSUSBYP
C344
C344
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C271
C271
1 2
C321
C321
DY
DY
+VCCRTCEXT
1D5V_S0_1D8V_S0
1 2
C319
C319
+1.1VALW_INT_VCCSUS
1 2
C345
C345
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+1.1VS_PCH_CPU_IO
+1.1VS_PCH_VCCRTC
C292
C292
1 2
PCH1J
PCH1J
AP51
VCCACLK
AP53
VCCACLK
AF23
VCCLAN
AF24
VCCLAN
Y20
DCPSUSBYP
AD38
VCCME
AD39
VCCME
AD41
VCCME
AF43
VCCME
AF41
VCCME
AF42
VCCME
V39
VCCME
V41
VCCME
V42
VCCME
Y39
VCCME
Y41
VCCME
Y42
VCCME
V9
DCPRTC
AU24
VCCVRM
BB51
VCCADPLLA
BB53
VCCADPLLA
BD51
VCCADPLLB
BD53
VCCADPLLB
AH23
VCCIO
AJ35
VCCIO
AH35
VCCIO
AF34
VCCIO
AH34
VCCIO
AF32
VCCIO
V12
DCPSST
Y22
DCPSUS
P18
VCCSUS3_3
U19
VCCSUS3_3
U20
VCCSUS3_3
U22
VCCSUS3_3
V15
VCC3_3
V16
VCC3_3
Y16
VCC3_3
AT18
V_CPU_IO
AU18
V_CPU_IO
A12
VCCRTC
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
71.0HM55.A0U
71.0HM55.A0U
POWER
POWER
USB
USB
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPC
PCI/GPIO/LPC
SATA
SATA
CPU
CPU
RTC PCI/GPIO/LPC
RTC PCI/GPIO/LPC
HDA
HDA
10 OF 10
10 OF 10
VCCIO
VCCIO
VCCIO
VCCIO
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCIO
V5REF_SUS
V5REF
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCCSATAPLL
VCCSATAPLL
VCCIO
VCCVRM
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCME
VCCME
VCCME
VCCME
VCCSUSHDA
71.0HM55.A0U
3
V24
V26
Y24
Y26
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
U23
V23
F24
K49
J38
L38
M36
N36
P36
U35
AD13
AK3
AK1
AH22
AT20
AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22
AA34
Y34
Y35
AA35
L30
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PCH_VCC_1_1_20
PCH_VCC_1_1_21
PCH_VCC_1_1_22
PCH_VCC_1_1_23
1 2
C332
C332
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C348
C348
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+5VALW_PCH_VCC5REFSUS
+5VS_PCH_VCC5REF
1 2
C317
C317
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+1.05VS_VCCAPLL
1 2
C308
C308
DY
DY
1D5V_S0_1D8V_S0
R220 0R0402-PAD R220 0R0402-PAD
1 2
R228 0R0402-PAD R228 0R0402-PAD
1 2
R232 0R0402-PAD R232 0R0402-PAD
1 2
R222 0R0402-PAD R222 0R0402-PAD
1 2
1 2
C360
C360
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C393
C393
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C364
C364
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D05V_S0
1mA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1mA
1 2
1 2
C307
C307
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
6mA
1D05V_S0
3D3V_S5
3D3V_S5
3D3V_S5
D11
D11
2 1
CH751H-40PT-GP
CH751H-40PT-GP
83.R0304.A8F
83.R0304.A8F
2ND = 83.R3004.A8F
2ND = 83.R3004.A8F
1 2
1 2
C384
C384
3D3V_S0
C370
C370
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D05V_S0
2
1 2
C356
C356
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
R293
R293
10R2J-2-GP
10R2J-2-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
DY
DY
L11
L11
IND-10UH-215-GP
IND-10UH-215-GP
1 2
C310
C310
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+3VS_+1.5VS_HDA_IO
5V_S5
3D3V_S0
R247
R247
1 2
0R0603-PAD
0R0603-PAD
1
3D3V_S0
D10
D10
2 1
CH751H-40PT-GP
CH751H-40PT-GP
83.R0304.A8F
83.R0304.A8F
2ND = 83.R3004.A8F
2ND = 83.R3004.A8F
1 2
1 2
C371
C371
32mA
1D05V_S0
1D05V_S0
3D3V_S5
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
5V_S0
R260
R260
10R2J-2-GP
10R2J-2-GP
PCH (8/9)-PWR_2
PCH (8/9)-PWR_2
PCH (8/9)-PWR_2
LA36 MB DIS
LA36 MB DIS
LA36 MB DIS
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
Taipei Hsien 221, Taiwan, R.O.C
-1
-1
18 58 Monday, March 22, 2010
18 58 Monday, March 22, 2010
18 58 Monday, March 22, 2010
-1