4 4
DDR3 socket
DDR3 socket
3 3
HP/SPDIF
INT.SPKR
MIC In
INT MIC ARRAY
2 2
RJ11
New card
Power switch
1 1
A
CLK GEN.
ICS 9LPRS365
RTM875N
15
16
3
HOST BUS
800/1066MHz
800/1066MHz
X4 DMI
400MHz
B
Mobile CPU
Penryn
667/800/1066MHz@1.05V
Cantiga
AGTL+ CPU I/F
DDR Memory I/F
INTEGRATED GRAHPICS
LVDS, CRT I/F
8,9,10,11,12,13,14
C-Link0
G7921
07
4, 5
UMA
PCIE*16
Extended VGA
ATI M82s
Codec
ALC269
(include AMP)
Support Dolby HT
AZALIA
34
ICH9M
6 PCIe ports
PCI/PCI BRIDGE
ACPI 1.1
4 SATA
12 USB
High Definition Audio
LPC I/F
Serial Peripheral I/F
PCI BUS
Cardreader
PCIe x1
MODEM
26,27,28,29,30
USB
41
MDC Card
(option)
39
PCI Express
SATA
SATA
SATA-HDD31SATA-CDROM
29
31
22
LPC BUS
MINI USB
BlueTooth
USB
42
CAMERA
17
3 Port
A
B
C
Hyper
design
(only support CRT /LCD)
19,20,21,22,23,24
Ricoh
R5C833
32,33
LAN
Boardcom
10 /100M
BCM5906
39
C
35
Winbond
WPC776
Touch
Pad
KBC
51 51
D
Project code: 91.4Y701.001
PCB P/N :
REVISION : 07242-1
PCB 8-LAYER STACKUP
TOP
CRT
LCD
CRT
LCD
HDMI
1394
CONN
33
Mini Card *2
a/b/g/n
Kedron
SPI I/F
38
INT.
KB
CIR
40
39
18
17
18
17
25
MS/MS Pro/xD/
MMC/SD
RJ45
BIOS
2M byte
5 in 1
36
D
GND
PWR
GND
BOTTOM
51
S
S
S
33
LPC
DEBUG
CONN.
31
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet
Date: Sheet
E
SYSTEM DC/DC
ISL6236
INPUTS
DCBATOUT
SYSTEM DC/DC
TPS51124
INPUTS OUTPUTS
DCBATOUT
TPS51117
DCBATOUT
TPS51100
1D8V_S3
APL5308
3D3V_S0 2D5V_S0
CHARGER
BQ24750
DCBATOUT
CPU DC/DC
ISL6266A
INPUTS
DCBATOUT
NB DC/DC
ISL6263A
DCBATOUT
SC411
DCBATOUT
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
LT32P
LT32P
LT32P
E
OUTPUTS
5V_S5(5A)
3D3V_S5(5A)
1D05V_M(11A)
1D5V_S3(10A)
1D8V_S3
(2.5A)
DDR_VREF_S0
(1.5A)
DDR_VREF_S3
(300mA)
OUTPUTS INPUTS
CHG_PWR
18V 4.0A
UP+5V
5V 100mA
37
OUTPUTS
VCC_CORE_S0
0~1.3V 47A
OUTPUTS INPUTS
GFX_CORE
1D5V_S3
1 53 Wednesday, June 18, 2008
1 53 Wednesday, June 18, 2008
1 53 Wednesday, June 18, 2008
of
of
38
40
39
39
39
42
41
48
-1
-1
-1
A
B
C
D
E
ICH9M Functional Strap Definitions
4 4
3 3
Signal
HDA_SDOUT
HDA_SYNC
GNT2#/
GPIO53
GPIO20
GNT1#/
GPIO51
GNT3#/
GPIO55
GNT0#:
SPI_CS1#/
GPIO58
SPI_MOSI
GPIO49
SATALED#
SPKR
TP3
GPIO33/
HDA_DOCK
_EN#
Usage/When Sampled
XOR Chain Entrance/
PCIE Port Config1 bit1,
Rising Edge of PWROK
PCIE config1 bit0,
Rising Edge of PWROK.
PCIE config2 bit2,
Rising Edge of PWROK.
Reserved
ESI Strap (Server Only)
Rising Edge of PWROK
Top-Block
Swap Override.
Rising Edge of PWROK.
Boot BIOS Destination
Selection 0:1.
Rising Edge of PWROK.
Integrated TPM Enable,
Rising Edge of CLPWROK
DMI Termination Voltage,
Rising Edge of PWROK.
PCI Express Lane
Reversal. Rising Edge
of PWROK.
No Reboot.
Rising Edge of PWROK.
XOR Chain Entrance.
Rising Edge of PWROK.
Flash Descriptor
Security Override Strap
Rising Edge of PWROK
Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h). This signal has weak internal pull-down
This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
This signal has a weak internal pull-up.
Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal should not be pulled high.
ESI compatible mode is for server platforms only.
This signal should not be pulled low for desttop
and mobile.
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
Controllable via Boot BIOS Destination bit
(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
Sample low: the Integrated TPM will be disabled.
Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.
The signal is required to be low for desktop
applications and required to be high for
mobile applications.
Signal has weak internal pull-up. Sets bit 27
of MPC.LR(Device 28:Function 0:Offset D8)
If sampled high, the system is strapped to the
"No Reboot" mode(ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.
This signal should not be pull low unless using
XOR Chain testing.
Sampled low:the Flash Descriptor Security will be
overridden. If high,the security measures will be
in effect.This should only be enabled in manufacturing
environments using an external pull-up resister.
ICH9 EDS 642879 Rev.1.5
Comment
page 92
ICH9M Integrated Pull-up
and Pull-down Resistors
SIGNAL Resistor Type/Value
CL_CLK[1:0]
CL_DATA[1:0]
CL_RST0#
DPRSLPVR/GPIO16
ENERGY_DETECT
HDA_BIT_CLK
HDA_DOCK_EN#/GPIO33
HDA_RST#
HDA_SDIN[3:0]
HDA_SDOUT
HDA_SYNC
GLAN_DOCK#
GNT[3:0]#/GPIO[55,53,51]
GPIO[20]
GPIO[49]
LDA[3:0]#/FHW[3:0]#
LAN_RXD[2:0]
LDRQ[0]
LDRQ[1]/GPIO23
PME#
PWRBTN#
SATALED#
SPI_CS1#/GPIO58/CLGPIO6
SPI_MOSI
SPI_MISO
SPKR
TACH_[3:0]
TP[3]
USB[11:0][P,N]
The pull-up or pull-down active when configured for native
GLAN_DOCK# functionality and determined by LAN controller
ICH9 EDS 642879 Rev.1.5
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 15K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 15K
SMBus
KBC
SMBC_G792
BAT_SCL
SMB_CLK
2 2
PCI Routing
INT REQ
G:CARDBUS
AD22 TI7412
B:1394
F:Flash Media
G:SD Host
PCIE Routing
LANE2
MiniCard WLAN
LANE3 NewCard WLAN
page 17
0 0
GNT IDSEL
USB Table
USB
Pair
Device
Combo(ESATA/USB)
0
NC
1
2
USB2
USB4
3
4
USB3
BLUETOOTH
5
WEBCAM 6
FT
7
8
MINICARD
9 NEW1
ICH9M
SMBC_ICH
Thermal
MXM
BATTERY
LAN
CK505
DDR
1 1
A
B
C
Cantiga chipset and ICH9M I/O controller
Hub strapping configuration
Pin Name
CFG[2:0]
CFG[4:3]
CFG8
CFG[15:14]
CFG[18:17]
CFG5
CFG6
CFG7
CFG9
CFG10 PCIE Loopback enable
CFG[13:12]
CFG16
CFG19
SDVO_CTRLDATA
L_DDC_DATA
NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
Flash-decriptor section of the Firmware. This 'Soft-Strap' is
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.
CFG20
FSB Frequency
Select
Reserved
DMI x2 Select
iTPM Host
Interface
Intel Management
engine Crypto strap
PCIE Graphics Lane
FSB Dynamic ODT
DMI Lane Reversal
Digital Display Port
(SDVO/DP/iHDMI)
Concurrent with PCIe
Montevina Platform Design guide 22339 0.5
Strap Description
XOR/ALL
SDVO Present
Local Flat Panel
(LFP) Present
Configuration
000 = FSB1067
011 = FSB667
010 = FSB800
others = Reserved
0 = DMI x2
1 = DMI x4
0= The iTPM Host Interface is enabled(Note2)
1=The iTPM Host Interface is disalbed(default)
0 = Transport Layer Security (TLS) cipher
suite with no confidentiality
1 = TLS cipher suite with
confidentiality (default)
0 = Reverse Lanes,15->0,14->1 ect..
1= Normal operation(Default):Lane
Numbered in order
0 = Enable (Note 3)
1= Disabled (default)
00 = Reserve
10 = XOR mode Enabled
01 = ALLZ mode Enabled (Note 3)
11 = Disabled (default)
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled
0 = Normal operation(Default):
Lane Numbered in Order
1 = Reverse Lanes
DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
DMI x2 mode[MCH -> ICH]:(3->0,2->1)
0 = Only Digital Display Port
or PCIE is operational (Default)
1 =Digital display Port and PCIe are
operting simulataneously via the PEG port
0 =No SDVO Card Present (Default)
1 = SDVO Card Present
0 = LFP Disabled (Default)
1= LFP Card Present; PCIE disabled
(Default)
page 218
(Default)
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
D
DCBATOUT 17,43,44,46,47,48,49,50,51
3D3V_AUX_S5 7,28,38,43,51,53
5V_AUX_S5 40,43,51
3D3V_S5 13,25,26,27,29,30,35,37,38,39,41,42,43,48,49,50,51,53
5V_S5 17,29,31,42,43,46,47,48,49,50
1D5V_S3 10,12,13,15,16,29,39,48,50
0D75V_S3 15,16,48
1D8V_S3 17,49,50
3D3V_S0 3,7,10,11,13,15,16,17,18,23,24,25,26,27,28,29,30,31,32,33,34,35,38,39, 40,41,44,46,50,51,53
5V_S0 7,13,18,21,24,25,29,30,31,34,42,44,50,51,53
1D05V_S0 4,5,6,8,10,11,12,13,28,29,44,46
1D5V_S0 3,5,13,26,28,29,34,40,41,50,53
1D8V_S0 19,21,22,23,24,50
1D1V_S0 20,21,23,48
VGA_CORE_S0 21,23,24,47
Reference
Reference
Reference
DCBATOUT
3D3V_AUX_S5
5V_AUX_S5
3D3V_S5
5V_S5
1D5V_S3
0D75V_S3
1D8V_S3
3D3V_S0
5V_S0
1D05V_S0
1D5V_S0
1D8V_S0
1D1V_S0
VGA_CORE_S0
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
2 53 Wednesday, July 09, 2008
2 53 Wednesday, July 09, 2008
2 53 Wednesday, July 09, 2008
E
-1
-1
-1
of
of
of
A
B
C
D
E
4 4
3 3
2 2
3D3V_S0
1 2
C696
C696
SC1U10V3KX-3GP
SC1U10V3KX-3GP
L50
L50
1 2
BLM18AG601SN-3GP
BLM18AG601SN-3GP
3D3V_S0_CK505
1 2
1 2
DY
DY
1 2
R458
R458
10KR2J-3-GP
10KR2J-3-GP
PCI2_TME
R193
R193
10KR2J-3-GP
10KR2J-3-GP
1 2
1 2
C337
C343
C343
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
C337
C704
C704
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
-CLK_SATA_OE 27
-CLKREQ_MCH 10
PCLK_FWH 31
PCLK_PCM 32
PCLK_KBC 38
CLK_PCI_ICH 26
CLK_ICH14 27
1 2
1 2
C359
C359
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_S0_CK505
1 2
C347
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C701
C701
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1 2
C351
C351
C332 SC4D7P50V2CN-1GP C332 SC4D7P50V2CN-1GP
1 2
CLK48_ICH 27
-H_STP_PCI 27
-H_STP_CPU 27
ICH_SMBCLK 15,16,30
ICH_SMBDATA 15,16,30
CK_PWRGD 27
R195 33R2J-2-GP R195 33R2J-2-GP
R192 33R2J-2-GP R192 33R2J-2-GP
R460 33R2J-2-GP R460 33R2J-2-GP
R190 33R2J-2-GP R190 33R2J-2-GP
R189 33R2J-2-GP R189 33R2J-2-GP
R188 33R2J-2-GP R188 33R2J-2-GP
R197 15R2J-GP R197 15R2J-GP
1 2
1 2
1 2
C342 SC4D7P50V2CN-1GP C342 SC4D7P50V2CN-1GP1 2C340 SC4D7P50V2CN-1GP C340 SC4D7P50V2CN-1GP
C348 SC4D7P50V2CN-1GP C348 SC4D7P50V2CN-1GP
C339 SC4D7P50V2CN-1GP C339 SC4D7P50V2CN-1GP
1 2
X2
X2
X-14D31818M-30GP
X-14D31818M-30GP
1 2
SC33P50V2JN-3GP
SC33P50V2JN-3GP
C353
C353
CLK_XTAL_IN
CLK_XTAL_OUT
FSA
1 2
R186 33R2J-2-GP R186 33R2J-2-GP
1 2
1 2
1 2
1 2
1 2
1 2
1 2
MAIN SOURCE:71.09355.B03
SECOND SOURCE:71.00875.A03
PCI2_TME
27_SEL
ITP_EN
FSB
FSC
3
2
17
45
44
7
6
63
8
10
11
12
13
14
64
5
55
ICS9LPRS355BKLFT-GP
ICS9LPRS355BKLFT-GP
1 2
C352
C352
C347
3D3V_S0_CK505
U20
U20
X1
X2
USB_48MHZ/FSLA
PCI_STOP#
CPU_STOP#
SCLK
SDATA
CK_PWRGD/PD#
PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN
FSLB/TEST_MODE
REF0/FSLC/TEST_SEL
NC#55
1 2
C335
C335
C341
C341
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
4
9
16
VDDREF
GND48
15
18
19
23
27
33
46
VDD48
VDDPCI
GNDREF
GNDPCI
1
43
52
VDD96_IO
GNDSRC
GNDSRC
GNDSRC
GNDCPU
36
49
59
56
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDPLL3_IO
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2
GND
GND
26
65
CPUT0
CPUC0
CPUT1_F
CPUC1_F
SRCT7/CR#_F
SRCC7/CR#_E
SRCT6
SRCC6
SRCT10
SRCC10
SRCT11/CR#_H
SRCC11/CR#_G
SRCT9
SRCC9
SRCT4
SRCC4
SRCT3/CR#_C
SRCC3/CR#_D
SRCT2/SATAT
SRCC2/SATAC
SRCT0/DOTT_96
SRCC0/DOTC_96
61
60
58
57
54
53
51
50
48
47
41
42
40
39
37
38
34
35
31
32
28
29
24
25
20
21
62
VDDSRC
VDDCPU
VDDPLL3
GND
22
30
1 2
1 2
C350
C350
C338
C338
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN25 SRN0J-6-GP RN25 SRN0J-6-GP
1
2 3
RN24 SRN0J-6-GP RN24 SRN0J-6-GP
1
2 3
RN23 SRN0J-6-GP
RN23 SRN0J-6-GP
1
2 3
DIS
DIS
RN22 SRN0J-6-GP RN22 SRN0J-6-GP
1
2 3
RN19 SRN0J-6-GP RN19 SRN0J-6-GP
2 3
1
RN10 SRN0J-6-GP
RN10 SRN0J-6-GP
2 3
1
RN9 SRN0J-6-GP
RN9 SRN0J-6-GP
2 3
1
1 2
C707
C707
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
4
4
4
4
4
R198 10KR2J-3-GP R198 10KR2J-3-GP
R196 10KR2J-3-GP
R196 10KR2J-3-GP
TP?TP?
TP?TP?
TP352 TP352
TP?TP?
4
UMA
UMA
4
UMA
UMA
1 2
C358
C358
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
DY
DY
1 2
C334
C334
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
TP?TP?
TP?TP?
1 2
1D5V_S0
L22
L22
1 2
BLM18AG601SN-3GP
BLM18AG601SN-3GP
C331
C331
SC1U10V3KX-3GP
SC1U10V3KX-3GP
CLK_CPU_BCLK 4
-CLK_CPU_BCLK 4
CLK_MCH_BCLK 8
-CLK_MCH_BCLK 8
CLK_PCIE_GFX 20
-CLK_PCIE_GFX 20
CLK_PCIE_MINI_1 40,53
-CLK_PCIE_MINI_1 40,53
CLK_PCIE_MINI_2 40,53
-CLK_PCIE_MINI_2 40,53
CLK_PCIE_NEW 41,53
-CLK_PCIE_NEW 41,53
3D3V_S0
-NEWCARD_CLKREQ 41,53
-LAN_CLKREQ 35
3D3V_S0
CLK_PCIE_LAN 35
-CLK_PCIE_LAN 35
CLK_MCH_3GPLL 10
-CLK_MCH_3GPLL 10
CLK_PCIE_ICH 26
-CLK_PCIE_ICH 26
CLK_PCIE_SATA 28
-CLK_PCIE_SATA 28
DREFCLKSS_100M 10
-DREFCLKSS_100M 10
DREFCLK_96M 10
-DREFCLK_96M 10
1 2
-sb modify
Cypress Setting
FS_C FS_B FS_A CPU
3D3V_S0_CK505
-SB modify
Design Note:
1. All of Input pin didn't have inte rnal pull up resistor.
2. Clock Request (CR) function are e nable by registers.
1 1
3. CY28548 integrated serial resisto r of differential clock,
so put 0 ohm serial resistor in t he schematic.
1 2
R451
R451
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
R184
R184
10KR2J-3-GP
10KR2J-3-GP
A
ITP_EN
ITP_EN Output
0 SRC8
1 CPU_ITP
CPU_BSEL2 4,10
CPU_BSEL1 4,10
CPU_BSEL0 4,10
B
1 0 1 100M
0 0 1 133M
0 1 0 200M
0 1 1 166M
0 0 0 266M
1 2
R199 10KR2J-3-GP R199 10KR2J-3-GP
1 2
R202 0R0402-PAD R202 0R0402-PAD
1 2
R185 2K2R2J-2-GP R185 2K2R2J-2-GP
C
default
3D3V_S0_CK505
1 2
R456
R456
2K2R2J-2-GP
2K2R2J-2-GP
DY
DY
FSC
FSB
FSA
1 2
27_SEL
R453
R453
10KR2J-3-GP
10KR2J-3-GP
UMA =0
DIS =1
27_SEL PIN 20 PIN 21 PIN 24 PIN 25
0 DOT96T DOT96C SRCT1/ LCDT_100 SRCT1/LCDT_100
1 SRCT0 SRCC0 27M _NSS 27M_SS
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Clock Generator
Clock Generator
Clock Generator
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
E
-1
-1
-1
of
3 53 Wednesday, July 09, 2008
of
3 53 Wednesday, July 09, 2008
of
3 53 Wednesday, July 09, 2008
A
4 4
B
C
D
E
-A[35..3] 8
-ADSTB0 8
3 3
2 2
-HREQ[4..0] 8
-ADSTB1 8
-A20M 28
-FERR 28
-IGNNE 28
-STPCLK 28
INTR 28
NMI 28
-SMI 28
-HREQ0
-HREQ1
-HREQ2
-HREQ3
-HREQ4
U49A
U49A
-A3
J4
ADDR GROUP_0
A[3]#
-A4
L5
A[4]#
-A5
L4
A[5]#
-A6
K5
A[6]#
-A7
M3
A[7]#
-A8
N2
A[8]#
-A9
J1
A[9]#
-A10
N3
A[10]#
-A11
P5
A[11]#
-A12
P2
A[12]#
-A13
L2
A[13]#
-A14
P4
A[14]#
-A15
P1
A[15]#
-A16
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
-A17
Y2
A[17]#
-A18
U5
A[18]#
-A19
R3
A[19]#
-A20
W6
A[20]#
-A21
U4
A[21]#
-A22
Y5
A[22]#
-A23
U1
A[23]#
-A24
R4
A[24]#
-A25
T5
A[25]#
-A26
T3
A[26]#
-A27
W2
A[27]#
-A28
W5
A[28]#
-A29
Y4
A[29]#
-A30
U2
A[30]#
-A31
V4
A[31]#
-A32
W3
A[32]#
-A33
AA4
A[33]#
-A34
AB2
A[34]#
-A35
AA3
A[35]#
V1
ADSTB[1]#
A6
ICH
ICH
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD[01]
N5
RSVD[02]
T2
RSVD[03]
V3
RSVD[04]
B2
RSVD[05]
D2
RSVD[06]
D22
RSVD[07]
D3
RSVD[08]
F6
RSVD[09]
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
ADDR GROUP_0
ADDR GROUP_1
ADDR GROUP_1
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
H CLK
H CLK
RESERVED
RESERVED
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TRST#
DBR#
BCLK[0]
BCLK[1]
H1
E2
G5
H5
F21
E1
F1
-IERR
D20
B3
H4
C1
-RS0
F3
-RS1
F4
-RS2
G3
G2
G6
HIT#
E4
-ITP_BPM0
AD4
-ITP_BPM1
AD3
-ITP_BPM2
AD1
-ITP_BPM3
AC4
AC2
AC1
AC5
TCK
AA6
TDI
AB3
TDO
AB5
TMS
AB6
C20
D21
A24
B25
C7
A22
A21
-ADS 8
-BNR 8
-BPRI 8
-DEFER 8
-DRDY 8
-DBSY 8
-BR0 8
-INIT 28
-HLOCK 8
-CPURST 6,8
-HTRDY 8
-HIT 8
-HITM 8
-ITP_PRDY 6
-ITP_PREQ 6
ITP_TCK 6
ITP_TDO 6
ITP_TMS 6
-ITP_TRST 6
-ITP_DBR 6
THERMDA 7
THERMDC 7
0R0402-PAD
0R0402-PAD
CLK_CPU_BCLK 3
-CLK_CPU_BCLK 3
-ITP_BPM[3..0] 6
1 2
-RS[2..0] 8
R108
R108
1D05V_S0
1 2
1D05V_S0
1 2
1D05V_S0
1 2
R151
R151
56R2J-4-GP
56R2J-4-GP
R350
R350
54D9R2F-L1-GP
54D9R2F-L1-GP
R152
R152
68R2-GP
68R2-GP
ITP_TDI 6
-PROCHOT 44
-THERMTRIP 10,28
1D05V_S0
-D[63..0] 8
-DSTBN[3..0] 8
-DSTBP[3..0] 8
-DINV[3..0] 8
1 2
R360
R360
1KR2F-3-GP
1KR2F-3-GP
Trace should be less than 0.5 inch
1 2
R369
R369
2KR2F-3-GP
2KR2F-3-GP
DY
DY
R93 1KR2J-1-GP
R93 1KR2J-1-GP
1 2
R98 1KR2J-1-GP
R98 1KR2J-1-GP
1 2
DY
DY
U49B
U49B
-D0
E22
D[0]#
-D1
F24
D[1]#
-D2
E26
D[2]#
-D3
G22
D[3]#
-D4
F23
D[4]#
-D5
G25
D[5]#
-D6
E25
D[6]#
-D7
E23
D[7]#
-D8
K24
D[8]#
-D9
G24
D[9]#
-D10
J24
D[10]#
-D11
J23
D[11]#
-D12
H22
D[12]#
-D13
F26
D[13]#
-D14
K22
D[14]#
-D15
H23
-D16
-D17
-D18
-D19
-D20
-D21
-D22
-D23
-D24
-D25
-D26
-D27
-D28
-D29
-D30
-D31
-DINV1
J26
H26
H25
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
AD26
C23
D25
C24
AF26
AF1
A26
C3
B22
B23
C21
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]
-DSTBN0
-DSTBP0
-DINV0
-DSTBN1
-DSTBP1
GTLREF
CPU_BSEL0 3,10
CPU_BSEL1 3,10
CPU_BSEL2 3,10
MISC
MISC
DATA GRP 0
DATA GRP 0
DATA GRP 1
DATA GRP 1
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
DATA GRP 2 DATA GRP 3
DATA GRP 2 DATA GRP 3
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
-D32
Y22
-D33
AB24
-D34
V24
-D35
V26
-D36
V23
-D37
T22
-D38
U25
-D39
U23
-D40
Y25
-D41
W22
-D42
Y23
-D43
W24
-D44
W25
-D45
AA23
-D46
AA24
-D47
AB25
-DSTBN2
Y26
-DSTBP2
AA26
-DINV2
U22
-D48
AE24
-D49
AD24
-D50
AA21
-D51
AB22
-D52
AB21
-D53
AC26
-D54
AD20
-D55
AE22
-D56
AF23
-D57
AC25
-D58
AE21
-D59
AD21
-D60
AC22
-D61
AD23
-D62
AF22
-D63
AC23
-DSTBN3
AE25
-DSTBP3
AF24
-DINV3
AC20
COMP0
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
PSI#
R372 27D4R2F-L1-GP R372 27D4R2F-L1-GP
COMP1
R371 54D9R2F-L1-GP R371 54D9R2F-L1-GP
COMP2
R59 27D4R2F-L1-GP R59 27D4R2F-L1-GP
COMP3
R62 54D9R2F-L1-GP R62 54D9R2F-L1-GP
1 2
1 2
1 2
1 2
Place each resistor
within 0.5" of each pin
-DPRSTP 10,28,44
-DPSLP 28
-DPWR 8
CPU_PWRGD 28
-SLP 8
-PSI 44
1 1
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Penryn CPU(1/2)
Penryn CPU(1/2)
Penryn CPU(1/2)
Olympus
Olympus
Olympus
4 53 Wednesday, June 18, 2008
4 53 Wednesday, June 18, 2008
4 53 Wednesday, June 18, 2008
E
-1
-1
-1
of
of
of
5
4
3
2
1
D D
VCC_CORE
U49C
U49C
A7
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCCSENSE
VCC[065]
VCC[066]
VCC[067]
VSSSENSE
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA[01]
VCCA[02]
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AB9
C C
B B
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCC_CORE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
VID0
AD6
VID1
AF5
VID2
AE5
VID3
AF4
VID4
AE3
VID5
AF3
VID6
AE2
AF7
AE7
.
.
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VID[6..0] 44
C129
C169
C169
C157
C157
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PLACE 0.01uF NEAR VCCA PIN.B26
1 2
1 2
C614
C614
C617
C617
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
1 2
C129
1 2
C113
C113
VCC_CORE
1 2
C132
C132
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
R46
R46
100R2F-L1-GP-U
100R2F-L1-GP-U
1 2
R52
R52
100R2F-L1-GP-U
100R2F-L1-GP-U
1D05V_S0
1 2
1 2
C102
C102
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VCORE_VCCSENCE 44
VCORE_VSSSENCE 44
C559
C559
ST220U4VDM-23GP
ST220U4VDM-23GP
1D5V_S0
U49D
U49D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
VSS[081]P3VSS[162]
B1
VSS
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[163]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
.
.
A A
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Penryn CPU(2/2)
Penryn CPU(2/2)
Penryn CPU(2/2)
Olympus
Olympus
Olympus
5 53 Wednesday, July 09, 2008
5 53 Wednesday, July 09, 2008
5 53 Wednesday, July 09, 2008
1
-1
-1
-1
of
of
of
5
D D
C C
-ITP_BPM[3..0] 4
4
1D05V_S0
1 2
ITP_TDI 4
ITP_TMS 4
-ITP_TRST 4
ITP_TCK 4
ITP_TDO 4
ITP_TCK 4
-CPURST 4,8
-ITP_PREQ 4
-ITP_PRDY 4
-ITP_DBR 4
DY
DY
R356
R356
51R2F-2-GP
51R2F-2-GP
1 2
1 2
R343
R343
54D9R2F-L1-GP
54D9R2F-L1-GP
DY
DY
R348
R348
54D9R2F-L1-GP
54D9R2F-L1-GP
1 2
R354
R354
54D9R2F-L1-GP
54D9R2F-L1-GP
R357 1KR2F-3-GP
R357 1KR2F-3-GP
1 2
R353
R353
54D9R2F-L1-GP
54D9R2F-L1-GP
1 2
DY
DY
1D05V_S0
1 2
DY
DY
C517
C517
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3
1 TDI
2 TMS
TP73
TP73
TP72
TP72
TP67
TP67
TP66
TP66
TP71
TP71
TP237
TP237
TP238
TP238
TP69
TP69
TP70
TP70
TP68
TP68
TP64
TP64
TP65
TP65
TP63
TP63
TP99
TP99
TP74
TP74
3 TRST#
4 NC
5 TCK
6 NC
7 TDO
8 BCLK#
9 BCLK
10 GND
11 FBO
12 RESET#
13 BPM5#
14 GND
15 BPM4#
16 GND
17 BPM3#
18 GND
19 BPM2#
20 GND
21 BPM1#
22 GND
23 BPM0#
24 DBA#
25 DBR#
26 VTAP
27 VTT
28 VTT
-ITP_BPM3
-ITP_BPM2
-ITP_BPM1
-ITP_BPM0
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
2
1
B B
(*1) TCK SIGNAL IS BRANCHED AT CPU's PIN
(*2) CPURST# SIGNAL IS BRANCHED AT GMCH's PIN
A A
5
4
3
Ref Des For ITP-XDP
J1
NO_ASM-->ASM
C157
NO_ASM-->ASM
NO_ASM-->1K 5% ASM
R140
ASM (No Change)
R144
R136
ASM-->NO_ASM
R145
ASM (No Change)
R141
ASM-->54.9 1% ASM
R143
ASM-->54.9 1% ASM
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
ITP CONN
ITP CONN
ITP CONN
Olympus
Olympus
Olympus
1
-1
-1
-1
of
of
of
6 53 Wednesday, June 18, 2008
6 53 Wednesday, June 18, 2008
6 53 Wednesday, June 18, 2008
5V_S0
R74 100R2F-L1-GP-U R74 100R2F-L1-GP-U
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Setting T8 as
100 Degree
V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC
PM_PWROK 27,50
3D3V_S0
C114
C114
RN1
RN1
4
SRN10KJ-5-GP
SRN10KJ-5-GP
*Layout* 30 mil
1 2
1
2 3
G792_SCL
G792_SDA
1 2
R73
R73
43KR2F-GP
43KR2F-GP
1 2
R72
R72
100KR2F-L1-GP
100KR2F-L1-GP
5V_S0
1 2
HW_THRM_SHDN#
3D3V_S0
74L V C 1 G08GM-GP
74LVC1G08GM-GP
U11
U11
GND3Y
1 2
0R0402-PAD
0R0402-PAD
1
B
2
A
R54
R54
1 2
C87
C87
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
-THRM 27
G792_RST#
THERM#
V_DEGREE
-PM_SLP_S3_1 38,46,50
C81
C81
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
6
VCC
5
NC#5
4
220ms delay time after Power-on
5V_G792_S0
R71
R71
100KR2J-1-GP
100KR2J-1-GP
U10
U10
6
VCC
20
DVCC
7
DXP1
9
DXP2
11
DXP3
15
ALERT#
13
THERM#
3
THERM_SET
2
RESET#
G7921SF1U-GP
G7921SF1U-GP
DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree
1 2
5V_S0
1 2
R306
R306
10KR2J-3-GP
10KR2J-3-GP
FAN1_FG1 53
1 2
C466 SC1KP50V2KX-1GP C466 SC1KP50V2KX-1GP
1
FAN1
4
FG1
NC#19
DGND
DGND
SGND1
SGND2
SGND3
14
CLK
SDA
SCL
G792_SDA
16
G792_SCL
18
19
5
17
8
10
12
G792_CLK 27
G792_DXP2
G792_DXN2
Place near chip as close
as possible
1 2
C248
C248
0R2J-2-GP
0R2J-2-GP
2200P in DIS
2200P in DIS
1 2
Please close to the GPU
FAN1_VCC
FAN1_FG1
*Layout* 20 mil
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C465
C465
C229
C229
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
3D3V_AUX_S5
C464
C464
1 2
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
THERMDA 4
THERMDC 4
C107
C107
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
ATI_VGA_G792_P 21
ATI_VGA_G792_N 21
1
CN11
CN11
5
3
2
1
4
ETY-CON3-4-GP
ETY-CON3-4-GP
20.F0984.003
20.F0984.003
3
Q1
Q1
PMBS3904-1-GP
PMBS3904-1-GP
2
CPU
DX PORT2
G19
G19
GAP-CLOSE
GAP-CLOSE
1 2
VGA
3D3V_S0
1 2
R48
R48
10KR2J-3-GP
10KR2J-3-GP
D4
U48
U48
3 4
2
5
1
THER_SCL 17,38,51,53
6
2N7002DW-7F-GP
2N7002DW-7F-GP
3D3V_S0
THER_SDA 17,38,51,53
HW_THRM_SHDN# 50
S5_ENABLE 38
D4
1
2
CHP222PT-U
CHP222PT-U
3
1 2
R43
R43
100KR2J-1-GP
100KR2J-1-GP
1 2
C76
C76
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
PWR_S5_EN 50
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Thermal/Fan Controllor G792
Thermal/Fan Controllor G792
Thermal/Fan Controllor G792
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Olympus -1
Olympus -1
Olympus -1
of
of
of
7 53 Wednesday, July 09, 2008
7 53 Wednesday, July 09, 2008
7 53 Wednesday, July 09, 2008
A
B
C
D
E
1 OF 10
U52A
-D[63..0] 4
4 4
3 3
1D05V_S0
1 2
R437
R437
221R2F-2-GP
221R2F-2-GP
1 2
R428
R428
100R2F-L1-GP-U
100R2F-L1-GP-U
2 2
1D05V_S0
1 2
1 2
R427
R427
1KR2F-3-GP
1KR2F-3-GP
R159
R159
2KR1F-GP
2KR1F-GP
1 2
C678
C678
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
24D9R2F-L-GP
24D9R2F-L-GP
1 2
C680
C680
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R429
R429
H_SWING
-CPURST 4,6
-SLP 4
-D0
-D1
-D2
-D3
-D4
-D5
-D6
-D7
-D8
-D9
-D10
-D11
-D12
-D13
-D14
-D15
-D16
-D17
-D18
-D19
-D20
-D21
-D22
-D23
-D24
-D25
-D26
-D27
-D28
-D29
-D30
-D31
-D32
-D33
-D34
-D35
-D36
-D37
-D38
-D39
-D40
-D41
-D42
-D43
-D44
-D45
-D46
-D47
-D48
-D49
-D50
-D51
-D52
-D53
-D54
-D55
-D56
-D57
-D58
-D59
-D60
-D61
-D62
-D63
U52A
F2
H_D#_0
G8
H_D#_1
F8
H_D#_2
E6
H_D#_3
G2
H_D#_4
H6
H_D#_5
H2
H_D#_6
F6
H_D#_7
D4
H_D#_8
H3
H_D#_9
M9
H_D#_10
M11
H_D#_11
J1
H_D#_12
J2
H_D#_13
N12
H_D#_14
J6
H_D#_15
P2
H_D#_16
L2
H_D#_17
R2
H_D#_18
N9
H_D#_19
L6
H_D#_20
M5
H_D#_21
J3
H_D#_22
N2
H_D#_23
R1
H_D#_24
N5
H_D#_25
N6
H_D#_26
P13
H_D#_27
N8
H_D#_28
L7
H_D#_29
N10
H_D#_30
M3
H_D#_31
Y3
H_D#_32
AD14
H_D#_33
Y6
H_D#_34
Y10
H_D#_35
Y12
H_D#_36
Y14
H_D#_37
Y7
H_D#_38
W2
H_D#_39
AA8
H_D#_40
Y9
H_D#_41
AA13
H_D#_42
AA9
H_D#_43
AA11
H_D#_44
AD11
H_D#_45
AD10
H_D#_46
AD13
H_D#_47
AE12
H_D#_48
AE9
H_D#_49
AA2
H_D#_50
AD8
H_D#_51
AA3
H_D#_52
AD3
H_D#_53
AD7
H_D#_54
AE14
H_D#_55
AF3
H_D#_56
AC1
H_D#_57
AE3
H_D#_58
AC3
H_D#_59
AE11
H_D#_60
AE8
H_D#_61
AG2
H_D#_62
AD6
H_D#_63
C5
H_SWING
E3
H_RCOMP
C12
H_CPURST#
E11
H_CPUSLP#
A11
H_AVREF
B11
H_DVREF
CANTIGA-GM-GP -U-NF
CANTIGA-GM-GP -U-NF
HOST
HOST
1 OF 10
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20
H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9
J8
L3
Y13
Y1
L10
M7
AA5
AE6
L9
M8
AA6
AE5
B15
K13
F13
B13
B14
B6
F12
C8
-A3
-A4
-A5
-A6
-A7
-A8
-A9
-A10
-A11
-A12
-A13
-A14
-A15
-A16
-A17
-A18
-A19
-A20
-A21
-A22
-A23
-A24
-A25
-A26
-A27
-A28
-A29
-A30
-A31
-A32
-A33
-A34
-A35
-DINV0
-DINV1
-DINV2
-DINV3
-DSTBN0
-DSTBN1
-DSTBN2
-DSTBN3
-DSTBP0
-DSTBP1
-DSTBP2
-DSTBP3
-HREQ0
-HREQ1
-HREQ2
-HREQ3
-HREQ4
-RS0
-RS1
-RS2
-A[35..3] 4
CLK_MCH_BCLK 3
-CLK_MCH_BCLK 3
-DINV[3..0] 4
-DSTBN[3..0] 4
-DSTBP[3..0] 4
-HREQ[4..0] 4
-RS[2..0] 4
-ADS 4
-ADSTB0 4
-ADSTB1 4
-BNR 4
-BPRI 4
-BR0 4
-DEFER 4
-DBSY 4
-DPW R 4
-DRDY 4
-HIT 4
-HITM 4
-HLOCK 4
-HTRDY 4
BOM
BOM
1 1
Route H_XSWING & H_YSWING
10 mil wide / 20 mil spacing
A
Route H_XRCOMP &
H_YRCOMP 10 mil wide /
20 mil spacing
B
C
D
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
Cantiga(1/7):HOST I/F
Cantiga(1/7):HOST I/F
Cantiga(1/7):HOST I/F
A3
A3
A3
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
8 53 Wednesday, June 18, 2008
8 53 Wednesday, June 18, 2008
8 53 Wednesday, June 18, 2008
E
of
of
-1
-1
-1
A
4 4
U52D
M_A_DQ[63..0] 15
3 3
2 2
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
U52D
AJ38
SA_DQ_0
AJ41
SA_DQ_1
AN38
SA_DQ_2
AM38
SA_DQ_3
AJ36
SA_DQ_4
AJ40
SA_DQ_5
AM44
SA_DQ_6
AM42
SA_DQ_7
AN43
SA_DQ_8
AN44
SA_DQ_9
AU40
SA_DQ_10
AT38
SA_DQ_11
AN41
SA_DQ_12
AN39
SA_DQ_13
AU44
SA_DQ_14
AU42
SA_DQ_15
AV39
SA_DQ_16
AY44
SA_DQ_17
BA40
SA_DQ_18
BD43
SA_DQ_19
AV41
SA_DQ_20
AY43
SA_DQ_21
BB41
SA_DQ_22
BC40
SA_DQ_23
AY37
SA_DQ_24
BD38
SA_DQ_25
AV37
SA_DQ_26
AT36
SA_DQ_27
AY38
SA_DQ_28
BB38
SA_DQ_29
AV36
SA_DQ_30
AW36
SA_DQ_31
BD13
SA_DQ_32
AU11
SA_DQ_33
BC11
SA_DQ_34
BA12
SA_DQ_35
AU13
SA_DQ_36
AV13
SA_DQ_37
BD12
SA_DQ_38
BC12
SA_DQ_39
BB9
SA_DQ_40
BA9
SA_DQ_41
AU10
SA_DQ_42
AV9
SA_DQ_43
BA11
SA_DQ_44
BD9
SA_DQ_45
AY8
SA_DQ_46
BA6
SA_DQ_47
AV5
SA_DQ_48
AV7
SA_DQ_49
AT9
SA_DQ_50
AN8
SA_DQ_51
AU5
SA_DQ_52
AU6
SA_DQ_53
AT5
SA_DQ_54
AN10
SA_DQ_55
AM11
SA_DQ_56
AM5
SA_DQ_57
AJ9
SA_DQ_58
AJ8
SA_DQ_59
AN12
SA_DQ_60
AM13
SA_DQ_61
AJ11
SA_DQ_62
AJ12
SA_DQ_63
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
B
4 OF 10
4 OF 10
BD21
SA_BS_0
BG18
SA_BS_1
AT25
SA_BS_2
BB20
SA_RAS#
BD20
SA_CAS#
AY20
SA_WE#
M_A_DM0
AM37
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
AT41
AY41
AU39
BB12
AY6
AT7
AJ5
AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8
BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
-M_A_DQS0
-M_A_DQS1
-M_A_DQS2
-M_A_DQS3
-M_A_DQS4
-M_A_DQS5
-M_A_DQS6
-M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BS0 15
M_A_BS1 15
M_A_BS2 15
-M_A_RAS 15
-M_A_CAS 15
-M_A_WE 15
M_A_DM[7..0] 15
M_A_DQS[7..0] 15
-M_A_DQS[7..0] 15
M_A_A[14..0] 15
M_B_DQ[63..0] 16
C
U52E
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U52E
AK47
SB_DQ_0
AH46
SB_DQ_1
AP47
SB_DQ_2
AP46
SB_DQ_3
AJ46
SB_DQ_4
AJ48
SB_DQ_5
AM48
SB_DQ_6
AP48
SB_DQ_7
AU47
SB_DQ_8
AU46
SB_DQ_9
BA48
SB_DQ_10
AY48
SB_DQ_11
AT47
SB_DQ_12
AR47
SB_DQ_13
BA47
SB_DQ_14
BC47
SB_DQ_15
BC46
SB_DQ_16
BC44
SB_DQ_17
BG43
SB_DQ_18
BF43
SB_DQ_19
BE45
SB_DQ_20
BC41
SB_DQ_21
BF40
SB_DQ_22
BF41
SB_DQ_23
BG38
SB_DQ_24
BF38
SB_DQ_25
BH35
SB_DQ_26
BG35
SB_DQ_27
BH40
SB_DQ_28
BG39
SB_DQ_29
BG34
SB_DQ_30
BH34
SB_DQ_31
BH14
SB_DQ_32
BG12
SB_DQ_33
BH11
SB_DQ_34
BG8
SB_DQ_35
BH12
SB_DQ_36
BF11
SB_DQ_37
BF8
SB_DQ_38
BG7
SB_DQ_39
BC5
SB_DQ_40
BC6
SB_DQ_41
AY3
SB_DQ_42
AY1
SB_DQ_43
BF6
SB_DQ_44
BF5
SB_DQ_45
BA1
SB_DQ_46
BD3
SB_DQ_47
AV2
SB_DQ_48
AU3
SB_DQ_49
AR3
SB_DQ_50
AN2
SB_DQ_51
AY2
SB_DQ_52
AV1
SB_DQ_53
AP3
SB_DQ_54
AR1
SB_DQ_55
AL1
SB_DQ_56
AL2
SB_DQ_57
AJ1
SB_DQ_58
AH1
SB_DQ_59
AM2
SB_DQ_60
AM3
SB_DQ_61
AH3
SB_DQ_62
AJ3
SB_DQ_63
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
D
5 OF 10
5 OF 10
SB_BS_0
SB_BS_1
SB_BS_2
SB_RAS#
SB_CAS#
SB_WE#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
BC16
BB17
BB33
AU17
BG16
BF14
AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2
AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5
AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33
M_B_BS0
M_B_BS1
M_B_BS2
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
-M_B_DQS0
-M_B_DQS1
-M_B_DQS2
-M_B_DQS3
-M_B_DQS4
-M_B_DQS5
-M_B_DQS6
-M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_BS0 16
M_B_BS1 16
M_B_BS2 16
-M_B_RAS 16
-M_B_CAS 16
-M_B_WE 16
M_B_DM[7..0] 16
M_B_A[14..0] 16
M_B_DQS[7..0] 16
-M_B_DQS[7..0] 16
E
1 1
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Cantiga(2/7):DDR3
Cantiga(2/7):DDR3
Cantiga(2/7):DDR3
C
C
C
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
9 53 Wednesday, June 18, 2008
9 53 Wednesday, June 18, 2008
9 53 Wednesday, June 18, 2008
E
-1
-1
-1
of
of
of
A
B
C
D
E
ME DEBUG PORT PIN OUT TABLE
RESERVED#AL34 ME_JTAG_TCK
RESERVED#AK34 ME_JTAG_TDI
RESERVED#AN35 ME_JTAG_TDO
RESERVED#AM35 ME_JTAG_TMS
2 OF 10
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_PWROK
SM_DRAMRST#
DPLL_REF_CLK
DDR CLK/ CONTROL/COMPENSATION
DDR CLK/ CONTROL/COMPENSATION
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
CLK
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI
DMI
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
GFX_VR_EN
GRAPHICS VID
GRAPHICS VID
CL_PWROK
ME HDA
ME HDA
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
ICH_SYNC#
MISC
MISC
HDA_SYNC
2 OF 10
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
SM_VREF
SM_REXT
PEG_CLK
PEG_CLK#
CL_CLK
CL_DATA
CL_RST#
CL_VREF
CLKREQ#
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
AP24
AT21
AV24
AU20
AR24
AR21
AU24
AV20
BC28
AY28
AY36
BB36
BA17
AY16
AV16
AR13
BD17
AY17
BF15
AY13
BG22
BH21
BF28
BH28
AV42
AR36
BF17
BC36
B38
A38
E41
F41
F43
E43
AE41
AE37
AE47
AH39
AE40
AE38
AE48
AH40
AE35
AE43
AE46
AH42
AD35
AE44
AF46
AH43
B33
B32
G33
F33
E33
C34
AH37
AH36
AN36
AJ35
AH34
N28
M28
G36
E36
K36
H36
B12
B28
B30
B29
C29
A28
M_RCOMPP
M_RCOMPN
SMPWRG
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0 DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
GFXVID0
GFXVID1
GFXVID2
GFXVID3
GFXVID4
CL_CLK_MCH 27
CL_DATA_MCH 27
CL_PWROK 27,50
-CL_RST_MCH 27
R166 10KR1J-GP R166 10KR1J-GP
R167 475R1F-GP R167 475R1F-GP
ACZ_BITCLK_MCH
-ACZ_RST_MCH
ACZ_SDIN_MCH
ACZ_SDOUT_MCH
ACZ_SYNC_MCH
C
DDRCLK0_533M 15
DDRCLK1_533M 15
DDRCLK2_533M 16
DDRCLK3_533M 16
-DDRCLK0_533M 15
-DDRCLK1_533M 15
-DDRCLK2_533M 16
-DDRCLK3_533M 16
M_CKE0 15
M_CKE1 15
M_CKE2 16
M_CKE3 16
-M_CS0 15
-M_CS1 15
-M_CS2 16
-M_CS3 16
M_ODT0 15
M_ODT1 15
M_ODT2 16
M_ODT3 16
R363 80D6R1F-GP R363 80D6R1F-GP
1 2
R364 80D6R1F-GP R364 80D6R1F-GP
1 2
-DRAMRST 15,16
DREFCLK_96M 3
-DREFCLK_96M 3
DREFCLKSS_100M 3
-DREFCLKSS_100M 3
CLK_MCH_3GPLL 3
-CLK_MCH_3GPLL 3
DMI_TXN0 26
DMI_TXN1 26
DMI_TXN2 26
DMI_TXN3 26
DMI_TXP0 26
DMI_TXP1 26
DMI_TXP2 26
DMI_TXP3 26
DMI_RXN0 26
DMI_RXN1 26
DMI_RXN2 26
DMI_RXN3 26
DMI_RXP0 26
DMI_RXP1 26
DMI_RXP2 26
DMI_RXP3 26
TP129 TPAD30 TP129 TPAD30
TP128 TPAD30 TP128 TPAD30
TP119 TPAD30 TP119 TPAD30
TP124 TPAD30 TP124 TPAD30
TP125 TPAD30 TP125 TPAD30
TP126 TPAD30 TP126 TPAD30
1 2
1 2
R436 33R1J-GP R436 33R1J-GP
1 2
R432 33R1J-GP R432 33R1J-GP
1 2
R434 33R1J-GP R434 33R1J-GP
1 2
R433 33R1J-GP R433 33R1J-GP
1 2
R435 33R1J-GP R435 33R1J-GP
1 2
1D5V_S3
499R2F-2-GP
499R2F-2-GP
R365
R365
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0
-CLKREQ_MCH 3
-MCH_ICH_SYNC 27
SMPWRG
8K2R2J-3-GP
8K2R2J-3-GP
R88 1KR1F-GP R88 1KR1F-GP
1 2
C177
C177
R426 56R1J-GP R426 56R1J-GP
ACZ_BITCLK 28
-ACZ_RST 28
ACZ_SDIN 28
ACZ_SDOUT 28
ACZ_SYNC 28
R63
R63
1 2
1 2
R89
R89
499R2F-2-GP
499R2F-2-GP
1 2
1D5V_S3
1 2
R366
R366
1KR1F-GP
1KR1F-GP
1 2
1 2
1 2
C533
C533
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
1 2
C534
C534
1 2
C529
C529
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
C530
C530
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
0R2J-2-GP
0R2J-2-GP
1D05V_S0
1D05V_S0
D
1 2
1 2
C112
C112
R64
R64
-sc modify
R367
R367
3K01R1F-GP
3K01R1F-GP
R368
R368
1KR1F-GP
1KR1F-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
C116
C116
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_PROK 48,49
R64 can del in SD
R68
R68
1 2
0R0603-PAD
0R0603-PAD
DDR3_VREF_S3
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Cantiga(3/7):DMI/PM/CFG/GF
Cantiga(3/7):DMI/PM/CFG/GF
Cantiga(3/7):DMI/PM/CFG/GF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
10 53 Friday, July 04, 2008
10 53 Friday, July 04, 2008
10 53 Friday, July 04, 2008
E
of
of
of
-1
-1
-1
U52B
4 4
TP82 TPAD30 TP82 TPAD30
TP83 TPAD30 TP83 TPAD30
TP79 TPAD30 TP79 TPAD30
TP80 TPAD30 TP80 TPAD30
CFG5 : DMIx2
CFG6 : iTPM
CFG7 : ME Crypto
CFG9: PCIE STD& REV
CFG16 : FSB Dynamic ODT
3 3
2 2
CFG19 : DMI Lane reversal
CFG20 : DP concurrent
CFG[17:3]:internal pullup
CFG[20:18]:internal pulldown
1 2
DY
DY
1 2
DY
DY
-PM_SYNC 27
-DPRSTP 4,28,44
1 2
R117
R117
DY
DY
1 2
DY
DY
1 2
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
R109 1KR1J-GP R109 1KR1J-GP
R115 1KR1J-GP R115 1KR1J-GP
R119 1KR1J-GP R119 1KR1J-GP
1 2
R116
R116
10KR1J-GP
10KR1J-GP
3D3V_S0
-MEM_TS0 15
-MEM_TS1 16
CPU_BSEL0 3,4
CPU_BSEL1 3,4
CPU_BSEL2 3,4
R154 2K2R1J-GP
R154 2K2R1J-GP
R127 2K2R1J-GP
R127 2K2R1J-GP
R132 2K2R1J-GP
R132 2K2R1J-GP
R155 2K2R1J-GP
R155 2K2R1J-GP
R153 2K2R1J-GP
R153 2K2R1J-GP
R121 2K2R1J-GP
R121 2K2R1J-GP
R110 2K2R1J-GP
R110 2K2R1J-GP
R139 2K2R1J-GP
R139 2K2R1J-GP
R118 4K02R1F-GP
R118 4K02R1F-GP
R114 4K02R1F-GP
R114 4K02R1F-GP
3D3V_S0
10KR1J-GP
10KR1J-GP
1 2
1 2
1 2
TP100 TPAD30 TP100 TPAD30
TP108 TPAD30 TP108 TPAD30
TP123 TPAD30 TP123 TPAD30
TP109 TPAD30 TP109 TPAD30
TP96 TPAD30 TP96 TPAD30
TP114 TPAD30 TP114 TPAD30
TP120 TPAD30 TP120 TPAD30
TP107 TPAD30 TP107 TPAD30
0201 SIZE
DY
DY
R77 0R1J-GP
R77 0R1J-GP
-VGAET_PWRG 27,44
VR_PWRG 44
-PLT_RST 20,26,31,40,41,53
-THERMTRIP 4,28
1 1
PM_DPRSLPVR 27,44
A
1 2
1 2
R79 100R2F-L1-GP-UR79 100R2F-L1-GP-U
B
U52B
M36
RESERVED#M36
N36
RESERVED#N36
R33
RESERVED#R33
T33
RESERVED#T33
AH9
RESERVED#AH9
AH10
RESERVED#AH10
AH12
RESERVED#AH12
AH13
RESERVED#AH13
K12
RESERVED#K12
AL34
RESERVED#AL34
AK34
RESERVED#AK34
AN35
RESERVED#AN35
AM35
RESERVED#AM35
T24
RESERVED#T24
B31
RESERVED#B31
B2
RESERVED#B2
M1
RESERVED#M1
AY21
RESERVED#AY21
BG23
RESERVED#BG23
BF23
RESERVED#BF23
BH18
RESERVED#BH18
BF18
RESERVED#BF18
T25
CFG_0
R25
CFG_1
P25
CFG_2
P20
CFG_3
P24
CFG_4
C25
CFG_5
N24
CFG_6
M24
CFG_7
E21
CFG_8
C23
CFG_9
C24
CFG_10
N21
CFG_11
P21
CFG_12
T21
CFG_13
R20
CFG_14
M20
CFG_15
L21
CFG_16
H21
CFG_17
P29
CFG_18
R28
CFG_19
T28
CFG_20
R29
PM_SYNC#
B7
PM_DPRSTP#
N33
PM_EXT_TS#_0
P32
PM_EXT_TS#_1
AT40
PWROK
AT11
RSTIN#
T20
THERMTRIP#
R32
DPRSLPVR
BG48
NC#BG48
BF48
NC#BF48
BD48
NC#BD48
BC48
NC#BC48
BH47
NC#BH47
BG47
NC#BG47
BE47
NC#BE47
BH46
NC#BH46
BF46
NC#BF46
BG45
NC#BG45
BH44
NC#BH44
BH43
NC#BH43
BH6
NC#BH6
BH5
NC#BH5
BG4
NC#BG4
BH3
NC#BH3
BF3
NC#BF3
BH2
NC#BH2
BG2
NC#BG2
BE2
NC#BE2
BG1
NC#BG1
BF1
NC#BF1
BD1
NC#BD1
BC1
NC#BC1
F1
NC#F1
A47
NC#A47
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
RSVD
RSVD
CFG
CFG
PM
PM
NC
NC
5
3D3V_S0
1 2
1 2
R143
R143
R138
R138
2K2R1J-GP
2K2R1J-GP
2K2R1J-GP
D D
UMA_BKLT 17
UMA_BLON_IN 38
GM_EDID_CLK 17
GM_EDID_DATA 17
PANEL_POWER_ON 17
C C
2K2R1J-GP
R129 100KR1J-GP R129 100KR1J-GP
GMCH_TXAOUT0- 17
GMCH_TXAOUT1- 17
GMCH_TXAOUT2- 17
GMCH_TXAOUT0+ 17
GMCH_TXAOUT1+ 17
GMCH_TXAOUT2+ 17
ZO=37.5 OHM ZO=50 OHM
BLUE_GMCH 18
GREEN_GMCH 18
RED_GMCH 18
1 2
1 2
C285
C285
C281
C281
SC8P50V2DN-1GP
SC8P50V2DN-1GP
SC8P50V2DN-1GP
SC8P50V2DN-1GP
UMA
UMA
UMA
B B
UMA
DIS R254,R246,R239,248,RN45
CHANGE TO 0 OHM
UMA
UMA
1 2
150R1F-GP
150R1F-GP
UMA
UMA
1 2
R150
R150
R146
R146
150R1F-GP
150R1F-GP
UMA
UMA
1 2
C275
C275
SC8P50V2DN-1GP
SC8P50V2DN-1GP
1 2
R430 2K4R2F-GP R430 2K4R2F-GP
R1061
R1061
R1060
R1060
1 2
150R1F-GP
150R1F-GP
UMA
UMA
UMA
UMA
1 2
R144
R144
150R1F-GP
150R1F-GP
UMA
UMA
4
1 2
DY
DY
R126
R126
10KR1J-GP
10KR1J-GP
1 2
GMCH_TXACLK- 17
GMCH_TXACLK+ 17
1 2
150R1F-GP
150R1F-GP
UMA
UMA
R149
R149
100KR1J-GP
100KR1J-GP
1 2
1 2
DY
DY
R131
R131
10KR1J-GP
10KR1J-GP
LIBG PEG_RXN5
R1062
R1062
1 2
150R1F-GP
150R1F-GP
CRT_IREF
1 2
L32
G32
M32
M33
K33
J33
M29
C44
B43
E37
E38
C41
C40
B37
A37
H47
E46
G40
A40
H48
D45
F40
B40
A41
H38
G37
J37
B42
G38
F37
K37
F25
H25
K25
H24
C31
E32
E28
G28
J28
G29
H32
J32
J29
E29
L29
R156
R156
1K02R2D-GP
1K02R2D-GP
U52C
U52C
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
TVA_DAC
TVB_DAC
TVC_DAC
TV_RTN
TV_DCONSEL_0
TV_DCONSEL_1
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
LVDS
LVDS
TV VGA
TV VGA
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
3 OF 10
3 OF 10
PEG_COMPI
PEG_COMPO
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
3
1D05V_S0
1 2
R111
R111
49D9R1F-GP
49D9R1F-GP
PEG_COMP
T37
T36
H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46
J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46
GTXN0
GTXN1
GTXN2
GTXN3
GTXN4
GTXN5
GTXN6
GTXN7
GTXN8
GTXN9
GTXN10
GTXN11
GTXN12
GTXN13
GTXN14
GTXN15
GTXP0
GTXP1
GTXP2
GTXP3
GTXP4
GTXP5
GTXP6
GTXP7
GTXP8
GTXP9
GTXP10
GTXP11
GTXP12
GTXP13
GTXP14
GTXP15
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
1 2
1 2
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
DIS
DIS
1 2
DIS
DIS
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C661SCD1U6D3V1KX-GP
C661SCD1U6D3V1KX-GP
C638SCD1U6D3V1KX-GP
C638SCD1U6D3V1KX-GP
C639SCD1U6D3V1KX-GP
C639SCD1U6D3V1KX-GP
C633SCD1U6D3V1KX-GP
C633SCD1U6D3V1KX-GP
C628SCD1U6D3V1KX-GP
C628SCD1U6D3V1KX-GP
C201SCD1U6D3V1KX-GP
C201SCD1U6D3V1KX-GP
C631SCD1U6D3V1KX-GP
C631SCD1U6D3V1KX-GP
C610SCD1U6D3V1KX-GP
C610SCD1U6D3V1KX-GP
C603SCD1U6D3V1KX-GP
C603SCD1U6D3V1KX-GP
C178SCD1U6D3V1KX-GP
C178SCD1U6D3V1KX-GP
C598SCD1U6D3V1KX-GP
C598SCD1U6D3V1KX-GP
C591SCD1U6D3V1KX-GP
C591SCD1U6D3V1KX-GP
C584SCD1U6D3V1KX-GP
C584SCD1U6D3V1KX-GP
C154SCD1U6D3V1KX-GP
C154SCD1U6D3V1KX-GP
C579SCD1U6D3V1KX-GP
C579SCD1U6D3V1KX-GP
C569SCD1U6D3V1KX-GP
C569SCD1U6D3V1KX-GP
C666SCD1U6D3V1KX-GP C666SCD1U 6D3V1KX-GP
C640SCD1U6D3V1KX-GP C640SCD1U 6D3V1KX-GP
C642SCD1U6D3V1KX-GP C642SCD1U 6D3V1KX-GP
C634SCD1U6D3V1KX-GP C634SCD1U 6D3V1KX-GP
C630SCD1U6D3V1KX-GP C630SCD1U 6D3V1KX-GP
C211SCD1U6D3V1KX-GP C211SCD1U 6D3V1KX-GP
C632SCD1U6D3V1KX-GP C632SCD1U 6D3V1KX-GP
C611SCD1U6D3V1KX-GP C611SCD1U 6D3V1KX-GP
C607SCD1U6D3V1KX-GP C607SCD1U 6D3V1KX-GP
C184SCD1U6D3V1KX-GP C184SCD1U 6D3V1KX-GP
C599SCD1U6D3V1KX-GP C599SCD1U 6D3V1KX-GP
C593SCD1U6D3V1KX-GP C593SCD1U 6D3V1KX-GP
C588SCD1U6D3V1KX-GP C588SCD1U 6D3V1KX-GP
C162SCD1U6D3V1KX-GP C162SCD1U 6D3V1KX-GP
C581SCD1U6D3V1KX-GP C581SCD1U 6D3V1KX-GP
C573SCD1U6D3V1KX-GP C573SCD1U 6D3V1KX-GP
PEG_RXN[15..0] 20
PEG_RXP[15..0] 20
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
2
PEG_TXN[15..0] 20
DIS
PEG_TXP[15..0] 20
DIS
1
PEG Interface
Port B --> System ( Not Use )
DDCCLK_ID3 18
DDCDATA_ID1 18
HSYNC_GMCH 18
VSYNC_GMCH 18
A A
5
R140 30D1R1F-GP R140 30D1R1F-GP
1 2
R134 30D1R1F-GP R134 30D1R1F-GP
1 2
HSYNC_R
VSYNC_R
4
Port C --> Slice
Port D --> ( Not Use )
3
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CANTIGA(5/7)-VGA/LVDS
CANTIGA(5/7)-VGA/LVDS
CANTIGA(5/7)-VGA/LVDS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
1
-1
-1
-1
of
of
of
53 Wednesday, July 09, 2008
53 Wednesday, July 09, 2008
11
11
11
53 Wednesday, July 09, 2008
A
4 4
U52G
U52G
AP33
AN33
BH32
BG32
BF32
BD32
BC32
1 2
C142
C142
0R2J-2-GP
0R2J-2-GP
1D05V_S0
R87
R87
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
BA36
BB24
BD16
BB21
AW16
AW13
AT13
Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14
1 2
AJ14
AH14
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
1 2
1 2
C137
C137
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C118
C118
SC1U10V2KX-1GP
SC1U10V2KX-1GP
3 3
2 2
1 2
C536
C536
C115
C115
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C125
C125
C105
C105
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
1 2
1
1
C93
C93
C131
C131
2
2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
TC2
TC2
ST220U2D5VBM-4GP
ST220U2D5VBM-4GP
SC22U6D3V5MX-2GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
1 2
C130
C130
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG_SENSE
VSS_AXG_SENSE
B
1D05V_S0 1D5V_S3
7 OF 10
7 OF 10
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16
AV44
BA37
AM40
AV21
AY5
AM10
BB13
1 2
1
1
C159
C159
C200
C200
2
2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
C215
C215
C191
C191
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
0603 0402
1 2
1 2
C149
C149
C111
C111
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
POWER
POWER
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC SM VCC GFX
VCC SM VCC GFX
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC SM LF
VCC SM LF
C
1D05V_S0
1 2
C220
C220
SCD22U10V2KX-1GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
1 2
C226
C226
C221
C221
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
C204
C204
C164
C164
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD22U10V2KX-1GP
10U 0805
C214
C179
C179
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
C127
C127
2
2
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
C214
C202
C202
C192
C192
1 2
1 2
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C150
C150
1 2
1 2
C148
C148
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
1 2
C110
C110
C103
C103
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
D
U52F
U52F
AG34
VCC
AC34
VCC
AB34
VCC
1 2
1 2
C183
C183
C89
C89
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
AA34
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C166
C166
VCC
Y34
VCC
V34
VCC
U34
VCC
AM33
VCC
AK33
VCC
AJ33
VCC
AG33
VCC
AF33
VCC
AE33
VCC
AC33
VCC
AA33
VCC
Y33
VCC
W33
VCC
V33
VCC
U33
VCC
AH28
VCC
AF28
VCC
AC28
VCC
AA28
VCC
AJ26
VCC
AG26
VCC
AE26
VCC
AC26
VCC
AH25
VCC
AG25
VCC
AF25
VCC
AG24
VCC
AJ23
VCC
AH23
VCC
AF23
VCC
T32
VCC
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
VCC CORE
VCC CORE
POWER
POWER
VCC NCTF
VCC NCTF
6 OF 10
6 OF 10
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
E
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
1D05V_S0
1 1
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Cantiga(5/7):VCC
Cantiga(5/7):VCC
Cantiga(5/7):VCC
Olympus
Olympus
Olympus
E
-1
-1
-1
of
of
of
12 53 Wednesday, July 09, 2008
12 53 Wednesday, July 09, 2008
12 53 Wednesday, July 09, 2008
A
B
C
D
E
U14
U14
VIN
GND
EN
NC#4
VOUT
G9091-180T11U-GP
G9091-180T11U-GP
UMA
UMA
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
1 2
C682
C682
1 2
C625
C625
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
VCC_DMIPEG_MCH
1
1
C662
C662
2
2
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
C619
C619
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
1D8V_S3_GM
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1
1
2
2
D
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C620
C620
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
-sc add for EMI
L48
L48
1 2
IND-D1UH-17-GP
IND-D1UH-17-GP
C307
C307
VCC_SM_CK_MCH
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C600
C600
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C679
C679
UMA
UMA
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
C540
C540
C608
C608
1 2
C670
C670
1D05V_S0
1 2
C233
C233
5V_S0
C328
C328
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C304
C304
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
ST220U2D5VBM-4GP
ST220U2D5VBM-4GP
1
1
2
2
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
1 2
1D05V_S0
1 2
R361
R361
1R2F-GP
1R2F-GP
C524
C524
1 2
TC18
TC18
1 2
C621
C621
ST220U6D3VDM-17GP
ST220U6D3VDM-17GP
3
L31
L31
1 2
COIL-1UH-31-GP
COIL-1UH-31-GP
1 2
IND-91NH-1-GP
IND-91NH-1-GP
TC19
TC19
U15
U15
2
VOUT
VIN
1
GND
APL5308-33AC-TRL-GP-U
APL5308-33AC-TRL-GP-U
UMA
UMA
1D5V_S3
3D3V_S0
1 2
10R2J-2-GP
10R2J-2-GP
L35
L35
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
1 2
C323
C323
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
UMA
UMA
R431
R431
Cantiga(6/7):VCC
Cantiga(6/7):VCC
Cantiga(6/7):VCC
K A
RB520S30-GP
RB520S30-GP
1D05V_S0
D16
D16
3D3V_S0 3D3V_DAC
R173
R173
1 2
0R3-0-U-GP
0R3-0-U-GP
DY
DY
1D8V_S3_GM
1D5V_S0
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
13 53 Wednesday, July 09, 2008
13 53 Wednesday, July 09, 2008
13 53 Wednesday, July 09, 2008
E
-1
-1
-1
of
of
of
3D3V_S5
1D05V_S0
L47 IN D-10UH-106-GP L47 IN D-10UH-106-GP
4 4
1D05V_S0
1 2
BLM15EG121SN1D-GP
BLM15EG121SN1D-GP
1 2
C590
C590
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3 3
2 2
1 1
1 2
L20 IN D-10UH-106-GP L20 IN D-10UH-106-GP
1 2
L37
L37
A
1 2
1 2
C684
C684
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
R394
R394
D51R3F-2-GP
1 2
C609
C609
1D05V_S0
1 2
L21
L21
BLM18PG181SN-3GP
BLM18PG181SN-3GP
D51R3F-2-GP
1 2
C589
C589
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
1 2
C604
C604
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U10V5KX-1GP
SC4D7U10V5KX-1GP
1D5V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C673
C673
1 2
1 2
ST100U6D3VBM-5GP
ST100U6D3VBM-5GP
1 2
C654
C654
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C601
C601
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C525
C525
TC5
TC5
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1D05V_S0
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
3D3V_DAC
U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1
B22
B21
A21
BF21
BH20
BG20
BF20
K47
C35
B35
A35
V48
U48
V47
U47
U46
AH48
AF48
AH47
AG47
A8
L1
AB2
1
2
3
4
5
VCC_AXF_MCH
1
1
C613
C613
2
2
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
1 2
C688
C688
1 2
1 2
C641
C641
L49
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C74
C74
L49
BLM18PG181SN-3GP
BLM18PG181SN-3GP
1 2
C685
C685
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
1 2
C538
C538
C145
C145
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
1
1
C153
C153
2
2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1 2
C322
C322
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
B
1 2
1 2
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
C136
C136
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C144
C144
C320
C320
1 2
SCD022U16V2KX-3GP
SCD022U16V2KX-3GP
1 2
VCCA_DAC
C674
C674
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
1 2
C319
C319
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
VCCD_QDAC_MCH
C321
C321
L46
L46
BLM18PG181SN-3GP
BLM18PG181SN-3GP
1 2
1 2
C306
C306
C681
C681
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1D05V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D05V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCCA_CRT
1 2
C606
C606
1 2
C315
C315
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1D8V_S3_GM
C258
C258
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C605
C605
VCCA_DAC
1D05V_S0
1D8V_S3_GM
R125
R125
DY
DY
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1D5V_S0
VCCA_DAC
1 2
1 2
1 2
0R2J-2-GP
0R2J-2-GP
C303
C303
B27
A26
A25
B25
F47
L48
AD1
AE1
J48
J47
AD48
C602
C602
AA48
AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16
AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23
B24
A24
A32
M25
L28
AF1
AA47
M38
L37
12
C270
C270
SC1U10V2KX-1GP
SC1U10V2KX-1GP
-PM_SLP_S3 27,48,50
U52H
U52H
VCCA_CRT_DAC
VCCA_CRT_DAC
VCCA_DAC_BG
VSSA_DAC_BG
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_LVDS
VSSA_LVDS
VCCA_PEG_BG
VCCA_PEG_PLL
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_TV_DAC
VCCA_TV_DAC
VCC_HDA
VCCD_TVDAC
VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL
VCCD_LVDS
VCCD_LVDS
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
C
R168
R168
1 2
0R0402-PAD
0R0402-PAD
CRT PLL A PEG A SM
CRT PLL A PEG A SM
A LVDS
A LVDS
POWER
POWER
A CK
A CK
TV
TV
HDA
HDA
D TV/CRT
D TV/CRT
LVDS
LVDS
C324
C324
AXF
AXF
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
SM CK
SM CK
VCC_TX_LVDS
HV
HV
PEG
PEG
DMI
DMI
VTT
VTT
VCC_AXF
VCC_AXF
VCC_AXF
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI
VTTLF
VTTLF
SC1U10V2KX-1GP
SC1U10V2KX-1GP
8 OF 10
8 OF 10
VCC_HV
VCC_HV
VCC_HV
VTTLF
VTTLF
VTTLF
1 2
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
A
U52I
U52I
AU48
VSS
AR48
VSS
AL48
VSS
BB47
VSS
AW47
VSS
AN47
VSS
AJ47
VSS
AF47
VSS
AD47
VSS
4 4
3 3
2 2
1 1
A
AB47
VSS
Y47
VSS
T47
VSS
N47
VSS
L47
VSS
G47
VSS
BD46
VSS
BA46
VSS
AY46
VSS
AV46
VSS
AR46
VSS
AM46
VSS
V46
VSS
R46
VSS
P46
VSS
H46
VSS
F46
VSS
BF44
VSS
AH44
VSS
AD44
VSS
AA44
VSS
Y44
VSS
U44
VSS
T44
VSS
M44
VSS
F44
VSS
BC43
VSS
AV43
VSS
AU43
VSS
AM43
VSS
J43
VSS
C43
VSS
BG42
VSS
AY42
VSS
AT42
VSS
AN42
VSS
AJ42
VSS
AE42
VSS
N42
VSS
L42
VSS
BD41
VSS
AU41
VSS
AM41
VSS
AH41
VSS
AD41
VSS
AA41
VSS
Y41
VSS
U41
VSS
T41
VSS
M41
VSS
G41
VSS
B41
VSS
BG40
VSS
BB40
VSS
AV40
VSS
AN40
VSS
H40
VSS
E40
VSS
AT39
VSS
AM39
VSS
AJ39
VSS
AE39
VSS
N39
VSS
L39
VSS
B39
VSS
BH38
VSS
BC38
VSS
BA38
VSS
AU38
VSS
AH38
VSS
AD38
VSS
AA38
VSS
Y38
VSS
U38
VSS
T38
VSS
J38
VSS
F38
VSS
C38
VSS
BF37
VSS
BB37
VSS
AW37
VSS
AT37
VSS
AN37
VSS
AJ37
VSS
H37
VSS
C37
VSS
BG36
VSS
BD36
VSS
AK15
VSS
AU36
VSS
CANTIGA-GM-GP -U-NF
CANTIGA-GM-GP -U-NF
VSS
VSS
9 OF 10
9 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6
B
B
C
10 OF 10
U52J
U52J
BG21
VSS
L12
VSS
AW21
VSS
AU21
VSS
AP21
VSS
AN21
VSS
AH21
VSS
AF21
VSS
AB21
VSS
R21
VSS
M21
VSS
J21
VSS
G21
VSS
BC20
VSS
BA20
VSS
AW20
VSS
AT20
VSS
AJ20
VSS
AG20
VSS
Y20
VSS
N20
VSS
K20
VSS
F20
VSS
C20
VSS
A20
VSS
BG19
VSS
A18
VSS
BG17
VSS
BC17
VSS
AW17
VSS
AT17
VSS
R17
M17
H17
C17
BA16
AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13
AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11
Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8
C
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CANTIGA-GM-GP -U-NF
CANTIGA-GM-GP -U-NF
10 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS NCTF
VSS NCTF
VSS_NCTF
VSS_NCTF
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
NC#E1
VSS SCB
VSS SCB
NC#D2
NC#C3
NC#B4
NC#A5
NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC
NC
NC#D47
NC#B47
NC#A46
NC#F48
NC#E48
NC#C48
NC#B48
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
U24
U28
U25
U29
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
BH48
BH1
A48
C1
A3
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
D
TP239 TPAD34 TP2 39 TPAD34
TP240 TPAD34 TP2 40 TPAD34
TP247 TPAD34 TP2 47 TPAD34
TP246 TPAD34 TP2 46 TPAD34
TP345 TPAD34 TP3 45 TPAD34
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet
D
Date: Sheet
Cantiga(8/7):GND
Cantiga(8/7):GND
Cantiga(8/7):GND
E
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
14 53 Wednesday, June 18, 2008
14 53 Wednesday, June 18, 2008
14 53 Wednesday, June 18, 2008
of
E
of
-1
-1
-1
A
M_A_A[14..0] 9
4 4
M_A_BS2 9
M_A_BS0 9
M_A_BS1 9
M_A_DQ[63..0] 9
3 3
2 2
-M_A_DQS[7..0] 9
DDR3_VREF_S3
1 2
1 2
R4
0R0603-PADR40R0603-PAD
C30
C30
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
M_A_DQS[7..0] 9
M_ODT0 10
M_ODT1 10
1 2
C23
C23
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Place caps close to pin1 as possible
1 1
A
B
DM1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
-M_A_DQS0
-M_A_DQS1
-M_A_DQS2
-M_A_DQS3
-M_A_DQS4
-M_A_DQS5
-M_A_DQS6
-M_A_DQS7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
VREF_DIMM1
B
DM1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
79
BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
1
VREFDQ
126
VREFCA
2
VSS
77
NC
122
NC
206
GND
NP1
NP1
DDR3-204P-6-GP-U1
DDR3-204P-6-GP-U1
62.10017.F91
62.10017.F91
H= 9.2
RAS#
CAS#
CKE0
CKE1
CK0#
CK1#
VDDSPD
EVENT#
RESET#
TEST
NORMAL TYPE
110
113
WE#
115
114
S0#
121
S1#
73
74
101
CK0
103
102
CK1
104
M_A_DM0
11
DM0
M_A_DM1
28
DM1
M_A_DM2
46
DM2
M_A_DM3
63
DM3
M_A_DM4
136
DM4
M_A_DM5
153
DM5
M_A_DM6
170
DM6
M_A_DM7
187
DM7
200
SDA
202
SCL
199
197
SA0
201
SA1
198
30
125
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
203
VTT
204
VTT
205
GND
NP2
NP2
C
-M_A_RAS 9
-M_A_WE 9
-M_A_CAS 9
-M_CS0 10
-M_CS1 10
M_CKE0 10
M_CKE1 10
DDRCLK0_533M 10
-DDRCLK0_533M 10
DDRCLK1_533M 10
-DDRCLK1_533M 10
M_A_DM[7..0] 9
ICH_SMBDATA 3,16,30
ICH_SMBCLK 3,16,30
-MEM_TS0 10
-DRAMRST 10,16
VDDSPD_DIMM1
1 2
C19
C19
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
3D3V_S0
1 2
R3
0R0603-PADR30R0603-PAD
1 2
C20
C20
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
D
1D5V_S3
E
Place one cap to each power pin and as close as possible
1 2
1 2
C24
C24
C5
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GPC5SC4D7U6D3V3KX-GP
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C
1 2
1 2
C26
C26
C6
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GPC6SC4D7U6D3V3KX-GP
1 2
C18
C18
1 2
C16
C16
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C15
C15
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
0D75V_S3
1 2
1 2
C28
C28
C27
C27
1 2
C14
C14
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C29
C29
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C25
C25
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C7
C12
C12
SC4D7U6D3V3KX-GPC7SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
D
1 2
1 2
C4
C8
SC4D7U6D3V3KX-GPC4SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GPC8SC4D7U6D3V3KX-GP
1 2
1 2
C22
C22
C21
C21
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1 2
1 2
C9
C10
C10
SCD1U10V2KX-5GPC9SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DDR3 SODIMM-A (NORMAL TYPE)
DDR3 SODIMM-A (NORMAL TYPE)
DDR3 SODIMM-A (NORMAL TYPE)
C
C
C
Olympus
Olympus
Olympus
E
of
of
of
15 53 Wednesday, July 09, 2008
15 53 Wednesday, July 09, 2008
15 53 Wednesday, July 09, 2008
-1
-1
-1
A
M_B_A[14..0] 9
4 4
M_B_BS2 9
M_B_BS0 9
M_B_BS1 9
M_B_DQ[63..0] 9
3 3
-M_B_DQS[7..0] 9
2 2
R307
R307
0R0603-PAD
0R0603-PAD
M_B_DQS[7..0] 9
1 2
C472
C472
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
DDR3_VREF_S3
1 2
C467
C467
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
Place caps close to pin1 as possible
B
DM2
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
-M_B_DQS0
-M_B_DQS1
-M_B_DQS2
-M_B_DQS3
-M_B_DQS4
-M_B_DQS5
-M_B_DQS6
-M_B_DQS7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_ODT2 10
M_ODT3 10
M_B_DQS7
VREF_DIMM2
DM2
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
79
BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
1
VREFDQ
126
VREFCA
2
VSS
77
NC
122
NC
206
GND
NP1
NP1
DDR3-204P-7-GP-U1
DDR3-204P-7-GP-U1
RAS#
WE#
CAS#
CKE0
CKE1
CK0#
CK1#
VDDSPD
EVENT#
RESET#
TEST
REVERSE TYPE
GND
110
113
115
114
S0#
121
S1#
73
74
101
CK0
103
102
CK1
104
M_B_DM0
11
DM0
M_B_DM1
28
DM1
M_B_DM2
46
DM2
M_B_DM3
63
DM3
M_B_DM4
136
DM4
M_B_DM5
153
DM5
M_B_DM6
170
DM6
M_B_DM7
187
DM7
200
SDA
202
SCL
199
197
SA0
201
SA1
198
30
125
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
203
VTT
204
VTT
205
NP2
NP2
C
R6 10KR2J-3-GP R6 10KR2J-3-GP
1 2
1 2
1 2
C476
C476
C33
C33
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
-M_B_RAS 9
-M_B_WE 9
-M_B_CAS 9
-M_CS2 10
-M_CS3 10
M_CKE2 10
M_CKE3 10
DDRCLK2_533M 10
-DDRCLK2_533M 10
DDRCLK3_533M 10
-DDRCLK3_533M 10
M_B_DM[7..0] 9
ICH_SMBDATA 3,15,30
ICH_SMBCLK 3,15,30
VDDSPD_DIMM2
-MEM_TS1 10
-DRAMRST 10,15
Place one cap to each power pin and as close as possible
1 2
1 2
1 2
1 2
C36
C36
C35
C35
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C470
C470
C469
C469
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C38
C38
C37
C37
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
1 2
C468
C468
C471
C471
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
1 2
C34
C34
C31
C31
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
1 2
C477
C477
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
0D75V_S3
C478
C478
D
3D3V_S0
1 2
R5
0R0603-PADR50R0603-PAD
1 2
C32
C32
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C479
C479
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
E
1D5V_S3
1 2
1 2
C475
C475
C480
C480
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C473
C473
C474
C474
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
C39
C39
C40
C40
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 1
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
DDR3 SODIMM-B (REVERSE TYPE)
DDR3 SODIMM-B (REVERSE TYPE)
DDR3 SODIMM-B (REVERSE TYPE)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
16 53 Wednesday, June 18, 2008
16 53 Wednesday, June 18, 2008
16 53 Wednesday, June 18, 2008
E
-1
-1
-1
of
of
of
LCD/INVERTER CONN
LCDVDD
C100
C100
C84
C84
1 2
1 2
LCD1
LCD1
31
NP1
1
2
3
4
5
6
7
8
9
10
33
11
34
32
IPEX-CON30-2-GP
IPEX-CON30-2-GP
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
NP2
3D3V_S0
U114
PANEL_POWER_ON 11
PANEL_POWER_ON_D 24
NC7SB3157P6X-1GP
NC7SB3157P6X-1GP
2
1
U114
B03A
GND
B1
PANEL_POWER_ON_I
4
5
VCC
6
S
LCDVDD
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1 2
C83
C83
1 2
C78
C78
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
5V_S5 CCD_PWR
DISCRETE_ENABLE 18,25,26,38
L =>B0 -UMA
H =>B1 -ATI
U8
U8
1
IN#1
GND
2
IN#8
OUT
3
IN#7
EN
4
IN#6
GND
IN#5
G5281RC1U-GP
G5281RC1U-GP
3D3V_S0
9
8
7
6
5
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1 2
C1023
C1023
1 2
C80
C80
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
BRIGHTNESS_CN
3D3V_S0
LCD_TXACLK+
LCD_TXACLKLCD_TXAOUT2+
LCD_TXAOUT2LCD_TXAOUT0+
LCD_TXAOUT0LCD_TXAOUT1+
LCD_TXAOUT1-
SCD1U25V3KX-GP
SCD1U25V3KX-GP
THER_SCL 7,38,51,53
1 2
C85
C85
DY
DY
SCD1U25V3KX-GP
SCD1U25V3KX-GP
LCD_BLON_ON
LCD_EDID_CLK
LCD_EDID_DATA
THER_SDA 7,38,51,53
-sc modify
1 2
C1022
C1022
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
FUSE-3A32V-7-GP
FUSE-3A32V-7-GP
69.43001.101
69.43001.101
3D3V_S0
DY
DY
R1035
R1035
1 2
0R2J-2-GP
0R2J-2-GP
R386
R386
10KR2J-3-GP
10KR2J-3-GP
1 2
C582
C582
C592
C592
SC100P50V2JN-3GP
SC100P50V2JN-3GP
F3
F3
1 2
C583
C583
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DY
DY
1 2
R389
R389
DY
DY
DCBATOUT
1 2
1 2
C574
C574
SC10U35V0ZY-GP
SC10U35V0ZY-GP
1 2
0R2J-2-GP
0R2J-2-GP
1 2
0R2J-2-GP
0R2J-2-GP
R1037
R1037
1 2
DIS_BLON_IN 24,38
0R2J-2-GP
0R2J-2-GP
R1036
R1036
DY
DY
BLON_ON By config
UMA->KBC
DIS->ATI
LCD_EDID_CLK
LCD_EDID_DATA
BRIGHTNESS 38
BLON_OUT 38
3D3V_S0
U109
U109
4
A
5
VCC
6
S
NC7SB3157P6X-1GP
NC7SB3157P6X-1GP
U110
U110
4
A
5
VCC
6
S
NC7SB3157P6X-1GP
NC7SB3157P6X-1GP
DY
DY
R1063 0R2J-2-GP
R1063 0R2J-2-GP
R1064 0R2J-2-GP R1064 0R2J-2-GP
Brighness Control
U115
U115
4
B03A
5
GND
VCC
6
B1
S
NC7SB3157P6X-1GP
NC7SB3157P6X-1GP
DY
DY
3
B0
2
GND
1
B1
3
B0
2
GND
1
B1
1 2
1 2
L =>B0 -UMA
H =>B1 -ATI
2
1
L =>B0 -UMA
H =>B1 -ATI
DISCRETE_ENABLE 18,25,26,38
UMA_BKLT 11
BRIGHTNESS 38
GM_EDID_CLK 11
ATI_EDID_CLK 21
GM_EDID_DATA 11
ATI_EDID_DATA 21
GPIO_EDID 27
DISCRETE_ENABLE 18,25,26,38
DY
DY
F1 FUSE-1A6V-2-GP
1 2
C68
C68
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
CAMERA & DIG-MIC
-sc modify
C1024
C1024
1 2
CAMERA1
CAMERA1
7
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
8
MLX-CON6-14-GP-U
MLX-CON6-14-GP-U
20.F0711.006
20.F0711.006
MAIN SOURCE:20.F0711.006
SECOND SOURCE:20.F0693.006
1 2
C67
C67
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
2
3
4
AUD_DMIC_CLK_G_R
5
AUD_DMIC_IN0_R
6
CCD_PWR
AUD_DMIC_CLK_G_R 53
AUD_DMIC_IN0_R 53
F1 FUSE-1A6V-2-GP
1 2
U6
U6
1
OUT
2
GND
NC#33EN
G5240B1T1U-GP
G5240B1T1U-GP
USB_PN8_CCD 26,53
BLM18BA750SN-GP
BLM18BA750SN-GP
USB_PP8_CCD 26,53
1 2
L1
L1
1 2
L2 BLM18BA750SN-GPL2 BLM18BA750SN-GP
-sc modify
1 2
R1018
R1018
10KR2F-2-GP
10KR2F-2-GP
L => A channel
H =>B channel
U105
U105
38
ATMDS2+
37
ATMDS2-
36
ATMDS1+
35
ATMDS1-
34
ATMDS0+
33
ATMDS0-
32
ATMDSCLK+
31
ATMDSCLK-
29
BTMDS2+
28
BTMDS2-
27
BTMDS1+
26
BTMDS1-
25
BTMDS0+
24
BTMDS0-
23
BTMDSCLK+
22
BTMDSCLK-
9
SEL
TS3DV421RUAR-GP
TS3DV421RUAR-GP
TMDSCLK+
TMDSCLK-
GND
43
TMDS2+
TMDS2-
TMDS1+
TMDS1-
TMDS0+
TMDS0-
2
VDD
8
VDD
16
VDD
18
VDD
20
VDD
30
VDD
40
VDD
42
VDD
3
4
6
7
11
12
14
15
1
VSS
5
VSS
10
VSS
13
VSS
17
VSS
19
VSS
21
VSS
39
VSS
41
VSS
C58
C58
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
5
IN
4
1 2
1 2
C60
C60
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
33R2J-2-GP
33R2J-2-GP
R30
R30
1 2
R32
R32
1 2
33R2J-2-GP
33R2J-2-GP
L => UMA
H =>ATI
DISCRETE_ENABLE 18,25,26,38
CCD_ON 38
CH521S-30PT-GP-U
CH521S-30PT-GP-U
AUD_DMIC_CLK_G 34
AUD_DMIC_IN0 34
D102
D102
K A
For Hybird
3D3V_S0
SWAP FOR LAYOUT
1 2
R1039
R1039
470R2J-2-GP
470R2J-2-GP
R1017
R1017
1 2
8K2R2J-3-GP
8K2R2J-3-GP
GMCH_TXAOUT2+ 11
GMCH_TXAOUT2- 11
GMCH_TXAOUT0+ 11
GMCH_TXAOUT0- 11
GMCH_TXACLK+ 11
GMCH_TXACLK- 11
GMCH_TXAOUT1+ 11
GMCH_TXAOUT1- 11
ATI_TXAOUT2+ 24
ATI_TXAOUT2- 24
ATI_TXAOUT0+ 24
ATI_TXAOUT0- 24
ATI_TXACLK+ 24
ATI_TXACLK- 24
ATI_TXAOUT1+ 24
ATI_TXAOUT1- 24
LCD_TXAOUT2+
LCD_TXAOUT2LCD_TXAOUT0+
LCD_TXAOUT0LCD_TXACLK+
LCD_TXACLKLCD_TXAOUT1+
LCD_TXAOUT1-
1D8V_S3
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C1003
C1003
1 2
C1000
C1000
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SWAP FOR LAYOUT
1 2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
C1001
C1001
C1002
C1002
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
LCD CONN & CAMERA & DIG-MIC
LCD CONN & CAMERA & DIG-MIC
LCD CONN & CAMERA & DIG-MIC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Olympus
Olympus
Olympus
-1
-1
-1
of
17 53 Wednesday, July 09, 2008
of
17 53 Wednesday, July 09, 2008
of
17 53 Wednesday, July 09, 2008