How it Works
Lenovo
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ThinkPad X280
boardview
3 pgs249.18 Kb0
Schematic
91 pgs1.01 Mb0
User manual
168 pgs8.56 Mb0
Setup Guide
7 pgs1.16 Mb0
User Guide
154 pgs6.75 Mb0
User Guide [ar]
148 pgs7.02 Mb0
Setup Guide [ar, es, pt]
10 pgs629.3 Kb0
User Guide [bg]
166 pgs6.82 Mb0
Setup Guide [bg, el, pl, ro, sh]
10 pgs2.36 Mb0
User Guide [cs]
158 pgs6.77 Mb0
Setup Guide [cs, hr, hu, sk, sl]
10 pgs2.52 Mb0
User Guide [da]
154 pgs6.76 Mb0
Setup Guide [da, fi, nb, sv]
10 pgs594.71 Kb0
User Guide [de]
166 pgs6.82 Mb0
Setup Guide [de, fr, it, nl, pt]
10 pgs2.27 Mb0
User Guide [el]
172 pgs6.85 Mb0
Hardware Maintenance Manual [en, ar, bg, cs, da, de, el, es, fi, fr, he, hr, hu, id, it, ko, nb, nl, pl, pt, pt, ro, ru, sh, sk, sl, sv, th, tr, uk, zc, zh]
111 pgs48.64 Mb0
User Guide [es]
160 pgs6.8 Mb0
User Guide [fi]
156 pgs6.74 Mb0
User Manual [fr]
158 pgs6.82 Mb0
User Guide [he]
130 pgs6.85 Mb0
Setup Guide [he, ru, tr, uk]
10 pgs2.41 Mb0
User Guide [hr]
158 pgs6.78 Mb0
User Guide [hu]
158 pgs6.78 Mb0
User Guide [id]
158 pgs6.75 Mb0
Setup Guide [id, th]
8 pgs789.44 Kb0
User Guide [it]
158 pgs6.8 Mb0
Hardware Maintenance Manual [ja]
111 pgs48.48 Mb0
User Guide [ja]
156 pgs4.13 Mb0
Setup Guide [ja, ko, zc, zh]
8 pgs978.13 Kb0
User Guide [ko]
148 pgs3.42 Mb0
User Guide [nb]
154 pgs6.75 Mb0
User Manual [nl]
158 pgs6.79 Mb0
User Guide [pl]
162 pgs6.79 Mb0
User Guide [pt]
160 pgs6.8 Mb0
User Guide [pt]
158 pgs6.79 Mb0
User Guide [ro]
160 pgs6.79 Mb0
User Guide [ru]
166 pgs6.82 Mb0
User Guide [sh]
158 pgs6.78 Mb0
User Guide [sk]
158 pgs6.77 Mb0
User Guide [sl]
158 pgs6.77 Mb0
User Guide [sv]
154 pgs6.74 Mb0
User Guide [th]
190 pgs6.87 Mb0
User Guide [tr]
158 pgs6.76 Mb0
User Guide [uk]
160 pgs6.8 Mb0
User Guide [zc]
148 pgs3.62 Mb0
User Guide [zh]
140 pgs3.72 Mb0

Lenovo ThinkPad X280 Schematic

5
4
3
2
1
Finn-1 SOVP Logic Schematics
1.TITLE PAGE
2.EC HISTORY
D D
3.CPU(1/16) : DDI/EDP
4.CPU(2/16) : DDR CHANNEL-A
5.CPU(3/16) : DDR CHANNEL-B
6.CPU(4/16) : MISC/JTAG
7.CPU(5/16) : LPC/SPI/SMBUS/C-LINK
8.CPU(6/16) : LPSS/ISH
10.CPU(8/16) : PCIE/USB/SATA
11.CPU(9/16) : CSI-2/EMMC
12.CPU(10/16) : CLOCK SIGNALS
C C
36.USB TYPE-C CONNECTOR
37.HDMI CONNECTOR
38.M.2 SOCKET 3 MODULE I/F
39.USB POWER/CONN
40.BLANK
41.GBE JACKSONVILLE
42.BLANK
43.BLANK
44.BLANK
45.M.2 SOCKET 1 MODULE I/F
46.M.2 SOCKET 2 MODULE I/F
47.MEDIA CARD CONTROLLER
FN1KR-3 VER 4.00 Dec/21/2017
71.DC/DC VCC5M/VCC3M (TPS51285B-1)
72.DC/DC IMVP8 CONTROLLER (MP2949A)
73.DC/DC VCCCPUCORE (MP86902B)
74.DC/DC VCCGFXCORE_I (MP86902B)
75.DC/DC VCCSA (MP86901A)
76.BLANK
77.DC/DC VCCCPUIO
78.DC/DC VCC1R0_SUS (NB693)
79.LOAD SW VCCST & VCCSTG
BASE LOGIC: Finn-1 SVT VER3.11 Oct/27/2017
13.CPU(11/16) : SYSTEM PM
14.CPU(12/16) : CPU POWER (1/2)
15.CPU(13/16) : CPU POWER (2/2)
16.CPU(14/16) : PCH POWER
17.CPU(15/16) : GND
18.CPU(16/16) : CFG/RESERVED
19.XDP CONNECTOR
20.RTC BATTERY
21.SPI FLASH
B B
22.DDR4 BASE MEMORY CH-A (1/2)
23.DDR4 BASE MEMORY CH-A (2/2)
24.DDR4 BASE MEMORY CH-B (1/2)
25.DDR4 BASE MEMORY CH-B (2/2)
26.LCD
48.SIM/MEDIA CARD COMBO SLOT
49.AUDIO ALC3287
50.AUDIO CONNECTOR
51.AUDIO JACK SENSE
52.AUDIO EXT MIC I/F
53.AUDIO SPEAKER
54.AUDIO BEEP
55.MEC1663 (1/3)
56.MEC1663 (2/3)
57.MEC1663 (3/3)
58.KEYBOARD/TRACK POINT
59.TOUCH PAD/NFC
60.SCR/FPR/NEC LED
61.FAN CONNECTOR
80.DC/DC VCC1R2A /0R6B/2R5A (NB687)
81.BLANK
82.BLANK
83.DC/DC VCC1R8_SUS (BU90104GWZ)
84.DC/DC VCCPCHCORE
85.BLANK
86.BLANK
87.LOAD SW PCH SUS
88.LOAD SW LAN & LDO HDMI
89.LOAD SW B
90.LOAD SW WLAN
91.PTH FOR SCREW HOLES
27.LID/MIC/CAMERA/PWR SW
28.DDI DEMUX/HDMI LEVEL SHIFTER
29.USB TYPE-C SWITCH
30.BLANK
31.ALPINE RIDGE(1/2)
A A
32.ALPINE RIDGE(2/2)
33.USB PD CONTROLLER(1/2)
34.USB PD CONTROLLER(2/2)
35.DOCKING CONNECTOR
5
4
62.APS G-SENSOR
63.DISCRETE TPM 2.0
64.SMBUS SWITCH/LPC DEBUG PORT
65.THINK ENGINE-3 (1/2)
66.THINK ENGINE-3 (2/2)
67.DC-IN
68.BLANK
69.BATTERY INPUT
70.BATTERY CHARGER (BQ25700A)
3
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
2
Date: Sheet :
Title :
Title :
Title :
TITLE PAGE
TITLE PAGE
TITLE PAGE
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
191Thursday, December 21, 2017
191Thursday, December 21, 2017
191Thursday, December 21, 2017
5
4
3
2
1
EC HISTORY
FN1KR-3 (BASE LOGIC: Finn-1 SVT VER3.11 Oct/27/2017)
VER.4.00 12/21/2017 APPLIED FN1_SOVP_EC001-006
D D
C C
B B
TABLE: Chip Capacitor Thermal Characteristics
-55 to 150degC
-55 to 125degC
-55 to 125degC
-55 to 105degC
-55 to 85degC
+/-30ppm/degC +/-30ppm/degC
+/-15% +/-22% +/-15%
Code NPO
C0G
X7R X6S X5R
TABLE: Chip Capacitor Tolerance
Tolerance Code +/-0.25pF
+/-0.5pF
+/-5% +/-10% +/-20% +80/-20%
C D
J K M Z
TABLE: Chip Part Dimension
Size [mm]
0.40 x 0.20
0.60 x 0.30
1.00 x 0.50
1.60 x 0.80
2.00 x 1.25
2.00 x 1.60
2.50 x 2.00
3.20 x 1.60
3.20 x 2.50
4.50 x 1.60
4.50 x 2.50
4.50 x 3.20
5.00 x 2.50
6.40 x 3.20
mm Size Code Inch Size Code
0402 0603 1005 1608 2125 2016 2520 3216 3225 4516 4525 4532 5025 6432
01005 0201 0402 0603 0805 0806 1008 1206 1210 1806 1810 1812 2010 2512
A A
LOGIC
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
EC HISTORY
EC HISTORY
EC HISTORY
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
291Thursday, December 21, 2017
291Thursday, December 21, 2017
291Thursday, December 21, 2017
5
D D
4
VCCCPUIO VCC3_SUS
3
2
1
R5
24.9_1%
0603_1/20w
1 2
DDIP1_0N31 DDIP1_0P31 DDIP1_1N31 DDIP1_1P31 DDIP1_2N31 DDIP1_2P31 DDIP1_3N31 DDIP1_3P31
C C
DDIP2_0N28 DDIP2_0P28 DDIP2_1N28 DDIP2_1P28 DDIP2_2N28 DDIP2_2P28 DDIP2_3N28 DDIP2_3P28
DDIP1_0N DDIP1_0P DDIP1_1N DDIP1_1P DDIP1_2N DDIP1_2P DDIP1_3N DDIP1_3P
DDIP2_0N DDIP2_0P DDIP2_1N DDIP2_1P DDIP2_2N DDIP2_2P DDIP2_3N DDIP2_3P
TABLE : Functional Strap
DDIP2_CTRLCLK DDIP2_CTRLDATA
EDP_COMP
DDPB_CTRLDATA
HIGH LOW
Port B is detected. Port B is not detected.
DDIP2_CTRLCLK28 DDIP2_CTRLDATA28
DDPC_CTRLDATA
HIGH LOW
Port C is detected. Port C is not detected.
R3069
2.2K_5%
0603_1/20w
1 2
U58A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22
N12
GPP_E23
E52
EDP_RCOMP
SKYLAKE_ULT_DDR3L_REV053F
DDI
DISPLAY SIDEBANDS
1 OF 20
EDP
GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3
EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]
EDP_AUXN EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP
RSVD_G46
RSVD_F46
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
C47 C46 D46 C45 A45 B45 A47 B47
E45 F45
B52 G50
F50 E48 F48 G46 F46
L9 L7 L6 N9 L10
R12 R11 U13
R433 100K_5%
0603_1/20w
1 2
R138 100K_5%
0603_1/20w
1 2
R8 100K_5%
0603_1/20w
1 2
R2917 100K_5%
0603_1/20w
1 2
R2914 100K_5%
0603_1/20w
1 2
EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1
EDP_AUXN EDP_AUXP
DDIP1_AUXN DDIP1_AUXP DDIP2_AUXN DDIP2_AUXP
DDIP1_HPD DDIP2_HPD
EDP_TXN0 26 EDP_TXP0 26 EDP_TXN1 26 EDP_TXP1 26
EDP_AUXN 26 EDP_AUXP 26
DDIP1_AUXN 31 DDIP1_AUXP 31 DDIP2_AUXN 28 DDIP2_AUXP 28
DDIP1_HPD 31 DDIP2_HPD 28
EDP_HPD 26 VGA_BLON 55
PANEL_BKLT_CTRL 26 PANEL_POWER_ON 66
B B
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(1/16) : DDI/EDP
CPU(1/16) : DDI/EDP
CPU(1/16) : DDI/EDP
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
391Thursday, December 21, 2017
391Thursday, December 21, 2017
391Thursday, December 21, 2017
5
M_A_DQ[15:0]22
M_A_DQ[47:32]22
M_B_DQ[15:0]24
D D
M_B_DQ[47:32]24
4
3
2
1
TABLE
Pin
AL71 AL68 AN68 AN69 AL70 AL69 AN70
Block 0
AN71 AR70 AR68 AU71 AU68 AR71 AR69 AU70 AU69
C C
BB65 AW65 AW63 AY63 BA65 AY65 BA63
Block 2
BB63 BA61 AW61 BB59 AW59 BB61 AY61 BA59 AY59
AY39 AW39 AY37 AW37
B B
BB39 BA39 BA37
Block 4
BB37 AY35 AW35 AY33 AW33 BB35 BA35 BA33 BB33
AY31 AW31 AY29 AW29 BB31 BA31 BA29
Block 6
A A
BB29 AY27 AW27 AY25 AW25 BB27 BA27 BA25 BB25
Interleave
DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15]
DDR0_DQ[16] DDR0_DQ[17] DDR0_DQ[18] DDR0_DQ[19] DDR0_DQ[20] DDR0_DQ[21] DDR0_DQ[22] DDR0_DQ[23] DDR0_DQ[24] DDR0_DQ[25] DDR0_DQ[26] DDR0_DQ[27] DDR0_DQ[28] DDR0_DQ[29] DDR0_DQ[30] DDR0_DQ[31]
DDR0_DQ[32] DDR0_DQ[33] DDR0_DQ[34] DDR0_DQ[35] DDR0_DQ[36] DDR0_DQ[37] DDR0_DQ[38] DDR0_DQ[39] DDR0_DQ[40] DDR0_DQ[41] DDR0_DQ[42] DDR0_DQ[43] DDR0_DQ[44] DDR0_DQ[45] DDR0_DQ[46] DDR0_DQ[47]
DDR0_DQ[48] DDR0_DQ[49] DDR0_DQ[50] DDR0_DQ[51] DDR0_DQ[52] DDR0_DQ[53] DDR0_DQ[54] DDR0_DQ[55] DDR0_DQ[56] DDR0_DQ[57] DDR0_DQ[58] DDR0_DQ[59] DDR0_DQ[60] DDR0_DQ[61] DDR0_DQ[62] DDR0_DQ[63]
5
Non-Interleave
DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15]
DDR0_DQ[32] DDR0_DQ[33] DDR0_DQ[34] DDR0_DQ[35] DDR0_DQ[36] DDR0_DQ[37] DDR0_DQ[38] DDR0_DQ[39] DDR0_DQ[40] DDR0_DQ[41] DDR0_DQ[42] DDR0_DQ[43] DDR0_DQ[44] DDR0_DQ[45] DDR0_DQ[46] DDR0_DQ[47]
DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[2] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[5] DDR1_DQ[6] DDR1_DQ[7] DDR1_DQ[8] DDR1_DQ[9] DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15]
DDR1_DQ[32] DDR1_DQ[33] DDR1_DQ[34] DDR1_DQ[35] DDR1_DQ[36] DDR1_DQ[37] DDR1_DQ[38] DDR1_DQ[39] DDR1_DQ[40] DDR1_DQ[41] DDR1_DQ[42] DDR1_DQ[43] DDR1_DQ[44] DDR1_DQ[45] DDR1_DQ[46] DDR1_DQ[47]
LOGIC
M_A_DQ4 M_A_DQ6 M_A_DQ1 M_A_DQ7 M_A_DQ2 M_A_DQ0 M_A_DQ5 M_A_DQ3 M_A_DQ12 M_A_DQ14 M_A_DQ9 M_A_DQ13 M_A_DQ10 M_A_DQ8 M_A_DQ11 M_A_DQ15 M_A_DQ34 M_A_DQ32 M_A_DQ39 M_A_DQ35 M_A_DQ38 M_A_DQ36 M_A_DQ37 M_A_DQ33 M_A_DQ46 M_A_DQ40 M_A_DQ47 M_A_DQ45 M_A_DQ42 M_A_DQ44 M_A_DQ43 M_A_DQ41 M_B_DQ4 M_B_DQ6 M_B_DQ5 M_B_DQ1 M_B_DQ2 M_B_DQ0 M_B_DQ3 M_B_DQ7 M_B_DQ10 M_B_DQ14 M_B_DQ15 M_B_DQ13 M_B_DQ12 M_B_DQ8 M_B_DQ11 M_B_DQ9 M_B_DQ34 M_B_DQ32 M_B_DQ37 M_B_DQ33 M_B_DQ36 M_B_DQ38 M_B_DQ35 M_B_DQ39 M_B_DQ42 M_B_DQ46 M_B_DQ47 M_B_DQ45 M_B_DQ40 M_B_DQ44 M_B_DQ43 M_B_DQ41
4
AL71
AL68 AN68 AN69
AL70
AL69 AN70 AN71 AR70 AR68 AU71 AU68 AR71 AR69 AU70 AU69 BB65
AW65 AW63
AY63 BA65 AY65 BA63 BB63 BA61
AW61
BB59
AW59
BB61 AY61 BA59 AY59 AY39
AW39
AY37
AW37
BB39 BA39 BA37 BB37 AY35
AW35
AY33
AW33
BB35 BA35 BA33 BB33 AY31
AW31
AY29
AW29
BB31 BA31 BA29 BB29 AY27
AW27
AY25
AW25
BB27 BA27 BA25 BB25
TABLE
Block 0
Block 2
Block 4
Block 6
U58B
DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15] DDR0_DQ[16]/DDR0_DQ[32] DDR0_DQ[17]/DDR0_DQ[33] DDR0_DQ[18]/DDR0_DQ[34] DDR0_DQ[19]/DDR0_DQ[35] DDR0_DQ[20]/DDR0_DQ[36] DDR0_DQ[21]/DDR0_DQ[37] DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQ[26]/DDR0_DQ[42] DDR0_DQ[27]/DDR0_DQ[43] DDR0_DQ[28]/DDR0_DQ[44] DDR0_DQ[29]/DDR0_DQ[45] DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQ[32]/DDR1_DQ[0] DDR0_DQ[33]/DDR1_DQ[1] DDR0_DQ[34]/DDR1_DQ[2] DDR0_DQ[35]/DDR1_DQ[3] DDR0_DQ[36]/DDR1_DQ[4] DDR0_DQ[37]/DDR1_DQ[5] DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQ[61]/DDR1_DQ[45] DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQ[63]/DDR1_DQ[47]
SKYLAKE_ULT_DDR3L_REV053F
AM70 AM69 AT69 AT70
BA64 AY64 AY60 BA60
BA38 AY38 AY34 BA34
BA30 AY30 AY26 BA26
DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]
DDR0_DQSN[2] DDR0_DQSP[2] DDR0_DQSN[3] DDR0_DQSP[3]
DDR0_DQSN[4] DDR0_DQSP[4] DDR0_DQSN[5] DDR0_DQSP[5]
DDR0_DQSN[6] DDR0_DQSP[6] DDR0_DQSN[7] DDR0_DQSP[7]
DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]
DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]
DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5]
DDR CH - A
2 OF 20
DDR0_MA[3] DDR0_MA[4]
DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]
DDR0_ALERT#
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
DDR_VTT_CNTL
DDR0_PAR
AU53 AT53 AU55 AT55
BA56 BB56 AW56 AY56
AU45 AU43 AT45 AT43
BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54
AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52
AM70 AM69 AT69 AT70 BA64 AY64 AY60 BA60 BA38 AY38 AY34 BA34 BA30 AY30 AY26 BA26
AW50 AT52
AY67 AY68 BA67
AW67
InterleavePin Non-Interleave
DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]
DDR0_DQSN[4] DDR0_DQSP[4] DDR0_DQSN[5] DDR0_DQSP[5]
DDR1_DQSN[0] DDR1_DQSP[0] DDR1_DQSN[1] DDR1_DQSP[1]
DDR1_DQSN[4] DDR1_DQSP[4] DDR1_DQSN[5] DDR1_DQSP[5]
LOGIC
3
M_A_A5 M_A_A9 M_A_A6 M_A_A8 M_A_A7
M_A_A12 M_A_A11
M_A_A13 M_A_A15 M_A_A14 M_A_A16
M_A_A2 M_A_A10
M_A_A1 M_A_A0 M_A_A3 M_A_A4
DDR_PG_CTRL
-M_A_DDRCLK0_1200M M_A_DDRCLK0_1200M
M_A_CKE0
-M_A_CS0 M_A_ODT0
-M_A_DQS0 M_A_DQS0
-M_A_DQS1 M_A_DQS1
-M_A_DQS4 M_A_DQS4
-M_A_DQS5 M_A_DQS5
-M_B_DQS0 M_B_DQS0
-M_B_DQS1 M_B_DQS1
-M_B_DQS4 M_B_DQS4
-M_B_DQS5 M_B_DQS5
-M_A_ALERT M_A_PARITY
VCC1R2A
NA
R1858 10K_5%
0603_1/20w
1 2
-M_A_DDRCLK0_1200M 22,23 M_A_DDRCLK0_1200M 22,23
M_A_CKE0 22,23
-M_A_CS0 22,23 M_A_ODT0 22,23
-M_A_ALERT 22,23
M_A_PARITY 22,23 M_A_VREF_CA_CPU 23
M_B_VREF_CA_CPU 25
VCC3M
R1838 100K_5%
0603_1/20w
1 2
3
1
2
Q170 DTC015TM
M_A_BG0
-M_A_ACT M_A_BG1
M_A_BS0 M_A_BS1
DDR_VTT_PG_CTRL
2
M_A_BG0 22,23
-M_A_ACT 22,23 M_A_BG1 22
M_A_BS0 22,23 M_A_BS1 22,23
M_A_A[16:0] 22,23
-M_A_DQS[7:0] 5,22 M_A_DQS[7:0] 5,22
-M_B_DQS[7:0] 5,24 M_B_DQS[7:0] 5,24
DDR_VTT_PG_CTRL 80
TABLE
Pin
BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54
AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52
DDR3L LPDDR3 DDR4
DDR0_MA[5] DDR0_MA[9] DDR0_MA[6] DDR0_MA[8] DDR0_MA[7] DDR0_BA[2] DDR0_MA[12] DDR0_MA[11] DDR0_MA[15] DDR0_MA[14]
DDR0_MA[13] DDR0_CAS# DDR0_WE# DDR0_RAS# DDR0_BA[0] DDR0_MA[2] DDR0_BA[1] DDR0_MA[10] DDR0_MA[1] DDR0_MA[0] DDR0_MA[3] DDR0_MA[4]
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Size :
Size :
Size :
Date: Sheet :
Date: Sheet :
Date: Sheet :
Document Number :
Document Number :
Document Number :
C
DDR0_CAA[0] DDR0_CAA[1] DDR0_CAA[2] DDR0_CAA[3] DDR0_CAA[4] DDR0_CAA[5] DDR0_CAA[6] DDR0_CAA[7] DDR0_CAA[8] DDR0_CAA[9]
DDR0_CAB[0] DDR0_CAB[1] DDR0_CAB[2] DDR0_CAB[3] DDR0_CAB[4] DDR0_CAB[5] DDR0_CAB[6] DDR0_CAB[7] DDR0_CAB[8] DDR0_CAB[9] Not Used Not Used
Title :
Title :
Title :
CPU(2/16) : DDR CHANNEL-A
CPU(2/16) : DDR CHANNEL-A
CPU(2/16) : DDR CHANNEL-A
1
DDR0_MA[5] DDR0_MA[9] DDR0_MA[6] DDR0_MA[8] DDR0_MA[7] DDR0_BG[0] DDR0_MA[12] DDR0_MA[11] DDR0_ACT# DDR0_BG[1]
DDR0_MA[13] DDR0_MA[15] DDR0_MA[14] DDR0_MA[16] DDR0_BA[0] DDR0_MA[2] DDR0_BA[1] DDR0_MA[10] DDR0_MA[1] DDR0_MA[0] DDR0_MA[3] DDR0_MA[4]
LOGIC
491Thursday, December 21, 2017
491Thursday, December 21, 2017
491Thursday, December 21, 2017
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
5
M_A_DQ[31:16]22
M_A_DQ[63:48]22
M_B_DQ[31:16]24
D D
M_B_DQ[63:48]24
4
3
2
1
TABLE
Pin
AF65 AF64 AK65 AK64 AF66 AF67 AK67
Block 1
AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69
C C
AT66 AU66 AP65 AN65 AN66 AP66 AT65
Block 3
AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60
AU40 AT40 AT37 AU37
B B
AR40 AP40 AP37
Block 5
AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30
AU27 AT27 AT25 AU25 AP27 AN27 AN25
Block 7
A A
AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21
Interleave
DDR1_DQ[0] DDR1_DQ[1] DDR1_DQ[2] DDR1_DQ[3] DDR1_DQ[4] DDR1_DQ[5] DDR1_DQ[6] DDR1_DQ[7] DDR1_DQ[8] DDR1_DQ[9] DDR1_DQ[10] DDR1_DQ[11] DDR1_DQ[12] DDR1_DQ[13] DDR1_DQ[14] DDR1_DQ[15]
DDR1_DQ[16] DDR1_DQ[17] DDR1_DQ[18] DDR1_DQ[19] DDR1_DQ[20] DDR1_DQ[21] DDR1_DQ[22] DDR1_DQ[23] DDR1_DQ[24] DDR1_DQ[25] DDR1_DQ[26] DDR1_DQ[27] DDR1_DQ[28] DDR1_DQ[29] DDR1_DQ[30] DDR1_DQ[31]
DDR1_DQ[32] DDR1_DQ[33] DDR1_DQ[34] DDR1_DQ[35] DDR1_DQ[36] DDR1_DQ[37] DDR1_DQ[38] DDR1_DQ[39] DDR1_DQ[40] DDR1_DQ[41] DDR1_DQ[42] DDR1_DQ[43] DDR1_DQ[44] DDR1_DQ[45] DDR1_DQ[46] DDR1_DQ[47]
DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]
5
Non-Interleave
DDR0_DQ[16] DDR0_DQ[17] DDR0_DQ[18] DDR0_DQ[19] DDR0_DQ[20] DDR0_DQ[21] DDR0_DQ[22] DDR0_DQ[23] DDR0_DQ[24] DDR0_DQ[25] DDR0_DQ[26] DDR0_DQ[27] DDR0_DQ[28] DDR0_DQ[29] DDR0_DQ[30] DDR0_DQ[31]
DDR0_DQ[48] DDR0_DQ[49] DDR0_DQ[50] DDR0_DQ[51] DDR0_DQ[52] DDR0_DQ[53] DDR0_DQ[54] DDR0_DQ[55] DDR0_DQ[56] DDR0_DQ[57] DDR0_DQ[58] DDR0_DQ[59] DDR0_DQ[60] DDR0_DQ[61] DDR0_DQ[62] DDR0_DQ[63]
DDR1_DQ[16] DDR1_DQ[17] DDR1_DQ[18] DDR1_DQ[19] DDR1_DQ[20] DDR1_DQ[21] DDR1_DQ[22] DDR1_DQ[23] DDR1_DQ[24] DDR1_DQ[25] DDR1_DQ[26] DDR1_DQ[27] DDR1_DQ[28] DDR1_DQ[29] DDR1_DQ[30] DDR1_DQ[31]
DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]
LOGIC
M_A_DQ20 M_A_DQ22 M_A_DQ21 M_A_DQ17 M_A_DQ18 M_A_DQ16 M_A_DQ23 M_A_DQ19 M_A_DQ26 M_A_DQ24 M_A_DQ31 M_A_DQ29 M_A_DQ30 M_A_DQ28 M_A_DQ27 M_A_DQ25 M_A_DQ50 M_A_DQ48 M_A_DQ53 M_A_DQ49 M_A_DQ54 M_A_DQ52 M_A_DQ51 M_A_DQ55 M_A_DQ62 M_A_DQ58 M_A_DQ63 M_A_DQ61 M_A_DQ56 M_A_DQ60 M_A_DQ57 M_A_DQ59 M_B_DQ16 M_B_DQ20 M_B_DQ19 M_B_DQ23 M_B_DQ22 M_B_DQ18 M_B_DQ17 M_B_DQ21 M_B_DQ26 M_B_DQ30 M_B_DQ31 M_B_DQ29 M_B_DQ28 M_B_DQ24 M_B_DQ27 M_B_DQ25 M_B_DQ48 M_B_DQ50 M_B_DQ51 M_B_DQ55 M_B_DQ52 M_B_DQ54 M_B_DQ49 M_B_DQ53 M_B_DQ60 M_B_DQ56 M_B_DQ58 M_B_DQ62 M_B_DQ63 M_B_DQ61 M_B_DQ57 M_B_DQ59
4
AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21
TABLE
Block 1
Block 3
Block 5
Block 7
U58C
DDR1_DQ[0]/DDR0_DQ[16] DDR1_DQ[1]/DDR0_DQ[17] DDR1_DQ[2]/DDR0_DQ[18] DDR1_DQ[3]/DDR0_DQ[19] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_DQ[6]/DDR0_DQ[22] DDR1_DQ[7]/DDR0_DQ[23] DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_DQ[11]/DDR0_DQ[27] DDR1_DQ[12]/DDR0_DQ[28] DDR1_DQ[13]/DDR0_DQ[29] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR1_DQ[16]/DDR0_DQ[48] DDR1_DQ[17]/DDR0_DQ[49] DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[23]/DDR0_DQ[55] DDR1_DQ[24]/DDR0_DQ[56] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_DQ[27]/DDR0_DQ[59] DDR1_DQ[28]/DDR0_DQ[60] DDR1_DQ[29]/DDR0_DQ[61] DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[32]/DDR1_DQ[16] DDR1_DQ[33]/DDR1_DQ[17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_DQ[35]/DDR1_DQ[19] DDR1_DQ[36]/DDR1_DQ[20] DDR1_DQ[37]/DDR1_DQ[21] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]
SKYLAKE_ULT_DDR3L_REV053F
AH66 AH65 AG69 AG70
AR66 AR65 AR61 AR60
AT38 AR38 AT32 AR32
AR25 AR27 AR22 AR21
DDR1_DQSN[0] DDR1_DQSP[0] DDR1_DQSN[1] DDR1_DQSP[1]
DDR1_DQSN[2] DDR1_DQSP[2] DDR1_DQSN[3] DDR1_DQSP[3]
DDR1_DQSN[4] DDR1_DQSP[4] DDR1_DQSN[5] DDR1_DQSP[5]
DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]
DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1]
DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]
DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0] DDR1_ODT[1]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR CH - B
3 OF 20
DDR1_MA[3] DDR1_MA[4]
DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR
DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]
AN45 AN46 AP45 AP46
AN56 AP55 AN55 AP53
BB42 AY42 BA42 AW42
AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52
BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47
AH66 AH65 AG69 AG70 AR66 AR65 AR61 AR60 AT38 AR38 AT32 AR32 AR25 AR27 AR22 AR21
AN43 AP43 AT13 AR18 AT18 AU18
InterleavePin Non-Interleave
DDR0_DQSN[2] DDR0_DQSP[2] DDR0_DQSN[3] DDR0_DQSP[3]
DDR0_DQSN[6] DDR0_DQSP[6] DDR0_DQSN[7] DDR0_DQSP[7]
DDR1_DQSN[2] DDR1_DQSP[2] DDR1_DQSN[3] DDR1_DQSP[3]
DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]
LOGIC
3
-M_B_DDRCLK0_1200M M_B_DDRCLK0_1200M
M_B_CKE0
-M_B_CS0 M_B_ODT0
M_B_A5 M_B_A9 M_B_A6 M_B_A8 M_B_A7
M_B_A12 M_B_A11
M_B_A13 M_B_A15 M_B_A14 M_B_A16
M_B_A2 M_B_A10
M_B_A1 M_B_A0 M_B_A3 M_B_A4
-M_A_DQS2 M_A_DQS2
-M_A_DQS3 M_A_DQS3
-M_A_DQS6 M_A_DQS6
-M_A_DQS7 M_A_DQS7
-M_B_DQS2 M_B_DQS2
-M_B_DQS3 M_B_DQS3
-M_B_DQS6 M_B_DQS6
-M_B_DQS7 M_B_DQS7
1 2
R7 200_1% 0603_1/20w
1 2
R84 80.6_1% 0603_1/20w
1 2
R576 100_1% 0603_1/20w
TABLE:
R7 200_1% 121_1%
-M_B_DDRCLK0_1200M 24,25 M_B_DDRCLK0_1200M 24,25
M_B_CKE0 24,25
-M_B_CS0 24,25 M_B_ODT0 24,25
M_B_BG0
-M_B_ACT M_B_BG1
M_B_BS0 M_B_BS1
VCC1R2A
R1726 470_5%
0603_1/20w
1 2
1 2
R3271 0_5% 0603_1/20w
SDP DDP
LOGIC
2
M_B_BG0 24,25
-M_B_ACT 24,25 M_B_BG1 24
M_B_BS0 24,25 M_B_BS1 24,25
M_B_A[16:0] 24,25
-M_A_DQS[7:0] 4,22 M_A_DQS[7:0] 4,22
-M_B_DQS[7:0] 4,24 M_B_DQS[7:0] 4,24
-M_B_ALERT M_B_PARITY
-DRAMRST
NA
C1063
0.1UF_6.3V
1 2
0603_X5R_K
TABLE
Pin
AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52
BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47
DDR1_MA[5] DDR1_MA[9] DDR1_MA[6] DDR1_MA[8] DDR1_MA[7] DDR1_BA[2] DDR1_MA[12] DDR1_MA[11] DDR1_MA[15] DDR1_MA[14]
DDR1_MA[13] DDR1_CAS# DDR1_WE# DDR1_RAS# DDR1_BA[0] DDR1_MA[2] DDR1_BA[1] DDR1_MA[10] DDR1_MA[1] DDR1_MA[0] DDR1_MA[3] DDR1_MA[4]
-M_B_ALERT 24,25 M_B_PARITY 24,25
-DRAMRST 22,24
DDR3L LPDDR3 DDR4
DDR1_CAA[0] DDR1_CAA[1] DDR1_CAA[2] DDR1_CAA[3] DDR1_CAA[4] DDR1_CAA[5] DDR1_CAA[6] DDR1_CAA[7] DDR1_CAA[8] DDR1_CAA[9]
DDR1_CAB[0] DDR1_CAB[1] DDR1_CAB[2] DDR1_CAB[3] DDR1_CAB[4] DDR1_CAB[5] DDR1_CAB[6] DDR1_CAB[7] DDR1_CAB[8] DDR1_CAB[9] Not Used Not Used
DDR1_MA[5] DDR1_MA[9] DDR1_MA[6] DDR1_MA[8] DDR1_MA[7] DDR1_BG[0] DDR1_MA[12] DDR1_MA[11] DDR1_ACT# DDR1_BG[1]
DDR1_MA[13] DDR1_MA[15] DDR1_MA[14] DDR1_MA[16] DDR1_BA[0] DDR1_MA[2] DDR1_BA[1] DDR1_MA[10] DDR1_MA[1] DDR1_MA[0] DDR1_MA[3] DDR1_MA[4]
LOGIC
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
Date: Sheet :
Title :
Title :
Title :
CPU(3/16) : DDR CHANNEL-B
CPU(3/16) : DDR CHANNEL-B
CPU(3/16) : DDR CHANNEL-B
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
591Thursday, December 21, 2017
591Thursday, December 21, 2017
591Thursday, December 21, 2017
5
D D
4
3
2
1
VCCSTG VCCSTVCCSTVCC3B
C C
PECI56
-PROCHOT56,70,72
-TBT_PLUG_EVENT31
-WWAN_DISABLE46
B B
PECI
-PROCHOT
-TBT_PLUG_EVENT
-WWAN_DISABLE
NA
R3316 10K_5%
0603_1/20w
1 2
R64 1K_5%
0603_1/20w
1 2
1 2
R85 510_5% 0603_1/20w
1 2
R2126 49.9_1% 0603_1/20w
1 2
R2127 49.9_1% 0603_1/20w
1 2
R2128 49.9_1% 0603_1/20w
1 2
R2129 49.9_1% 0603_1/20w
R3242
1K_5%
0603_1/20w
R9055 1K_5%
0603_1/20w
1 2
1 2
U58D
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
SKYLAKE_ULT_DDR3L_REV053F
CPU MISC
4 OF 20
JTAG
PROC_TCK
PROC_TDI PROC_TDO PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS
PCH_TRST#
JTAGX
B61 D60 A61 C60 B59
B56 D59 A56 C59 C61 A59
R2 51_5%
0603_1/20w
1 2
XDP_TCK0 XDP_TDI XDP_TDO XDP_TMS
-XDP_TRST
XDP_TCK0 19 XDP_TDI 19 XDP_TDO 19 XDP_TMS 19
-XDP_TRST 19
PCH_TCK 19
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(4/16) : MISC/JTAG
CPU(4/16) : MISC/JTAG
CPU(4/16) : MISC/JTAG
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
691Thursday, December 21, 2017
691Thursday, December 21, 2017
691Thursday, December 21, 2017
5
TABLE : Functional Strap
SPI0_MOSI (Boot Halt)
HIGH LOW
Disabled (Default) Enabled
4
3
2
1
TABLE : Functional Strap
SPI0_MISO (JTAG ODT Disable)
D D
HIGH LOW
Enabled (Default) Disabled
TABLE : Functional Strap
GPP_C5/SML0ALERT # (LPC or eSPI)
HIGH LOW
eSPI is selected LPC is selected (Default) LOGIC
TABLE : Functional Strap
GPP_C2/SMBALERT# (TLS Confidentiality)
HIGH
VCC3_SUSVCC3B
0603_1/20w
8.2K_5%
1 2
R860
SPI_CLK21,63
C C
SPI_MISO_IO121,63 SPI_MOSI_IO021,63 SPI_IO221 SPI_IO321
-SPI_CS021
-SPI_CS263
-NFC_DTCT59
CL_CLK_WLAN45 CL_DATA_WLAN45
-CL_RST_WLAN45
-KBRC55
IRQSER55,64
CL_CLK_WLAN
CL_DATA_WLAN
-CL_RST_WLAN
NA
R272 10K_5%
0603_1/20w
1 2
U58E
AV2
AW3
AV3
AW2
AU4 AU3 AU2 AU1
AW13
AY11
M2 M3
J4 V1 V2
M1
G3 G2 G1
SPI - FLASH
SPI0_CLK SPI0_MISO SPI0_MOSI SPI0_IO2 SPI0_IO3 SPI0_CS0# SPI0_CS1# SPI0_CS2#
SPI - TOUCH
GPP_D1/SPI1_CLK GPP_D2/SPI1_MISO GPP_D3/SPI1_MOSI GPP_D21/SPI1_IO2 GPP_D22/SPI1_IO3 GPP_D0/SPI1_CS#
C LINK
CL_CLK CL_DATA CL_RST#
GPP_A0/RCIN# GPP_A6/SERIRQ
SKYLAKE_ULT_DDR3L_REV053F
LOW
Enable ME Crypto TLS with Confidentiality Disable ME Crypto TLS (Default)
SMBUS, SMLINK
GPP_B23/SML1ALERT#/PCHHOT#
LPC
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
5 OF 20
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
VCC3_SUS
R7 R8 R10
R9 W2 W1
W3 V3 AM7
AY13 BA13 BB13 AY12 BA12 BA11
AW9 AY9 AW11
R226 1K_5%
0603_1/20w
1 2
LOGIC
LPCCLK_0 LPCCLK_1
R106 499_1%
0603_1/20w
1 2
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
R107 499_1%
0603_1/20w
1 2
1 2
R193 33_5%0603_1/20w
1 2
R220 0_5% 0603_1/20wNA
R394
4.7K_5%
0603_1/20w
1 2
R397
4.7K_5%
0603_1/20w
1 2
LPC_AD[3:0] 55,64
-LPC_FRAME 55,64
-SUS_STAT 55,64
LPCCLK_EC_24M 55 LPCCLK_DEBUG_24M 64
VCC3B
8.2K_5%
1 2
0603_1/20w
R28
SMB_CLK SMB_DATA
SML0_CLK SML0_DATA
EC_SCL2 EC_SDA2
SMB_CLK 64 SMB_DATA 64
SML0_CLK 41 SML0_DATA 41
EC_SCL2 56 EC_SDA2 56
-CLKRUN 55,64
NA
R2559 1K_5%
0603_1/20w
1 2
B B
TABLE : Functional Strap
SPI0_IO2 (Consent Strap)
HIGH LOW
Enabled (Default) Disabled
TABLE : Functional Strap
SPI0_IO3 (A0 Personality Strap)
HIGH LOW
A A
Disabled (Default) Enabled
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(5/16) : LPC/SPI/SMBUS/C-LINK
CPU(5/16) : LPC/SPI/SMBUS/C-LINK
CPU(5/16) : LPC/SPI/SMBUS/C-LINK
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
791Thursday, December 21, 2017
791Thursday, December 21, 2017
791Thursday, December 21, 2017
5
4
3
2
1
D D
NFC_DLREQ59
C C
TBT_FORCE_PWR31
-EC_SCI55
-EC_WAKE55
I2C0_DATA59 I2C0_CLK59
-WWAN_RESET46
-INT_MIC_DTCT27 WWAN_CFG046
WWAN_CFG146
10K_5%
1 2
VCC3_SUS
0603_1/20w
0603_1/20w
10K_5%
1 2
R884
R2340
-MIC_HW_EN
NA
1K_5%
1 2
TABLE : Functional Strap
GPP_B22/GSPI1_MOSI (Boot BIOS Destination)
HIGH LOW
TABLE : Functional Strap
0603_1/20w
GPP_B18/GSPI0_MOSI (No Reboot)
HIGH LOW
R65
U58F
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
SKYLAKE_ULT_DDR3L_REV053F
Boot BIOS from LPC Boot BIOS from SPI (Default) LOGIC
Enable "No Reboot" Mode Disable "No Reboot" Mode (Default)
LPSS ISH
GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#
SX_EXIT_HOLDOFF#/GPP_A12/BM_BUSY#/ISH_GP6
6 OF 20
GPP_D15/ISH_UART0_RTS#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5
GPP_D9 GPP_D10 GPP_D11 GPP_D12
P2 P3 P4 P1
M4 N3
N1 N2
AD11 AD12
U1 U2 U3 U4
AC1 AC2 AC3 AB4
AY8 BA8 BB7 BA7 AY7 AW7 AP13
WWAN_CFG2 46 WWAN_CFG3 46
R961 0_5%
0603_1/20w
B B
A A
1 2
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(6/16) : LPSS/ISH
CPU(6/16) : LPSS/ISH
CPU(6/16) : LPSS/ISH
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
891Thursday, December 21, 2017
891Thursday, December 21, 2017
891Thursday, December 21, 2017
5
D D
VCC3_SUS
4
3
2
1
PLACE ON BOTTOM SIDE
1K_5%
1 2
R846
0603_1/20w
NA
R1009 1K_5%
0603_1/20w
1 2
VCC3_SUS
TP901 TESTPAD_1P0
TEST PAD BOTTOM SIDE DO NOT MOVE AFTER FIX
VCC3_SUS
1 2
HDA_SYNC49 HDA_BCLK49
HDA_SDO49
HDA_SDIN049
C C
NFC_ACTIVE59
DDI_PRIORITY28
PCH_SPKR54
PCH_SPKR
R423 33_5% 0603_1/20w
1 2
R60 33_5% 0603_1/20w
1 2
R74 33_5% 0603_1/20w
1 2
R3130 0_5% 0603_1/20w NA
1
NA
1 2
R566
0_5%
1608_1/10w
TP900 TESTPAD_1P0
1
TABLE : Functional Strap
HDA_SDO/I2S0_TXD Flash Descriptor Security Override
HIGH LOW
U58G
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
AW22
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
AW20
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
SKYLAKE_ULT_DDR3L_REV053F
Disable Flash Descriptor Security (Override) Enable Flash Descriptor Security (Default)
AUDIO
7 OF 20
SDIO/SDXC
GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
AB11 AB13 AB12 W12 W11 W10 W8 W7
BA9 BB9
AB7
AF13
R2131
200_1%
1 2
0603_1/20w
TBT_RTD3_PWR_EN 31 TBT_FORCE_USB_PWR 31
-TBT_PERST 31
-TBT_PCIE_WAKE 31
-SC_DTCT 60
C38 22PF_25V
0603_C0G_J
1 2
TABLE : Functional Strap
GPP_B14/SPKR (Top Swap Override)
HIGH LOW
B B
Enable "Top Swap" Mode Disable "Top Swap" Mode (Default) LOGIC
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(7/16) : AUDIO/SDXC
CPU(7/16) : AUDIO/SDXC
CPU(7/16) : AUDIO/SDXC
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
991Thursday, December 21, 2017
991Thursday, December 21, 2017
991Thursday, December 21, 2017
5
4
3
2
1
PCIe Port Assignment
Flexible I/O Configuration
I/O High Speed Signals Configuration Net Name Port 1 Port 2 Port 3 Port 4 Port 5
D D
Port 6 Port 7 Port 8 Port 9 Port 10 Port 11 Port 12 Port 13 Port 14 Port 15 Port 16
C C
B B
USB3 1 USB3 2/SSIC USB3 3 USB3 4 USB3 5/PCIE 1 USB3 6/PCIE 2 PCIE 3 (GbE) PCIE 4 (GbE) PCIE 5 (GbE) PCIE 6 PCIE 7/SATA 0 PCIE 8/SATA 1A PCIE 9 (GbE) PCIE 9 PCIE 10 (GbE) PCIE 10 PCIE 11/SATA 1B PCIE 12/SATA 2
USB3 1 USB3 2 USB3 3 USB3P2 USB3 4 PCIE 1 PCIE 2 PCIE 3 PCIE 4 (GbE) PCIE 5 (x4) PCIE 6 (x4) PCIE 7 (x4) GPIO STRAP
PCIE 11 PCIE 12
PCIE0_L0_RXN31 PCIE0_L0_RXP31 PCIE0_L0_TXN31 PCIE0_L0_TXP31
PCIE0_L1_RXN31 PCIE0_L1_RXP31 PCIE0_L1_TXN31 PCIE0_L1_TXP31
PCIE2_RXN45 PCIE2_RXP45 PCIE2_TXN45 PCIE2_TXP45
PCIE3_RXN41 PCIE3_RXP41 PCIE3_TXN41 PCIE3_TXP41
PCIE4_L3_RXN38 PCIE4_L3_RXP38 PCIE4_L3_TXN38 PCIE4_L3_TXP38
PCIE4_L2_RXN38 PCIE4_L2_RXP38 PCIE4_L2_TXN38 PCIE4_L2_TXP38
PCIE4_L1_RXN38 PCIE4_L1_RXP38 PCIE4_L1_TXN38 PCIE4_L1_TXP38
PCIE4_L0_SATA1_RXN38 PCIE4_L0_SATA1_RXP38 PCIE4_L0_SATA1_TXN38 PCIE4_L0_SATA1_TXP38
-XDP_PRDY19
-XDP_PREQ19
-TPM_IRQ63
PCIE11_RXN46 PCIE11_RXP46 PCIE11_TXN46 PCIE11_TXP46
USB3P0 USB3P1
USB3P3 PCIE0_L0 PCIE0_L1 PCIE2 PCIE3 PCIE4_L3 PCIE4_L2 PCIE4_L1 PCIE4_L0_SATA1 N/A N/A N/A PCIE11
-XDP_PRDY
-XDP_PREQ
-TPM_IRQ
VCC3_SUS
R2341 10K_5%
0603_1/20w
1 2
R8964
100_1%
1 2
Thunderbolt
0(x2) 2
M.2 WLAN Slot Port 0
3
GbE PHY PCIe SSD
4
M.2 WWAN Slot
11
0603_1/20w
U58H
PCIE/USB3/SATA
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
SKYLAKE_ULT_DDR3L_REV053F
SATA Port Assignment
0
(PCIE 7) SATA SSD
1A
(PCIE 11)
1B 2
(PCIE 12)
8 OF 20
SSIC / USB3
USB3_1_RXN USB3_1_RXP USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN USB3_4_RXP USB3_4_TXN
USB3_4_TXP
USB2
USB2_COMP
USB2_VBUSSENSE
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#
USB2N_1 USB2P_1
USB2N_2 USB2P_2
USB2N_3 USB2P_3
USB2N_4 USB2P_4
USB2N_5 USB2P_5
USB2N_6 USB2P_6
USB2N_7 USB2P_7
USB2N_8 USB2P_8
USB2N_9 USB2P_9
USB2N_10 USB2P_10
USB2_ID
H8 G8 C13 D13
J6 H6 B13 A13
J10 H10 B15 A15
E10 F10 C15 D15
AB9 AB10
AD6 AD7
AH3 AJ3
AD9 AD10
AJ1 AJ2
AF6 AF7
AH1 AH2
AF8 AF9
AG1 AG2
AH7 AH8
AB6 AG3 AG4
A9 C9 D9 B9
J1 J2 J3
H2 H3 G4
H1
USBCOMP
10K_5%
VCC3_SUS
0603_1/20w
1 2
R648
0603_1/20w
10K_5%
1 2
R3174
1 2
R564 113_1% 0603_1/20w
1 2
R2573 0_5% 0603_1/20w
1 2
R2580 1K_5% 0603_1/20w
R3315 10K_5%
0603_1/20w
1 2
USB3P0_RXN 39 USB3P0_RXP 39 USB3P0_TXN 39 USB3P0_TXP 39
USB3P1_RXN 39 USB3P1_RXP 39 USB3P1_TXN 39 USB3P1_TXP 39
USB3P2_RXN 47 USB3P2_RXP 47 USB3P2_TXN 47 USB3P2_TXP 47
USB3P3_RXN 29 USB3P3_RXP 29 USB3P3_TXN 29 USB3P3_TXP 29
USBP0- 39 USBP0+ 39
USBP1- 39 USBP1+ 39
USBP2- 60 USBP2+ 60
USBP3- 36 USBP3+ 36
USBP4- 27 USBP4+ 27
USBP5- 46 USBP5+ 46
USBP6- 45 USBP6+ 45
USBP7- 27 USBP7+ 27
USBP8- 60 USBP8+ 60
USBP9- 26 USBP9+ 26
-USB_PORT0_OC0 39
-USB_PORT1_OC1 39 NFC_INT 59
VCC3_SUS
0603_1/20w
10K_5%
1 2
R44
USB Port Assignment
0
USB 3.0 System Port (AOU)
1
USB 3.0 System Port
2
Smart Card Reader
3
USB Type-C
4
IR Camera M.2 WWAN Slot
5 6
M.2 WLAN Slot (Bluetooth)
7
RGB Camera
8
Fingerprint Reader
9
Touch Panel
USB 3.0 Port Assignment
0
USB 3.0 System Port (AOU)
1
USB 3.0 System Port
2
Media Card Controller
3
USB Type-C 4 (PCIE 1) 5
(PCIE 2)
BDC_ON
-SATA1_DTCT
NFC_ON 59 SATA1_DEVSLP 38
BDC_ON 45
-SATA1_DTCT 38
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(8/16) : PCIE/USB/SATA
CPU(8/16) : PCIE/USB/SATA
CPU(8/16) : PCIE/USB/SATA
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
10 91Thursday, December 21, 2017
10 91Thursday, December 21, 2017
10 91Thursday, December 21, 2017
5
D D
C C
4
U58I
CSI-2
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
SKYLAKE_ULT_DDR3L_REV053F
9 OF 20
3
CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKN1 CSI2_CLKP1 CSI2_CLKN2 CSI2_CLKP2 CSI2_CLKN3 CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
C37 D37 C32 D32 C29 D29 B26 A26
E13 B7
AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1
AM2 AM3 AP4
AT1
PLANARID1 PLANARID2 PLANARID3 MEMORYID0 MEMORYID1 MEMORYID2 MEMORYID3 MEMORYID4
PLANARID0
-TAMPER_SW_DTCT
2
-TAMPER_SW_DTCT 13
1
B B
TABLE LEVEL
PLANAR ID
0123
R43 R47 R113 R48
TABLE: MEMORYID
MEMORYID[4:0]
Vendor
00h (00000b) 01h (00001b) 02h (00010b) 03h (00011b)
Micron
04h (00100b) 05h (00101b) 06h (00110b) 07h (00111b) 08h (01000b)
A A
09h (01001b) 0Ah (01010b) 0Bh (01011b) 0Ch (01100b)
Samsung
SK hynix
0Dh (01101b) 0Eh (01110b) 0Fh (01111b)
Micron
5
U125, U126, U127, U128, U129, U130, U131,U132
Part Number Component Qty Channel-0 Channel-1 Total
MT40A256M16GE-083E:B MT40A512M16JY-083E:B
MT40A512M16JY-083E:B MT40A512M16LY-075:H MT40A512M16LY-075:H MT40A1G16WBU-083E:B K4A4G165WE-BCRC K4A8G165WC-BCRC K4A8G165WC-BCRC K4AAG165WB-MCRC H5AN4G6NAFR-UHC H5AN8G6NAFR-UHC H5AN8G6NAFR-UHC H5ANAG6NAMR-UHC MT40A512M16LY-075:E MT40A512M16LY-075:E
4Gbit SDP 8pcs 8Gbit SDP 8Gbit SDP 8Gbit SDP 8Gbit SDP 16Gbit DDP 4Gbit SDP 8Gbit SDP 8Gbit SDP 16Gbit DDP 4Gbit SDP 8Gbit SDP 8Gbit SDP 16Gbit DDP 8Gbit SDP 8Gbit SDP
4pcs 8pcs 4pcs 8pcs 8pcs 8pcs 4pcs 8pcs 8pcs 8pcs 4pcs 8pcs 8pcs 4pcs 8pcs
2GB 4GB 4GB 4GB 4GB 8GB 2GB 4GB 4GB 8GB 2GB 4GB 4GB 8GB 4GB 4GB
4
Capacity
2GB 0GB 4GB 0GB 4GB 8GB 2GB 0GB 4GB 8GB 2GB 0GB 4GB 8GB 0GB 4GB
4GB 4GB 8GB 4GB 8GB 16GB 4GB 4GB 8GB 16GB 4GB 4GB 8GB 16GB 4GB 8GB
R2753 0_5%
0603_1/20w
1 2
R2754 0_5%
0603_1/20w
1 2
1 2
3
R2755 0_5%
0603_1/20w
R2756 0_5%
0603_1/20w
1 2
R2757 0_5%
0603_1/20w
1 2
MEMORYID0 MEMORYID1 MEMORYID2 MEMORYID3 MEMORYID4
R43 0_5%
0603_1/20w
1 2
1 2
2
NA
R47 0_5%
0603_1/20w
R113 0_5%
0603_1/20w
1 2
R48 0_5%
0603_1/20w
1 2
PLANARID0 PLANARID1 PLANARID2 PLANARID3
Size :
Size :
Size :
1NA 0
NA NA NA
ASM ASM ASM ASM
TABLE
LEVEL
PLANARID[3..0]
EVT 0000B
ME-FVT
0001B FVT 0010B SIT 0011B SVT 0100B
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
C
Date: Sheet :
Date: Sheet :
Date: Sheet :
Title :
Title :
Title :
CPU(9/16) : CSI-2/EMMC
CPU(9/16) : CSI-2/EMMC
CPU(9/16) : CSI-2/EMMC
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
11 91Thursday, December 21, 2017
11 91Thursday, December 21, 2017
11 91Thursday, December 21, 2017
5
D D
4
3
VCC1R0_SUS
2
1
C C
-PCIE0_CLK_100M31 PCIE0_CLK_100M31
-CLKREQ_PCIE031
-PCIE2_CLK_100M45 PCIE2_CLK_100M45
-CLKREQ_PCIE245
-PCIE3_CLK_100M41 PCIE3_CLK_100M41
-CLKREQ_PCIE341
-PCIE4_CLK_100M38 PCIE4_CLK_100M38
-CLKREQ_PCIE438
-PCIE11_CLK_100M46 PCIE11_CLK_100M46
-CLKREQ_PCIE1146
U58J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKYLAKE_ULT_DDR3L_REV053F
CLOCK SIGNALS
10 OF 20
CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTCX1 RTCX2
SRTCRST#
RTCRST#
F43 E43
BA17 E37
E35 E42 AM18
AM20 AN18
AM16
R609
2.71K_0.5%
1005_1/16w
1 2
RTCX1 RTCX2
-SRTCRST 20
-RTCRST 17,20
SUSCLK_32K 45,55
R351 10M_5%
0603_1/20w
1 2
R308 1M_1%
0603_1/20w
1 2
Y6 9H03280012
1 2
0_5%
1 2
R133
6PF_25V
1 2
C348
6PF_25V
1 2
C326
0603_1/20w
0603_C0G_D
0603_C0G_D
C205 6PF_25V
0603_C0G_D
1 2
Y5
4 3 1 2
1ZZHAE24000CC0G
24MHz 8pF 30ppm 2016 KDS 1ZZHAE24000CC0G TXC 7R24080003 EPSON Q22FA1280055800
C206 6PF_25V
0603_C0G_D
1 2
32.768kHz 9pF 20ppm 3215 TXC 9H03280012
B B
KDS 1TJF090DJ1A000B EPSON X1A000141000200
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(10/16) : CLOCK SIGNALS
CPU(10/16) : CLOCK SIGNALS
CPU(10/16) : CLOCK SIGNALS
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
12 91Thursday, December 21, 2017
12 91Thursday, December 21, 2017
12 91Thursday, December 21, 2017
5
4
3
2
1
U73
VCC
GND
IN
-SUSWARN
VCC3M
5 2
-PLTRST
3
NA
C3249
1 2
VCC3M
10K_5%
1 2
NA
0603_1/20w
R614
-PCH_SLP_S0 17,72,79
-PCH_SLP_S3 17,31,56,65,66
-PCH_SLP_S4 17,56,65,80
-PCH_SLP_S5 17,65
-PCH_SLP_SUS 56
-PCH_SLP_LAN 65
-PCH_SLP_WLAN 56
-PCH_SLP_M 17,65
-PWRSW_EC 56
AC_PRESENT 56
-BATLOW 31,57
1
CPU_PWRGD VCCST_PWRGD
1 2
R21 0_5% 0603_1/20w
1 2
R617 0_5% 0603_1/20w
1 2
R203 0_5% 0603_1/20w
1 2
R1884 0_5% 0603_1/20w
U58K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKYLAKE_ULT_DDR3L_REV053F
11 OF 20
GPP_B12/SLP_S0#
GPD4/SLP_S3# GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS# SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_A11/PME#
INTRUDER#
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#
AT11 AP15 BA16 AY16
AN15 AW15 BB17 AN16
BA15 AY15 AU13
AU11 AP16
AM10 AM11
0603_1/20w
-INTRUDER
1000PF_25V
0603_X7R_K
R646
1M_5%
RTCVCC
NA
C7
1 2
1 2
0.1UF_6.3V
0603_X5R_K
33_5%
C460 100PF_25V
0603_C0G_J
1 2
R991
0603_1/20w
R993
C46 100PF_25V
0603_C0G_J
1 2
33_5%
1 2
0603_1/20w
4 1
OUT NC
TC7SZ17FE
D D
-PLTRST_NEAR38,46,63,64
-PLTRST_FAR31,41,45,55,65
1 2
C C
VCC3MVCC3M
0603_1/20w
4.7K_5%
1 2
R19
-XDP_DBR17,19
-RSMRST19,65
BPWRG56,59,64,66
CPUCORE_PWRGD72
MPWRG66
-PCIE_WAKE31,45,46,65
-LANWAKE41 LANPHYPC41
B B
MPWRG
0603_1/20w
1K_5%
1 2
R612
TP160 TESTPAD_0P5
-TAMPER_SW_DTCT11
-TAMPER_SW_DTCT
43
12
6
S3
5
1 2
R10 0_5% 0603_1/20w
SPVR310100
VCC3_SUS VCC1R0_SUS
R2324 10K_5%
0603_1/20w
1 2
R2325 10K_5%
0603_1/20w
1 2
VCCST_PWRGD
32
Q194
A A
CPUCORE_ON65,72
5
CPUCORE_ON
1
LSK3541G1E
4
32
Q195
1
LSK3541G1E
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(11/16) : SYSTEM PM
CPU(11/16) : SYSTEM PM
CPU(11/16) : SYSTEM PM
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
13 91Thursday, December 21, 2017
13 91Thursday, December 21, 2017
13 91Thursday, December 21, 2017
5
4
3
2
1
VCCCPUCORE
D D
0603_X5R_M
0603_X5R_M
C3324
0603_X5R_M
1UF_6.3V
1UF_6.3V
1 2
1 2
C3325
0603_X5R_M
0603_X5R_M
1UF_6.3V
1 2
C3321
1UF_6.3V
1UF_6.3V
1 2
C3322
1UF_6.3V
1 2
1 2
C3323
0603_X5R_M
C3326
0603_X5R_M
1UF_6.3V
1UF_6.3V
1 2
1 2
C3327
0603_X5R_M
C3328
0603_X5R_M
C3329
0603_X5R_M
1UF_6.3V
1 2
C3330
RJ200 SHORT1608_30MIL
1 2
VCCSTG_CPUVCCSTG
1UF_6.3V
1 2
VCCCPUCORE
VCCCPUCORE
U58L
A30
VCC_A30
A34
VCC_A34
A39
VCC_A39
A44
VCC_A44
AK33
C C
0603_X5R_M
0603_X5R_M
0603_X5R_M
C3333
0603_X5R_M
1UF_6.3V
1UF_6.3V
1 2
1 2
C3334
1UF_6.3V
1UF_6.3V
1 2
C3331
1UF_6.3V
1 2
1 2
C3332
0603_X5R_M
C3335
0603_X5R_M
0603_X5R_M
0603_X5R_M
0603_X5R_M
C3339
0603_X5R_M
1UF_6.3V
1 2
C3340
1UF_6.3V
1UF_6.3V
1UF_6.3V
1 2
1 2
C3336
C3337
1UF_6.3V
1 2
1 2
C3338
VCCCPUCORE
0603_X5R_M
C3345
0603_X5R_M
0603_X5R_M
C3347
0603_X5R_M
1UF_6.3V
1UF_6.3V
1 2
1 2
C3348
1UF_6.3V
1UF_6.3V
1 2
1 2
C3346
0603_X5R_M
0603_X5R_M
0603_X5R_M
0603_X5R_M
1UF_6.3V
1UF_6.3V
1 2
C3341
B B
1UF_6.3V
1 2
1 2
C3342
C3343
1UF_6.3V
1UF_6.3V
1 2
1 2
C3344
0603_X5R_M
C3349
0603_X5R_M
C3350
0603_X5R_M
1UF_6.3V
1 2
C3351
1UF_6.3V
1 2
AK35 AK37 AK38 AK40 AL33 AL37
AL40 AM32 AM33 AM35 AM37 AM38
G30
K32 AK32 AB62
P62
V62
H63
G61 AC63
AE63 AE62
AG62 AL63
AJ62
VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30
RSVD_K32 RSVD_AK32 VCCOPC_AB62
VCCOPC_P62 VCCOPC_V62
VCC_OPC_1P8_H63 VCC_OPC_1P8_G61 VCCOPC_SENSE
VSSOPC_SENSE VCCEOPIO_1
VCCEOPIO_2 VCCEOPIO_SENSE
VSSEOPIO_SENSE
CPU POWER 1 OF 4
SKYLAKE_ULT_DDR3L_REV053F
12 OF 20
VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42
VCC_J30 VCC_J33 VCC_J37 VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43
E32 E33
B63 A63 D64
G20
VCCCPUCORE
VCCSTG_CPU
VCCCPUCORE
R9 100_5%
0603_1/20w
1 2
R70 100_5%
0603_1/20w
1 2
1 2
R781
220_5%
0603_1/20w
56_5%
1 2
0603_1/20w
R374
VCCST
100_5%
1 2
0603_1/20w
R2576
VCC_SENSE
VSS_SENSE
-SVID_ALERT SVID_CLK
SVID_DATA
VCC_SENSE 72 VSS_SENSE 72
-SVID_ALERT 72 SVID_CLK 72 SVID_DATA 72
VCCCPUCORE
1608_X5R_M
C3354
1608_X5R_M
1 2
22UF_6.3V
1 2
22UF_6.3V
C3355
1608_X5R_M
1608_X5R_M
1 2
C3353
1 2
22UF_6.3V
1 2
22UF_6.3V
22UF_6.3V
C3352
A A
5
1608_X5R_M
C3356
1608_X5R_M
1 2
22UF_6.3V
1 2
22UF_6.3V
C3357
1608_X5R_M
C3358
1608_X5R_M
1 2
22UF_6.3V
C3429
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(12/16) : CPU POWER (1/2)
CPU(12/16) : CPU POWER (1/2)
CPU(12/16) : CPU POWER (1/2)
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
14 91Thursday, December 21, 2017
14 91Thursday, December 21, 2017
14 91Thursday, December 21, 2017
5
VCCCPUCORE_GT
0603_X5R_M
0603_X5R_M
0603_X5R_M
0603_X5R_M
C3362
0603_X5R_M
1UF_6.3V
1 2
C3363
1UF_6.3V
1UF_6.3V
1UF_6.3V
1 2
D D
C3359
1 2
C3360
1UF_6.3V
1 2
1 2
C3361
4
VCCST_CPUVCCST
RJ201 SHORT1608_30MIL
1 2
3
VCCPLL
VCCST_CPU VCCSTG_CPU VCCST_CPU VCC1R2A VCC1R2A
0603_X5R_M
1UF_6.3V
1 2
C2422
0603_X5R_M
1UF_6.3V
1 2
C2423
0603_X5R_M
1UF_6.3V
1 2
C2424
VCC1R2A VCC1R2A
1005_X5R_M
1005_X5R_M
1 2
1 2
10UF_6.3V
10UF_6.3V
C3122
C1184
1 2
10UF_6.3V
1005_X5R_M
C1829
2
1
VDDQC VCCPLL_OC
1005_X5R_M
C1830
1005_X5R_M
1 2
10UF_6.3V
C1831
1 2
22UF_6.3V
1 2
10UF_6.3V
1608_X5R_M
C3123
1608_X5R_M
1 2
22UF_6.3V
1 2
22UF_6.3V
C840
1608_X5R_M
1608_X5R_M
1 2
22UF_6.3V
C844
C842
1005_X5R_M
1 2
10UF_6.3V
C2426
1UF_6.3V
1 2
0603_X5R_M
C2427
0603_X5R_M
C3373
VCCGFXCORE_I
0603_X5R_M
1UF_6.3V
1 2
C3374
U58M
CPU POWER 2 OF 4
A48
VCCGT_1
A53
VCCGT_2
A58
VCCGT_3
A62
VCCGT_4
A66
VCCGT_5
AA63
VCCGT_6
AA64
VCCGT_7
AA66
VCCGT_8
AA67
VCCGT_9
AA69
VCCGT_10
AA70
VCCGT_11
AA71
VCCGT_12
AC64
VCCGT_13
AC65
VCCGT_14
AC66
VCCGT_15
AC67
VCCGT_16
AC68
VCCGT_17
AC69
VCCGT_18
AC70
VCCGT_19
AC71
VCCGT_20
J43
VCCGT_21
J45
VCCGT_22
J46
VCCGT_23
J48
VCCGT_24
J50
VCCGT_25
J52
VCCGT_26
J53
VCCGT_27
J55
VCCGT_28
J56
VCCGT_29
J58
VCCGT_30
J60
VCCGT_31
K48
VCCGT_32
K50
VCCGT_33
K52
VCCGT_34
K53
VCCGT_35
K55
VCCGT_36
K56
VCCGT_37
K58
VCCGT_38
K60
VCCGT_39
L62
VCCGT_40
L63
VCCGT_41
L64
VCCGT_42
L65
VCCGT_43
L66
VCCGT_44
L67
VCCGT_45
L68
VCCGT_46
L69
VCCGT_47
L70
VCCGT_48
L71
VCCGT_49
M62
VCCGT_50
N63
VCCGT_51
N64
VCCGT_52
N66
VCCGT_53
N67
VCCGT_54
N69
VCCGT_55
J70
VCCGT_SENSE
J69
VSSGT_SENSE
SKYLAKE_ULT_DDR3L_REV053F
0603_X5R_M
0603_X5R_M
C3376
0603_X5R_M
1UF_6.3V
1 2
C3377
1UF_6.3V
1UF_6.3V
1 2
1 2
C3375
1005_X5R_M
1 2
10UF_6.3V
C3378
13 OF 20
10UF_6.3V
VCCGT_56 VCCGT_57 VCCGT_58 VCCGT_59 VCCGT_60 VCCGT_61 VCCGT_62 VCCGT_63 VCCGT_64 VCCGT_65 VCCGT_66 VCCGT_67 VCCGT_68 VCCGT_69 VCCGT_70 VCCGT_71 VCCGT_72 VCCGT_73 VCCGT_74 VCCGT_75 VCCGT_76 VCCGT_77 VCCGT_78 VCCGT_79 VCCGT_80
VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70 VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56
VCCGTX_AL60 VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58 VCCGTX_AU58 VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE VSSGTX_SENSE
1005_X5R_M
1 2
C3379
N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62
AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66
AK62 AL61
1005_X5R_M
1 2
C3380
1 2
10UF_6.3V
10UF_6.3V
VCCCPUCORE
VCCGFXCORE_I
NA
R3274
R3275
0.0002_MAX
1 2
0.0002_MAX
1 2
VCCCPUCORE_GT
2125
2125
TABLE R3274, R3275
KOA : TLRZ2ATTD TA-I : RLM10JTSR000L YAGEO : PA0805-R-470RL
C C
VCCGFXCORE_I
0_5%
1 2
R3276
B B
0603_X5R_M
C3367
VCCGT_SENSE VSSGT_SENSE
1UF_6.3V
1 2
0603_X5R_M
C3368
0603_X5R_M
1UF_6.3V
1UF_6.3V
1 2
1 2
C3369
VCCGT_SENSE72 VSSGT_SENSE72
VCCGFXCORE_I VCCGFXCORE_I
0603_X5R_M
0603_X5R_M
0603_X5R_M
1UF_6.3V
1UF_6.3V
1 2
A A
C3364
1 2
C3365
1UF_6.3V
1UF_6.3V
1 2
1 2
C3366
VCCGFXCORE_I
1 2
1 2
0603_X5R_M
1UF_6.3V
1 2
C3370
1005_1/16w
R2152 100_5%
0603_1/20w
R2153 100_5%
0603_1/20w
0603_X5R_M
1UF_6.3V
C3371
0603_X5R_M
1UF_6.3V
1 2
1 2
C3372
1005_X5R_M
C3381
1 2
10UF_6.3V
VCCGFXCORE_I
1005_X5R_M
1005_X5R_M
1 2
10UF_6.3V
C3382
C3383
VCCCPUCORE
1005_X5R_M
1 2
10UF_6.3V
C3384
VCCCPUIO
VCC1R2A VCCCPUIO
0603_X5R_M
U58N
AU23 AU28 AU35 AU42 BB23 BB32 BB41
VCCST_CPUVCCSTG_CPU
BB47 BB51
AM40
AL23
CPU POWER 3 OF 4
VDDQ_AU23 VDDQ_AU28 VDDQ_AU35 VDDQ_AU42 VDDQ_BB23 VDDQ_BB32 VDDQ_BB41 VDDQ_BB47 VDDQ_BB51
VDDQC
A18
VCCST
A22
VCCSTG_A22 VCCPLL_OC
K20
VCCPLL_K20
K21
VCCPLL_K21
SKYLAKE_ULT_DDR3L_REV053F
14 OF 20
VCCIO_1 VCCIO_2 VCCIO_3 VCCIO_4 VCCIO_5 VCCIO_6 VCCIO_7
VCCSA_1 VCCSA_2 VCCSA_3 VCCSA_4 VCCSA_5 VCCSA_6 VCCSA_7 VCCSA_8
VCCSA_9 VCCSA_10 VCCSA_11 VCCSA_12 VCCSA_13 VCCSA_14
VCCIO_SENSE VSSIO_SENSE
VSSSA_SENSE VCCSA_SENSE
AK28 AK30 AL30 AL42 AM28 AM30 AM42
AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30
AM23 AM22
H21 H20
VCCSA
1 2
VCCCPUIO
R2291 100_5%
0603_1/20w
R2290 100_5%
0603_1/20w
1 2
R2155 100_5%
0603_1/20w
1 2
VCCSA
1 2
VCCSA
R2154 100_5%
0603_1/20w
1UF_6.3V
1 2
1UF_6.3V
1 2
C3115
VSSSA_SENSE VCCSA_SENSE
0603_X5R_M
C3116
1UF_6.3V
1 2
0603_X5R_M
0603_X5R_M
1UF_6.3V
1 2
C3118
C3117
VSSSA_SENSE 72 VCCSA_SENSE 72
TABLE
Logic
Page 12
Page 18
Page 15
1005_X5R_M
1005_X5R_M
1005_X5R_M
1005_X5R_M
C3388
1005_X5R_M
1 2
10UF_6.3V
C3389
1 2
1 2
1 2
C3387
1 2
10UF_6.3V
10UF_6.3V
10UF_6.3V
10UF_6.3V
C3385
C3386
Ref Des
Y5 R133 R308 C205 C206
Y10 R3272 R3273 C3284 C3285
R3274 R3275 ASM R3276
KBL-R U42
NO_ASM NO_ASM NO_ASM NO_ASM NO_ASM
ASM ASM ASM ASM ASM
ASM NO_ASM NO_ASM
KBL U22 ASM
ASM ASM ASM ASM
NO_ASM NO_ASM NO_ASM NO_ASM NO_ASM
NO_ASM
ASM
LOGIC
1UF_6.3V
1 2
VCCSA
1 2
10UF_6.3V
1005_X5R_M
C3288
0603_X5R_M
C3390
0603_X5R_M
0603_X5R_M
0603_X5R_M
0603_X5R_M
0603_X5R_M
C3395
1005_X5R_M
C3400
0603_X5R_M
1UF_6.3V
1 2
C3396
1005_X5R_M
1 2
10UF_6.3V
C3401
1UF_6.3V
1UF_6.3V
1UF_6.3V
1UF_6.3V
1 2
1 2
1 2
C3391
C3392
C3393
1005_X5R_M
1 2
C3289
1 2
10UF_6.3V
10UF_6.3V
1005_X5R_M
C3397
1005_X5R_M
1 2
10UF_6.3V
C3399
1UF_6.3V
1 2
1 2
C3394
1005_X5R_M
1 2
C3398
1 2
10UF_6.3V
10UF_6.3V
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(13/16) : CPU POWER (2/2)
CPU(13/16) : CPU POWER (2/2)
CPU(13/16) : CPU POWER (2/2)
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
15 91Thursday, December 21, 2017
15 91Thursday, December 21, 2017
15 91Thursday, December 21, 2017
5
4
3
2
1
VCC3M VCC3M_PCH
RJ202 SHORT1608_30MIL
1 2
VCC1R0_SUS VCC1R0_SUS_PRIM
RJ203 SHORT1608_30MIL
1 2
D D
VCCMPHY_GATE VCCMPHY_GATE_OUT
RJ204 SHORT1608_30MIL
1 2
VCCPCHCORE
VCC1R0_SUS
VCCMPHY_GATE
RJ205 SHORT1608_30MIL
1 2
C C
VCC1R0_SUS
C3236
0.1UF_6.3V
0603_X5R_K
1 2
NA
C2447 22UF_6.3V
1608_X5R_M
1 2
NA
R3203 FL83 MMZ0603AFY560V
1 2
1 2
NEAR V15
VCCMPHY_GATE_PLL
NA
C2446 22UF_6.3V
1608_X5R_M
0_5%
0603_1/20w
21
C2655
0.1UF_6.3V
0603_X5R_K
1 2
NEAR V15NEAR V15
VCC3_SUS
NA
R3204
C620 1UF_6.3V
0603_X5R_M
1 2
FL84
MMZ0603AFY560V
1 2
0603_1/20w
VCCMPHY_GATE_OUT
VCC3M_PCH
21
0_5%
NEAR AJ19
C3237
0.1UF_6.3V
0603_X5R_K
B B
1 2
C3238
0.1UF_6.3V
0603_X5R_K
1 2
NEAR AJ19NEAR AJ19
RJ206 SHORT1608_30MIL
1 2
U58O
AB19
VCCPRIM_1P0_1
AB20
VCCPRIM_1P0_2
P18
VCCPRIM_1P0_3
AF18
VCCPRIM_CORE1
AF19
VCCPRIM_CORE2
V20
VCCPRIM_CORE3
V21
VCCPRIM_CORE4
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0_1
L1
VCCMPHYAON_1P0_2
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0_1
L15
VCCAMPHYPLL_1P0_2
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0_1
AF21
VCCSRAM_1P0_2
T19
VCCSRAM_1P0_3
T20
VCCSRAM_1P0_4
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB_1P0
SKYLAKE_ULT_DDR3L_REV053F
VCCMPHY_GATEVCC1R0_SUS
CPU POWER 4 OF 4
15 OF 20
VCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE VCCPGPPF VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19 VCCRTC_BB14
DCPRTC VCCCLK1 VCCCLK2 VCCCLK3 VCCCLK4 VCCCLK5 VCCCLK6
GPP_B0/CORE_VID0 GPP_B1/CORE_VID1
VCC3_SUS VCC1R8_SUS VCC1R0_SUS VCCPCHCORE
C2428 22UF_6.3V
1608_X5R_M
1 2
AK15 AG15 Y16 Y15 T16 AF16 AD15
V19 T1 AA1 AK17 AK19
BB14 BB10 A14 K19 L21 N20 L19 A10 AN11
AN13
C2885 22UF_6.3V
1608_X5R_M
1 2
VCC1R8_SUS
C2429 22UF_6.3V
1608_X5R_M
1 2
VCC1R0_SUS_PRIM
VCC1R0_SUS
1 2
1 2
C795
0.1UF_6.3V
0603_X5R_K
C2886 22UF_6.3V
1608_X5R_M
C763
0.1UF_6.3V
0603_X5R_K
1 2
C2430 22UF_6.3V
1608_X5R_M
1 2
C2900
0.1UF_6.3V
0603_X5R_K
1 2
VCC3_SUSVCC3_SUSVCC1R0_SUS_PRIM
C380 1UF_6.3V
0603_X5R_M
1 2
C2887 22UF_6.3V
1608_X5R_M
1 2
RTCVCC
1 2
C731 1UF_6.3V
0603_X5R_M
C2431 22UF_6.3V
1608_X5R_M
1 2
C2888 22UF_6.3V
1608_X5R_M
1 2
VCC1R0_SUS_CLK2
1 2
VCC1R0_SUS_CLK4
1 2
VCC1R0_SUS_CLK5
1 2
NA
C2450 22UF_6.3V
1608_X5R_M
NA
C2452 22UF_6.3V
1608_X5R_M
NA
C2454 22UF_6.3V
1608_X5R_M
NA
C2451 22UF_6.3V
1608_X5R_M
1 2
NA
C2453 22UF_6.3V
1608_X5R_M
1 2
NA
C2455 22UF_6.3V
1608_X5R_M
1 2
RJ207 SHORT1608_30MIL
1 2
RJ208 SHORT1608_30MIL
1 2
RJ209 SHORT1608_30MIL
1 2
VCC1R0_SUS
VCC1R0_SUS
VCC1R0_SUS
VCC1R0_SUS
C2433 1UF_6.3V
0603_X5R_M
1 2
VCCMPHY_GATE_OUT VCC1R8_SUSVCCMPHY_GATE_OUT
C2435 1UF_6.3V
0603_X5R_M
1 2
C2439 1UF_6.3V
0603_X5R_M
1 2
C2444 1UF_6.3V
0603_X5R_M
1 2
NEAR K17 NEAR N15 NEAR N18 NEAR AA1
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(14/16) : PCH POWER
CPU(14/16) : PCH POWER
CPU(14/16) : PCH POWER
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
16 91Thursday, December 21, 2017
16 91Thursday, December 21, 2017
16 91Thursday, December 21, 2017
5
4
3
2
1
APS/PETS Interface
D D
-PCH_SLP_S013,72,79
-XDP_DBR13,19
-PWRSWITCH27,35,64,65
-RTCRST12,20
-PCH_SLP_M13,65
-PCH_SLP_S413,56,65,80
-PCH_SLP_S513,65
-PCH_SLP_S313,31,56,65,66
U58P
GND 1 OF 3
A5
VSS_1
A67
VSS_2
A70
VSS_3
AA2
VSS_4
AA4
C C
B B
VSS_5
AA65
VSS_6
AA68
VSS_7
AB15
VSS_8
AB16
VSS_9
AB18
VSS_10
AB21
VSS_11
AB8
VSS_12
AD13
VSS_13
AD16
VSS_14
AD19
VSS_15
AD20
VSS_16
AD21
VSS_17
AD62
VSS_18
AD8
VSS_19
AE64
VSS_20
AE65
VSS_21
AE66
VSS_22
AE67
VSS_23
AE68
VSS_24
AE69
VSS_25
AF1
VSS_26
AF10
VSS_27
AF15
VSS_28
AF17
VSS_29
AF2
VSS_30
AF4
VSS_31
AF63
VSS_32
AG16
VSS_33
AG17
VSS_34
AG18
VSS_35
AG19
VSS_36
AG20
VSS_37
AG21
VSS_38
AG71
VSS_39
AH13
VSS_40
AH6
VSS_41
AH63
VSS_42
AH64
VSS_43
AH67
VSS_44
AJ15
VSS_45
AJ18
VSS_46
AJ20
VSS_47
AJ4
VSS_48
AK11
VSS_49
AK16
VSS_50
AK18
VSS_51
AK21
VSS_52
AK22
VSS_53
AK27
VSS_54
AK63
VSS_55
AK68
VSS_56
AK69
VSS_57
AK8
VSS_58
AL2
VSS_59
AL28
VSS_60
AL32
VSS_61
AL35
VSS_62
AL38
VSS_63
AL4
VSS_64
AL45
VSS_65
AL48
VSS_66
AL52
VSS_67
AL55
VSS_68
AL58
VSS_69
AL64
VSS_70
SKYLAKE_ULT_DDR3L_REV053F
16 OF 20
VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140
AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58
U58Q
GND 2 OF 3
AT63
VSS_141
AT68
VSS_142
AT71
VSS_143
AU10
VSS_144
AU15
VSS_145
AU20
VSS_146
AU32
VSS_147
AU38
VSS_148
AV1
VSS_149
AV68
VSS_150
AV69
VSS_151
AV70
VSS_152
AV71
VSS_153
AW10
VSS_154
AW12
VSS_155
AW14
VSS_156
AW16
VSS_157
AW18
VSS_158
AW21
VSS_159
AW23
VSS_160
AW26
VSS_161
AW28
VSS_162
AW30
VSS_163
AW32
VSS_164
AW34
VSS_165
AW36
VSS_166
AW38
VSS_167
AW41
VSS_168
AW43
VSS_169
AW45
VSS_170
AW47
VSS_171
AW49
VSS_172
AW51
VSS_173
AW53
VSS_174
AW55
VSS_175
AW57
VSS_176
AW6
VSS_177
AW60
VSS_178
AW62
VSS_179
AW64
VSS_180
AW66
VSS_181
AW8
VSS_182
AY66
VSS_183
B10
VSS_184
B14
VSS_185
B18
VSS_186
B22
VSS_187
B30
VSS_188
B34
VSS_189
B39
VSS_190
B44
VSS_191
B48
VSS_192
B53
VSS_193
B58
VSS_194
B62
VSS_195
B66
VSS_196
B71
VSS_197
BA1
VSS_198
BA10
VSS_199
BA14
VSS_200
BA18
VSS_201
BA2
VSS_202
BA23
VSS_203
BA28
VSS_204
BA32
VSS_205
BA36
VSS_206
F68
VSS_207
BA45
VSS_208
SKYLAKE_ULT_DDR3L_REV053F
17 OF 20
VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277
BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41
U58R
GND 3 OF 3
F8
VSS_278
G10
VSS_279
G22
VSS_280
G43
VSS_281
G45
VSS_282
G48
VSS_283
G5
VSS_284
G52
VSS_285
G55
VSS_286
G58
VSS_287
G6
VSS_288
G60
VSS_289
G63
VSS_290
G66
VSS_291
H15
VSS_292
H18
VSS_293
H71
VSS_294
J11
VSS_295
J13
VSS_296
J25
VSS_297
J28
VSS_298
J32
VSS_299
J35
VSS_300
J38
VSS_301
J42
VSS_302
J8
VSS_303
K16
VSS_304
K18
VSS_305
K22
VSS_306
K61
VSS_307
K63
VSS_308
K64
VSS_309
K65
VSS_310
K66
VSS_311
K67
VSS_312
K68
VSS_313
K70
VSS_314
K71
VSS_315
L11
VSS_316
L16
VSS_317
L17
VSS_318
18 OF 20
SKYLAKE_ULT_DDR3L_REV053F
VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359
L18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21
VCC3_SUS VCC3M
NA
J41
18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
NC1 NC2 NC3 SLP_S0# GND1 SYS_RESET# GND2 PWRBTN# GND3 RTCRST# GND4 +V3.3DS SLP_A# SLP_S4# SLP_S5# VccDSW3_3 SLP_S3# VccSus3_3
10051922_181
PEG1 PEG2
19 20
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(15/16) : GND
CPU(15/16) : GND
CPU(15/16) : GND
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
17 91Thursday, December 21, 2017
17 91Thursday, December 21, 2017
17 91Thursday, December 21, 2017
5
4
3
2
1
TABLE
CFG0 : Stall Reset Sequence after PCU PLL Lock until de-asserted 1 : No Stall 0 : Stall
D D
CFG3 : MSR Privacy Bit Feature 1 : MSR (C80h) bit[0] setting 0 : MSR (C80h) bit[0] overridden
CFG4 : eDP Enable 1 : Disabled 0 : Enabled
CFG9 : SVID Bus Communication 1 : Enabled 0 : Disabled
U58S
E68
CFG[0]
B67
CFG[1]
D65
CFG[2]
C C
B B
CFG319
1K_5%
NA
0603_1/20w
1 2
R1891
R8898
49.9_1%
1 2
0603_1/20w
0603_1/20w
1K_5%
1 2
NA
R1892
ITP_PMODE19
1K_5%
0603_1/20w
1 2
R8965
D67
CFG[3]
E70
CFG[4]
C68
CFG[5]
D68
CFG[6]
C67
CFG[7]
F71
CFG[8]
G69
CFG[9]
F70
CFG[10]
G68
CFG[11]
H70
CFG[12]
G71
CFG[13]
H69
CFG[14]
G70
CFG[15]
E63
CFG[16]
F63
CFG[17]
E66
CFG[18]
F66
CFG[19]
E60
CFG_RCOMP
E8
ITP_PMODE
AY2
RSVD_AY2
AY1
RSVD_AY1
D1
RSVD_D1
D3
RSVD_D3
K46
RSVD_K46
K45
RSVD_K45
AL25
RSVD_AL25
AL27
RSVD_AL27
C71
RSVD_C71
B70
RSVD_B70
F60
RSVD_F60
A52
RSVD_A52
BA70
RSVD_TP_BA70
BA68
RSVD_TP_BA68
J71
RSVD_J71
J68
RSVD_J68
F65
VSS_F65
G65
VSS_G65
F61
RSVD_F61
E61
RSVD_E61
SKYLAKE_ULT_DDR3L_REV053F
RESERVED SIGNALS-1
19 OF 20
RSVD_TP_BB68 RSVD_TP_BB69
RSVD_TP_AK13 RSVD_TP_AK12
RSVD_BB2 RSVD_BA3
RSVD_AW1
RSVD_BA4 RSVD_BB4
RSVD_A69 RSVD_B69
RSVD_AY3 RSVD_D71
RSVD_C70 RSVD_C54
RSVD_D54
VSS_AY71
RSVD_TP_AW71 RSVD_TP_AW70
PROC_SELECT#
TP5 TP6
RSVD_D5 RSVD_D4 RSVD_B2 RSVD_C2
RSVD_B3 RSVD_A3
RSVD_E1 RSVD_E2
RSVD_A4 RSVD_C4
TP4
TP1 TP2
ZVM#
MSM#
BB68 BB69
AK13 AK12
BB2 BA3
AU5 AT5
D5 D4 B2 C2
B3 A3
AW1 E1
E2 BA4
BB4 A4
C4 BB5 A69
B69 AY3 D71
C70 C54
D54 AY4
BB3 AY71
AR56 AW71
AW70 AP56
C64
1 2
R2287
1 2
R2288
0_5%
0_5%
0603_1/20w
0603_1/20w
R2289 100K_5% 0603_1/20w
1 2
VCCST
NA
R3272 0_5%
0603_1/20w
1 2
NA
C3284 6PF_25V
0603_C0G_D
1 2
U58T
AW69 AW68
AU56
AW48
U12 U11 H11
C7
RSVD_AW69 RSVD_AW68 RSVD_AU56 RSVD_AW48 RSVD_C7 RSVD_U12 RSVD_U11 RSVD_H11
SPARE
20 OF 20
SKYLAKE_ULT_DDR3L_REV053F
1M_1%
NA
1 2
R3273
NA
Y10
4 3 1 2
1ZZHAE24000CC0G
24MHz 8pF 30ppm 2016
RSVD_F6
RSVD_E3 RSVD_C11 RSVD_B11 RSVD_A11 RSVD_D12 RSVD_C12 RSVD_F52
0603_1/20w
F6 E3 C11 B11 A11 D12 C12 F52
NA
C3285 6PF_25V
0603_C0G_D
1 2
KDS 1ZZHAE24000CC0G TXC 7R24080003 EPSON Q22FA1280055800
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
CPU(16/16) : CFG/RESERVED
CPU(16/16) : CFG/RESERVED
CPU(16/16) : CFG/RESERVED
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
18 91Thursday, December 21, 2017
18 91Thursday, December 21, 2017
18 91Thursday, December 21, 2017
5
D D
4
VCC3B VCCSTG VCC1R0_SUSVCC1R0_SUSVCCSTGVCCSTG
3
2
1
0603_1/20w
0603_1/20w
51_5%
1 2
NA
XDP_TCK06
PCH_TCK6 XDP_TMS6 XDP_TDI6
-XDP_TRST6 XDP_TDO6
-XDP_DBR13,17
ITP_PMODE18
C C
-RSMRST13,65 CFG318
XDP_TCK0 PCH_TCK
XDP_TMS XDP_TDI
-XDP_TRST XDP_TDO
-XDP_DBR ITP_PMODE
-RSMRST
0603_1/20w
0603_X5R_K
51_5%
1 2
0.1UF_6.3V C3250
NA
51_5%
1 2
1 2
R3234
NA
NA
R3232
0603_1/20w
R3235
51_5%
1 2
NA
0603_1/20w
R3233
R2494
0_5% 0603_1/20w
-XDP_PRDY10
-XDP_PREQ10
1 2
NA
-XDP_PRDY
-XDP_PREQ
1.5K_5%
NA
1 2
R588
0603_1/20w
1K_5%
1 2
R491
1 2
R594 1K_5% 0603_1/20w
51_5%
1 2
0603_1/20w
R475
XDP_TCK1
NA
1 2
0.1UF_6.3V
0603_X5R_K
C8320
NA
J8
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
NA
TCK0 GND5 TCK1 TMS TDI TRSTN TDO GND4 HOOK7 HOOK6 VCCOBS_AB HOOK5 HOOK4 HOOK3 HOOK2 HOOK1 HOOK0 GND3 OBSDATA_A[3] OBSDATA_A[2] GND2 OBSDATA_A[1] OBSDATA_A[0] GND1 OBS_FN_A1 OBS_FN_A0
52435_2671
PEG1 PEG2
27 28
TABLE
Logic
Page 7
Page 18
B B
Page 19
Ref Des
R2559
R1892 J8
C8320 R475 R491 R588 R594
R2494
Merged
ASM
ASM ASM
ASM ASM ASM ASM ASM
ASM
DCI 2.0
NO_ASM
NO_ASM NO_ASM
NO_ASM
ASM
ASM NO_ASM NO_ASM
NO_ASM
LOGIC
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
XDP CONNECTOR
XDP CONNECTOR
XDP CONNECTOR
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
19 91Thursday, December 21, 2017
19 91Thursday, December 21, 2017
19 91Thursday, December 21, 2017
5
4
3
2
1
D D
D3
12
VCC3SW
1 2
1 2
D290 RB520CM_30
D6 RB520CM_30
RTCVCC
NA
C287 1UF_6.3V
0603_X5R_M
1 2
RB520CM_30
R4 1K_5%
0603_1/20w
1 2
C C
J12
1
1
2
2
3
PEG1
4
PEG4
WS23020_S0291_HF
1 2
R620
20K_5%
0603_1/20w
C459 1UF_6.3V
0603_X5R_M
1 2
-RTCRST
-RTCRST 12,17
20K_5%
1 2
R250
B B
A A
0603_1/20w
C285 1UF_6.3V
0603_X5R_M
1 2
-SRTCRST
-SRTCRST 12
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
RTC BATTERY
RTC BATTERY
RTC BATTERY
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
20 91Thursday, December 21, 2017
20 91Thursday, December 21, 2017
20 91Thursday, December 21, 2017
5
D D
4
3
VCC3_SUS
1 2
D12 RB520CM_30
VCC3_SUS_SPI
2
16MB (128Mb) 200MIL SOIC8
1
WINBOND W25Q128JVSIQ MACRONIX MX25L12873FM2I-10G
0603_X5R_K
1 2
0.1UF_6.3V
0603_X5R_K
C C
-SPI_CS07 SPI_CLK7,63
SPI_MOSI_IO07,63 SPI_IO2 7
-SPI_CS0 SPI_CLK SPI_MOSI_IO0 SPI_MISO_IO1
1 2
R322 33_5% 0603_1/20w
1 2
R681 33_5% 0603_1/20w
1 2
R674 33_5% 0603_1/20w
1 2
R694 33_5% 0603_1/20w
-SPI_CS0_R SPI_CLK_0_R SPI_MOSI_IO0_0_R SPI_MISO_IO1_0_R
C629
8
U49
VCC
6
CLK
5
IO0
2
IO1
1
CS#
3
SPI_IO2_0_R
IO2
7
SPI_IO3_0_R
IO3
GND
W25Q128JV_MX25L12873F
4
1 2
0.1UF_6.3V
C429
1 2
R8980 33_5% 0603_1/20w
1 2
R8981 33_5% 0603_1/20w
SPI_IO2 SPI_IO3
SPI_IO3 7SPI_MISO_IO17,63
TABLE
SF100 PIN HEADER INTERFACE (TOP VIEW)
1
VCC CS# MISO (KEY)
D12.1 R322.2 R694.2 N/A
3 5 7
B B
GND R681.2 R674.2 N/A
GND CLK MOSI (RESET)
2 4 6 8
A A
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
SPI FLASH
SPI FLASH
SPI FLASH
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
21 91Thursday, December 21, 2017
21 91Thursday, December 21, 2017
21 91Thursday, December 21, 2017
5
4
3
VCC2R5A M_A_VREF_CA
2
1
M_A_DQ[63:0]4,5
-M_A_DQS[7:0]4,5 M_A_DQS[7:0]4,5
M_A_A[16:0]4,23
D D
VCC1R2A VCC2R5A
M_A_DQ15 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ11 M_A_DQ10 M_A_DQ9 M_A_DQ8
M_A_DQS1
-M_A_DQS1
M_A_DQ7 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ1 M_A_DQ0
M_A_DQS0
-M_A_DQS0
C C
M_A_DDRCLK0_1200M
-M_A_DDRCLK0_1200M
M_A_CKE04,23
-M_A_CS04,23 M_A_ODT04,23
-M_A_ACT4,23
M_A_BG04,23 M_A_BS14,23
M_A_BS04,23
B B
M_A_CKE0
-M_A_CS0 M_A_ODT0
-M_A_ACT M_A_BG1_R M_A_BG1_R M_A_BG1_R M_A_BG1_R
M_A_BG0 M_A_BS1
M_A_BS0 M_A_A16 M_A_A16
M_A_A15 M_A_A14
M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0
R2549 0_5%
0603_1/20w
1 2
C2552
0.1UF_6.3V
0603_X5R_K
1 2
U125
D7
DQU7
D3
DQU6
C8
DQU5
C2
DQU4
C7
DQU3
C3
DQU2
B8
DQU1
A3
DQU0
B7
DQSU_T
A7
DQSU_C
E2
DMU#/DBIU#
J7
DQL7
J3
DQL6
H8
DQL5
H2
DQL4
H7
DQL3
H3
DQL2
F7
DQL1
G2
DQL0
G3
DQSL_T
F3
DQSL_C
E7
DML#/DBIL#
K7
CK_T
K8
CK_C
K2
CKE
L7
CS#
K3
ODT
L3
ACT#
M9
BG1_VSS
M2
BG0
N8
BA1
N2
BA0
L8
A16/RAS#
M8
A15/CAS#
L2
A14/WE#
T8
A13
M7
A12/BC#
T2
A11
M3
A10/AP
R7
A9
R2
A8
R8
A7
P2
A6
P8
A5
N3
A4
N7
A3
R3
A2
P7
A1
P3
A0
DDR4_x16_SDRAM
VPP_B1
VPP_R9 VREFCA VDD_B3
VDD_B9 VDD_D1 VDD_G7
VDD_J1 VDD_J9 VDD_L1
VDD_L9 VDD_R1 VDD_T9
VDDQ_A1
VDDQ_A9 VDDQ_C1 VDDQ_D9
VDDQ_F2
VDDQ_F8 VDDQ_G1 VDDQ_G9
VDDQ_J2
VDDQ_J8
VSSQ_A2
VSSQ_A8
VSSQ_C9
VSSQ_D2
VSSQ_D8
VSSQ_E3
VSSQ_E8
VSSQ_F1
VSSQ_H1
VSSQ_H9
VSS_B2 VSS_E1
VSS_G8
VSS_K1 VSS_K9
VSS_N1
VSS_T1
VSS_NC
RESET#
PARITY
ALERT#
ZQU_VSS
ZQL_ZQ
1 2
TEN
C2553
0.1UF_6.3V
0603_X5R_K
B1 R9
M1 B3
B9 D1 G7 J1 J9 L1 L9 R1 T9
A1 A9 C1 D9 F2 F8 G1 G9 J2 J8
A2 A8 C9 D2 D8 E3 E8 F1 H1 H9
B2 E1 G8 K1 K9 N1 T1
T7
P1 T3 P9 E9 F9 N9
1 2
M_A_VREF_CA
VCC1R2A
-DRAMRST M_A_PARITY
-M_A_ALERT
243_1%
0603_1/20w
1 2
R9009
C2554
0.1UF_6.3V
0603_X5R_K
0_5%
1 2
R9010
0603_1/20w
C2555
0.1UF_6.3V
0603_X5R_K
1 2
C2619
0.1UF_6.3V
0603_X5R_K
1 2
VCC1R2A VCC1R2A VCC1R2AVCC2R5A
M_A_DQ31 M_A_DQ30 M_A_DQ29 M_A_DQ28 M_A_DQ27 M_A_DQ26 M_A_DQ25 M_A_DQ24
M_A_DQS3
-M_A_DQS3
M_A_DQ23 M_A_DQ22 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ18 M_A_DQ17 M_A_DQ16
M_A_DQS2
-M_A_DQS2
M_A_DDRCLK0_1200M
-M_A_DDRCLK0_1200M M_A_CKE0
-M_A_CS0 M_A_ODT0
-M_A_ACT
M_A_BG0 M_A_BS1
M_A_BS0
M_A_A15 M_A_A14
M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0
C2620
0.1UF_6.3V
0603_X5R_K
1 2
R2550 0_5%
0603_1/20w
1 2
U126
D7
DQU7
D3
DQU6
C8
DQU5
C2
DQU4
C7
DQU3
C3
DQU2
B8
DQU1
A3
DQU0
B7
DQSU_T
A7
DQSU_C
E2
DMU#/DBIU#
J7
DQL7
J3
DQL6
H8
DQL5
H2
DQL4
H7
DQL3
H3
DQL2
F7
DQL1
G2
DQL0
G3
DQSL_T
F3
DQSL_C
E7
DML#/DBIL#
K7
CK_T
K8
CK_C
K2
CKE
L7
CS#
K3
ODT
L3
ACT#
M9
BG1_VSS
M2
BG0
N8
BA1
N2
BA0
L8
A16/RAS#
M8
A15/CAS#
L2
A14/WE#
T8
A13
M7
A12/BC#
T2
A11
M3
A10/AP
R7
A9
R2
A8
R8
A7
P2
A6
P8
A5
N3
A4
N7
A3
R3
A2
P7
A1
P3
A0
DDR4_x16_SDRAM
C2621
0.1UF_6.3V
0603_X5R_K
1 2
VPP_B1
VPP_R9 VREFCA VDD_B3
VDD_B9 VDD_D1 VDD_G7
VDD_J1 VDD_J9 VDD_L1
VDD_L9 VDD_R1 VDD_T9
VDDQ_A1
VDDQ_A9 VDDQ_C1 VDDQ_D9
VDDQ_F2
VDDQ_F8 VDDQ_G1 VDDQ_G9
VDDQ_J2 VDDQ_J8
VSSQ_A2
VSSQ_A8
VSSQ_C9
VSSQ_D2
VSSQ_D8
VSSQ_E3
VSSQ_E8
VSSQ_F1 VSSQ_H1 VSSQ_H9
VSS_B2 VSS_E1
VSS_G8
VSS_K1 VSS_K9
VSS_N1
VSS_T1
VSS_NC
RESET#
PARITY
ALERT#
ZQU_VSS
ZQL_ZQ
TEN
C2622
0.1UF_6.3V
0603_X5R_K
1 2
B1 R9
M1 B3
B9 D1 G7 J1 J9 L1 L9 R1 T9
A1 A9 C1 D9 F2 F8 G1 G9 J2 J8
A2 A8 C9 D2 D8 E3 E8 F1 H1 H9
B2 E1 G8 K1 K9 N1 T1
T7
P1 T3 P9 E9 F9 N9
U127
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQSU_T DQSU_C
DMU#/DBIU#
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
DQSL_T DQSL_C
DML#/DBIL#
CK_T CK_C
CKE CS# ODT ACT# BG1_VSS
BG0 BA1
BA0 A16/RAS#
A15/CAS# A14/WE#
A13 A12/BC# A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
C2557
0.047UF_6.3V
0603_X5R_K
1 2
VPP_B1
VPP_R9 VREFCA VDD_B3
VDD_B9 VDD_D1 VDD_G7
VDD_J1
VDD_J9
VDD_L1
VDD_L9 VDD_R1
VDD_T9
VDDQ_A1
VDDQ_A9 VDDQ_C1 VDDQ_D9
VDDQ_F2
VDDQ_F8 VDDQ_G1 VDDQ_G9
VDDQ_J2
VDDQ_J8
VSSQ_A2
VSSQ_A8
VSSQ_C9
VSSQ_D2
VSSQ_D8
VSSQ_E3
VSSQ_E8
VSSQ_F1
VSSQ_H1
VSSQ_H9
VSS_B2 VSS_E1
VSS_G8
VSS_K1 VSS_K9 VSS_N1 VSS_T1
VSS_NC
RESET#
PARITY
ALERT#
ZQU_VSS
ZQL_ZQ
C2623 10UF_6.3V
1005_X5R_M
1 2
M_A_VREF_CA
VCC1R2A VCC2R5A
-DRAMRST -DRAMRST M_A_PARITY
-M_A_ALERT
0_5%
243_1%
1 2
R9011
0603_1/20w
0603_1/20w
1 2
R9012
C2624 10UF_6.3V
1005_X5R_M
1 2
M_A_DQ47 M_A_DQ46 M_A_DQ45 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ40
M_A_DQS5
-M_A_DQS5
M_A_DQ39 M_A_DQ38 M_A_DQ37 M_A_DQ36 M_A_DQ35 M_A_DQ34 M_A_DQ33 M_A_DQ32
M_A_DQS4
-M_A_DQS4
M_A_DDRCLK0_1200M
-M_A_DDRCLK0_1200M M_A_CKE0
-M_A_CS0 M_A_ODT0
-M_A_ACT
M_A_BG0 M_A_BS1
M_A_BS0 M_A_A16
M_A_A15 M_A_A14
M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0
C2556
0.047UF_6.3V
0603_X5R_K
1 2
R2551 0_5%
0603_1/20w
1 2
D7 D3 C8 C2 C7 C3
B8 A3
B7 A7
E2
J7
J3 H8 H2 H7 H3
F7
G2 G3
F3 E7
K7 K8
K2 L7 K3 L3
M9 M2
N8 N2
L8
M8
L2 T8
M7
T2 M3 R7 R2 R8
P2
P8 N3 N7 R3
P7
P3
DDR4_x16_SDRAM
TEN
C2558
0.047UF_6.3V
0603_X5R_K
1 2
B1 R9
M1 B3
B9 D1 G7 J1 J9 L1 L9 R1 T9
A1 A9 C1 D9 F2 F8 G1 G9 J2 J8
A2 A8 C9 D2 D8 E3 E8 F1 H1 H9
B2 E1 G8 K1 K9 N1 T1
T7
P1 T3 P9 E9 F9 N9
M_A_VREF_CA
C2559
0.047UF_6.3V
0603_X5R_K
1 2
VCC1R2A VCC2R5A
U128
R2552 0_5%
0603_1/20w
1 2
D7
DQU7
D3
DQU6
C8
DQU5
C2
DQU4
C7
DQU3
C3
DQU2
B8
DQU1
A3
DQU0
B7
DQSU_T
A7
DQSU_C
E2
DMU#/DBIU#
J7
DQL7
J3
DQL6
H8
DQL5
H2
DQL4
H7
DQL3
H3
DQL2
F7
DQL1
G2
DQL0
G3
DQSL_T
F3
DQSL_C
E7
DML#/DBIL#
K7
CK_T
K8
CK_C
K2
CKE
L7
CS#
K3
ODT
L3
ACT#
M9
BG1_VSS
M2
BG0
N8
BA1
N2
BA0
L8
A16/RAS#
M8
A15/CAS#
L2
A14/WE#
T8
A13
M7
A12/BC#
T2
A11
M3
A10/AP
R7
A9
R2
A8
R8
A7
P2
A6
P8
A5
N3
A4
N7
A3
R3
A2
P7
A1
P3
A0
DDR4_x16_SDRAM
VPP_B1
VPP_R9 VREFCA VDD_B3
VDD_B9 VDD_D1 VDD_G7
VDD_J1 VDD_J9 VDD_L1
VDD_L9 VDD_R1 VDD_T9
VDDQ_A1
VDDQ_A9 VDDQ_C1 VDDQ_D9
VDDQ_F2
VDDQ_F8 VDDQ_G1 VDDQ_G9
VDDQ_J2 VDDQ_J8
VSSQ_A2
VSSQ_A8
VSSQ_C9
VSSQ_D2
VSSQ_D8
VSSQ_E3
VSSQ_E8
VSSQ_F1 VSSQ_H1 VSSQ_H9
VSS_B2 VSS_E1
VSS_G8
VSS_K1 VSS_K9
VSS_N1
VSS_T1
VSS_NC
RESET#
PARITY
ALERT#
ZQU_VSS
ZQL_ZQ
TEN
M_A_PARITY
-M_A_ALERT
243_1%
1 2
R9013
0603_1/20w
0_5%
M_A_DQ63 M_A_DQ62 M_A_DQ61 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ56
M_A_DQS7
-M_A_DQS7
M_A_DQ55 M_A_DQ54 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48
M_A_DQS6
-M_A_DQS6
M_A_DDRCLK0_1200M
-M_A_DDRCLK0_1200M M_A_CKE0
-M_A_CS0 M_A_ODT0
-M_A_ACT
M_A_BG0 M_A_BS1
M_A_BS0 M_A_A16
M_A_A15 M_A_A14
M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0
0603_1/20w
1 2
R9014
B1 R9
M1 B3
B9 D1 G7 J1 J9 L1 L9 R1 T9
A1 A9 C1 D9 F2 F8 G1 G9 J2 J8
A2 A8 C9 D2 D8 E3 E8 F1 H1 H9
B2 E1 G8 K1 K9 N1 T1
T7
P1 T3 P9 E9 F9 N9
M_A_VREF_CA
VCC1R2A
-DRAMRST M_A_PARITY
-M_A_ALERT
243_1%
0603_1/20w
1 2
R9015
0_5%
0603_1/20w
1 2
R9016
TABLE:
SDP DDP
M_A_DDRCLK0_1200M4,23
-M_A_DDRCLK0_1200M4,23
M_A_DDRCLK0_1200M
-M_A_DDRCLK0_1200M
NA
C3290 3300PF_25V
0603_X7R_K
1 2
R2550 R2551 R2552
R2553
R2549
ASM ASM ASM ASM
NA
R9041 NA ASM
0_5%
NA
M_A_BG14
A A
-DRAMRST5,24
M_A_PARITY4,23
-M_A_ALERT4,23
M_A_BG1 M_A_BG1_R
-DRAMRST
M_A_PARITY
-M_A_ALERT
5
1 2
R2553
0603_1/20w
M_A_BG1_R 23
R9010 R9012 R9014 R9016
0_5% 0_5% 0_5% 0_5%
LOGIC
4
NA NA NA NA
ASM
243_1% 243_1% 243_1% 243_1%
Supplier
Capacity
8Gbit
Micron
8Gbit 16Gbit
Samsung
8Gbit 16Gbit
SK hynix
8Gbit 16Gbit
TABLE: DDR4 SDRAM source
3
Supplier's P/N
MT40A512M16JY-083:B MT40A512M16LY-075:E
MT40A1G16WBU-083E:B K4A8G165WC-BCRC K4AAG165WB-MCRC
H5AN8G6NAFR-UHC H5ANAG6NAMR-UHC
Package Size
8.0 x 14.0 mm
7.5 x 13.5 mm
8.0 x 14.0 mm
7.5 x 13.3 mm
7.5 x 13.3 mm
7.5 x 13.0 mm
7.5 x 13.0 mm
SDP SDP DDP
SDP DDP
SDP DDP
Die
8Gb (512Mx16) 8Gb (512Mx16) 16Gb (1Gx16) 8Gb (512Mx16) 16Gb (1Gx16) 8Gb (512Mx16) 16Gb (1Gx16)
2
Configuration 1 Rank x
(512Mx16) 1 Rank x (512Mx16) 1 Rank x (1Gx16) 1 Rank x (512Mx16) 1 Rank x (1Gx16) 1 Rank x (512Mx16) 1 Rank x (1Gx16)
ZQL / ZQ
ZQ ZQ ZQL
ZQ ZQL
ZQ ZQL
ZQU / VSS
VSS VSS ZQU
VSS ZQU
VSS ZQU
BG1 / VSS
VSS VSS BG1
VSS BG1
VSS BG1
Single Ch Dual Ch
4GB 4GB 8GB
4GB 8GB
4GB 8GB
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
Date: Sheet :
8GB 8GB 16GB
8GB 16GB
8GB 16GB
Title :
Title :
Title :
DDR4 BASE MEMORY CH-A (1/2)
DDR4 BASE MEMORY CH-A (1/2)
DDR4 BASE MEMORY CH-A (1/2)
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
22 91Thursday, December 21, 2017
22 91Thursday, December 21, 2017
22 91Thursday, December 21, 2017
5
4
3
2
1
VCC0R6B
M_A_A[16:0]4,22
M_A_A16 M_A_A15 M_A_A14
D D
M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0
M_A_BG1_R22 M_A_BG04,22 M_A_BS14,22 M_A_BS04,22
-M_A_ACT4,22
C C
M_A_PARITY4,22
-M_A_CS04,22 M_A_ODT04,22 M_A_CKE04,22
M_A_BG1_R M_A_BG0 M_A_BS1 M_A_BS0
-M_A_ACT M_A_PARITY
-M_A_CS0 M_A_ODT0 M_A_CKE0
1 2
R2555 36_1% 0603_1/20w
1 2
R9025 36_1% 0603_1/20w
1 2
R9026 36_1% 0603_1/20w
1 2
R9027 36_1% 0603_1/20w
1 2
R9028 36_1% 0603_1/20w
1 2
R9029 36_1% 0603_1/20w
1 2
R9030 36_1% 0603_1/20w
1 2
R9031 36_1% 0603_1/20w
1 2
R9032 36_1% 0603_1/20w
1 2
R9033 36_1% 0603_1/20w
1 2
R9034 36_1% 0603_1/20w
1 2
R9035 36_1% 0603_1/20w
1 2
R9036 36_1% 0603_1/20w
1 2
R9037 36_1% 0603_1/20w
1 2
R9038 36_1% 0603_1/20w
1 2
R9039 36_1% 0603_1/20w
1 2
R9040 36_1% 0603_1/20w
1 2
R9041 36_1% 0603_1/20w NA
1 2
R9042 36_1% 0603_1/20w
1 2
R9043 36_1% 0603_1/20w
1 2
R9044 36_1% 0603_1/20w
1 2
R9045 36_1% 0603_1/20w
1 2
R9046 36_1% 0603_1/20w
1 2
R9047 36_1% 0603_1/20w
1 2
R2533 36_1% 0603_1/20w
1 2
R9049 36_1% 0603_1/20w
VCC1R2A
1 2
VCC1R2A
1 2
VCC1R2A
C428 1UF_6.3V
1005_X5R_K
C2625 1UF_6.3V
1005_X5R_K
C242 1UF_6.3V
1 2
1005_X5R_K
C2626 1UF_6.3V
1005_X5R_K
1 2
C534 1UF_6.3V
1 2
1005_X5R_K
C2627 1UF_6.3V
1005_X5R_K
1 2
C537 1UF_6.3V
1 2
1005_X5R_K
C2628 1UF_6.3V
1005_X5R_K
1 2
C540 1UF_6.3V
1 2
1005_X5R_K
C2629 1UF_6.3V
1005_X5R_K
1 2
C425 1UF_6.3V
1 2
1005_X5R_K
C2630 1UF_6.3V
1005_X5R_K
1 2
C426 1UF_6.3V
1 2
1005_X5R_K
C2631 1UF_6.3V
1005_X5R_K
1 2
C427 1UF_6.3V
1 2
1005_X5R_K
C2632 1UF_6.3V
1005_X5R_K
1 2
C479 10UF_6.3V
1005_X5R_M
M_A_DDRCLK0_1200M4,22
-M_A_DDRCLK0_1200M4,22
M_A_DDRCLK0_1200M
-M_A_DDRCLK0_1200M
1 2
R9050 36_1% 0603_1/20w
1 2
R9051 36_1% 0603_1/20w
1 2
C481 10UF_6.3V
1005_X5R_M
1 2
C485 10UF_6.3V
1005_X5R_M
1 2
C489 10UF_6.3V
1005_X5R_M
1 2
C497 10UF_6.3V
1005_X5R_M
1 2
VCC1R2A
-M_A_ALERT4,22
B B
-M_A_ALERT
VCC0R6B VCC0R6B
C411 10UF_6.3V
1005_X5R_M
1 2
C466 10UF_6.3V
1005_X5R_M
1 2
C31 1UF_6.3V
1005_X5R_K
1 2
1 2
R2554 49.9_1% 0603_1/20w
C87 1UF_6.3V
1005_X5R_K
1 2
C100 1UF_6.3V
1005_X5R_K
1 2
C103 1UF_6.3V
1005_X5R_K
1 2
C2633 1UF_6.3V
1005_X5R_K
1 2
C2634 1UF_6.3V
1005_X5R_K
1 2
C2635 1UF_6.3V
1005_X5R_K
1 2
C2636 1UF_6.3V
1005_X5R_K
1 2
VCC1R2A
R1889
1.82K_1%
0603_1/20w
2.74_1%
M_A_VREF_CA_CPU4
C1602
0.022UF_6.3V
1 2
0603_X5R_K
1 2
R1110
0603_1/20w
1 2
R1890
1.82K_1%
0603_1/20w
1 2
M_A_VREF_CA
R1111
24.9_1%
A A
5
4
3
0603_1/20w
1 2
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
2
Date: Sheet :
Title :
Title :
Title :
DDR4 BASE MEMORY CH-A (2/2)
DDR4 BASE MEMORY CH-A (2/2)
DDR4 BASE MEMORY CH-A (2/2)
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
23 91Thursday, December 21, 2017
23 91Thursday, December 21, 2017
23 91Thursday, December 21, 2017
5
4
3
VCC2R5A M_B_VREF_CA
2
VCC2R5A
1
M_B_DQ[63:0]4,5
-M_B_DQS[7:0]4,5 M_B_DQS[7:0]4,5
M_B_A[16:0]5,25
D D
VCC1R2A VCC2R5A
M_B_DQ15 M_B_DQ14 M_B_DQ13 M_B_DQ12 M_B_DQ11 M_B_DQ10 M_B_DQ9 M_B_DQ8
M_B_DQS1
-M_B_DQS1
M_B_DQ7 M_B_DQ6 M_B_DQ5 M_B_DQ4 M_B_DQ3 M_B_DQ2 M_B_DQ1 M_B_DQ0
M_B_DQS0
-M_B_DQS0
C C
M_B_DDRCLK0_1200M
-M_B_DDRCLK0_1200M
M_B_CKE05,25
-M_B_CS05,25 M_B_ODT05,25
-M_B_ACT5,25
M_B_BG05,25 M_B_BS15,25
M_B_BS05,25
B B
M_B_CKE0
-M_B_CS0 M_B_ODT0
-M_B_ACT M_B_BG1_R M_B_BG1_R M_B_BG1_R M_B_BG1_R
M_B_BG0 M_B_BS1
M_B_BS0 M_B_A16
M_B_A15 M_B_A14
M_B_A13 M_B_A12 M_B_A11 M_B_A10 M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0
R2567 0_5%
0603_1/20w
1 2
C2569
0.1UF_6.3V
0603_X5R_K
1 2
U129
D7
DQU7
D3
DQU6
C8
DQU5
C2
DQU4
C7
DQU3
C3
DQU2
B8
DQU1
A3
DQU0
B7
DQSU_T
A7
DQSU_C
E2
DMU#/DBIU#
J7
DQL7
J3
DQL6
H8
DQL5
H2
DQL4
H7
DQL3
H3
DQL2
F7
DQL1
G2
DQL0
G3
DQSL_T
F3
DQSL_C
E7
DML#/DBIL#
K7
CK_T
K8
CK_C
K2
CKE
L7
CS#
K3
ODT
L3
ACT#
M9
BG1_VSS
M2
BG0
N8
BA1
N2
BA0
L8
A16/RAS#
M8
A15/CAS#
L2
A14/WE#
T8
A13
M7
A12/BC#
T2
A11
M3
A10/AP
R7
A9
R2
A8
R8
A7
P2
A6
P8
A5
N3
A4
N7
A3
R3
A2
P7
A1
P3
A0
DDR4_x16_SDRAM
VPP_B1
VPP_R9 VREFCA VDD_B3
VDD_B9 VDD_D1 VDD_G7
VDD_J1
VDD_J9
VDD_L1
VDD_L9 VDD_R1
VDD_T9
VDDQ_A1
VDDQ_A9 VDDQ_C1 VDDQ_D9
VDDQ_F2
VDDQ_F8 VDDQ_G1 VDDQ_G9
VDDQ_J2 VDDQ_J8
VSSQ_A2
VSSQ_A8
VSSQ_C9
VSSQ_D2
VSSQ_D8
VSSQ_E3
VSSQ_E8
VSSQ_F1 VSSQ_H1 VSSQ_H9
VSS_B2 VSS_E1
VSS_G8
VSS_K1 VSS_K9 VSS_N1 VSS_T1
VSS_NC
RESET#
PARITY
ALERT#
ZQU_VSS
ZQL_ZQ
1 2
TEN
C2560
0.1UF_6.3V
0603_X5R_K
B1 R9
M1 B3
B9 D1 G7 J1 J9 L1 L9 R1 T9
A1 A9 C1 D9 F2 F8 G1 G9 J2 J8
A2 A8 C9 D2 D8 E3 E8 F1 H1 H9
B2 E1 G8 K1 K9 N1 T1
T7
P1 T3 P9 E9 F9 N9
C2562
0.1UF_6.3V
0603_X5R_K
1 2
M_B_VREF_CA
VCC1R2A
-DRAMRST M_B_PARITY
-M_B_ALERT
243_1%
0603_1/20w
1 2
R9021
0_5%
1 2
R9024
0603_1/20w
C2561
0.1UF_6.3V
0603_X5R_K
1 2
C2638
0.1UF_6.3V
0603_X5R_K
1 2
VCC1R2A VCC1R2A VCC1R2AVCC2R5A
M_B_DQ31 M_B_DQ30 M_B_DQ29 M_B_DQ28 M_B_DQ27 M_B_DQ26 M_B_DQ25 M_B_DQ24
M_B_DQS3
-M_B_DQS3
M_B_DQ23 M_B_DQ22 M_B_DQ21 M_B_DQ20 M_B_DQ19 M_B_DQ18 M_B_DQ17 M_B_DQ16
M_B_DQS2
-M_B_DQS2
M_B_DDRCLK0_1200M
-M_B_DDRCLK0_1200M M_B_CKE0
-M_B_CS0 M_B_ODT0
-M_B_ACT
M_B_BG0 M_B_BS1
M_B_BS0 M_B_A16
M_B_A15 M_B_A14
M_B_A13 M_B_A12 M_B_A11 M_B_A10 M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0
C2639
0.1UF_6.3V
0603_X5R_K
1 2
R2560 0_5%
0603_1/20w
1 2
U130
D7
DQU7
D3
DQU6
C8
DQU5
C2
DQU4
C7
DQU3
C3
DQU2
B8
DQU1
A3
DQU0
B7
DQSU_T
A7
DQSU_C
E2
DMU#/DBIU#
J7
DQL7
J3
DQL6
H8
DQL5
H2
DQL4
H7
DQL3
H3
DQL2
F7
DQL1
G2
DQL0
G3
DQSL_T
F3
DQSL_C
E7
DML#/DBIL#
K7
CK_T
K8
CK_C
K2
CKE
L7
CS#
K3
ODT
L3
ACT#
M9
BG1_VSS
M2
BG0
N8
BA1
N2
BA0
L8
A16/RAS#
M8
A15/CAS#
L2
A14/WE#
T8
A13
M7
A12/BC#
T2
A11
M3
A10/AP
R7
A9
R2
A8
R8
A7
P2
A6
P8
A5
N3
A4
N7
A3
R3
A2
P7
A1
P3
A0
DDR4_x16_SDRAM
C2640
0.1UF_6.3V
0603_X5R_K
1 2
VPP_B1
VPP_R9 VREFCA VDD_B3
VDD_B9 VDD_D1 VDD_G7
VDD_J1
VDD_J9
VDD_L1
VDD_L9 VDD_R1
VDD_T9
VDDQ_A1
VDDQ_A9 VDDQ_C1 VDDQ_D9
VDDQ_F2
VDDQ_F8 VDDQ_G1 VDDQ_G9
VDDQ_J2 VDDQ_J8
VSSQ_A2
VSSQ_A8
VSSQ_C9
VSSQ_D2
VSSQ_D8
VSSQ_E3
VSSQ_E8
VSSQ_F1
VSSQ_H1
VSSQ_H9
VSS_B2 VSS_E1
VSS_G8
VSS_K1 VSS_K9 VSS_N1 VSS_T1
VSS_NC
RESET#
PARITY
ALERT#
ZQU_VSS
ZQL_ZQ
TEN
C2641
0.1UF_6.3V
0603_X5R_K
1 2
B1 R9
M1 B3
B9 D1 G7 J1 J9 L1 L9 R1 T9
A1 A9 C1 D9 F2 F8 G1 G9 J2 J8
A2 A8 C9 D2 D8 E3 E8 F1 H1 H9
B2 E1 G8 K1 K9 N1 T1
T7
P1 T3 P9 E9 F9 N9
C2642 10UF_6.3V
1005_X5R_M
1 2
M_B_VREF_CA
VCC1R2A VCC2R5A
-DRAMRST -DRAMRST M_B_PARITY
-M_B_ALERT
0_5%
243_1%
1 2
R9020
0603_1/20w
0603_1/20w
1 2
R9022
C2637 10UF_6.3V
1005_X5R_M
1 2
M_B_DQ47 M_B_DQ46 M_B_DQ45 M_B_DQ44 M_B_DQ43 M_B_DQ42 M_B_DQ41 M_B_DQ40
M_B_DQS5
-M_B_DQS5
M_B_DQ39 M_B_DQ38 M_B_DQ37 M_B_DQ36 M_B_DQ35 M_B_DQ34 M_B_DQ33 M_B_DQ32
M_B_DQS4
-M_B_DQS4
M_B_DDRCLK0_1200M
-M_B_DDRCLK0_1200M M_B_CKE0
-M_B_CS0 M_B_ODT0
-M_B_ACT
M_B_BG0 M_B_BS1
M_B_BS0 M_B_A16
M_B_A15 M_B_A14
M_B_A13 M_B_A12 M_B_A11 M_B_A10 M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0
C2563
0.047UF_6.3V
0603_X5R_K
1 2
R2562 0_5%
0603_1/20w
1 2
D7 D3 C8 C2 C7 C3
B8 A3
B7 A7
E2
J7
J3 H8 H2 H7 H3
F7 G2
G3
F3
E7
K7
K8
K2
L7
K3
L3 M9
M2 N8
N2
L8 M8
L2
T8 M7
T2 M3 R7 R2 R8
P2
P8 N3 N7 R3
P7
P3
C2566
0.047UF_6.3V
0603_X5R_K
1 2
U131
DQU7 DQU6 DQU5 DQU4 DQU3 DQU2 DQU1 DQU0
DQSU_T DQSU_C
DMU#/DBIU#
DQL7 DQL6 DQL5 DQL4 DQL3 DQL2 DQL1 DQL0
DQSL_T DQSL_C
DML#/DBIL#
CK_T CK_C
CKE CS# ODT ACT# BG1_VSS
BG0 BA1
BA0 A16/RAS#
A15/CAS# A14/WE#
A13 A12/BC# A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
DDR4_x16_SDRAM
VPP_B1 VPP_R9
VREFCA
VDD_B3
VDD_B9 VDD_D1 VDD_G7
VDD_J1
VDD_J9
VDD_L1
VDD_L9 VDD_R1
VDD_T9
VDDQ_A1
VDDQ_A9 VDDQ_C1 VDDQ_D9
VDDQ_F2
VDDQ_F8 VDDQ_G1 VDDQ_G9
VDDQ_J2
VDDQ_J8
VSSQ_A2
VSSQ_A8
VSSQ_C9
VSSQ_D2
VSSQ_D8
VSSQ_E3
VSSQ_E8
VSSQ_F1
VSSQ_H1
VSSQ_H9
VSS_B2 VSS_E1
VSS_G8
VSS_K1 VSS_K9 VSS_N1 VSS_T1
VSS_NC
RESET#
PARITY
ALERT#
ZQU_VSS
ZQL_ZQ
TEN
C2567
0.047UF_6.3V
0603_X5R_K
1 2
B1 R9
M1 B3
B9 D1 G7 J1 J9 L1 L9 R1 T9
A1 A9 C1 D9 F2 F8 G1 G9 J2 J8
A2 A8 C9 D2 D8 E3 E8 F1 H1 H9
B2 E1 G8 K1 K9 N1 T1
T7
P1 T3 P9 E9 F9 N9
C2568
0.047UF_6.3V
0603_X5R_K
1 2
M_B_VREF_CA
VCC1R2A VCC2R5A
M_B_PARITY
-M_B_ALERT
0_5%
243_1%
1 2
R9023
0603_1/20w
0603_1/20w
1 2
R9017
C2643 10UF_6.3V
1005_X5R_M
1 2
M_B_DQ63 M_B_DQ62 M_B_DQ61 M_B_DQ60 M_B_DQ59 M_B_DQ58 M_B_DQ57 M_B_DQ56
M_B_DQS7
-M_B_DQS7
M_B_DQ55 M_B_DQ54 M_B_DQ53 M_B_DQ52 M_B_DQ51 M_B_DQ50 M_B_DQ49 M_B_DQ48
M_B_DQS6
-M_B_DQS6
M_B_DDRCLK0_1200M
-M_B_DDRCLK0_1200M M_B_CKE0
-M_B_CS0 M_B_ODT0
-M_B_ACT
M_B_BG0 M_B_BS1
M_B_BS0 M_B_A16
M_B_A15 M_B_A14
M_B_A13 M_B_A12 M_B_A11 M_B_A10 M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0
R2561 0_5%
0603_1/20w
1 2
U132
D7
DQU7
D3
DQU6
C8
DQU5
C2
DQU4
C7
DQU3
C3
DQU2
B8
DQU1
A3
DQU0
B7
DQSU_T
A7
DQSU_C
E2
DMU#/DBIU#
J7
DQL7
J3
DQL6
H8
DQL5
H2
DQL4
H7
DQL3
H3
DQL2
F7
DQL1
G2
DQL0
G3
DQSL_T
F3
DQSL_C
E7
DML#/DBIL#
K7
CK_T
K8
CK_C
K2
CKE
L7
CS#
K3
ODT
L3
ACT#
M9
BG1_VSS
M2
BG0
N8
BA1
N2
BA0
L8
A16/RAS#
M8
A15/CAS#
L2
A14/WE#
T8
A13
M7
A12/BC#
T2
A11
M3
A10/AP
R7
A9
R2
A8
R8
A7
P2
A6
P8
A5
N3
A4
N7
A3
R3
A2
P7
A1
P3
A0
DDR4_x16_SDRAM
VPP_B1 VPP_R9
VREFCA
VDD_B3
VDD_B9 VDD_D1 VDD_G7
VDD_J1
VDD_J9
VDD_L1
VDD_L9 VDD_R1
VDD_T9
VDDQ_A1
VDDQ_A9 VDDQ_C1 VDDQ_D9
VDDQ_F2
VDDQ_F8 VDDQ_G1 VDDQ_G9
VDDQ_J2 VDDQ_J8
VSSQ_A2
VSSQ_A8
VSSQ_C9
VSSQ_D2
VSSQ_D8
VSSQ_E3
VSSQ_E8
VSSQ_F1 VSSQ_H1 VSSQ_H9
VSS_B2 VSS_E1
VSS_G8
VSS_K1 VSS_K9 VSS_N1 VSS_T1
VSS_NC
RESET#
PARITY
ALERT#
ZQU_VSS
ZQL_ZQ
TEN
B1 R9
M1 B3
B9 D1 G7 J1 J9 L1 L9 R1 T9
A1 A9 C1 D9 F2 F8 G1 G9 J2 J8
A2 A8 C9 D2 D8 E3 E8 F1 H1 H9
B2 E1 G8 K1 K9 N1 T1
T7
P1 T3 P9 E9 F9 N9
M_B_VREF_CA
VCC1R2A
-DRAMRST M_B_PARITY
-M_B_ALERT
243_1%
0603_1/20w
1 2
R9018
0_5%
0603_1/20w
1 2
R9019
TABLE:
SDP
M_B_DDRCLK0_1200M5,25
-M_B_DDRCLK0_1200M5,25
M_B_BG15
A A
-DRAMRST5,22
M_B_PARITY5,25
-M_B_ALERT5,25
M_B_DDRCLK0_1200M
NA
C3291 3300PF_25V
0603_X7R_K
1 2
-M_B_DDRCLK0_1200M
0_5%
NA
M_B_BG1 M_B_BG1_R
-DRAMRST
M_B_PARITY
-M_B_ALERT
5
1 2
R2556
0603_1/20w
M_B_BG1_R 25
R2567 R2560 R2562 R2561
R2556
R9060 NA ASM
R9024 R9022 R9017 R9019
4
ASM ASM ASM ASM
NA
0_5% 0_5% 0_5% 0_5%
LOGIC
DDP
NA NA NA NA
ASM
243_1% 243_1% 243_1% 243_1%
Supplier
Capacity
8Gbit
Micron
8Gbit 16Gbit
Samsung
8Gbit 16Gbit
SK hynix
8Gbit 16Gbit
TABLE: DDR4 SDRAM source
3
Supplier's P/N
MT40A512M16JY-083:B MT40A512M16LY-075:E
MT40A1G16WBU-083E:B K4A8G165WC-BCRC K4AAG165WB-MCRC
H5AN8G6NAFR-UHC H5ANAG6NAMR-UHC
Package Size
8.0 x 14.0 mm
7.5 x 13.5 mm
8.0 x 14.0 mm
7.5 x 13.3 mm
7.5 x 13.3 mm
7.5 x 13.0 mm
7.5 x 13.0 mm
SDP SDP DDP
SDP DDP
SDP DDP
Die
8Gb (512Mx16) 8Gb (512Mx16) 16Gb (1Gx16) 8Gb (512Mx16) 16Gb (1Gx16) 8Gb (512Mx16) 16Gb (1Gx16)
2
Configuration 1 Rank x
(512Mx16) 1 Rank x (512Mx16) 1 Rank x (1Gx16) 1 Rank x (512Mx16) 1 Rank x (1Gx16) 1 Rank x (512Mx16) 1 Rank x (1Gx16)
ZQL / ZQ
ZQ ZQ ZQL
ZQ ZQL
ZQ ZQL
ZQU / VSS
VSS
VSS ZQU
VSS ZQU
VSS ZQU
BG1 / VSS
VSS VSS BG1
VSS BG1
VSS BG1
Single Ch Dual Ch
4GB 4GB 8GB
4GB 8GB
4GB 8GB
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
Date: Sheet :
8GB 8GB 16GB
8GB 16GB
8GB 16GB
Title :
Title :
Title :
DDR4 BASE MEMORY CH-B (1/2)
DDR4 BASE MEMORY CH-B (1/2)
DDR4 BASE MEMORY CH-B (1/2)
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
24 91Thursday, December 21, 2017
24 91Thursday, December 21, 2017
24 91Thursday, December 21, 2017
5
4
3
2
1
VCC0R6B
M_B_A[16:0]5,24
M_B_A16 M_B_A15 M_B_A14
D D
M_B_A13 M_B_A12 M_B_A11 M_B_A10 M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0
M_B_BG1_R24 M_B_BG05,24 M_B_BS15,24 M_B_BS05,24
-M_B_ACT5,24
C C
M_B_PARITY5,24
-M_B_CS05,24 M_B_ODT05,24 M_B_CKE05,24
M_B_BG1_R M_B_BG0 M_B_BS1 M_B_BS0
-M_B_ACT M_B_PARITY
-M_B_CS0 M_B_ODT0 M_B_CKE0
1 2
R2568 36_1% 0603_1/20w
1 2
R9072 36_1% 0603_1/20w
1 2
R9077 36_1% 0603_1/20w
1 2
R9053 36_1% 0603_1/20w
1 2
R9058 36_1% 0603_1/20w
1 2
R9062 36_1% 0603_1/20w
1 2
R9065 36_1% 0603_1/20w
1 2
R9069 36_1% 0603_1/20w
1 2
R9076 36_1% 0603_1/20w
1 2
R9052 36_1% 0603_1/20w
1 2
R9057 36_1% 0603_1/20w
1 2
R9061 36_1% 0603_1/20w
1 2
R9064 36_1% 0603_1/20w
1 2
R9068 36_1% 0603_1/20w
1 2
R9074 36_1% 0603_1/20w
1 2
R9048 36_1% 0603_1/20w
1 2
R9054 36_1% 0603_1/20w
1 2
R9060 36_1% 0603_1/20w NA
1 2
R9063 36_1% 0603_1/20w
1 2
R9067 36_1% 0603_1/20w
1 2
R9073 36_1% 0603_1/20w
1 2
R9082 36_1% 0603_1/20w
1 2
R9056 36_1% 0603_1/20w
1 2
R9059 36_1% 0603_1/20w
1 2
R2534 36_1% 0603_1/20w
1 2
R9066 36_1% 0603_1/20w
VCC1R2A
1 2
VCC1R2A
1 2
VCC1R2A
C433 1UF_6.3V
1005_X5R_K
C2651 1UF_6.3V
1005_X5R_K
C244 1UF_6.3V
1 2
1005_X5R_K
C2646 1UF_6.3V
1005_X5R_K
1 2
C536 1UF_6.3V
1 2
1005_X5R_K
C2648 1UF_6.3V
1005_X5R_K
1 2
C538 1UF_6.3V
1 2
1005_X5R_K
C2650 1UF_6.3V
1005_X5R_K
1 2
C541 1UF_6.3V
1 2
1005_X5R_K
C2653 1UF_6.3V
1005_X5R_K
1 2
C431 1UF_6.3V
1 2
1005_X5R_K
C2654 1UF_6.3V
1005_X5R_K
1 2
C430 1UF_6.3V
1 2
1005_X5R_K
C2659 1UF_6.3V
1005_X5R_K
1 2
C432 1UF_6.3V
1 2
1005_X5R_K
C2644 1UF_6.3V
1005_X5R_K
1 2
C480 10UF_6.3V
1005_X5R_M
M_B_DDRCLK0_1200M5,24
-M_B_DDRCLK0_1200M5,24
M_B_DDRCLK0_1200M
-M_B_DDRCLK0_1200M
1 2
R9075 36_1% 0603_1/20w
1 2
R9071 36_1% 0603_1/20w
1 2
C484 10UF_6.3V
1005_X5R_M
1 2
C486 10UF_6.3V
1005_X5R_M
1 2
C490 10UF_6.3V
1005_X5R_M
1 2
C498 10UF_6.3V
1005_X5R_M
1 2
VCC1R2A
-M_B_ALERT5,24
B B
-M_B_ALERT
VCC0R6B VCC0R6B
C412 10UF_6.3V
1005_X5R_M
1 2
C467 10UF_6.3V
1005_X5R_M
1 2
C32 1UF_6.3V
1005_X5R_K
1 2
1 2
R2569 49.9_1% 0603_1/20w
C88 1UF_6.3V
1005_X5R_K
1 2
C101 1UF_6.3V
1005_X5R_K
1 2
C104 1UF_6.3V
1005_X5R_K
1 2
C2645 1UF_6.3V
1005_X5R_K
1 2
C2647 1UF_6.3V
1005_X5R_K
1 2
C2649 1UF_6.3V
1005_X5R_K
1 2
C2652 1UF_6.3V
1005_X5R_K
1 2
VCC1R2A
R1894
1.82K_1%
0603_1/20w
2.74_1%
M_B_VREF_CA_CPU4
C1603
0.022UF_6.3V
1 2
0603_X5R_K
1 2
R1112
0603_1/20w
1 2
R1893
1.82K_1%
0603_1/20w
1 2
M_B_VREF_CA
R1113
24.9_1%
A A
5
4
3
2
0603_1/20w
1 2
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
Date: Sheet :
Title :
Title :
Title :
DDR4 BASE MEMORY CH-B (2/2)
DDR4 BASE MEMORY CH-B (2/2)
DDR4 BASE MEMORY CH-B (2/2)
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
25 91Thursday, December 21, 2017
25 91Thursday, December 21, 2017
25 91Thursday, December 21, 2017
5
VCC3M VCC3P
Q22
7
SSM6K504NU
6 5 2
D D
VCC3P_DRV66
1
D
VCC3P_DRV
S
G
3
R76 100_5%
0603_1/20w
1 2
4 8
R361 47_5%
0603_1/20w
1 2
D63 RB521CM_30
1 2
4
3
2
1
C603
0.1UF_25V
0603_X5R_K
1 2
C C
R714 47K_5%
0603_1/20w
1 2
VCC3LCD
1 2
R668 10K_5%
0603_1/20w
VCC3P
12
F3
ERBRD3R00X
ERBRD3R00X
C724
0.01UF_25V
0603_X7R_K
VCC3LCD
21
F7
0.9A
1 2
21
C308
0.01UF_6.3V
0603_X7R_K
1.2A
VBL15VSYS15
1 2
1 2
C313 1UF_25V
1005_X5R_K
C311
0.1UF_6.3V
0603_X5R_K
C310
0.1UF_25V
0603_X5R_K
1 2
C315 1UF_6.3V
0603_X5R_M
1 2
VCC3LCD
C307
0.01UF_25V
0603_X7R_K
1 2
100K_5%
VCC3BVCC3B
21
0603_1/20w
1 2
R38
F24 ERBRD0R50X
LCD CONNECTOR
J10
40
40
-LID_CLOSE27,56,59 USBP9-10
USBP9+10
B B
PANEL_BKLT_CTRL3 BACKLIGHT_ON55
EDP_HPD3
EDP_AUXN3 EDP_AUXP3
EDP_TXP03 EDP_TXN03
EDP_TXP13 EDP_TXN13
A A
-LID_CLOSE USBP9- USBP9-_CONN
USBP9+
PANEL_BKLT_CTRL BACKLIGHT_ON
1 2
D11 RB521CM_30
1 2
R2078 0_5% 0603_1/20w
1 2
R2079 0_5% 0603_1/20w
1 2
C8289 0.1UF_6.3V 0603_X5R_K
1 2
C8290 0.1UF_6.3V 0603_X5R_K
1 2
C8299 0.1UF_6.3V 0603_X5R_K
1 2
C8298 0.1UF_6.3V 0603_X5R_K
1 2
C8296 0.1UF_6.3V 0603_X5R_K
1 2
C8295 0.1UF_6.3V 0603_X5R_K
USBP9+_CONN
EDP_AUXN_CONN EDP_AUXP_CONN
EDP_TXP0_CONN EDP_TXN0_CONN
EDP_TXP1_CONN EDP_TXN1_CONN
12
12
D312
D311
NA
ESD108-B1-CSP0201
ESD108-B1-CSP0201
NA
NA
C929 1000PF_25V
1 2
0603_X7R_K
0603_X5R_K
1 2
0.1UF_6.3V C2579
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
GND1
18
GND2 17 16
GND3 15
GND4 14 13
GND5 12
GND6 11 10
GND7 9
GND8 8
GND9 7
GND10
6
GND11
5
GND12 4 3
BOSS1 2
BOSS2 1
20654_040E_01
41 42
43 44
45 46
47 48 49 50 51 52
53 54
PLACE NEAR J10
5
4
3
2
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
Date: Sheet :
Title :
Title :
Title :
LCD
LCD
LCD
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
26 91Thursday, December 21, 2017
26 91Thursday, December 21, 2017
26 91Thursday, December 21, 2017
5
D D
4
3
2
1
VCC3BVCC3SW VCC3SWVCC5B VCC3M
21
21
21
0603_1/20w
100K_5%
1 2
R8954
DMIC_DATA49
DMIC_CLK49
C C
-INT_MIC_DTCT8
USBP4+10 USBP4-10
USBP7+10 USBP7-10
-LID_CLOSE26,56,59
-LED_LOGO55,60
DMIC_DATA DMIC_CLK
-INT_MIC_DTCT
USBP4+ USBP4-
USBP7+ USBP7-
-LID_CLOSE
-LED_LOGO
1 2
R3137 0_5% 0603_1/20w
1 2
R3136 0_5% 0603_1/20w
1 2
R785 0_5% 0603_1/20w
1 2
R786 0_5% 0603_1/20w
1 2
R102 3.9K_5% 1005_1/16w
USBP4+_CONN USBP4-_CONN
USBP7+_CONN USBP7-_CONN
F16 ERBRD2R00X
ERBRD3R00X
F53
ERBRD0R50X
F26
J11
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
20654_030E_01
GND1 GND2
GND3 GND4
GND5 GND6
GND7 GND8
GND9 GND10 GND11
BOSS1 BOSS2
31 32
33 34
35 36
37 38 39 40 41
42 43
12
12
B B
NA
D424
D425
ESD108-B1-CSP0201
ESD108-B1-CSP0201
NA
12
12
2200PF_25V
0603_X7R_K
1 2
C934
0603_X5R_K
1 2
0.1UF_6.3V C3286
0603_X5R_K
1 2
0.1UF_6.3V C3287
0603_X5R_K
1 2
0.1UF_6.3V C2578
0603_X7R_K
1 2
1000PF_25V
D427
D426
ESD108-B1-CSP0201
NA
ESD108-B1-CSP0201
NA
C33
NA
PLACE NEAR J11PLACE NEAR J11
VCC3M
21
F31 ERBRD0R50X
J52
-PWRSWITCH17,35,64,65
-LED_PWR55,60
A A
-PWRSWITCH
-LED_PWR
1 2
R13 200_1% 1005_1/16w
1
1
2
2
3
3
4
4
5
PEG1
6
PEG2
WS83040_S0171_HF
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
5
4
3
2
Date: Sheet :
Title :
Title :
Title :
LID/MIC/CAMERA/PWR SW
LID/MIC/CAMERA/PWR SW
LID/MIC/CAMERA/PWR SW
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
27 91Thursday, December 21, 2017
27 91Thursday, December 21, 2017
27 91Thursday, December 21, 2017
5
4
3
VCC3B
2
1
1 2
R3091 4.7K_5% 0603_1/20w
1 2
R3092 4.7K_5% 0603_1/20w
1 2
D D
VCC3B VCC3B_PS8337B
RJ210 SHORT1608_30MIL
1 2
VCC3B
VCC3B
R3230 100K_5%
R2516 1M_5%
0603_1/20w
0603_1/20w
1 2
NA
1 2
R9691 0_5% 0603_1/20w NA
1 2
DDI_PRIORITY9
C C
R3360 0_5% 0603_1/20w
PS8337_MODE PS8337_PEQ
R3223
4.7K_5%
0603_1/20w
1 2
PS8337_DP_CFG0
PS8337_I2C_CTRL_EN
1 2
R9692 0_5% 0603_1/20w NA
PS8337_TMDS_RT PS8337_TMDS_PRE
PS8337_SCL 29,57PS8337_SDA29,57
USBC_HPD 29,33
1 2
R3093 4.7K_5% 0603_1/20w NA
1 2
R3094 4.7K_5% 0603_1/20w
1 2
R3095 4.7K_5% 0603_1/20w NA
1 2
R3096 4.7K_5% 0603_1/20w
1 2
R9693 4.7K_5% 0603_1/20w NA
USBC_DDIP2_AUXP 29 USBC_DDIP2_AUXN 29
R3231 100K_5%
0603_1/20w
1 2
PS8337_TMDS_DDCBUF
PS8337_PEQ
PS8337_TMDS_PRE
PS8337_MODE
PS8337_TMDS_RT
PS8337_DP_CFG0
PS8337_I2C_CTRL_EN
1 2
R3188 4.7K_5% 0603_1/20w NA
1 2
R3097 4.7K_5% 0603_1/20w
1 2
R3098 4.7K_5% 0603_1/20w NA
1 2
R3361 4.7K_5% 0603_1/20w
1 2
R3100 4.7K_5% 0603_1/20w
C3143
4.7UF_6.3V
1005_X5R_M
1 2
HDMI_CLKN HDMI_CLKP HDMI_DATA0N HDMI_DATA0P HDMI_DATA1N HDMI_DATA1P HDMI_DATA2N HDMI_DATA2P
HDMI_HPD 37
C3144
0.1UF_6.3V
0603_X5R_K
1 2
USBC_DDIP2_0P 29 USBC_DDIP2_0N 29 USBC_DDIP2_1P 29 USBC_DDIP2_1N 29 USBC_DDIP2_2P 29 USBC_DDIP2_2N 29 USBC_DDIP2_3P 29 USBC_DDIP2_3N 29
HDMI_CLKN 37 HDMI_CLKP 37 HDMI_DATA0N 37 HDMI_DATA0P 37 HDMI_DATA1N 37 HDMI_DATA1P 37 HDMI_DATA2N 37 HDMI_DATA2P 37
C3145
0.1UF_6.3V
0603_X5R_K
1 2
C3222
0.1UF_6.3V
0603_X5R_K
1 2
C3223
0.1UF_6.3V
0603_X5R_K
1 2
R2515
4.99K_1%
0603_1/20w
1 2
1 2
DDIP2_0P3 DDIP2_0N3 DDIP2_1P3 DDIP2_1N3 DDIP2_2P3 DDIP2_2N3 DDIP2_3P3 DDIP2_3N3
B B
DDIP2_AUXP3
DDIP2_AUXN3 DDIP2_CTRLCLK3 DDIP2_CTRLDATA3
DDIP2_HPD3
C3147 0.1UF_6.3V 0603_X5R_K
1 2
C3148 0.1UF_6.3V 0603_X5R_K
1 2
C3149 0.1UF_6.3V 0603_X5R_K
1 2
C3150 0.1UF_6.3V 0603_X5R_K
1 2
C3151 0.1UF_6.3V 0603_X5R_K
1 2
C3152 0.1UF_6.3V 0603_X5R_K
1 2
C3153 0.1UF_6.3V 0603_X5R_K
1 2
C3154 0.1UF_6.3V 0603_X5R_K
VCC3B
NA
R3156
2.2K_5%
0603_1/20w
1 2
R3157
2.2K_5%
0603_1/20w
1 2
C3156 0.1UF_6.3V 0603_X5R_K C3157 0.1UF_6.3V 0603_X5R_K
1 2 1 2
1 2
DDIP2_0P_C DDIP2_0N_C DDIP2_1P_C DDIP2_1N_C DDIP2_2P_C DDIP2_2N_C DDIP2_3P_C DDIP2_3N_C
C2587
2.2UF_6.3V
1005_X5R_K
DDIP2_AUXP_C DDIP2_AUXN_C DDIP2_CTRLCLK DDIP2_CTRLDATA
53
44
8
45
46
1
PD
PEQ
REXT27CEXT
MODE
3
IN_D0P
4
IN_D0N
6
IN_D1P
7
IN_D1N
9
IN_D2P
10
IN_D2N
12
IN_D3P
13
IN_D3N
26
GND1
35
GND2
43
GND3
57
GND4
PS8337BQFN56GTR2-A2
IN_DDC_SDA49IN_DDC_SCL50IN_AUXN51IN_AUXP
11
52
42
55
54
38
I2C_CTL_EN
SW/SDA_CTL
DP_AUXP_SCL
DP_AUXN_SDA
DP_CFG0/SCL_CTL
IN_HPD5IN_CA_DET
TMDS_SDA47TMDS_SCL
25
48
17
32
DP_CA_DET
2
29
23
20
DP_HPD
DP_CFG1
TMDS_RT
TMDS_PRE
TMDS_HPD
VDD33_1
TMDS_DDCBUF
VDD33_2 VDD33_3 VDD33_4
DP_D0P DP_D0N DP_D1P DP_D1N DP_D2P DP_D2N DP_D3P DP_D3N
TMDS_CLKN15TMDS_CLKP16TMDS_CH0N18TMDS_CH0P19TMDS_CH1N21TMDS_CH1P22TMDS_CH2N24TMDS_CH2P
PS8337_TMDS_DDCBUF
U108
14 28 41 56
40 39 37 36 34 33 31 30
VCC3B_PS8337B
HDMI_DDC_DATA HDMI_DDC_CLK
HDMI_DDC_DATA 37
HDMI_DDC_CLK 37
TABLE :
SW
A A
L
H
Port Priority Sequence DP Port > TMDS Port
TMDS Port > DP Port
5
DEFAULT
Project Name :
Project Name :
Project Name : Finn-1 SOVP
Finn-1 SOVP
Finn-1 SOVP
Document Number :
Document Number :
Document Number :
Size :
Size :
Size :
C
Date: Sheet :
Date: Sheet :
4
3
2
Date: Sheet :
Title :
Title :
Title :
DDI DEMUX/HDMI LEVEL SHIFTER
DDI DEMUX/HDMI LEVEL SHIFTER
DDI DEMUX/HDMI LEVEL SHIFTER
1
Rev :
Rev :
Rev :
4.00
4.00
4.00 of
of
of
28 91Thursday, December 21, 2017
28 91Thursday, December 21, 2017
28 91Thursday, December 21, 2017
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