Lenovo THINKPAD L430 Schematic

5

D D

4

3

2

1

LCD-1

IVY Bridge (rPGA989)

Intel PCH (Panther Point)

C C

DY:No stuff SWG:SWG SKU

B B

A A

w w w . c h i n a f i x . c o m

5

4

3

PSL: KBC795 PSL circuit for 10mW solution installed. 10mW: External circuit for 10mW solution installed.

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

CD1 DIS

1

SC

1 102Tuesday, December 13, 2011

SC

2CH SPEAKER 58

AUDIO COMBO Jack

MEDIA CARD READER REALTEK RTS5229 Socket P/N:62.10051.A51

82

SATA HDD

SATA ODD

PCI Express 1

CRT Port

VRAM PortA PortB

USB 3.0 CONN

62

USB 2.0 CONN

61

50

NVIDIA N13PNS1 GB4-128

83,84,85,86,87

DDR3 2Gbx4

88,89 90,91

SATA HDD CONN

SATA ODD CONN

DOCKING CONN

AUDIO CODEC ALC3202

USB 3.0 port 1

High Speed BUS to Docking

14'' HD/HD+ LCD

CRT SELECTION

mini DP connector

Display port to Docking

VRAM

56

94

29

94

49

50

52

94

Bluetooth

DDR3 2Gbx4

USB 2.0 CH0

USB 2.0 CH1,9

PCIe 16X Gen2

SATA Port 0

SATA Port 1

SATA Port 4

HD AUDIO

USB 3.0 port 3 USB 2.0 CH2,8

Dual Link LVDS

RGB CRT

Display Port

63

LCD-1 Discrete Block Diagram

Intel CPU Ivy Bridge

Panther Point

USB 3.0 (4 ports) USB 2.0 (14 ports)

AC97 2.3/Azalia Interface

Serial ATA 150MB/s

USB 2.0

CH11

FDI x4

Intel

ACPI 2.0

LPC I/F PCI Rev 2.3 PCI Express

INT. RTC

SPI FLASH

SPI

60

4~10

17~25

DMI x4

CPU XDP

Channel A

DDR3 1600/1333

Channel B

DDR3 1600/1333

USB 2.0 CH12

PCI Express 2

USB 2.0 CH3

SATA Port 2

USB 2.0 CH5

PCI Express 3

PCI Express 4

CH9

11

PCH XDP

26

UNBUFFERED DDR3 SODIMM Normal Socket Primary

204-PIN DDR3 SODIMM

UNBUFFERED DDR3 SODIMM Normal Socket Primary

Mini PCI-E WLAN Card

Mini PCI-E WWAN/mSATA

82

REALTEK GLAN RTL8111F

USB 2.0 CH4,13

LPC Bus / 33MHz

G-Sensor

79

Project Code: 91.4SE01.001 PCB(Raw Card): 11248

15

14

65

SIM

66

Express Card

GBE Switch PI3L500AZFEX

31

KBC NPCE885G

27

CH10

Touch Pad FAN

Finger Print

69

Int. KB

69

66

31

Thermal

82

28

LPC Debug Board Conn

PCB Layer Stackup

L1:TOP

PWR Load SW

36,37,97

AC Adapter

38

BATT

39

RTC

60

RFID

80

Docking Connector

94

CAMERA

RJ45

USB Conn AOU4

TPM

71

77

28

BOM1

Title

Size Document Number Rev

Custom

Date: Sheet of

Block Diagram

L2:GND L3:Signal L4:Signal L5:VCC L6:Signal L7:GND L8:BOTTOM

Battery Charger

BQ24707

INPUTS

AD+

System DC/DC

TPS51123RGER

DCBATOUT

CPU DC/DC

ISL95838HRTZ

DCBATOUT

1D05V_VTT

TPS51219RTER

DCBATOUT

1D5V_S3/DDR3_REF 0D75V_S0

TPS51216RUKR

DCBATOUT

1D8V_S0

TPS51311RGTR

3D3V_S5

VCCSA

TPS51461RGER

5V_S5

VGA_CORE

ISL62882CHRTZ

DCBATOUT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CD1 DIS

2 102Tuesday, December 13, 2011

OUTPUTS

BT+

5V_S5 3D3V_S5

42,43

VCC_CORE

1D05V_VTT

0D75V_S0 1D5V_PWR DDR3_VREF

1D8V_S0

VCCSA

VGA_CORE

40

41

45

46

47

48

92

SC

5

PCH Strapping

Name Schematics Notes

SPKR

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kΩ

No Reboot Mode with TCO Disabled:

- 10-kΩ weak pull-up resistor.

Chief River Schematic Checklist Rev0.72

INIT3_3V# Weak internal pull-up. Leave as "No Connect". GNT3#/GPIO55

GNT2#/GPIO53 GNT1#/GPIO51

D D

SPI_MOSI

NV_ALE

GNT[3:0]# functionality is not available on Mobile. Mobile: Used as GPIO only Pull-up resistors are not required on these signals. If pull-ups are used, they should be tied to the Vcc3_3power rail.

Enable Danbury:

Disable Danbury:

Enable Danbury:

Disable Danbury:

Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.

Left floating, no pull-down required.

Connect to +NVRAM_VCCQ with 8.2-kohm weak pull-up resistor [CRB has it pulled up with 1-kohm no-stuff resistor]

Leave floating (internal pull-down)

4

Processor Strapping

Pin Name Strap Description Configuration (Default value for each bit is

CFG[2]

PCI-Express Static Lane Reversal

CFG[4]

CFG[6:5]

CFG[7]

PCI-Express Port Bifurcation Straps

PEG DEFER TRAINING

3

Chief River Schematic Checklist Rev0.72

1 unless specified otherwise)

1:

Normal Operation. Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Disabled - No Physical Display Port attached to

1:

Embedded DisplayPort. Enabled - An external Display Port device is

0:

connectd to the EMBEDDED display Port

11 : x16 - Device 1 functions 1 and 2 disabled 10 : x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01 : Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00 : x8, x4, x4 - Device 1 functions 1 and 2 enabled

1:

PEG Train immediately following xxRESETB de assertion PEG Wait for BIOS for training

0:

2

Default Value

1

0

11

1

PCIe Routing

Card Reader

LANE1 LANE2

Mini Card1(WLAN)

LANE3

Express Card

LANE4

GBE LAN

LANE5

X X

LANE6 LANE7

X

LANE8

X

1

NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.

Low (0) - Flash Descriptor Security will be overridden. Also, when this signals is sampled on the rising edge of PWROK

then it will also disable Intel ME and its features. HAD_DOCK_EN# /GPIO[33]

C C

High (1) - Security measure defined in the Flash Descriptor will be enabled.

Platform design should provide appropriate pull-up or pull-down depending on

the desired settings. If a jumper option is used to tie this signal to GND as

required by the functional strap, the signal should be pulled low through a weak

pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.

Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal

pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for

strapping functions.

HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. HDA_SYNC

GPIO15

GPIO8

GPIO27

B B

RESISTOR

Symbol name

10KR3 If no letter, it means J: 5%

33D3R5

1KR3F

Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.

Low(0) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no

confidentiality. High(1) - Intel ME Crypto Transport Layer Security (TLS) cipher

suite with confidentiality.

Note : This is an un-muxed signal.

This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low.

Sampled at rising edge of RSMRST#.

CRB has a 1-kohm pull-up on this signal to +3.3VA rail.

GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down

using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of

RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is

enabled.

Default = Do not connect (floating)

High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.

Value

(J: 5%, F: 1%, D: 0.5%, B: 0.1 %)

10K Ohm

33.3 Ohm

1K Ohm

Tolerance

If no letter, it means J: 5% 0805

F: 1%

Rating

0402=> 1/16W, 25V 0603 => 1/16W, 75V 0805 => 1/10W, 100V

1/16W, 75V

1/10W, 100V

1/16W, 75V

Size

2=>0402, 3=>0603, 5=>0805, 6=>1206, 0=>1210

0603

The naming rule is value + R + size + tolerance For the value, it can be read by the number before R. (R means resistor) For the tolerance, it can be read from the last letter. For the rating, we don't show on the symbol name.

For the size, R2=>0402, R3=>0603, R5=>0805,....

POWER PLANE

5V_S0 3D3V_S0 1D8V_S0 1D5V_S0 1D05V_VTT 1D0V_S0 VCCSA 0D75V_S0 VCC_CORE VCC_GFXCORE 1D8V_VGA_S0 3D3V_VGA_S0 1V_VGA_S0

5V_USBX_S3 1D5V_S3 DDR_VREF_S3

BT+ DCBATOUT 5V_S5 5V_AUX_S5 3D3V_S5 3D3V_AUX_S5

3D3V_M 1D05V_M 1.05V S0/M0, SX/M3, WOL_EN

3D3V_AUX_KBC 3.3V

3D3V_AUX_S5

VOLTAGE DESCRIPTION

5V

3.3V

1.8V

1.5V

1.05V

1.0V

0.9 - 0.675V

0.75V

0.35V to 1.5V

0.4 to 1.25V

1.8V

3.3V 1V

5V

1.5V

0.75V

6V-14.1V 6V-14.1V 5V 5V

3.3V

CAPACITOR

Symbol name

SCD1U10V2MX-1

A A

SC2D2U16V5ZY

Value

0.1uF

10uF

2.2uF

Tolerance

(M: +/-20, K: +/-10, Z: +80/-20)

M/X5R

M/X5RSC10U6D3V5MX

Z/Y5V

5

Rating

10V

6.3V

16V

Size The naming rule is

2=>0402, 3=>0603, 5=>0805, 6=>1206, 0=>1210

0402

0805

4

Capacitor type + value + rating + size + tolerance + material SCD1U10V2MX-1 SC=> SMT Ceremic, TC=> POS cap or SP cap D1U => 0.1uF 10V => the voltage rating is 10V 2=> 0402, 3=>0603, 5=>0805 M=>tolerance M, K, Z X=> X7R/X5R, Y=> Y5V

-1 => symbol version, nonsense to EE characteristic

Voltage Rails

ACTIVE IN

S0

S3

All S states

DSW, Sx ON for supporting Deep Sleep states

G3, Sx

CPU Core Rail Graphics Core Rail

AC Brick Mode only

ON whenever iAMT is active1D05V_LAN 1.05V S0/M0, SX/M3

ON for iAMTLegacy WOL

Powered by Li Coin Cell in G3 and 3D3V_S5 in Sx

SMBus ADDRESSES

2

I C / SMBus Addresses

Device

EC SMBus 1 Battery CHARGER

EC SMBus 2 PCH eDP

PCH SMBus SO-DIMMA (SPD) SO-DIMMB (SPD) Digital Pot G-Sensor MINI

3

Ref Des

USB Table

Pair

0 1 2 3 4 5 6 7 8 9 10 11 12 13

Chief River CRV

Address Hex Bus

BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA

SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA

PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK

2

Device USB3.0 port 0 USB2.0 port 1 USB3.0 Docking WWAN USB2.0 port (AUO4) New Card X X USB2.0 Docking USB2.0 port 2 FPR BLUETOOTH WLAN Camera

SATA Table

Pair

0 1 2 3 4 5

BOM1

Title

Size Document Number Rev

Custom

Date: Sheet of

SATA Device

HDD ODD mSATA N/A Docking N/A

Table of Content

CD1 DIS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

3 102Tuesday, December 13, 2011

1

SC

5

4

3

2

1

SSID = CPU

Signal Routing Guideline: PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils. PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.

CPU1A

D D

From Panther Point

To Panther Point

C C

From Panther Point

1D05V_VTT

B B

DMI_TXN[3:0]19

DMI_TXP[3:0]19

DMI_RXN[3:0]19

DMI_RXP[3:0]19

FDI_TXN[7:0]19

FDI_TXP[7:0]19

FDI_FSYNC019 FDI_FSYNC119

FDI_INT19 FDI_LSYNC019

FDI_LSYNC119

R402 24D9R2F-L-GPR402 24D9R2F-L-GP

1 2 1 2

DY

R415 Do Not Stuff

DY

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

DP_COMP

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

AUBURNF,CLARKUNF

Ivy Bridge

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5]

DMI

Intel(R) FDI

eDP

PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_IRCOMP_R

PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0

PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0

PEG_C_TXN15 PEG_C_TXN14 PEG_C_TXN13 PEG_C_TXN12 PEG_C_TXN11 PEG_C_TXN10 PEG_C_TXN9 PEG_C_TXN8 PEG_C_TXN7 PEG_C_TXN6 PEG_C_TXN5 PEG_C_TXN4 PEG_C_TXN3 PEG_C_TXN2 PEG_C_TXN1 PEG_C_TXN0

PEG_C_TXP15 PEG_C_TXP14 PEG_C_TXP13 PEG_C_TXP12 PEG_C_TXP11 PEG_C_TXP10 PEG_C_TXP9 PEG_C_TXP8 PEG_C_TXP7 PEG_C_TXP6 PEG_C_TXP5 PEG_C_TXP4 PEG_C_TXP3 PEG_C_TXP2 PEG_C_TXP1 PEG_C_TXP0

R401 24D9R2F-L-GPR401 24D9R2F-L-GP

1 2

C401 SCD22U6D3V1MX-1-GP

C401 SCD22U6D3V1MX-1-GP C402 SCD22U6D3V1MX-1-GP

C402 SCD22U6D3V1MX-1-GP C403 SCD22U6D3V1MX-1-GP

C403 SCD22U6D3V1MX-1-GP C404 SCD22U6D3V1MX-1-GP

C404 SCD22U6D3V1MX-1-GP C405 SCD22U6D3V1MX-1-GP

C405 SCD22U6D3V1MX-1-GP C406 SCD22U6D3V1MX-1-GP

C406 SCD22U6D3V1MX-1-GP C407 SCD22U6D3V1MX-1-GP

C407 SCD22U6D3V1MX-1-GP C408 SCD22U6D3V1MX-1-GP

C408 SCD22U6D3V1MX-1-GP C409 SCD22U6D3V1MX-1-GP

C409 SCD22U6D3V1MX-1-GP C410 SCD22U6D3V1MX-1-GP

C410 SCD22U6D3V1MX-1-GP C411 SCD22U6D3V1MX-1-GP

C411 SCD22U6D3V1MX-1-GP C412 SCD22U6D3V1MX-1-GP

C412 SCD22U6D3V1MX-1-GP C413 SCD22U6D3V1MX-1-GP

C413 SCD22U6D3V1MX-1-GP C414 SCD22U6D3V1MX-1-GP

C414 SCD22U6D3V1MX-1-GP C415 SCD22U6D3V1MX-1-GP

C415 SCD22U6D3V1MX-1-GP C416 SCD22U6D3V1MX-1-GP

C416 SCD22U6D3V1MX-1-GP C417 SCD22U6D3V1MX-1-GP

C417 SCD22U6D3V1MX-1-GP C419 SCD22U6D3V1MX-1-GP

C419 SCD22U6D3V1MX-1-GP C418 SCD22U6D3V1MX-1-GP

C418 SCD22U6D3V1MX-1-GP C420 SCD22U6D3V1MX-1-GP

C420 SCD22U6D3V1MX-1-GP C421 SCD22U6D3V1MX-1-GP

C421 SCD22U6D3V1MX-1-GP C423 SCD22U6D3V1MX-1-GP

C423 SCD22U6D3V1MX-1-GP C422 SCD22U6D3V1MX-1-GP

C422 SCD22U6D3V1MX-1-GP C424 SCD22U6D3V1MX-1-GP

C424 SCD22U6D3V1MX-1-GP C425 SCD22U6D3V1MX-1-GP

C425 SCD22U6D3V1MX-1-GP C426 SCD22U6D3V1MX-1-GP

C426 SCD22U6D3V1MX-1-GP C427 SCD22U6D3V1MX-1-GP

C427 SCD22U6D3V1MX-1-GP C428 SCD22U6D3V1MX-1-GP

C428 SCD22U6D3V1MX-1-GP C429 SCD22U6D3V1MX-1-GP

C429 SCD22U6D3V1MX-1-GP C430 SCD22U6D3V1MX-1-GP

C430 SCD22U6D3V1MX-1-GP C431 SCD22U6D3V1MX-1-GP

C431 SCD22U6D3V1MX-1-GP C432 SCD22U6D3V1MX-1-GP

C432 SCD22U6D3V1MX-1-GP

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

SWG

SWG SWG

SWG

1D05V_VTT

PEG_RXN[0..15]

PEG_RXP[0..15]

PEG Static Lane Reversal

PEG_RXN[0..15] 83

PEG_RXP[0..15] 83

PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0

PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0

PEG_TXN[0..15]

PEG_TXP[0..15]

PEG_TXN[0..15] 83

PEG_TXP[0..15] 83

BOM1

A A

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCIE/DMI/FDI)

Size Document Number Rev

A3

Date: Sheet of

CPU (PCIE/DMI/FDI)

Taipei Hsien 221, Taiwan, R.O.C.

CD1 DIS

4 102Tuesday, December 13, 2011

SC

SSID = CPU

5

1D05V_VTT

R501

1 2

62R2J-GP

D D

62R2J-GP

H_PROCHOT#

12

C502

C502 SC47P50V2JN-3GP

SC47P50V2JN-3GP

Intel recommends 43pf

H_SNB_IVB#22

TPAD14-OP-GP

H_PECI22,27

TP501

TP502

1

TP503

TP503 TPAD14-OP-GP

TPAD14-OP-GP

1

SKTOCC#_R

H_CATERR#

4

CPU1B

C26

PROC_SELECT#

AN34

AL33

AN33

SKTOCC#

CATERR#

PECI

MISCTHERMALPWR MANAGEMENT

CLOCKS

3

BCLK

BCLK#

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

A28 A27

A16 A15

R8

CLK_CPU_P 18 CLK_CPU_N 18

SM_DRAMRST# 37

2

1D05V_VTT

12

R521

R521 1KR2J-1-GP

1KR2J-1-GP

12

R509

R509 1KR2J-1-GP

1KR2J-1-GP

Disabling Guidelines: If motherboard only supports external graphics: Connect DPLL_REF_SSCLK on Processor to GND through 1K +/- 5% resistor. Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K +/- 5% resistorpower (~15 mW) may be wasted.

1

H_PROCHOT#27,42

Connect EC to PROCHOT# through inverting OD buffer.

H_THERMTRIP#22,36

H_PM_SYNC19

H_CPUPW RGD11,22,36

C C

PM_DRAM_PWRGD19,37 VDDPWRGOOD37

3D3V_S0 1D05V_VTT

12

R522

R522 1KR2J-1-GP

1KR2J-1-GP

B B

PLT_RST#

G

DS

Q502

Q502 LSK3541G1ET2L-GP

LSK3541G1ET2L-GP

1 2

R513 56R2J-4-GPR513 56R2J-4-GP

1 2

R519 0R0402-PAD-1-GPR519 0R0402-PAD-1-GP

1 2

R503 10KR2J-3-GPR503 10KR2J-3-GP

1 2

R505 Do Not Stuff

12

R523

R523 75R2J-1-GP

75R2J-1-GP

DS

Q501

Q501 LSK3541G1ET2L-GP

LSK3541G1ET2L-GP

H_PROCHOT#_R

1

TP504

TP504 TPAD14-OP-GP

TPAD14-OP-GP

H_CPUPW RGD_R

VDDPWRGOOD

DY

CPU_RST#

1 2

R524 43R2J-GPR524 43R2J-GP

CPU_RST#

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

AUBURNF,CLARKUNF

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

PRDY# PREQ#

TCK

TMS

TRST#

TDI

TDO

DBR#

BPM#[0]

JTAG & BPM

BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

SM_RCOMP_0

AK1

SM_RCOMP_1

A5

SM_RCOMP_2

A4

Signal Routing Guideline: SM_RCOMP keep routing length less than 500 mils.

AP29 AP27

AR26 AR27 AP30

AR28 AP26

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

R506 140R2F-GPR506 140R2F-GP

1 2

R507 25D5R2F-GPR507 25D5R2F-GP

1 2

R508 200R2F-L-GPR508 200R2F-L-GP

1 2

XDP_PRDY# 11

XDP_PREQ# 11 XDP_TCK 11

XDP_TMS 11 XDP_TRST# 11

XDP_TDI 11

XDP_TDO 11

XDP_DBRESET# 11,19,26

XDP_TMS XDP_TDI

XDP_TCK

R520 51R2J-2-GPR520 51R2J-2-GP

1 2

R514 51R2J-2-GPR514 51R2J-2-GP

1 2

R512 51R2J-2-GPR512 51R2J-2-GP

1 2

1D05V_VTT

BOM1

A A

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (THERMAL/CLOCK/PM )

Size Document Number Rev

A3

Date: Sheet of

CPU (THERMAL/CLOCK/PM )

Taipei Hsien 221, Taiwan, R.O.C.

CD1 DIS

5 102Tuesday, December 13, 2011

SC

5

SSID = CPU

CPU1C

4

3

CPU1D

2

1

AB6

M_A_DQ[63:0]15 M_B_DQ[63:0]14

D D

C C

B B

M_A_DQ[63:0]

M_A_BS015 M_A_BS115 M_A_BS215

M_A_CAS#15 M_A_RAS#15 M_A_WE#15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

F10

G10

N10

M10

AG6 AG5

AK6 AK5 AH5 AH6

AJ5 AJ6 AJ8

AK8

AJ9 AK9 AH8 AH9 AL9 AL8

AP11 AN11 AL12 AM12 AM11 AL11 AP12 AN12

AJ14 AH14 AL15 AK15 AL14 AK14

AJ15 AH15

AE10 AF10

AE8 AD9 AF9

C5 D5 D3 D2 D6 C6 C2 C3

F8 G9

F9 F7 G8 G7 K4 K5 K1

J1 J5 J4

J2 K2 M8

N8 N7

M9 N9 M7

V6

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

SA_CK[0]

SA_CKE[0]

SA_CK[1]

SA_CKE[1]

SA_CK[2]

SA_CKE[2]

SA_CK[3]

SA_CKE[3]

SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]

SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

SA_CLK#[0]

SA_CLK#[1]

SA_CLK#[2]

SA_CLK#[3]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

DDR SYSTEM MEMORY A

M_A_DIM0_CLK_DDR0 15 M_A_DIM0_CLK_DDR#0 15 M_A_DIM0_CKE0 15

M_A_DIM0_CLK_DDR1 15 M_A_DIM0_CLK_DDR#1 15 M_A_DIM0_CKE1 15

M_A_DIM0_CS#0 15 M_A_DIM0_CS#1 15

M_A_DIM0_ODT0 15 M_A_DIM0_ODT1 15

M_A_DQS#[7:0] 15

M_A_DQS[7:0] 15

M_A_A[15:0] 15

M_B_DQ[63:0]

M_B_BS014 M_B_BS114 M_B_BS214

M_B_CAS#14 M_B_RAS#14 M_B_WE#14

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

D10

K10

J10

AM5 AM6 AR3

AP3 AN3 AN2 AN1

AP2

AP5 AN9

AT5

AT6

AP6 AN8 AR6 AR5 AR9

AJ11

AT8

AT9

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA9 AA7

AA10

AB8 AB9

C9 A7

C8 A9 A8 D9 D8

G4

F4

F1 G1 G5

F5

F2 G2

J7 J8

K9

J9

K8

K7 M5

N4

N2

N1 M4

N5 M2 M1

R6

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

SB_CLK#[0]

SB_CLK#[1]

SB_CLK#[2]

SB_CLK#[3]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

DDR SYSTEM MEMORY B

SB_CK[0]

SB_CKE[0]

SB_CK[1]

SB_CKE[1]

SB_CK[2]

SB_CKE[2]

SB_CK[3]

SB_CKE[3]

SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3]

SB_ODT[0]

SB_ODT[1] SB_ODT[2] SB_ODT[3]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AE2 AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DIM0_CLK_DDR0 14 M_B_DIM0_CLK_DDR#0 14 M_B_DIM0_CKE0 14

M_B_DIM0_CLK_DDR1 14 M_B_DIM0_CLK_DDR#1 14 M_B_DIM0_CKE1 14

M_B_DIM0_CS#0 14 M_B_DIM0_CS#1 14

M_B_DIM0_ODT0 14 M_B_DIM0_ODT1 14

M_B_DQS#[7:0] 14

M_B_DQS[7:0] 14

M_B_A[15:0] 14

AUBURNF,CLARKUNF

A A

5

4

3

AUBURNF,CLARKUNF

2

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDR)

CD1 DIS

1

6 102Tuesday, December 13, 2011

SC

5

4

3

2

1

SSID = CPU

CPU1E

CFG2

D D

12

R702

R702 1KR2J-1-GP

1KR2J-1-GP

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

1: Normal Operation; Lane # definition matches socket pin map definition

CFG011

0:Lane Reversed

Display Port Presence Strap

CFG4

C C

12

SS_SENSE

R708

R708 49D9R2F-GP

49D9R2F-GP

V

12

R309

R309 49D9R2F-GP

49D9R2F-GP

VAXG_SENSE

SSAXG_SENSE V

12

B B

1: Disabled; No Physical Display Port attached to Embedded Display Port

0: Enabled; An external Display Port device is connected to the Embedded Display Port

VCC_COREVCC_GFXCORE

R376

R376 Do Not Stuff

Do Not Stuff

DY

12

R377

R377 Do Not Stuff

Do Not Stuff

DY

VCC_SENSE

VAXG_SENSE VSSAXG_SENSE VCC_SENSE VSS_SENSE

1

TP715TPAD14-OP-GP TP715TPAD14-OP-GP

CFG2

1

TP717TPAD14-OP-GP TP717TPAD14-OP-GP TP719TPAD14-OP-GP TP719TPAD14-OP-GP TP716TPAD14-OP-GP TP716TPAD14-OP-GP TP718TPAD14-OP-GP TP718TPAD14-OP-GP TP720TPAD14-OP-GP TP720TPAD14-OP-GP TP721TPAD14-OP-GP TP721TPAD14-OP-GP

TP722TPAD14-OP-GP TP722TPAD14-OP-GP

CFG3

1

CFG4

1

CFG5

1

CFG6

1

CFG7

1

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

CFG

VCC_DIE_SENSE

VSS_DIE_SENSE

RSVD_NCTF41 RSVD_NCTF42 RSVD_NCTF43 RSVD_NCTF44 RSVD_NCTF45

RSVD_NCTF46 RSVD_NCTF47

RESERVED

RSVD_NCTF48 RSVD_NCTF49 RSVD_NCTF50

BCLK_ITP#

RSVD_NCTF56 RSVD_NCTF57 RSVD_NCTF58

RSVD28 RSVD29 RSVD30 RSVD31

RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD51 RSVD52

BCLK_ITP

KEY

AH27 AH26

L7 AG7 AE7 AK2

W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AN35 AM35

AT2 AT1 AR1

B1

CPU_NCTF5 CPU_NCTF6

CPU_NCTF7 CPU_NCTF4

TP713 TP714

CPU_NCTF3 CPU_NCTF2

CPU_NCTF1

1

TP705 TPAD14-OP-GPTP705 TPAD14-OP-GP

1

TP706 TPAD14-OP-GPTP706 TPAD14-OP-GP

1

TP707 TPAD14-OP-GPTP707 TPAD14-OP-GP

1

TP704 TPAD14-OP-GPTP704 TPAD14-OP-GP

1

TP713 TPAD14-OP-GPTP713 TPAD14-OP-GP

1

TP714 TPAD14-OP-GPTP714 TPAD14-OP-GP

1

TP703 TPAD14-OP-GPTP703 TPAD14-OP-GP

1

TP702 TPAD14-OP-GPTP702 TPAD14-OP-GP

1

TP701 TPAD14-OP-GPTP701 TPAD14-OP-GP

AUBURNF,CLARKUNF

PCIE Port Bifurcation Straps

CFG[6:5]

CFG7

12

R705

A A

DY

5

R705 Do Not Stuff

Do Not Stuff

PEG DEFER TRAINING

CFG7

11: x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

1: PEG Train immediately following xxRESETB de assertion

0: PEG Wait for BIOS for training

4

3

AUBURNF,CLARKUNF

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (RESERVED)

CD1 DIS

7 102Tuesday, December 13, 2011

1

SC

5

4

POWER

CPU1F

POWER

3

2

1

VCC_CORE

D D

C C

B B

A A

12

VCC CORE:53A

8 x 22 uF at Top Socket Cavity

SC22U6D3V5MX-2GP

12

C

C 849

849

SC22U6D3V5MX-2GP

12

C

C 855

855

5

SC22U6D3V5MX-2GP

C851

12

C828

C850

8 x 22 uF at Top Socket Edge

SC22U6D3V5MX-2GP

12

C856

C857

C852

5 x 10 uF at Bottom Socket Cavity

C864

12

5 x 10 uF at Bottom Socket Cavity

C869

12

SC22U6D3V5MX-2GP

Do Not Stuff

DY

SC22U6D3V5MX-2GP

12

75R2J-1-GP

R801

R801 100R2F-L1-GP-U

100R2F-L1-GP-U

R802

R802 100R2F-L1-GP-U

100R2F-L1-GP-U

1D05V_VTT

SC22U6D3V5MX-2GP

C875

C885

C876

VR_SVID_ALERT# 42

H_CPU_SVIDCLK 42

VCCIO Output Decoupling Recommendation: 3 x 330 uF, 6mΩ 5 x 22 uF & 5 x 0805(no-stuff) MB Bottom Socket Cavity 7 x 22 uF & 2 x 0805(no-stuff) MB Top Socket Catity

Do Not Stuff

ST330U2D5VBM-1-GP

PTC802

12

SC22U6D3V5MX-2GP

12

C886

DY

H_CPU_SVIDDAT

R807

12

H_CPU_SVIDDAT 42

SC22U6D3V5MX-2GP

12

C880

1D05V_VTT

R804 130R2F-1-GPR804 130R2F-1-GP

1 2

1D05V_VTT

12

R805

10R2F-L-GP

VCCIO_SENSE VSSIO_SENSE

12

R806

10R2F-L-GP

VCCSENSE 42 VSSSENSE 42

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (VCC_CORE)

CD1 DIS

8 102Tuesday, December 13, 2011

1

SC

AG35

VCC1

AG34

VCC2

AG33

VCC3

SC22U6D3V5MX-2GP

12

SC22U6D3V5MX-2GP

12

SC10U6D3V5KX-1GP

12

SC10U6D3V5KX-1GP

12

SC22U6D3V5MX-2GP

12

C846

C836

SC22U6D3V5MX-2GP

12

C859

C853

SC10U6D3V5KX-1GP

C862

C863

12

SC10U6D3V5KX-1GP

C868

C867

12

SC22U6D3V5MX-2GP

12

C848

C847

SC22U6D3V5MX-2GP

12

C854

C858

SC10U6D3V5KX-1GP

C861

C860

12

SC10U6D3V5KX-1GP

C865

C866

12

4

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

AUBURNF,CLARKUNF

PEG AND DDR

CORE SUPPLY

VCC_SENSE VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID

3

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7 For CRB VIDALERT# need to pull high 75 ohm close to CPU

H_CPU_SVIDALRT#

AJ29

H_CPU_SVIDCLK

AJ30

H_CPU_SVIDDAT

AJ28

AJ35 AJ34

B10 A10

SC22U6D3V5MX-2GP

12

C870

Do Not Stuff

C881

12

DY

SC22U6D3V5MX-2GP

12

C878

R803 43R2J-GPR803 43R2J-GP

VCCIO:8.5A

SC22U6D3V5MX-2GP

12

C871

Do Not Stuff

C882

12

DY

SC22U6D3V5MX-2GP

12

C879

1 2

VCCIO_SENSE 45 VSSIO_SENSE 45

SC22U6D3V5MX-2GP

12

C874

C872

Do Not Stuff

12

C883

C884

SC22U6D3V5MX-2GP

12

C873

C877

VCC_CORE

2

5

VCC_GFXCORE

D D

C C

B B

1D8V_S0

2 x 22 uF at Top Socket Cavity 4 x 22 uF at Top Socket Edge

SC22U6D3V5MX-2GP

12

C

C 900

900

2 x 22 uF at Bottom Socket Cavity 4 x 22 uF at Bottom Socket Edge

SC22U6D3V5MX-2GP

12

C

C 924

924

SC22U6D3V5MX-2GP

12

C902

C901

SC22U6D3V5MX-2GP

12

C926

C927

12

C931

DY

SC22U6D3V5MX-2GP

12

C906

SC22U6D3V5MX-2GP

12

C921

Do Not Stuff

12

C928

DY

VCCPLL:1.5A

SC1U6D3V3KX-2GP

C905

12

SC10U6D3V5KX-1GP

SC1U6D3V3KX-2GP

C903

C904

12

C904

12

DY

SC1U6D3V3KX-2GP

C920

C908

SC22U6D3V5MX-2GP

12

C922

C923

Do Not Stuff

12

C930

C929

DY

12

PTC901

PTC901 ST330U2D5VBM-1-GP

ST330U2D5VBM-1-GP

NEC, 330uF, 2.5V, B2 ESR=9mΩ Iripple=3.073A

SC22U6D3V5MX-2GP

12

4

AT24 AT23 AT21 AT20 AT18

AT17 AR24 AR23 AR21 AR20 AR18 AR17

AP24

AP23

AP21

AP20

AP18

AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24

AL23

AL21

AL20

AL18

AL17

AK24

AK23

AK21

AK20

AK18

AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17 AH24 AH23 AH21 AH20 AH18 AH17

B6 A6 A2

Ivy Bridge

CPU1G

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

VCCPLL1 VCCPLL2 VCCPLL3

AUBURNF,CLARKUNF

POWER

SENSE

LINES

SA_DIMM_VREFDQ

VREFMISC

SB_DIMM_VREFDQ

GRAPHICS

DDR3 -1.5V RAILS

SA RAIL

1.8V RAIL

VAXG_SENSE

VSSAXG_SENSE

SM_VREF

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

VCCSA_SENSE

VCCSA_VID[0] VCCSA_VID[1]

VCCIO_SEL

3

Refer to the latest Huron River Mainstream PDG (Doc# 436735) for more details on S3 power reduction implementation.

+V_SM_VREF_CNT should have 10 mil trace width

AK35 AK34

AL1

B4 D1

Routing Guideline: Power from DDR_VREF_S3 and +V_SM_VREF_CNT should have 10 mils trace width.

1D5V_VDDQ

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

M27 M26 L26 J26 J25 J24 H26 H25

H23

C22 C24

A19

12

VCCA:6A

12

SC10U6D3V5KX-1GP

C909

12

SC10U6D3V5KX-1GP

C916

12

4

1

VCC_AXG_SENSE 42 VSS_AXG_SENSE 42

DDR_WR_VREF01 12 DDR_WR_VREF02 12

VDDQ:12A

SC10U6D3V5KX-1GP

C910

C911

12

SC10U6D3V5KX-1GP

C917

C918

12

VCCSA_SENSE 48

VCCSA_SEL0 48 VCCSA_SEL1 48

RN901

RN901 SRN1KJ-7-GP

SRN1KJ-7-GP

2 3

C1203

12

NEC, 330uF, 2.5V, B2 ESR=9mΩ Iripple=3.073A

12

Do Not Stuff

DY

SC10U6D3V5KX-1GP

C913

C912

12

NEC, 330uF, 2.5V ESR=6mΩ Iripple=4.563A

PTC903

PTC903 ST330U2D5VBM-1-GP

ST330U2D5VBM-1-GP

2

11/28 Wistron ORB change to 100ohm (64.10005.6DL), need verify

1D5V_S0

R1214

R1214 1KR2F-3-GP

1KR2F-3-GP

1 2

12

DY

VDDQ Output Decoupling Recommendation: 1 x 330 uF, 6mΩ 6 x 10 uF (0805)

12

R1215

R1215 1KR2F-3-GP

1KR2F-3-GP

Do Not Stuff

1 2

C1204

PR901

ST330U2D5VBM-1-GP

D01RL0816F-L-GP

PTC902

12

1 2

SC10U6D3V5KX-1GP

C914

7/19 Wire to GND

VCCSA

VCCSA Output Decoupling Recommendation: 1 x 330 uF, 6mΩ 2 x 10 uF at Bottom Socket Cavity 1 x 10 uF at Bottom Socket Edge

VCC_AXG_SENSE VSS_AXG_SENSE

1D5V_S0

12

C934

12

SCD1U10V2KX-5GP

C933

SCD1U10V2KX-5GP

VCC_GFXCORE

12

R906

R906 10R2F-L-GP

10R2F-L-GP

12

R907

R907 10R2F-L-GP

10R2F-L-GP

12

C932

SCD1U10V2KX-5GP

1

C925

SCD1U10V2KX-5GP

R723 Do Not Stuff

VCCPLL Output Decoupling Recommendation: 1 x 330 uF, 6mΩ 2 x 1 uF (0402) 1 x 10 uF (0805)

A A

5

4

9/2 VCCIO_SEL

3

R723 Do Not Stuff

1 2

DY

12

R8765

R8765 Do Not Stuff

Do Not Stuff

VCCIO_SEL 45

9/1 IVY Bridge ES1: remove PR4505 Sandy Bridge: remove R8765 (SDV)

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

CPU (VCC_GFXCORE)

Taipei Hsien 221, Taiwan, R.O.C.

CD1 DIS

9 102Tuesday, December 13, 2011

1

SC

5

4

3

2

1

SSID = CPU

CPU1H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

D D

C C

B B

AT19 AT16 AT13 AT10

AT7 AT4

AT3 AR25 AR22 AR19 AR16 AR13 AR10

AR7

AR4

AR2

AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AP7

AP4

AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AN7

AN4 AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7

AM4

AM3

AM2

AM1

AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AL7

AL4

AL2

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AK7

AK4

AJ25

VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

Ivy Bridge Ivy Bridge

AJ22

VSS81

AJ19

VSS82

AJ16

VSS83

AJ13

VSS84

AJ10

VSS85

AJ7

VSS86

AJ4

VSS87

AJ3

VSS88

AJ2

VSS89

AJ1

VSS90

AH35

VSS91

AH34

VSS92

AH32

VSS93

AH30

VSS94

AH29

VSS95

AH28

VSS96

AH25

VSS98

AH22

VSS99

AH19

VSS100

AH16

VSS101

AH7

VSS102

AH4

VSS103

AG9

VSS104

AG8

VSS105

AG4

VSS106

AF6

VSS107

AF5

VSS108

AF3

VSS109

AF2

VSS110

AE35

VSS111

AE34

VSS112

AE33

VSS113

AE32

VSS114

AE31

VSS115

AE30

VSS116

AE29

VSS117

AE28

VSS118

VSS

VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 M34

H33 H30 H27 H24 H21 H18 H15 H13 H10

G35 G32 G29 G26 G23 G20 G17 G11

T35 T34 T33 T32 T31 T30 T29 T28 T27 T26

L33 L30 L27

K35 K32 K29 K26 J34 J31

F34 F31 F29

CPU1I

VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233

VSS

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

AUBURNF,CLARKUNF

A A

5

4

3

AUBURNF,CLARKUNF

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (VSS)

CD1 DIS

SC

10 102Tuesday, December 13, 2011

1

SC

5

4

3

2

1

In production, All of parts should be not moounted except of pulldown 51 ohm on TRSTn and Pullup DBR#.

3D3V_S0 1D05V_VTT

D D

R1102

1KR2J-1-GP

12

R1107

R1107 51R2J-2-GP

51R2J-2-GP

12

R1101

R1101 51R2J-2-GP

51R2J-2-GP

XDP

27

1 2

3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

28

Do Not Stuff

CXDP1

DY

CPU XDP SFF 26pin IF Pin 1 OBSFN_A0 (PREQ#, I/O) Pin 2 OBSFN_A1 (PRDY#, I/O) Pin 3 GND Pin 4 OBSDATA_A0 (Open, I/O) Pin 5 OBSDATA_A1 (Open, I/O) Pin 6 GND Pin 7 OBSDATA_A2 (Open, I/O) Pin 8 OBSDATA_A3 (Open, I/O) Pin 9 GND Pin 10 HOOK0 (PWRGD, In) Pin 11 HOOK1 (BP_PWRGD_RST#, Out) Pin 12 HOOK2 (CFG0, Out) Pin 13 HOOK3 (vr_READYSYS_PWROK,Out) Pin 14 HOOK4 (BCLK, In) Pin 15 HOOK5 (BCLK#, In) Pin 16 VCCOBS_AB (VCCP Voltage of CPU, In) Pin 17 HOOK6 (RESET#, Out) Pin 18 HOOK7 (DBR#, Out) Pin 19 GND Pin 20 TDO, In Pin 21 TRST#, Out Pin 22 TDI, Out Pin 23 TMS, Out Pin 24 TCK1 (Open) Pin 25 GND Pin 26 TCK0 ,Out

12

SIGNAL REF DES

TDO TRST# DBRESET# PLT_RST# CFG0 CPUPWRGD

C C

SYS_PWROK

R1101 R1107 ASM ASM R1102 R1106 R1104 R1103 R1105 CXDP1

ENABLE

ASM NOASM

ASM ASM ASM ASM ASM ASM

DISABLE

ASM NOASM NOASM NOASM NOASM NOASM

LOGIC

XDP_PREQ#5

XDP_PRDY#5

R1103 1KR2J-1-GP

1 2

XDP

H_CPUPW RGD5,22,36

CFG07

SYS_PWROK19,36 PCIE_CLK_XDP_P18 PCIE_CLK_XDP_N18

PLT_RST#5,21,27,31,36,65,66,71,77,80,82,83

XDP_DBRESET#5,19,26

XDP_TDO5

XDP_TRST#5

XDP_TDI5 XDP_TMS5

XDP_TCK5

XDP

R1104 1KR2J-1-GP

1 2

XDP

R1105 0R2J-2-GP

1 2

XDP

R1106 1KR2J-1-GP

1 2

XDP

9/2 CPU_XDP

B B

A A

5

4

3

2

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU_XDP

CD1 DIS

11 102Tuesday, December 13, 2011

1

SC

5

4

3

VREF circuit -M1 (Voltage Driver Network) & M3 (Driven by Processor) Implementation

2

1

D D

C C

B B

1D5V_S3

1 2

R1201

R1201 1KR2F-3-GP

1KR2F-3-GP

R1202

R1202 1KR2F-3-GP

1KR2F-3-GP

DRAMRST_CNTRL_PCH18,37

1D5V_S3

1 2

R1205

R1205 1KR2F-3-GP

1KR2F-3-GP

R1206

R1206 1KR2F-3-GP

1KR2F-3-GP

M_VREF_DQ_DIMM0

R1203 0R0402-PAD-1-GPR1203 0R0402-PAD-1-GP

DDR_WR_VREF019

QC/XE can prvide Vref to DIMM

DDR_WR_VREF029

R1226 Do Not Stuff

12

DY

12

DS

U1201

U1201 LSK3541G1ET2L-GP

LSK3541G1ET2L-GP

G

M_VREF_DQ_DIMM1

R1207 0R0402-PAD-1-GPR1207 0R0402-PAD-1-GP

R1208 Do Not Stuff

12

DY

12

DS

U1202

U1202 LSK3541G1ET2L-GP

LSK3541G1ET2L-GP

QC/XE can prvide Vref to DIMM

A A

5

4

G

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

M3

CD1 DIS

SC

12 102Tuesday, December 13, 2011

1

SC

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

CD1 DIS

13 102Tuesday, December 13, 2011

1

SC

5

SSID = MEMORY

M_B_BS26 M_B_BS06

M_B_BS16

M_B_DQ[63:0]6

12

RF

C1427

C1427 SC33P50V3JN-GP

SC33P50V3JN-GP

M_B_DQS#[7:0] 6 M_B_DQS[7:0] 6

M_B_DIM0_ODT06 M_B_DIM0_ODT16

DDR_VREF_S3

M_VREF_DQ_DIMM1

DDR3_DRAMRST#15,37

M_B_A[15:0] 6

0D75V_S0

D D

20101231

C C

12

1419

1419 C

C

SC1U6D3V2KX-GP

5

Place these caps close to VTT1 and VTT2.

12

C1420

DY

Do Not Stuff

DDR_VREF_S3M_VREF_DQ_DIMM1

12

C1425

SCD1U10V2KX-5GP

12

C1418

Do Not Stuff

C1422

C1421

DY

Do Not Stuff

SC1U6D3V2KX-GP

12

C1426

SC2D2U6D3V2MX-GP

0D75V_S0

B B

12

C1423

C1424

S

CD1U10V2KX-5GP

C2D2U6D3V2MX-GP

A A

C2D2U6D3V2MX-GP

4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

4

H =4mm

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-144-GP-U1

RAS#

WE#

CAS# CS0#

CS1# CKE0

CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

3

NP1

NP2

110 113 115

114 121

73 74

101

CK0

103 102

CK1

104 11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198 199

SA0_DIM1

197

SA0 SA1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SA1_DIM1

201 77

122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

1D5V_S3

M_B_RAS# 6 M_B_WE# 6 M_B_CAS# 6

M_B_DIM0_CS#0 6 M_B_DIM0_CS#1 6

M_B_DIM0_CKE0 6 M_B_DIM0_CKE1 6

M_B_DIM0_CLK_DDR0 6 M_B_DIM0_CLK_DDR#0 6

M_B_DIM0_CLK_DDR1 6 M_B_DIM0_CLK_DDR#1 6

SMB_DATA 15,18,66,69 SMB_CLK 15,18,66,69

TS#_DIMM0_1 15

12

C1401

C1401 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

PART NUMBER

62.10017.S51

1110 X02 Modify: DM2 1st change to 62.10017.P61; 2nd change to 62.10017.N41 on ST stage from ME updated connector list.

3

3D3V_S0

12

C1402

C1402 Do Not Stuff

Do Not Stuff

DY

Layout Note: Place these Caps near SO-DIMMB.

Height TYPE

4mm

REVERSED

1D5V_S3

2

SA1_DIM1 SA0_DIM1

20110209

ST330U2D5VBM-1-GP

12

2

3D3V_S0

TC1401

C1414

12

SCD1U10V2KX-5GP

R1402

R1402 10KR2J-3-GP

10KR2J-3-GP

R1401

R1401 10KR2J-3-GP

10KR2J-3-GP

12

C1403

12

C1415

Thermal EVENT

TS#_DIMM0_1

SODIMM B DECOUPLING

12

SC10U6D3V5KX-1GP

12

SCD1U10V2KX-5GP

R1403 10KR2J-3-GPR1403 10KR2J-3-GP

12

C1404

C1405

SC10U6D3V5KX-1GP

12

C1417

C1416

SC1U6D3V2KX-GP

1 2

12

SC10U6D3V5KX-1GP

SC1U6D3V2KX-GP

1

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

SO-DIMMB is placed farther from the Processor than SO-DIMMA

3D3V_S0

12

C1407

C1408

Custom

C1408

SC10U6D3V5KX-1GP

C1406

SC10U6D3V5KX-1GP

Decoupling cap 1x330uF 6x10uF

BOM1

Title

Size Document Number Rev

Date: Sheet of

12

C1410

C1409

DY

SC10U6D3V5KX-1GP

DDR3 SO-DIMM2

Do Not Stuff

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CD1 DIS

1

14 102Tuesday, December 13, 2011

SC

5

SSID = MEMORY

D D

20101231

C C

B B

0D75V_S0

DY

12

C1517

S

S CD1U10V2KX-5GP

CD1U10V2KX-5GP

A A

12

C1504

1518

1518 C

C

Do Not Stuff

S

S C2D2U6D3V2MX-GP

C2D2U6D3V2MX-GP

5

Place these caps close to VTT1 and VTT2.

12

C1519

C1520

DY

Do Not Stuff

SC1U6D3V2KX-GP

DDR_VREF_S3M_VREF_DQ_DIMM0

12

C1503

SCD1U10V2KX-5GP

12

C1522

SC2D2U6D3V2MX-GP

C1523

C1521

DY

SC1U6D3V2KX-GP

M_A_DQ[63:0]6

12

C1524

DY

Do Not Stuff

M_A_DIM0_ODT06 M_A_DIM0_ODT16

DDR_VREF_S3

M_VREF_DQ_DIMM0

DDR3_DRAMRST#14,37

M_A_BS26 M_A_BS06

M_A_BS16

Do Not Stuff

4

DM1

M_A_A0 M_A_A1 M_A_A2 M_A_A3

M_A_A[15:0] 6 M_A_WE# 6

M_A_DQS#[7:0] 6 M_A_DQS[7:0] 6

0D75V_S0

M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

H =7.0mm

4

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-138-GP

62.10024.F31

NP1 NP2

RAS#

WE#

CAS#

CS0# CS1#

CKE0 CKE1

CK0

CK0#

CK1

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA SCL

EVENT#

VDDSPD

SA0 SA1

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

3

NP1 NP2

110 113 115

114 121

73 74

101 103

102 104

11 28 46 63 136 153 170 187

200 202

198 199

SA0_DIM0

197

SA1_DIM0

201 77

122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

1D5V_S3

3

M_A_RAS# 6 M_A_CAS# 6 M_A_DIM0_CS#0 6

M_A_DIM0_CS#1 6 M_A_DIM0_CKE0 6

M_A_DIM0_CKE1 6 M_A_DIM0_CLK_DDR0 6

M_A_DIM0_CLK_DDR#0 6 M_A_DIM0_CLK_DDR1 6

M_A_DIM0_CLK_DDR#1 6

SMB_DATA 14,18,66,69 SMB_CLK 14,18,66,69

TS#_DIMM0_1 14

Layout Note: Place these Caps near SO-DIMMA.

PART NUMBER

62.10017.K91

1110 X02 Modify: DM1 1st change to 62.10017.Q41; 2nd change to 62.10017.N11 on ST stage from ME updated connector list.

12

1D5V_S3

C1501

SCD1U10V2KX-5GP

ST330U2D5VBM-1-GP

TC1501

12

Height TYPE

7.0mm

2

SA1_DIM0 SA0_DIM0

12

R1502

R1502 10KR2J-3-GP

10KR2J-3-GP

3D3V_S0

12

C1502

C1502 Do Not Stuff

Do Not Stuff

DY

20110209

SODIMM A DECOUPLING

12

C1505

SC10U6D3V5KX-1GP

12

C1511

SCD1U10V2KX-5GP

12

C1512

C1513

SCD1U10V2KX-5GP

REVERSED

2

1

R1501

R1501 10KR2J-3-GP

10KR2J-3-GP

1 2

12

C1506

SC10U6D3V5KX-1GP

12

C1514

SCD1U10V2KX-5GP

C1508

C1507

SC10U6D3V5KX-1GP

Decoupling cap 1x330uF 6x10uF

BOM1

Title

Size Document Number Rev

Custom

Date: Sheet of

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 0, SA1_DIM0 = 1 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32

12

C1509

C1510

SC10U6D3V5KX-1GP

DDR3 SO-DIMM1

CD1 DIS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

15 102Tuesday, December 13, 2011

1

SC

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

CD1 DIS

16 102Tuesday, December 13, 2011

1

SC

A

B

C

D

E

SSID = PCH

RTC_X1

1 2

R1704 10MR2J-L-GPR1704 10MR2J-L-GP

X1701

X-32D768KHZ-34GPU

4 4

1703

1703 C

C

SC15P50V2JN-2-GP

3 3

+3VS_+1.5VS_HDA_IO

3D3V_S0

2 2

X-32D768KHZ-34GPU

1

12

2 3

HDA_CODEC_SYNC29 HDA_CODEC_SDOUT29

HDA_CODEC_RST#29 HDA_CODEC_BITCLK29

R1715 Do Not Stuff

1 2

DY

NO REBOOT STRAP

R1717 Do Not Stuff

1 2

DY

+3VS_+1.5VS_HDA_IO

R1721 1KR2J-1-GPR1721 1KR2J-1-GP

This signal has a weak internal pull down. On Die PLL VR is supplied by 1.5V when sampled high, 1.8 V when sampled low. Needs to be pulled High for Huron River platform. co-operate with R2310

1 2

PLL ODVR VOLTAGE

HDA_SYNC

3D3V_S5

R1731

DY

Do Not Stuff

HDA_SYNC

1 1

Low = 1.8V (Default) High = 1.5V

84.2N702.J31

12

2ND = 84.2N702.031

Q1701

D

2N7002K-2-GP

5V_S0

A

RTC_X2

4

12

C1701

C1701 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

DY

R1712Do Not Stuff

12

R171333R2J-2-GP R171333R2J-2-GP

12

RN1702

2 3 1

4

SRN33J-5-GP-U

Flash Descriptor Security Overide

HDA_SDOUT

PCH_BEEP

S

G

12

HDA_SPKR

HDA_SYNC

R1735

R1735 1MR2J-1-GP

1MR2J-1-GP

RTC_AUX_S5

HDA_SYNC HDA_SDOUT

HDA_RST# HDA_BITCLK

Low = Default High = Enable

No Reboot Strap

Low = Default High = No Reboot

R1733

1 2

33R2J-2-GP

SC1U6D3V2KX-GP

HDA_CODEC_SYNCHDA_CODEC_SYNC_L

R1702

20KR2J-L2-GP

1 2

R1703

20KR2J-L2-GP

C1704

12

RTC_AUX_S5

12

C1702

C1702 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

INTVRMEN- Integrated SUS

1.05V VRM Enable High - Enable internal VRs Low - Enable external VRs

R1710 1MR2J-1-GPR1710 1MR2J-1-GP

1 2

R1711 330KR2F-L-GPR1711 330KR2F-L-GP

1 2

PCH_BEEP29

HDA_SDIN029

RTC_X1 RTC_X2 RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INTVRMEN

HDA_BITCLK HDA_SYNC

HDA_RST#

Notes: ME_UNLOCK (HDA_SDO) connect to EC. Make sure EC drive this pin "low" all the time.

1 2 1 2

1 2

HDA_SDOUT

SPI_CS0#_RHDA_CODEC_BITCLK

EC1703

1 2

DY

Do Not Stuff

DGPU_PRSNT#

PCH_SPI_CLK PCH_SPI_CS0#

PCH_SPI_SI

R1714 1KR2J-1-GPR1714 1KR2J-1-GP

ME_UNLOCK27

SPI_CLK_R27,60 SPI_CS0#_R27,60

SPI_SI_R27,60

SPI_SO_R27,60

HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this signal on the board. Signal may have leakage paths via powered off devices (Audio Codec) and hence contend with the external pull-up. A blocking FET is recommended in such a case to isolate HDA_SYNC from the Audio Codec device until after the Strap sampling is complete.

EC1701

1 2

DY

Do Not Stuff

B

1 2

PCH_JTAG_TCK_BUF26 PCH_JTAG_TMS26 PCH_JTAG_TDI26 PCH_JTAG_TDO26

R1719 33R2J-2-GPR1719 33R2J-2-GP R1722 0R2J-2-GPR1722 0R2J-2-GP

R1723 33R2J-2-GPR1723 33R2J-2-GP

HDA_CODEC_SDOUT

EC1702

1 2

DY

Do Not Stuff

1 OF 10

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LPC

FWH4/LFRAME#

LDRQ1#/GPIO23

SATA 6G

SATA

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATA0GP/GPIO21 SATA1GP/GPIO19

H_RCIN# H_A20GATE

INT_SERIRQ

1 OF 10

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP

SATA0TXN SATA0TXP

SATA1RXN SATA1RXP

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP

SATA2TXN SATA2TXP

SATA3RXN SATA3RXP

SATA3TXN SATA3TXP

SATA4RXN SATA4RXP

SATA4TXN SATA4TXP

SATA5RXN SATA5RXP

SATA5TXN SATA5TXP

SATALED#

1 2

C38 A38 B37 C37

D36 E36

K36 V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11 Y10

AB12 AB13

AH1

P3 V14 P1

RN1701

1 2 3 4 5

SRN10KJ-6-GP

R1701

D

LPC_AD0 LPC_AD1 LPC_AD2

LPC_FRAME#

SATA4_TXN_C SATA4_TXP_C

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_GPIO21_R

GPIO19

8 7 6

8K2R2F-1-GP

PCH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN#/GPIO33

N32

HDA_DOCK_RST#/GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-GP-NF

CLKREQ_WLAN#18,65

H_RCIN#22,27 H_A20GATE22,27

C

RTCIHDA

JTAG

SPI

LPC_FRAME#

R1705 22R2J-2-GPR1705 22R2J-2-GP

1 2

R1706 22R2J-2-GPR1706 22R2J-2-GP

1 2

R1707 22R2J-2-GPR1707 22R2J-2-GP

1 2

R1708 22R2J-2-GPR1708 22R2J-2-GP

1 2

R1709 22R2J-2-GPR1709 22R2J-2-GP

1 2

C1705 SCD01U16V2KX-3GPC1705 SCD01U16V2KX-3GP

1 2

C1706 SCD01U16V2KX-3GPC1706 SCD01U16V2KX-3GP

Place to near connector

R1716 37D4R2F-GPR1716 37D4R2F-GP

1 2

R1718 49D9R2F-GPR1718 49D9R2F-GP

1 2

R1720 750R2F-GPR1720 750R2F-GP

1 2

R1724

12

0R0402-PAD-1-GP

1

TP1701 TPAD14-OP-GPTP1701 TPAD14-OP-GP

PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TCK_BUF PCH_JTAG_TMS PCH_JTAG_TDI

3D3V_S0

PCH_JTAG_TDO

BOM1

Title

Size Document Number Rev

A3

Date: Sheet of

LPC_AD[3..0] 71 LPC_FRAME# 71

LPC_TPM_AD0 LPC_TPM_AD1 LPC_TPM_AD2 LPC_TPM_AD3LPC_AD3

LPC_FRAME_TPM# 27,65,77

DTPM_PRESENCE# 77 INT_SERIRQ 27,65,77

LPC_DREQ0# 65

SATA_RXN0 56 SATA_RXP0 56 SATA_TXN0 56 SATA_TXP0 56

SATA_RXN1 56 SATA_RXP1 56 SATA_TXN1 56 SATA_TXP1 56

SATA_RXN2 66 SATA_RXP2 66 SATA_TXN2 66 SATA_TXP2 66

SATA_RXN4 94 SATA_RXP4 94 SATA_TXN4 94DGPU_PRSNT#18 SATA_TXP4 94

DOCKING

1D05V_S0

PCH_GPIO21

R1726 210R2F-L-GP

R1726 210R2F-L-GP R1727 210R2F-L-GP

R1727 210R2F-L-GP R1728 210R2F-L-GP

R1728 210R2F-L-GP R1729 51R2J-2-GP

R1729 51R2J-2-GP R1730 100R2J-2-GP

R1730 100R2J-2-GP R1732 100R2J-2-GP

R1732 100R2J-2-GP R1734 100R2J-2-GP

R1734 100R2J-2-GP

PCH : HDA/JTAG/SATA

DRIVE_LED# 82 PCH_GPIO21 18

1 2

PCH_XDP

1 2

PCH_XDP

1 2

PCH_XDP

1 2

PCH_XDP

1 2

PCH_XDP

1 2

PCH_XDP

1 2

PCH_XDP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CD1 DIS

E

LPC_TPM_AD[3..0] 27,65,77

HDD

ODD

mSATA

3D3V_S5

SC

17 102Tuesday, December 13, 2011

SC

A

SSID = PCH

If PCIE port 1 is disabled, it will cause all PCIE port disabled

PCIE_RXN182

PCIE_RXP182

PCIE_TXN182

4 4

3 3

2 2

1 1

PCIE_TXP182

PCIE_RXN265

PCIE_RXP265 PCIE_TXN265 PCIE_TXP265

PCIE_RXN382

PCIE_RXP382 PCIE_TXN382 PCIE_TXP382

PCIE_RXN431

PCIE_RXP431 PCIE_TXN431 PCIE_TXP431

Card Reader CLK

CLK_PCIE_MCC#82 CLK_PCIE_MCC82

CLKREQ_MCC#82

CLK_PCIE_WLAN#65

RN1801

1

2

3

4 5

SRN10KJ-6-GP

SRN10KJ-6-GP RN1814

RN1814

1

2

3

4 5

SRN10KJ-6-GP

1 2 3

SRN10KJ-5-GP

CLK_PCIE_WLAN65 CLKREQ_WLAN#17,65

CLK_PCIE_NEW#82 CLK_PCIE_NEW82

CLKREQ_NEW#22,82

CLK_PCIE_LAN#31 CLK_PCIE_LAN31

CLKREQ_LAN#19,31

RN1816

WLAN CLK

EXC CLK

LAN CLK

3D3V_S5

3D3V_S0 3D3V_S0

PCIECLKRQ1# and PCIECLKRQ2#

C1805 SCD1U10V2KX-5GPC1805 SCD1U10V2KX-5GP

1 2

C1802 SCD1U10V2KX-5GPC1802 SCD1U10V2KX-5GP

1 2

C1803 SCD1U10V2KX-5GPC1803 SCD1U10V2KX-5GP

1 2

C1804 SCD1U10V2KX-5GPC1804 SCD1U10V2KX-5GP

1 2

C1806 SCD1U10V2KX-5GPC1806 SCD1U10V2KX-5GP

1 2

C1807 SCD1U10V2KX-5GPC1807 SCD1U10V2KX-5GP

1 2

C1801 SCD1U10V2KX-5GPC1801 SCD1U10V2KX-5GP

1 2

C1809 SCD1U10V2KX-5GPC1809 SCD1U10V2KX-5GP

1 2

PCIE_CLK_RQ6#

8

PCH_GPIO26

7

PCIE_CLK_RQ5#

6

PCH_GPIO74

PCH_GPIO24

8

PEG_B_CLKRQ#

7

BATLOW #

6

EC_SWI#

4

SRN0J-6-GP

PCH_GPIO24 22 BATLOW # 19

PCIE_CLK_RQ7#22

PCIE_CLK_XDP_N11 PCIE_CLK_XDP_P11

RN1807

1 2 3

RN1808

2 3 1

RN1815

2 3 1

RN1811

2 3 1

PCH_GPIO0 22 PCH_GPIO21 17

Support S0 power only

A

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN3_C PCIE_TXP3_C

PCIE_TXN4_C PCIE_TXP4_C

CLK_PCH_SRC0_N

4

CLK_PCH_SRC0_P

CLK_PCH_SRC1_N CLK_PCH_SRC1_P

4

CLK_PCH_SRC2_N CLK_PCH_SRC2_P

4

CLK_PCH_SRC3_N CLK_PCH_SRC3_P

4

PCH_GPIO26

PCIE_CLK_RQ5#

PEG_B_CLKRQ#

PCIE_CLK_RQ6#

PCIE_CLK_RQ7#

B

PCH1B

BG34

PERN1

BJ34

PERP1

AV32

AU32

BE34 BF34 BB32 AY32

BG36

BJ36 AV34

AU34

BF36 BE36 AY34 BB34

BG37 BH37

AY36 BB36

BJ38 BG38 AU36

AV36 BG40

BJ40

AY40

BB40

BE38 BC38

AW38

AY38

Y40 Y39

AB49

AB47

AA48

AA47

V10

Y37 Y36

Y43 Y45

L12

V45 V46

L14

AB42

AB40

V40 V42

T13 V38

V37 K12

AK14

AK13

– Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3 – Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 and FLEX2 if more than 2 PCI clocks + PCI loopback are routed.

Card Reader

PETN1 PETP1

PERN2 PERP2

WLAN

PETN2 PETP2

PERN3 PERP3

NEW CARD

PETN3 PETP3

PERN4 PERP4

LAN

PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6 PERP6 PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

CLKOUT_PCIE0N CLKOUT_PCIE0P

J2

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

M1

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

PCIECLKRQ2#/GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4#/GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

PCIECLKRQ5#/GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ#/GPIO56

CLKOUT_PCIE6N CLKOUT_PCIE6P

PCIECLKRQ6#/GPIO45 CLKOUT_PCIE7N

CLKOUT_PCIE7P PCIECLKRQ7#/GPIO46 CLKOUT_ITPXDP_N

CLKOUT_ITPXDP_P

PANTHER-GP-NF

B

PCI-E*

SMBUSController

CLOCKS

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SML1ALERT#/PCHHOT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

Link

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKOUT_DMI_P

CLKOUT_DP_N

CLKOUT_DP_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N

CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

CLKIN_PCILOOPBACK

XCLK_RCOMP

CLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67

FLEX CLOCKS

2 OF 10

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

CLKIN_DMI_N CLKIN_DMI_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

C

E12 H14 C9

A12 C8 G12

C13 E14 M16

M7

T11

P10

M10

AB37 AB38

AV22 AU22

AM12 AM13

BF18 BE18

BJ30 BG30

G24 E24

AK7 AK5

K45

H45

V47 V49

Y47

K43 F47 H47 K49

C

EC_SWI#

1

SML0_CLK SML0_DATA

PCH_GPIO74 SML1_CLK SML1_DATA

CL_CLK

CL_DATA

CL_RST#

PEG_CLKREQ#_IN

CLK_BUF_EXP

CLK_BUF_CPYCLK

CLK_BUF_DOT96

CLK_BUF_CKSSCD

CLK_BUF_REF14

XTAL25_IN XTAL25_OUT

XCLK_RCOMP

PEG_CLKREQ#83

TP1806 TPAD14-OP-GPTP1806 TPAD14-OP-GP

PCH_SMBCLK 66,80 PCH_SMBDATA 66,80

DRAMRST_CNTRL_PCH 12,37

1

R1815 10KR2J-3-GPR1815 10KR2J-3-GP

R1816 10KR2J-3-GPR1816 10KR2J-3-GP

R1817 10KR2J-3-GPR1817 10KR2J-3-GP

R1818 10KR2J-3-GPR1818 10KR2J-3-GP

R1812 10KR2J-3-GPR1812 10KR2J-3-GP

R1811 90D9R2F-1-GPR1811 90D9R2F-1-GP

PEG_CLKREQ#_IN

SML1_CLK 27 SML1_DATA 27

TP1803 TPAD14-OP-GPTP1803 TPAD14-OP-GP

TP1804 TPAD14-OP-GPTP1804 TPAD14-OP-GP

TP1805 TPAD14-OP-GPTP1805 TPAD14-OP-GP

CLK_PCIE_VGA# 83 CLK_PCIE_VGA 83

CLK_CPU_N 5 CLK_CPU_P 5

1 2

CLK_PCI_FB 21

1 2

DOCKID0

R1822 4K7R2J-2-GPR1822 4K7R2J-2-GP

DOCKID1

R1823 4K7R2J-2-GPR1823 4K7R2J-2-GP

DOCKID2

R1824 4K7R2J-2-GPR1824 4K7R2J-2-GP

DOCKID3

R1825 4K7R2J-2-GPR1825 4K7R2J-2-GP

D27

A K

1SS400GGT2R-GP

SWG

DGPU_PW ROK22,92,93

DOCKID0 94 DOCKID1 94 DOCKID2 94 DOCKID3 94

D

12

R1803

R1803 100KR2F-L1-GP

100KR2F-L1-GP

1D05V_VTT

12 12 12 12

D

D22

1SS400GGT2R-GP

PCH_SMBDATA

PCH_SMBCLK

3D3V_S5

12

AK

D

G

3D3V_S0

XTAL25_IN

XTAL25_OUT

BOM1

Title

Size Document Number Rev

Date: Sheet of

9/25 add

R1802

R1802 10KR2J-3-GP

10KR2J-3-GP

84.2N702.J31

2nd = 84.2N702.031

Q2704

Q2704 2N7002K-2-GP

2N7002K-2-GP

SWG

S

RN1806

2 3 1

SRN2K2J-1-GP

6 5

3D3V_S0 3D3V_S0

12

R1807

12

R1809

DY

A3

PCH_SMBCLK PCH_SMBDATA

SML0_DATA SML0_CLK

SML1_CLK SML1_DATA

CLKREQ_MCC#

DRAMRST_CNTRL_PCH

4

2nd = 84.DM601.03F

84.2N702.A3F

2N7002KDW-GP

1 2 34

Q1801

12

R1806

R1806 1MR2J-1-GP

1MR2J-1-GP

12

R1808

UMA

DGPU_PRSNT#

10KR2J-3-GP

12

R1810

SWG

Do Not Stuff

10KR2J-3-GP

PCH : PCIE/SMBUS/CLK

2 3

82.30020.D41

2nd = 82.30020.G71

3rd = 82.30020.G61

GPIO69

CD1 DIS

E

23 1

4

23 1

4 2 3

1

4

1 2

R1805 10KR2J-3-GPR1805 10KR2J-3-GP

1 2

R1804 1KR2J-1-GPR1804 1KR2J-1-GP

C1808

X1801

SC12P50V2JN-3GP

41

C1810

XTAL-25MHZ-155-GP

UMA_DISCRETE# UMA: 1 1 DIS :0 1 SG(PX) : 0 0 Optimus(Muxless) : 1 0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

C1810

SC12P50V2JN-3GP

GPIO69 22 DGPU_PRSNT# 17

18 102Tuesday, December 13, 2011

E

3D3V_S5

RN1802

RN1802 SRN2K2J-1-GP

SRN2K2J-1-GP RN1803

RN1803 SRN2K2J-1-GP

SRN2K2J-1-GP RN1804

RN1804 SRN2K2J-1-GP

SRN2K2J-1-GP

SMB_DATA 14,15,66,69

SMB_CLK 14,15,66,69

12

SC

A

Signal Routing Guideline: DMI_ZCOMP keep W=4 mils and routing length less than 500 mils. DMI_IRCOMP keep W=4 mils and routing length less than 500 mils.

4 4

3 3

1 2

DY

Do Not Stuff

1 2

100KR2J-1-GP

S0_PWR_GOOD after PM_SLP_S3# delay 200 ms

2 2

3D3V_S5

R1910 10KR2J-3-GPR1910 10KR2J-3-GP

1 1

R1909 10KR2J-3-GPR1909 10KR2J-3-GP R1922 Do Not Stuff

R1922 Do Not Stuff R1920 10KR2J-3-GPR1920 10KR2J-3-GP

R1908 10KR2J-3-GPR1908 10KR2J-3-GP

R1926

R1926 R1904

R1904

XDP_DBRESET#5,11,26

SYS_PWROK11,36

S0_PWR_GOOD27,94

PM_DRAM_PWRGD5,37

PM_RSMRST#26

SUS_PW R_ACK22

PM_PWRBTN#26,27

AC_PRESENT27

BATLOW #18

RN1901

1 2 3 4 5

SRN10KJ-6-GP

1 2 1 2

DY

1 2

SYS_PWROK

PWROK

8 7 6

12

A

SSID = PCH

1D05V_VTT

R1901 49D9R2F-GPR1901 49D9R2F-GP

1 2

R1902 750R2F-GPR1902 750R2F-GP

1 2

R1916 0R2J-2-GPR1916 0R2J-2-GP

1 2

R1914 0R2J-2-GPR1914 0R2J-2-GP

1 2

R1930 0R2J-2-GPR1930 0R2J-2-GP

1 2

R1989 0R2J-2-GPR1989 0R2J-2-GP

1 2

SUS_PW R_ACK

PM_RI# PCIE_WAKE#

CLKREQ_LAN# RTC_DET#

SUSACK# AC_PRESENT PM_PWRBTN# PM_SLP_LAN#

PM_RSMRST#

DMI_RXN[3:0]4 DMI_RXP[3:0]4

DMI_TXN[3:0]4 DMI_TXP[3:0]4

DMI_RXN04 DMI_RXN14 DMI_RXN24 DMI_RXN34

DMI_RXP04 DMI_RXP14 DMI_RXP24 DMI_RXP34

DMI_TXN04 DMI_TXN14 DMI_TXN24 DMI_TXN34

DMI_TXP04 DMI_TXP14 DMI_TXP24 DMI_TXP34

R1923 Do Not Stuff

CLKREQ_LAN# 18,31 RTC_DET# 22,60

DMI_COMP_R RBIAS_CPY

1 2

DY

PCH_WAKE# CRB : 1K CHKLIST: 10K

BATLOW #

PM_RI#

B

SUSACK#

SYS_RESET#

PWROK

MEPWROK

PM_RSMRST#_R

3D3V_AUX_S5

B

PCH1C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT/GPIO31

E10

BATLOW#/GPIO72

A10

RI#

PANTHER-GP-NF

R1925

R1925 100KR2J-1-GP

100KR2J-1-GP

R1924

R1924 10KR2J-3-GP

10KR2J-3-GP

1 2

3V_5V_POK_#

3 OF 10

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5

DMI

System Power Management

12

5 6

FDI_RXP6

FDI

FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN#/GPIO29

PM_RSMRST#

34 2 1

Q1901

Q1901 2N7002KDW-GP

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16 AV12 BC10 AV14 BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

C

DSWODVREN

PCH_DPW ROK

PM_SUS_STAT#

SUS_CLK

PM_SLP_S5#

SLP_A#

PM_SLP_SUS#

PM_SLP_LAN#

R1921

R1921 1KR2J-1-GP

1KR2J-1-GP

1 2

FDI_TXN[7:0] 4 FDI_TXP[7:0] 4

FDI_TXN0 4 FDI_TXN1 4 FDI_TXN2 4 FDI_TXN3 4 FDI_TXN4 4 FDI_TXN5 4 FDI_TXN6 4 FDI_TXN7 4

FDI_TXP0 4 FDI_TXP1 4 FDI_TXP2 4 FDI_TXP3 4 FDI_TXP4 4 FDI_TXP5 4 FDI_TXP6 4 FDI_TXP7 4

FDI_INT 4 FDI_FSYNC0 4 FDI_FSYNC1 4 FDI_LSYNC0 4 FDI_LSYNC1 4

R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP

1 2

R1911 Do Not Stuff

1 2

DY

R1992 0R2J-2-GPR1992 0R2J-2-GP

1 2

PCIE_WAKE# 27,31,65,82

PM_CLKRUN# 27

1

TP1901 TPAD14-OP-GPTP1901 TPAD14-OP-GP

1

TP1902 TPAD14-OP-GPTP1902 TPAD14-OP-GP

1

TP1906 TPAD14-OP-GPTP1906 TPAD14-OP-GP

1

TP1904 TPAD14-OP-GPTP1904 TPAD14-OP-GP

H_PM_SYNC 5

1

TP1905 TPAD14-OP-GPTP1905 TPAD14-OP-GP

RSMRST#_KBC 27

3V_5V_POK 41

PM_RSMRST#

1 2

R1913 0R2J-2-GPR1913 0R2J-2-GP

D

E

For platforms not supporting Deep S4/S5

1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)

2.DPWROK and RSMRST# will rise at the same time (connected on board)

3.SLP_SUS# and SUSACK# are left as ‘no connect’

4.SUSWARN# used as SUSPWRDNACK/GPIO30

RTC_AUX_S5

3D3V_S0

PM_CLKRUN#

PCH_SUSCLK_KBC 27

PM_SLP_S4# 27,46,82

PM_SLP_S3# 27,36,37,47,82

D

BOM1

Title

Size Document Number Rev

A3

Date: Sheet of

R1919 8K2R2J-3-GPR1919 8K2R2J-3-GP

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH : DMI/FDI/PM

CD1 DIS

SC

19 102Tuesday, December 13, 2011

E

SC

A

4 4

RN2001

1

4

2 3

SRN100KJ-6-GP

3 3

678

123

4 5

Do Not Stuff

E

E C2002

C2002

12

DY

2 2

L_DDC_DATA(K47): This signal is on the LVDS interface. This signal needs to be left NC if eDP is used for the local flat panel display

L_BKLT_EN LVDS_VDD_EN

Close to PCH

CRT_BLUE CRT_GREEN CRT_RED

RN2003

RN2003 SRN150F-1-GP

SRN150F-1-GP

Close to PCH

CRT_BLUE CRT_GREEN

CRT_RED

Do Not Stuff

EC2001

E

E C2003

C2003

12

DY

12

R2002

R2002 2K37R2F-GP

2K37R2F-GP

B

L_BKLT_EN27

LVDS_VDD_EN49

L_BKLT_CTRL49

LVDS_DDC_CLK49 LVDS_DDC_DATA49

LVDS_IBG LVDS_VBG

1

TP2001TPAD14-OP-GP TP2001TPAD14-OP-GP

LVDSA_CLK#49 LVDSA_CLK49

LVDSA_DATA0#49 LVDSA_DATA1#49 LVDSA_DATA2#49

LVDSA_DATA049 LVDSA_DATA149 LVDSA_DATA249

LVDSB_CLK#49 LVDSB_CLK49

LVDSB_DATA0#49 LVDSB_DATA1#49 LVDSB_DATA2#49

LVDSB_DATA049 LVDSB_DATA149 LVDSB_DATA249

CRT_BLUE50 CRT_GREEN50 CRT_RED50

CRT_DDC_CLK50 CRT_DDC_DATA50

CRT_HSYNC50 CRT_VSYNC50

DAC_IREF_R

R2005

1KR2J-1-GP

12

M45

AF37 AF36

AE48 AE47

AK39 AK40

AN48

AM47

AK47

AJ48

AN47

AM49

AK49

AJ47

AF40 AF39

AH45 AH47

AF49 AF45

AH43 AH49

AF47 AF43

N48

M40

M47 M49

J47

P45 T40

K47 T45

P39

P49 T49

T39

T43 T42

C

PCH1D

L_BKLTEN L_VDD_EN

L_BKLTCTL L_DDC_CLK

L_DDC_DATA L_CTRL_CLK

L_CTRL_DATA LVD_IBG

LVD_VBG LVD_VREFH

LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

PANTHER-GP-NF

4 OF 10

DDPB_0N

DDPB_0P

DDPB_1N

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

CRT

DDPD_HPD

DPB_HPD_PCH

D

3D3V_S0

4

1

2 3

RN2002

RN2002 SRN2K2J-1-GP

SRN2K2J-1-GP

DDI Port B Detect:(SDVO_CTRL_ DATA) 1: Port B detected 0: Port B not detected

DPB_CTRLCLK 52 DPB_CTRLDATA 52

DPB_AUXN_PCH 52 DPB_AUXP_PCH 52

DPB_LANE0N 52 DPB_LANE0P 52 DPB_LANE1N 52 DPB_LANE1P 52 DPB_LANE2N 52 DPB_LANE2P 52 DPB_LANE3N 52 DPB_LANE3P 52

DPC_CTRLCLK 94 DPC_CTRLDATA 94

DPC_AUXN_PCH 94 DPC_AUXP_PCH 94

DPC_HPD 94

DPC_LANE0N 94 DPC_LANE0P 94 DPC_LANE1N 94 DPC_LANE1P 94 DPC_LANE2N 94 DPC_LANE2P 94 DPC_LANE3N 94 DPC_LANE3P 94

DPD_CTRLCLK 94 DPD_CTRLDATA 94

DPD_AUXN_PCH 94 DPD_AUXP_PCH 94

DPD_HPD 94

DPD_LANE0N 94 DPD_LANE0P 94 DPD_LANE1N 94 DPD_LANE1P 94 DPD_LANE2N 94 DPD_LANE2P 94 DPD_LANE3N 94 DPD_LANE3P 94

DY

12

R2007

R2007 Do Not Stuff

Do Not Stuff

5V_S0

G

Q2002

LSK3541G1ET2L-GP

DS

DP

E

DPB_HPD 52

12

R2006

R2006 100KR2J-1-GP

100KR2J-1-GP

1 1

A

B

C

D

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH : LVDS/CRT/DDI

Size Document Number Rev

A3

Date: Sheet of

PCH : LVDS/CRT/DDI

Taipei Hsien 221, Taiwan, R.O.C.

CD1 DIS

20 102Tuesday, December 13, 2011

E

SC

A

SSID = PCH

RN2102

INT_PIRQE# BDC_PRESENCE# INT_PIRQC# INT_PIRQA#

3D3V_S0

WWAN_IN#

R2115

SWG

R2110

10KR2F-2-GP

R2108

10KR2F-2-GP

R2105

10KR2F-2-GP

4 4

3D3V_S0

3 3

3D3V_S0

2 2

GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19

0 0 LPC 0 1 Reserved

GPIO51 and GPIO19 Internal PU

1 1

RN2102

1 2 3 4 5 6

SRN8K2J-2-GP-U

DGPU_HOLD_RST#

12

10KR2F-2-GP

REQ2#

12

EC_SMI#

12

BOOT BIOS Strap

11

A

10 9

INT_PIRQD#

8

INT_PIRQF#

7

INT_PIRQB#

EC_SCI# 22,27

LCD_PRESENCE#49 SATA_ODD_DA#56

EC_SMI# 22

Reserved 01

SPI(Default)

PLT_RST#5,11,27,31,36,65,66,71,77,80,82,83

3D3V_S0

For PPT USB3.0 feature

DGPU_HOLD_RST#83

DGPU_PW R_EN#22,93

CLK_PCI_TPM77 CLK_PCI_DB65,71 CLK_PCI_KBC27 CLK_PCI_FB18

12

R1819

R1819 Do Not Stuff

Do Not Stuff

B

USB3_RX0_N62 USB3_RX2_N94 USB3_RX0_P62

USB3_RX2_P94 USB3_TX0_N62 USB3_TX2_N94 USB3_TX0_P62 USB3_TX2_P94

TP2109

TPAD14-OP-GP

R2106 0R2J-2-GPR2106 0R2J-2-GP R2107 0R2J-2-GPR2107 0R2J-2-GP

BDC_PRESENCE#63 WWAN_IN#66

TPAD14-OP-GP

R2114 22R2J-2-GPR2114 22R2J-2-GP R2111 22R2J-2-GPR2111 22R2J-2-GP R2113 22R2J-2-GPR2113 22R2J-2-GP R2112 22R2J-2-GPR2112 22R2J-2-GP

DY

TP2109

1 2 1 2

TP2108

1 2 1 2 1 2 1 2

3D3V_S0

5 4

Do Not Stuff

2ND = 73.7SZ08.DAH

R1813 0R2J-2-GPR1813 0R2J-2-GP

12

C1811

C1811 Do Not Stuff

Do Not Stuff

DY

B

U1801

VCC Y

Do Not Stuff

1 2

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

REQ2# DGPU_PW R_EN#

GPIO51

1

INT_PIRQE#

INT_PIRQF# BDC_PRESENCE# WWAN_IN#

PCI_PME#

1

PCI_PLTRST#

CLK_PCI_TPM_R

CLK_PCI_LPC_R

CLK_PCI_KBC_R

CLK_PCI_FB_R

DY

1

B

2

A

3

GND

PCH1E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3RN1

BC30

USB3RN2

BE32

USB3RN3

BJ32

USB3RN4

BC28

USB3RP1

BE30

USB3RP2

BF32

USB3RP3

BG32

USB3RP4

AV26

USB3TN1

BB26

USB3TN2

AU28

USB3TN3

AY30

USB3TN4

AU26

USB3TP1

AY26

USB3TP2

AV28

USB3TP3

AW30

USB3TP4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1#/GPIO50

C44

REQ2#/GPIO52

E40

REQ3#/GPIO54

D47

GNT1#/GPIO51

E42

GNT2#/GPIO53

F46

GNT3#/GPIO55

G42

PIRQE#/GPIO2

G40

PIRQF#/GPIO3

C42

PIRQG#/GPIO4

D44

PIRQH#/GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-GP-NF

PCI_PLTRST#

12

C1812

C1812 Do Not Stuff

Do Not Stuff

DY

RSVD

PCI

C

5 OF 10

AY7

RSVD1

AV7

RSVD2

AU3

RSVD3

BG4

RSVD4

AT10

RSVD5

BC8

RSVD6

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9

AT1

RSVD10

AY3

RSVD11

AT5

RSVD12

AV3

RSVD13

AV1

RSVD14

BB1

RSVD15

BA3

RSVD16

BB5

RSVD17

BB3

RSVD18

BB7

RSVD19

BE8

RSVD20

BD4

RSVD21

BF6

RSVD22

AV5

RSVD23

AV10

RSVD24

AT8

RSVD25

AY5

RSVD26

BA2

RSVD27

AT12

RSVD28

BF3

RSVD29

D

E

USB Table

Utilize Port 9 for USB debug

C24

USBP0N

A24

USBP0P

C25

USBP1N

B25

USBP1P

C26

USBP2N

A26

USBP2P

K28

USBP3N

H28

USBP3P

E28

USBP4N

D28

USBP4P

C28

USBP5N

A28

USBP5P

C29

USBP6N

B29

USBP6P

N28

USBP7N

M28

USBP7P

L30

USBP8N

K30

USBP8P

G30

USBP9N

E30

USBP9P

C30

USBP10N

A30

USBP10P

USB

USBRBIAS#

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

3D3V_S5

C

USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS

USB_0OC# USB_1OC#

USB_OC#10_11

L32 K32 G32 E32 C32 A32

USB_RBIAS

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

USB_OC_DOCK# USB_OC#10_11

USB_OC#12_13

OC[3:0]# for Device 29 (Ports 0-7) OC[7:4]# for Device 26 (Ports 8-13)

RN2105

1 2 3 4 5 6

SRN8K2J-2-GP-U

USB_P0N 62 USB_P0P 62 USB_P1N 61 USB_P1P 61 USB_P2N 94 USB_P2P 94 USB_P3N 66 USB_P3P 66 USB_P4N 82 USB_P4P 82 USB_P5N 82 USB_P5P 82

USB_P8N 94 USB_P8P 94 USB_P9N 61 USB_P9P 61 USB_P10N 69 USB_P10P 69 USB_P11N 63 USB_P11P 63 USB_P12N 65 USB_P12P 65 USB_P13N 82 USB_P13P 82

1 2

R2109

R2109 22D6R2F-L1-GP

22D6R2F-L1-GP

10

USB_OC#12_13

9

USB_4OC#USB_OC_DOCK#

8 7

USB_2OC#

USB_0OC# 62 USB_2OC# 61

USB_OC_DOCK# 94 USB_4OC# 82

USB_1OC# 61

D

Pair

0 1 2 3 4 5 6 7 8 9 10 11 12 13

3D3V_S5

BOM1

Title

Size Document Number Rev

A3

Date: Sheet of

Device USB3.0 port 0 USB2.0 port 1 USB3.0 Docking WWAN USB2.0 port (AUO4) New Card X X USB2.0 Docking USB2.0 port 2 FPR BLUETOOTH WLAN Camera

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH : PCI/USB/NVRAM/RSVD

CD1 DIS

E

SC

21 102Tuesday, December 13, 2011

SC

A

Note:

3D3V_S0

R2202 10KR2J-3-GPR2202 10KR2J-3-GP

1 2

3D3V_S0

RN2203

2 3

4 4

1

SRN10KJ-5-GP

GPIO27 has a weak[20K] internal pull up. To enable on-die PLL Voltage regurator, should not place external pull down.

CLKREQ_NEW# Model_ID PCH_GPIO22

4

SATA_ODD_PRSNT#

CLKREQ_NEW# 18,82

3D3V_S0

14"

15"

Model_ID

1 2 1 2

1 2

SWG

1 2 1 2

SWG

1 2

12

R2213

R2213 10KR2J-3-GP

10KR2J-3-GP

PH 14" PL

10KR2J-3-GP

A

15"

MIC_DET# PCH_GPIO48

PCH_TEMP_ALERT#

DGPU_PW R_EN#

DGPU_HPD_INTR#

PCH_GPIO34

PCH_GPIO12

SUS_PW R_ACK

PCH_GPIO15

PCIE_CLK_RQ7#

mSATA_DTCT#

12

FDI_OVRVLTG

R2208

R2208 10KR2J-3-GP

10KR2J-3-GP

DMI_OVRVLTG

R2210

R2210 10KR2J-3-GP

10KR2J-3-GP

DGPU_PW R_EN# 21,93

3D3V_S0

R2223 10KR2J-3-GPR2223 10KR2J-3-GP R2220 10KR2J-3-GPR2220 10KR2J-3-GP

R2222 10KR2J-3-GPR2222 10KR2J-3-GP

3 3

R2224

R2224 R2226 10KR2J-3-GP

R2226 10KR2J-3-GP

R2225 10KR2J-3-GPR2225 10KR2J-3-GP

3D3V_S5

R2228 10KR2J-3-GPR2228 10KR2J-3-GP

R2217 10KR2J-3-GPR2217 10KR2J-3-GP

R2201 1KR2J-1-GPR2201 1KR2J-1-GP

R2221 10KR2J-3-GPR2221 10KR2J-3-GP

2 2

1 1

R2229 10KR2J-3-GPR2229 10KR2J-3-GP

For PCH debug with XDP, need to NO STUFF R2218

12

R2232

R2232 10KR2J-3-GP

10KR2J-3-GP

12

R2233

R2233 10KR2J-3-GP

10KR2J-3-GP

SATA_ODD_PRSNT#56

G2201

GAP-OPEN

SUS_PW R_ACK 19

PCIE_CLK_RQ7# 18

mSATA_DTCT#BLUETOOTH_EN

12

R2209

R2209 Do Not Stuff

Do Not Stuff

DY

B

PCH_GPIO018

EC_SMI#21

BOM Control

EC_SCI#21,27

PCH_GPIO15 PCH_GPIO15_R

DGPU_PW ROK18,92,93

TP2212TPAD14-OP-GP TP2212TPAD14-OP-GP

PCH_GPIO2418

mSATA_DTCT#66

PCH_GPIO34

BLUETOOTH_EN63,65

21

MIC_DET#82

PCH_TEMP_ALERT# PCH_TEMP_ALERT#_R

R2214 0R2J-2-GPR2214 0R2J-2-GP

RTC_DET#19,60

B

1 2

TP2215TPAD14-OP-GP TP2215TPAD14-OP-GP

TP2207TPAD14-OP-GP TP2207TPAD14-OP-GP

TP2214TPAD14-OP-GP TP2214TPAD14-OP-GP

TP2213TPAD14-OP-GP TP2213TPAD14-OP-GP

TP2209TPAD14-OP-GP TP2209TPAD14-OP-GP

1 2

R2218 100R2J-2-GPR2218 100R2J-2-GP

EC_SMI# DGPU_HPD_INTR#

ICC_EN# PCH_GPIO12

1 2

R2216 0R2J-2-GPR2216 0R2J-2-GP

1 2

R2215 0R2J-2-GPR2215 0R2J-2-GP

DGPU_PW ROK PCH_GPIO22

1

PCH_GPIO24

PLL_ODVR_EN

DMI_OVRVLTG FDI_OVRVLTG Model_ID MIC_DET# PCH_GPIO48

RTC_DET#

PCH_NCTF_9

1

PCH_NCTF_2

1

PCH_NCTF_8

1

PCH_NCTF_7

1

PCH_NCTF_6

1

GPIO0

PCH_GPIO16

C

PCH1F

T7

BMBUSY#/GPIO0

A42

TACH1/GPIO1

H36

TACH2/GPIO6

E38

TACH3/GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL/GPIO12

G2

GPIO15

U2

SATA4GP/GPIO16

D40

TACH0/GPIO17

T5

SCLOCK/GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI#/GPIO34

K4

GPIO35

V8

SATA2GP/GPIO36

M5

SATA3GP/GPIO37

N2

SLOAD/GPIO38

M3

SDATAOUT0/GPIO39

V13

SDATAOUT1/GPIO48

V3

SATA5GP/GPIO49/TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1#A4

A44

VSS_NCTF_2#A44

A45

VSS_NCTF_3#A45

A46

VSS_NCTF_4#A46

A5

VSS_NCTF_5#A5

A6

VSS_NCTF_6#A6

B3

VSS_NCTF_7#B3

B47

VSS_NCTF_8#B47

BD1

VSS_NCTF_9#BD1

BD49

VSS_NCTF_10#BD49

BE1

VSS_NCTF_11#BE1

BE49

VSS_NCTF_12#BE49

BF1

VSS_NCTF_13#BF1

BF49

VSS_NCTF_14#BF49

PANTHER-GP-NF

C

6 OF 10

A20GATE

PECI

RCIN#

INIT3_3V#

DF_TVS

TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4

NC_1

C40

GPIO69

B41

GPIO70

C41

GPIO71

A40

P4

H_PECI_R

AU16 P5 AY11

PCH_THERMTRIP_R

AY10

INIT3_3V#

T14

NV_CLE

AY1

AH8 AK11 AH10

TS_VSS

AK10

P37

BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49

ICC_EN#

R2219

1 2

0R2J-2-GP

PCH_NCTF_4 PCH_NCTF_3

PCH_NCTF_5

PCH_NCTF_1

PCH_NCTF_10

DY

1 2

R2211

TACH4/GPIO68 TACH5/GPIO69 TACH6/GPIO70 TACH7/GPIO71

PROCPWRGD

GPIO

A4,A44,A45,A46,A5,A6,B3,B47,

BD1,BD49,BE1,BE49,BF1,BF49,

BG2,BG48,BH3,BH47,BJ4,BJ44,

A4,A44,A45,A46,A5,A6,B3,B47,

BD1,BD49,BE1,BE49,BF1,BF49,

BG2,BG48,BH3,BH47,BJ4,BJ44,

NCTF TEST PIN:

THRMTRIP#

CPU/MISC

VSS_NCTF_15#BG2

VSS_NCTF_16#BG48

VSS_NCTF_17#BH3

VSS_NCTF_18#BH47

VSS_NCTF_19#BJ4 VSS_NCTF_20#BJ44 VSS_NCTF_21#BJ45

NCTF

VSS_NCTF_22#BJ46

VSS_NCTF_23#BJ5

VSS_NCTF_24#BJ6

VSS_NCTF_25#C2

VSS_NCTF_26#C48

VSS_NCTF_27#D1

VSS_NCTF_28#D49

VSS_NCTF_29#E1

VSS_NCTF_30#E49

BJ45,BJ46,BJ5,BJ6,C2,C48,D1,

D49,E1,E49,F1,F49

BJ45,BJ46,BJ5,BJ6,C2,C48,D1,

D49,E1,E49,F1,F49

VSS_NCTF_31#F1

VSS_NCTF_32#F49

PLL ON DIE VR ENABLE

NOTE:This signal has a weak internal pull-up 20K

ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT DISABLED -- LOW (R2212 STUFFED)

PLL_ODVR_EN

1 2

DY

R2212 Do Not Stuff

D

SATA_ODD_PWRGT 56 GPIO69 18

1

TP2204 TPAD14-OP-GPTP2204 TPAD14-OP-GP

1

TP2205 TPAD14-OP-GPTP2205 TPAD14-OP-GP

H_A20GATE 17,27

1 2

R2203 Do Not Stuff

H_RCIN# 17,27

H_CPUPW RGD 5,11,36

R2204 390R2J-1-GPR2204 390R2J-1-GP

1 2

1

TP2201 TPAD14-OP-GPTP2201 TPAD14-OP-GP

TS Signal Disable Guideline: TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4 should not float on the motherboard. They should be tied to GND directly.

1

TP2210 TPAD14-OP-GPTP2210 TPAD14-OP-GP

1

TP2208 TPAD14-OP-GPTP2208 TPAD14-OP-GP

1

TP2211 TPAD14-OP-GPTP2211 TPAD14-OP-GP

1

TP2206 TPAD14-OP-GPTP2206 TPAD14-OP-GP

1

TP2216 TPAD14-OP-GPTP2216 TPAD14-OP-GP

Integrated Clock Enable functionality is achieved via soft-strap. The default is integrated clock enable.

Integrated Clock Chip Enable

ICC_EN#

Do Not Stuff

D

GPIO8 has a weak[20K] internal pull up.

Integrated Clock Enable functionality is achieved via soft-strap. The default is integrated clock enable.

E

1D8V_S0

12

R2230

R2230 2K2R2J-2-GP

2K2R2J-2-GP

R2231

NV_CLE

1 2

1KR2J-1-GP

DMI & FDI Termination Voltage

Set to Vss when LOW Set to Vcc when HIGH

H_THERMTRIP# 5,36

Ball BJ4

Panther Point

DY

NV_CLE

H_PECI 5,27

Ball BF49

Test Pad for Solder crack detection

Top view

Ball A46

HIGH (R2211 DY)- DISABLED [DEFAULT]

LOW (R2211)- ENABLED

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

PCH : GPIO/NTCF/MISC

A3

Taipei Hsien 221, Taiwan, R.O.C.

CD1 DIS

Ball D1

22 102Tuesday, December 13, 2011

E

H_SNB_IVB# 5

SC

5

SSID = PCH

D D

1D05V_S0

(1uF x4)

C C

B B

1D05V_S0

6A

1D05V_S0

12

R2310

R2310 D001R3D-L-GP

D001R3D-L-GP

(1uFx3)

(10uFx1_0603)

12

R2311

R2311 D001R3D-L-GP

D001R3D-L-GP

3.062A (FOR VCCIO)

12

C2305

SC10U6D3V3MX-GP

196mA (FOR VCCRAM)

0.159A(Totally current of VCCVRM)

R2312 D001R3D-L-GPR2312 D001R3D-L-GP

1 2

12

TP2301TPAD14-OP-GP TP2301TPAD14-OP-GP

12

C2306

SC1U6D3V2KX-GP

357mA (FOR VCC3_3)

0.266A (Totally VCC3_3 current)

(0.1uF x1)

+VCCAFDI_VRM

VCCAFDIPLL is 1.05V Analog power for FDI PLL. This power is supplied by the core well. This pin can be left as NC.

0.042A (Totally current of VCCDMI)

1.432A(Total current of VCCCORE)

12

C2302

C2301

SC1U6D3V2KX-GP

1

12

3D3V_S0

SC1U6D3V2KX-GP

VCCAPLLEXP

(10uF x1)

C2308

SC1U6D3V2KX-GP

+1.05VS_VCC_DMI

SC10U6D3V3MX-GP

C2307

SC1U6D3V2KX-GP

12

C2304

SC1U6D3V2KX-GP

12

C2309

SC1U6D3V2KX-GP

12

C2310

C2310 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

4

7 OF 10

VCCADAC

VSSADAC

VCCALVDS VSSALVDS

VCCTX_LVDS1 VCCTX_LVDS2 VCCTX_LVDS3 VCCTX_LVDS4

VCC3_3_6

VCC3_3_7

VCCVRM3

VCCDMI1

VCCCLKDMI

VCCDFTERM1

VCCDFTERM2

VCCDFTERM3

VCCDFTERM4

VCCSPI

AA23 AC23 AD21 AD23

AF21

AF23 AG21 AG23 AG24 AG26 AG27 AG29

AJ23

AJ26

AJ27

AJ29

AJ31

AN19

BJ22

AN16 AN17

AN21 AN26 AN27 AP21 AP23 AP24 AP26

AT24

AN33 AN34

BH29

AP16

BG6

AP17

AU20

PCH1G

VCCCORE1 VCCCORE2 VCCCORE3 VCCCORE4 VCCCORE5 VCCCORE6 VCCCORE7 VCCCORE8 VCCCORE9 VCCCORE10 VCCCORE11 VCCCORE12 VCCCORE13 VCCCORE14 VCCCORE15 VCCCORE16 VCCCORE17

VCCIO28

VCCAPLLEXP

VCCIO15 VCCIO16

VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26

VCC3_3_3

VCCVRM2

VCCAFDIPLL

VCCIO27

VCCDMI2

PANTHER-GP-NF

POWER

VCC CORE

VCCIO

FDI

CRTLVDS

DMI

DFT / SPI HVCMOS

3

69mA (FOR VCCDAC)

0.001A

+VCCA_DAC_1_2

U48

U47

0.001A

+3VS_VCCA_LVDS

AK36 AK37

AM37 AM38 AP36 AP37

V33

V34

0.06A

+1.8VS_VCCTX_LVDS

357mA (FOR VCC3_3)

0.266A

0.16A

AT16

0.042A

+1.05VS_VCC_DMI

AT20

AB36

0.02A

+1.05VS_VCC_DMI_CCI

AG16

AG17

AJ16

0.19A

AJ17

V1

0.02A

(0.1uF/0.01uF x1) (10uF x1_0603)

12

C2313

12

C2314

SCD01U16V2KX-3GP

12

C2316

(0.1uFx1)

12

C2319

C2319 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

196mA (FOR VCCRAM)

1 2

R2306

12

R2306

C2320

C2320 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1 2

C2321

C2321 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1D8V_S0

C2322

(0.1uFx1)

SCD1U10V2KX-5GP

C2323

C2323 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

R2307

12

C2315

SCD1U10V2KX-5GP

SC10U6D3V5KX-1GP

12

C2317

SCD01U16V2KX-3GP

3D3V_S0

1D05V_VTT

0R2J-2-GP

1D05V_S0

0R2J-2-GP

(1uFx1) (10uFx1)

R2313

0R2J-2-GP

85mA (FOR VCCME3_3)

(1uFx1)

12

C2324

12

(1uF x1)

3D3V_S5

1 2

2

L2301

IND-10UH-193-GP

1 2

CHIP IND 10UH M GLFR1608T100M-

R2304

1 2

0R3J-0-U-GP

SC10U6D3V5KX-1GP

R2305

1 2

0R5J-5-GP

C2318

SC22U6D3V5MX-2GP

1 2

R2308

58mA (FOR VCCDMI)

IND-10UH-193-GP

(0.01uF x2) (22uF x1)

0R2J-2-GP

3D3V_S0

1D8V_S0

1D5V_S0+VCCAFDI_VRM

1

3D3V_S0

Refer to NPCE795 shared SPI flash architecture

A A

5

4

3

2

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

PCH : POWER1

Taipei Hsien 221, Taiwan, R.O.C.

CD1 DIS

23 102Tuesday, December 13, 2011

1

SC

A

B

C

D

E

(1uFx1)

SCD1U10V2KX-5GP

(0.1uFx1)

0.001A

(1uFx1)

(0.1uFx1)

(1uFx1)

1D05V_S0

3D3V_S5

AK

12

D2401

D2401 CH751H-40-1-GP

CH751H-40-1-GP

R2408

1 2

10R2J-2-GP

C2426

C2426 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

(0.1uFx1)

0.001A

3D3V_S0

AK

D2402

D2402 CH751H-40-1-GP

CH751H-40-1-GP

R2407

1 2

(1uFx1)

10R2J-2-GP

3D3V_S5

3D3V_S0

(0.1uFx1)

1D05V_S0

(1uFx1)

+VCCAFDI_VRM

1D05V_S0

+3VS_+1.5VS_HDA_IO

BOM1

Title

Size Document Number Rev

A3

Date: Sheet of

12

C2427

C2427 SC1U10V2KX-1GP

SC1U10V2KX-1GP

R2409

1 2

0R0603-PAD

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH : POWER2

CD1 DIS

E

5V_S5

5V_S0

24 102Tuesday, December 13, 2011

3D3V_S5

SC

10 OF 10

POWER

PCH1J

SSID = PCH

R2403

1 2

0R0603-PAD

TP2404TPAD14-OP-GP TP2404TPAD14-OP-GP

TP2402TPAD14-OP-GP TP2402TPAD14-OP-GP

SC1U6D3V2KX-GP

C2406

12

+VCCRTCEXT

0.055A

12

SCD1U10V2KX-5GP

0.001A

V_PROC_IO_R

12

B

1

(10uFx1)

1

12

0.08A

+VCCAFDI_VRM

(1uFx1)

C2415

12

3D3V_S0

4 4

12

3 3

1D05V_S0

1 2

R2404

R2405

VCCA_DPL

12

0R2J-2-GP

12

0R2J-2-GP

1 2

IND-10UH-193-GP

CHIP IND 10UH M GLFR1608T100M-

1 2

IND-10UH-193-GP

CHIP IND 10UH M GLFR1608T100M-

+VCCDIFFCLK

12

C2412

SC1U6D3V2KX-GP

+V1.05S_SSCVCC

12

C2413

SC1U6D3V2KX-GP

R2410

0R2J-2-GP

2 2

1D05V_S0

1 1

163mA (FOR VCCSUS3_3)

357mA (FOR VCC3_3)

(1uFx1)

C2402

C2402 SC1U10V2KX-1GP

SC1U10V2KX-1GP

1D05V_S0

(22uFx2_0603) (1uFx3_0402)

L2402

L2403

(0.1uFx2) (4.7uFx1_0603)

12

1D05V_S0

(1uFx1)

1D05V_VTT

3D3V_S5

(0.1uFx1)

1.849A (FOR VCCME)

1.01A (Total current of VCCASW)

SC22U6D3V5MX-2GP

12

C2403

(1uFx1) (220uFx1)

+1.05VS_VCCA_A_DPL

ST220U2D5VBM-7GP

C2443

12

(1uFx1)

+1.05VS_VCCA_B_DPL

ST220U2D5VBM-7GP

C2444

12

SCD1U10V2KX-5GP

R2406

1 2

0R0603-PAD

SC1U6D3V2KX-GP

(0.1uFx1)

R2413

0R2J-2-GP

SC4D7U6D3V3KX-GP

RTC_AUX_S5

6uA

(0.1uFx2) (1uFx1)

SC1U6D3V2KX-GP

TP2401TPAD14-OP-GP TP2401TPAD14-OP-GP

0.002A

TP2405TPAD14-OP-GP TP2405TPAD14-OP-GP

1D05V_S0

SC22U6D3V5MX-2GP

12

C2404

C2409

C2409 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

(220uFx1)

C2410

C2410 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

0.16A (Totally current of VCCVRM

12

C2411

(0.1uFx1)

196mA (FOR VCCVRM)

+VCCDIFFCLKN

C2414

(1uFx1)

12

C2417

2mA (FOR VCCRTC)

C2416

20101229

A

VCCACLK

+VCCPDSW

DCPSUSBYP

+VCCAPLL_CPY_PCH

+VCCSUS1

SC1U6D3V2KX-GP

C2407

C2408

12

+1.05VS_VCCA_A_DPL +1.05VS_VCCA_B_DPL

+VCCDIFFCLK

0.095A

+V1.05S_SSCVCC

(1uFx1)

+VCCSST

12

C2418

SCD1U10V2KX-5GP

12

C2421

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

C2419

SCD1U10V2KX-5GP

C2422

SCD1U10V2KX-5GP

AD49

T16

V12

T38

BH23 AL29

AL24

AA19 AA21 AA24 AA26 AA27 AA29 AA31 AC26 AC27 AC29 AC31 AD29 AD31

W21 W23 W24 W26 W29 W31 W33

N16

Y49

BD47 BF47

AF17 AF33 AF34 AG34

AG33

V16

T17 V19

BJ8

A22

PCH1J

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3_5

VCCAPLLDMI2 VCCIO14

DCPSUS3

VCCASW1 VCCASW2 VCCASW3 VCCASW4 VCCASW5 VCCASW6 VCCASW7 VCCASW8 VCCASW9 VCCASW10 VCCASW11 VCCASW12 VCCASW13 VCCASW14 VCCASW15 VCCASW16 VCCASW17 VCCASW18 VCCASW19 VCCASW20

DCPRTC

VCCVRM4

VCCADPLLA VCCADPLLB

VCCIO7 VCCDIFFCLKN1 VCCDIFFCLKN2 VCCDIFFCLKN3

VCCSSC

DCPSST

DCPSUS1 DCPSUS2

V_PROC_IO

VCCRTC

PANTHER-GP-NF

POWER

Clock and Miscellaneous

CPURTC

C

PCI/GPIO/LPCMISC

SATA USB

HDA

10 OF 10

VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33

VCCSUS3_3_7 VCCSUS3_3_8 VCCSUS3_3_9

VCCSUS3_3_10

VCCSUS3_3_6

VCCIO34

V5REF_SUS

DCPSUS4

VCCSUS3_3_1

V5REF

VCCSUS3_3_2 VCCSUS3_3_3 VCCSUS3_3_4 VCCSUS3_3_5

VCC3_3_1 VCC3_3_8 VCC3_3_4

VCC3_3_2

VCCIO5

VCCIO12 VCCIO13

VCCIO6

VCCAPLLSATA

VCCVRM1

VCCIO2 VCCIO3 VCCIO4

VCCASW22

VCCASW23

VCCASW21

VCCSUSHDA

3.062A

N26 P26 P28 T27 T29

0.097A (Totally current of VCCSUS3_3)

T23 T24 V23 V24 P24

T26

M26

AN23 AN24

P34

N20 N22 P20 P22

AA16 W16 T34

AJ2

AF13

AH13 AH14

AF14 AK1

AF11

AC16 AC17 AD17

1D05V_S0

T21

V21

T19

P32

SCD1U10V2KX-5GP

(FOR VCCIO)

163mA (FOR VCCSUS3_3)

1D05V_S0

+5VA_PCH_VCC5REFSUS

3D3V_S5

+5VS_PCH_VCC5REF

C2428

SC1U6D3V2KX-GP

C2430

SCD1U10V2KX-5GP

31mA (FOR VCCSATAPLL)

C2429

SCD1U10V2KX-5GP

C2432

SC1U6D3V2KX-GP

196mA (FOR VCCRAM)

3.062A (FOR VCCIO)

C2435

SC1U6D3V2KX-GP

1.849A (FOR VCCME)

+3VS_+1.5VS_HDA_IO

6mA

0.01A

(FOR VCCSUSHDA)

(0.1uFx1)

12

C2433

12

C2424

C2424 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

D

C2423

C2425

C2425 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

A

B

C

D

E

SSID = PCH

4 4

3 3

2 2

1 1

A

AA17

AA2

AA3 AA33 AA34 AB11 AB14 AB39

AB4 AB43

AB5

AB7 AC19

AC2 AC21 AC24 AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39

AD4 AD40 AD42 AD43 AD45 AD46

AD8

AE2

AE3

AF10

AF12 AD14 AD16

AF16

AF19

AF24

AF26

AF27

AF29

AF31

AF38

AF4 AF42 AF46

AF5

AF7

AF8

AG19

AG2 AG31 AG48 AH11

AH3 AH36 AH39 AH40 AH42 AH46

AH7

AJ19 AJ21 AJ24 AJ33 AJ34

AK12

AK3

H5

PCH1H

VSS0 VSS1

VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79

PANTHER-GP-NF

B

8 OF 10

VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

C

AY4 AY42 AY46

AY8

B11 B15 B19 B23 B27 B31 B35 B39

F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38

BB4 BB46 BC14 BC18

BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46

BD5 BE22 BE26 BE40

BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28

BD3

BF30 BF38 BF40

BF8 BG17 BG21 BG33 BG44

BG8 BH11 BH15 BH17 BH19

H10 BH27 BH31 BH33 BH35 BH39 BH43

BH7

D12

D16

D18

D22

D24

D26

D30

D32

D34

D38

D42

E18

E26

G18 G20 G26 G28 G36 G48

H12

H18

H22

H24

H26

H30

H32

H34

B7

D3

D8

F3

PCH1I

VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258

PANTHER-GP-NF

9 OF 10

VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS323 VSS324 VSS325 VSS328 VSS329 VSS330 VSS331 VSS333 VSS334 VSS335 VSS337 VSS338 VSS340 VSS342 VSS343 VSS344 VSS345 VSS346 VSS347 VSS348 VSS349 VSS350 VSS351 VSS352

D

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

PCH : VSS

CD1 DIS

25 102Tuesday, December 13, 2011

E

SC

5

4

3

2

1

D D

9/2 PCH_XDP

PCH XDP

DY

PXDP1

1 2

3 4 5 6 7 8

R2601 1KR2J-1-GP

C C

PM_PWRBTN#19,27

PM_RSMRST#19

XDP_DBRESET#5,11,19

PCH_JTAG_TDO17

PCH_JTAG_TDI17

PCH_JTAG_TMS17

PCH_JTAG_TCK

1 2

PCH_XDP

R2602 1KR2J-1-GP

1 2

PCH_XDP

3D3V_S5

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

Do Not Stuff

27

28

DY in SVT

R2604

Do Not Stuff

PCH_JTAG_TCK

12

DY

3D3V_S5

U2601

1

B

2

A

3

GND

Do Not Stuff

1 2

R2605 0R2J-2-GP

DY

VCC

Y

PCH_XDP

5 4

TCK_BUF_R

R2603

Do Not Stuff

1 2

DY

12

R2606

R2606 Do Not Stuff

Do Not Stuff

DY

PCH_JTAG_TCK_BUF 17

B B

A A

5

4

3

2

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

PCH_XDP

CD1 DIS

26 102Tuesday, December 13, 2011

1

SC

5

SSID = KBC

3D3V_AUX_KBC

R2702 0R0603-PAD- 1-GPR2702 0R060 3-PAD-1-GP

R2771

ACDC_R_ID2

10KR2J-3-GP

PAD_DETEC T#

100KR2J-1-GP

HDD_DTC T#

100KR2J-1-GP

HDD_DTC T#56

12

R2776

R2740

R2740 10KR2J-3-GP

10KR2J-3-GP

1 2

EXC_PWR _SHDN_R#

1 2

12

C2D2U10V3KX-1GP

C2D2U10V3KX-1GP S

S

R2771 2D2R3-1-U- GP

2D2R3-1-U- GP

C2701

TPAD14-OP-G P

12

D D

3D3V_AUX_KBC

R2714

1 2

3D3V_S0

R2729

1 2

3D3V_AUX_S5

R2727

1 2

3D3V_AUX_KBC

C C

0R0402-PAD-1- GP

3D3V_S5

B B

AD_OFF

R27701KR2J-1-G P R27701KR 2J-1-GP

1 2

3D3V_S0

R2717

1 2

22KR2J-GP

FAN_ID ECSCI#_KBC

A A

12

2704

2704 C

C

DY

SCD1U10V2KX-5GP

RTC_AUX_S5

12

R0402-PAD-1-GP

R0402-PAD-1-GP 0

0

TP2708

TP2708 TPAD14-OP-G P

TPAD14-OP-G P

1

TP2705

NOTE: C2712 must place close to VCORF pin.

C2705

Do Not Stuff

EC_AGND

R2775

3D3V_AUX_KBC

12

C2706

ACDC_ID38,94

GSENSE_Z7 9

1

12

R2706

R2706 100KR2J-1-GP

100KR2J-1-GP

SML1_CLK

SML1_DATA

SCD1U10V2KX-5GP

DOCK_PW G94

BQ24707_REGN_R40

EC_ENABLE

EXC_PWR _SHDN_R#82

AC_IN_KBC#

3D3V_S0

12

C2714 Do Not Stuff

AD_IA40

GSENSE_TST79 3G_EN66

PCIE_WAKE#19,31,65,82 GSENSE_X79

FAN_ID28

GSENSE_Y79

AD_OFF38,94 BEEP_ENABLE#29 S5_ENABLE36 3G_POWER ON66

BAT_IN#39 LID_CLOSE#82

RSMRST#_KBC19

PM_SLP_S4#19,46,82 ME_UNLOCK17

WIFI_RF_EN65 WLAN_PW RON65 S0_PWR_G OOD19,94

USB_PWR _EN61,62 AC_PRESENT19 DOCK_IN#94

EC_SCI#21,22

C2707

12

SCD1U10V2KX-5GP

DY

1 2

R2730

1 2

0R0402-PAD

Q2703

6

2N7002KDW -GP

12

C2708

C2709

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

EC_AGND

12

0R0402-PAD-1- GP

BQ24707_REGN_R

KBC_PWR BTN_EC#

AC_IN_KBC#

KBC_VCORF

12

C2712

C2712 SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

R2712

R2716 D o Not Stuff

1 2

2345 1

0R0805-PAD-1- GP

PCB_VER ACDC_R_ID2

2nd = 84.DM601.03F

3D3V_AUX_S53D3V_AU X_KBC

R2725

1 2

3D3V_AUX_KBC _VCC

12

C2710

SCD1U10V2KX-5GP

104

97 98 99

100 101

105 106

79 95 96

108

93 94

114

6

109

14 15 80 17 20 21 23 26 73 74 75 82 83 84

91 110 112 107

44

NPCE795GA0D X-GP

LCD_BF-1 KBC 885G PN:71.00885.B0G

AC_IN# 40

DY

BAS16-6-GP

1

3

2

D2704

SMBC_THER M SMBD_THER M

84.2N702.A3F

5

4

VBAT

U2701A

VCC19VCC46VCC76VCC88VCC VREF GPIO90/AD0

GPIO91/AD1 GPIO92/AD2 GPIO93/AD3

GPIO94/DA0 GPIO95/DA1 GPIO96/DA2

GPIO2 GPIO3/AD6 GPIO4/AD5 GPIO5/AD4 PSL_IN2_GPI6# GPIO7/AD7 GPIO16 GPIO24 GPIO30 GPIO34/CIRRXL GPIO36 GPIO41 GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO46/CIRRXM/TRST# GPIO51 PSL_IN1_GPI70 PSL_OUT_GPIO71 VBKUP GPIO75 GPO76/SHBM GPIO77 GPIO81 GPO82/IOX_LDSH/TEST# GPI/O84/IOX_SCLK/XORTR# GPIO97

VCORF

GND18GND45GND78GND89GND

116

NOTE: Pleae place R2711 close to AGND pin.

3D3V_S0

RN48

23 1

4

SRN10KJ-5-G P

SMBC_THER M 28,86

SMBD_THER M 28,86

4

115

GND

5

R2711

0R2J-2-GP

102

AVCC

GPIO11/CLKRUN#

ECSCI#/GPIO54

GPIO10/LPCPD#

GPIO67/PWUREQ#

KBRST#/GPIO86

GPIO52/PSDAT3/RDY#

GPIO50/PSCLK3/TDO

GPIO27/PSDAT2 GPIO26/PSCLK2 GPIO35/PSDAT1 GPIO37/PSCLK1

F_SDIO/F_SDIO0

3D3V_S0

12

C2702

SCD1U10V2KX- 5GP

4

1 OF 2

VDD

GPIO65/SMI#

GPIO85/GA20

GPIO17/SCL1 GPIO22/SDA1 GPIO73/SCL2 GPIO74/SDA2 GPIO23/SCL3 GPIO31/SDA3 GPIO47/SCL4 GPIO53/SDA4

F_SDI/F_SDIO1

12

EC_AGND

EC_GPIO47 High Active

PROCHOT _EC

12

PLT_RST#_EC

7

LRESET#

2

LCLK

3

LFRAME#

SERIRQ

F_CS0#

F_SCK

AGND

103

EC_AGND

R2732

R2732 100KR2J-1-GP

100KR2J-1-GP

LPC_TPM_AD3

1

LAD3

LPC_TPM_AD2

128

LAD2

LPC_TPM_AD1

127

LAD1

LPC_TPM_AD0

126

LAD0

125 8 9

ECSCI#_KBC

29 124

PAD_RESET#

123 121 122

27 25 11 10 71 72

70 69 67 68 119

HP_JACK_IN

120

PROCHOT _EC

24 28

EC_SPI_CS#_C

90

EC_SPI_CLK_C

92

EC_SPI_DI_C

86

EC_SPI_DO_C

87

NOTE: Locate resistors R2719 and R2722 close to the NPCE791L.

NOTE: Connect GND and AGND planes via either 0R resistor or one point layout connection.

G

S

2nd = 84.2N702.031

KBC_PWR BTN#69 ,94

Q2702

2N7002K-2-GP

84.2N702.J31

12

C2703

C2703 SC2D2U10V3KX- 1GP

SC2D2U10V3KX- 1GP

C2711

C2711 Do Not Stuff

Do Not Stuff

1 2

DY

R2735

1 2

0R2-PT5-LILY-GP

CLK_PCI_KBC 21 LPC_FRAME_T PM# 17,65,77

INT_SERIRQ 17,65,77 PM_CLKRUN # 19 L_BKLT_EN 20

LAN_PWR ON_EC 31

PAD_RESET# 69 H_A20GATE 17,22 H_RCIN# 17,22

BLON_OUT 49 LAN_LINKUP# 31 GSENSE_ON# 79 USB_AO_SEL 82

TPDATA 69 TPCLK 69

BAT_SCL 39,40 BAT_SDA 39, 40 SML1_CLK 18

SML1_DATA 18 USB_PWR _EN2 82 HP_JACK_IN 30

MUTE# 29

R2737 0R2J- 2-GPR2737 0R2J-2- GP R2722 33R2J -2-GPR 2722 33R2J- 2-GP

H_PROCHO T#_EC

D

G2701

GAP-OPEN

2 1

3

3D3V_AUX_KBC

PCB Ver.

PCB_VER

EC_AGND

PCB Ver.

12

R2724

64K9R2F-1-GP

12

R2726

R2726 100KR2J-1-GP

100KR2J-1-GP

PCB Version A/D (PIN 98)

SA 100K

SB

SC

1

PLT_RST# 5,11,21,3 1,36,65,66,71,77,80,82,83

LPC_TPM_AD[3..0] 17,65 ,77

<----TP

<----BATTERY/CHARGER/GPIO EXTENDER <----PCH / GPU N13P

33R2J-2-GPR2736 33R 2J-2-GPR2736

12

33R2J-2-GPR2719 33R 2J-2-GPR2719

12 12 12

SPI_CS0#_R 17,60 SPI_CLK_R 17,60

SPI_SO_R 17,60

SPI_SI_R 17,60

R2733

1 2

0R2-PT5-LILY-GP

3D3V_AUX_S5

12

R2704

R2704 10KR2J-3-GP

10KR2J-3-GP

R2703 470R2J-2-GPR2703 470R2 J-2-GP

12

R2774

R2774 100KR2J-1-GP

100KR2J-1-GP

H_PROCHO T# 5,42

KBC_PWR BTN_EC#

12

C2717

C2717 Do Not Stuff

Do Not Stuff

DY

3

14"

15"

14"

15"

14"

15"

14"

15"

R2713

100KR2F-L1-GP

R2728

1KR2J-1-GP

R2739

100KR2J-1-GP

Pull-Low Resistor R2726

12

mSATA_DTC T_EC

12

KBD_BL_PW M

12

Pull-High Resistor (3D3V_AUX_KBC) R2724

10K 3.0V

20K 2.75V

100K

1D05V_VTT

MUTE#

PURE_HW _SHUTD OWN#28,36,40,94

33K 2.48V

47K 2.24V

64.9K 2.0V

76.8K 1.87V

100K 1.65V

143K 1.36V

mSATA_DTC T_EN66

PM_PWRBT N#19,26

PM_SLP_S3#19,36,37,47,82

LEDMICMUTE#69

LED_MUTE#69

PAD_DETEC T#69

PCH_SUSC LK_KBC19

R2721 43R 2J-GPR2721 43R2J-G P

H_PECI5,22

1 2

R2720 0R 0402-PAD-1-G PR2720 0R 0402-PAD-1-G P

1 2

R2720 and C2716 Need very close to EC

R2723 10KR2J-3-GPR2723 10KR2J-3-G P

EC GPIO standard PH/PL

BAT_SCL BAT_SDA

BAT_IN#

KBC_BL_DTC T#

S5_ENABLE

ECRST#

LID_CLOSE#

R2710 Do Not StuffR 2710 D o Not Stuff

ASM for ISSC function ECR105692

12

2

Voltage

R2738

0R0402-PAD-1- GP

mSATA_DTC T_EC

1 2

TP4_RESET69

PWRLED69

KBC_BEEP29 LEDFUEL0#82 LEDFUEL1#82

KBD_BL_PW M69 LEDSUS#82

ECRST#

E51_TxD65

SPK_MUTE#29

PECI

EC_VTT

12

C2716

C2716 SCD1U16V2KX- 3GP

SCD1U16V2KX- 3GP

NOTE: PWM Signal :

1. If unused, select altrnative GPIO function and enable internal pull-down.

2. Please measure and make sure that the rise time of VCC_POR is less than 10us.

12

B

23 1

12

1 23

12

LID_CLOSE#

3D3V_AUX_KBC

R2715 10KR2J-3-GP

RN2701

4

SRN4K7J-8-G P

R2701 100KR 2J-1-GPR2701 100KR 2J-1-GP

R2708 100KR 2J-1-GPR2708 100KR 2J-1-GP

RN2705

4

SRN10KJ-5-G P

R2709 10KR 2J-3-GPR2709 10KR2J-3-GP

3D3V_AUX_KBC

12/09 change

2

1

PCB Version A/D (PIN 98) Pull-Low Resistor Pull-High Resistor (3D3V_AUX_KBC) Voltage

Reserved

U2701B

31

GPIO56/TA1

117

GPIO20/TA2/IOX_DIN_DIO

63

GPIO14/TB1

64

GPIO1/TB2

32

GPIO15/A_PWM

118

GPIO21/B_PWM

62

GPIO13/C_PWM

65

GPIO32/D_PWM

81

GPIO66/G_PWM

66

GPIO33/H_PWM

22

GPIO45/E_PWM

16

GPIO40/F_PWM

85

VCC_POR#

113

GPIO87/CIRRXM/SIN_CR

111

GPI/O83/SOUT_CR/TRIST#

30

GPIO55/CLKOUT/IOX_DIN_DIO

77

GPIO0/EXTCLK

13

PECI

12

VTT

NPCE795GA0D X-GP

71.00795.A0G

14"

100K

15"

14"

15"

14"

15"

14"

15"

2 OF 2

KBSOUT0/JENK#

KBSOUT1/TCK KBSOUT2/TMS

KBSOUT3/TDI

KBSOUT4/JEN0#

KBSOUT5/TDO

KBSOUT6/RDY#

KBSOUT7

KBSOUT8 KBSOUT9/SDP_VIS# KBSOUT10/P80_CLK KBSOUT11/P80_DAT

KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62

KBSOUT15/GPIO61/XOR_OUT

GPIO60/KBSOUT16 GPIO57/KBSOUT17

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

NOTE: Please be aware that the SPI interface trace length between PCH and EC should not exceed 6500mils,. The mismatch of SPI interface signals between EC and SPI flash should not exceed 500mils.

174K 1.2V

215K 1.04V

KCOL0

53

KCOL1

52

KCOL2

51

KCOL3

50

KCOL4

49

KCOL5

48

KCOL6

47

KCOL7

43

KCOL8

42

KCOL9

41

KCOL10

40

KCOL11

39

KCOL12

38

KCOL13

37

KCOL14

36

KCOL15

35

KBSOUT16

34

KBC_BL_DTC T#

33

KROW0

54

KROW1

55

KROW2

56

KROW3

57

KROW4

58

KROW5

59

KROW6

60

KROW7

61

KCOL[15..0] 69

KBSOUT16 69

KBC_BL_DTC T# 69

KROW[0..7] 69

Prevent BIOS data loss solution

ECRST#

E

Q2701

Q2701 MMBT3906-4-GP

MMBT3906-4-GP

C

DY

12

C2715

C2715 Do Not Stuff

Do Not Stuff

3D3V_S5

DY

WLAN_PW RON

PURE_HW _SHUTD OWN#

3D3V_AUX_S5

12

R2705

U2702

10KR2J-3-GP

1

GND

3

VDD

2

RESET#

Do Not Stuff

DY

DY RN2702 on FVT stage

DY

RN2702

SPK_MUTE#

RN2702

4

Do Not Stuff

R2707 D o Not Stuff

1 2

BOM1

Title

Size Document Num ber Rev

Size Document Num ber Rev A2

A2

Tuesday, Decem ber 13, 2011

Date: Sheet of

3D3V_S0

1 23

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

KBC Nuvoton NPCE795

CD1 DIS

3D3V_AUX_S5

27 102

1

SC

5

4

3

2

1

D D

C C

B B

SSID = Thermal

Ch3

Ch2

SMBC_THERM27,86 SMBD_THERM27,86

Thermal sensor

Close to CPU high side MOSFET

SA 0905 change to 390p

E

12

C2802

B

SC390P50V2KX-GP

Q2803

MMBT3904WT1G-GP

84.03904.R11

2nd = 84.M3904.A11

Q2805

MMBT3904WT1G-GP

84.03904.R11

2nd = 84.M3904.A11

Close to SO-DIMM side.

R2822

R2822 0R0402-PAD-1-GP

0R0402-PAD-1-GP

1 2 1 2

R2823

0R0402-PAD-1-GP

pin6, ALERT# OD pin7, SYS_SHDN# OD

SC390P50V2KX-GP

C

R2811 0R0402-PAD-1-GPR2811 0R0402-PAD-1-GP

E

B

C

1 2

12

C2808

C2808 SC390P50V2KX-GP

SC390P50V2KX-GP

R2812 0R0402-PAD-1-GPR2812 0R0402-PAD-1-GP

1 2

3D3V_S0

12

R2819

R2819 100KR2J-1-GP

100KR2J-1-GP

C2803

SCD1U10V2KX-5GP

PURE_HW_SHUTDOWN#27,36,40,94

1 2

THERMDA1 THERMDC1 REMOTE2+ REMOTE2-

2103_VDD

THERM_SYS_SHDN# THERM_ALERT#

2ND = 83.BAT54.D81

3rd = 83.BAT54.S81

2200p close to smsc2103 chip

12

C2806

C2806 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

3D3V_S0

12

R2801

R2801 68R2-GP

68R2-GP

U2801

3

Do Not Stuff

12

DY

R2810

R2810 Do Not Stuff

Do Not Stuff

VDD

2

DP1

1

DN1

16

DP2/DN3

15

ND2/DP3

7

SYS_SHDN#

6

ALERT#

9

SMCLK

8

SMDATA

EMC2103-2-AP-GP

74.02103.A73

DY

D2803

D2803 Do Not Stuff

Do Not Stuff

3D3V_AUX_S5

3

1

DY

12

C2807

C2807 Do Not Stuff

Do Not Stuff

TRIP_SET

SHDN_SEL

2

GPIO1 GPIO2

T8

THERMDA186

THERMDC186

REMOTE2-

REMOTE2+

3D3V_S0

12

R2804

R2804 6K8R2J-GP

SHDN_SEL

SHDN --> 2N3904 ON External diode

4 5

10

TACH

11

PWM

TRIP_SET

14

SHDN_SEL

13

12

GND

17

GND

Q2804

D

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

6K8R2J-GP

Do Not Stuff

DY

R2820

2103_4

1 2

2103_5

1 2

R2821 Do Not Stuff

DY

R2803 2K05R2F-GPR2803 2K05R2F-GP

1 2

THERM_SYS_SHDN#

S

R2808 Do Not Stuff

G

R2809 0R0402-PAD-1-GPR2809 0R0402-PAD-1-GP

1 2 1 2

12

C2809

Ch1

C2809 SC390P50V2KX-GP

SC390P50V2KX-GP

SWG

dGPU inside the diode

CPU TEMP: H_THERMDA and H_THERMDC routing 10mil trace width and spacing. Locate Capacity near Thermal diode.

9/2 Thermal Fun.

20100709_EMI

3D3V_S0

RN2801

2 3 1

4

SRN10KJ-5-GP

3D3V_S0

IMVP_PWRGD 36,42

SRN10KJ-5-GP

D2802

CH551H-30GP-GP

SA 0905

KA

FAN_TACH FAN_PWM

VIDEO_THERM_GPIO1 86 VIDEO_THERM_GPIO2 86

T8 = 105

3D3V_S0

12

R2807

R2807 100KR2J-1-GP

100KR2J-1-GP

DY

2200p close to smsc2103 chip

12

C2804

C2804 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

FAN_TACH

THERMDA1

SWG

THERMDC1

R2806 0R0402-PADR2806 0R0402-PAD

DY

12

EC2801

EC2801 Do Not Stuff

Do Not Stuff

1 2

Table 28.1- General Purpose Transistors multi-source

Supplier

Description Lenovo P/N Wistron P/N

MMBT3904WT1G

PANJIT

MMBT3904W 84.M3904.A11

5V_S0

12

C2801

R2805

R2805 10KR2J-3-GP

10KR2J-3-GP

SC4D7U6D3V3KX-GP

FAN_ID27

FAN_PWM_CFAN_PWM

DY

12

EC2802

EC2802 Do Not Stuff

Do Not Stuff

N/A

5V_S0 FAN_PWM_C FAN_TACH FAN_ID

84.03904.R11ON

FAN1

7 5

4 3 2

1 6

ACES-CON5-19-GP

20.F1606.005

1 1 1 1 1

AFTP92AFTP92 AFTP93AFTP93 AFTP94AFTP94 AFTP95AFTP95 AFTP96AFTP96

N/A

1 3

5V_S5

52

+

-

U2802

U2802 LMV331M7X-GP

LMV331M7X-GP

4

12

C2810

SCD1U10V2KX-4GP

2

R2815 0R2J-2-GPR2815 0R2J-2-GP

1 2

PURE_HW_SHUTDOWN#

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

C

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Thermal/FAN

CD1 DIS

1

28 102Tuesday, December 13, 2011

SC

5V_S5

12

RT2813

RT2813 PTC-470-GP

PTC-470-GP

A A

12

RT2814

RT2814 PTC-470-GP

PTC-470-GP

12

RT2815

RT2815 PTC-470-GP

PTC-470-GP

5

12

RT2811

RT2811 PTC-470-GP

PTC-470-GP

12

RT2812

RT2812 PTC-470-GP

PTC-470-GP

12

RT2809

RT2809 PTC-470-GP

PTC-470-GP

12

RT2810

RT2810 PTC-470-GP

PTC-470-GP

12

RT2807

RT2807 PTC-470-GP

PTC-470-GP

12

RT2808

RT2808 PTC-470-GP

PTC-470-GP

12

RT2805

RT2805 PTC-470-GP

PTC-470-GP

12

RT2806

RT2806 PTC-470-GP

PTC-470-GP

4

12

RT2803

RT2803 PTC-470-GP

PTC-470-GP

RINKAN_0D5V

12

RT2801

RT2801 PTC-470-GP

PTC-470-GP

12

RT2802

RT2802 PTC-470-GP

PTC-470-GP

12

5V_S5

12

R2817

R2817 6K81R3F-GP

6K81R3F-GP

C2811

SCD1U10V2KX-4GP

3

1 2

R2816 40K2R2F-GPR2816 40K2R2F-GP

1 2

100KR2F-L1-GP

R2818

5

4

3

2

1

9/26 change to S0

D D

12

SC10U6D3V3MX-GP

HDA_CODE C_RST#17

C C

HDA_CODE C_BITCLK17 HDA_CODE C_SYNC17 HDA_SDIN017 HDA_CODE C_SDOUT17

12

DY

R2907

Do Not Stuff

B B

R2920

1 2

MUTE#27

27KR2J-L1-GP

A A

27KR2J-L1-GP

KBC_BEEP27

PCH_BEEP1 7

3D3V_S0

12

R2918

R2918 10KR2J-3-GP

10KR2J-3-GP

DS

Q2902

Q2902 LSK3541G1ET2L-GP

LSK3541G1ET2L-GP

G

DY

12

C2920

C2921

Do Not Stuff

SPK_MUTE#27

D2901 RB520S M-30T2R-GPD2901 RB520SM- 30T2R-GP

KA

D2902 RB520S M-30T2R-GPD2902 RB520SM- 30T2R-GP

KA

BEEP_ENABLE#27

MUTE

MIC_JACK_230,82

C2910

C2909

SCD1U10V2KX-5GP

R2906 33R 2J-2-GPR 2906 33R2J -2-GP

1 2

BEEP_MIX_ATT

R2915 22KR 2J-GPR 2915 22KR 2J-GP

MIC_CLK82

MIC_DATA82

12

R2913

10KR2J-3-GP

R2916

R2916 47KR2J-2-GP

47KR2J-2-GP

1 2

12

R2917

R2917 10KR2J-3-GP

10KR2J-3-GP

D2903 R B520SM-30T2R-G PD2903 RB520SM-30T2R -GP

KA

D2904 RB520SM-30T2R -GPD2904 R B520SM-30T2R- GP

KA

3D3V_S0

12

C2904

SCD1U10V2KX-5GP

SC10U6D3V3MX-GP

AGND

C2918 SCD1U10V2KX-5GPC 2918 SCD1U10V2KX-5GP

1 2

12

C2922

SC33P50V2JN-3GP

12

R2919

R2919 100KR2J-1-GP

100KR2J-1-GP

R2902

R2902 0R3J-0-U-G P

0R3J-0-U-G P

1 2

12

C2915

HDA_SDIN0_C S

R2911

1 2

33R2J-2-GP

12

C2929

SC33P50V2JN-3GP

Close to Pin 47.

BEEP_MIX_ATT

G

MIC_GPI

12

SCD1U10V2KX-5GP

Do Not Stuff

DS

C2916

MIC_CLK_R

12

DY

12

C2902

SC10U6D3V3MX-GP

AGND

U2901

11

RESET#

6

BIT_CLK

10

SYNC

8

SDATA_IN

5

SDATA_OUT

12

PC_BEEP

47

EAPD/MIC-GPI

4

PD#

Digital

3

DMIC-CLK

2

DMIC-DATA

48

SPDIFO

C2945

PVSS142PVSS243PAD

49

Q2901

Q2901 LSK3541G1ET2L-GP

LSK3541G1ET2L-GP

DVSS

7

12

C2903

SCD1U10V2KX-5GP

3D3V_S0

ALC3202_DVDDIO

27

VREF

SPK-L+

40

AVDD_3R3

12

R2904

R2904 0R3J-0-U-G P

0R3J-0-U-G P

ALC3202_DVDD

9

1

31

DVDD1

DVDD_IO

Analog

ALC3202-GR-G P

SPK-L-41SPK-R-

SPK-R+

44

45

SC2D2U10V3KX-1GP

MPZ1608S331A-GP

MPZ1608S331A-GP MPZ1608S331A-GP

MPZ1608S331A-GP

ALC3202_AVDD

ALC3202_PVDD

29

30

46

39

25

38

PVDD2

PVDD1

AVDD1

AVDD2

MIC2-VREFO

MIC1-VREFO-L

MIC1-VREFO-R

SENSE_A SENSE_B

MIC2_R

MIC2_L

MONO_OUT

MIC1_R

MIC1_L

LINE2_R

LINE2_L

LINE1_R

LINE1_L

JDREF

HPOUT-R HPOUT-L

LDO_CAP

AVSS1

CBP36CBN35CPVEE

AVSS2

26

37

34

12

C2931

C2932

SC2D2U10V3KX-1GP

AGND

L2902

1 2

L2903

1 2

L2901

1 2

L2904

1 2

PLACE NEAR CODEC

SCD1U10V2KX-5GP

13 18

17 16 20 22 21

15 14 24 23

19 33

32

28

12

5V_AUDIO

R2903

R2903 0R3J-0-U-G P

0R3J-0-U-G P

1 2

USE SHAPE

12

C2908

C2905

SCD1U10V2KX-5GP

12

C2907

C2906

SC10U6D3V3MX-GP

AGND

12

C2912

C2911

SC10U6D3V3MX-GP

SCD1U10V2KX-5GP

All Power Line(VDD,AVDD,PVDD,REF etc) must wide trace [20mil]

C2917 SC2D2U10V3KX- 1GPC2917 SC 2D2U10V3KX-1G P C2919 SC2D2U10V3KX- 1GPC2919 SC 2D2U10V3KX-1G P

DY

12

C2924

C2925

Do Not Stuff

SC33P50V2JN-3GP

C2933

12

C2923

SC33P50V2JN-3GP

12

R2914

C2934

20KR2F-L-GP

SC10U6D3V3MX-GP

SC33P50V2JN-3GP

AGND

All audio analog signal must trace with min 10mil width

SP_OUTR+ SP_OUTRSP_OUTLSP_OUTL+

12

C2940

C2941

SC1KP50V2KX-1GP

12

C2942

SC1KP50V2KX-1GP

12

C2943

PLACE NEAR CODEC

SC1KP50V2KX-1GP

5V_S0

R2905

R2905 0R3J-0-U-G P

0R3J-0-U-G P

1 2

12

C2914

C2913

SC10U6D3V3MX-GP

1 2 1 2

Layout Note: place R9500 and R9501 near dock conn

DY

12

C2926

Do Not Stuff

SP_OUTR+ 58 SP_OUTR- 58 SP_OUTL- 58 SP_OUTL+ 58

5V_S0

SC10U10V5KX-2GP

6-10 mil trace recommend

R2908 1KR 2J-1-GPR2908 1KR2J-1-GP

1 2

R2909 1KR 2J-1-GPR2909 1KR2J-1-GP

1 2

R2910 33R 2J-2-GPR 2910 33R2 J-2-GP

1 2

R2912 33R 2J-2-GPR 2912 33R2 J-2-GP

1 2

DY

12

Do Not Stuff

12

C2927

C2937

Do Not Stuff

DY

12

G2902 GAP-C LOSE-PW R-3-GPG2902 GAP- CLOSE-PW R-3-GP

1 2

G2903G2903

1 2

DY

12

C2901

DY

C2944

1 2

Do Not Stuff

DY

12

C2928Do Not StuffDYC2928Do Not Stuff

C2930Do Not StuffDYC2930Do Not Stuff

Place under or under ALC3202

C2935 Do Not Stuff

C2936 Do Not Stuff

12

C2938

SCD1U10V2KX-5GP

SENSE_A 30 SENSE_B 30

DOCK_MIC_R 30 DOCK_MIC_L 30

EXT_MIC_IN 30

DOCK_HP_O UT_R 94 DOCK_HP_O UT_L 94

HP_R_JACK 82 HP_L_JACK 82

DY

1 2

R2901

1 2

0R0805-PAD-1- GP

DY

1 2

5V_AUDIO

SC10U10V5KX-2GP

AGND

12

C2939

AGND

BOM1

SPKR trace width 40 mils---4ohm speaker recommend 40,mil, required 20mil.as min

5

4

3

2

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Audio Codec ALC3202

Size Document Num ber Rev

A2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

CD1 DIS

1

29 102Tuesday, Decem ber 13, 2011

SC

5

4

3

2

1

6-10 mil trace recommend

CLOSE TO CODEC

C E

3D3V_S0

12

100KR2J-1-GP

AGND

R3001

DOCK_MIC_EN

HP_JACK_DOCK

HP_JACK_SYS

R3005 22KR2J-GPR3005 22KR2J-GP

1 2

R3011 22KR2J-GPR3011 22KR2J-GP

1 2

D3001

2

1

DAN222GTL-GP

R3002 20KR2F-L-GPR3002 20KR2F-L-GP

1 2

DS

Q3001

Q3001 LSK3541G1ET2L-GP

G

3

12

LSK3541G1ET2L-GP

AGND

R3008 39K2R2F-L-GPR3008 39K2R2F-L-GP

1 2

DS

Q3005

Q3005 LSK3541G1ET2L-GP

LSK3541G1ET2L-GP

AGND

HP_JACK_IN 27

R3013

R3013 470KR2J-2-GP

470KR2J-2-GP

TO EC

All audio analog signal must trace with min 10mil width

SENSE_B 29

HP_JACK_SYS82

R3006 22KR2J-GPR3006 22KR2J-GP

1 2

12

R3007

R3007 470KR2J-2-GP

470KR2J-2-GP

R3012

1 2

0R0402-PAD-1-GP

AGND

3D3V_S0

12

R3003

10KR2J-3-GP

Do Not Stuff

C E

12

R3003

DY

C3002

AGND

Q3002

R1

B

PDTC115EE-1-GP

12

R3010

R3010 100KR2J-1-GP

100KR2J-1-GP

R2

D D

DOCK_MICIN_DTCT#94

3D3V_S0 3D3V_S0

12

R3009

R3009 10KR2J-3-GP

10KR2J-3-GP

Q3004

R1

DY

12

C3003

C3003 Do Not Stuff

Do Not Stuff

B

R2

PDTC115EE-1-GP

DOCK_HPOUT_DTCT#94

C C

CLOSE TO CODEC

R3004 39K2R2F-L-GPR3004 39K2R2F-L-GP

1 2

DS

Q3003

Q3003 LSK3541G1ET2L-GP

G

LSK3541G1ET2L-GP

AGND

SENSE_A 29

6-10 mil trace recommend

R3014

DOCK_MIC_IN_L94

1 2

2K2R2J-2-GP

All audio analog signal must trace with min 10mil width

B B

12

C3004

C3004 SC1U10V2KX-1GP

SC1U10V2KX-1GP

AGND

A A

5

MIC_JACK_229,82

12

C3005

C3005 SC1U10V2KX-1GP

SC1U10V2KX-1GP

AVDD_3R3

12

R3015

R3015 2K2R2J-2-GP

2K2R2J-2-GP

L3002

1 2

BK1608HS102-T-GP

NEAR EXT MIC CONN

L3001

1 2

MMZ1005Y152CT-GP

12

C3007

C3007 SC100P50V2JN-3GP

SC100P50V2JN-3GP

R3017 47R2J-2-GPR3017 47R2J-2-GP

1 2

12

R3018

R3018 470KR2J-2-GP

470KR2J-2-GP

AGND

4

EXT_MIC_IN 29

C3008 SCD01U25V2KX-3GPC3008 SCD01U25V2KX-3GP

1 2

R3019 Do Not Stuff

1 2

DY

R3020 0R2J-2-GP

1 2

DY

R3021

1 2

DY

R3022

1 2

DY

3

C3001 SC2D2U10V3KX-1GPC3001 SC2D2U10V3KX-1GP

1 2

12

C3006 SC2D2U10V3KX-1GPC3006 SC2D2U10V3KX-1GP

0R3J-0-U-GP

2

1 2

AGND

R3016

R3016 270R2J-L-GP

270R2J-L-GP

DOCK_MIC_R 29

DOCK_MIC_L 29

BOM1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Speaker Conn

CD1 DIS

1

30 102Tuesday, December 13, 2011

SC

Lenovo THINKPAD L430 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual