Lenovo ThinkPad AIZYO Schematic

A

Compal Confidential

B

C

D

E

Compal Confidential

Model Name : AIZY0

1 1

File Name : LA-B921PR10
BOM P/N:43xxxxxxxx

2 2

AIZY0 M/B Schematics Document

Intel Broadwell Y Processor

3 3

2014-09-30

REV:1.0

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/04/10 2017/04/10

2014/04/10 2017/04/10

2014/04/10 2017/04/10

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal El ectronics, I nc.

Compal El ectronics, I nc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal El ectronics, I nc.

Cover Page

Cover Page

Cover Page

LA-B921PR10

LA-B921PR10

LA-B921PR10

1.0

1.0

1.0

136Friday, October 17, 2014

136Friday, October 17, 2014

136Friday, October 17, 2014

of

of

E

of

5

WWW.AliSaler.Com

Compal Confidential

Model Name: AIZY0
File Name: LA-B921PR10

4

3

2

1

D D

eDP Connector
1920 * 1080

uHDMI Connector

Speaker

C C

Digital Array Mic *2

Combo Jack

P.15

MIC BD

IO BD

Realtek ALC233-VB2-CG

WIFI+BT combo
NGFF Half

SPI ROM (8MB)
W25Q64FVSSIQ

Power LED

B B

Battery LED

IO BD

AIZY0 Intel Broadwell Y Block Diagram

Ch0, Ch1

eDP

Click Pad

P.20

P.21

P.15

P.19

P.07

P.23

DDI1

HDAAudio Codec

PCIe
USB2.0

SPI

I2C_1

Intel Broadwell-Y

30mm x 16.5mm x 1.05mm
BGA1234

P.04~P12

LPC

USB3.0

USB2.0

SATA

I2C_0

DDR3L 4GB / 8G
1600MHz 8pcs

P.13~P.14

USB3.0 Connector

USB2.0 Connector

Sensor Hub
ITE IT8350

Touch Panel

Camera 1M HD

Card Reader
Realtek RTS5170

USB2.0 + DC in

P.19

IO BD

P.16

P.22

P.20

SD BD

P.25

I2C

SD Card Connector

Sensor BD

eCompass
AK8963C

ALS
Sensortek STK2213

G-Sensor
KIONIX KXTJ2-1009

G-Sensor
KIONIX KXTJ2-1009

SD BD

P.16

Power, Novo, Rotation Button
Volume up / down

IO BD

DC / DC
Interface CKT

P.24

Thermal Sensor

Power Circuit

A A

5

P.25~P.33

Nuvoton NCT7718W

4

P.23 P.23 P.22

EC
Nuvoton NPCE288

Int. KBD

P.17

Hall Sensor
Toshiba TCS20DLR

3

SSD 128GB / 256GB
NGFF Full

P.18

Hall Sensor
Toshiba TCS20DLR

LA-B921PR10

LA-B921PR10

LA-B921PR10

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEE RING DRAWING IS THE P ROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE P ROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEE RING DRAWING IS THE P ROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONIC S, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELECTRONIC S, INC.

IO BD

Compal Secret Data

Compal Secret Data

2014/04/10 2017/04/10

2014/04/10 2017/04/10

2014/04/10 2017/04/10

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

MB Block Diagram

MB Block Diagram

MB Block Diagram

1

236Friday, October 17, 2 014

236Friday, October 17, 2 014

236Friday, October 17, 2 014

1.0

1.0

1.0

1

Voltage Rails

power
plane

A A

+5VALW

B+

+1.35V

+3VALW

State

+5VS
+3VS
+1.5VS
+1.05VS_VTT
+CPU_CORE
+0.675VS

2

3

4

5

BOM Structure Table

STATE

SIGNAL

Full ON

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S0# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS

ON

ON

ON

ON

ON ON ON

ON

OFF

OFF

OFF

OFF

OFFLOW LOW LOW LOW

HIGH HIGH HIGH HIGH

LOW LOW

HIGH

LOWLOWLOW

HIGH

HIGH

Clock

OFF

OFF

OFF

BTO Item BOM Structure

Connector ME@
76 LEVEL X76@
UNPOP

@

CPU OPTION CPU1@ ~ CPU8@

H4G@DRAM Option

E4G@

M4G1@

S8G@ E8G@

M8G@H8G@

EMI POP EMI@
ESD POP ESD@

@EMI@EMI UNPOP

S4G@

M4G2@

ESD UNPOP @ESD@

WLAN Support ISCT

WLAN No Support ISCT

ISCT@
NoISCT@

S0

S3

S5 S4/AC

S5 S4/ Battery only

B B

S5 S4/AC & Battery
don't exist

EC SM Bus1 address

Device

Smart Battery
Charger
Home Key Button(TS)

Address Address

8bit:0x60, 7bit:0x30

CPU SM Bus address

Device Address

NA NA

C C

SMBUS Control Table

HOST

Changer

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK

D D

SML1DATA

NPCE288

+3VLP

NPCE288

+3VS

CPU

+3VALW

CPU

+3VALW

CPU

+3VS

+3VLP

X

X

X

X V

O

O

O

O
O

X
X

V

+3VLP

X

X

X

X

O

O

XX
X

X
XX X

X

X

X

X

+3VS

OO

X

X

EC SM Bus2 address

Device

Thermal Sensor NCT7718W
Broadwell ULT SML1

CPU SML0 Bus address

HomeKeyBATT NPCE288

CPU

X

V

+3VALW

V

+3VS

X

X

X

X

X

X

1001100x

AddressDevice

Thermal
sensor
NCT7718W

XV

V

+3VS

X

X

VX

+3VS

USB 2.0 Port Table

USB 2.0 Port

0
1
2
3
4
5
6
7

HDMI Logo

45@

45@

ZZZ

ZZZ

HDMI Logo

HDMI Logo

RO0000003HM

RO0000003HM

PCB part

ZZZ003

ZZZ003

PCB 19O LA-B921P REV1 M/B 1

PCB 19O LA-B921P REV1 M/B 1

DA80011R110

DA80011R110

09/30, Change PCB P/N to Rev.1.0

PCB Rev.1A P/N:
DA80011R11A PCB 19O LA-B921P REV1A M/B 1

3 External
USB Port

USB 2.0 Port (I/O Board)
USB 3.0/2.0 Port (MB)
DCIN USB COMBO
Card Reader
Touch Screen
Camera
Mini Card (WLAN/BT)
Sensor Fusion

CPU part

UCPU1

CPU1@

UCPU1

CPU1@

QGGY 1333/0.6G

QGGY 1333/0.6G

SA00007TL00

SA00007TL00

DRAM

ZZZ3

H4G@

ZZZ3

H4G@

HYNIX

HYNIX

X76581 38L02

X76581 38L02

H5TC4G63AFR-PBA
SA00005AV70

ZZZ4

ZZZ4

X76581 38L03

X76581 38L03

MT41K256M16LY-107
SA000081200

07/01, SA00005HTB0 change to SA000081200

USB 3.0 Port Table

Port

1
2

USB 3.0 Port (MB)

3
4

SATA Port Table

Port

3
2
1

NGFF SSD(SATA)

0

UCPU1

CPU2@

UCPU1

CPU2@

UCPU1

UCPU1

QGGZ 1333/0.8G

QGGZ 1333/0.8G

SA00007TM00

SA00007TM00

M4G2@

M4G2@

ZZZ7

ZZZ7

MICRON

MICRON

SAMSUNG

SAMSUNG

X76581 38L01

X76581 38L01

K4B4G1646Q-HYK0
SA00005JC60

CPU3@

CPU3@

QGGX 1600/0.8G

QGGX 1600/0.8G

SA00007TK00

SA00007TK00

S4G@

S4G@

UCPU1

CPU4@

UCPU1

CPU4@

QH1Y E0 0.8G

QH1Y E0 0.8G

SA00007YZ60

SA00007YZ60

07/01, Add QS SA00007YZ40

ZZZ8

M4G1@

ZZZ8

M4G1@

MICRON

MICRON

X76581 38L04

X76581 38L04

MT41K256M16HA-125:E
SA00005WD60

ZZZ9

ZZZ9

SAMSUNG

SAMSUNG

X76581 38L05

X76581 38L05

K4B8G1646Q-MYK0
SA00006AT20

PCIE Port Table

Port

Lane

1
2
3
4

5

6

UCPU1

UCPU1

QH0U E0 1.1G

QH0U E0 1.1G

SA000084N20

SA000084N20

S8G@

S8G@

0
1
2
3
0
1
2
3

CPU5@

CPU5@

08/11, Add QS SA000084N0008/11, Add HDMI Logo P/N

ZZZ10

ZZZ10

ELPIDA

ELPIDA

X76581 38L07

X76581 38L07

EDJ8416E6MB-GN-F
SA00006AU30

NGFF WLAN

E8G@

E8G@

UCPU1

UCPU1

QH33 F0 0.8G

QH33 F0 0.8G

SA00008BP00

SA00008BP00

CPU6@

CPU6@

UCPU1

CPU7@

UCPU1

CPU7@

QH2V F0 1.1G

QH2V F0 1.1G

SA00008BU00

SA00008BU00

ZZZ5

M8G@

ZZZ5

M8G@

MICRON

MICRON

X76581 38L08

X76581 38L08

MT41K512M16TNA-125E
SA00006AV20

UCPU1

UCPU1

QH2R F0 1.2G

QH2R F0 1.2G

SA00008BI00

SA00008BI00

ZZZ6

H8G@

ZZZ6

H8G@

HYNIX

HYNIX

X76581 38L06

X76581 38L06

H5TC8G63AMR-PBA
SA00006WZ20

CPU8@

CPU8@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/04/10 2017/04/10

2014/04/10 2017/04/10

2014/04/10 2017/04/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

4

Date: Sheet

Compal Electronics, Inc.

Note List

Note List

Note List

LA-B921PR10

LA-B921PR10

LA-B921PR10

5

of

of

of

336Friday, October 17, 2014

336Friday, October 17, 2014

336Friday, October 17, 2014

1.0

1.0

1.0

5

WWW.AliSaler.Com

D D

HDMI

1 2

RC2 100K_0402_5%@RC2 100K_0402_5%@

ENBKL

4

CPU_DP2_N0[21]
CPU_DP2_P0[21]
CPU_DP2_N1[21]
CPU_DP2_P1[21]
CPU_DP2_N2[21]
CPU_DP2_P2[21]
CPU_DP2_N3[21]
CPU_DP2_P3[21]

CPU_DP2_N0
CPU_DP2_P0
CPU_DP2_N1
CPU_DP2_P1
CPU_DP2_N2
CPU_DP2_P2
CPU_DP2_N3
CPU_DP2_P3

AD25
AC25
AD26
AC26
AG25
AE25
AG26
AE26

AD22
AC22
AG22
AE22
AD21
AC21
AG21
AE21

3

UCPU1A

UCPU1A

DDI1_TXN_0
DDI1_TXP_0
DDI1_TXN_1
DDI1_TXP_1
DDI1_TXN_2
DDI1_TXP_2
DDI1_TXN_3
DDI1_TXP_3

DDI2_TXN_0
DDI2_TXP_0
DDI2_TXN_1
DDI2_TXP_1
DDI2_TXN_2
DDI2_TXP_2
DDI2_TXN_3
DDI2_TXP_3

DDI

DDI

eDP

eDP

EDP_RCOMP

EDP_DISP_UTIL

EDP_TXN0

EDP_TXP0

EDP_TXN1

EDP_TXP1

EDP_TXN2

EDP_TXP2

EDP_TXN3

EDP_TXP3

EDP_AUXN
EDP_AUXP

AD17
AC17
AG18
AE18
AD18
AC18
AA17
W17

AG16
AE17

AP41
Y21

EDP_COMP

2

EDP_TXN0 [20]
EDP_TXP0 [20]
EDP_TXN1 [20]
EDP_TXP1 [20]

EDP_AUXN [20]
EDP_AUXP [20]

1 2

RC1 24.9_0402_1%RC1 24.9_0402_1%

1 2

RC124 0_0402_5%@RC124 0_0402_5%@

1 2

RC125 0_0402_5%@RC125 0_0402_5%@

eDP

+VCCIOA_OUT

1

EDP_COMP:
Trace width = 20 mils, Spacing = 25 mil,

INVPWMCPU_INV_PWM

Max length = 100 mils

BDW-Y-LPDDR3_BGA1234

ENBKL, BIOS setting default low

RC4

RC4
0_0402_5%

0_0402_5%

INVPWM[20]

ENBKL[17]

H_CATERR#

12

ESD@

ESD@

CC101

CC101
100P_0402_50V8J

100P_0402_50V8J

08/18, ESD REQUEST

C C

ESD

H_CPUPWRGD

12

ESD@

ESD@

CC91

CC91
100P_0402_50V8J

100P_0402_50V8J

07/07, change to mount

10K,3VS
10K,3VS
10K,3VS

10K,3VS

10K,3VS
@10K,3VS
10K,3VS

@10K,3VS

10K,3VS

PCH_ENVDD[20]

PCH_GPIO77[8]
PCH_GPIO78[8]
PCH_GPIO79[8]
BT_OFF#[19,8]

CPU_TP_INT_N[23]

PCH_GPIO52[8]
PCH_GPIO54[8]

PCH_GPIO51[8]

SENSOR_HUB_INT#[16,8]

PCH_GPIO53[8]

1 2

RC149 0_0402_5%RC149 0_0402_5%

EDP_BKCTL

T30T30

1 2

BDW-Y-LPDDR3_BGA1234

@

@

UCPU1I

UCPU1I

eDP Sideband

eDP Sideband

BM41

EDP_BKLCTL

BR42

EDP_BKLEN

BN40

EDP_VDDEN

K35

PIRQA_N_GPIO77

F31

PIRQB_N_GPIO78

J34

PIRQC_N_GPIO79

D38

PIRQD_N_GPIO80

B25

PME

M29

GPIO55

L30

GPIO52

F35

GPIO54

H33

GPIO51

C39

GPIO53

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

UCPU1B

UCPU1B

PCI

PCI

1 OF 20

1 OF 20

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN
DDPC_AUXN

Display

Display

DDPB_AUXP
DDPC_AUXP

DDPB_HPD
DDPC_HPD

EDP_HPD

9 OF 20

9 OF 20

BP43
BN42
BP41
BR40

Y26
Y25
W26
W25

Y30
Y29
W29

DDI2_CTRL_CK
DDI2_CTRL_DATA

DDI2_HDMI_HPD
EDP_HPD

DDI2_CTRL_CK [21]

DDI2_CTRL_DATA [21]

DDI2_HDMI_HPD [21]
EDP_HPD [20]

HDMI DDC

closed MCP 1000 mils

T32T32

H_CATERR#

ESD

H_PROCHOT#

12

@ESD@

@ESD@

CC92

CC92
100P_0402_50V8J

100P_0402_50V8J

B B

+1.35V

12

RC11

RC11
470_0402_5%

470_0402_5%

DDR3_DRAMRST#

H_PROCHOT#[17,25]

+1.35V

+1.05VS_VTT

DDR3 Compensation Signals:
Trace width = 20 mils, Spacing = 25 mil,
Max length = 500 mils

1 2

RC9 62_0402_5%RC9 62_0402_5%

RC13: 120 or 121

H_PECI[17]

1 2

RC8 10K_0402_5%RC8 10K_0402_5%

1 2

RC10 56_0402_5%RC10 56_0402_5%

1 2

RC12 200_0402_1%RC12 200_0402_1%

1 2

RC13 120_0402_5%RC13 120_0402_5%

1 2

RC15 100_0402_1%RC15 100_0402_1%

DDR3_DRAMRST#[13,14]

T31T31

H_CPUPWRGD

H_PROCHOT#_R

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
DDR3_DRAMRST#
DDR_PG_CTRL

CF41

PROC_DETECT

CH39

CATERR

CK42

PECI

CG42

PROCPWRGD

CH41

PROCHOT

CV7

SM_RCOMP0

CP7

SM_RCOMP1

CT7

SM_RCOMP2

AB2

SM_DRAMRST

BL14

SM_PG_CNTL1

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

MISC

MISC

THERMAL

THERMAL

PWR

PWR

DDR3

DDR3

PROC_TCK

PROC_TMS_CN40

PROC_TRST

PROC_TDO

JTAG

JTAG

PRDY
PREQ

PROC_TDI

BPM_N_0
BPM_N_1
BPM_N_2
BPM_N_3
BPM_N_4
BPM_N_5
BPM_N_6
BPM_N_7

2 OF 20

2 OF 20

CU40
CR41

CM41
CN40
CR39
CU36
CU38

CM39
CN38
CK36
CM37
CN36
CR35
CN34
CR34

XDP_PRDY_N
XDP_PREQ_N

CPU_XDP_TCK
CPU_XDP_TMS
CPU_XDP_TRST_N
CPU_XDP_TDI
CPU_XDP_TDO

XDP_BPM_N_0
XDP_BPM_N_1

T33T33
T34T34

T40T40
T41T41
T51T51
T56T56
T57T57

reserve Via

PU/PD for JTAG signals

+3VALW_PCH

1 2

RC126 1K_0402_5%@RC126 1K_0402_5%@

SYS_PWROK

12

ESD@

ESD@

CC102

CC102
100P_0402_50V8J

100P_0402_50V8J

08/18, ESD REQUEST

SYS_PWROK [17,8]

1

CC3

0.1U_0402_16VK7

0.1U_0402_16VK7

DDR_PG_CTRL

A A

2
3

CC3

@

@

UC1

UC1

NC1VCC
A
GND

74AUP1G07GW_TSSOP5

74AUP1G07GW_TSSOP5

Y

5

+3VALW

2

12

RC20

5

4

RC20
220K_0402_5%

220K_0402_5%

DDR_VTT_PG_CTRL [29]

Security Classification

Security Classification

Security Classification

2014/04/10 2017/04/10

2014/04/10 2017/04/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/04/10 2017/04/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal El ectronics, I nc.

Compal El ectronics, I nc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal El ectronics, I nc.

BDW MCP(1/9) DDI,eDP,PM,XDP

BDW MCP(1/9) DDI,eDP,PM,XDP

BDW MCP(1/9) DDI,eDP,PM,XDP

LA-B921PR10

LA-B921PR10

LA-B921PR10

436Friday, October 17, 2014

436Friday, October 17, 2014

436Friday, October 17, 2014

1

1.0

1.0

1.0

of

of

of

5

4

3

2

1

DDR_A_D[0..63][13]
DDR_A_MA[0..15][13]
DDR_A_DQS#[0..7][13]
DDR_A_DQS[0..7][13]

UCPU1C

D D

C C

B B

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

CT17
CV17
CN14
CP15
CN16
CR16

CM13

CV15
CT13
CP13
CP10

CM10
CN12

CV13
CV10
CT10
CT25
CP25

CN22

CP23

CN24

CV25
CV23
CT23

CN20
CN18

CT21
CT19
CP19
CP21
CV19
CV21

BU2
BW2
BW6

BU4
BW4

BT3

BU6

BT5

BN2

BR2

BN6

BN4

BR6

BR4

BM5

BM3
BT11
BU10

BW12
BW10

BW8

BU8
BU12

BT9
BN8
BR8

BN12
BN10
BR12
BR10

BM11

BM9

UCPU1C

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

DDR Channel A

DDR Channel A

SA_CLK_N_0

SA_CLK0

SA_CLK_N_1

SA_CLK1
SA_CKE0

SA_CKE1
SA_CKE2
SA_CKE3

SA_CS_N_0
SA_CS_N_1

SA_ODT0
SA_CAB3

SA_CAB2
SA_CAB1

SA_CAB4
SA_CAB6
SA_CAA5

SA_CAB9
SA_CAB8

SA_CAB5
NOTUSED4
NOTUSED3

SA_CAA0

SA_CAA2

SA_CAA4

SA_CAA3

SA_CAA1

SA_CAB7

SA_CAA7

SA_CAA6

SA_CAB0

SA_CAA9

SA_CAA8
SA_DQSN0

SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7

SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7

SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1

SM_VCCDDQG

CG4
CG2
CC4
CC6

CH11
CH9
CA12
CA10

CA4
CA2
CA6

CE2
CE4
CC8

CB5
CC2
CF11

CE8
CE12
CF5
CE10
CG8
CG6
CH3
CE6
CB9
CC12
CF3
CG12
CH5
CB3
CF9
CG10

CU16
CR12
CR24
CR20
BV3
BP3
BV9
BP9

CT15
CU12
CU24
CU20
BV5
BP5
BV11
BP11

AP13
AU14
AT13
CC14

DDRA_ODT0

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

T42T42

+V_DDR_VREFCA [13]
+V_DDR_VREFDQ0 [13]
+V_DDR_VREFDQ1 [14]

T44T44

10 mil trace width

M_CLK_A_DDR#0 [13]
M_CLK_A_DDR0 [13]

DDR_A_CKE0 [13]
DDR_A_CKE1 [13]

DDR_A_CS0# [13]
DDR_A_CS1# [13]

DDR_A_RAS# [13]
DDR_A_WE# [13]
DDR_A_CAS# [13]

DDR_A_BS0 [13]
DDR_A_BS1 [13]
DDR_A_BS2 [13]

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_D[0..63][14]
DDR_B_MA[0..15][14]
DDR_B_DQS#[0..7][14]
DDR_B_DQS[0..7][14]

UCPU1D

UCPU1D

BK3

SB_DQ0

BK5

BG6

BJ2
BJ4

BJ6
BG2
BG4

BF3

BF5
BC6
BE2
BE4
BE6
BC2
BC4

BE10
BC10

BE8
BC8

BF11
BC12
BE12

BF9

BJ12

BG12

BJ8

BJ10

BG8

BG10

BK9

BK11

AM1
AH2

AJ3
AM5
AM3

AJ1

AJ5
AH4
AG3
AG1
AD2
AE3
AE1
AG5
AD4
AE5
AM9
AM7
AH8

AJ9

AM11

AJ7

AJ11
AH10
AE11

AG7
AE7
AE9

AG11

AG9
AD8

AD10

SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

DDR Channel B

DDR Channel B

SB_CK_N_0
SB_CK_N_1

SB_CS_N_0
SB_CS_N_1

SB_CK0
SB_CK1

SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3

SB_ODT0
SB_CAB3

SB_CAB2
SB_CAB1

SB_CAB4
SB_CAB6
SB_CAA5

SB_CAB9
SB_CAB8

SB_CAB5
NOTUSED
NOTUSED

SB_CAA0

SB_CAA2

SB_CAA4

SB_CAA3

SB_CAA1

SB_CAB7

SB_CAA7

SB_CAA6

SB_CAB0

SB_CAA9

SB_CAA8

SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7

SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7

AW6
AW4
AP11
AP9

BA2
BA4
AR8
AP5

AR10
AT11

AU10
BA10

AW12
AW10

AY11
BA12
AU2

AT9
AR4
AU8
AR6
AT5
AT3
BA8
AY3
AW2
AY5
AY9
AU4
AU6
AW8
BA6
AR2

BH5
BD5
BD11
BH11
AK2
AF2
AK8
AF8

BH3
BD3
BD9
BH9
AK4
AF4
AK10
AF10

DDRB_ODT0

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

M_CLK_B_DDR#0 [14]
M_CLK_B_DDR0 [14]

DDR_B_CKE0 [14]
DDR_B_CKE1 [14]

DDR_B_CS0# [14]

T43T43

DDR_B_CS1# [14]

DDR_B_RAS# [14]
DDR_B_WE# [14]
DDR_B_CAS# [14]

DDR_B_BS0 [14]
DDR_B_BS1 [14]
DDR_B_BS2 [14]

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

A A

5

3 OF 20

3 OF 20

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

Security Classification

Security Classification

Security Classification

2014/04/10 2017/04/10

2014/04/10 2017/04/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/04/10 2017/04/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

4 OF 20

4 OF 20

Compal El ectronics, I nc.

Compal El ectronics, I nc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal El ectronics, I nc.

BDW MCP(2/9) DDRIII

BDW MCP(2/9) DDRIII

BDW MCP(2/9) DDRIII

LA-B921PR10

LA-B921PR10

LA-B921PR10

536Friday, October 17, 2014

536Friday, October 17, 2014

536Friday, October 17, 2014

1

1.0

1.0

1.0

of

of

of

5

WWW.AliSaler.Com

4

3

2

1

1 2

RC21 10M_0402_5%RC21 10M_0402_5%

YC1

YC1

1 2

32.768KHZ 12.5PF 9H03200031

32.768KHZ 12.5PF 9H03200031

D D

1

CC5

CC5
18P_0402_50V8J

18P_0402_50V8J

2

10/8, CC5 change 15P to 18P for RTC timing

PCH_INTVRMEN

INTVRMEN (+1.05VA)

*

C C

B B

RC26 330K_0402_5%RC26 330K_0402_5%
RC27 330K_0402_5%@RC27 330K_0402_5%@

H󶁪Integrated VRM enable
L

󶁪

Integrated VRM disable

RTC Battery

W=20mils W=20mils

+RTCVCC +RTCBATT

PCH_RTCX1
PCH_RTCX2

1

CC6

CC6
15P_0402_50V8J

15P_0402_50V8J

2

1 2
1 2

+RTCVCC

CMOS

CLRP2

CLRP2
SHORT PADS

SHORT PADS

@

@

HDA_RST_AUDIO#[15]
HDA_BITCLK_AUDIO[15]
HDA_SDOUT_AUDIO[15]

HDA_SYNC_AUDIO[15]

+RTCVCC

PCIECLKREQ5_N[8]

+RTCVCC

1U_0402_6.3V6K

1U_0402_6.3V6K

RC22 20K_0402_1%RC22 20K_0402_1%

1 2
1 2

RC24 20K_0402_1%RC24 20K_0402_1%

1U_0402_6.3V6K

1U_0402_6.3V6K

To enable the integrated voltage regulator for
DCPSUS1, DCPSUS2, DCPSUS3 and
DCPSUS4 this signal must be pulled to
VCCRTC through a weak resistor (for
example, 330 KΩ ±5%).
To disable the integrated voltage regulator,
this signal must be pulled down through a
weak resistor (for example, 330 KΩ ±5%)
and the DCPSUS rails must be powered
externally.

WLAN

CC4

CC4

CC7

CC7

CLK_PCIE_WLAN#[19]
CLK_PCIE_WLAN[19]

WLAN_CLKREQ#[19,8]

1

2

1

2

10K,3VS

10K,3VS

10K,3VS

10K,3VS

10K,3VS

10K,3VS

1 2

1 2

RC23 1M_0402_5%RC23 1M_0402_5%

HDA_SDIN0[15]

reserve Via

Closed MCP 1000 mils

PCIECLKREQ0_N[8]

PCIECLKREQ1_N[8]

PCIECLKREQ2_N[8]

PCIECLKREQ4_N[8]

PCH_RTCX1
PCH_RTCX2
SM_INTRUDER#
PCH_INTVRMEN
PCH_SRTCRST#
PCH_RTCRST#

HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_SDIN0

HDA_SDOUT

PCH_JTAG_RST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS

PCH_TCK_JTAGX

EMI

RP39

RP39

1 8
2 7
3 6
4 5

33_8P4R_5%

33_8P4R_5%

EMI@

EMI@

PCIECLKREQ0_N

PCIECLKREQ1_N

PCIECLKREQ2_N
CLK_PCIE_WLAN#

CLK_PCIE_WLAN

PCIECLKREQ4_N

PCIECLKREQ5_N

UCPU1E

UCPU1E

C9

RTCX1

C7

RTCX2

J5

INTRUDER

H6

INTVRMEN

D6

SRTCRST

A8

RTCRST

L6

HDA_BCLK_I2S0_SCLK

L4

HDA_SYNC_I2S0_SFRM

J9

HDA_RST_N_I2S_MCLK

L10

HDA_SDI0_I2S0_RXD

L8

HDA_SDI1_I2S1_RXD

N3

HDA_SDO_I2S0_TXD

N5

HDA_DOCK_EN_N_I2S1_TXD

N7

HDA_DOCK_RST_N__I2S1_SFRM

N9

I2S1_SCLK

CM7

PCH_TRST

CK17

PCH_TCK

CL20

PCH_TDI

CL18

PCH_TDO

CK15

PCH_TMS

P17

RSVD_P17

G26

RSVD_G26

CL16

JTAGX

C5

RSVD_C5

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

HDA_RST#
HDA_BIT_CLK
HDA_SDOUT
HDA_SYNC

RC66 0_0402_5%RC66 0_0402_5%

UCPU1F

UCPU1F

AD29

CLKOUT_PCIE_N0

AC29

CLKOUT_PCIE_P0

B33

PCIECLKRQ0_N_GPIO18

AD30

CLKOUT_PCIE_N1

AC30

CLKOUT_PCIE_P1

H25

PCIECLKRQ1_N_GPIO19

AE30

CLKOUT_PCIE_N2

AG30

CLKOUT_PCIE_P2

P25

PCIECLKRQ2_N_GPIO20

AC34

CLKOUT_PCIE_N3

AD34

CLKOUT_PCIEP3

P27

PCIECLKRQ3_N_GPIO21

AE29

CLKOUT_PCIE_N4

AG29

CLKOUT_PCIE_P4

D35

PCIECLKRQ4_N_GPIO22

AG33

CLKOUT_PCIE_N5

AE33

CLKOUT_PCIE_P5

G30

PCIECLKRQ5_N_GPIO23

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

1 2

Clock Signal

Clock Signal

SATA

SATA

SATA_RN0_PERN6_L3

RTC

RTC

Audio

Audio

JTAG

JTAG

SATA_RP0_PERP6_L3

SATA_TN0_PETN6_L3
SATA_TP0_PETP6_L3

SATA_RN1_PERN6_L2
SATA_RP1_PERP6_L2

SATA_TN1_PETN6_L2
SATA_TP1_PETP6_L2

SATA_RN2_PERN6_L1
SATA_RP2_PERP6_L1

SATA_TN2_PETN6_L1
SATA_TP2_PETP6_L1

SATA_RN3_PERN6_L0
SATA_RP3_PERP6_L0

SATA_TN3_PETN6_L0
SATA_TP3_PETP6_L0

SATA1GP_SATAPHY_PC_GPIO35

DIFFCLK_BIASREF

CLKOUT_ITPXDP_P

SATA0GP_GPIO34
SATA2GP_GPIO36

SATA3GP_GPIO37

XTAL24_IN

XTAL24_OUT

RSVD_BK41
RSVD_BK43

TESTLOW_AC33
TESTLOW_AD33

TESTLOW_N14
TESTLOW_M15

CLKOUT_LPC_0
CLKOUT_LPC_1

CLKOUT_ITPXDP

6 OF 20

6 OF 20

SATA_RCOMP

SATA_IREF

RSVD_R34
RSVD_R32

SATALED

5 OF 20

5 OF 20

ME_EN [17]

AR44

XTAL24_IN

AP45

XTAL24_OUT

BK41
BK43
A38

XCLK_BIASREF

AC33

TESTLOW1

AD33

TESTLOW2

N14

TESTLOW3

M15

TESTLOW4

K15
L14

CLKOUT_LPC0

AE34

CLK_BCLK_ITP#

AG34

CLK_BCLK_ITP

V36
V38
W43
AA43

T37
T39
T43
V42

Y38
W39
T41
W41

W37
Y36
AB42
AA41

F29
H29
D33
L26

L42
R34
R32
L44
C30

INTEL suggest when no use
need PU, if this pin set GPI

PCH_GPIO35

PCH_GPIO34
PCH_GPIO35
PCH_GPIO36
PCH_GPIO37

SATA_IREF

SATA_RCOMP
PCH_SATALED#

XTAL24_IN

XTAL24_OUT

15P_0402_50V8J

15P_0402_50V8J

1 2

RC37 3.01K_0402_1%RC37 3.01K_0402_1%

1 8
2 7
3 6
4 5

RP40 10K_8P4R_5%RP40 10K_8P4R_5%

RC38 22_0402_5%RC38 22_0402_5%

SATA_PRX_DTX_N1 [18]
SATA_PRX_DTX_P1 [18]
SATA_PTX_DRX_N1 [18]
SATA_PTX_DRX_P1 [18]

1 2

RC25 10K_0402_5%RC25 10K_0402_5%

1 2

RC28 0_0402_5%@ RC28 0_0402_5%@

PCH_GPIO34 [8]
PCH_GPIO36 [8]

PCH_GPIO37 [8]

1 2

RC127 0_0603_5%RC127 0_0603_5%

1 2

RC29 3.01K_0402_1%RC29 3.01K_0402_1%

SATA_COMP:
Trace width = 15 mils, Spacing = 12 mil,
Max length = 500 mils

RC34 1M_0402_5%RC34 1M_0402_5%

1

1

CC9

CC9

2

24MHZ_12PF_7V24000020

24MHZ_12PF_7V24000020

12

T49T49
T50T50

10K,3VS

10K,3VS
10K,3VS

PCH_SATALED# [8]

1 2

YC2

YC2

1

GND

GND

2

+V1.05S_AXCK_LCPLL

4

NGFF(SSD)

+3VS

NGFF_SSD_PEDET [18]

+V1.05S_ASATA3PLL

10K,3VS

3

3

1

CC8

CC8
15P_0402_50V8J

15P_0402_50V8J

2

CK_LPC_KBC [17]

1 2

RC39 806_0402_1%RC39 806_0402_1%

1

C5265

C5265
1U_0402_6.3V6K

A A

1U_0402_6.3V6K

2

08/21, RC39 change to 806 ohm

Safty suggestion remove EE side ,Keep PWR side

Security Classification

Security Classification

5

Security Classification

2014/04/10 2017/04/10

2014/04/10 2017/04/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/04/10 2017/04/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal El ectronics, I nc.

Compal El ectronics, I nc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal El ectronics, I nc.

BDW MCP(3/9) SATA,HDA,CLK

BDW MCP(3/9) SATA,HDA,CLK

BDW MCP(3/9) SATA,HDA,CLK
LA-B921PR10

LA-B921PR10

LA-B921PR10

636Thursday, October 23, 2014

636Thursday, October 23, 2014

636Thursday, October 23, 2014

of

of

1

of

1.0

1.0

1.0

5

EMI

D D

+3VALW_PCH

PCH_SPI_CLK_R

RC41 1K_0402_1%RC41 1K_0402_1%
RC42 1K_0402_1%RC42 1K_0402_1%

1 2
1 2

RC40 33_0402_5%EMI@RC40 33_0402_5%EMI@

LPC_AD0[17]
LPC_AD1[17]
LPC_AD2[17]
LPC_AD3[17]

LPC_FRAME#[17]

1 2

4

UCPU1G

UCPU1G

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

PCH_SPI_CLK
PCH_SPI_CS0#

PCH_SPI_MOSI
PCH_SPI_MISO
PCH_SPI_WP#
PCH_SPI_HOLD#

P13
M13
R14

K13

P15

C26
H27
M27

K27
D31

B23

F27

J26

LAD0
LAD1
LAD2
LAD3
LFRAME

SPI_CLK
SPI_CS0
SPI_CS1
SPI_CS2
SPI_MOSI
SPI_MISO
SPI_IO2
SPI_IO3

3

SMBUS

SMBUS

LPC

LPC

SML1ALERT_N_PCHHOT_N_GPIO73

SPI

SPI

SMBALERT_N_GPIO11

SML0ALERT_N_GPIO60

SML1DATA_GPIO74

C-Link

C-Link

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK_GPIO75

CL_CLK

CL_DATA

CL_RST

K21
P21
B21
F21
P19
B19
H8
C14
A14

D23
H23
K23

SMBCLK
SMBDATA
PCH_GPIO60
SML0CLK
SML0DATA
PCH_GPIO73
SML1CLK
SML1DATA

2

PCH_GPIO11 [8]

PCH_GPIO60 [8]

PCH_GPIO73 [8]

10K,+3VALW_PCH

10K,+3VALW_PCH

10K,+3VALW_PCH

1

(EC, Thermal sensor)

moodule design 3.3K

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

Closed to ROM

CHKLIST1.0
2 SPI Device = 33 ohm
1 SPI Device = 15 ohm

PCH_SPI_WP#_R
PCH_SPI_MOSI_R

PCH_SPI_HOLD#_R

C C

RP41

RP41

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

33_0804_8P4R_5%

1 2

RC128 0_0402_5%RC128 0_0402_5%

PCH_SPI_WP#
PCH_SPI_MOSI
PCH_SPI_MISOPCH_SPI_MISO_R
PCH_SPI_HOLD#

PCH_SPI_CS0#PCH_SPI_CS0#_R

SPI ROM FOR ME ( 8MByte )

12

RC48

RC48
33_0402_5%

33_0402_5%

@EMI@

@EMI@

CC11

CC11
22P_0402_50V8J

22P_0402_50V8J

@EMI@

@EMI@

EMI

+3VALW_PCH

1

CC10

CC10

0.1U_0402_16VK7

0.1U_0402_16VK7

2

ROM is Quad SPI

UC2

UC2

PCH_SPI_CS0#_R
PCH_SPI_WP#_R

B B

EC_SPI_MISO[17]
EC_SPI_MOSI[17]
EC_SPI_CLK[17]
EC_SPI_CS0#[17]

1

CS#

2

DO(IO1)

HOLD#(IO3)

3

WP#(IO2)

4

GND

W25Q64FVSSIQ_SO8

W25Q64FVSSIQ_SO8

SPI ROM 8MB
1st: SA000039A30 - Winbond

RP43

RP43

1 8
2 7
3 6
4 5

33_0804_8P4R_5%

33_0804_8P4R_5%

8

VCC

7
6

CLK

5

DI(IO0)

PCH_SPI_MISO_R
PCH_SPI_MOSI_R
PCH_SPI_CLK_R
PCH_SPI_CS0#_R

PCH_SPI_HOLD#_RPCH_SPI_MISO_R
PCH_SPI_CLK_R
PCH_SPI_MOSI_R

7 OF 20

7 OF 20

moodule design 499 ohm
CRB 2.2K

SML1 Bus BIOS set Native,
it's OD pin

SML1 Bus :EC/Thermal Sensor

FootPrint :DMN66D0LDW-7_SOT363-6

SML1CLK

2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6
QC1A

QC1A

SML1DATA

QC1B 2N7002KDWH_SOT363-6

QC1B 2N7002KDWH_SOT363-6

SML1CLK
SML1DATA

SMBCLK
SMBDATA
SML0CLK
SML0DATA

SML1DATA
SML1CLK

1 8
2 7
3 6
4 5

RC49 2.2K_0402_5%@RC49 2.2K_0402_5%@
RC50 2.2K_0402_5%@RC50 2.2K_0402_5%@

+3VS

2

@

@

6 1

5

@

@

3 4

1 2

RC45 0_0402_5%RC45 0_0402_5%

1 2

RC46 0_0402_5%RC46 0_0402_5%

RP42

RP42

2.2K_0804_8P4R_5%

2.2K_0804_8P4R_5%

1 2
1 2

1 2

1 2

EC_SMB_CK2
EC_SMB_DA2

RC43

RC43

2.2K_0402_5%

2.2K_0402_5%

+3VS

RC44

RC44

2.2K_0402_5%

2.2K_0402_5%

+3VS

EC_SMB_DA2 [17,23]

+3VALW_PCH

EC_SMB_CK2 [17,23]

A A

Security Classification

Security Classification

Security Classification

2014/04/10 2017/04/10

2014/04/10 2017/04/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONT AI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONT AI NS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONT AI NS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/04/10 2017/04/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom
Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

BDW MCP(4/9) LPC,SPI,SMBUS

BDW MCP(4/9) LPC,SPI,SMBUS

BDW MCP(4/9) LPC,SPI,SMBUS

LA-B921PR10

LA-B921PR10

LA-B921PR10

736Friday, October 17, 2014

736Friday, October 17, 2014

736Friday, October 17, 2014

1

1.0

1.0

1.0

of

of

of

5

WWW.AliSaler.Com

Note: SUSACK# and SUSWARN# can be tied together if
EC does not want to involve in the handshake mechanism
for the Deep Sleep state entry and exit
CAN be NC ,if not support Deep Sx

+3VS

1 8
2 7
3 6
4 5

D D

C C

B B

A A

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 2

RC65 10K_0402_5%RC65 10K_0402_5%

+3VALW_PCH

RC136 1K_0402_5%RC136 1K_0402_5%

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

PCH_GPIO64
PCH_GPIO68
PCH_GPIO69
SYS_RESET#

RP65 10K_8P4R_5%RP65 10K_8P4R_5%

PCH_GPIO0
PCH_GPIO1
PCH_GPIO2
PCH_GPIO3

RP64 10K_8P4R_5%@RP64 10K_8P4R_5%@

08/21, change to unpop

PCH_GPIO91
PCH_GPIO92
PCH_GPIO93
PCH_GPIO94

RP63 10K_8P4R_5%@RP63 10K_8P4R_5%@

08/21, change to unpop

PCH_GPIO84
PCH_GPIO85
PCH_GPIO89
PCH_GPIO90

RP62 10K_8P4R_5%@RP62 10K_8P4R_5%@

08/21, change to unpop

PCH_GPIO48

RP45 10K_8P4R_5%RP45 10K_8P4R_5%

PCH_GPIO32
KB_RST#

RP46 10K_8P4R_5%RP46 10K_8P4R_5%

PCH_GPIO67
PCH_GPIO65
EC_SCI#

RP47 10K_8P4R_5%RP47 10K_8P4R_5%

RP48 10K_8P4R_5%RP48 10K_8P4R_5%

PCH_GPIO38

RP49 10K_8P4R_5%@ RP49 10K_8P4R_5%@

SERIRQ

RP50 10K_8P4R_5%RP50 10K_8P4R_5%

PCH_GPIO71
PCH_GPIO16

RP51 10K_8P4R_5%RP51 10K_8P4R_5%

PCH_GPIO33
PCH_GPIO50
PCH_GPIO76
PCH_GPIO49

RP52 10K_8P4R_5%@RP52 10K_8P4R_5%@

08/21, change to unpop

1 2

PCH_GPIO12
PCH_GPIO8

PCH_GPIO30

RP54 10K_8P4R_5%RP54 10K_8P4R_5%

PCH_GPIO61
PCH_GPIO29

RP55 10K_8P4R_5%@ RP55 10K_8P4R_5%@

SENSOR_HUB_RST#
PCH_GPIO13
SENSOR_HUB_INT#_R
PCH_GPIO25

RP57 10K_8P4R_5%RP57 10K_8P4R_5%

PCH_GPIO28
PCH_GPIO9
PCH_GPIO10

RP59 10K_8P4R_5%RP59 10K_8P4R_5%

PCH_PCIE_WAKE#

5

@10K,3VS XDP

+3VALW_PCH

12

RC51

RC51
200K_0402_5%

200K_0402_5%

AC_PRESENT

ESD

PCH_PWROK

12

@ESD@

@ESD@

CC95

CC95
100P_0402_50V8J

100P_0402_50V8J

PCIECLKREQ4_N [6]
WLAN_CLKREQ# [19,6]

PCIECLKREQ2_N [6]

PCIECLKREQ1_N [6]

PCH_GPIO36 [6]

PCH_GPIO53 [4]

PCH_GPIO78 [4]
PCH_GPIO77 [4]
PCH_GPIO79 [4]
BT_OFF# [19,4]

PCH_GPIO52 [4]
PCH_GPIO51 [4]

PCIECLKREQ5_N [6]
PCH_GPIO37 [6]

PCIECLKREQ0_N [6]

PCH_SATALED# [6]
PCH_GPIO34 [6]

PCH_GPIO54 [4]

PCH_GPIO73 [7]

PCH_GPIO60 [7]

SYS_PWROK[17,4]
PCH_PWROK[17]

EC_RSMRST#[17]
PBTN_OUT#[17]

AC_PRESENT[17]

ESD

EC_RSMRST#

1

CC96

CC96
1000P_0402_50V7K

1000P_0402_50V7K

ESD@

ESD@

2

ESD

SYS_RESET#

12

@ESD@

@ESD@

CC97

CC97
100P_0402_50V8J

100P_0402_50V8J

NGFF_SSD_PRESENT#[18]

SENSOR_HUB_INT#[16,4]

SENSOR_HUB_RST#[16]

DEVSLP1[18]

10K,3VS
@10K,3VS

+3VS

1 8
2 7
3 6
4 5

+3VALW_PCH

1 2

RC64 10K_0402_5%RC64 10K_0402_5%

1 2

RC146 10K_0402_5%RC146 10K_0402_5%

1 2

RC67 10K_0402_5%RC67 10K_0402_5%

1 2

RC147 10K_0402_5%RC147 10K_0402_5%

1 2

RC148 10K_0402_5%@RC148 10K_0402_5%@

+3VS

RC137 1K_0402_5%@RC137 1K_0402_5%@

+3VALW_PCH

1 8
2 7
3 6
4 5

4

10K,3VS

1 2

RC55 0_0402_5%RC55 0_0402_5%

1 2

RC57 10K_0402_5%RC57 10K_0402_5%

10K,+3VALW_PCH

10K,+3VALW_PCH

@10K,+3VALW_PCH

08/18, change to mount

10K,3VS
10K,+3VALW_PCH
10K,+3VALW_PCH
@1K,+3VALW_PCH
10K,3VS
10K,3VS
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH
10K,+3VALW_PCH

10K,+3VALW_PCH
10K,+3VALW_PCH

1 2

RC62 0_0402_5%@RC62 0_0402_5%@

10K,3VS
10K,3VS
10K,3VS
10K,+3VALW_PCH10K,+3VALW_PCH

1 2

RC138 0_0402_5%@RC138 0_0402_5%@

10K,+3VALW_PCH
10K,+3VALW_PCH

10K,+3VALW_PCH

10K,+3VALW_PCH
10K,+3VALW_PCH

10K,3VS
10K,3VS@10K,3VS

1 2

RC63 0_0402_5%RC63 0_0402_5%

EC_SCI#[17]

SPKR[15]

PCH_GPIO87
PCH_GPIO17
PCH_GPIO83
PCH_GPIO70

RP61 10K_8P4R_5%@RP61 10K_8P4R_5%@

1 2

PCH_GPIO44
PCH_GPIO26
PCH_GPIO45
PCH_GPIO24

RP58 10K_8P4R_5%@RP58 10K_8P4R_5%@

08/21, change to unpop

4

SUSACK#_R

T58T58

SYS_RESET#
SYS_PWROK
PCH_PWROK
APWROK_R
H_PLT_RST#

EC_RSMRST#
PCH_GPIO30
PBTN_OUT#
AC_PRESENT
PCH_GPIO72
SLP_S0_N

T53T53

PCH_GPIO29

PCH_GPIO76
PCH_GPIO8
PCH_GPIO12
PCH_GPIO15
PCH_GPIO16
PCH_GPIO17
PCH_GPIO24
PCH_GPIO27
PCH_GPIO28
PCH_GPIO26

RAM_ID0
RAM_ID1
RAM_ID2
RAM_ID3
PCH_GPIO44
DDR_ID
PCH_GPIO48
PCH_GPIO49
PCH_GPIO50
PCH_GPIO71
PCH_GPIO13
SENSOR_HUB_INT#_R
PCH_GPIO25
PCH_GPIO45
SENSOR_HUB_RST#

PCH_GPIO9
PCH_GPIO10
PCH_GPIO33
PCH_GPIO70
PCH_GPIO38
EC_SCI#
SPKR

PCH_GPIO72
PCH_GPIO27

PCH_GPIO11 [7]

DDR_ID

DDR_ID
PU 10K to +3VALW_PCH (DDR3L)
PU down 10K (LP-DDR3)

SPKR

DPWROK: Tired toghter with RSMRST#
that do not support Deep Sx

UCPU1H

UCPU1H

D19

SUSACK

E26

SYS_RESET

A22

SYS_PWROK

F9

PCH_PWROK

J22

APWROK

M23

PLTRST

F7

RSMRST

D8

SUSWARN_N_SUSPWRDNACK_GPIO30

M21

PWRBTN

M17

ACPRESENT_GPIO31

H17

BATLOW_N_GPIO72

G22

SLP_S0

J18

SLP_WLAN_N_GPIO29

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

J30

C18

J14
K25
N26
H31
C22
K17

M25

B15
F25

F23
F15
D15
L18
B29
K29
B31
F33
D29
E14

M19

F17
P23
L22

D17
B17
E30
R36
K31

J41
A34

System Power Management

System Power Management

UCPU1J

UCPU1J

BMBUSY_N_USB3PH Y_PC_GPIO76
GPIO8
LAN_PHY_PWR_CTRL_GPIO12
GPIO15
GPIO16
GPIO17
GPIO24
GPIO27
GPIO28
GPIO26

GPIO56
GPIO57
GPIO58
GPIO59
GPIO44
GPIO47
GPIO48
GPIO49
GPIO50
HSIOPC_PCIEPHY_PC_GPIO71
GPIO13
GPIO14
GPIO25
GPIO45
GPIO46

GPIO9
GPIO10
DEVSLP0_GPIO33
SDIO_POWER_EN_GPIO70
DEVSLP1_GPIO38
DEVSLP2_GPIO39
SPKR_GPIO81

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

GPIO

GPIO

3

DSWVRMEN

DPWROK

WAKE

GPIO32_CLKRUN

SUS_STAT_N_GPIO61

SUSCLK_GPIO62

SLP_S5_N_GPIO63

SLP_S4
SLP_S3

SLP_A

SLP_SUS

SLP_LAN

8 OF 20

8 OF 20

CPU/MISC

CPU/MISC

RCIN_N_GPIO82

PCH_OPI_RCOMP

LPIO

LPIO

GSPI0_CS_N__GPIO83

GSPI0_CLK_GPIO84
GSPI0_MISO_GPIO85
GSPI0_MOSI_GPIO86

GSPI1_CS_N_GPIO87

GSPI1_CLK_GPIO88
GSPI1_MISO_GPIO89

GSPI_MOSI_GPIO90
UART0_RXD_GPIO91
UART0_TXD_GPIO92

UART0_RTS_N_GPIO93
UART0_CTS_N_GPIO94

UART1_RXD_GPIO0

UART1_TXD_GPIO1
UART1_RST_N_GPIO2
UART1_CTS_N_GPIO3

I2C0_SDA_GPIO4
I2C0_SCL_GPIO5
I2C1_SDA_GPIO6
I2C1_SCL_GPIO7

SDIO_CLK_GPIO64

SDIO_CMD_GPIO65

SDIO_D0_GPIO66
SDIO_D1_GPIO67
SDIO_D2_GPIO68
SDIO_D3_GPIO69

DSWODVREN - On Die DSW VR Enable

H󶁪Enable(DEFAULT)

*

󶁪

Disable

L

RC52 330K_0402_5%RC52 330K_0402_5%

G14
J7
F19

B35
D25
B27
A18

H19
N22
G18
D27
K19

THERMTRIP

SERIRQ

RSVD_AJ14
RSVD_AL18

10 OF 20

10 OF 20

DSWODVREN
DPWROK
PCH_PCIE_WAKE#

PCH_GPIO32
PCH_GPIO61

PM_SLP_S5#
PM_SLP_S4#

PM_SLP_S3#
PM_SLP_A#
SLP_SUS_N
SLP_LAN_N

CG40
C34
E34
AB4
AJ14
AL18

D40
G34
L36
K33
L34
M31
F37
H35
M35
F39
N43
N41
P29
H38
N39
N30
N36
R42
J37
M33
N34
H40
R40
R38
J39
P31

RC56 330K_0402_5%@RC56 330K_0402_5%@
RC54 0_0402_5%RC54 0_0402_5%

@10K,+3VALW_PCH

1K_0402_1%

1K_0402_1%

H_THERMTRIP#
SERIRQ

PCH_OPIRCOMP

PCH_GPIO83
PCH_GPIO84
PCH_GPIO85
PCH_GPIO86
PCH_GPIO87
PCH_GPIO88
PCH_GPIO89
PCH_GPIO90
PCH_GPIO91
PCH_GPIO92
PCH_GPIO93
PCH_GPIO94
PCH_GPIO0
PCH_GPIO1
PCH_GPIO2
PCH_GPIO3
I2C0_SDA_SEN
I2C0_SCL _SEN
I2C1_SDA_TP
I2C1_SCL _TP
PCH_GPIO64
PCH_GPIO65
PCH_GPIO66
PCH_GPIO67
PCH_GPIO68
PCH_GPIO69

1K,+3VALW_PCH

10K,3VS

1 2
1 2
1 2

+1.05VS_VTT

12

RC60

RC60

RC61

RC61

10K,3VS
10K,3VS
10K,3VS

10K,3VS

10K,3VS

10K,3VS
10K,3VS

10K,3VS
10K,3VS
10K,3VS

T52T52
T54T54
T55T55

1 2

49.9_0402_1%

49.9_0402_1%

T59T59

2

DPWROK can be tied to RSMRST# for platforms
that do not support the Deep Sx state.

+RTCVCC

EC_RSMRST#

SUSCLK_WLAN [19]
PM_SLP_S5# [17]

PM_SLP_S4# [17]
PM_SLP_S3# [17]

ESD

H_THERMTRIP#

12

@ESD@

@ESD@

CC94

CC94
100P_0402_50V8J

100P_0402_50V8J

KB_RST# [17]

SERIRQ [17]

I2C0_SDA_SEN [16]
I2C0_SCL _SEN [1 6]
I2C1_SDA_TP [2 3]
I2C1_SCL _TP [23]

06/30, RC130~RC133 change value to 2.2K ohm

RAM_ID3

GPIO59

0
0
0
0
0
0
0
0
1
1
1

12

RC116

RC116
10K_0402_5%

10K_0402_5%

X76@

X76@

12

RC120

RC120
10K_0402_5%

10K_0402_5%

X76@

X76@

+3VALW_PCH+3VALW_PCH +3VALW_PCH +3VALW_PCH

12

RC117

RC117
10K_0402_5%

10K_0402_5%

X76@

X76@

12

RC121

RC121
10K_0402_5%

10K_0402_5%

X76@

X76@

12

RC118

RC118
10K_0402_5%

10K_0402_5%

X76@

RAM_ID2RAM_ID3 RAM_ID1 RAM_ID0

X76@

12

RC122

RC122
10K_0402_5%

10K_0402_5%

X76@

X76@

12

RC119

RC119
10K_0402_5%

10K_0402_5%

X76@

X76@

12

RC123

RC123
10K_0402_5%

10K_0402_5%

X76@

X76@

1

1
1
1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2014/04/10 2017/04/10

2014/04/10 2017/04/10

2014/04/10 2017/04/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

1 2

RC53 0_0402_5%RC53 0_0402_5%

+3VS

@

@

UC3

UC3

5

H_PLT_RST#

2

P

B

Y

1

A

G

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

3

PCH_GPIO86

4

12

RC59

RC59
100K_0402_5%

100K_0402_5%

1 2

RC110 1K_0402_1%@RC110 1K_0402_1%@

1 2

RC111 1K_0402_1%RC111 1K_0402_1%

GSPI0_MOSI / GPIO86 : Boot BIOS Strap

1: LPC BUS
0: SPI BUS

*

PCH_GPIO66

(Have internal PD)

1 2

RC112

SDIO_D0 / GPIO66 : Top-Block Swap Override

0: DISABLED

*

1: ENABLED

PCH_GPIO15

(Have internal PD)

RC113 1K_0402_1%@RC113 1K_0402_1%@

GPIO15 : TLS Confidentiality

1: Intel ME TLS with confidentiality
0: Intel ME TLS with no confidentiality

*

(Have internal PD)

I2C1_SDA_TP
I2C1_SCL _TP
I2C0_SDA_SEN
I2C0_SCL _SEN

RAM_ID1 RAM_ID0

RAM_ID2

GPIO581GPIO57 GPIO56

0

0

01

0

1

0
0

11

1

00

1

01
1

1
1

1

0

0

0

0

00

1

0

1
00

11

0

11

1

1
1

1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

1 2

RC130 2.2K_0402_5%RC130 2.2K_0402_5%

1 2

RC131 2.2K_0402_5%RC131 2.2K_0402_5%

1 2

RC132 2.2K_0402_5%RC132 2.2K_0402_5%

1 2

RC133 2.2K_0402_5%RC133 2.2K_0402_5%

0

HYNIX H5TC4G63AFR-PBA
SAMSUNG K4B4G1646Q-HYK0

0MICRON MT41K256M16HA-125:E

ELPIDA EDJ4216EFBG-GN-F
SAMSUNG K4B8G1646Q-MYK0
ELPIDA EDJ8416E6MB-GN-F
MICRON MT41K512M16TNA-125:E

0

HYNIX H5TC8G63AMR-PBA

1
0

MT41K256M16LY-107

0
1

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

P08-BDW MCP(5/9) PM,GPIO,I2C

P08-BDW MCP(5/9) PM,GPIO,I2C

P08-BDW MCP(5/9) PM,GPIO,I2C
LA-B921PR10

LA-B921PR10

LA-B921PR10

1

ESD

H_PLT_RST#

12

ESD@

ESD@

CC93

CC93
100P_0402_50V8J

100P_0402_50V8J

07/07, change to mount

4.7K_0402_5%

4.7K_0402_5%

@RC112

@

12

+3VS

RAM P/N

TBD1
TBD
TBD
TBD
TBD
TBD
TBD

1

PLT_RST# [17,19]

+3VS

+3VS

+3VALW_PCH

of

of

of

836Friday, October 17, 2014

836Friday, October 17, 2014

836Friday, October 17, 2014

1.0

1.0

1.0

5

D D

PCIE_PRX_DTX_N4[19]

WLAN

C C

B B

PCIE_PRX_DTX_P4[19]
PCIE_PTX_C_DRX_N4[19]

PCIE_PTX_C_DRX_P4[19]

+V1.05S_AUSB3PLL

CC17 0.1U_0402_16VK7CC17 0.1U_0402_16VK7
CC18 0.1U_0402_16VK7CC18 0.1U_0402_16VK7

RC69 3.01K_0402_1%RC69 3.01K_0402_1%

PCIE_RCOMP:
Trace width = 15 mils, Spacing = 15 mil,
Max length = 500 mils

1 2
1 2

1 2

4

UCPU1K

UCPU1K

AF40

PERN5_L0

AG41

PERP5_L0

AU40

PETN5_L0

AU42

PETP5_L0

AD40

PERN5_L1

AE41

PERP5_L1

AW40

PETN5_L1

AW42

PETP5_L1

AE43

PERN5_L2

AD42

PERP5_L2

BA42

PETN5_L2

BA40

PETP5_L2

AF42

PERN5_L3

AG43

PERP5_L3

BB41

PETN5_L3

BB43

PETP5_L3

AD38

PERN3

AC39

PERP3

AY41

PETN3

AY43

PETP3

PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4

PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4

PCIE_RCOMP

TP_F3_H2
TP_F45_F43
TP_F3_H2
TP_H44

T63T63

AH38
AH40

AV41
AV43

AF38
AE39

BD41
BD43

AH42

AJ43

BC40
BC42

AT41
AT43

F41

C41

UCPU1R

UCPU1R

CB11

RSVD_CB11

H15

RSVD_H15

F3

DAISY_CHAIN_NCTF_F3

F43

DAISY_CHAIN_NCTF_F43

H2

DAISY_CHAIN_NCTF_H2

H44

DAISY_CHAIN_NCTF_H44

PERN4
PERP4

PETN4

USB3.0 P3 / PCIE P1

PETP4
PERN1_USB3RN3

PERP1_USB3RP3

USB3.0 P4 / PCIE P2

PETN1_USB3TN3
PETP1_USB3TP3

PERN2_USB3RN4
PERP2_USB3RP4

PETN2_USB3TN4
PETP2_USB3TP4

RSVD_AT41
RSVD_AT43
PCIE_RCOMP
PCIE_IREF

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

3

PCIE

PCIE

USB

USB

RSVD_V4
RSVD_T3

RSVD_Y4

RSVD_W3

USB3RN1

USB3RP1
USB3TN1

USB3TP1

USB3RN2

USB3RP2
USB3TN2
USB3TP2

USBRBIAS

USBRBIAS
RSVD_H13
RSVD_F13

OC0_N_GPIO40
OC1_N_GPIO41
OC2_N_GPIO42
OC3_N_GPIO43

DAISY_CHAIN_NCTF_A44
DAISY_CHAIN_NCTF_C43
DAISY_CHAIN_NCTF_C45
DAISY_CHAIN_NCTF_F45

DAISY_CHAIN_NCTF_D2

DAISY_CHAIN_NCTF_D44

DAISY_CHAIN_NCTF_F1

USB2N0
USB2P0

USB2N1
USB2P1

USB2N2
USB2P2

USB2N3
USB2P3

USB2N4
USB2P4

USB2N5
USB2P5

USB2N6
USB2P6

USB2N7
USB2P7

11 OF 20

11 OF 20

W12
V12

T9
V10

Y10
Y8

AB10
AA9

W9
W7

V8
T7

V6
T5

Y6
W5

V4
T3

Y4
W3

AJ41
AM41

BG42
BG40

AM43
AK42
BF41
BF43

B13
D13
H13
F13

E18
E22
H21
D21

USB20_N0
USB20_P0

USB20_N1
USB20_P1

USB20_N2
USB20_P2

USB20_N3
USB20_P3

USB20_N4
USB20_P4

USB20_N5
USB20_P5

USB20_N6
USB20_P6

USB20_N7
USB20_P7

USBRBIAS

RC68 22.6_0402_1%RC68 22.6_0402_1%

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

A44

TP_A44

C43

TP_D44_C43

C45

TP_C45

F45

TP_F45_F43

D2

TP_D2

D44

TP_D44_C43

F1

TP_F1

1 2

T60T60
T61T61
T62T62
T64T64

2

USB20_N0 [22]
USB20_P0 [22]

USB20_N1 [19]
USB20_P1 [19]

USB20_N2 [22]
USB20_P2 [22]

USB20_N3 [22]
USB20_P3 [22]

USB20_N4 [22]
USB20_P4 [22]

USB20_N5 [20]
USB20_P5 [20]

USB20_N6 [19]
USB20_P6 [19]

USB20_N7 [16]
USB20_P7 [16]

USB3_RX2_N [19]

USB3_RX2_P [19]

USB3_TX2_N [19]

USB3_TX2_P [19]

USB_OC0# [19]
USB_OC1# [22]

1

USB2.0 IO (Sub Board)
USB3.0 IO (Main Board)(Debug port)
DCIN USB COMBO
Card Reader
Touch Screen
Camera
Mini Card (WLAN+BT)
Sensor

USB3.0 (Main Board)

CAD note:
Route single-end 50-ohms and max 450-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils

For USB Port 0,1
For USB Port 2,3
For USB Port 4,5
For USB Port 6,7

closed MCP 2000 mils

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

RP60

RP60

1 8
2 7
3 6
4 5

10K_8P4R_5%

10K_8P4R_5%

+3VALW_PCH

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

18 OF 20

18 OF 20

Compal Secret Data

Compal Secret Data

2014/04/10 2017/04/10

2014/04/10 2017/04/10

2014/04/10 2017/04/10

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal El ectronics, I nc.

Compal El ectronics, I nc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal El ectronics, I nc.

P09-BDW MCP(6/9) PCIe,USB

P09-BDW MCP(6/9) PCIe,USB

P09-BDW MCP(6/9) PCIe,USB

LA-B921PR10

LA-B921PR10

LA-B921PR10

1

936Friday, October 17, 2014

936Friday, October 17, 2014

936Friday, October 17, 2014

of

of

of

1.0

1.0

1.0

+1.35V_CPU

WWW.AliSaler.Com

1

+

+

CC20

CC20

2

5

220U_D2_2VY_R17M

220U_D2_2VY_R17M

@

@

4

3

2

1

D D

+1.35V_CPU

VDDQ DECOUPLING

2.2U_0402_6.3V6M

CC21

2.2U_0402_6.3V6M

CC21

2.2U_0402_6.3V6M

1

2

CRB:
+1.35V : 470UF/2V/7343 *2 (Un-mount)
10UF/6.3V/0603 * 6

2.2UF/6.3V/0402 * 4

C C

2.2U_0402_6.3V6M

CC22

2.2U_0402_6.3V6M

CC22

2.2U_0402_6.3V6M

1

1

2

2

SVID ALERT

B B

SVID DATA

VIDSOUT:
Requires a pull-up to VCCIO through a pull-up resistor of 110 ±5% close to the processor,
and a pull-up to VCCIO through a pull-up resistor of 110 ±5% close to Intel MVP 7.
VIDSCLK:
Required pull-up to VCCIO through 55 ±5% close to Intel IMVP 7.

08/04, CC26, CC27, CC28, CC30 change to 0402 type

CC24

CC24

CC25

2.2U_0402_6.3V6M

CC25

2.2U_0402_6.3V6M

1

1

2

2

CC23

10U_0603_6.3V6M@CC23

10U_0603_6.3V6M

CC26

10U_0402_6.3V6M

CC26

10U_0402_6.3V6M

1

2

CC27

10U_0402_6.3V6M

CC27

10U_0402_6.3V6M

@

1

2

VCCST_PWRGD[17]

CC28

10U_0402_6.3V6M

CC28

10U_0402_6.3V6M

1

2

Define EC OD pin, need double confirm.

+1.05VS_VTT

12

RC78

RC78
75_0402_5%

75_0402_5%

+1.05VS_VTT

12

RC80

RC80
130_0402_5%

130_0402_5%

Place the PU
resistors close to CPU

VR_SVID_ALRT#

Place the PU
resistors close to CPU

H_CPU_SVIDDAT

CC29

10U_0603_6.3V6M@CC29

10U_0603_6.3V6M

1

2

10U_0402_6.3V6M

10U_0402_6.3V6M

@

1

2

VCCST_PWRGD

CC30

CC30

+1.05VS_VTT

12

06/30, Reserve RC152 connect to JC1

CAD Note: PD resistor should be close to CPU

RC72

RC72
10K_0402_5%

10K_0402_5%

VR_SVID_ALRT#[32]

VR_SVID_CLK[32]
VR_SVID_DAT[32]

VGATE[32]

+1.05VS_VTT

RC77
150_0402_1%

150_0402_1%

1 2

CPU_PWR_DEBUG

RC79
10K_0402_5%

10K_0402_5%

1 2

VR_ON[32]

@RC77

@

@RC79

@

+1.35V

+CPU_CORE

RC70 100_0402_1%RC70 100_0402_1%

VCCSENSE[32]

R253: CPU_PWR_DEBUG
CRB mount
Check list ,XDP use only

RC134 0_0603_5%RC134 0_0603_5%

RC71 0_0402_5%RC71 0_0402_5%

RC73 43_0402_1%RC73 43_0402_1%
RC74 0_0402_5%RC74 0_0402_5%
RC75 0_0402_5%RC75 0_0402_5%

RC82 0_0402_5%RC82 0_0402_5%

12

CC31

22U_0603_6.3V6M

CC31

22U_0603_6.3V6M

JC1

@JC1

@

2

112

JUMP_43X118

JUMP_43X118

1 2

@EMI@

@EMI@

RC152

RC152
FCM1608CF-121T03 0603

FCM1608CF-121T03 0603

1 2
1 2

+VCCIO_OUT
+VCCIOA_OUT

1 2
1 2
1 2

1 2

+1.05VS_VCCST

+1.05VS_VCCST+1.05VS_VTT +VCCIO_OUT

CC32

1U_0402_6.3V6K@CC32

1U_0402_6.3V6K

1

2

1

@

2

+1.35V_CPU

+CPU_CORE

VCCSENSE_R

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCST_PWRGD

VR12.6PG_MCP

CPU_PWR_DEBUG

12

@

@

RC135 0_0603_5%

RC135 0_0603_5%

UCPU1L

UCPU1L

CJ32

RSVD_CJ32

CM33

RSVD_CM33

CT3

VDDQ_CT3

CY3

VDDQ_CY3

CB1

VDDQ_CB1

BV1

VDDQ_BV1

CF1

VDDQ_CF1

BA14

VDDQ_BA14

CL1

VDDQ_CL1

CM3

VDDQ_CM3

CW1

VDDQ_CW1

AP1

VDDQ_AP1

AV1

VDDQ_AV1

BB1

VDDQ_BB1

BC14

VDDQ_BC14

BE14

VDDQ_BE14

BF1

VDDQ_BF1

BK1

VDDQ_BK1

BP1

VDDQ_BP1

CR1

VDDQ_CR1

AV45

VCC_AV45

CJ28

RSVD_CJ28

CH45

VCC_SENSE

AL16

RSVD_AL16

BM43

VCCIO_OUT

AR40

VCCIOA_OUT

AL22

RSVD_AL22

AK33

RSVD_AK33

CL14

RSVD_CL14

CD43

VIDALERT

CD41

VIDSCLK

CE40

VIDSOUT

BU14

VCCST_PWRGD

CE42

VR_EN

CF43

VR_READY

CK40

PWR_DEBUG

CJ22

RSVD_TP_CJ22

CK23

RSVD_TP

CK27

IVR_ERROR

CL26

IST_TRIGGER

CK21

RSVD_CK21

CL22

RSVD_CL22

CK25

RSVD

CM27

RSVD_CM27

CK19

RSVD_CK19

CJ16

RSVD_CJ16

CK31

RSVD_CK31

AJ20

VCCST_AJ20

BDW-Y-LPDDR3_BGA1234@12 OF 20

BDW-Y-LPDDR3_BGA1234

@

VCC_BK45
VCC_CB41
VCC_CA40

VCC_BY41

VCC_BW40

VCC_CY17

VCC_AY45

VCC_BB45
VCC_BD45

VCC_BF45
VCC_BH45

VCC_BT45

VCC_BV45

VCC_BY45
VCC_CB45
VCC_CD45

VCC_CF45

VCC_CM45

VCC_CN44
VCC_CR43
VCC_CR45
VCC_CU44
VCC_CV43
VCC_CV45
VCC_CY19
VCC_CY21
VCC_CY23
VCC_CY25
VCC_CY27
VCC_CY29
VCC_CY31
VCC_CY33
VCC_CY36
VCC_CY38
VCC_CY42
VCC_CY44
VCC_BM45

VCC_BP45
VCC_CA44

VCC_BV41

VCC_BV43

VCC_BW44

VCC_CY40
VCC_CY13
VCC_CY15

VCC_BW42

VCC_BY43
VCC_CA42
VCC_CB43

12 OF 20

BK45
CB41
CA40
BY41
BW40
CY17
AY45
BB45
BD45
BF45
BH45
BT45
BV45
BY45
CB45
CD45
CF45
CM45
CN44
CR43
CR45
CU44
CV43
CV45
CY19
CY21
CY23
CY25
CY27
CY29
CY31
CY33
CY36
CY38
CY42
CY44
BM45
BP45
CA44
BV41
BV43
BW44
CY40
CY13
CY15
BW42
BY43
CA42
CB43

+CPU_CORE

A A

Security Classification

Security Classification

5

Security Classification

2014/04/10 2017/04/10

2014/04/10 2017/04/10

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2014/04/10 2017/04/10

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal El ectronics, I nc.

Compal El ectronics, I nc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal El ectronics, I nc.

P10-BDW MCP(7/9) Power

P10-BDW MCP(7/9) Power

P10-BDW MCP(7/9) Power

LA-B921PR10

LA-B921PR10

LA-B921PR10

1

1.0

1.0

1.0

10 36Friday, October 17, 2014

10 36Friday, October 17, 2014

10 36Friday, October 17, 2014

of

of

of

5

+1.05VS_VTT

1 2

RC83 0_0805_5%RC83 0_0805_5%

+1.05VS_VTT

1 2

RC84 0_0805_5%RC84 0_0805_5%

D D

+1.05VS_VTT

1 2

RC86 0_0805_5%RC86 0_0805_5%

+1.05VS_VTT +V1.05S_ASATA3PLL

1 2

LC1

LC1

2.2UH_LQM2MPN2R2NG0L_30%

2.2UH_LQM2MPN2R2NG0L_30%

+1.05VS_VTT +V1.05S_AUSB3PLL

1 2

LC2

LC2

2.2UH_LQM2MPN2R2NG0L_30%

2.2UH_LQM2MPN2R2NG0L_30%

C C

@

@

1

CC33

CC33
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CC37

CC37
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CC45

CC45
1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

RC150

RC150
0_0402_5%

0_0402_5%

+V1.05S_MPHY_SATA

+V1.05S_MPHY_USB3

1

@ CC53

@

2

1

@ CC1

@

2

<3/3 BDW SI>Follow Audio codec power rail

+3VALW_PCH

12

RC92

RC92

+VCCHDA

0_0603_5%

0_0603_5%

1

CC67

CC67

0.1U_0402_16VK7

0.1U_0402_16VK7

2

B B

+3VS

RC99 0_0603_5%RC99 0_0603_5%

closed to pin AL30 closed to pin AK31 closed to pin AJ26

+1.05VS_VTT

A A

closed to pin AL39 closed to pin AJ28 closed to pin AK23

+V3.3S_PCORE

12

RC140

RC140
0_0402_5%

0_0402_5%

1 2

RC143

RC143
0_0402_5%

0_0402_5%

1 2

closed to pin A30, A28, A26, T27

1

CC75

CC75

0.1U_0402_16VK7

0.1U_0402_16VK7

2

+V1.05S_F100 +1.05VS_VTT +V1.05S_SSCFF

1

CC85

CC85
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CC88

CC88
1U_0402_6.3V6K

1U_0402_6.3V6K

2

5

1

CC76

CC76

0.1U_0402_16VK7

0.1U_0402_16VK7

2

RC141

RC141
0_0402_5%

0_0402_5%

1 2

1 2

+V1.05S_MPHY_PCIE

1

CC34

CC34

0.1U_0402_16VK7

0.1U_0402_16VK7

2

1

CC40

CC40

0.1U_0402_16VK7

0.1U_0402_16VK7

2

1

CC46

CC46

0.1U_0402_16VK7

0.1U_0402_16VK7

2

CC53
22U_0805_6.3V6M

22U_0805_6.3V6M

CC1
22U_0805_6.3V6M

22U_0805_6.3V6M

RC144

RC144
0_0402_5%

0_0402_5%

1

CC35

CC35

0.1U_0402_16VK7

0.1U_0402_16VK7

2

12

RC142

RC142
0_0402_5%

0_0402_5%

1 2

+1.05VS_VTT +V1.05S_CLKF24NS+1.05VS_VTT +V1.05S_SSCF135 +1.05VS_VTT +V1.05S_SCLKF135

1

CC55

CC55
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CC98

CC98
1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

1 2

1

CC54

CC54
22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

CC2

@ CC2

@

22U_0805_6.3V6M

22U_0805_6.3V6M

2

+3VALW_PCH

RC90 0_0603_5%RC90 0_0603_5%

+3VALW_PCH +V3.3A_DSW_PRTCSUS

RC94 0_0603_5%RC94 0_0603_5%

1

CC99

CC99

0.1U_0402_16VK7

0.1U_0402_16VK7

2

INTEL suggest 1pcs 22uF change to 2 pcs 0.1uF

+1.05VS_VTT +V1.05S_SSCF100

1

CC86

CC86
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CC89

CC89
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VTT

RC145

RC145
0_0402_5%

0_0402_5%

4

1 2

RC85 0_0603_5%RC85 0_0603_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

5/20 LC2,CC1,CC2,CC53 unpop
LC1 , RC150 , CC55,CC98 pop

+3V_DSW_P

INTEL suggest CC77 can be unstuff

CC64

0.1U_0402_16VK7

CC64

0.1U_0402_16VK7

1

1

@

@

CC77

CC77
1U_0402_6.3V6K

1U_0402_6.3V6K

2

2

1

CC72

CC72
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CC87

CC87
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CC90

CC90
1U_0402_6.3V6K

1U_0402_6.3V6K

2

4

3

UCPU1M

UCPU1M

@

@

47U_0805_6.3V6M

47U_0805_6.3V6M

AB38

VCCPCIEPHY_AB38

W45

VCCPCIEPHY_W45

AA45

VCCPCIEPHY

N45

VCCSATAPHY

T45

VCCSATAPHY_T45

AC45

VCCUSB3PHY_AC45

AD36

VCCUSB3PHY_AD36

AE45

VCCUSB3PHY

T31

VCC1_05_PHY

T33

VCCSATA3PLL

T35

VCCUSB3PLL

AK19

VCCOPIPLL

AK29

VCCHDAPLL

U30

DCPSUS3

W1

VCCHDA_W1

HDA

HDA

VCCHDA
DCPSUS2

VCCSUS3_3
VCCDSW3_3_AA1
VCCDSW3_3_AB14

VCC3_3_A30
VCC3_3_A28
VCC3_3_A26
VCC3_3

VCCCLK4
VCCACLKPLL
VCCCLK6

VCCCLK2

ICC

ICC

VCCCLK7
VCCCLK5
VCCCLK3
VCCCLK1
VCCSUS3_3_AL14

BDW-Y-LPDDR3_BGA1234

BDW-Y-LPDDR3_BGA1234

@

@

RC151

RC151
0_0402_5%

0_0402_5%

INTEL suggest CC61,CC69 need POP

@ CC69

@

+V1.05S_APLLOPI_IND

12

CC49

CC49
10U_0402_6.3V6M

10U_0402_6.3V6M

47U_0805_6.3V6M

47U_0805_6.3V6M

3

CC80

CC80

CC78

CC78

AA13
AG14

AB14

AL37
AK35
AL30

AK31
AJ26

AL39
AJ28
AK23
AL14

U18
AA1

A30
A28
A26
T27

12

@

@

1

2

VCCRTC
DCPRTC

VCCSPI

VCCSPI_T25

VCCASW

VCC1_05_Y22

VCC1_05_W22

VCC1_05

VCC1_05_T17

DCPSUSBYP
VCCASW_N1
VCCASW_T1

DCPSUS1

VCCTS1_5

VCCSDIO

DCPSUS4

VCCUSB2PLL

VCC1_05_USB

13 OF 20

13 OF 20

1

@ CC62

@

2

1

CC70
47U_0805_6.3V6M

47U_0805_6.3V6M

2

AC15
AA15
V15

A24
T25

AE15
Y22

W22
AJ16
AH36
AG45
AJ45
T17

AG13
N1
T1
W14

U16
AJ32

AB36
A32
T21
AK17

AE13

CC62
47U_0805_6.3V6M

47U_0805_6.3V6M

VCCSUS3_3_RTC_AC15

MPHY

MPHY

RTC

RTC

SPI

SPI

USB3

USB3

VCC1_05_AJ16
VCC1_05_AH36

VCC1_05_AG45

VCCASW_W 14

VCCTS3_3_AB36

DSW

DSW

DCPSUS can be NC, if INTVRMEN pull up
to enable Integrated VRM

1

CC61

CC61
47U_0805_6.3V6M

47U_0805_6.3V6M

2

1

@ CC70

@

CC69
47U_0805_6.3V6M

47U_0805_6.3V6M

2

12

@

@

1

CC100

CC100
10U_0402_6.3V6M

10U_0402_6.3V6M

2

08/04, CC49(22U) change to 10U*2(CC49,CC100)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL
AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET I NFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTR ONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTR ONICS, INC.

+V1.05S_MPHY_PCIE

+V1.05S_MPHY_SATA

+V1.05S_MPHY_USB3

+V1.05S_AIDLE

1

+V1.05S_ASATA3PLL

CC43

CC43

+V1.05S_AUSB3PLL

+V1.05S_APLLOPI

2

+V1.05S_APLL

+V1.05A_VCCUSB3SUS

+VCCHDA

+V1.05A_VCCUSB2SUS

+V3.3A_PSUS

+3V_DSW_P

+V3.3S_PCORE

+V1.05S_AXCK_DCB
+V1.05S_AXCK_LCPLL

+V1.05S_F100
+V1.05S_SSCFF

+V1.05S_SSCF100

+V1.05S_SSCF135
+V1.05S_SCLKF135
+V1.05S_CLKF24NS

+V3.3A_PSUS

+1.05VS_VTT +V1.05S_AXCK_DCB

1 2

LC3

LC3

2.2UH_LQM2MPN2R2NG0L_30%

2.2UH_LQM2MPN2R2NG0L_30%

+1.05VS_VTT +V1.05S_AXCK_LCPLL

1 2

LC4

LC4

2.2UH_LQM2MPN2R2NG0L_30%

2.2UH_LQM2MPN2R2NG0L_30%

@

@

+1.05VS_VTT

1 2

LC5

LC5

2.2UH_LQM2MPN2R2NG0L_30%

2.2UH_LQM2MPN2R2NG0L_30%

1 2

RC100 0_0603_5%RC100 0_0603_5%

+3VALW_PCH +V3.3A_PSUS

1 2

RC139 0_0603_5%RC139 0_0603_5%

2

+V3.3A_DSW_PRTCSUS

1 2

CC36 0.1U_0402_16VK7CC36 0.1U_0402_16VK7

+1.05VS_VTT
+V1.05S_CORE_PCH

RC87

RC87

1

CC63

CC63
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CC71

CC71
1U_0402_6.3V6K

1U_0402_6.3V6K

2

RC970_0402_5% RC970_0402_5%

1

2

+V1.05S_APLL

RC1010_0402_5% RC1010_0402_5%

1

2

+V1.05S_AUSB

RC1020_0402_5% RC1020_0402_5%

1

2

1 2

0_0402_5%

0_0402_5%

+1.05VM_VCCASW

+1.5VS

+V1.05S_AUSB

CC73

CC73
1U_0402_6.3V6K

1U_0402_6.3V6K

CC79

CC79
1U_0402_6.3V6K

1U_0402_6.3V6K

CC84

CC84
1U_0402_6.3V6K

1U_0402_6.3V6K

CC48 0.1U_0402_16VK7CC48 0.1U_0402_16VK7

CC56 0.1U_0402_16VK7CC56 0.1U_0402_16VK7

5/20 LC4,CC1,CC62,CC69 , CC70 unpop
RC151 , CC61,CC63 , CC71 pop

Compal Secret Data

Compal Secret Data

Compal Secret Data

+PCH_VCCDSW

+V1.05A_VCCPCHSUS

+V1.05A_AOSCSUS

+V1.05S_APLLOPI
12

12

12

2014/04/10 2017/04/10

2014/04/10 2017/04/10

2014/04/10 2017/04/10

1

CC42

CC42

0.1U_0402_16VK7

0.1U_0402_16VK7

2

+3V_DSW_P

1

CC44

@ CC44

@

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

2

1 2

+3VS
+3VS

1 2

+1.05VS_VTT

1

CC57

CC57
1U_0402_6.3V6K

1U_0402_6.3V6K

2

Deciphered Date

Deciphered Date

Deciphered Date

2

+3VALW_PCH

CC47 1U_0402_6.3V6KCC47 1U_0402_6.3V6K

Reserve for inrush
current issue

1 2

1

2

CC41

CC41
1U_0402_6.3V6K

1U_0402_6.3V6K

1

+RTCVCC

1

CC38

CC38

0.1U_0402_16VK7

0.1U_0402_16VK7

2

1

@

@

CC39

CC39

0.1U_0402_16VK7

0.1U_0402_16VK7

2

closed to pin Y22, W22, AJ16, AH36, AG45, AJ45, T17

+V1.05S_CORE_PCH

1

CC50

CC50
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CC58

CC58

0.1U_0402_16VK7

0.1U_0402_16VK7

2

1

CC51

CC51

0.1U_0402_16VK7

0.1U_0402_16VK7

2

1

CC59

CC59

0.1U_0402_16VK7

0.1U_0402_16VK7

2

closed to pin AE15, N1, T1, W14 for VCCASW

+1.05VS_VTT +V1.05A_VCCUSB3SUS

+1.05VS_VTT

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

RC91

RC91

1 2

@

@

0_0402_5%

0_0402_5%

@

@

RC95

RC95

1 2

@

@

0_0402_5%

0_0402_5%

RC98

RC98

1 2

@

@

0_0402_5%

0_0402_5%

@

@

1 2

LC6

LC6

2.2UH_LQM2MPN2R2NG0L_30%

2.2UH_LQM2MPN2R2NG0L_30%

RC103

RC103

1 2

@

@

0_0402_5%

0_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

BDW MCP(8/9) Power

BDW MCP(8/9) Power

BDW MCP(8/9) Power

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-B921PR10

LA-B921PR10

LA-B921PR10

+1.05VM_VCCASW

1

2

CC65

CC65

10U_0603_6.3V6M

10U_0603_6.3V6M

+V1.05A_VCCUSB2SUS

+V1.05A_VCCPCHSUS

CC81

CC81

1

1

CC52

CC52
10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

@

@

CC60

CC60
22U_0603_6.3V6M

22U_0603_6.3V6M

2

INTEL suggest CC60 can
be unpop

1

@

@

CC66

CC66
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

@

@

CC68

CC68
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

@

@

CC74

CC74
1U_0402_6.3V6K

1U_0402_6.3V6K

2

@

@

12

CC82

CC82

47U_0805_6.3V6M

47U_0805_6.3V6M

RC88

RC88
0_0805_5%

0_0805_5%

1 2

RC89

RC89
0_0805_5%

0_0805_5%

1 2

@

@

12

47U_0805_6.3V6M

47U_0805_6.3V6M

+1.05VS_VTT

+1.05VS_VTT

+V1.05A_AOSCSUS

@

@

1

CC83

CC83

1U_0402_6.3V6K

1U_0402_6.3V6K

2

11 36Friday, October 17, 2014

11 36Friday, October 17, 2014

11 36Friday, October 17, 2014

of

of

of

1.0

1.0

1.0